Quatech RS-232, MPA-100 User Manual

MPA-100

RS-232 SYNCHRONOUS

ADAPTER CARD

User's Manual

INTERFACE CARDS FOR IBM PC/AT AND PS/2

QUATECH, INC. TEL: (330) 665-9000 5675 Hudson Industrial Parkway FAX: (330) 665-9010 Hudson, Ohio 44236 http://www.quatech.com

Warranty Information

Quatech Inc. warrants the MPA-100 to be free of defects for one (1) year

fails to perform under normal operating conditions and in accordance with the procedures outlined in this document during the warranty period. Any damage that results from improper installation, operation, or general misuse voids all warranty rights.

The authors have taken due care in the preparation of this document and any associated software program(s). In no event will Quatech Inc. be liable for damages of any kind, incidental or consequential, in regard to or arising out of the performance or form of the materials presented herein and in the program(s) accompanying this document. No representation is made regarding the suitability of this product for any particular purpose.

Quatech Inc. reserves the right to edit or append to this document or the product(s) to which it refers at any time and without notice.

Please complete the following information and retain for your records. Have this information available when requesting warranty service.

from the date of purchase. Quatech Inc. will repair or replace any adapter that

Date of purchase:

Model Number:

Serial Number:

MPA-100

Single Channel RS-232 SynchronousProduct Description:

Communication ISA Adapter

MPA-100 User's Manual i

The information contained in this document cannot be reproduced in any form without the written consent of Quatech, Inc. Likewise, any software programs that might accompany this document can be used only in accordance with any license agreement(s) between the purchaser and Quatech, Inc. Quatech, Inc. reserves the right to change this documentation or the product to which it refers at any time and without notice.

The authors have taken due care in the preparation of this document and every attempt has been made to ensure its accuracy and completeness. In no event will Quatech, Inc. be liable for damages of any kind, incidental or consequential, in regard to or arising out of the performance or form of the materials presented in this document or any software programs that might accompany this document.

Quatech, Inc. encourages feedback about this document. Please send any written comments to the Technical Support department at the address listed on the cover page of this document.

Quatech Inc.

5675 Hudson Industrial Parkway

Hudson, Ohio 44236

Trademarks:

Quatech,, and Syncdrive are trademarks of Quatech Inc. Other product and company names are registered trademarks or trademarks of their respective holders.

MPA-100 User's Manual ii

Table of Contents

1. INTRODUCTION

2. HARDWARE INSTALLATION

3. ADDRESSING

4. INTERRUPTS

4.1 Using Terminal Count to Generate Interrupts ...................... ..

5. JUMPER CONFIGURATIONS

5.1 DTE/DCE Configuration - J2, J11, & J12

5.2 Interrupt Sharing Configuration - J4

5.3 Interrupt Level Selection - J5 & J6

5.4 Transmit DMA Selection - J8 .................................... ..

5.5 Receive DMA Selection - J9 ..................................... ..

5.6 SYNCA to RLEN Control - J7

6. SCC GENERAL INFORMATION

6.1 Accessing the Registers ......................................... ..

6.2 Baud Rate Generator Programming .............................. ..

6.3 SCC Data Encoding Methods .................................... ..

7. DIRECT MEMORY ACCESS

8. CONFIGURATION REGISTER

9. COMMUNICATIONS REGISTER

10. DTE/DCE CONFIGURATION

10.1 DTE Configuration ........................................... .

10.2 DCE Configuration ........................................... .

11. EXTERNAL CONNECTIONS

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12. DEFINITION OF INTERFACE SIGNALS

13. SPECIFICATIONS

............................................... .

1-1 2-1 3-1 4-1

4-2 5-1

......................... ..

........................ .

5-1 5-1 5-2

5-3 5-3

6-4 6-1

6-2 6-5 7-6

7-1 8-1 9-1 10-1

10-2 10-3

11-6 12-1 13-1

MPA-100 User's Manual iii

MPA-100 User's Manual iv

1. INTRODUCTION

The Quatech MPA-100 is a single channel, synchronous RS-232 compatible serial communication port for systems utilizing the architecture of the IBM AT personal computer or compatible. Figure 1 depicts the layout of the MPA-100.

Figure 1 MPA-100 Board Layout

Quatech, Inc.

U29

U16

U22

MPA-100

SW1 SW2

J5 J6

U10

U11

U12

U13

U14

U15

U17

U23

U28

U18

U19

U20

U21

J11

J12

CN1

The MPA-100 occupies an 8 byte block of I/O address space which may be located anywhere within the available I/O address space in the system.

Communication on the MPA-100 is controlled by a serial communications controller, hereafter referred to as the SCC (U17). The MPA-100 is compatible with several different types of SCC, all of which can support asynchronous formats, byte-oriented protocols such as IBM Bisync, and bit-oriented protocols such as HDLC and SDLC. The SCCs also offer internal functions such as on-chip baud rate generators, and digital phase-lock loops (DPLL).

The MPA-100 also supports Direct Memory Access (DMA) and interrupts. DMA channels 1 - 3 can be used for high data transfer rates. Interrupt levels 2-7, 10-12, and 14-15 are available.

MPA-100 User's Manual 1-1

MPA-100 User's Manual 1-2

2. HARDWARE INSTALLATION

If the default address and interrupt settings are sufficient, the MPA-100 can be quickly installed and put to use. The factory default settings are listed below in Table 1.

Table 1 Default Resource Settings

RxDMATxDMAInterruptAddress DMA/DRQ 1DMA/DRQ 3IRQ 5300 hex

1. If the default settings are correct, skip to step 2, otherwise refer to chapters 3, 4, and 7 for detailed information on how to set the address, IRQ, and DMA levels.

2. Turn off the power of the computer system in which the MPA-100 is to be installed.

3. Remove the system cover according to the instructions provided by the computer manufacturer.

4. Install the MPA-100 in any vacant expansion slot. The board should be secured by installing the Option Retaining Bracket (ORB) screw.

5. Replace the system cover according to the instructions provided by the computer manufacturer.

6. Attach and secure the cable connectors to the desired equipment.

MPA-100 User's Manual 2-1

MPA-100 User's Manual 2-2

3. ADDRESSING

The MPA-100 occupies a continuous 8 byte block of I/O addresses. For example, if the

base address is set to 300H, then the MPA-100 will occupy address locations 300H-307H. The base address of the MPA-100 may be set to any of the first 64 Kbytes (0 - FFFFH) of available I/O address space through the settings of dip switches SW1 and SW2. SW1 allows the user to select the higher address signals A15 - A8. SW2 allows the user to select the lower address signals A7 - A3. The sixth position of SW2 is not used and can be ignored. Figure 2 shows some examples of different base addresses.

Figure 2 Address switch selection examples

A12

A13

A14

A15

SW1

44556

Base Address = 300H

A15

A14

A13

A12

SW1

Base Address = 3F8H

A11

A10

NOT USED

112

SW2

3445566

NOT USED

MPA-100 User's Manual 3-1

The first four bytes, Base+0 through Base+3, of address space on the MPA-100 contain

the internal registers of the SCC. The next two locations Base+4 and Base+5 contain the Communications Register and the Configuration Register. The last two address port locations are reserved for future use. The entire address range of the MPA-100 is shown in Table 2.

Table 2 MPA-100 Address Assignments

SCC Data Port, Channel ABase + 0

SCC Control Port, Channel ABase + 1

SCC Data Port, Channel BBase + 2

SCC Control Port, Channel BBase + 3

Communications RegisterBase + 4

Configuration RegisterBase + 5

ReservedBase + 6

ReservedBase + 7

Information on the internal registers of the SCC can be found in Section 6. The two

onboard registers give the user additional options pertaining to DMA, interrupts and the RS-232-D standard for communication. Information on the Configuration Register and the Communications Register can be found in Section 8, and Section 9.

MPA-100 User's Manual 3-2

4. INTERRUPTS

The MPA-100 supports eleven interrupt levels: IRQ2 -7, IRQ10 - 12, and IRQ14 - 15,

and selects which interrupt level is in use through jumper packs J5 and J6. The MPA-100 has three interrupt sources: interrupt on terminal count, interrupt on test mode, and interrupt from the SCC. The interrupt source is selected by bits D4 and D5 of the Configuration Register, see Section 8 for details. Interrupts from the SCC can occur on a number of conditions, depending on the configuration of the SCC’s internal register. The sources include interrupt on next character received, interrupt on all characters received, interrupt on special condition, interrupt on transmit buffer empty, and interrupt on External/Status (see the SCC Technical Manual for more details). Jumper block J4 can be selected to provide for interrupt sharing on the MPA-100.

When using interrupts with the MPA-100, it is required that the application program have

an interrupt service routine (ISR). There are several things that an ISR must do to allow proper system operation:

1. Do a software interrupt acknowledge to the SCC. This is accomplished by reading the interrupt vector register, read register 2, in channel B of the SCC. The value supplied by this read can also be used to vector to the appropriate part of the ISR.

2. Service the interrupt ( read the receiver buffer, write to the transmit buffer, etc.).

3. Write a Reset Highest Interrupt Under Service (IUS) command to the SCC. This is done by writing a 0x38 to write register 0.

4. Check for any additional interrupts pending in the SCC and service them.

5. For applications running under DOS, a nonspecific End of Interrupt must be submitted to the interrupt controller. For Interrupts 2-7 this is done by writing a 0x20 to port 0x20. For Interrupts 10-12,14 and 15 this is done by writing a 0x20 to 0x60, then a 0x20 to 0x20 (Due to the interrupt controllers being cascaded). Note that this should only be done if it is a requirement of the operating system being used.

For further information on these subjects or any others involving the SCC contact the manufacturer of the SCC being used for a complete technical manual.

MPA-100 User's Manual 4-1

4.1 Using Terminal Count to Generate Interrupts

The MPA-100 allows the option of generating an interrupt whenever the Terminal Count

(TC) signal is asserted. Terminal Count is an indicator generated by the system’s DMA controller, which signals that the number of transfers programed into the DMA controller’s transfer register have occurred. This board feature only works when the interrupt sharing feature is selected on jumper J4.

MPA-100 User's Manual 4-2

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