Quatech, Inc. warrants the ESC-100 to be free of defects for five (5) years
from the date of purchase. Quatech, Inc. will repair or replace any board that fails to
perform under normal operating conditions and in accordance with the procedures
outlined in this document during the warranty period. Any damage that results from
improper installation, operation, or general misuse voids all warranty rights.
Please complete the following information and retain for your records. Have
this information available when requesting warranty service.
The information contained in this document cannot be reproduced in any form
without the written consent of Quatech, Inc. Likewise, any software programs that
might accompany this document can be used only in accordance with any license
agreement(s) between the purchaser and Quatech, Inc. Quatech, Inc. reserves the right
to change this documentation or the product to which it refers at any time and without
notice.
The authors have taken due care in the preparation of this document and every
attempt has been made to ensure its accuracy and completeness. In no event will
Quatech, Inc. be liable for damages of any kind, incidental or consequential, in regard
to or arising out of the performance or form of the materials presented in this document
or any software programs that might accompany this document.
Quatech, Inc. encourages feedback about this document. Please send any
written comments to the Technical Support department at the address listed on the
cover page of this document.
DOS, Windows ME, Windows 2000, Windows 98, Windows 95, Windows NT are trademarks or registered
trademarks of Microsoft Corporation. OS/2 is a registered trademark of IBM Corporation. All other
trademarks or registered trademarks are property of their respective owners.
The Quatech, Inc. ESC-100 provides eight RS-232 asynchronous serial
communication interfaces for IBM-compatible personal computer systems using the
PCI expansion bus. The ESC-100 uses Quatech's new Enhanced Serial Adapter design.
Legacy serial port data rates are limited to a maximum of 115,200 bits per second.
Quatech Enhanced Serial Adapters can achieve data rates as high as 921,600 bits per
second.
As a PCI device, the ESC-100 requires no hardware configuration. The card is
automatically configured by the computer's BIOS or operating system. The eight serial
ports share a single interrupt line and are addressed in a contiguous block of 64 bytes.
A special interrupt status register is provided to help software to manage the shared
interrupt.
The ESC-100's serial ports are using 16750 Universal Asynchronous
Receiver/Transmitters (UARTs). These UARTs contain hardware buffers (FIFOs) which
reduce processing overhead and allow higher data rates to be achieved. The 16750
contains a 64-byte FIFO and can transmit and receive data at a rate of up to 921,600 bits
per second.
The ESC-100 is supported under several popular operating systems and
environments. Contact the sales department for details on current software offerings.
Most device drivers are available for download from the Quatech world wide web site
at http://www.quatech.com.
1.1 Connector Type
The ESC-100 is available with two different connector schemes, reflected in the
specific model number of the board.
The ESC-100D uses a D-78 connector. A cable is supplied to break each serial
port out into a standard male D-25 connector. All modem control signals are provided
for each serial port.
The ESC-100M uses modular RJ-11 (phone jack style) connectors, one per serial
port. Only six signals are available on the RJ-11 connector. Along with the transmit
(TXD) and receive data (RXD) signals, carrier detect (DCD) and a ground, either the
RTS/CTS signal pair or the DTR/DSR signal pair can be connected. The other signal
pair can be connected in a loopback configuration on the board. Optional adapter
cables translate the RJ-11 connectors to D-25 connectors with customer-configurable
pinouts.
1.2 Features
RJ-11
yes
ESC-100
M
IND
D-78
yes
ESC-100
D
IND
Connector
IND Option
Part Number
Quatech ESC-100 User's Manual
7
The standard ESC-100 implements each of its communication channels with a
16750 UART and uses standard line driver and receiver components. For improved
performance and industrial-grade reliability, Quatech offers the following board
upgrades:
1.2.1 "IND" Option --- Surge Suppression Upgrade
The "IND" upgrade provides the protection essential for reliable use in an
industrial environment. Each communication line has a surge suppressor capable of
sustaining up to 40A 20us peak transient surges, a clamping voltage of 30V and a peak
energy dissipation of 0.1 Joules.
D-78noESC-100D
RJ-11noESC-100M
Figure 1 --- ESC-100 Product Series Summary
2 Hardware Configuration
Quatech ESC-100 User's Manual
8
The ESC-100 is automatically configured at boot time by the computer's BIOS or
operating system. There are no required switches or jumpers to set for installation.
This chapter lists a number of optional jumper settings that control various
hardware features. Jumpers J1-J4 are grouped together at the end of the board opposite
the D-78 or RJ-11 connector. Any changes from the factory default should be made
before installing the ESC-100 in the computer.
2.1 Factory Default Configuration
Figure 2 shows the jumper configuration as shipped from the factory, with two
spare jumpers applied in neutral positions. Remove one or both and apply as shown
in following sections to set optional features.
J1
J2
J3
J4
X2
X4
X8
SPAD
Figure 2 --- Factory default jumper configuration
2.2 Enable Scratchpad Register (SPAD, J4)
In the default configuration, an Interrupt Status Register and an Options Register
(see page 9) replace the scratchpad (base address + 7) of each UART. If the SPAD
jumper is applied as in Figure 3, the UART scratchpad registers are enabled, and the
Interrupt Status Register and the Options Register are not available.
J1
J2
J3
X2
X4
X8
J4
SPAD
Figure 3 --- Enable scratchpad registers
2.3 Force High-Speed UART Clock (X2, X4, or X8, J1-J3)
Baud rates up to 230.4 kbps
software control
Quatech ESC-100 User's Manual
9
These jumpers force an increase of the UART input clock frequency by a factor of
two, four, or eight. This can allow legacy software to use baud rates above 115,200 bits
per second. It is also useful if the serial port device driver does not directly support
setting the higher baud rates through the Options Register (see page 9).
If one of these jumpers is applied, it overrides any value written to the Options
Register to set the clock multiplier by software. The effective baud rate will be either
two, four, or eight times the value for which the UART itself is programmed.
The factory default is none of these jumpers applied, which allows for software
control of the clock multiplier via the Options Register. The Options Register powerup
default is for a standard times-1 clock of 1.8432 MHz for compatibility with standard
serial ports.
J1
J2
J3
J4
Factory default
J1
J2
J3
J4
Force times-four clock
Baud rates up to 460.8 kbps
X2
X4
X8
SPAD
X2
X4
X8
SPAD
Figure 4 --- Clock multiplier jumper options
J1
J2
J3
J4
Force times-two clock
J1
J2
J3
J4
Force times-eight clock
Baud rates up to 921.6 kbps
X2
X4
X8
SPAD
X2
X4
X8
SPAD
3 Hardware Installation
Quatech ESC-100 User's Manual
10
1. Turn off the power of the computer system in which the ESC-100 is to be
installed.
2. Remove the system cover according to the instructions provided by the
computer manufacturer.
3. Make any desired optional jumper setting changes.
4. Install the ESC-100 in any empty PCI expansion slot. The board should be
secured by installing the Option Retaining Bracket (ORB) screw.
5. Replace the system cover according to the instructions provided by the
computer manufacturer.
6. Attach and secure the cable connectors to the desired equipment.
7. Turn on the power of the computer system.
The output of the ESC-100D is a 78-pin D-connector. A cable is provided to
convert the D-78 into eight standard male D-25 connectors with all control signals
provided to each port (RTS, DTR, CTS, DSR, DCD, and RI).
The output of the ESC-100M is eight 6-pin RJ-11 connectors. Optional cables are
available to convert the RJ-11s into male D-25 connectors, with customer-configurable
pinouts.
J5
J6
J7
J8
J9
J10
J11
J12
AUXIN/AUXOUT
signal selection
(ESC-100M only)
Clock multiplier/
scratchpad select
J1
J2
J3
J4
Figure 5 --- Jumper/connector locations
X2
X4
X8
SPAD
4 Address Map and Special Registers
Base Address + 48
to
Base Address + 55
Serial 7
Base Address + 40
to
Base Address + 47
Serial 6
Base Address + 16
to
Base Address + 23
Serial 3
Base Address + 8
to
Base Address + 15
Serial 2
I/O Address Range
Port
Quatech ESC-100 User's Manual
11
This chapter explains how the eight UARTs and special registers are addressed,
as well as the layout of those registers. This material will be of interest to programmers
writing driver software for the ESC-100.
4.1 Base Address and Interrupt Level (IRQ)
The base address and IRQ used by the ESC-100 are determined by the BIOS or
operating system. Each serial port uses 8 consecutive I/O locations. The eight ports
reside in a single block of I/O space in eight-byte increments, for a total of 64
contiguous bytes, as shown in Figure 6.
Base Address + 0to Base Address + 7Serial 1
Base Address + 24 to Base Address + 31Serial 4
Base Address + 32 to Base Address + 39Serial 5
Base Address + 56 to Base Address + 63Serial 8
Figure 6 --- Port Address Map
All eight serial ports share the same IRQ. The ESC-100 signals a hardware
interrupt when any port requires service. The interrupt signal is maintained until no
port requires service. Interrupts are level-sensitive on the PCI bus.
The base address and IRQ are automatically detected by the device drivers
Quatech supplies for various operating systems. For cases where no device driver is
available, such as for operation under DOS, Quatech supplies the "QTPCI" DOS
software utility for manually determining the resources used. See page 16 for details.
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