ES-100
User's Manual
Version 2.00
October 1994
P/N. 940-0019-200
WARRANTY INFORMATION
Quatech Inc. warrants the ES-100M / QS-100M to be free of
defects for one (1) year
repair or replace any adapter that fails to perform under normal operating
conditions and in accordance with the procedures outlined in this
document during the warranty period. Any damage that results from
improper installation, operation, or general misuse voids all warranty
rights.
The authors have taken due care in the preparation of this
document and any associated software program(s). In no event will
Quatech Inc. be liable for damages of any kind, incidental or
consequential, in regard to or arising out of the performance or form of
the materials presented herein and in the program(s) accompanying this
document. No representation is made regarding the suitability of this
product for any particular purpose.
Quatech Inc. reserves the right to edit or append to this document
or the product(s) to which it refers at any time and without notice.
from the date of purchase. Quatech Inc. will
Please complete the following information and retain for your
records. Have this information available when requesting warranty
service.
II. Installation2
III. Addressing Ports5
IV. Interrupt Level (IRQ)8
Interrupt Sharing8
Interrupt Status Register8
V. External Connections10
Channel Output Configuration11
VI. Serial Port Functional Description14
Accessing the Serial Port Registers15
Interrupt Enable Register16
Interrupt Identification Register16
FIFO Control Register18
Line Control Register19
Modem Control Register20
Line Status Register21
Modem Status Register22
Scratchpad Register22
FIFO Interrupt Mode Operation23
FIFO Polled Mode Operation24
Baud Rate Selection25
VII. Serial Port Functional Description27
VIII. Troubleshooting28
LIST OF FIGURES
Figure1.Default address and IRQ settings2
Figure2.Diagram of QS-100M / ES-100M3
Figure3.Port address map5
Figure4.Examination of a serial port base address6
Figure5.Serial port base I/O address selection switches7
Figure6.Interrupt level (IRQ) selection8
Figure7.Enabling the Interrupt Status Register9
Figure8.Interrupt Status Register contents9
Figure9.Use of DTEs and DCEs in a communications link10
Figure 10.Cabling requirements for RS-232-C devices10
Figure 11.QS-100M / ES-100M connector definitions11
Figure 12.QS-100M / ES-100M output connectors11
Figure 13.Auxiliary signal configuration jumpers12
Figure 14.Output connector configuration13
Figure 15.Serial port register address map for 16450/1655015
Figure 16.Interrupt Enable Register bit definitions16
Figure 17.Interrupt Identification Register bit definitions17
Figure 18.Interrupt Identification Register bit decoding17
Figure 19.16550 FIFO Control Register bit definitions18
Figure 20.Line Control Register bit definitions19
Figure 21.Modem Control Register bit definitions20
Figure 22.Line Status Register bit definitions21
Figure 23.Modem Status Register bit definitions22
Figure 24.Input clock frequency options25
Figure 25.Divisor latch settings for common baud rates26
I.GENERAL INFORMATION
The Quatech, Inc. ES-100M provides eight RS-232 asynchronous
serial communication interfaces for IBM-compatible personal computer
systems using the 16-bit ISA (Industry Standard Architecture) expansion
bus. The QS-100M is a four-port version of the same product (with
several blank areas on the circuit card). External connections are made
using RJ-11 "phone jack" connectors. This document uses "QS/ES-100M"
when information applies to either product.
The QS/ES-100M's serial ports are implemented using 16450
Universal Asynchronous Receiver/Transmitters (UARTs). For higher
performance, 16550 UARTs can be installed in place of the 16450 UARTs.
The 16550 contains a hardware buffer that reduces processing overhead.
Software must be aware of the 16550 UART for the device's extra
capabilities to be used, otherwise it will act as a 16450 UART. The 16550 is
suggested for multitasking environments and for applications involving
high data rates.
The QS/ES-100M is highly flexible with respect to addressing and
interrupt level use. The serial ports are addressed in a contiguous block
that can be placed anywhere within the range of 0000 hex to FFFF hex,
and available interrupt levels include IRQ2 to IRQ7, IRQ10 to IRQ12,
IRQ14, or IRQ15. (Early versions of the QS/ES-100M are limited to
IRQ2-7.)
All ports on the QS/ES-100M share one interrupt level. A special
interrupt status register is provided to allow controlling software to
manage the shared interrupt level. The shared interrupt feature
minimizes the system resources consumed by the adapter.
In order to support the use of the shared interrupt feature of the
QS/ES-100M, Quatech has developed device drivers for several popular
operating systems and environments. The sales department can be
contacted for details on current offerings.
Quatech QS-100M/ES-100M User's Manual1
II.INSTALLATION
If the default address and interrupt settings are sufficient, the
QS/ES-100M can be quickly installed and put to use. The factory defaults
are listed in Figure 1.
PORTADDRESSIRQ
Serial 1300 hex3
Serial 2308 hex3
Serial 3310 hex3
Serial 4318 hex3
Serial 5 (ES only)320 hex3
Serial 6 (ES only)328 hex3
Serial 7 (ES only)330 hex3
Serial 8 (ES only)338 hex3
Figure 1 --- Default address and IRQ settings for QS/ES-100M
The outputs of the QS/ES-100M are provided with RJ-11
connectors. See section V of this manual for connector details.
1. If the default settings are correct, skip to step 2, otherwise refer to
sections III and IV of this document for detailed information on
how to set the address and IRQ level.
2. Turn off the power of the computer system in which the
QS/ES-100M is to be installed.
3. Remove the system cover according to the instructions provided by
the computer manufacturer.
4. Install the QS/ES-100M in any vacant expansion slot. The board
should be secured by installing the Option Retaining Bracket (ORB)
screw.
5. Replace the system cover according to the instructions provided by
the computer manufacturer.
6. Attach and secure the cable connectors to the desired equipment.
The base address of the QS/ES-100M is set using the two DIP
switch packs. When setting the address selection switches, a switch in the
"ON" position specifies that the corresponding address line must be a
logic 0 for the port to be selected. Similarly, a switch in the "OFF" position
forces the corresponding address line to be a logic 1 for the port to be
selected.
A full sixteen bit address decode is implemented to reduce the
chance of address conflicts with other adapters in the system. The base
address of the QS/ES-100M can be set anywhere in the range of 0000 hex
to FFFF hex. Each serial port on the QS/ES-100M uses 8 consecutive I/O
locations. The ports reside in a contiguous block of I/O space in eight
byte increments, for a total of 32 contiguous bytes in the case of the
QS-100M, or 64 contiguous bytes in the case of the ES-100M. This is
shown in Figure 3.
PORTADDRESS RANGE
Serial 1Base Address + 0to Base Address + 7
Serial 2Base Address + 8to Base Address + 15
Serial 3Base Address + 16 to Base Address + 23
Serial 4Base Address + 24 to Base Address + 31
Serial 5 (ES only)Base Address + 32 to Base Address + 39
Serial 6 (ES only)Base Address + 40 to Base Address + 47
Serial 7 (ES only)Base Address + 48 to Base Address + 55
Serial 8 (ES only)Base Address + 56 to Base Address + 63
Figure 3 --- Port address map
Quatech QS-100M/ES-100M User's Manual5
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