Quatech DSCLP-100 User Manual

DSCLP/SSCLP-100

Two Channel Low Profile RS-232

Asynchronous Communications Adapter

for PCI bus

User's Manual

QUATECH, INC. TEL: [phone]
662 Wolf Ledges Parkway FAX: [phone]
Akron, Ohio 44311 http: //www.quatech.com

? 2002, Quatech, Inc.

NOTICE

The information contained in this document cannot be reproduced in any form
without the written consent of Quatech, Inc. Likewise, any software programs that
might accompany this document can be used only in accordance with any license
agreement(s) between the purchaser and Quatech, Inc. Quatech, Inc. reserves the right
to change this documentation or the product to which it refers at any time and without
notice.

The authors have taken due care in the preparation of this document and every
attempt has been made to ensure its accuracy and completeness. In no event will
Quatech, Inc. be liable for damages of any kind, incidental or consequential, in regard to
or arising out of the performance or form of the materials presented in this document or
any software programs that might accompany this document.

Quatech, Inc. encourages feedback about this document. Please send any
written comments to the Technical Support department at the address listed on the
cover page of this document.

DOS, Windows 95/98/2000/ME , Windows NT are trademarks or registered trademarks of Microsoft
Corporation. OS/2 is a registered trademark of IBM Corporation. All other trademarks or registered

trademarks are property of their respective owners.

iv DSCLP/SSCLP-100 User's Manual

WARRANTY INFORMATION

Quatech, Inc. warrants the DSCLP-100 or SSCLP-100 to be free of defects for
five (5) years from the date of purchase. Quatech, Inc. will repair or replace any board that fails to
perform under normal operating conditions and in accordance with the procedures outlined in this
document during the warranty period. Any damage that results from improper installation, operation, or
general misuse voids all warranty rights.

Please complete the following information and retain for your records. Have this information
available when requesting warranty service.

DATE OF PURCHASE:

MODEL NUMBER: DSCLP-100 or SSCLP-100

PRODUCT DESCRIPTION: Two or One Channel Low Profile RS-232

Asynchronous PCI Bus
Communications Adapter

SERIAL NUMBER:

DSCLP/SSCLP-100 User's Manual i

Declaration of Conformity

Manufacturer's Name: Quatech Inc.

Manufacturer's Address: 662 Wolf Ledges Parkway

Akron, Ohio 44311 (USA)

Application of Council Directive: 89/336/EEC

Standards to which
Conformity is Declared: * EN50081-1 (EN55022,

EN60555-2, EN60555-3)
* EN50082-1 (IEC 801-2,
IEC 801-3, & IEC 801-4)

Type of Equipment: Information Technology

Equipment

Equipment Class: Commercial, Residential, & Light
Industrial

Product Name: PCI Quad Serial Communications

Card

Model Number : DSCLP-100

ii DSCLP/SSCLP-100 User's Manual

Table of Contents

1 General Information
2 Hardware Configuration

2.1 Factory Default Configuration

2.2 Enable Scratchpad Register (SPAD, J2)

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2.3 Force High-Speed UART Clock (X2 or X4, J4-J5)

3 Hardware Installation
4 Address Map and Special Registers

4.1 Base Address and Interrupt Level (IRQ)

4.2 Enabling the Special Registers

4.3 Interrupt Status Register

4.4 Options Register

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4.4.1 Enhanced Serial Adapter Identification

4.4.2 Clock Rate Multiplier

5 Windows Configurations

5.1 Windows Millennium

5.2 Windows 2000

5.3 Windows 98

5.4 Windows 95

5.5 Using the "New Hardware Found" Wizard

5.6 Viewing Resources with Device Manager

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6 Other Operating Systems

6.1 Windows NT

6.2 OS/2

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6.3 DOS and other operating systems

6.3.1 QTPCI.EXE

7 External Connections
8 PCI Resource Map
9 Specifications
10 Troubleshooting

DSCLP/SSCLP-100 User's Manual iii

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1 General Information

The Quatech, Inc. DSCLP-100 (two-port) and SSCLP-100 (one-port)
provides upto two RS-232 asynchronous serial communication interfaces for Low
Profile IBM-compatible personal computer systems using the PCI expansion bus. The
DSCLP-100 uses Quatech's new Enhanced Serial Adapter design. Legacy serial port
data rates are limited to a maximum of 115,200 bits per second. This discussion relates
to DSCLP-100. A SSCLP-100 is just one port in the discussion.

As a PCI device, the DSCLP-100 requires no hardware configuration. The
card is automatically configured by the computer's BIOS or operating system. The two
serial ports share a single interrupt line and are addressed in a contiguous block of 16
bytes. A special interrupt status register is provided to help software to manage the
shared interrupt.

The DSCLP-100's serial ports are implemented using 16550 Universal
Asynchronous Receiver/Transmitters (UARTs). These UARTs contain hardware
buffers (FIFOs) which reduce processing overhead and allow higher data rates to be
achieved.

The DSCLP-100 is supported under several popular operating systems and
environments. Contact the sales department for details on current software offerings.
Most device drivers are available for download from the Quatech world wide web site
at http://www.quatech.com.

DSCLP/SSCLP-100 User's Manual 1

2 Hardware Configuration

The DSCLP-100 is automatically configured at boot time by the computer's
BIOS or operating system. There are no required switches or jumpers to set for
installation.

This chapter lists a number of optional jumper settings that control various
hardware features. Jumpers J2, J4-J5 are grouped together at the end of the board
opposite the HD-44 connector. Any changes from the factory default should be made
before installing the DSCLP-100 in the computer.

2.1 Factory Default Configuration

Figure 2 shows the jumper configuration as shipped from the factory, with two
spare jumpers applied in neutral positions. Remove one or both and apply as shown in
following sections to set optional features.

J2

J4

J5

SPAD

X4
X2

Figure 2 --- Factory default jumper configuration

2.2 Enable Scratchpad Register (SPAD, J2)

In the default configuration, an Interrupt Status Register and an Options Register
(see page 0) replace the scratchpad (base address + 7) of each UART. If the SPAD
jumper is applied as in Figure 3, the UART scratchpad registers are enabled, and the
Interrupt Status Register and the Options Register are not available.

J2

J4

SPAD

X4

J5

X2

Figure 3 --- Enable scratchpad registers

2.3 Force High-Speed UART Clock (X2 or X4, J4-J5)

2 DSCLP/SSCLP-100 User's Manual

These jumpers force an increase of the UART input clock frequency by a factor

Baud rates up to 230.4 kbps

software control

of two or four. This feature can allow legacy software to use baud rates above
115,200 bits per second. It is also useful if the serial port device driver does not
directly support setting the higher baud rates through the Options Register (see page 0).

If one of these jumpers is applied, it overrides any value written to the Options
Register to set the clock multiplier by software. The effective baud rate will be either
two or four times the value for which the UART itself is programmed.

The factory default is none of these jumpers applied, which allows for software
control of the clock multiplier via the Options Register. The Options Register powerup
default is for a standard times-1 clock of 1.8432 MHz for compatibility with standard
serial ports.

Figure 4 --- Clock multiplier jumper options

J2

J4

J5

Factory default

J2

J4

J5

Force times-four clock

Baud rates up to 460.8 kbps

SPAD

X4

X2

SPAD

X4

X2

J2

J4

J5

Force times-two clock

SPAD

X4

X2

DSCLP/SSCLP-100 User's Manual 3

3 Hardware Installation

1. Turn off the power of the computer system in which the DSCLP-100 is to be
installed.

2. Remove the system cover according to the instructions provided by the
computer manufacturer.

3. Make any desired optional jumper setting changes.

4. Install the DSCLP-100 in any empty PCI expansion slot. The board should be
secured by installing the Option Retaining Bracket (ORB) screw.

5. Replace the system cover according to the instructions provided by the
computer manufacturer.

6. Attach and secure the cable connectors to the desired equipment.

7. Turn on the power of the computer system.

The output of the DSCLP-100 is a 25-pin D-connector. A cable is provided

to convert the D-25 into two standard male D-9 connectors with all control signals
provided to each port (RTS, DTR, CTS, DSR, DCD, and RI).

Clock multiplier/
scratchpad select

J2

J4

J5

SPAD

X4

X2

Figure 5 --- Jumper/connector locations

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