5
4
3
2
1
BOM
ZYW ULT SYSTEM BLOCK DIAGRAM
Dual Channel DDR III
DDR3L-SODIMM CHA
D D
DDR3L-SODIMM CHB
SATA - HDD1
SATA ODD
U19
DIS: SLG3NB3454 AL003454000
UMA: SLG3NB3455 AL003455002
NGFF
I/O board (card reader+LED)
Cardreader
CONN. 2in 1
C C
P29
GL834L
(cardreader)
CCD(Camera)
Touch Screen(option)
P30
P25
P25
I/O board
I/O Board Conn.USB2 IO*2
P30
P14
P15
P28
P28
P27
1333/1600 MHZ
SATA2/PCIE6_L1
SATA3/PCIE6_L0
USB2.0-port7
USB2.0-port6
USB2.0-port5
USB2.0-port2,3
P8
BATTERY
Azalia
SATA0
SATA1
Haswell ULT 15W
MCP 1168pins
IMC
DC+GT3
40 mm X 24 mm
SATA
Integrated PCH
USB2.0
RTC
IHDA
LPC
P2~P13
PCI-E x4
TX/RX
eDP
USB3.0/2.0
CLK
PCI-E x1
CLK
SPI
I2C
DP
PCIE-5
EDP
DDI2
DDI1
USB3.0-port1,2
USB2.0-port0,1
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM
8M
GPU
N15S-GT (GeForce 840M)
N15V-GM (GeForce 820M)
P16~P20
RTD2136N
P24
ITE6513
P23
X'TAL 27MHz
P8
I2C
LVDS Conn.
eDP Conn.
VGA Conn.
HDMI Conn.
PCIE-port4
PCIE-port3
X'TAL 27MHz
USB3 Port X2
MB side
MINI CARD
WLAN+BT
RTL8111GS-CG
10/100/1G
VRAM
P25
P25
P26
P26
DDR3
P30
P27
P29
X'TAL 25MHz
P21,P22
IV@ : iGPU
EV@ : Optimus
eDP@ : no stuff when use LVDS
LVD@: stuff when use LVDS
TPM@ : TPM
8M@ :8M FLASH ROM
RD@ : Re-driver SATA
NF@ : NGFF card
USB2.0-port4
RJ45
P29
01
P23
EC
IT8587
FAN
PWM
P32
P33
PS2
Touch PAD
P32
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
ZYW
ZYW
ZYW
3A
3A
1 46Tuesday, April 29, 2014
1 46Tuesday, April 29, 2014
1 46Tuesday, April 29, 2014
3A
B B
D-MIC
Int. D-MIC
P30
Global Jack
A A
5
ALC283
AUDIO CODEC
P30 P30
P31
Speaker*2
K/B Con.
P31
4
HALL SENSOR
5
4
3
2
1
Haswell ULT (DISPLAY,eDP)
U33A
HSW_ULT_DDR3L
02
D D
MI
HD
T
CR
C C
B B
INT_HDMITX2N26
INT_HDMITX2P26
INT_HDMITX1N26
INT_HDMITX1P26
INT_HDMITX0N26
INT_HDMITX0P26
INT_HDMICLK-26
INT_HDMICLK+26
CRT_TXN023
CRT_TXP023
CRT_TXN123
CRT_TXP123
PCH_BRIGHT24,25
PCH_BLON25,33
EDP_VDD_EN25
TP95
BOARD_ID410
BOARD_ID110
BOARD_ID210
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#
TPD_INT#_D
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
AD4
B8
A9
C6
U6
P4
N4
N2
U7
L1
L3
R5
L4
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
U33I
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
+3V
GPIO55
+3V
GPIO52
+3V
GPIO54
+3V
GPIO51
+3V
GPIO53
eDP SIDEBAND
+3V
+3V
+3V
+3V
+3V_S5
PCIE
1 OF 19
HSW_ULT_DDR3L
9 OF 19
EDPDDI
DISPLAY
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_AUXN
EDP_AUXP
EDP_RCOMP
CRT_CLK
CRT_DATA
CRT_AUX#_C
CRT_AUX_C
R194
100K_4
EDP_TXN0 24
EDP_TXP0 24
EDP_TXN1 24
EDP_TXP1 24
EDP_AUXN 24
EDP_AUXP 24
R269 24.9/F_4
R630 *0_4
R631 *0_4
HDMI_DDCCLK_SW 26
HDMI_DDCDATA_SW 26
C551 *short_4
C549 *short_4
INT_HDMI_HPD 26
CRT_HPD 23
EDP_HPD 24,25
R244
4.7K_4
PCH_BRIGHTDP_UTIL
CRT_AUXN 23
CRT_AUXP 23
eDP Panel
+VCCIOA_OUT
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
CRT_CLK
CRT_DATA
TPD_INT#_D
CRT_AUXN
CRT_AUXP
R185 10K_4
R562 10K_4
R183 10K_4
R198 10K_4
R559 10K_4
R195 2.2K_4
R196 2.2K_4
R171 100K_4
+3V
+3V
R582 *100K_4
R579 *100K_4
+3V
2
TPD_INT#32,33
A A
5
Q26
3
2N7002K
1
4
TPD_INT#_D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
3
Tuesday, April 29, 2014
2
PROJECT :
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
ZYW
ZYW
ZYW
2 46
2 46
2 46
1
3A
3A
3A
5
4
3
2
1
Haswell ULT (DDR3L) Haswell Processor (DDR3)
U33C
AH63
M_A_DQ014
M_A_DQ114
M_A_DQ214
M_A_DQ314
M_A_DQ414
D D
C C
M_A_DQ514
M_A_DQ614
M_A_DQ714
M_A_DQ814
M_A_DQ914
M_A_DQ1014
M_A_DQ1114
M_A_DQ1214
M_A_DQ1314
M_A_DQ1414
M_A_DQ1514
M_B_DQ015
M_B_DQ115
M_B_DQ215
M_B_DQ315
M_B_DQ415
M_B_DQ515
M_B_DQ615
M_B_DQ715
M_B_DQ815
M_B_DQ915
M_B_DQ1015
M_B_DQ1115
M_B_DQ1215
M_B_DQ1315
M_B_DQ1415
M_B_DQ1515
M_A_DQ1614
M_A_DQ1714
M_A_DQ1814
M_A_DQ1914
M_A_DQ2014
M_A_DQ2114
M_A_DQ2214
M_A_DQ2314
M_A_DQ2414
M_A_DQ2514
M_A_DQ2614
M_A_DQ2714
M_A_DQ2814
M_A_DQ2914
M_A_DQ3014
M_A_DQ3114
M_B_DQ1615
M_B_DQ1715
M_B_DQ1815
M_B_DQ1915
M_B_DQ2015
M_B_DQ2115
M_B_DQ2215
M_B_DQ2315
M_B_DQ2415
M_B_DQ2515
M_B_DQ2615
M_B_DQ2715
M_B_DQ2815
M_B_DQ2915
M_B_DQ3015
M_B_DQ3115
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HSW_ULT_DDR3L
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQS#0
M_A_DQS#1
M_B_DQS#0
M_B_DQS#1
M_A_DQS#2
M_A_DQS#3
M_B_DQS#2
M_B_DQS#3
M_A_DQS0
M_A_DQS1
M_B_DQS0
M_B_DQS1
M_A_DQS2
M_A_DQS3
M_B_DQS2
M_B_DQS3
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
M_A_CLK0# 14
M_A_CLK0 14
M_A_CLK1# 14
M_A_CLK1 14
M_A_CKE0 14
M_A_CKE1 14
M_A_CS#0 14
M_A_CS#1 14
TP38
M_A_RAS# 14
M_A_WE# 14
M_A_CAS# 14
M_A_BS#0 14
M_A_BS#1 14
M_A_BS#2 14
M_A_A[15:0] 14
M_A_DQS#0 14
M_A_DQS#1 14
M_B_DQS#0 15
M_B_DQS#1 15
M_A_DQS#2 14
M_A_DQS#3 14
M_B_DQS#2 15
M_B_DQS#3 15
M_A_DQS0 14
M_A_DQS1 14
M_B_DQS0 15
M_B_DQS1 15
M_A_DQS2 14
M_A_DQS3 14
M_B_DQS2 15
M_B_DQS3 15
U33D
AY31
M_A_DQ3214
M_A_DQ3314
M_A_DQ3414
M_A_DQ3514
M_A_DQ3614
M_A_DQ3714
M_A_DQ3814
M_A_DQ3914
M_A_DQ4014
M_A_DQ4114
M_A_DQ4214
M_A_DQ4314
M_A_DQ4414
M_A_DQ4514
M_A_DQ4614
M_A_DQ4714
M_B_DQ3215
M_B_DQ3315
M_B_DQ3415
M_B_DQ3515
M_B_DQ3615
M_B_DQ3715
M_B_DQ3815
M_B_DQ3915
M_B_DQ4015
M_B_DQ4115
M_B_DQ4215
M_B_DQ4315
M_B_DQ4415
M_B_DQ4515
M_B_DQ4615
M_B_DQ4715
M_A_DQ4814
M_A_DQ4914
M_A_DQ5014
M_A_DQ5114
M_A_DQ5214
M_A_DQ5314
M_A_DQ5414
M_A_DQ5514
M_A_DQ5614
M_A_DQ5714
M_A_DQ5814
M_A_DQ5914
M_A_DQ6014
M_A_DQ6114
M_A_DQ6214
M_A_DQ6314
M_B_DQ4815
M_B_DQ4915
M_B_DQ5015
M_B_DQ5115
M_B_DQ5215
M_B_DQ5315
M_B_DQ5415
M_B_DQ5515
M_B_DQ5615
M_B_DQ5715
M_B_DQ5815
M_B_DQ5915
M_B_DQ6015
M_B_DQ6115
M_B_DQ6215
M_B_DQ6315
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HSW_ULT_DDR3L
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
M_B_ODT0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_A_DQS#4
M_A_DQS#5
M_B_DQS#4
M_B_DQS#5
M_A_DQS#6
M_A_DQS#7
M_B_DQS#6
M_B_DQS#7
M_A_DQS4
M_A_DQS5
M_B_DQS4
M_B_DQS5
M_A_DQS6
M_A_DQS7
M_B_DQS6
M_B_DQS7
M_B_CLK0# 15
M_B_CLK0 15
M_B_CLK1# 15
M_B_CLK1 15
M_B_CKE0 15
M_B_CKE1 15
M_B_CS#0 15
M_B_CS#1 15
TP39
M_B_RAS# 15
M_B_WE# 15
M_B_CAS# 15
M_B_BS#0 15
M_B_BS#1 15
M_B_BS#2 15
M_B_A[15:0] 15
M_A_DQS#4 14
M_A_DQS#5 14
M_B_DQS#4 15
M_B_DQS#5 15
M_A_DQS#6 14
M_A_DQS#7 14
M_B_DQS#6 15
M_B_DQS#7 15
M_A_DQS4 14
M_A_DQS5 14
M_B_DQS4 15
M_B_DQS5 15
M_A_DQS6 14
M_A_DQS7 14
M_B_DQS6 15
M_B_DQS7 15
03
B B
3 OF 19
A A
5
4
3
4 OF 19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
2
Tuesday, April 29, 2014
PROJECT :
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
ZYW
ZYW
ZYW
3A
3A
3 46
3 46
1
3 46
3A
5
4
3
2
1
04
H_PECI (50ohm)
Route on microstrip only
D D
C C
Spacing >18 mils
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
H_PECI33
H_PROCHOT#33,34,38
TP111
TP118
R670 56_4
SM_RCOMP[0:2]
Trace length < 500 mils
Trace width = 12~15 mils
Trace spacing = 20 mils
PROC_DETECT
CATERR#
H_PECI
H_PROCHOT#_RH_PROCHOT#
H_PWRGOOD_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
DDR_PG_CTRL
Haswell ULT (SIDEBAND)
THERMAL
DDR3L
DSW
HSW_ULT_DDR3L
MISC
JTAG
PWR
2 OF 19
D61
K61
N62
K63
C61
AU60
AV60
AU61
AV15
AV61
U33B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
J62
XDP_PRDY#
K62
XDP_PREQ#
E60
XDP_TCK0
E61
XDP_TMS_CPU
E59
XDP_TRST#
F63
XDP_TDI_CPU
F62
XDP_TDO_CPU
J60
XDP_BPM#0
H60
XDP_BPM#1
H61
XDP_BPM#2
H62
XDP_BPM#3
K59
XDP_BPM#4
H63
XDP_BPM#5
K60
XDP_BPM#6
J61
XDP_BPM#7CPU_DRAMRST#
TP151
TP152
XDP_TCK0 8,13
TP157
XDP_TRST# 8,13
TP156
XDP_TDO_CPU 13
TP149
TP150
TP122
TP129
TP54
TP117
TP113
TP60
TCK,TMS
Trace Length < 9000mils
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
B B
DRAM COMP
R295 200/F_4
R296 120/F_4
R297 100/F_4
PU/PD of CPU
H_PROCHOT#
A A
H_PWRGOOD_R
R671 *62_4
R672 62_4
R647 10K_4
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
5
+VCCIO_OUT
+1.05V_VCCST
DRAMRST
CPU DRAM
CPU_DRAMRST#
+1.35V_SUS
12
4
XDP_TDO_CPU
XDP_TCK0
XDP_TRST#
470_4
R657 51_4
R312 51_4
R680 *51_4
R252 *short_4
+1.05V_VCCST
12
C249
*0.1u/10V_4
DDR3_DRAMRST# 14,15
3
DDR3L ODT GENERATIONXDP PU/PD
+5V_S5 +3VSUS
12
R273
220K/F_4
DDR_VTTT_PG_CTRL37
R777
*220K/F_4
2
12
+1.35V_SUS
3
2
1
+1.35V_SUS
U12
5
VCC
12
C268
0.1u/10V_4
4
Y
74AUP1G07GW
R286 66.5/F_4
Q24
2N7002K
R284 66.5/F_4
R626 66.5/F_4R251
R621 66.5/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
1
NC
2
A
GND
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
R267 *short_4
3
M_A_ODT0_DIMM 14
M_A_ODT1_DIMM 14
M_B_ODT0_DIMM 15
M_B_ODT1_DIMM 15
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZYW
ZYW
ZYW
4 46
4 46
4 46
DDR_PG_CTRL
3A
3A
3A
5
4
3
2
1
VCCST PWRGD
CRB is via +1.05V PG
+1.05V_VCCST
R342
D D
+1.35V_SUS
C C
+1.05V_VCCST
B B
R292 *short_8
R294 *short_8
C304
C305
10u/6.3V_6
C301
2.2u/6.3V_6
C320
10u/6.3V_6
C312
2.2u/6.3V_6
10u/6.3V_6
+
C293
*470u/2V_7343
ZYW
+VCC_CORE
VCC_SENSE38
R645 *10K_4
VRON_CPU IMVP_PWRGD
R646 10K_4
+1.05V_VCCST
+1.05V_VCCST+1.05V
R265 *short_8
C272
*4.7u/6.3V_6
+1.35V_CPU 1.4A
+1.35V_CPU
C303
10u/6.3V_6
C306
2.2u/6.3V_6
R666 100/F_4
R674 *short_4
300mA
+VCCIO_OUT
300mA
+VCCIOA_OUT
VCCST_PWRGD13
VRON_CPU38
IMVP_PWRGD10,38
R313 150_6
C325
10u/6.3V_6
C292
2.2u/6.3V_6
+VCC_CORE
TP120
TP44
C284
10u/6.3V_6
TP63
TP45
TP33
TP32
TP35
TP69
TP50
TP51
TP52
TP57
TP64
TP67
TP43
TP53
TP68
TP61
TP47
TP59
TP49
+VCC_CORE
ULT_RVSD_61
ULT_RVSD_62
ULT_RVSD_63
ULT_RVSD_64
VCC_SENSE_R
ULT_RVSD_65
ULT_RVSD_66
ULT_RVSD_67
ULT_RVSD_68
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
PWR_DEBUG_R
ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72
ULT_RVSD_73
ULT_RVSD_74
ULT_RVSD_75
ULT_RVSD_76
ULT_RVSD_77
ULT_RVSD_78
ULT_RVSD_79
ULT_RVSD_80
ULT_RVSD_81
+1.05V_VCCST
Haswell ULT (POWER)
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U33L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
+
C588
*470u/2V_7343
C287
22u/6.3V_8
C317
22u/6.3V_8
C289
22u/6.3V_8
C339
22u/6.3V_8
C333
*22u/6.3V_8
C297
22u/6.3V_8
C314
22u/6.3V_8
C279
22u/6.3V_8
C298
22u/6.3V_8
C338
*22u/6.3V_8
C336
22u/6.3V_8
C288
22u/6.3V_8
C299
22u/6.3V_8
C345
22u/6.3V_8
C316
*22u/6.3V_8
C340
22u/6.3V_8
C327
22u/6.3V_8
C329
22u/6.3V_8
C280
22u/6.3V_8
C331
*22u/6.3V_8
ZYW
VCC Output Decoupling Recommendations
470uFx4 7343
22uFx8
22uFx11
10uFx11
TOP socket side
4 on TOP, 4 on BOT near socket edge
0805
0805
TOP, inside socket cavity
0805
BOT, inside socket cavity
+VCCIN 32A
C330
22u/6.3V_8
C342
22u/6.3V_8
C592
22u/6.3V_8
C328
22u/6.3V_8
C324
*22u/6.3V_8
+VCC_CORE
C315
22u/6.3V_8
C341
22u/6.3V_8
C278
22u/6.3V_8
C286
22u/6.3V_8
C296
*22u/6.3V_8
VCCST_PWRGD
SVID
H_CPU_SVIDDAT
H_CPU_SVIDART#
10K_4
R338 *short_4
C383
*0.1u/10V_4
R337 *0_4
74AUP1G07GW
A Y
L
L
H
Z
VCCST_PWRGD_EN
1A-6 2013/10/21 Del APWORK.
+VCCIO_OUT
R682
*130/F_4
Place PU resistor
close to CPU
Place PU resistor
close to CPU
+3V_S5
C367
0.1u/10V_4
VCCST_PWRGD_R
HWPG_1.05V_EC
B-stage DNP
R356 *short_4
R355 *0_4
R318 *0_8
Layout note: need routing together
and ALERT need between CLK and DATA.
+1.05V_VCCST
R681
130/F_4
R683 *short_4
R673 43_4
5
4
Q32
*2N7002K
+VCCIO_OUT+1.05V
+1.05V_VCCST
U16
NC
VCC
A
GND
Y
74AUP1G07GW
3
Reserve from EC
2
1
PCH_PWROK 7,33
EC_PWROK 7,33
C359
*4.7u/6.3V_6
+VCCIO_OUT
R689
75_4
05
1
2
VCCST_PWRGD_EN
3
HWPG_1.05V_EC# 33
VR_SVID_DATA 38
R684
*75_4
VR_SVID_ALERT# 38
HWPG_1.05V for DDR=1.5V
+3V
A A
C378
*1000p/50V_4
2
Q34
1 3
*MMBT3904-7-F
+1.05V
R340 *4.7K_4
5
R328
*4.7K_4
C369
*1000p/50V_4
+3V
R320
*4.7K_4
HWPG_1.05V 33
2
Q30
1 3
*DTC144EU
R321
*100K/F_4
10/30 reserve
DDR=1.5V ,This block POP
4
3
2
H_CPU_SVIDCLK
R685 *short_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
PROJECT :
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
1
VR_SVID_CLK 38
ZYW
ZYW
ZYW
5 46
5 46
5 46
3A
3A
3A
5
4
3
2
1
Haswell ULT (CFG,RSVD)
U33S
HSW_ULT_DDR3L
06
D D
C C
TP97
CFG013
CFG113
CFG313
CFG48,13
CFG813
CFG913
CFG1013
R660 49.9/F_4
R597 8.2K_4
CFG_RCOMP
REFPKG_OCC
CFG0
CFG1
CFG3
CFG4
CFG8
CFG9
CFG10
TD_IREF
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
AA62
U63
AA61
U62
V63
J20
H18
B12
A5
E1
D1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RESERVED
PROC_OPI_RCOMP
19 OF 19
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
OPI_COMP1
R599 49.9/F_4
Processor Strapping
1 0
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
B B
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
CFG 8
ALLOW THE USE OF NOA ON LOCKED UNITS
(DEFAULT) NORMAL OPERATION; NO STALL
(DEFAULT) NORMAL OPERATION
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT
DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS
STALL
PCH-LESS MODE
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT
CFG0
CFG1
CFG3
CFG8
R306 *1K_4
R688 *1K_4
R687 *1K_4
R686 *1K_4
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
A A
CFG10
SAFE MODE BOOT
5
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
POWER FEATURES ACTIVATED
DURING RESET
4
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
3
CFG9
CFG10
R676 *1K_4
R307 *1K_4
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
PROJECT :
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
1
ZYW
ZYW
ZYW
6 46
6 46
6 46
3A
3A
3A
5
4
3
2
1
Haswell ULT PCH (PM)
PCH_SUSACK#33
D D
SYS_PWROK
EC_PWROK
PCH_SUSPWARN#33
DNBSWON#33
ACPRESENT34
RSMRST#33
PCH_SUSPWRACK
SYS_RESET#13
R516 *short_4
R508 *0_4
R517 *0_4
R514 *0_4
R513 *0_4
C545 *1u/6.3V_4
R498 *0_4
R497 *0_4
R209 *short_4
R499 *short_4
R139 *short_4
R175 *short_4
TP93
TP91
SUSACK#_R
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PCI_PLTRST#
PCH_RSMRST#
PCH_SUSPWRACK
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_SLP_S0#_R
PCH_SLP_WLAN#
U33H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
AW6
AV4
AL7
AJ8
AN4
AF3
AM5
+3V_S5
PLTRST
RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
PWRBTN
ACPRESENT/GPIO31
BATLOW/GPIO72
SLP_S0
SLP_WLAN/GPIO29
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
+3V
+3V_S5
+3V_S5
DSW
DSW
DSW
DSW
+3V_S5
DSW
+3V_S5
DSWVRMEN
DPWROK
DSW
CLKRUN/GPIO32
SUS_STAT/GPIO61
DSW
DSW
DSW
DSW
DSW
WAKE
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
AW7
DSWVREN
AV5
DPWROK_R
AJ5
PCIE_LAN_WAKE#
V5
CLKRUN#
AG4
LPCPD#
AE6
PCH_SUSCLK
AP5
AJ6
SUSC#
AT4
SUSB#
AL5
AP4
PCH_SLP_SUS#
AJ7
PCH_SLP_LAN#
Deep Sx
R207 *0_4
TP25
DSWVREN 8
DPWROK 33
PCIE_LAN_WAKE# 27,29
CLKRUN# 23,33
LPCPD# 23
PCH_SUSCLK 27
SUSC# 13,33
SUSB# 13,33
PCH_SLP_SUS# 33
07
R489
10K_4
3
7 46
7 46
7 46
1
+3V_S5
APWROK_R
3A
3A
3A
8 OF 19
C C
PCH PM PU/PD
+3V
CLKRUN#
SYS_RESET#
B B
A A
PCH_RSMRST#
SYS_PWROK
DPWROK_R
PCH_SUSPWRACK
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#
R172 8.2K_4
R533 10K_4
R210 10K_4
R509 *10K_4
R204 100K/F_4
+3V_S5
R490 *10K_4
+3V_S5
R191 10K_4
R536 8.2K_4
R133 1K_4
R142 *10K_4
+3VPCU
R176 *10K_4
R520 *8.2K_4
R156 *1K_4
R143 *10K_4
5
DSW PU
Power Sequence
PCH_PWROK5,33
R211
100K_4
EC_PWROK SYS_PWROK_R
R217 *short_4
R537 *0_4
R205 0_4
Non Deep Sx
EC_PWROK_R
DPWROK_RRSMRST#
PLTRST# Buffer Deep Sx Circuit
+3V
PCI_PLTRST#
2
1
3 5
C185 0.1u/10V_4
4
U9
TC7SH08FU
R130
100K_4
PLTRST# 13,16,23,27,29,30,33
+3V_S5 +3VCC_S5
*0.33u/10V_6
SYSPWOK
+3V_S5
C381 *0.1u/10V_4
2
SYS_PWROK13
4
SYS_PWROK
4
U18
TC7SH08FU
3 5
R345 *0_4
EC_PWROK
1
3
EC_PWROK 5,33
IMVP_PWRGD_3V 10
R350
10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
2
Tuesday, April 29, 2014
APWORK33
Speed up 250ms to boot up
for EC power on 250 ms
C375
PCH_SLP_SUS#
LPCPD#
R553 *10K_4
R486 *short_4
Non Deep Sx
R335 0_6
1
R330
*100K_4
2
Q31
*2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
2
3
1
Q33
*AO3413
R327
*0_6
ZYW
ZYW
ZYW
RTC Clock 32.768KHz (RTC)
C196 15p/50V_4
C195 15p/50V_4
RTC Circuitry (RTC)
D D
R182 *s hort_6
+3VPCU
R181 1K _4
VCCRTC_2
+3V_RTC_[0:2]
Trace width = 20 mils
12
BT6
BAT_CONN
RTC CR2032 Coi n Battery
DBV: AHL030030 57
VDE: AHL030030 03
HDA
PCH_AZ_CODEC_RST#31
PCH_AZ_CODEC_SDOUT31
PCH_AZ_CODEC_BITCLK31
C C
PCH_AZ_CODEC_SYNC31
PCH JTAG
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
XDP_TMS
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
XDP_TCK1
B B
ULT Strapping Table
Pin Name Strap description
GPIO81(SPKR)
HDA_SDO
INTVRMEN
GPIO66
GPIO86
GPIO15
A A
CFG4
DSWVREN
5
Y8
32.768KHZ
+3V_RTC
D10
BAT54C
R245 33_ 4
R234 33_ 4
R231 33_ 4
C227
*10p/50V_4
R247 33_ 4
C242 *10p/50V_4
RTC_X1
R197
10M_4
RTC_X2
+3V_RTC
Trace width = 30 mils
R165
20K/F_4
C193
1u/6.3V_4
R164
20K/F_4
C188
C187
1u/6.3V_4
1u/6.3V_4
+3V_RTC_2
+3V_RTC_1
12
MP remove(Intel)
R691 51_4
R677 51_4
R679 51_4
R678 *1K_4
R693 *51_4
No reboot on TCO Timer
expiration
Flash Descriptor Security
Override / Intel ME Debug Mode
+1.05V_S5
Integrated 1.05V VRM enable ALWAYS
Top-Block Swap override
Boot BIOS Strap Bit
TLS(Transport layer security)
DP presence strap
Deep Sx well on die VR enable
5
RTC_RST#
12
J7
*JUMP
SRTC_RST#
12
J6
*JUMP
HDA_RST#_R
HDA_SDO_R
HDA_BCLK_R
HDA_SYNC_R
Sampled
PWROK
PWROK
R218 1M_4
+3V_RTC
RTC_RST#13
PCH_AZ_CODEC_SDIN031
XDP_TRST#4,13
XDP_TCK113
XDP_TDI13
TP153
XDP_TMS13
R695 *short_4
XDP_TCK04,13
TP87
Configuration note
0 = Default enable (iPD 20K)
1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K)
1 =can't program ME
1=Should be always pull-up
0 = Default disable (iPD 20K)
1 = Enable TBS function
0 = Default SPI (iPD 20K)
1 =LPC
0 = Default enable w/o
confidentiality(iPD 20K)
1 =Default enable with
confidentiality
0 = Enable an external display
port is connected to the eDP
1 =disable
1=Should be always pull-up
4
Haswell ULT PCH (RTC/HDA/SATA/SPI)
HSW_ULT_DDR3L
RTC
AUDIO SATA
SATA2 PCIE6_L1
SATA3 PCIE6_L0
JTAG
5 OF 19
AKE3EFP0N07 Winbond W25Q64FVSSIQ
AKE3EZN0Q01 EON
SPKR
R233 *short_4
PCH_INTVRMEN
GPIO66
GPIO86
GPIO15
CFG46,13
DSWVREN
R227 *33 0K_4
R162 *1K _4
R136 *1K _4
R202 *1K _4
CFG4
R690 1K _4
R225 *33 0K_4
+3V
+3V
+3V
+3V
GD
SPKR 10,31
ME_WR# 33
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
EN25QH64-104HIP
GD25B64BSIGRAKE3EGN0Q01
RTC_X1
RTC_X2
SM_INTRUDER#
PCH_INTVRMEN
RTC_RST#
HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R
HDA_SDO_R
XDP_TCK1
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
PCH_EDM
4
U33E
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
+3V
+3V_RTC
+3V
+3V
+3V_S5
DSWVREN7
+3V_RTC
R549 *1K _4
HDA_SDO_R
R228 330K _4
GPIO6610
R147 *1K _4
GPIO8610
R128 *1K_4
GPIO1510
R188 8.2K _4
R226 330K _4
3
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED
3
J5
SATA_RXN_1ST_HDD#
H5
SATA_RXP_1ST_HDD
B15
SATA_TXN_1ST_HDD#
A15
SATA_TXP_1ST_HDD
J8
SATA_RXN_ODD#
H8
SATA_RXP_ODD
A17
SATA_TXN_ODD#
B17
SATA_TXP_ODD
J6
SATA_RXN_PERN6_L1#
H6
SATA_RXP_PERP6_L1
B14
SATA_TXN_PETN6_L1#
C15
SATA_TXP_PETP6_L1
F5
SATA_RXN_1ST_SSD#
E5
SATA_RXP_1ST_SSD
C17
SATA_TXN_1ST_SSD#
D17
SATA_TXP_1ST_SSD
V1
VGPU_EN
U1
ODD_PRSNT#
V6
SSD_SATA2GP SSD_SATA2GP
AC1
SSD_SATA3GP
A12
SATA_IREF
L11
K10
C12
SATA_RCOMP
U3
SATA_LED#
SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
PCH SPI ROM(8M)
PCH_SPI_CS0#
PCH_SPI_SO
PCH_SPI_SO_EC
+3V_PCH_ME
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
3.3K is original and for no
support fast read function
PCH_SPI_CS1#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C531 *22p/50V_4
+3V_PCH_ME
SATA_RXN_1ST_HDD#
SATA_RXP_1ST_HDD
SATA_TXN_1ST_HDD#
SATA_TXP_1ST_HDD
SATA_RXN_ODD#
SATA_RXP_ODD
SATA_TXN_ODD#
SATA_TXP_ODD
SATA_RXN_PERN6_L1#
SATA_RXP_PERP6_L1
SATA_TXN_PETN6_L1#
SATA_TXP_PETP6_L1
SATA_RXN_1ST_SSD#
SATA_RXP_1ST_SSD
SATA_TXN_1ST_SSD#
SATA_TXP_1ST_SSD
VGPU_EN 40
ODD_PRSNT# 28
SSD_SATA3GP
R595 *short_4
R596 3.01 K/F_4
R563 10K _4
8M@ 15ohm CS01502JB12
4M@ 33ohm CS03302JB29
8M@4M@ 15ohm (when one SPI device)
8M@4M@ 33ohm (when two SPI device)
R507 8M@4M@15_4
R518 8M@4M@15_4
SPI_WP_IO2_ME
R492 1K_4
R496 8M@4M@15_4
R463 8M@4M@15_4
R468 *4M@33_4
R464 *4M@33_4
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
R480 *1K _4
27
+V1.05S_ASATA3PLL
+V1.05S_ASATA3PLL
+3V
U32
1
CS#
2
IO1/DO
3
IO2/WP#
4
GND
W25Q64FW -- 8MB
PCH_SPI_IO3
SPI_WP_IO2_EC
28
HDD1
28
28
28
28
28
28
28
27
27
NGFF PCIE6_L1
27
27
27
27
SSD/NGFF PCIE6_L0
27
27
R157 *s hort_6
1A-3 2013/10/16 Add U34 flash 4M ROM r eserve for ZQ0D .
PCH_SPI_CLK_EC33
PCH_SPI_SI_EC33
PCH_SPI_SO_EC33
SPI_CS0#_UR_ME33
+3V_PCH_ME
R465 *4M@33_4
R462 *4M@33_4
R469 *4M@33_4
R475 10K_4
LPC_LAD023,27,33
LPC_LAD123,27,33
LPC_LAD223,27,33
LPC_LAD323,27,33
LPC_LFRAME#23,27,33
ODD
SSD_SATA3GP
R483 8M@4M@15_4
R482 *4M@33_4
R511 8M@4M@15_4
R477 *4M@33_4
R473 8M@0_4
R476 *4M @0_4
VCC
IO3/HOLD#
CLK
IO0/DI
U30
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*4M@ROM-4M_EC
SPI_CS0#_UR_ME
R199 *10K_4
R566 *10K_4
R530 IV@10K_4
8
7
6
5
VDD
HOLD#
VSS
R534 NF@0_4
SATA2GP= H ; HSIO12= SATA2
SATA2GP= L ; HSIO12= PCIE6 L1
SATA3GP= H ; HSIO11= SATA3
SATA3GP= L ; HSIO11= PCIE6 L0
SPI_HOLD_IO3_ME
8
7
4
PCH_SPI_CS0#
PCH_SPI_CS1#
2
1
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
C190 0.1u/10V_4
R510 1K _4
PCH_SPI_CLK
PCH_SPI_SI
C535
*22p/50V_4
+3V_PCH_ME
HSW_ULT_DDR3L
LPC
+3V
+3V_PCH_ME
AN2
+3V_S5
SMBALERT/GPIO11
+3V_S5
+3V_S5
SMBUS
+3V_S5
SML0ALERT/GPIO60
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
C-LINKSPI
SMBus
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
7 OF 19
+3V_S5
SMBus(PCH)
SMB_PCH_DAT
SMB_PCH_CLK
PCH/S5 DDR_TP_XDP_WL/S0
SMBus(EC)
2ND_MBCLK19,24,33
2ND_MBDATA19,24,33
EC/S5 PCH/S5
SMBALERT#SRTC_RST#
AP2
SMB_PCH_CLK
SMBCLK
AH1
SMB_PCH_DAT
SMBDATA
AL2
SMB0ALERT#
AN1
VGA_MBCLK
SML0CLK
AK1
VGA_MBDATA
AU4
SMB1ALERT#
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
AF2
CL_CLKPCH_SPI_CS0#
CL_CLK
AD2
CL_DAT
CL_DATA
AF4
CL_RST#
CL_RST
R569 10K_4
R161 10K_4
R144 10K_4
R121 2.2K_4
R114 2.2K_4
R556 2.2K_4
R538 2.2K_4
+3V
Q18
5
2
6
2N7002DW
+3V_S5
Q19
5
2
6
*2N7002DW
2ND_MBCLK
R125 *s hort_4
2ND_MBDATA
R122 *s hort_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
Tuesday, April 29, 2014
Tuesday, April 29, 2014
Tuesday, April 29, 2014
1
TP86
TP89
TP26
SMB0ALERT#
SMB1ALERT#
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
VGA_MBDATA
VGA_MBCLK
R123
R113
4.7K_4
4.7K_4
43
1
R129
R119
*2.2K_4R467 *4M@33_4
*2.2K_4
43
SMB_ME1_CLK
1
SMB_ME1_DAT
SMB_ME1_CLK
SMB_ME1_DAT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZYW
ZYW
ZYW
CLK_SDATA 13,14,15,27
CLK_SCLK 13,14,15,27
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
SSD_SATA2GP
SSD_SATA3GP
VGPU_EN
+3V_PCH_ME+3V_S5
R491 8M@4M@15_4
R478 8M@4M@15_4
SPI_WP_IO2_MEPCH_SPI_IO2
SPI_WP_IO2_EC
SPI_HOLD_IO3_ME
SPI_HOLD_IO3_EC
SPI_HOLD_IO3_EC
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
only 0ohm option
2
U33G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
R186 *10K_4
R552 *10K_4
R529 EV@10K_4
reserve for SPI fast read
R474 *1K _4
C532
*4M@0.1u/10V_4
08
8 46
8 46
8 46
3A
3A
3A
5
Haswell ULT PCH (PCIE,USB3.0,USB2.0)
U33K
PEG_RX#016
29
PCIE_RXN_ LAN#
29
PCIE_RXP_LAN
PCIE_TXN_L AN#29
PCIE_TXP_LAN29
27
PCIE_RXN_ WLAN#
27
PCIE_RXP_WLAN
PCIE_TXN_W LAN#27
PCIE_TXP_WLAN27
+V1.05S_ AUSB3PL L
PEG_RX01 6
PEG_TX#016
PEG_TX016
PEG_RX#116
PEG_RX11 6
PEG_TX#116
PEG_TX116
PEG_RX#216
PEG_RX21 6
PEG_TX#216
PEG_TX216
PEG_RX#316
PEG_RX31 6
PEG_TX#316
PEG_TX316
C567 EV@0.22 u/10V_4
C566 EV@0.22 u/10V_4
C569 EV@0.22 u/10V_4
C568 EV@0.22 u/10V_4
C563 EV@0.22 u/10V_4
C562 EV@0.22 u/10V_4
C565 EV@0.22 u/10V_4
C564 EV@0.22 u/10V_4
C576 0.1u/10 V_4
C581 0.1u/10 V_4
C575 0.1u/10 V_4
C578 0.1u/10 V_4
TP28
TP29
TP100
TP101
R271 3.01K/F_4
R274 *short_4
PCIE_TXN_L AN#_C
PCIE_TXP_LAN_C
PCIE_TXN_W LAN#_C
PCIE_TXP_WLAN_C
PCIE_RCOMP
PCIE_IREF
D D
G x4
PE
NWLAN
LA
C C
B B
F10
PERN5_L0
E10
PERP5_L0
C23
C_PEG_TX# 3
C_PEG_TX3
C_PEG_TX# 2
C_PEG_TX2
C_PEG_TX# 1
C_PEG_TX1
C_PEG_TX# 0
C_PEG_TX0
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1 USBCOMP
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
PCIE USB
+3V_S5
+3V_S5
+3V_S5
+3V_S5
HSW_ULT_DDR3L
4
11 OF 19
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
DSW
USB2N0
DSW
USB2P0
DSW
USB2N1
DSW
USB2P1
DSW
USB2N2
DSW
USB2P2
DSW
USB2N3
DSW
USB2P3
DSW
USB2N4
DSW
USB2P4
DSW
USB2N5
DSW
USB2P5
DSW
USB2N6
DSW
USB2P6
DSW
USB2N7
DSW
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
RSVD
RSVD
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBP0USBP0+
USBP1USBP1+
USBP6USBP6
USBP7USBP7
USBP10_ WLAN#
USBP10_ WLAN
USB_TOUCH#
USB_TOUCH
USB_CCD#
USB_CCD
USBP4#
USBP4
USB3_RXN1
USB3_RXP 1
USB3_TXN1
USB3_TXP1
USB3_RXN2
USB3_RXP 2
USB3_TXN2
USB3_TXP2
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBP0USBP0+
USBP1USBP1+
USBP6USBP6
USBP7USBP7
USBP10_ WLAN#
USBP10_ WLAN
USB_TOUCH#
USB_TOUCH
USB_CCD#
USB_CCD
USBP4#
USBP4
R248 22.6/F_ 4
USB_OC0# 30
USB_OC1# 30
30
M/B side
30
30
M/B side
30
30
D/B side
30
30
D/B side
30
27
mini card
27
25
T/S
25
25
CCD
25
30
Card reader
30
30
USB3_RXN1
30
USB3_RXP 1
30
USB3_TXN1
30
USB3_TXP1
30
USB3_RXN2
30
USB3_RXP 2
30
USB3_TXN2
30
USB3_TXP2
USBCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
DB U2
MB U3
USB3.0
USB3.0
3
Haswell ULT PCH (CLOCK)
CLK_PCIE _N0
TP104
CLK_PCIE _P0
TP105
CLK_PCIE _REQ0#
TP90
CLK_PCIE _REQ1#
TP24
RP6
10
9
8
7 4
10K_10P 8R
CLK_PEG A_REQ#
CLK_PCIE _NGFF#
CLK_PCIE _LAN#_R
CLK_PCIE _LAN_R
PCIE_REQ_LAN#
CLK_PCIE _WLAN#_R
CLK_PCIE _WLAN_R
PCIE_CLK _WLAN_REQ#_R
1
2
3
56
29
CLK_PCIE _LAN#
29
CLK_PCIE _LAN
29
PCIE_REQ_LAN#
CLK_PCIE _WLAN#27
WLAN LANNGFF
VGA
CLK_PCIE _WLAN27
PCIE_CLK _WLAN_REQ#27
CLK_PCIE _VGAN16
CLK_PCIE _VGAP16
CLK_PEG A_REQ#16
CLK_PCIE _NGFFN27
CLK_PCIE _NGFFP27
CLK_PCIE _NGFF#27
USB Overcurrent
+3V_S5
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
U33F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
2
+3V
+3V
+3V
+3V
+3V
+3V
CLK_PCIE _REQ0#
CLK_PCIE _REQ1#
PCIE_CLK _WLAN_REQ#_R
PCIE_REQ_LAN#
CLK_PCIE _NGFF#
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PEG A_REQ#
HSW_ULT_DDR3L
CLOCK
SIGNALS
6 OF 19
R131 10K_4
R132 *1K_4
R548 10K_4
R200 10K_4
R560 10K_4
R535 10K_4
R547 10K_4
R619 10K_4
R614 10K_4
R241 10K_4
R237 10K_4
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
+3V
+3V
XTAL24_IN
XTAL24_O UT
A25
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
R605
1M_4
XTAL24_IN
XTAL24_O UT
ICLK_BIA S
TESTLOW_ C35
TESTLOW_ C34
TESTLOW_ AK8
TESTLOW_ AL8
CLK_PCH_ PCI3
CLK_PCH_ PCI4
CLK_PCIE _XDPN
CLK_PCIE _XDPP
C218
*18p/50V _4
1
C570 12p/50V_4
Y11
24MHz
2 4
1 3
C574 12p/50V_4
R278 3.01K/F_4
PCLK_DEBUGCLK_PCI_ EC
*18p/50V _4
R208TPM@22 _4
R21522_4
R22422_4
C212
09
+V1.05S_ AXCK_LCPLL
PCLK_TPM 2 3
PCLK_DEBUG 27
CLK_PCI_ EC 33
TP154
TP155
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
5
4
3
2
Tuesday, April 29, 2014
PROJECT :
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
ZYW
ZYW
ZYW
9 46
9 46
1
9 46
3A
3A
3A
5
4
3
2
1
PCH GPIO PU/PD
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
LowHigh
GPIO8
D D
C C
Touch panel No touch panel
BOARD_ID0
GPIO825
GPIO158
DGPU_PWROK20
TP21
TP92
TP27
DGPU_HOLD_RST#16
DGPU_PWR_EN41
MODPHY_EN36
TP20
DEVSLP027
SPKR8,31
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
GPIO26
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PW_CTRL#
MODPHY_EN
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46
GPIO9
GPIO10
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR
U33J
P1
BMBUSY/GPIO76
AU2
AM7
AD6
AD5
AN5
AD7
AN3
AG6
AP1
AT5
AK4
AB6
AT3
AH4
AM4
AG5
AG3
AM3
AM2
AL4
Y1
T3
U4
Y3
P3
Y2
P2
C4
L2
N5
V2
+3V_S5
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
+3V_S5
GPIO15
+3V
GPIO16
+3V
GPIO17
+3V_S5
GPIO24
DSW
GPIO27
+3V_S5
GPIO28
+3V_S5
GPIO26
+3V_S5
GPIO56
+3V_S5
GPIO57
+3V_S5
GPIO58
+3V_S5
GPIO59
+3V_S5
GPIO44
+3V_S5
GPIO47
+3V
GPIO48
+3V
GPIO49
+3V
GPIO50
HSIOPC/GPIO71
+3V_S5
GPIO13
+3V_S5
GPIO14
DSW
GPIO25
+3V_S5
GPIO45
+3V_S5
GPIO46
+3V_S5
GPIO9
+3V_S5
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81
Board ID
+3V
R561 *10K_4
BOARD_ID12
R184 10K_4
B B
BOARD_ID22
R527 10K_4
R578 10K_4
BOARD_ID42
R504 10K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
R546 10K_4
R170 *10K_4
R545 *10K_4
R577 *10K_4
R526 *10K_4
SKU ID
UMA Only
dGPU Only
Switchable
(Mux)
Optimize
(Muxless)
R565 IV@10K_4
R137 IV@10K_4
SKU_ID1 SKU_ID0 VGA H/W
0
0
1
1
Low
BOARD_ID0
BOARD_ID1
A A
BOARD_ID2
BOARD_ID3
BOARD_ID4
N15V-GL-B
Reserved
(Default)
Reserve for Touch pad, default(low)
WO/dTPM
(Default)
w/VGA
(Default)
5
High
N15V-GM-B
(Default)
Reserved
W/dTPM
wo/VGA
+3V
+3V
4
+3V
+3V
+3V
+3V
HSW_ULT_DDR3L
DSW
GPIO
+3V
10 OF 19
SKU_ID0
SKU_ID1
0
1
0
1
R564 EV@10K_4
R154 EV@10K_4
Setup
Signal
Menu
UMA
Hidden
GPU
Hidden
UMA+GPU dGPU/SG UMA boot
UMA
UMA/SG
CPU/
MISC
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SERIAL IO
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
THRMTRIP
+3V
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
+3V
UMA boot
GPU boot
UMA boot
D60
THRMTRIP#
V4
SIO_RCIN#
T4
IRQ_SERIRQ
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
OPI_COMP2
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
SIO_EXT_SMI#
SIO_EXT_SCI#
DGPU_EVENT#
GC6_FB_EN
GPIO4
GPIO5
I2C0_SDA_GPIO6
I2C0_SCL_GPIO7
PCH_ODD_EN
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
R598 49.9/F_4
CPU thermal trip
IMVP_PWRGD_3V
+1.05V_VCCST
THRMTRIP#
IMVP_PWRGD5,38
3
SIO_EXT_SMI# 33
SIO_EXT_SCI# 33
DGPU_EVENT# 19
GC6_FB_EN 19,20
I2C0_SDA_GPIO6 32
I2C0_SCL_GPIO7 32
PCH_ODD_EN 28
+1.05V_VCCST
3
2
1
R700
1K_4
R699
2
1K_4
1 3
Q49 MMBT3904-7-F
U36
NC1VCC
2
A
GND3Y
74AUP1G07GW
SIO_RCIN# 33
IRQ_SERIRQ 23,33
GPIO86 8
1A-3
GPIO66 8
Q35
FDV301N
+1.05V_VCCST
5
C626
0.1u/10V_4
4
Reserve GPIO68,69 for board ID
SYS_SHDN# 33,35,39
+3V
12
R696
10K_4
IMVP_PWRGD_3V 7
2
IRQ_SERIRQ
DEVSLP0
DEVSLP1
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#
DGPU_HOLD_RST#
GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO65
DGPU_EVENT#
GPIO83
GPIO84
I2C0_SDA_GPIO6
I2C0_SCL_GPIO7
GPIO67
R532 *10K_4
R542 *10K_4
R550 *100K_4
R558 10K_4
R151 *10K_4
high UMA Only
low
R505 EV@100K_4
DGPU_PWROK PD on GPU side
non-DS3, stuff R772,R773
DS3, stuff R159,R160
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
GPIO68
GPIO69
DGPU_PWR_EN
GC6_FB_EN
PCH_ODD_EN
GPIO4
GPIO5
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
DGPU_PW_CTRL#
DGPU_PWROK
LAN_DISABLE#
GPIO8
GPIO46
GPIO24
GPIO28
GPIO47
GPIO57
GPIO58
GPIO59
GPIO26
GPIO45
GPIO44
GPIO13
GPIO14
GPIO9
GPIO10
GPIO56
GPIO25
WK_GPIO27
GPIO25
WK_GPIO27
GPIO27 : If not used then use
8.2-kΩ to 10-kΩ pull-down to GND.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
R485 10K_4
R528 *10K_4
R544 *10K_4
R506 10K_4
R503 10K_4
R573 10K_4
R201 10K_4
R168 10K_4
R155 10K_4
R127 10K_4
R169 10K_4
R525 10K_4
R502 10K_4
R153 10K_4
R524 10K_4
R568 10K_4
R148 10K_4
R543 *10K_4
R138 10K_4
R126 10K_4
R551 2.2K_4
R501 2.2K_4
R519 10K_4
R539 10K_4
R523 10K_4
R531 10K_4
R752 *10K_4
R134 *10K_4
R152 *10K_4
R135 *10K_4
R484 IV@1K_4
R751 *10K_4
R238 10K_4
R149 10K_4
R174 *10K_4
R187 10K_4
R495 10K_4
R179 10K_4
R521 10K_4
R158 10K_4
R235 10K_4
R145 10K_4
R189 10K_4
R572 10K_4
R522 10K_4
R190 10K_4
R570 10K_4
R555 10K_4
R177 10K_4
R772 10K_4
R773 10K_4
R159 *10K_4
R160 *10K_4
R166 *10K_4
ZYW
ZYW
ZYW
1
10
+3V
+3V
+3V_S5
+3VPCU
10 46
10 46
10 46
3A
3A
3A
5
C230 *1u/6.3V_4
C215 1u/6.3V_4
C234 1u/6.3V_4
+1.05V
25mA
C183
1u/6.3V_4
R257 *short_8
+1.05V_S5
+1.05V_DCPSUS2
Deep Sx
+3VPCU
+3V_S5
D D
R117 *0_6
+1.05V_S5
Non Deep Sx
+3V
C C
+1.05V
C255 1u/6.3V_4
WW15 4/10 Intel VCCDSW3
G3 can't boot issue.
C541
+PCH_VCCDSW+VCCPDSW
0.47u/25V_6
+1.05V_MODPHY
R242 *0_6
C241
10u/6.3V_6
R494 *0_6
R512 0_6
C235
1u/6.3V_4
R118 *short_8
+3VCC_S5
1.741A
C238
*1u/6.3V_4
+V1.05S_AIDLE
10mA
C237
1u/6.3V_4 C189
+V3.3DX_1.5DX_1.8DX_AUDIO
0.114A
+3VCC_S5
41mA
C176
22u/6.3V_8
+1.05V
63mA
PCH VCCHSIO Power
4
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_APLLOPI
+1.05V_DCPSUS3
C273 22u/6.3V_8
+VCCPDSW
+V3.3S_VCCPCORE
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
C257 1u/6.3V_4
1.838A
B18
B11
Y20
AA21
W21
AH14
AH13
AC9
AA9
AH10
K19
A20
R21
T21
K18
M20
V21
AE20
AE21
K9
L10
M9
N8
P9
J13
V8
W9
J18
J17
3
Haswell ULT PCH (Power)
HSIO
USB3
HDA
VRM
GPIO/LPC
LPT LP POWER
HSW_ULT_DDR3L
OPI
RTC
SPI
CORE
THERMAL SENSOR
SERIAL IO
SUS OSCILLATOR
USB2
13 OF 19
U33M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
+VCCRTCEXT
+V3.3M_PSPI
PCH_VCC_1_1_21
+V1.05S_CORE_PCH
+1.05V_DCPSUS1
18mA
+PCH_VCCDSW
+V1.05M_VCCASW
0.109A
R116 *0_6
C182
1u/6.3V_4
+V3.3S_VCCSDIO
+1.05V_DCPSUS4
2
R254 *short_6
+V1.05M_VCCASW
+1.05V_S5
3mA
1mA
17mA
R115 *0_6
C181
1u/6.3V_4
C267
1u/6.3V_4
C224
0.1u/10V_4
C239
0.1u/10V_4
C245
1u/6.3V_4
0.658A
C244
1u/6.3V_4
+V1.5S_VCCATS
+V3.3S_VCCPTS
+1.05V_S5
+1.05V
+1.05V
C226
0.1u/10V_4
R141 *short_6
R140 *0_6
0.1u/10V_4
C266
1u/6.3V_4
C544
1u/6.3V_4
R258 *short_6
C246
22u/6.3V_8
R266 *short_6
R249 *short_6
C253
1u/6.3V_4
C240
1u/6.3V_4
+3VCC_S5
C225
1u/6.3V_4
C243
10u/6.3V_6
+3V_RTC
+3V_S5
+3V
R253 *short_8
+1.05V
+1.5V
+3V
R250 *short_6
1
11
+1.05V
+3V
B B
+V1.05S_VCCUSBCORE
VCCAPLL power
+V1.05S_APLLOPI+1.05V
C256
0.1u/10V_4
57mA
C232
*47u/6.3V_8
C263
1u/6.3V_4
2
L17 2.2uH/210mA_8
C233
*47u/6.3V_8
+1.05V_MODPHY +V1.05S_AUSB3PLL +1.05V_MODPHY +V1.05S_ASATA3PLL
A A
L16 2.2uH/210mA_8
C262
47u/6.3V_8
C261
47u/6.3V_8
C264
1u/6.3V_4
L15 2.2uH/210mA_8
C228
47u/6.3V_8
42mA41mA
C223
47u/6.3V_8
C560
1u/6.3V_4
PCH HDA Power
+1.5V
R150 *short_6
11mA
+V3.3DX_1.5DX_1.8DX_AUDIO
Place close to ball
5
4
3
R270 *short_8
C260
1u/6.3V_4
+1.05V +V1.05S_AXCK_DCB
L18 2.2uH/210mA_8
+1.05V +V1.05S_AXCK_LCPLL
L20 2.2uH/210mA_8
+1.05V
0.2A
C248
47u/6.3V_8
C247
47u/6.3V_8
C254
1u/6.3V_4
31mA
C270
47u/6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
C269
47u/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 5/6 (POWER)
LPT 5/6 (POWER)
LPT 5/6 (POWER)
C275
1u/6.3V_4
1
ZYW
ZYW
ZYW
11 46
11 46
11 46
3A
3A
3A
5
4
3
2
1
Haswell ULT (GND)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U33O
HSW_ULT_DDR3L
15 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D50
D51
D53
D54
D55
D57
D59
D62
G18
G22
H13
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
HSW_ULT_DDR3L
U33P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
VSS
16 OF 19
VSS_SENSE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
VSS_SENSE_R
U33R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
R675 *short_4
R667 100/F_4
HSW_ULT_DDR3L
D D
C C
B B
A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U33N
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
AP3
AR5
AU1
HSW_ULT_DDR3L
18 OF 19
VSS_SENSE 38
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
12
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
U33Q
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60
TP107
DC_TEST_AY61_AW 61
DC_TEST_AY62_AW 62
TP_DC_TEST_B2
A A
5
TP88
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
4
HSW_ULT_DDR3L
17 OF 19
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
3
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
TP_DC_TEST_A62
AV1
TP_DC_TEST_AV1
AW1
TP_DC_TEST_AW 1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW 61
AW62
DC_TEST_AY62_AW 62
AW63
TP_DC_TEST_AW 63
TP96
TP106
TP109
TP84
TP94
TP108
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
2
Tuesday, April 29, 2014
PROJECT :
LPT 6/6 (GND)
LPT 6/6 (GND)
LPT 6/6 (GND)
1
ZYW
ZYW
ZYW
12 46
12 46
12 46
3A
3A
3A
5
4
3
2
1
13
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
5
4
3
2
Tuesday, April 29, 2014
PROJECT :
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
ZYW
ZYW
ZYW
13 46
13 46
13 46
1
3A
3A
3A
1
M_A_A[15:0]3
A A
M_A_BS#03
M_A_BS#13
M_A_BS#23
M_A_CS#03
M_A_CS#13
M_A_CLK03
M_A_CLK0#3
M_A_CLK13
M_A_CLK1#3
M_A_CKE03
M_A_CKE13
M_A_CAS#3
M_A_RAS#3
CLK_SCLK8,13,15,27
CLK_SDATA8,13,15,27
M_A_ODT0_DIMM4
M_A_ODT1_DIMM4
M_A_DQS[7:0]3
M_A_DQS#[7:0]3
C347
10u/6.3V_6
+DDR_VTT_RUN
M_A_WE#3
C326
10u/6.3V_6
C210
1u/6.3V_4
C321
0.1u/10V_4
R213 10K_4
R212 10K_4
B B
1A-2
2013/10/16 Chage net name M_B_DQS#[7:0] to
C C
+1.35V_SUS
C291
10u/6.3V_6
+3V
C220
2.2u/6.3V_6
D D
M_A_DQS#[7:0].
Place these Caps near SO-DIMM
C322
10u/6.3V_6
C308
10u/6.3V_6
C344
10u/6.3V_6
C219
0.1u/10V_4
1
C310
0.1u/10V_4
C348
0.1u/10V_4
C207
1u/6.3V_4
2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM1_SA0
DIMM1_SA1
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
C337
0.1u/10V_4
2
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
C313
0.1u/10V_4
C211
1u/6.3V_4
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
JDIM6A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1_H=5.2_RVS
+SMDDR_VREF_DIMM
+
C300
C281
330u/2V_7343
0.1u/10V_4
C208
1u/6.3V_4
C198
4.7u/6.3V_6
3
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2.2u/6.3V_6
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+SMDDR_VREF_DQ0
C277
0.1u/10V_4
C199
4.7u/6.3V_6
C384
C382
2.2u/6.3V_6
C209
4.7u/6.3V_6
4
M_A_DQ6 3
M_A_DQ2 3
M_A_DQ3 3
M_A_DQ7 3
M_A_DQ0 3
M_A_DQ1 3
M_A_DQ5 3
M_A_DQ4 3
M_A_DQ9 3
M_A_DQ8 3
M_A_DQ11 3
M_A_DQ15 3
M_A_DQ12 3
M_A_DQ13 3
M_A_DQ14 3
M_A_DQ10 3
M_A_DQ17 3
M_A_DQ16 3
M_A_DQ19 3
M_A_DQ18 3
M_A_DQ21 3
M_A_DQ20 3
M_A_DQ23 3
M_A_DQ22 3
M_A_DQ25 3
M_A_DQ24 3
M_A_DQ26 3
M_A_DQ31 3
M_A_DQ28 3
M_A_DQ29 3
M_A_DQ27 3
M_A_DQ30 3
M_A_DQ33 3
M_A_DQ32 3
M_A_DQ35 3
M_A_DQ34 3
M_A_DQ36 3
M_A_DQ37 3
M_A_DQ39 3
M_A_DQ38 3
M_A_DQ41 3
M_A_DQ44 3
M_A_DQ42 3
M_A_DQ46 3
M_A_DQ40 3
M_A_DQ45 3
M_A_DQ43 3
M_A_DQ47 3
M_A_DQ49 3
M_A_DQ52 3
M_A_DQ50 3
M_A_DQ54 3
M_A_DQ48 3
M_A_DQ55 3
M_A_DQ53 3
M_A_DQ51 3
M_A_DQ56 3
M_A_DQ61 3
M_A_DQ63 3
M_A_DQ59 3
M_A_DQ57 3
M_A_DQ60 3
M_A_DQ58 3
M_A_DQ62 3
CHA
CHB
4
+VREF_CA_CPU
M3 solution
+VREFDQ_SA_M3
M3 solution
SA0SA1
0 0
01
5
DDR3_DRAMRST#4,15
R272 *short_6
R332 *short_6
5
R219 *10K_4
+3V
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
R279 2/F_6
C271
0.022u/16V_4
1 2
R275
24.9/F_4
R336 2/F_6
C379
0.022u/16V_4
1 2
R339
24.9/F_4
6
+1.35V_SUS
2.48A
+3V
PM_EXTTS#1A
C360 *0.1u/10V_4
+SMDDR_VREF_DQ0
M1 solution
+1.35V_SUS
R285
1.8K/F_4
R280
1.8K/F_4
M1 solution
+1.35V_SUS
R344
1.8K/F_4
R334
1.8K/F_4
6
7
JDIM6B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_RVS
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+DDR_VTT_RUN
Vref_CA
+SMDDR_VREF_DIMM
C282
470p/50V_4
Vref_DQ
+SMDDR_VREF_DQ0
C380
470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
PROJECT :
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
7
ZYW
ZYW
ZYW
14 46
14 46
14 46
8
14
8
3A
3A
3A
5
4
3
2
1
M_B_A[15:0]3
D D
M_B_BS#03
M_B_BS#13
M_B_BS#23
M_B_CS#03
M_B_CS#13
M_B_CLK03
M_B_CLK0#3
M_B_CLK13
M_B_CLK1#3
M_B_CKE03
M_B_CKE13
M_B_CAS#3
M_B_RAS#3
CLK_SCLK8,13,14,27
CLK_SDATA8,13,14,27
M_B_ODT0_DIMM4
M_B_ODT1_DIMM4
M_B_DQS[7:0]3
M_B_DQS#[7:0]3
C319
10u/6.3V_6
+DDR_VTT_RUN
M_B_WE#3
C311
10u/6.3V_6
C350
0.1u/10V_4
R229 10K_4
R216 10K_4
+3V
C C
B B
1A-2
2013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap
M_B_DQS#2/M_B_DQS#3.
+1.35V_SUS
C335
10u/6.3V_6
+3V
Place these Caps near SO-DIMM
C302
10u/6.3V_6
10u/6.3V_6
C343
10u/6.3V_6
C332
0.1u/10V_4
C309
0.1u/10V_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM2_SA0
DIMM2_SA1
M_B_DQS2
M_B_DQS0
M_B_DQS1
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#2
M_B_DQS#0
M_B_DQS#1
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
0.1u/10V_4
C294
0.1u/10V_4
JDIM7A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=5.2_STD
+SMDDR_VREF_DIMM
+
C354
330u/2V_7343
0.1u/10V_4
C283
PC2100 DDR3 SDRAM SO-DIMM
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2.2u/6.3V_6
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+SMDDR_VREF_DQ1
C276
0.1u/10V_4
C391
C394
2.2u/6.3V_6
M_B_DQ23 3
M_B_DQ22 3
M_B_DQ20 3
M_B_DQ19 3
M_B_DQ17 3
M_B_DQ16 3
M_B_DQ18 3
M_B_DQ21 3
M_B_DQ2 3
M_B_DQ4 3
M_B_DQ7 3
M_B_DQ6 3
M_B_DQ3 3
M_B_DQ5 3
M_B_DQ0 3
M_B_DQ1 3
M_B_DQ8 3
M_B_DQ9 3
M_B_DQ10 3
M_B_DQ11 3
M_B_DQ12 3
M_B_DQ13 3
M_B_DQ15 3
M_B_DQ14 3
M_B_DQ27 3
M_B_DQ26 3
M_B_DQ24 3
M_B_DQ25 3
M_B_DQ30 3
M_B_DQ31 3
M_B_DQ29 3
M_B_DQ28 3
M_B_DQ33 3
M_B_DQ32 3
M_B_DQ38 3
M_B_DQ39 3
M_B_DQ36 3
M_B_DQ37 3
M_B_DQ34 3
M_B_DQ35 3
M_B_DQ40 3
M_B_DQ41 3
M_B_DQ45 3
M_B_DQ47 3
M_B_DQ43 3
M_B_DQ42 3
M_B_DQ46 3
M_B_DQ44 3
M_B_DQ55 3
M_B_DQ49 3
M_B_DQ50 3
M_B_DQ53 3
M_B_DQ52 3
M_B_DQ51 3
M_B_DQ54 3
M_B_DQ48 3
M_B_DQ56 3
M_B_DQ57 3
M_B_DQ59 3
M_B_DQ63 3
M_B_DQ61 3
M_B_DQ62 3
M_B_DQ60 3
M_B_DQ58 3
+VREFDQ_SB_M3
M3 solution
R214 *10K_4
+3V
DDR3_DRAMRST#4,14
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
R343 *short_6C349
R341 2/F_6C334
C389
0.022u/16V_4
1 2
R348
24.9/F_4
+1.35V_SUS
2.48A
+3V
PM_EXTTS#1B
C361 *0.1u/10V_4
+SMDDR_VREF_DQ1
M1 solution
+1.35V_SUS
R346
1.8K/F_4
R347
1.8K/F_4
JDIM7B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_STD
Vref_DQ
+SMDDR_VREF_DQ1
C392
470p/50V_4
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
15
+DDR_VTT_RUN
A A
C221
2.2u/6.3V_6
C222
0.1u/10V_4
C203
1u/6.3V_4
C205
1u/6.3V_4
C204
1u/6.3V_4
C206
1u/6.3V_4
C200
4.7u/6.3V_6
C202
4.7u/6.3V_6
C201
4.7u/6.3V_6
SA0SA1
Quanta Computer Inc.
Quanta Computer Inc.
CHA
CHB
5
4
0 0
3
01
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZYW
ZYW
ZYW
15 46Tuesday, April 29, 2014
15 46Tuesday, April 29, 2014
15 46Tuesday, April 29, 2014
1
3A
3A
3A
5
<VGA>
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
D D
place under BGA
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
place under BGA
1000mA
C169 EV@22u/6.3V_8
C174 EV@22u/6.3V_8
C144 EV@10u/6.3V_6
C140 EV@10u/6.3V_6 C107
C143 EV@4.7u/6.3V_6
C141 EV@1u/6.3V_4
C139 EV@1u/6.3V_4
C175 EV@22u/6.3V_8
C168 EV@22u/6.3V_8
C136 EV@10u/6.3V_6
C142 EV@10u/6.3V_6
C134 EV@4.7u/6.3V_6
C148 EV@1u/6.3V_4
C159 EV@1u/6.3V_4
2500mA
C C
210mA of +3V_GFX
PLACE NEAR BGA
+3V_GFX
VGA_VCCSENSE40
VGA_VSSSENSE40
B B
PEX_PLLVDD : 0.3MM = 12mils (150mA)
RSVD R1 and C1 for GV2 co-layout sDDR3
+1.05V_GFX
C137
C1
EV@1u/6.3V_4
A A
EV@10K/F_4
C90EV@0.1u/10V_4
C162EV@4.7u/6.3V_6
C157EV@4.7u/6.3V_6
PEX_TSTCLK
R97*EV@200/F_4
PEX_TSTCLK#
R1
PEX_PLLVDD
R104*short_6
C153EV@4.7u/6.3V_6
C133EV@1u/6.3V_4
C154EV@0.1u/10V_4
TESTMODE
R98
PEX_TERMP
R460EV@2.49K/F_4
5
U39A
AA22
PEX_IOVDD
AB23
PEX_IOVDD
AC24
PEX_IOVDD
AD25
PEX_IOVDD
AE26
PEX_IOVDD
AE27
PEX_IOVDD
AA10
PEX_IOVDDQ
AA12
PEX_IOVDDQ
AA13
PEX_IOVDDQ
AA16
PEX_IOVDDQ
AA18
PEX_IOVDDQ
AA19
PEX_IOVDDQ
AA20
PEX_IOVDDQ
AA21
PEX_IOVDDQ
AB22
PEX_IOVDDQ
AC23
PEX_IOVDDQ
AD24
PEX_IOVDDQ
AE25
PEX_IOVDDQ
AF26
PEX_IOVDDQ
AF27
PEX_IOVDDQ
AA8
PEX_PLL_HVDD
AA9
PEX_PLL_HVDD
AB8
PEX_SVDD_3V3
F2
VDD_SENSE
F1
GND_SENSE
8mils width
(0.2MM)
AF22
PEX_TSTCLK_OUT
AE22
PEX_TSTCLK_OUT
AA14
PEX_PLLVDD
AA15
PEX_PLLVDD
place near BGA
place near ball
AD9
TESTMODE
AF25
PEX_TERMP
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_WAKE
PEX_RST
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119GF117
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
4
4
PEGX_RST#
PEX_CLKREQ#
C_PEG_RX0
C_PEG_RX#0
PEG_TX0
PEG_TX#0
C_PEG_RX1
C_PEG_RX#1
PEG_TX1
PEG_TX#1
C_PEG_RX2
C_PEG_RX#2
PEG_TX2
PEG_TX#2
C_PEG_RX3
C_PEG_RX#3
PEG_TX3
PEG_TX#3
C526 EV@0.22u/10V_4
C525 EV@0.22u/10V_4
C524 EV@0.22u/10V_4
C523 EV@0.22u/10V_4
C520 EV@0.22u/10V_4
C519 EV@0.22u/10V_4
C522 EV@0.22u/10V_4
C521 EV@0.22u/10V_4
U39C
14/14 XVDD/VDD33
AD10
NC
AD7
NC
B19
NC
F11
3V3AUX_NC
V5
FERMI_RSVD1_NC
V6
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
G1
XPWR_G1
G2
XPWR_G2
G3
XPWR_G3
G4
XPWR_G4
G5
XPWR_G5
G6
XPWR_G6
G7
XPWR_G7
V1
XPWR_V1
V2
XPWR_V2
W1
XPWR_W1
W2
XPWR_W2
W3
XPWR_W3
W4
XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMO N
PEX_CLKREQ#
CLK_PCIE_VGAP 9
CLK_PCIE_VGAN 9
PEG_RX0 9
PEG_RX#0 9
PEG_TX0 9
PEG_TX#0 9
PEG_RX1 9
PEG_RX#1 9
PEG_TX1 9
PEG_TX#1 9
PEG_RX2 9
PEG_RX#2 9
PEG_TX2 9
PEG_TX#2 9
PEG_RX3 9
PEG_RX#3 9
PEG_TX3 9
PEG_TX#3 9
G10
VDD33
G12
VDD33
G8
VDD33
G9
VDD33
+3V_GFX+3V_GFX
R103
EV@10K/F_4
1
Q17
EV@2N7002K
R99 *EV@0_4
0.4MM = 16mils
3
2
3
CLK_PEGA_REQ# 9
PU at page 9
PLACE CLOSE TO BGA
J8/K8
+3V_GFX
C152 EV@4.7u/6.3V_6
C515 EV@1u/6.3V_4
C146 EV@0.1u/10V_4
PLACE CLOSE TO GPU BALLS L8/M8
not GC6 2.0 unstuff resistor
PLACE CLOSE TO BGA
L8/M8
+3V_MAIN
C74 EV@4.7u/6.3V_6
C73 EV@1u/6.3V_4
C93 EV@0.1u/10V_4
C92 EV@0.1u/10V_4
PLACE CLOSE TO GPU BALLS L8/M8
+3V_GFX
+3V_MAIN
0.4MM = 16mils
GC6 2.0 PEGX_RST#
GPU_PEX_RST_HOLD#19
3
bga595-nvidia-n13p-gv2-s-a2
for meet Power down sequence
for +3V_GFX
+VGPU_CORE
+1.5V_GFX
D9 *EV@RB500V-40
D8 *EV@820@RB500V-40
No stuff D8 when GC6 support.
DGPU_HOLD_RST#10
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
SYS_PEX_RST_MON#
R451 *EVG@0_4
PLTRST#7,13,23,27,29,30,33
EV@0.1u/10V_4
R454 *EV@10K_4
R450 10K_4
2
1
C516
2
1
PCH control PEGX_RST#
U39E
11/14 NVVDD
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
L11
VDD
L13
VDD
L15
VDD
L17
VDD
M10
VDD
M12
VDD
M14
VDD
M16
VDD
M18
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
P10
VDD
P12
VDD
P14
VDD
P16
VDD
P18
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
T10
VDD
T12
VDD
T14
VDD
T16
VDD
T18
VDD
U11
VDD
U13
VDD
U15
VDD
U17
VDD
V10
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
COMMON
+3V_GFX
+3V
*EV@0.1u/10V_4
4
PEGX_RST#
U28
3 5
*EV@TC7SH08FU
+3V
U29
3 5
EV@TC7SH08FU
R457 *EV@0_4
+VGPU_CORE
C513
R449
EV@100K_4
4
2
C119
EV@4.7u/6.3V_6
C103
EV@4.7u/6.3V_6
+VGPU_CORE
+
C496
EV@330u/2V_7343
C491
*EV@22u/6.3V_8
+3V_GFX
R448
EVG@0_4
SYS_PEX_RST_MON# 19
2
PLACE UNDER GPU BALLS
C88
EV@4.7u/6.3V_6
C114
EV@4.7u/6.3V_6
C84
*EV@22u/6.3V_8
PEGX_RST# 19
C80
EV@4.7u/6.3V_6
4.7uF x 15 population x10
C111
*EV@4.7u/6.3V_6
C507
EV@47u/6.3V_8
C91
EV@22u/6.3V_8
C490
*EV@22u/6.3V_8
1
16
C112
EV@4.7u/6.3V_6
C129
*EV@4.7u/6.3V_6
47u x1 22u x7
stuff x 1
C508
EV@4.7u/25V_8
EV@4.7u/6.3V_6
C94
*EV@4.7u/6.3V_6
0817 RSVD more NVVDD caps by NV DG
C116
*EV@22u/6.3V_8
VDD33
+3V_GFX/
+3V_MAIN
NVDD
+VGPU_CORE
PXE_VDD
+1.05V_GFX
FBVDDQ
+1.35_GFX
C99
*EV@22u/6.3V_8
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
Date: Sheet of
Date: Sheet of
Date: Sheet of
C109
EV@4.7u/6.3V_6
C106
*EV@4.7u/6.3V_6
PLACE NEAR GPU
4.7u x6
330u x1
stuff x 5
RSVD by DG
C128
EV@4.7u/25V_8
C81
EV@4.7u/25V_8
EV@4.7u/25V_8
C127
*EV@22u/6.3V_8
+VGPU_CORE
0.1uF x 8 population x 4
C89 EV@0.1u/10V_4
C117 EV@0.1u/10V_4
C118 EV@0.1u/10V_4
C113 EV@0.1u/10V_4
C104 *EV@0.1u/10V_4
C98 *EV@0.1u/10V_4
C105 *EV@0.1u/10V_4
C115 *EV@0.1u/10V_4
t>0
t>0
N15x Power on sequance
PEX_RST timing
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
C124
EV@4.7u/6.3V_6
C131
*EV@4.7u/6.3V_6
C101
C492
*EV@4.7u/25V_8
ZYW
ZYW
ZYW
16 46Tuesday, April 29, 2014
16 46Tuesday, April 29, 2014
16 46Tuesday, April 29, 2014
C126
EV@4.7u/6.3V_6
C506
EV@4.7u/25V_8
3A
3A
3A
5
4
3
2
1
<VGA>
R413*EVG@0_4
R67*EV@60.4/F_4
R92*EV@60.4/F_4
C167EV@22u/6.3V_8
C108EV@0.1u/10V_4
C160EV@0.1u/10V_4
C87EV@0.1u/10V_4
R414EV@10K_4
TP14
FBA_DEBUG0
FBA_DEBUG1
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
L13
FB_CLAMP
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
+FB_PLLAVDD
+FB_PLLAVDD
EC_FB_CLAMP19,20,33
D D
FBA_CMD[30:0]21
C C
B B
+1.5V_GFX
VMA_CLK021
VMA_CLK0#21
VMA_CLK121
VMA_CLK1#21
+1.05V_GFX
EV@HCB1608KF/1A/30ohm_6
C87 close ball H22 35mA
A A
U39B
F3
FB_CLAMP
C27
FBA_CMD0
C26
FBA_CMD1
E24
FBA_CMD2
F24
FBA_CMD3
D27
FBA_CMD4
D26
FBA_CMD5
F25
FBA_CMD6
F26
FBA_CMD7
F23
FBA_CMD8
G22
FBA_CMD9
G23
FBA_CMD10
G24
FBA_CMD11
F27
FBA_CMD12
G25
FBA_CMD13
G27
FBA_CMD14
G26
FBA_CMD15
M24
FBA_CMD16
M23
FBA_CMD17
K24
FBA_CMD18
K23
FBA_CMD19
M27
FBA_CMD20
M26
FBA_CMD21
M25
FBA_CMD22
K26
FBA_CMD23
K22
FBA_CMD24
J23
FBA_CMD25
J25
FBA_CMD26
J24
FBA_CMD27
K27
FBA_CMD28
K25
FBA_CMD29
J27
FBA_CMD30
J26
FBA_CMD31
F22
FBA_DEBUG0
J22
FBA_DEBUG1
D24
FBA_CLK0
D25
FBA_CLK0
N22
FBA_CLK1
M22
FBA_CLK1
D18
FBA_WCK01
C18
FBA_WCK01
D17
FBA_WCK23
D16
FBA_WCK23
T24
FBA_WCK45
U24
FBA_WCK45
V24
FBA_WCK67
V25
FBA_WCK67
F16
FB_PLLAVDD
P22
FB_PLLAVDD
H22
FB_DLLAVDD
GF119NC
GF117
GF119
GF117FB_PLLAVDD
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25
D19
D14
C17
C22
P24
W24
AA25
U25
E19
C15
B16
B22
R25
W23
AB26
T26
F19
C14
A16
A22
P25
W22
AB27
T27
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
VMA_DQ[63:0]
For Fermi
FBA_CMD2
FBA_CMD3
FBA_CMD5
FBA_CMD18
FBA_CMD19
VMA_DM[7..0] 21
VMA_WDQS[7..0] 21
VMA_RDQS[7..0] 21
VMA_DQ[63:0] 21
R57 EV@10K/F_4
R48 EV@10K/F_4
R68 EV@10K/F_4
R447 EV@10K/F_4
R95 EV@10K/F_4
+1.5V_GFX
PLACE CLOSE TO GPU BALLS
sDDR3
R47=42.2/F
R50=51.1/F
R62EV@40.2/F_4
FB_CAL_PD_VDDQ
R47EV@42.2/F_4
FB_CAL_PU_GND
R50EV@51.1/F_4
FB_CAL_TERM_GND
D22
C24
B25
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
bga595-nvidia-n13p- gv2-s-a2
U39D
12/14 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
COMMON
B26
C25
E23
E26
F14
F21
G13
G14
G15
G16
G18
G19
G20
G21
H24
H26
J21
K21
L22
L24
L26
M21
N21
R21
T21
V21
W21
PLACE CLOSE TO GPU BALLS
+1.5V_GFX
+1.5V_GFX
C120 EV@0.1u/10V_4
C79 EV@0.1u/10V_4
C77 *EV@0.1u/10V_4
C71 *EV@0.1u/10V_4
C78 EV@1u/6.3V_4
C70 EV@1u/6.3V_4
C76 *EV@1u/6.3V_4
C65 *EV@1u/6.3V_4
C58 EV@4.7u/6.3V_6
C171 EV@4.7u/6.3V_6
C97 *EV@4.7u/6.3V_6
C24 *EV@4.7u/6.3V_6
C26 EV@10u/6.3V_6
C25 *EV@10u/6.3V_6
C53 *EV@10u/6.3V_6
C66 *EV@10u/6.3V_6
C23 EV@22u/6.3V_8
C424 EV@22u/6.3V_8
C426 *EV@22u/6.3V_8
C425 EV@22u/6.3V_8
PLACE CLOSE TO BGA
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
COMMON bga595- nvidia-n13p-gv2-s-a2
+
C41*EV@330u/2V_7343
+
C446EV@330u/2V_7343
13/14 GND
U39F
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
17
A2
AB17
AB20
AB24
AC2
AC22
AC26
AC5
AC8
AD12
AD13
A26
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AB11
AF1
AF11
AF14
AF17
AF20
AF23
AF5
AF8
AG2
AG26
AB14
B1
B11
B14
B17
B20
B23
B27
B5
B8
E11
E14
E17
E2
E20
E22
E25
E5
E8
H2
H23
H25
H5
K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
FB_VREF_PROBE
5
4
D23
COMMONbga595-nvidia-n13p- gv2-s-a2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
1
ZYW
ZYW
ZYW
3A
3A
17 46Tuesday, April 29, 2014
17 46Tuesday, April 29, 2014
17 46Tuesday, April 29, 2014
3A
5
<VGA> <HDM> <CRT>
U39G
4/14 IFPAB
GF119
AA6
IFPAB_RSET
V7
D D
C C
W7
W6
Y6
IFPAB_PLLVDD
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPAB
4
GF119
GF117
NC
GF117
NC
NC
NC
GF117GF119
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
GPIO14
COMMONbga595-nvidia-n13p- gv2-s-a2
AC4
AC3
Y3
Y4
AA2
AA3
AA1
AB1
AA5
AA4
AB4
AB5
AB2
AB3
AD2
AD3
AD1
AE1
AD5
AD4
B3
3
U39K
3/14 DACA
GF119
TSEN_VREF
GF117
NC
NC
NC
GF117
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
bga595-nvidia-n13p- gv2-s-a2 COMMON
U39I
6/14 IFPD
GF119
U6
IFPD_RSET
T7
IFPD_PLLVDD
R7
IFPD_PLLVDD
IFPD
R6
IFPD_IOVDD
GF119
GF117
NC
GF117
NC
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
I2CX_SDA
I2CX_SCL
2
GF119
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
GF119
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
B7
A7
AE3
AE4
AG3
AF4
AF3
DPDVI/HDMI
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
GPIO17
EV_CRTDCLK
EV_CRTDDAT
P4
P3
R5
R4
T5
T4
U4
U3
V4
V3
D4
R75 EV@2.2K_4
R74 EV@2.2K_4
1
18
U39H
5/14 IFPC
GF119
T6
IFPC_RSET
M7
IFPC_PLLVDD
N7
IFPC_PLLVDD
B B
P6
IFPC_IOVDD
NV_PLLVDD 0.3MM=12mils 78mA
L11 EV@HCB1608KF/1A/30ohm_6
+1.05V_GFX
GPU_SP_PLLVDD 0.3MM=12mils
+1.05V_GFX
A A
C125
EV@22u/6.3V_8
Near GPU
L12 EV@BLM15PX181SN1D(180,1.5A)_4
C132
EV@0.1u/10V_4
Under GPU
C147
EV@22u/6.3V_8
5
C145
EV@4.7u/6.3V_6
SP_VID_PLLVDD
C135
C138
EV@0.1u/10V_4
EV@0.1u/10V_4
close to balls one by one ball
NV_PLLVDD
GF117
NC
NC
NC
NC
R415 EV@10K/F_4
CLK_27M_VGA_2
XTALOUT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
U39M
L6
PLLVDD
M6
SP_PLLVDD
N6
VID_PLLVDD
A10
XTALSSIN
C11
XTALIN
EV@10p/50V_4
4
9/14 XTAL_PLL
C64
DVI/HDMI DP
I2CW_SDA
I2CW_SCL
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
TXC
TXC
GF119GF117
NC
1 3
2 4
EV@27MHZ
GF119
GF117
Y6
IFPC
IFPC_AUX
IFPC_AUX
IFPC_L3
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
GPIO15
COMMONbga595-nvidia-n13p- gv2-s-a2
N5
N4
N3
N2
R3
R2
R1
T1
T3
T2
C3
C60
EV@10p/50V_4
XTALOUTBUFF
XTALOUT
COMMONbga595-nvidia-n13p- gv2-s-a2
R416 EV@10K/F_4
C10
B10
XTALOUTCLK_27M_VGA_2
3
bga595-nvidia-n13p- gv2-s-a2 COMMON
U39J
J7
K7
K6
7/14 IFPEF
GF119
IFPEF_PLLVDD
IFPEF_PLLVDD
IFPEF_RSET
GF117
GF117
DVI-DL
I2CY_SDA
NC
NC
NC
NC
NC
I2CY_SCL
NC
TXC
NC
TXC
TXD0
NC
NC
TXD0
NC
TXD1
NC
TXD1
NC
TXD2
NC
TXD2
GF119
DVI-SL/HDMI
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPE
HPD_ENC
GF119
IFPF
GF117
NC
GF117
NC
DVI-DL
NC
NC
NC
NC
NC
TXD3
NC
TXD3
NC
TXD4
NC
TXD4
TXD5
NC
TXD5
NC
NC
H6
IFPE_IOVDD
J6
IFPF_IOVDD
bga595-nvidia-n13p- gv2-s-a2 COMMON
HPD_E
GF119
DVI-SL/HDMI
I2CZ_SDA
I2CZ_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_F
2
DP
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
GPIO18
DP
IFPF_AUX
IFPF_AUX
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
GPIO19
J3
J2
J1
K1
K3
K2
M3
M2
M1
N1
C2
H4
H3
J5
J4
K5
K4
L4
L3
M5
M4
F7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
DGPU 3/5 (Display)
DGPU 3/5 (Display)
DGPU 3/5 (Display)
ZYW
ZYW
ZYW
18 46Tuesday, April 29, 2014
18 46Tuesday, April 29, 2014
1
18 46Tuesday, April 29, 2014
3A
3A
3A
5
<VGA>
D D
R3
R418 EV@840@40.2K/F_4
N15V-GM NC
N15P-GT Stuff
R747 *EV@40.2K
R748 *EV@40.2K
C C
GPIO9_ALERT
DGPU_PSI
GPIO8_OVERT#
JTAG_TMS
JTAG_TDI
GPIO12_ACIN
GPU_PEX_RST_HOLD#
JTAG_TCK
JTAG_TRST#
EC_FB_CLAMP
B B
GPIO8 VGA thrmtrip# => inform EC
over temperature protect
GPIO8_OVERT#
+3V_GFX
A A
TP82
R774 EV@10K/F_4
R423 *EV@10K/F_4
R427 EV@10K/F_4
R110 *EV@10K/F_4
R109 *EV@10K/F_4
R432 EV@10K/F_4
R112 *EV@10K/F_4
R111 EV@10K/F_4
R85 EV@10K/F_4
1
Q38 EV@2N7002K
R428 *EV@0_4
JTAG_TCK
JTAG_TMS
JTAG_TDIJTAG_TDI
JTAG_TDO
JTAG_TRST#
R437 EV@10K/F_4
2
R433 *short_EV@0_4
N15S-GT Stuff
U39N
8/14 MISC1
E12
THERMDN
F12
THERMDP
AE5
JTAG_TCK
AD6
JTAG_TMS
AE6
JTAG_TDI
AF6
JTAG_TDO
AG4
JTAG_TRST
+3V_GFX
3
dGPU_OTP# 33
dGPU_OTP# = EC control
5
E10
F10
D1
STRAP0
D2
STRAP1
E4
STRAP2
E3
STRAP3
D3
STRAP4
C1
F6
F4
F5
PEGX_RST# 16
U39L
10/14 MISC2
VMON_IN0
VMON_IN1
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
GF119
STRAP5_NC
MULTISTRAP_REF0_GND
GF119
MULTISTRAP_REF1_GND
MULTISTRAP_REF2_GND
GF117
NC
NC
GF117
NC
NC
NC
GPIO12_ACIN
GF119
GF117
NC
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CB_SCL
I2CB_SDA
GF119
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO16
GPIO20
GPIO21
COMMONbga595-nvidia-n13p-gv2-s-a2
1
GF117
NC
NC
I2CS Slave Address= 0x9E (default)
D9
GFX_SCL
D8
GFX_SDA
A9
DGPU_EDIDCLK
B9
DGPU_EDIDDATA
C9
N13P_SCL
C8
N13P_SDA
FB_CLAMP_MON
C6
B2
D6
C7
F9
A3
3V_MAIN_EN
A4
B6
A6
GPIO8_OVERT#
F8
GPIO9_ALERT
C5
E7
D7
GPIO12_ACIN
B4
VGPU_PSI
D5
E6
C4
GPU_PEX_RST_HOLD#
GPIO21 N15x for GC6
dGPU_OPP# = EC control
3
Q39
EV@2N7002K
2
+3V_GFX
4
D12
ROM_CS
B12
ROM_SI
A12
ROM_SO
C12
ROM_SCLK
D11
BUFRST
D10
PGOOD
E9
CEC
COMMONbga595-nvidia-n13p-gv2-s-a2
R76 EVG@0_4
1
2
+3V_GFX
3V_MAIN_EN 20
PWM-VID 40
DGPU_PSI 40
dGPU_OPP# 33
GPIO12 AC detect
AC high
DC low
4
R56 EV@10K_4
ROM_SI
ROM_SO
ROM_SCLK
R425 *EV@10K_4
SYS_PEX_RST_MON# 16
R438EV@2.2K_4
R434EV@2.2K_4
R79EV@2.2K_4
R77EV@2.2K_4
3
R84 EVG@0_4
Q14
*EVG@2N7002K
GPU_PEX_RST_HOLD# 16
R83 *EVG@0_4
FB_CLAMP_REQ#_R
+3V_GFX
R70 *EVG@0_4
1
R78
2
EVG@10K/F_4
+3V_GFX
SMBus(VGA)
+3V_GFX
R439
EV@10K/F_4
EV@10K/F_4
GFX_SCL
GFX_SDA
ROM_SO
ROM_SCLK
ROM_SI
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SI
R64
EV@840@HY@SA-15k@820-10k@4.99K/F_4
EC_FB_CLAMP17,20,33
GC6_FB_EN 10,20
+3V_GFX
*EV@10K/F_4
R69
3
Q15
*EVG@2N7002K
+3V_MAIN
R442
Q40
4 3
1
EV@2N7002DW
5
2
6
3
Logical
Strapping Bit3
DEVID_SEL
SOR3_EXPOSED
RAMCFG[3]
3GIO_PADCFG[3]
PCI_DEVID[3] PCI_DEVID[1]
SOR3_EXPOSED
RESERVED PCIE_MAX SPEED DP_PLL_VDD33
+3V_MAIN
R59
*EV@4.99K/F_4
ROM_SI:
N15P-GT:
N15S-GT:
N15V-GM:
R71 *EVG@0_4
R72 *EVG@0_4
Strapping Bit2
PCIE_CFG
SOR2_EXPOSED
RAMCFG[2]
3GIO_PADCFG[2]
PCI_DEVID[2]
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
PCIE_SPEED_CHANGE_GEN3
N15S-GT Stuff 50K
R52
R58
*EV@4.99K/F_4
R49
EV@840@820-10k@4.99K/F_4
Please follow N15x latest RVL
Stuff 10K pull down
2ND_MBCLK 8,24,33
N15P-GT Stuff 50K
EV@840@49.9K/F_4_820@10K-check
*EV@4.99K/F_4
R53
EV@840@820-10k@4.99K/F_4
N15S-GT Stuff 4.99K
N15P-GT Stuff 4.99K
N15V-GM Stuff 10K
FB_CLAMP_REQ# 33
DGPU_EVENT# 10
STRAP0
STRAP1
STRAP2ROM_SO
STRAP3ROM_SCLK
STRAP4
LogicalLogical
Strapping Bit1
SMB_ALT_ADDR
SOR1_EXPOSED
RAMCFG[1]
USER[1]
3GIO_PADCFG[1] 3GIO_PADCFG[0]
R419
EV@820@10K/F_4-check
R420
EV@820@10K/F_4-check
EV@820@10K/F_4-check
Strapping Bit0
R66
R65
N15P-GT/ N15S-GT VRAM Configuration Table
2ND_MBDATA 8, 24,33
EC/S5VGA/VGA
N15V-GM VRAM Configuration Table:
QCI P/NVendor P/N
840M
N15V-GM-B-A2 AJ0N15V0T03
820M
3
AJ0N15S0T04N15S-GT-B-A2
2
Logical
VGA_DEVICE
SOR0_EXPOSED
RAMCFG[0]
USER[0]USER[3] USER[2]
PCI_DEVID[0]
+3V_GFX
R55
EV@820@10K/F_4-check
R54
EV@820@10K/F_4-check
4Gb
2Gb
4Gb
2Gb DDR3 128MBx16,1000MHz
1000
0010
XXXX
1111
0000
0100
0000
0111
R421
R61
EV@820@10K/F_4-check
EV@820@10K/F_4-check
0000 (0x0)
0010 (0x2) SAMSUNG
0110 (0x6)
0111 (0x7)
1000 (0x8)
Strap
[3:0]
0100 (0x4)
1101 (0xD) DDR3 256MBx16,1000MHz MICRON
1001 (0x9)
1110 (0xE)
0001 (0x1)
0101 (0x5) SAMSUNG
1100 (0xC)
*EV@10K/F_4
R60
R422
EV@820@10K/F_4
N15V-GM Stuff 10K
Mutil-level mode strapping:
For N15P-GT & N15S-GT :
R3=40.3k pull down.
1.ROM_SCLK =4.99K pull down
2.ROM_SO = 4.99K pull down
3.ROM_SI= Memory strap setting
3.STRAP0 = 50k Pull pu.
4.Strap4~1 = reserve Pull up
and Pull down
Binary mode strapping:
For N15V-GM-B sku:
Board_ID0=
H=N15V-GM,L=N15V-GL
Device ID=0x1140
R3= N.C.
1.ROM_SCLK =10K pull down.
2.ROM_SI= 10k pull down
3.ROM_SO= 10k pull down
4.Strap3~0 = RVL memory
binary mode setting.
5.Strap4 =10k pull down
DESCRIPTION
DDR3 256MBx16,1000MHz
DDR3 256MBx16,1000MHz
DDR3 256MBx16,1000MHz
DDR3 128MBx16,1000MHz
DDR3 128MBx16,1000MHz
DDR3 128MBx16,1000MHz
DESCRIPTION
DDR3 256MBx16,1000MHz
DDR3 256MBx16,1000MHz SAMSUNG
DDR3 128MBx16,1000MHz SAMSUNG
DDR3 128MBx16,1000MHz
DDR3 128MBx16,1000MHz
DevIDBrand Name
N15P-GT-A2 GeForce GTX 850M 0x1391
N15S-GT-B-A2 GeForce 840M
N15V-GM-B-A2
GeForce 820M
2
0x1341
0x1140
1
STRAP1~4: Reserve footprint for pull-up to 3V3_AON and pull-down to forward.
N15P-GT: NC
N15S-GT: NC
STRAP0~3:
N15V-GM: Memory strap setting Please follow N15x latest RVL "RVL-06891-001".
Logical Strap Bit Mapping
PU-VDD PD
4.99K
1000 0000
10K
1001 0001
15K
20K
1011 0011
24.9K
1100
30.1K
1101
1110 0110
34.8K
1111
45.3K
STRAP3
Optimus ---> 4.99k PD
Resistor P/N
4.99K---> CS24992FB26
10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29
24.9K---> CS32492FB16
49.9K--> CS34992FB10
30.1K---> CS33012FB18
34.8K---> CS33482FB22
45.3K---> CS34532FB18
Vendor
HYNIX
MICRON0001 (0x1)
HYNIX
MICRON
SAMSUNG
Vendor Vendor P/N
HYNIX
MICRON
HYNIX
Vendor P/NROM_SI
H5TC4G63AFR-11C
MT41J256M16HA-093G:E
K4W4G1646D-BC1A
H5TC2G63FFR-11C
MT41J128M16JT-093G:K
K4W2G1646Q-BC1A
H5TC4G63AFR-11C
MT41J256M16HA-093G:E
K4W4G1646D-BC1A
K4W2G1646Q-BC1A
MT41J128M16JT-093G:K
K4W2G1646E-BC1A
H5TC2G63FFR-11C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
QCI P/N
QCI P/N
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
1
19
00101010
0100
0101
0111
AKD5PGWTW13
AKD5MZDTW05
ZYW
ZYW
ZYW
19 46Tuesday, April 29, 2014
19 46Tuesday, April 29, 2014
19 46Tuesday, April 29, 2014
3A
3A
3A
5
4
3
2
1
20
3V MAIN POWER
+3V_GFX+3V_GFX
D D
+3V_GFX
R39
EV@10K_4
3V_MAIN_EN19
Q12
2
R44
*EV@10K_4
R46 *EV@200K_4
3
*EV@2N7002E
1
C62
*EV@0.022U/25V_4
C69
*EV@0.022U/25V_4
60mil
1
R73
2
*EV@AO3413
Q13
1A-7 2013/10/21 add R5331 for not GC6 support.
EV@NGC6@0_8
60mil
+3V_MAIN
3
N15V stuff not support GC6.
+3V_GFX
+3V
C C
R51 EV@4.7K_4
+3V_MAIN
B B
2
C61
*EV@1000p/50V_4
DGPU_PWROK
R107
EV@100K_4
Q9
1 3
EV@MMBT3904-7-F
U8
4
R36
EV@4.7K_4
C56
EV@1000p/50V_4
+3V
C164
EV@0.1u/10V_4
2
1
3 5
EV@MC74VHC1G08DFT2G
R105*EV@0_4
2
R40
EV@4.7K_4
Q10
1 3
EV@DTC144EU
R108 *short_4
GPU_PWR_GD
3V_MAIN_PWGD
R41
EV@100K/F_4
3V_MAIN_PWGD 40,41
+1.05V_GFX and GPU core power EN
GC6 need system 3V to control FBVDDQ
GPU_PWR_GD 40
HWPG_1.5VGFX 41
FBVDDQ_EN41
R101
EV@100K_4
+3V
C155
EV@0.1u/10V_4
5
4
U7 EV@SN74AHC1G32DCKR
2
1
3
R100 *EV@0_4
R102 EV@0_4
R106 *Short_EV@0_4
C158 *EV@0.1u/10V_4
GC6_FB_EN 10,19DGPU_PWROK10
EC_FB_CLAMP 17,19,33
GPU_PWR_GDGPU_PWR_GD_R
PD at GPU power side
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
ZYW
ZYW
ZYW
3A
3A
20 46Tuesday, April 29, 2014
20 46Tuesday, April 29, 2014
1
20 46Tuesday, April 29, 2014
3A
5
4
3
2
1
VMA_DQ[63..0]17
VMA_DM[7..0]17
VMA_WDQS[7..0]17
VRAM8
VREFC_VMA1
VREFD_VMA1
FBA_CMD917
D D
FBA_CMD1117
FBA_CMD817
FBA_CMD2517
FBA_CMD1017
FBA_CMD2417
FBA_CMD2217
FBA_CMD717
FBA_CMD2117
FBA_CMD617
FBA_CMD2917
FBA_CMD2317
FBA_CMD2817
FBA_CMD2017
FBA_CMD417
FBA_CMD1417
FBA_CMD1217
FBA_CMD2717
FBA_CMD2617
VMA_CLK017
VMA_CLK0#17
FBA_CMD317
FBA_CMD217
C C
FBA_CMD017
FBA_CMD3017
FBA_CMD1517
FBA_CMD1317
FBA_CMD517
Should be 240
Ohms +-1%
B B
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS1
VMA_RDQS1
VMA_DM1
VMA_DM0
VMA_WDQS0
VMA_RDQS0
FBA_CMD5
VMA_ZQ1
R63
EV@243/F_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_RDQS[7..0]17
VMA_DQ12
VMA_DQ9
VMA_DQ13
VMA_DQ11
VMA_DQ14
VMA_DQ10
VMA_DQ15
VMA_DQ8
VMA_DQ7
VMA_DQ0
VMA_DQ5
VMA_DQ3
VMA_DQ4
VMA_DQ2
VMA_DQ6
VMA_DQ1
+1.5V_GFX
Should be 240
Ohms +-1%
VREFC_VMA1
VREFD_VMA1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS2
VMA_RDQS2
VMA_DM2
VMA_DM3
VMA_WDQS3
VMA_RDQS3
FBA_CMD5
CHANNEL A: 1024MB DDR3X16
VRAM12
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
VMA_ZQ2 VMA_ZQ3
R426
EV@243/F_4
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMA_DQ21
F7
VMA_DQ19
F2
VMA_DQ20
F8
VMA_DQ18
H3
VMA_DQ23
H8
VMA_DQ16
G2
VMA_DQ22
H7
VMA_DQ17
D7
VMA_DQ31
C3
VMA_DQ24
C8
VMA_DQ30
C2
VMA_DQ26
A7
VMA_DQ28
A2
VMA_DQ27
B8
VMA_DQ29
A3
VMA_DQ25
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK117
VMA_CLK1#17
FBA_CMD1917
FBA_CMD1817
FBA_CMD1617
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS5
VMA_RDQS5
VMA_DM5
VMA_DM4
VMA_WDQS4
VMA_RDQS4
FBA_CMD5 FBA_CMD5
R94
EV@243/F_4
VRAM9
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VRAM13
VMA_ZQ4
R446
EV@243/F_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#H2
VDDQ#H9
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#E9
VDDQ#F1
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMA_DQ40
F7
VMA_DQ45
F2
VMA_DQ41
F8
VMA_DQ47
H3
VMA_DQ43
H8
VMA_DQ46
G2
VMA_DQ42
H7
VMA_DQ44
D7
VMA_DQ33
C3
VMA_DQ39
C8
VMA_DQ34
C2
VMA_DQ37
A7
VMA_DQ35
A2
VMA_DQ36
B8
VMA_DQ32
A3
VMA_DQ38
B2
+1.5V_GFX
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS7
VMA_RDQS7
VMA_DM7
VMA_DM6
VMA_WDQS6
VMA_RDQS6
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
21
VMA_DQ62
VMA_DQ58
VMA_DQ63
VMA_DQ56
VMA_DQ61
VMA_DQ57
VMA_DQ60
VMA_DQ59
VMA_DQ54
VMA_DQ48
VMA_DQ55
VMA_DQ50
VMA_DQ53
VMA_DQ51
VMA_DQ52
VMA_DQ49
+1.5V_GFX
FBA_CMD1717
VMA_CLK0
R45
EV@162/F_4
VMA_CLK0#
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
A A
+1.5V_GFX
C170 EV@1u/10V_4
C517 EV@1u/10V_4
C161 EV@1u/10V_4
C510 EV@1u/10V_4 C468 EV@1u/10V_4
5
+1.5V_GFX
C75 EV@10u/6.3V_6
C528 EV@1u/10V_4
C471 EV@1u/10V_4
C505 EV@1u/10V_4
C467 EV@1u/10V_4
C54 EV@1u/10V_4
R430
EV@1.33K/F_4
4
R429
EV@1.33K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
C473
EV@0.1u/10V_4
+1.5V_GFX
C458 EV@10u/6.3V_6
C466 EV@1u/10V_4
C514 EV@1u/10V_4
C163 EV@1u/10V_4
C83 EV@1u/10V_4 C527 EV@0.1u/10V_4
C149 EV@1u/10V_4
C55 EV@1u/10V_4
R43
EV@1.33K/F_4
R38
EV@1.33K/F_4
C59
EV@0.1u/10V_4
+1.5V_GFX
FBA_CMD117
C518 EV@10u/6.3V_6
C166 EV@10u/6.3V_6
C465 EV@0.1u/10V_4
C470 EV@0.1u/10V_4
C469 EV@0.1u/10V_4
C151 EV@0.1u/10V_4
3
FBA_CMD17
FBA_CMD1
10/14 modify
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
TP12
TP10
VMA_CLK1
R96
EV@162/F_4
VMA_CLK1#
+1.5V_GFX
C51 EV@10u/6.3V_6
C457 EV@10u/6.3V_6
C509 EV@0.1u/10V_4
C156 EV@0.1u/10V_4
C57 EV@0.1u/10V_4
2
+1.5V_GFX+1.5V_GFX +1.5V_GFX
R93
EV@1.33K/F_4
C130
R90
EV@1.33K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
EV@0.1u/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N15P- DDR3 VRAM 1/2
N15P- DDR3 VRAM 1/2
N15P- DDR3 VRAM 1/2
Tuesday, April 29, 2014
Tuesday, April 29, 2014
Tuesday, April 29, 2014
+1.5V_GFX
R452
EV@1.33K/F_4
1
R453
EV@1.33K/F_4
C512
EV@0.1u/10V_4
ZYW
ZYW
ZYW
3A
3A
3A
4621
4621
4621
5
4
3
2
1
22
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
5
4
3
2
Tuesday, April 29, 2014
PROJECT :
N13P DDR3 VRAM 2/2
N13P DDR3 VRAM 2/2
N13P DDR3 VRAM 2/2
ZYW
ZYW
ZYW
3A
3A
3A
4622
4622
1
4622
5
4
3
2
1
DP TO VGA
23
30mils
+3V
L8 80ohm@100MHz
D D
+3V
R89*1M_4
CRT_AUXP
R87*1M_4
CRT_AUXN
C C
IVDDO
C493
10u/6.3V_6
30mils
L31 80ohm@100MHz
C122
1u/6.3V_4
IVDDO_18
CRT_AUXP2
CRT_AUXN2
20mils
L32 80ohm@100MHz
10mils
change power net name from +5V to MCUVDDH
MCUVDDH
L33 80ohm@100MHz
link L5031 to +3V directly
(meet IVDDO vs OVDD sequence)
CRT_HPD2
C495
4.7u/6.3V_6
R862.2K_4
R4442.2K_4
C503 0.1u/10V_4
C502 0.1u/10V_4
C501 0.1u/10V_4
C500 0.1u/10V_4
C489 0.1u/10V_4
C487 0.1u/10V_4
RX_DVDD18
CRT_TXP02
CRT_TXN02
CRT_TXP12
CRT_TXN12
Add R5501 by FAE syggestion
CRT_HPD
CRT_TXP0_C
CRT_TXN0_C
CRT_TXP1_C
CRT_TXN1_C
CRT_AUXP_CCRT_AUXP
CRT_AUXN_CCRT_AUXN
10mils
C1230.1u/10V_4
C4990.1u/10V_4
C4940.1u/10V_4
MCUVDDH
10mils
C1210.1u/10V_4
C100
1u/6.3V_4
10mils
R88 1 0K_4
ISPSCL
ISPSDA
40
26
27
29
30
20
19
18
17
25
31
22
24
32
43
42
C482
0.1u/10V_4
C504
10u/6.3V_6
U27
HPD
RX0P
RX0N
RX1P
RX1N
RXAUXP
RXAUXN
DCAUXP
DCAUXN
AVCC
AVCC
PVCC
DVDD18
ASPVCC
PCSDA
PCSCL
C96
0.1u/10V_4
2
1
DDCSCL
37
DDCSDA
PWDNB
IVDDO
13
48
36
39
OVDD
OVDD
IVDDO38IVDDO
IVDD3335IVDD33
IT6513FN
GND
49
12
IVDD
IVDD14IVDD
46
44
IVDD
MCUVDDH
MCURSTN
VGADDCCLK
VGADDCSDA
NC/VGADETECT
IT6513N-QFN-48
C102
0.1u/10V_4
URDBG
ISPSCL
ISPSDA
VSYNC
HSYNC
VDDC
RSET
VDDA
COMP
XTALIN
XTALOUT
20mils
RX_DVDD18
C110
C483
0.1u/10V_4
0.1u/10V_4
20mils
+5VMCUVDDH
45
MCUVDDH
47
28
URDBG
15
R440 22/J_4
ISPSCL
R443 22/J_4
16
ISPSDA
23
R81 22/J_4
R82 22/J_4
21
3
VSYNC
4
HSYNC
C478
CRT_RED
CRT_GRE
CRT_BLU
27M_CRT_IN
27M_CRT_OUT
0.1u/10V_4
C475
0.1u/10V_4
C477
0.1u/10V_4
R435 100/F_4
C498
*10p/50V_4
10
11
IORP
9
IOGP
8
IOBP
41
5
VGA_RST
7
6
VGA_COMP
34
33
L1080ohm@100MHz
TP13
DDCCLK
DDCCLK 26
DDCDAT
DDCDAT 26
DDCCLK
DDCDAT
VSYNC 26
HSYNC 26
DAC_VDDC
C479
0.1u/10V_4
CRT_RED 26
CRT_GRE 26
CRT_BLU 26
DAC_VDDC
C476
20mils
0.1u/10V_4
Y10
1 3
2 4
*27MHZ
C497
*10p/50V_4
FAE: the current firmware we built in iT6513
were all enabled embedded crystal function.
20mils
L980ohm@100MHz
IVDDO_18
B B
TPM (TPM)
NPCT650AA0WX infromation:
R761 TPM_I@0_4
TPM_VDD
R760 TPM_N@0_4
24
10
19
5
U11
VSB
VDD3
VDD1
VDD2
C708
TPM@0.1U/10V_4
17
LAD3
20
LAD2/SPI_IRQ
23
LAD1/MOSI
26
LAD0/MISO
22
LFRAME/SCS
27
SERIRQ
21
LCLK/SCLK
15
CLKRUN/GPIO04
16
LRESET/SPI_RST
28
LPCPD
C707
TPM@0.1U/10V_4
GPX/GPIO2
GPIO0/XOR_OUT
GPIO3/BADD
GND2
GND14GND318GND4
TPM@NPCT620/650_TSSOP28
11
25
AL000650K00 : NPCT650AA0WX
AL009655K01 : SNI SLB9655TT1.2
TPM_VDD
C705
TPM@0.1U/10V_4
LPC_LAD38,27,33
LPC_LAD28,27,33
LPC_LAD18,27,33
LPC_LAD08,27,33
LPC_LFRAME#8,27 ,33
IRQ_SERIRQ10 ,33
PCLK_TPM9
A A
R767 TPM@2.2_6
+3V
CLKRUN#7,33
PLTRST#7,13,16,27,29,30,33
LPCPD#7
C674
TPM@10u/6.3V_6
R757 TPM@0_4
R756 TPM@0_4
C673 *TPM@10p/50V_4
R758 TPM_N@0_4
PLTRST#
D35 TPM_N@RB500V-40
C706
TPM@0.1U/10V_4
5
GPIO1
PP
TEST
NC1
NC2
NC3
NC4
+3VSUS
+3V_S5
TPM_VDD
TPM_VSB
R763 TPM_I@4.7K_4
R762 *TPM_I@4.7K_4
7
R764 *TPM_I@20K_4
6
TP147
2
TP148
1
R765 TPM_I@0_4
9
8
3
12
13
14
R768 *TPM_N@0_4
R769 TPM_N@0_4
SLB9665 PIN9 NC
R766 *TPM_N@10K_4
C704
TPM_N@10u/6.3V_6
4
PLTRST#
TPM_VSB
C709
TPM_N@0.1U/10V_4
TPM_VDD
NOTE:
1) The PP is an input signal with configurable polarity.
2) By default the PP functionality is disabled.
NOTE:
GPX signal is connected to the TCS_EN signal
of the PCI Express Root Complex of chipset.
NOTE:
GPIO_IF[0..3], GPX and PP are optional.
Leave them open if not used.
TPM Power Sequence
5 ms < t
0 < t
VSB
VDD
LRESET#
NOTE:
1) It is recommended to connect the TPM to the system's
standby voltage to improve performance.
2) If only one power plane is available in the system,
connect both VSB and VDD to that power source.
3) LRESET# must be asserted for at least 5 msec after
VSB power-up.
4) VSB may come up anytime before VDD power-up,
but not after VDD power-up.
GPIO_IF3
0
1
'1' - pin is left open.
'0' - pin is pulled down.
SELECTION BADD
EEh - EFh
7Eh - 7Fh
0 ms < t
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
Mini DP/HD3SS2521
Mini DP/HD3SS2521
Mini DP/HD3SS2521
1
ZYW
ZYW
ZYW
3A
3A
3A
23 46Tuesday, April 29, 2014
23 46Tuesday, April 29, 2014
23 46Tuesday, April 29, 2014
5
4
3
2
1
24
R396 LVD@0_4
R392 LVD@0_4
D D
2136_CFG1
2136_CFG0
MIICSCL
MIICSDA
INT_LVDS_BL_EN
47
49
U22
EPAD_GND
1
EDP_HPD2,25
EDP_AUXN2
EDP_AUXP2
INT_eDP_AUXP25
EDP_TXP02
EDP_TXN02
EDP_TXP12
EDP_TXN12
C C
INT_eDP_TXN125
INT_eDP_TXP125
INT_eDP_TXN025
INT_eDP_TXP025
INT_eDP_AUXN25
R406 EDP@0_4
R407 EDP@0_4
R408 EDP@0_4
R409 EDP@0_4
R410 EDP@0_4
R411 EDP@0_4
R405 LVD@1K_4
R412 LVD@100K_4
C464 LVD@0.1U/10V_4
C463 LVD@0.1U/10V_4
C462 LVD@0.1U/10V_4
C461 LVD@0.1U/10V_4
C460 LVD@0.1U/10V_4
C459 LVD@0.1U/10V_4
C48
LVD@0.1U/10V_4
DP_HPD
TEST_MODE
IV_EDP_AUXN
IV_EDP_AUXP
AVCC33
IV_EDP_TXP0
IV_EDP_TXN0
IV_EDP_TXP1
IV_EDP_TXN1
VCCK_V12
DP_REXT
R404
LVD@12K/F_4
DP_HPD
2
TEST_MODE
3
AUX_CH_N
4
AUX_CH_P
5
DP_V33
6
DP_GND
7
LANE0_P
8
LANE0_N
9
LANE1_P
10
LANE1_N
11
DP_V12
12
DP_REXT
LVD@RTD2136N
MODE_CFG148MODE_CFG0
CIICSCL13CIICSDA14SWR_VCCK/LDO_VCCK15GND16SWR_LX/LDO_FB17SWR_VDD/LDO_VDD18PWMOUT19PANEL_VCC20PWMIN21PVCC22TXE3+23TXE3-
VCCK_V12
46
44
42
41
45
MIICSCL
MIICSDA
40
43
VCCK
TXO0-
BL_EN
TXO0+
RTD2136N
39
38
37
TXO1-
TXO2-
TXO1+
TXO2+
36
TXOC-
35
TXOC+
34
TXO3-
33
TXO3+
32
TXE0-
31
TXE0+
30
TXE1-
29
TXE1+
28
TXE2-
27
TXE2+
26
TXEC-
25
TXEC+
24
INT_LVDS_EDIDCLK 25
INT_LVDS_EDIDDATA 25
INT_TXLOUT0- 25
INT_TXLOUT0+ 25
INT_TXLOUT1- 25
INT_TXLOUT1+ 25
INT_TXLOUT2- 25
INT_TXLOUT2+ 25
INT_TXLCLKOUT- 25
INT_TXLCLKOUT+ 25
INT_TXUOUT0- 25
INT_TXUOUT0+ 25
INT_TXUOUT1- 25
INT_TXUOUT1+ 25
INT_TXUOUT2- 25
INT_TXUOUT2+ 25
INT_TXUCLKOUT- 25
INT_TXUCLKOUT+ 25
0912 Need to PU 4.7K to +3V on IC or conn side
INT_LVDS_BL_EN
LVDS_PWM_2136
INT_LCDVCC_EN
R393 *LVD@100K_4
R391 LVD@100K_4
INT_LVDS_BL_EN 25
LVDS_PWM_2136 25
INT_LCDVCC_EN 25
CIICSCL
+3V
L7 LVD@HCB1608KF-221T20_2A
C49
LVD@10U/6.3V_6
+3V
L27 LVD@HCB1608KF-221T20_2A
C455
B B
LVD@10U/6.3V_6
LVD@0.1U/10V_4
Close to chip
AVCC33
C50
LVD@0.1U/10V_4
DVCC33
C456
C52
LVD@0.1U/10V_4
30mil For PIN18 W/O Panel_VCC Output
C453
LVD@0.1U/10V_4
Note:
1. C1,C4,C7,C8,C9,C16 should be closed to chip
2. C9 should be X5R material
3. R8 should be 12K olm with +/- 1%
4 Entire trace of Panel VCC should be wider than 80-mil
C454
LVD@22U/6.3V_6
C450
LVD@0.1U/10V_4
CIICSDA
20mil For PIN15
DVCC33
VCCK_V12
PIN17
Mode Configure Table(Power On Latch)
CFG0
0 1
CFG1
0
1
ROM ONLY Mode
EP Mode
EEPROM Mode
A A
: CFG0 4.7K pull low, CFG1 4.7K pull high
: CFG0 4.7K pull high, CFG1 4.7K pull low
: CFG0 4.7K pull high, CFG1 4.7K pull high
R399
*LVD@4.7K_4
2136_CFG0 2136_CFG1
R398
LVD@4.7K_4
5
X
ROM ONLY MODE
+3V+3V
R401
LVD@4.7K_4
R400
*LVD@4.7K_4
EP MODE
EEPROM MODE
EEPROM Mode
In EEPROM mode, an additional EEPROM is needed.
EEPROM should configure with following condition.
1- EEPROM with a size 8K-Byte
2- EEPROM device should be 2-byte addressing device
3- Slave address should configure as 0xA8
+3V
U6
8
VCC
WP
MIICSDA
MIICSCL
2136_CFG0
2136_CFG1
R31 *LVD@0_4
R33 *LVD@0_4
R397 *LVD@0_4
R402 *LVD@0_4
5
SDA
6
SCL
4
GND
*LVD@M24C64
I2C address=0xA8
4
*LVD@0.1U/10V_4
C47
7
3
A2
2
A1
1
A0
EP Mode
External device connect to DP2LVDS by
Pin13/Pin14, I2C protocol is used
Address=0x94&96x6A
CIICSCL
+3V
CIICSDA
DVCC33
PWM_IN
INT_LCDVCC_EN
LVDS_PWM_2136
R388 LVD@0_4
1
Q8A LVD@2N7002KDW_115MA
R37
LVD@4.7K_4
R42
LVD@4.7K_4
Q8B LVD@2N7002KDW_115MA
3
2,25
R387
LVD@100K_4
PCH_BRIGHT
Dual Mode Regulator Configuration
2.2-uH(L6) 0 Olm(R31)
Connect NC
SWR
LDO
To EC
6
2
5
34
2ND_MBCLK 8,19,33
0918 FAE suggest
SMbus connect to EC
2ND_MBDATA 8,19,33
PIN17
1. C18 10-uF capacitor should be X5R material
2. Inductor should be withstand current >600-mA
3. Capacitors should be closed to PIN17
VCCK_V12
NC Connect
L6 *LVD@TLPC3010C-4R7M
R32 LVD@0_4
C43
C46
LVD@22U/6.3V_6
LVD@0.1U/10V_4
2
VCCK_V12
VCCK_V12
C45
LVD@0.1U/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SWR MODE
LDO MODE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
eDP to LVDS
eDP to LVDS
eDP to LVDS
1
ZYW
ZYW
ZYW
3A
3A
24 46Tuesday, April 29, 2014
24 46Tuesday, April 29, 2014
24 46Tuesday, April 29, 2014
3A
1
LCD Power
INT_LCDVCC_EN24
A A
EDP_VDD_EN2
R389 LVD@0_8
R383 EDP@0_4
EDP_VDD_EN_R
1u/6.3V_4
2
R390 LVD@0_8
+3V
R385
100K_4
U21
5
IN
4
IN
3
ON/OFF
EDP@G5243AT11U
1
OUT
2
GND
C445
3
C447
*0.1u/10V_4
C451
*2.2u/10V_6
C449
0.1u/10V_4
LCDVCC
C448
0.01u/25V_4
4
C452
22u/6.3V_8
Backlight Control
PCH_BLON2,33
INT_LVDS_BL_EN24
R395 EDP@0_4
R394 LVD@0_4
5
+3V
+3VPCU
R749
R16
10K_4
*10K_4
Q6
2N7002DW
BL#
2
5
4 3
R29
100K_4
PCH_BLON_R
6
+3VPCU
+3V
R30
10K_4
6
1
R34
*100K_4
LID#
LID591#,EC intrnal PU
D7
1N4148WS
BL_ON
2
Q7
DTC144EUA
1 3
LID# 33
EC_FPBACK# 33
7
HALL IC
+3VPCU
C10 1u/10V_4
8
AL009247000 -- BCD
AL009132001 -- ANC Main source
AL008251000 -- YBT 2nd
1
2
21
HE6
APX9132H AI
3
D21
*VPORT_6
LID#
LVDS CONN
V_BLIGHT CCD_PWR
C13
LVD@4.7u/25V_8
+3V
USB_EDP_CCD_R
USB_EDP_CCD#_R
C8
LVD@1000p/50V_4
R379 *LVD@10K_4
R8 LVD@4.7K_4
R7 LVD@4.7K_4
R382 LVD@0_4
R381 LVD@0_4
EDP_HPD
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA
USB_CCD_R
USB_CCD#_R
V_BLIGHT
C14
INT_LVDS_EDIDCLK24
INT_LVDS_EDIDDATA24
INT_TXLCLKOUT-24
INT_TXLCLKOUT+24
INT_TXUCLKOUT-24
INT_TXUCLKOUT+24
*LVD@1u/6.3V_4
LVDS_PWM_2136
INT_TXLOUT0-24
INT_TXLOUT0+24
INT_TXLOUT1-24
INT_TXLOUT1+24
INT_TXLOUT2-24
INT_TXLOUT2+24
INT_TXUOUT0-24
INT_TXUOUT0+24
INT_TXUOUT1-24
INT_TXUOUT1+24
INT_TXUOUT2-24
INT_TXUOUT2+24
LCDVCC
CCD_PWR
LVDS_PWM_213624
+3V
*LVD@1u/6.3V_4
BL_ON
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA
USB_CCD#_R
USB_CCD_R
INT_TXLOUT0INT_TXLOUT0+
INT_TXLOUT1INT_TXLOUT1+
INT_TXLOUT2INT_TXLOUT2+
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUOUT0INT_TXUOUT0+
INT_TXUOUT1INT_TXUOUT1+
INT_TXUOUT2INT_TXUOUT2+
INT_TXUCLKOUTINT_TXUCLKOUT+
C6
C11
LVD@0.1u/10V_4_X7R
LVD@1000p/50V_4
CN7
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
G_5
G_4
G_1
G_0
LVD@50398-04071-001
V_BLIGHT
V_BLIGHT
CCD_PWR
C40
0.1u/10V_4_X7R
CN8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C22
1000p/50V_4
G_5
G_4
G_1
G_0
EDP@50398-04071-001
eDP CONN
B B
R11 *100K_4
R12 *100K_4
CCD (FCM)
9
USB_CCD
9
USB_CCD#
C C
Touch Panel (TSN)
9
USB_TOUCH
9
USB_TOUCH#
EDP_AUX_C
EDP_AUX#_C
R384 *short_4
R386 *short_4
R380 *short_4
R378 *short_4
VIN
C19
4.7u/25V_8
R14 *100K_4
R15 *100K_4
USB_EDP_CCD_R
USB_EDP_CCD#_R
USB_TOUCH_R
USB_TOUCH#_R
C9
1000p/50V_4
+3V
eDP
CCD-USB
Touch Panel
VIN
MAX 1.5A
C440
LCDVCC
+3V
+5V
PCH_BRIGHT2,24
EDP_HPD2,24
INT_EDP_AUXP24
INT_EDP_AUXN24
INT_EDP_TXP124
INT_EDP_TXN124
INT_EDP_TXP024
INT_EDP_TXN024
TS_EN33
GPIO810
PCH_BRIGHT
INT_EDP_AUXN
INT_EDP_TXP0
TS_EN
C20 .1U/16V_4
C21 .1U/16V_4
C444 .1U/16V_4
C443 .1U/16V_4
C442 .1U/16V_4
C441 .1U/16V_4
TP_PWR
C17
C18
0.1u/10V_4_X7R
1000p/50V_4
R9 *short_6
R10 *short_6
C12
*1u/6.3V_4 C15
R28 *short_6
R13 *short_6
TP77
TP75
R369 *short_4
TP76
*1u/6.3V_4
C16 *0.1u/10V_4_X7R
USB_EDP_CCD_R
USB_EDP_CCD#_R
USB_TOUCH_R
USB_TOUCH#_R
I2C1_SDA_GPIO6_CONN
I2C1_SCL_GPIO7_CONN
CCD_PWR
TP_PWR
BL_ON
EDP_HPD
EDP_AUX_CINT_EDP_AUXP
EDP_AUX#_C
EDP_TX1_C
EDP_TX1#_C
EDP_TX0_C
EDP_TX0#_CINT_EDP_TXN0
TP_RST#
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
2
3
4
5
6
Date: Sheet of
7
PROJECT :
LVDS/CAMERA/LID
LVDS/CAMERA/LID
LVDS/CAMERA/LID
ZYW
ZYW
ZYW
8
1A
1A
25 46Tuesday, April 29, 2014
25 46Tuesday, April 29, 2014
25 46Tuesday, April 29, 2014
1A
5
4
3
2
1
HDMI
From PCH
INT_HDMITX2N2
INT_HDMITX2P2
INT_HDMITX1N2
INT_HDMITX1P2
INT_HDMITX0N2
INT_HDMITX0P2
INT_HDMICLK+2
INT_HDMICLK-2
D D
C552 0.1u/10V_4
C553 0.1u/10V_4
C548 0.1u/10V_4
C550 0.1u/10V_4
C559 0.1u/10V_4
C561 0.1u/10V_4
C547 0.1u/10V_4
C546 0.1u/10V_4
EMI
INT_HDMITX2P_C
R583 *120/F_4
INT_HDMITX1P_C
INT_HDMITX0P_C
INT_HDMICLK+_C
C C
From PCH
HDMI_DDCCLK_SW2
HDMI_DDCDATA_SW2
INT_HDMITX2N_C
R580 *120/F_4
INT_HDMITX1N_C
R594 *120/F_4
INT_HDMITX0N_C
R575 *120/F_4
INT_HDMICLK-_C
I2C
+3V
R557
2
2.2K_4
+3V
R571
2.2K_4
Q43
1
1
3
2N7002K
+3V
2
Q44
3
2N7002K
INT_HDMITX2N_C
INT_HDMITX2P_C
INT_HDMITX1N_C
INT_HDMITX1P_C
INT_HDMITX0N_C
INT_HDMITX0P_C
INT_HDMICLK+_C
INT_HDMICLK-_C
+3V
R581
*100K/F_4 C213
+5V+3V
21
D11
RB501V-40
R554
2.2K_4
HDMI_DDCCLK_MB
+5V
21
D12
RB501V-40
R567
2.2K_4
HDMI_DDCDATA_MB
12
3
2
1
R574
470_4
Q45
2N7002K
12
R576
470_4
R246
470_4
12
12
12
12
R243
470_4
R230
R232
470_4
470_4
+5V
Q22
3
IN
AP2331SA-7
Power trace tracking
HDMI connector
10
11
12
13
14
15
16
17
18
19
HDMI_MB_HPD
CN12
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
HDMI connector
12
12
R239
R236
470_4
470_4
HDMI_DDCCLK_MB
1
OUT
2
GND
*220p/50V_4
D13
*EGA_4
HDMI_MB_HPD
R192 *short_4
12
R178
20K_4
HDMI_DDCDATA_MB
HDMI-detect
INT_HDMI_HPD2
+3V2,5,7,8,9,10,11,13,14,15,16,20,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,41
+5V23,25,26,28,31,32,35,39
HDMI_5V
R203
1M_4
HP_DET_CN
D24
*EGA_4
1
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
INT_HDMICLK-_C
D25
*EGA_4
+3V+3V
2
Q20
2N7002K
D23
*EGA_4
3
SHELL1
SHELL2
20
23
GND
22
GND
21
B B
Q16
3
+5V
+5V
U40
1
2
HSYNC23
A A
VSYNC23
HSYNC CRTHSYNC
3
1
2
VSYNC CRTVSYNC
3
5
OE#
VCC
A
Y
GND
M74VHC1GT125DF2G
U41
OE#
VCC
A
Y
GND
M74VHC1GT125DF2G
5
4
5
4
C85
0.1u/10V_4
+5V
C668
0.1u/10V_4
CRT_RED23
CRT_GRE23
CRT_BLU23
R445
R441
75/F_4
75/F_4
4
R436
75/F_4
C488
5.6p/16V_4
C485
5.6p/16V_4
3
1
OUT
IN
2
GND
AP2331SA-7
L30 BLM18BB470_6
L29 BLM18BB470_6
L28 BLM18BB470_6
C480
5.6p/16V_4
C481
5.6p/16V_4
C95 *0.1u/10V_4
CRTVDD5
CRT_R1
CRT_G1
CRT_B1 CRTHSYNC
C484
5.6p/16V_4
C486
5.6p/16V_4
C68 0.22u/6.3V_4
C72 *220p/50V_4
C82 0.1u/10V_4
C63 10p/50V_4
C86 10p/50V_4
C474 *10p/50V_4
C472 *10p/50V_4
10
6
7
2
8
3
9
4
5
1617
CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK
DDCDAT
CN9
111
12
13
14
15
CRT CONN
2
CRT_11
DDCDAT
CRTVSYNC
DDCCLK
TP11
DDCDAT 23
DDCCLK 23
Power trace tracking
DDCDAT
DDCCLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CRTVDD5
R4242.2K_4
R4312.2K_4
+3V2,5,7,8,9,10,11,13,14,15,16,20,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,41
+5V23,25,26,28,31,32,35,39
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI (PS8101)
HDMI (PS8101)
HDMI (PS8101)
ZYW
ZYW
ZYW
26 46Tuesday, April 29, 2014
26 46Tuesday, April 29, 2014
1
26 46Tuesday, April 29, 2014
1A
1A
1A
5
Mini Card 1 (MNC)
CN13
SSD_PRESENCE
+3V
C399
*NF@0.1u/10V_4
RESET_CPLTRST#
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
MINI-CARD1
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
C400
*NF@10U/6.3V_8
LED_WPAN#
LED_WLAN#
LED_WW AN#
SMB_DATA
W_DISABLE#
UIM_RESET
GND54GND
53
CN6
PRESERVE
GND
N/A
N/A
N/A
N/A
Key
Key
Key
Key
WWAN/S SDIND_N
N/A
N/A
GND
PERN1
PERP1
GND
PETN1
PETP1
GND
SATA RX+
SATA RXGND
SATA TXSATA TX+
GND
REFCLKN
REFCLKP
GND
KEY
KEY
PLATFORM PIN OUT
KEY
KEY
RESET
IFDET
GND
GND
GND
1.5A
R360 *short_8
SMB_CLK
UIM_VPP
UIM_DATA
UIM_PWR
NGFF
KEY B
BT_POWERON33
PLTRST#7,13,16,23,27,29,30,33
9
PCLK_DEBUG
D D
9
PCIE_TXP_WLAN
9
PCIE_TXN_WLAN#
9
PCIE_RXP_WLAN
9
PCIE_RXN_WLAN#
9
CLK_PCIE_WLAN
9
CLK_PCIE_WLAN#
C C
NGFF (NGF)
ZYW:
For port auto-configuration implementations,
follow the routing guidelines for SATA
but use 100 nF AC coupling capacitors
SATA_RXN_PERN6_L1#8
SATA_RXP_PERP6_L18
SATA_TXN_PETN6_L1#8
SATA_TXP_PETP6_L18
SATA_RXP_1ST_SSD8
SATA_RXN_1ST_SSD#8
SATA_TXN_1ST_SSD#8
SATA_TXP_1ST_SSD8
9
CLK_PCIE_NGFFN
9
SSD_SATA3GP
CLK_PCIE_NGFFP
SSD_SATA3GP
B B
8
R608 *short_4
PLTRST#
R609 *DBG@0_4
R610 *DBG@0_4
no-stuff in ZYW B-stage
Debug
6/25 Add R580/R581 by Kingston SSD.
C656 NF@0_4
C655 NF@0_4
C654 NF@0.1U/10V_4
C653 NF@0.1U/10V_4
C652 NF@0_4
C651 NF@0_4
C650 NF@0.1U/10V_4
C649 NF@0.1U/10V_4
+3V
R359
NF@10K_4
3
2
Q37
NF@2N7002
1
PCIE_CLKREQ_WLAN#_R
+3V_SATA
TP99
CL_DATA1_WLAN
CL_CLK1_WLAN
+WL_VDD
PCIE_WAKE#_R
R366 NF@0_4
R363
NF@1M_4
SSD_PEDET_R
R364
*NF@0_4
BT_PWRON_R
CL_RST1#_WLAN
CLK_PCIE_WLAN_C
CLK_PCIE_WLAN#_C
SATA_RXN_PERN6_L1#_C
SATA_RXP_PERP6_L1_C
SATA_TXN_PETN6_L1#_C
SATA_TXP_PETP6_L1_C
SATA_RXP_1ST_SSD_C
SATA_RXN_1ST_SSD#_C
SATA_TXN_1ST_SSD#_C
SATA_TXP_1ST_SSD_C
CLK_PCIE_NGFFN
CLK_PCIE_NGFFP
R723 *0_4
Card pin69 = Ground (SATA card)
A A
5
+3.3V
+1.5V
USB_D+
USB_D-
+1.5V
+3.3Vaux
PERST#
UIM_CLK
+1.5V
+3.3V
GND
GND
GND
GND
GND
GND
GND76GND
+3V_SATA
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
Device sleep
CLKREQ
PEWAKE
SUSCLK
77
4
+WL_VDD +1.5V_WLAN
USBP10_WLAN_L
USBP10_WLAN#_L
+3V_SATA
2
3.3Vaux
4
3.3Vaux
6
N/A
8
N/A
10
DAS#
12
Key
14
Key
16
Key
18
Key
20
N/A
22
N/A
24
N/A
26
N/A
28
N/A
30
N/A
32
N/A
34
N/A
36
N/A
38
40
N/A
42
N/A
44
N/A
46
N/A
48
N/A
50
PERST
52
54
56
MFG1
58
MFG2
60
KEY
62
KEY
64
KEY
66
KEY
68
70
3.3Vaux
72
3.3Vaux
74
3.3Vaux
NF@SSD_NGFF_CONN
NGFF-80149-2121-75P-KB
+3V_SATA
C414
NF@10u/6.3V_4
rating = 1000mA @ 128G
4
WLAN_CLK_SDATA
WLAN_CLK_SCLK
R588 *short_4
RF_EN
A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R
DAS
DEVSLP
R724 NF@0_4
R361 NF@0_4
Close mSATA conn.
+3V_SATA
C413
NF@0.1U/10V_4
TP98
R584 *short_4
R585 *short_4
R586*0_4
R587*0_4
PLTRST#
R589 *short_4
R590 *short_4
R591 *short_4
R592 *short_4
R593 *short_4
Debug
TP74
R362 NF@0_4
R365 *NF@100K_4
PLTRST#
CLK_PCIE_NGFF#_R
PCIE_NGFF_WAKE#_R
PCH_SUSCLK
C416
NF@0.1U/10V_4
C412
NF@0.1U/10V_4
9
USBP10_WLAN
9
USBP10_WLAN#
CLK_SDATA 8,13,14,15
CLK_SCLK 8,13,14,15
PLTRST# 7,13,16,23,27,29,30,33
RF_EN 33
LPC_LFRAME# 8,23,33
LPC_LAD3 8,23,33
LPC_LAD2 8,23,33
LPC_LAD1 8,23,33
LPC_LAD0 8,23,33
DEVSLP0
PLTRST# 7,13,16,23,27,29,30,33
PCH_SUSCLK 7
C418
NF@0.1U/10V_4
3
R611 *short_8
+3V
pin
1
10
10
21
38
53
55
56
58
68
69
9
CLK_PCIE_NGFF#
PCIE_LAN_WAKE#7,27,29
3
Type
PRESENCE
DAS#
WWAN/SSDIND_N This pin connect to Ground
Device Sleep Signal
REFCLKN
REFCLKP no connect on SSD
MFG1
MFG2
SUSCLK
IFDET This pin connect to Ground
S0
DSW
C580
10u/6.3V_6
Description
This pin is grounded on the SSD. May be used by host to
determine if slot is empty or populated
Device Activity Signal
If system didn't support DEVSLP, set DEVSLP Sleep Signal pin
power high and keep (from power on), device will ignore.
If system support DEVSLP, set DEVSLP Sleep Signal pin power low
(from power on) device, device will support DEVSLP function.
Device Sleep Signal H: SSD enter sleep model.
Device Sleep Signal L: SSD exit sleep model.
no connect on SSD
Manufacturing pin. Use determined by vendor. Must be a noconnect on the host board
Manufacturing pin. Use determined by vendor. Must be a noconnect on the host board
no connect on SSD
+3V_SATA
Q51
4 3
1
NF@2N7002DW
R709 *0_4
R726 *0_4
R719
5
NF@4.7K_4
2
6
C555
0.1u/10V_4
+3V_SATA
R718
NF@4.7K_4
2
C558
*0.1u/10V_4
9
PCIE_CLK_WLAN_REQ#
CLK_PCIE_NGFF#_R
PCIE_NGFF_WAKE#_R
2
+WL_VDD
PCIE_LAN_WAKE#7,27,29
C557
*0.1u/10V_4
500mA for +1.5V
C554
*1000p/50V_4
S0
DSW
C556
*0.1u/10V_4
4 3
1
1
+1.5V
R240 *0_6
+1.5V_WLAN+WL_VDD
C231
*10u/6.3V_8
+WL_VDD
+WL_VDD
R607
Q46
2N7002DW
R612 *0_4
R282 *0_4
R283
4.7K_4
4.7K_4
5
2
6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCIE_CLKREQ_WLAN#_R
PCIE_WAKE#_R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mini-Card/NGFF
Mini-Card/NGFF
Mini-Card/NGFF
1
26
ZYW
ZYW
ZYW
27 46Tuesday, April 29, 2014
27 46Tuesday, April 29, 2014
27 46Tuesday, April 29, 2014
1A
1A
1A
5
4
3
2
1
SATA
HDD1
HDD1 SATA Re-driver
27
HDD1
21
GND
GND
A_INp
A_INn
GND
B_OUTn
B_OUTp
GND
B_EQ1
A_EQ1
A_EQ2EN
B_EQ120A_EQ219A_EQ118B_EQ2
VDD6EN7B_DE8A_DE9REXT
B_DE
RD_POWER
Equalization level setting for Channel x(x=A/B),internally
pulled down
[x_EQ2, x_EQ1] ==
L/L: for channel loss up to 7.4dB
L/H: for channel loss up to 14.4dB
H/L: for channel loss up to 11.2dB
H/H: for channel loss up to 5dB
De-emphasis level setting for Channel x(x=A/B), internally
pulled down
[x_DE] ==
L: -3.5 dB
H: -1.5dB
RD_POWER
C615
RD@0.1u/10V_4
17
16
U35
25
GND
VDD
15
A_OUTp
14
A_OUTn
13
GND
12
B_INn
11
B_INp
24
GND
RD@PS8527A
10
A_DE B_EQ2
R638
RD@4.99K/F_4
SATA_TXP_1ST_HDD_C_RD
SATA_TXN_1ST_HDD#_C_RD
SATA_RXN_1ST_HDD#_C_RD
SATA_RXP_1ST_HDD_C_RD
D D
CN22
10
9
8
7
6
5
4
3
2
12
1
11
SATA_CONN
C C
SATA_TXP_1ST_HDD_C
SATA_TXN_1ST_HDD#_C SATA_TXN_1ST_HDD#_C_RD
SATA_RXN_1ST_HDD#_C
SATA_RXP_1ST_HDD_C
C619
+
*100u/6.3V_3528
C629 0.01U/25V_4
C630 0.01U/25V_4
C627 0.01U/25V_4
C625 0.01U/25V_4
C372
10u/6.3V_6
SATA_TXP_1ST_HDD_C_RD
SATA_RXN_1ST_HDD#_C_RD
SATA_RXP_1ST_HDD_C_RD
+5V_HDD1
120mil
C366
0.1U/16V_4
C370
0.1U/16V_4
R658 *short_8
+5V
Reference design "DNI"
EN
+1.5V
8
SATA_TXP_1ST_HDD
8
SATA_TXN_1ST_HDD#
SATA_RXN_1ST_HDD#8
SATA_RXP_1ST_HDD8
C602 *RD@0.1u/10V_4
R635 *short_RD@0/J_4
RD@10u/6.3V_6
C611 RD@0.01u/25V_4
C608 RD@0.01u/25V_4
C605 RD@0.01u/25V_4
C603 RD@0.01u/25V_4
R662 *RD@4.7K/J_4
C599
RD_POWER
RD@0.1u/10V_4
C601
SATA_TXP_1ST_HDD_IC
SATA_TXN_1ST_HDD#_IC
SATA_RXN_1ST_HDD#_IC
SATA_RXP_1ST_HDD_IC
A_EQ1
A_EQ2
B_EQ1
B_EQ2
A_DE
B_DE
RD_POWER
R664 *RD@4.7K/J_4
R663 *RD@4.7K/J_4
R661 *RD@4.7K/J_4
R665 *RD@4.7K/J_4
R637 *RD@4.7K/J_4
R636 *RD@4.7K/J_4
22
1
2
3
4
5
23
C600
RD@0.1u/10V_4
B B
ODD
CN14
14
GND14
1
GND1
2
RXP
RXN
GND2
TXN
TXP
GND3
+5V
+5V
MD
GND
GND
GND15
6030D-13G20
A A
SATA_TXP_ODD_C
3
SATA_TXN_ODD#_C
4
5
SATA_RXN_ODD#_C
6
SATA_RXP_ODD_C
7
8
DP
9
10
11
12
13
15
5
+5V_ODD
R600 10K_4
C597 0.01U/25V_4X
C596 0.01U/25V_4X
C591 0.01U/25V_4X
C589 0.01U/25V_4X
R616 10K_4
C583 *15p/50V_4
EC_ODD_EJ 33
+3V
+3V
C571
*0.1U/16V_4Y
C572
10U/6.3V_6X
+5V_ODD
4
SATA_TXP_ODD 8
SATA_TXN_ODD# 8
SATA_RXN_ODD#
SATA_RXP_ODD
ODD_PRSNT# 8
R618 *short_8
+
C573
*100U/6.3V_3528P_E45b
8
8
+5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
SATA HDD/LED/SW
SATA HDD/LED/SW
SATA HDD/LED/SW
ZYW
ZYW
ZYW
1A
1A
28 46Tuesday, April 29, 2014
28 46Tuesday, April 29, 2014
28 46Tuesday, April 29, 2014
1
1A
5
LAN
D D
LANVCC
R471 *short_8
C C
LANVCC+3V_S5
40 mils (Iout=1A)40 mils (Iout=1A)
C530
C529
10U/6.3V_6
0.1U/10V_4
Power trace tracking
2,5,7,8,9,10,11,13,14,15,16,20,23,24,25,26,27,28,30,31,32,33,35,36,37,38,39,40,41
5,7,8,9,10,11,13,23,32,33,35,38,40
+3V_S5
+3V
LANVCC
VDD10
VDD10
LANVCC
4
R124 2.49K/F_4
MDI_0+
MDI_0-
MDI_1+
MDI_1MDI_2+
MDI_2-
MDI_3+
MDI_3-
33
1
2
3
4
5
6
7
8
VDD10
U10
GND
MDIP0
MDIN0
AVDD10(NC)
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10
RSET
10 mils
32
RTL8111GS-CG
3
XTAL2
XTAL1
TP19
TP17
TP18
27
31
30
28
25
26
LED0
RSET
AVDD33
AVDD10
CKXTAL229CKXTAL1
LED1/GPO
LED2(LED1)
VDDREG(VDD33)
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
AVDD33(NC)11MDIP3(NC)9MDIN3(NC)
16
12
10
PCIE_REQ_LAN#_R
REGOUT
DVDD10(NC)
LANWAKEB
ISOLATEB
PERSTB
HSON
HSOP
24
REGOUT
23
VDDREG/VDD33
22
VDD10
21
20
ISOLATEB
19
18
GPP_RX2N_LAN
17
GPP_RX2P_LAN
1
3
C540 0.1U/10V_4
C543 0.1U/10V_4
CLK_PCIE_LAN#
CLK_PCIE_LAN
PCIE_TXN_LAN#
PCIE_TXP_LAN
C177 10P/50V_4
2
Y7
25MHZ +-30PPM
4
C178 10P/50V_4
PCIE_LAN_WAKE#_R
9
9
9
9
+3V
PLTRST# 7,13,16,23,27,30,33
PCIE_RXN_LAN#
PCIE_RXP_LAN
9
9
Consider VCC33 may be connected to Main
Power or chipset/bios's GPO, the pull-low
resistor R14 can be NC only when Main Power
or chipset/bios's GPO can ensure to drive the
ISOLATEB pin to a voltage level < 0.8V at the
system state S1~S5.
If the ISOLATEB pin can not be well-controlled to
a voltage level < 0.8V at S1~S5, the pull-low
resistor R14 is needed to make sure the LAN
chip is well isolated.
R163
1K_4
R146
*15K_4
2
+3V
R540 *10K/J_4
2
3
Q42
*2N7002K
R541 *short_4
+3V_S5
R487 10K/J_4
2
3
Q41 2N7002K
R488 *0_4
7,27
9
PCIE_REQ_LAN#
PCIE_LAN_WAKE#
1
1
1
PCIE_REQ_LAN#_R
PCIE_LAN_WAKE#_R
LANVCC
40 mils (Iout=1A)
C192
0.1U/10V_4
For RTL8111GS
* Place 0.1uF CAP close to each
VDD33 pin-- 11, 32
Tramsformer
B B
A A
C180
0.1U/10V_4
C194
4.7U/6.3V_6
5
R120 *short_8
C179
40 mils (Iout=1A)
4.7U/6.3V_6
MDI_0- MDI_0-_C
MDI_1+
MDI_1-
MDI_2+ MDI_2+_C
MDI_2- MDI_2-_C
MDI_3+ MDI_3+_C
MDI_3- MDI_3-_C
C536
0.01U/50V/X7R_4
R458 *short_4
R459 *short_4
R466 *short_4
R470 *short_4
R472 *short_4
R479 *short_4
R500 *short_4
R515 *short_4
VDDREG/VDD33
C186
0.1U/10V_4
C184
4.7U/6.3V_6
Remove For Not Using SWR mode
close to Pin23.
U31
10
11
12
1
2
3
4
5
6
7
8
9
TD1+
TD1TCT1
TCT2
TD2+
TD2-
TD3+
TD3TCT3
TCT4
TD4+
TD4-
NS692417
4
MDI_0+_CMDI_0+
MDI_1+_C
MDI_1-_C
MX1+
MX1MCT1
MCT2
MX2+
MX2-
MX3+
MX3-
MCT3
MCT4
MX4+
MX4-
RTL8111GS
40 mils (Iout=1A) 40 mils (Iout=1A)
24
LAN_MX0+
23
LAN_MX0-
22
21
20
LAN_MX1+
19
LAN_MX1-
18
LAN_MX2+
17
LAN_MX2-
16
15
14
LAN_MX3+
13
LAN_MX3-
Layout:All termination
signal should have 30
mil trace
L14 4.7uH
LAN_MCT
C511
220p/3KV_1808
3
(SWR mode) support
C172
4.7U/6.3V_6
R456
75/F_8
C173
0.1U/10V_4
R455
*1M_8
For RTL8111G(S)
* Place 0.1uF CAP close to each
VDD10 pin-- 3, 8, 22, 30
C542
0.1U/10V_4
D22
*BS4200N-C_1812
C538
0.1U/10V_4
C533
0.1U/10V_4
RJ45 Connector
2
LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX2+
LAN_MX2LAN_MX1LAN_MX3+
LAN_MX3-
C534
0.1U/10V_4
For RTL8111G(S)
* Place 1uF CAP close to each VDD10 pin-- 22 (reserve)
VDD10REGOUT
C537
C539
1U/6.3V_4
0.1U/10V_4
CN10
1
2
3
4
5
6
7
8
LAN_RJ45
9
10
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
LAN
LAN
LAN
PROJECT :
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
ZYW
ZYW
ZYW
F3A
F3A
F3A
4628
4628
4628
5
USB3.0 (UB3)
+5V_S5
USBON#
USB_OC1#
U34
5
IN
4
EN
G524B2T11U
1
OUT
2
GND
3
/OC
Close USB3.0
470P/50V_4
C604
C670
1u/6.3V_4
*10U/6.3V_8
D D
33
USBON#
9
USB_OC1#
C352
0.1u/10V_4
USBPWR0
C598
100U/6.3V_1206
C669
10U/6.3V_8
4
9
USBP0-
9
USBP0+
USBP0USBP0+
9
USB3_RXN1
9
USB3_RXP1
C593 *1.6P/50V_4
9
USB3_TXN1
9
USB3_TXP1
USB3_TXN1
USB3_TXP1
C584 0.1u/10V_4
C582 0.1u/10V_4
3
USB3_RXN1
USB3_RXP1
USB3_TXN1_C
USB3_TXP1_C
R628 *short_4
R629 *short_4C595 *1.6P/50V_4
R634 *short_4
R633 *short_4
R615 *short_4
R613 *short_4
2
USBPWR0
CN15
USB3.0 CONN
1
VBUS
1
USBP0-_R
USBP0+_R
USB3_RXN1_R
USB3_RXP1_R
USB3_TXN1_R
USB3_TXP1_R
C579
C585
*1.6P/50V_4
*1.6P/50V_4C351
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
12
USBP0-_R
USBP0+_R
USB3_RXN1_R
USB3_RXP1_R
USB3_TXN1_R
USB3_TXP1_R
11111010131312
1 2
RV10 *EGA_4
1 2
RV11 *EGA_4
1 2
RV13 *EGA_4
1 2
RV12 *EGA_4
1 2
RV9 *EGA_4
1 2
RV8 *EGA_4
1
29
G524B2T11U: Enable: Low Active /2.5A
USBP1-_R
USBP1+_R
USB3_RXN2_R
USB3_RXP2_R
USB3_TXN2_R
USB3_TXP2_R
C606
*1.6P/50V_4
USBPWR0
CN16
USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
for
ESD
+3VPCU
for
ESD
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
12
+3V
11111010131312
C710
39P/50V_4
C711
39P/50V_4
USBP1-_R
USBP1+_R
USB3_RXN2_R
USB3_RXP2_R
USB3_TXN2_R
USB3_TXP2_R
1 2
RV14 *EGA_4
1 2
RV15 *EGA_4
1 2
RV17 *EGA_4
1 2
RV16 *EGA_4
1 2
RV7 *EGA_4
1 2
RV6 *EGA_4
9
USBP1-
9
USBP1+
C C
Card Reader+ LED/B Connector
USB D/B (UB2)
USBPWR2
9
USBP6-
9
B B
USBP6
9
USBP7-
9
USBP7
+5V_S5
1u/6.3V_4
C357
9
USB_OC0#
USBON#
USB_OC0#
U14
5
IN
4
EN
G524B2T11U
1
OUT
2
GND
3
/OC
CN21
1
2
13
3
4
5
6
7
8
9
10
11
14
12
USB daughter board 196033-12011-3
Close USB3.0
C622
470P/50V_4
C623
0.1u/10V_4
USBPWR2
C624
*100U/6.3V_1206
USBP1USBP1+
USB3_RXN2
USB3_RXP2
USB3_TXN2
USB3_TXP2
C618 *1.6P/50V_4
C616 *1.6P/50V_4
PLTRST#7,13,16,23,27,29,33
USB3_TXN2
USB3_TXP2
9
9
9
9
C610 0.1u/10V_4
C607 0.1u/10V_4
+3VPCU
+3V
PWRLED#33
SUSLED#33
BATLED0#33
BATLED1#33
USBP4#9
USBP49
USB3_RXN2
USB3_RXP2
R780 0_4
R781 *0_4
USB3_TXN2_C
USB3_TXP2_C
R656 *short_4
R659 *short_4
R669 *short_4
R668 *short_4
R652 *short_4
R648 *short_4
CN18
Card reader+LED/B CONN
1
13
2
14
3
4
5
6
7
8
9
10
11
12
C609
*1.6P/50V_4
G524B2T11U: Enable: Low Active /2.5A
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
USB3(S&C)
USB3(S&C)
USB3(S&C)
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
5
4
3
2
Tuesday, April 29, 2014
ZYW
ZYW
ZYW
1
F3A
F3A
F3A
4629
4629
4629
5
Codec(ADO)
D D
+1.5VA
Analog
Digital
C407
10u/6.3V_4
ADOGND
Place next to pin 40
L23
+5V
PBY160808T-600Y-N(60,3A)
C401
0.1u/10V_4
C405
10u/6.3V_4
ADOGND
C404
0.1u/10V_4
near Codec
Low is power down
amplifier output
C C
C403
0.1u/10V_4
C639
1u/10V_4
placed close to codec
C402 10u/6.3V_4
+5V_PVDD
L_SPK+
L_SPKR_SPKR_SPK+
PD#
TP72
near Codec
R352 *short_6
+3V
C640
0.1u/10V_4
Place next to pin 1
DMIC_DAT_L
Tied at one point only under
the codec or near the codec
R326 *short_4
R319 *0_4
R316 *0_4
R315 *0_4
R314 *0_4
R357 *0_4
C631 *1000p/50V_4
C632 *1000p/50V_4
B B
ADOGND
Cap need near AVDD1 and AVDD2
power source input
DMIC_CLK_L
need check with
DMIC vender
+AZA_VDD
37
38
39
40
41
42
43
44
45
46
47
48
49
C420
*10p/50V_4
C39610u/6.3V_4
36
CPVDD
CBP
AVSS2
LDO2-CAP
AVDD2
PVDD1
SPK-L+
SPK-LSPK-RSPK-R+
PVDD2
PDB
SPDIFO/GP IO2
DGND
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP
+AZA_VDD
C641
10u/6.3V_4
R707 22_4
C419
10p/50V_4
35
CBN
C3981u/10V_4
34
CPVEE
DMIC_CLK
4
31
32
33
HP-OUT-L
HP-OUT-R
ALC283
close to codec
29
30
MIC2-VREFO
LINE1-VREFO-L
LINE1-VREFO-R
C386
10u/6.3V_4
ACZ_SDIN
C638 *22p/50V_4
HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF
INT_AMIC-VREFO
26
27
28
VREF
LDO1-CAP
MIC2-R/SLEEVE
R704 33_4
AVDD1
MIC2-L/RING2
PCH_AZ_CODEC_RST#
C385 2.2U/6.3V_4
C377 10u/6.3V_4
R333 100K_4
25
U17
AVSS1
24
LINE2-L
LINE2-L
23
LINE2-R
LINE2-R
22
LINE1-L
LINE1-L
21
LINE1-R
LINE1-R
20
NC
19
MIC1-CAP
18
SLEEVE
17
RING2
16
MONO-OUT
15
CODEC_JDREF
JDREF
14
Sense B
13
Sense A
12
1.6Vrms
PCBEEP BEEP_1
C634 1u/10V_4
PCH_AZ_CODEC_RST#
*5.5V/25V/410P_4
3
ADOGND
ADOGND
+5VA
C368
C371
0.1u/10V_4
10u/6.3V_4
Place next to pin 26
ADOGND
TP70
TP71
close to codec
C364 10u/6.3V_4
trace width of SLEEVE & RING2
are required at least 40mil and
its length should be asshort as possible
R324 20K/F_4
R325 39.2K/F_4
ADOGND
HP_JD#SENSEA
Placement near Audio Codec
R702 47K_4
R701
C633
4.7K_4
100p/50V_4
PCH_AZ_CODEC_RST# 8
PCH_AZ_CODEC_SYNC 8
DVDD_IO
PCH_AZ_CODEC_SDIN0
PCH_AZ_CODEC_BITCLK 8
PCH_AZ_CODEC_SDOUT 8
D28
12
8
ADOGND
Analog
Digital
D27 1N4148WS
D29 1N4148WS
R331 *0_4
R329 *short_4
C374
C373
10u/6.3V_4
0.1u/10V_4
Place next to pin 9
SPKR
PCBEEP_EC
+3V +1.5V
2
Grounding circuit(ADO)
PIN1, PIN4, PIN3, PIN6 are ANALOG
D-Mic
DMIC_DAT_L
DMIC_CLK_L
8,10
33
ADOGND
Q50
1
4 3
2N7002DW
R368*short_4
R367*short_4
D38
*TVS/6pF_4
6
2
5
12
SLEEVE
RING2
DMIC_DAT_C
DMIC_CLK_C
12
D39
*TVS/6pF_4
+3V
C662 10u/6.3V_4
C663 0.1u/10V_4
U20
6
VDD
5
DATA
4
D-MIC
HEADPHONE/MIC/LINE combo (AMP)
MIC2-VREFO
LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
LINE1-R
SLEEVE
RING2
HP-L2
HP-R2
R697 2.2K/J_4
R698 2.2K/J_4
R708 56/F_4
R703 56/F_4
C637 4.7U/6.3V_6
R706 4.7K_4
R705 4.7K_4
C636 4.7U/6.3V_6
FB1/FB2(SLEEVE/RING2) should choose DC resistance (Rdc) < 30m-ohm
to get the best audio performance for HP crosstalk
L43 BLM15AG121SN1D/120/500MA_4
L46 BLM15AG121SN1D/120/500MA_4
HP-L3
L45 BLM15AG121SN1D/120/500MA_4
HP-R3
L44 BLM15AG121SN1D/120/500MA_4
C645
C628
100p/50V_4
100p/50V_4
ADOGND
GND
CS
GND3CLK
C642
100p/50V_4
*14V/38V/100P_4
+3VPCU
1
2
C635
100p/50V_4
R710
100K_4
3
PJA138K
1
+3V
12
D36
*14V/38V/100P_4
2
Q52
R746
*0_4
R745
*short_4
+1.5V
12
D37
R715
*100K_4
R722 10K_4
C648
*1u/10V_4
HP-L4
HP-R4
HP_JD#
12
ADOGND
1
PCH_AZ_CODEC_RST#
D30
*14V/38V/100P_4
Combo Jack
CN23
4
3
1
2
5
6 7
SIT_2SJ3052-005111F
ADOGND
Mute(ADO)Codec PWR 5V(ADO)
+AZA_VDD
R351
*1K_4
PD#PD#
ANALOG DIGITAL
+5V
A A
C356
*0.1u/10V_4
C355
*10u/6.3V_6
close pin3
L42 HCB2012KF220T60/6A/22ohm_8
U15
3
OUT
IN
2
GND
1
SET
SHDN
*G923-330T1UF
R358 *0_4
5
4
5
ADOGND
R322 *29.4K/F_4
R323
*10K/F_4
C363
*10u/6.3V_6
+5VA
ADOGND
C365
*0.1u/10V_4
Internal Speaker
R_SPK+
R742 *short_6
R_SPK-
R741 *short_6
L_SPK-
R740 *short_6
L_SPK+
R739 *short_6
4
R354
*10K/J_4
D33 *RB500V-40
D20 RB500V-40
Need Check P/N and F/P
40mil for each signal
C660
C661
1000P/50V_4
Place these EMI components next to codec
1000P/50V_4
C659
1000P/50V_4
3
AMP_MUTE#
R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1
C666
1000P/50V_4
33
CN26
1
2
345
6
SPK_CONN_4P
Level shift
R353
*10K_4
3
+1.5V+3V
Q36
*PJA138K
Codec PWR 1.5V(ADO)
2
1
PCH_AZ_CODEC_RST#PD#_R
ANALOG DIGITAL
+1.5V
C417
1U/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Audio
Audio
Audio
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
Tuesday, April 29, 2014
Date: Sheet of
2
Tuesday, April 29, 2014
L24 HCB1608KF-121T30_3A_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZYW
ZYW
ZYW
1
+1.5VA
F3A
F3A
F3A
4630
4630
4630
5
MX0 33
MX1 33
MX2 33
MX3 33
MX4 33
MX5 33
MX6 33
MX7 33
MY17 33
MY16 33
MY15 33
MY14 33
MY13 33
MY12 33
MY11 33
MY10 33
MY9 33
MY8 33
MY7 33
MY6 33
MY5 33
MY4 33
MY3 33
MY2 33
MY1 33
MY0 33
+3VPCU
MX4
MX5
MX6
MX7
<EMI>
MX4
MX5
MX6
MX7
MY3
MY2
MY1
MY0
MY7
MY6
MY5
MY4
MY11
MY10
MY9
MY8
MY15
MY14
MY13
MY12
MX0
MX1
MX2
MX3
RP7
10
9
8
7 4
*10K_10P8R
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
MX3
2
MX2
3
MX1
MX0
56
2
4
CP10
6
*220P_8P4R
8
2
4
CP6
6
*220P_8P4R
8
2
4
CP7
6
*220P_8P4R
8
2
4
CP8
6
*220P_8P4R
8
2
4
CP9
6
*220P_8P4R
8
2
4
CP11
6
*220P_8P4R
8
KEYBOARD (KBC)
CN19
1
MX0
2
MX1
3
MX2
4
MX3
5
MX4
6
MX5
7
MX6
8
MX7
9
MY17
10
MY16
11
D D
KB CONN
MY15
12
MY14
13
MY13
14
MY12
15
MY11
16
MY10
17
MY9
18
MY8
19
MY7
20
MY6
21
MY5
22
MY4
23
MY3
24
MY2
25
MY1
26
MY0
27
28
FAN1 For CPU (THM)
+3V
C C
33
CPUFAN1
R206
1K/J_4
2
1 3
Q21
MMBT3904-7-F_200MA
+5V
R167
10K/J_4
33
FANSIG1
FAN_PWM_CN1
30mil
For EMI
+3V
R193
10K/J_4
C197
*220p/50V_4
+5V
R173
*short_8
+5V_FAN1
C191
*220p/50V_4
CN11
4
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)
+TPVDD
R301
2
*DTC144EU
2.2K_4
Q54
1 3
I2C_TP_SDA_R
I2C_TP_SCL_R
I2C0_SDA_GPIO610
I2C0_SCL_GPIO710
PTP_PWR_EN#
6
345
2
1
FAN1
3
R298
2.2K_4
R300 *TDI@0_4
Q48
1
4 3
+3V VIN
R782
*10K_4
*DTC144EU
6
2
5
2N7002DW
R299 *TDI@0_4
+3V
2
1 3
Q55
R785
*1M_6
R784
*1M_6
+TPVDD
I2C_TP_SDA_R
I2C_TP_SCL_R
+TPVDD
2
2
C614
0.1u/10V_4
TPD_INT#2,33
TPD_EN33
+3V
C410
0.1u/25V_4
+5V_S5
R776 *0_6
1
R775
10K/J_4
C236
0.1u/25V_4
Q53
+3V
C353
0.1u/25V_4
+5V_S5
2
50mil
3
AO3413
C713
*1000p/50V_4
+3V
C376
0.1u/25V_4
+5V_S5
+
C712
0.22u/25V_6
+TPVDD
+TPVDD
TPCLK_R
TPDATA_R
I2C_TP_SDA_R
I2C_TP_SCL_R
TPD_INT#
+3V
C665
0.1u/25V_4
+5V_S5
C714
0.1u/10V_4
R771 0_6
+3V_S5
L22 *0_6
+3VSUS
L21 *0_6
+3V
PTP_PWR_EN#33
R309
R308
10K_4
10K_4
TPCLK33
TPDATA33
C613
*0.1u/10V_4
R783
*22_8
3
Q56
*2N7002K
1
R304 *short_4
R303 *short_4
C612
*0.1u/10V_4
Stitch Caps (EMC)
TP CONN pin7: Interrupt#/Wake#
TP CONN pin8: LID close, Function off
+3V +3V
+3V
+5V_S5
C214
0.1u/25V_4
C409
0.1u/25V_4
CN17
1
2
3
4
5
6
789
TP CN
+5V
C408
0.1u/25V_4
+5V_S5
+3V
C165
0.1u/25V_4
VIN
10
+5V
+5V_S5
1
+TPVDD
C415
0.1u/25V_4
+3V
C150
0.1u/25V_4
VIN
+5V
C421
0.1u/25V_4
+5V_S5
+3V
VIN
+TPVDD
TPD_INT#
C715
*10p/50V_4
C229
0.1u/25V_4
+5V
C358
0.1u/25V_4
+5V_S5
+3V
VIN
32
R302
10K/J_4
+5V
C664
0.1u/25V_4
+5V_S5
C290
0.1u/25V_4
2
Q29
NBSWON#
0.1u/10V_4
C7
+5V
+3VPCU
R317
KBL@10K_4
1 3
R6
10K_4
5
2
2 1
+5V
1
3
D6
*VPORT_6
C362 *KBL@2.2u/6.3V_6
Q28
KBL@AO3413
+5V_KB
1
C621
KBL@4.7u/6.3V_6
C620 -> EOD
SW6
POWER_SW
3
42
5
6
C620
*KBL@0.01u/16V_4
CN20
346
2
5
1
KBL@KB_backlight
4
HOLE9
*HG-C315D110P2
8
9
123
HOLE13
*HG-C315D110P2
8
9
123
HOLE21
*HG-C315D110P2
8
9
123
67
5
4
67
5
4
67
5
4
HOLE22
*HG-C315D110P2
8
9
123
HOLE17
*HG-C315D110P2
8
9
123
HOLE23
*hg-tc315i236bc315d110p2
67
5
8
4
9
123
HOLE7
*CPU-BKT
123
67
5
4
67
5
4
KB_BL LED (KBL)
B B
KB_BL_LED33
KBL@DTC144EU
Power Switch. (FSW)
A A
NBSWON#13,33
3
4
NUT (OTH)
HOLE18
*HG-C315D110P2
67
5
8
4
9
123
HOLE20
*HG-C315D110P2
8
9
123
67
5
4
HOLE10
*H-C110D110N
1
HOLE24
*hg-tc315bc236d110p2
8
9
2
67
5
4
123
HOLE14
EV@H-C236D138P2
1
HOLE19
*HG-C315D110P2
8
9
123
HOLE6
EV@H-C236D138P2
1
67
5
4
67
5
8
4
9
123
HOLE15
*HG-C315D110P2
HOLE8
*HG-C315D110P2-V5
6
5
4
123
Mini card nutsGPU nuts
HOLE12
EV@H-TC236I138BC236D138P2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
HOLE16
H-C217D61P2
1
ZYW
ZYW
ZYW
32 46Tuesday, April 29, 2014
32 46Tuesday, April 29, 2014
1
32 46Tuesday, April 29, 2014
HOLE11
*HG-C315D110P2
8
9
123
67
5
4
3A
3A
3A
5
EC(KBC)
R293 2.2_6
1 2
+3VPCU
C716
0.1u/10V_4
D D
+3VPCU_EC and +3V_RTC
minimum trace width 12mils.
+3VPCU
D19
SDMK0340L-7-F
R287
100K_4
2 1
1 2
C307
1u/6.3V_4
C C
1A-5 2013/10/18 change U27. 87 for Touch p ad ID
B B
CLK_PCI_EC
R622
*22_4
C587
*10p/50V_4
for I2C/PS2 so lution switch.
Please do not place any
pull-up resistor
on GPG0, GPG2, and GPG6
(Reserved
hardware strapping).
WRST#
L37
BLM15AG121SN1D/0.5A/120ohm_4
C590
0.1u/10V_4
ECAGND
12 mils
C323 0.1u/10V_4
0.1u/10V_4
LPC_LFRAME#8,23,27
HWPG_1.05V_EC#5
BT_POWERON27
PCH_SLP_SUS#7
PCH_SPI_CLK_EC8
SPI_CS0#_UR_ME8
PCH_SPI_SI_EC8
PCH_SPI_SO_EC8
C346
0.1u/10V_4
LPC_LAD08,23,27
LPC_LAD18,23,27
LPC_LAD28,23,27
LPC_LAD38,23,27
PLTRST#7,13,16,23,27,29,30
CLK_PCI_EC9
TP30
IRQ_SERIRQ10,23
SIO_EXT_SMI#10
SIO_EXT_SCI#10
SIO_RCIN#10
PCH_BLON2,25
SUSON35,37
MAINON37,39
EC_PWROK5,7
KB_BL_LED32
TP40
TPD_EN32
TP31
AMP_MUTE#31
ACIN34
TEMP_MBAT34
TS_EN25
PCBEEP_EC31
D/C#34
TP34
TP36
MY1632
MY1732
CPUFAN132
S5_ON35,36,39
ME_WR#8
MY032
MY132
MY232
MY332
MY432
MY532
MY632
MY732
MY832
MY932
MY1032
MY1132
MY1232
MY1332
MY1432
MY1532
C318
0.1u/10V_4
+3V
C577
0.1u/10V_4
R281 *short_6
PLTRST#
PROCHOT_EC
SIO_A20GATE
R779 0_4
BT_POWERON
E51_TXD
S5_ON
C259
0.1u/10V_4
C285
0.1u/10V_4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
119
123
80
104
33
88
81
87
109
108
71
72
73
35
34
107
95
94
105
101
102
103
56
57
32
100
106
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
MX032
MX132
MX232
MX332
MX432
MX532
MX632
MX732
4
+A3VPCU
12 mils
+3V_RTC
+3VPCU_EC
C258
0.1u/10V_4
+3V_EC
U13
LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)
LPCPD#/WUI6/GPE6(Dn)
GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up)
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)
DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/GPF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)
ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X)
ADC7/CTS1#/WUI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7(Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5
KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(Up)
SSCE0#/GPG2(X)
SSCE1#/GPG0(X)
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
C274
11
114
VCC
VSTBY26VSTBY50VSTBY92VSTBY
LPC
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
121
VSTBY
UART port
65
3
74
VBAT
AVCC
+3VPCU_ECPLL
127
IT8587
1
L36
BLM15AG121SN1D/0.5A/120ohm_4
3
L19
BLM15AG121SN1D/0.5A/120ohm_4
C265 R261 10K_4
VSTBY
0.1u/10V_4
84
EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)
82
EGAD/WUI25/GPE1(Dn)
HWPG
97
20
19
WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)
L80LLAT/WUI7/GPE7(Up)
L80HLAT/BAO/WUI24/GPE0(Dn)
GPIO
WAKE UP
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)
VSS
VSS27VSS49VSS
VSS
91
113
VSS
VCORE
AVSS
12
75
122
C295
0.1u/10V_4
ECAGND
+3VPCU_EC
(For PLL Power)
93
CLKRUN#/WUI16/GPH0/ID0(Dn)
SMCLK0/GPB3(X)
SMDAT0/GPB4(X)
SMCLK1/GPC1(X)
SMDAT1/GPC2(X)
PECI/SMCLK2/WUI22/GPF6(Up)
SMDAT2/WUI23/GPF7(Up)
PS2CLK0/TMB0/CEC/GPF0(Up)
PS2DAT0/TMB1/GPF1(Up)
SM BUS
PS2CLK2/WUI20/GPF4(Up)
PS2DAT2/WUI21/GPF5(Up)
PS/2
PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)
PWM
TACH0A/GPD6(Dn)
TACH1A/TMA1/GPD7(Dn)
TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)
PWRSW/GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)
ADC4/WUI28/GPI4(X)
A/D D/A
TACH2/GPJ0(X)
DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)
CLOCK
SUSC# 7,13
SUSB# 7,13
EC_ODD_EJ 28
PTP_PWR_EN# 32
CLKRUN# 7,23
ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
GPJ1(X)
CK32KE/GPJ7
CK32K/GPJ6
IT8587E/FX
+3VPCU_EC +3V +3V_EC
D40
*EGA_4
110
MBCLK
111
MBDATA
115
2ND_MBCLK
116
2ND_MBDATA
117
EC_PECR_R
118
85
86
89
90
24
25
28
SUSLED#
29
30
31
CPUFAN2
47
48
FANSIG2
120
124
125
NBSWON#
18
dGPU_OPP#
21
112
ICMNT
66
67
C594 10u/6.3V_6
68
69
70
FB_CLAMP_REQ#
76
77
EC_FB_CLAMP
78
79
2
128
R268 *0_4
ZYW use internal crystal,
so if CK32K(Pin 128) N/A should be connect GND.
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
MBCLK 34
MBDATA 34
2ND_MBCLK 8,19,24
2ND_MBDATA 8,19,24
R263 43_4
EC_FPBACK# 25
TP37
LID# 25
TPCLK 32
TPDATA 32
PWRLED#
BATLED1#
SUSLED#
BATLED0#
APWORK 7
TP41
FANSIG1 32
TP42
DNBSWON# 7
DPWROK 7
NBSWON# 13,32
dGPU_OPP# 19
SB_ACDC 34
RSMRST# 7
RF_EN 27
ICMNT 34
ECAGND
TPD_INT# 2,32
VRON 38
FB_CLAMP_REQ# 19
dGPU_OTP# 19
EC_FB_CLAMP 17,19,20
PCH_PWROK 5,7
USBON# 30
PCH_SUSACK# 7
PCH_SUSPWARN# 7
Battery
PCH/VGA
SM Bus 3
D41
*EGA_4
H_PECI 4
30
30
30
30
SM Bus 4
D42
*EGA_4
2
S5_ON
dGPU_OTP#
dGPU_OPP#
MAINON
SUSON
VRON
PCH_SPI_SI_EC
PCH_SPI_SO_EC
R778 *10K_4
R627 *10K_4
R625 100K_4
R262 100K_4
R632 100K_4
R260 *10K_4
R259 *10K_4
SM BUS PU(KBC)
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
PROCHOT_EC
2
R289
100K_4
HWPG(KBC)
DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP
HWPG_1.5V39
HWPG_1.05V5
HWPG_VDDR37
HWPG_1.05V_S513,36
SYS_HWPG35
R264 4.7K_4
R604 4.7K_4
R603 4.7K_4
R602 4.7K_4
3
Q27
2N7002K
1
D1
D18 RB500V-40
D2
D17 *RB500V-40
D16 *RB500V-40
D15 *RB500V-40
D14 *RB500V-40
1
+3VPCU
+3V_GFX
+3VPCU
+3V_S5
H_PROCHOT# 4,34,38
+3V
R623
10K_4
33
HWPG
3/5VPCU reset switch (FSW)
A A
SW7
3/5V_SW
1
5
3
42
5
6
C617
0.1u/16V_4
12
D26
*14V/38V/100P_4
SYS_SHDN# 10,35,39
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
ZYW
ZYW
ZYW
3A
3A
33 46Tuesday, April 29, 2014
33 46Tuesday, April 29, 2014
1
33 46Tuesday, April 29, 2014
3A
5
PJ6
1
2
3
456
7
D D
dcjk-2dc2003-000111-3p-v
POWER_JACK
C C
ACIN33
ACPRESENT7
SB_ACDC33
B B
PJ7
89
7
6
5
4
3
2
458-00801-v02-8p-l
1
10
50
A A
PU10
*IP4223-CZ6
1
CH1
2
VN
CH23CH3
Add ESD diode base on EC FAE suggestion
*100p/50V_4
CH4
VP
PC11
0.1u/50V_6
PR185
*short 0_4
PC51
0.1u/50V_6
PC53
6
5
4
5
PR118
100_4
MBDATA
MBCLKTEMP_MBAT
PR51
*10K_4
PR182
*0_4
PR119 *short 0_4
PR116 100_4
PC55
*47p/50V_4
PR115
100_4
+3VPCU
PC10
2200p/50V_6
+3VPCU
PR62
100K_4
6
2
1
TEMP_MBAT
PR117 1M_4
PC54
*47p/50V_4
MBCLK 33
MBDATA 33
PC120
PR50
0.1u/25V_4
100K_4
5
PQ54
2N7002DW
4 3
TEMP_MBAT 33
+3VPCU
4
VA1
PC12
0.1u/50V_6
PD6
1N4148WS
recommend 200mA at least.
PR63
*short 0_6
+3VPCU
PR209
10K_4
PR186
*10K_4
PR204
316K/F_4
PR90
*100K_4
3
24737_BM#
2
PQ26
*2N7002K
1
4
PR76
20_1206
MBDATA
MBCLK
PR203
100K/F_4
PR193
10K/F_4
2 1
PR195
*short 0_4
PR197
*short 0_4
24737_CMPOUT
24737_ILIM
PC141
0.01u/25V_4
ICMNT33
PD9
SMAJ20A
PR69
63.4K/F_4
24737_ACDET
24737_VCC
PC132
0.47u/25V_6
24737_BM#
24737_CMPIN
PR187
*100K_4
PC13
0.1u/50V_6
PC126
0.1u/50V_6
6
20
5
8
9
11
3
10
4
PR75
*1.62K/F_4
ACDET
VCC
ACOK#
SDA
SCL
BM#
CMPOUT
ILIM
CMPIN
3
PR22
220K_4
PR20
220K_4
0.1u/50V_6
2
BQ24737RGRR
IOUT
7
PC136
100p/50V_4
3
PC128
ACP
21
PQ38
AOL1413
1
3
1 6
PU15
GND
GND22GND24GND23GND
24737_CMPOUT
2
3
1
ACN
25
PQ6
IMD2AT108
24737_ACP
24737_ACN
PC127
0.1u/50V_6
REGN
BTST
HIDRV
PHASE
LCDRV
PGND
SRP
SRN
PR74
*0_4
5
4
16
24737_REGN
17
24737_BST
18
24737_DH
19
24707_LX
15
14
PR207 10_6
13
PR208 7.5_6
12
Limit set on 60W/3.16A
4
PR47
*100K_4
52
+1.05V
2
VA2
PD10
SBR1045SP5-13
1
2
PR21
*short 0_4
PR196
*short 0_6
24737_SRP
24737_SRN
3
PQ19
*2N7002K
1
3
PC143
1u/16V_6
PD11
RB500V-40
PC138
47n/50V_6
PC152
0.1u/25V_4
PC157
0.1u/25V_4
PC153
0.1u/25V_4
H_PROCHOT# 4,33,38
2
PR170
0.02/F_0612
1 2
D/C# 33
4
4
2
1
VIN
PR173
*short 0_4
24737_ACN
24737_ACP
PR172
*short 0_4
1
1
PQ55
MDV1528
PQ59
MDV1528
2200p/50V_6
52
3
52
3
PC140
6.8uH_7X7X3
PR99
*4.7_6
PC41
*680p/50V_6
PL13
PC131
0.1u/50V_6
24737_SRPBAT-V
24737_SRN
VIN
PR215
*short 0_4
PC133
4.7u/25V_8
1 2
PC137
2200p/50V_6
PR211
0.01/F_0612
PR219
*short 0_4
1
3
PR82
33K/F_4
PQ25
2N7002K
PC40
2200p/50V_6
PQ60
AOL1413
2
4
PR81
10K_4
3
1
PC142
10U/25V_8
34
52
BAT-V24737_DL
PC160
10U/25V_8
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
Pin10 ILIM=0.793V
Rsr = 0.01ohm
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ZYW
2A
2A
34 46Tuesday, April 29, 2014
34 46Tuesday, April 29, 2014
1
34 46Tuesday, April 29, 2014
2A
5
4
3
2
1
PR110
*4.7_6
PC52
0.1u/50V_6
+5V_S5+3V_S5
3
1
PR217
22_8
PR100
22_8
PQ27
2N7002K
SYS_SHDN#
PC144
2200p/50V_6
PQ57
MDV1528
PQ63
MDV1595S
+15V_ALWP
2
SYS_SHDN# 10,33,39
SYS_HWPG33
SYS_SHDN#
PR78
*short 0_4
52
4
3
1
PC37
0.1u/50V_6
4
3
3
PC154
0.1u/50V_6
4
3
TDC : 3A
PEAK : 4A
Width : 120mil
2
1
2
1
VIN +5VPCU
PR56
*1M_6
S5D MAIND MAIND S5D
PC28
*2.2n/50V_4
4
+15VVIN
3
1
52
1
PD8
1PS302
PD12
1PS302
PR57
1M_6
PQ17
2N7002K
3
PC158
0.1u/50V_6
*short 0_4
51225_DH1
PR89
51225_VBST1
51225_SW1
1/F_6
51225_DL1
51225_FB1
52
PQ62
MDV1528Q
1
+5V_S5
+3VPCU
PR77
51225_EN1
PC150
0.1u/50V_6
PR71
*100K/F_4
20
16
17
18
15
14
PR199
*short 0_6
VL 3V_LDO
PC46 10u/6.3V_6
7
PGOOD
EN1
DRVH1
VBST1
SW1
DRVL1
2
VFB1
VO1
19
51225_VCLK
52
4
3
TDC : 4.16A
PEAK : 5.54A
Width : 180mil
13
VREG5
TPS51225RUKR
CS11CS25VCLK
51225_CS1
PR66 118K/F_4
MDV1528Q
1
PU8
51225_CS2
PR65 69.8K/F_4
PQ58
35
PR97
*short 0_6
PR194
10K/F_4
PC45 0.1u/25V_4
3
VREG3
PR67
*short 0_6
3
PC33 4.7u/6.3V_6
6
EN2
10
DRVH2
9
VBST2
8
SW2
11
DRVL2
4
VFB2
21
GND
22
GND
GND23GND24GND25GND
+3VPCU
4
3
TDC : 2.15A
PEAK : 2.86A
Width : 100mil
SYS_SHDN#
51225_DH2
51225_VBST2
51225_SW2
51225_DL2
51225_FB2
52
PQ53
MDV1528Q
1
+3V +3V_S5
PC36
PR83
0.1u/50V_6
1/F_6
1/13 Adding +3VSUS power for touch pad
(By acer request)
+3VPCU+5VPCU
2
SUSON33,37
3
PQ52
AO3404
1
TDC : 0.89A
PEAK : 1.18A
Width : 40mil
51225_VIN
12
VIN
26
+5V
+3VPCU_VIN
PC146
2200p/50V_6
52
PQ56
3
3
1
52
1
*DTC144EU
MDV1528
PQ61
MDV1595S
2
PQ66
PL14
3.3uH_7X7X3
PR101
*4.7_6
PC48
*680p/50V_6
PR231
*1M_6
PR230
1 3
*1M_6
2
4
4
1 2
PC145
4.7u/25V_8
+3VPCU
3.3 Volt +/- 5%
TDC : 3.7A
PEAK : 5A
OCP : 7A
Width : 160mil
+3V_SRC
PR189
6.81K/F_4
PR190
10K/F_4
+3VSUS
2
JP13
*short 0.001/F_3720
VIN
+3VPCU
12
JP16
*short 0.001/F_3720
+
PC44
0.1u/50V_6
OCP:7A
L(ripple current)
=(9-3.3)*3.3/(3.3u*0.355M*9)
~1.784A
Iocp=7-(1.784/2)=6.108A
Vth=6.108A*14mOhm+1mV=86.5117mV
R(Ilim)=(86.5117mV*8)/10uA
~69.21K
PR229
*22_8
3
PQ65
*2N7002K
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PC155
220u/6.3V_6X4.2
+15VVIN
VIN +3VPCU
PR232
PR233
*1M_6
*1M_6
2
3
2
*2N7002K
1
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
SUSD
PQ64
PC172
*2.2n/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
3
1
TDC : 0.038A
PEAK : 0.05A
Width : 20mil
ZYW
35 46Tuesday, April 29, 2014
35 46Tuesday, April 29, 2014
35 46Tuesday, April 29, 2014
PQ67
*AO3404
+3VSUS
2A
2A
2A
MAIND
D D
+5VPCU
12
C C
B B
A A
33,36,39
S5_ON
VIN
+5VPCU
5 Volt +/- 5%
TDC : 7.2A
PEAK : 9.6A
OCP : 12A
Width : 300mil
JP17
*short 0.001/F_3720
+5V_SRC
PC139
220u/6.3V_6X4.2
OCP:12A
L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
Iocp=12-(3.367/2)=10.3165A
Vth=9.316A*14mOhm+1mV=145.431mV
R(Ilim)=(145.431mV*8)/10uA
=116.35K
2
PQ16
DTC144EU
12
+
+
PC161
0.1u/50V_6
1 3
5
JP15
*short 0.001/F_3720
1 2
PC104
33U/25V_6x4.5
PR45
1M_6
PR41
1M_6
MAIND 36,39
PR192
15.4K/F_4
PR191
10K/F_4
2
3
1
+5VPCU_VIN
PC147
4.7u/25V_8
2.2uH_7X7X3
+15V
PR32
22_8
PQ14
2N7002K
PL15
PC50
*680p/50V_6
2
5
4
3
2
1
JP8
*short 0.001/F_3720
1 2
D D
+3V
PR87
100K/F_4
PQ9
*PDTC143TT
12
VIN
1
3
2
5
PGOOD
EN
TRIP
TST
GND
PR28
*1M_4
PR29
*1M_4
HWPG_1.05V_S513,33
S5_ON33,35,39
C C
OCP=9A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=10-(1.555/2)*14mohm
=115.12mV
Rlimit=115.12mV/10uA*8=92.09Kohm
B B
MODPHY_EN10
A A
PR200
*short 0_4
PR88 93.1K/F_4
PR84 464K/F_4
PR85
*100K/F_4
20131225 Modify power circuit for VCCSATA3PLL timing,
(add PR228 , no stuff PR26)
+3V
12
PR228
*100K_4
PR27
*0_4
12
PC22
*1u/10V_4
PR26
*100K_4
51211V_EN 51211V_VBST
51211V_TRIP
51211V_TST
2
1 3
7
V5IN
PU7
TPS51211DSCR
GND13GND14GND15GND
16
2
DRVH
VBST
SW
DRVL
GND
4
3
1
FB
+5VPCU
PC31
1u/10V_4
51211V_DRVH
9
10
8
51211V_SW +1V_SRC
6
51211V_DRVL
11
51211V_FB
*short 0_6
PR61
PC30
0.1u/50V_6
PQ51
MDV1595S
52
PQ49
4
4
MDV1528
3
1
52
3
1
PC111
2200p/50V_6
PL9
2.2uH_7X7X3
PR43
*4.7_6
PC26
*680p/50V_6 PR86
PC110
4.7u/25V_8
PR198
5.1K/F_4
10K/F_4
VFB=0.7V
+1.05V_S5
2
3
1
PQ48
*AO3404
+1.05V_MODPHY +1.05V
connect +1.05V power to VCCHSIO,VCCUSB3PLL
and VCCSATAPLL directly
+1.05V_MODPHY
R750 *short_8
PR34
*22_8
PQ13
*2N7002K
+15V+1.05V_MODPHY
PR31
*1M_4
PQ12
*2N7002K
MODPHY_D
PC23
*2.2n/50V_4
3
2
1
+1.05V_MODPHY
PC114
0.1u/50V_6
MAIND35,39
TDC : 1.43A
PEAK : 1.9A
Width : 80mil
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
VIN
+1.05V_S5
1 2
JP11
*short 0.001/F_3720
+
PC115
330u/2.5V_6X4.2
+1.05V
1.05 Volt +/- 5%
TDC : 4.85A
PEAK : 6.47A
OCP : 9A
Width : 320mil
+1.05V_S5
5
4
MAIND
213
TDC : 4.85A
PEAK : 6.47A
Width : 200mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+1.05V_S5 (TPS51211)
+1.05V_S5 (TPS51211)
+1.05V_S5 (TPS51211)
ZYW
1
PQ46
AON6756
36 46Tuesday, April 29, 2014
36 46Tuesday, April 29, 2014
36 46Tuesday, April 29, 2014
36
+1.05V
2A
2A
2A
5
4
3
2
1
TDC : 0.75A
PEAK : 1A
Width : 40mil
D D
TDC : 0.38A
PEAK : 0.5A
DDR_VTTREF
Width : 20mil
PC118
0.22u/10V_4
+3V
PR178
100K/F_4
PC122
20
17
16
19
18
26
51216_REF
PR184
10K/F_4
C C
HWPG_VDDR33
MAINON33,39
SUSON33,35
PR177
*0_4
PR176
*short 0_4
PR39
200K/F_4
PR38
93.1K/F_4
51216_S3
51216_S5
51216_MODE
51216_TRIP
VREF=1.8V
B B
51216_S551216_S3
PR36
*0_4
0.1u/10V_4
PGOOD
S3
S5
MODE
TRIP
PAD
+DDR_VTT_RUN
PC105
10u/6.3V_6
21
22
PAD
REF
8
6
51216_REFIN
5
PAD
TPS51216RUKR
REFIN
9
37
PC112
10u/6.3V_6
Close to IC
Greater than or equal 40mil
+5VPCU
JP9
PC24
12
14
15
13
11
10
PR46
*short 0_6
10u/6.3V_6
51216_DRVH
51216_VBST
51216_SW
51216_DRVL
PR179
2/F_6
2
3
1
4
VTT
VTTREF
VDDQSNS
PU13
25
VTTSNS
VTTGND
PAD24PAD
VLDOIN
V5IN
DRVH
VBST
SW
DRVL
PGND
GND
PAD
7
23
PC117
1u/10V_4
PC106
0.1u/50V_6
PQ47
MDV1528
52
4
3
1
52
4
3
1
PQ50
MDV1595S
RDSon=2.2mohm
51216_VIN
PC103
2200p/50V_4
PR42
*4.7_6
PC25
*680p/50V_6
PC102
4.7u/25V_8
PL11
2.2uH_7X7X3
+1.35VSUS_SRC
PC121
0.1u/50V_6
Close to output cap
*short 0.001/F_3720
1 2
JP10
*short 0.001/F_3720
1 2
+
PC101
330u/2.5V_6X4.2
VIN
+1.35VSUS
1.35 Volt +/- 5%
TDC : 5.3A
PEAK : 7A
OCP : 9A
Width : 220mil
+1.35V_SUS
+1.35V_SUS 4,5,14,15
PR49
PR35
DDR_VTTT_PG_CTRL4
OCP=9A
L ripple current
A A
=(19-1.35)*1.35/(2.2u*400k*19)
=1.425A
Vtrip=9-(1.425/2)*14mohm
=116.024mV
Rlimit=116.024mV/10uA*8=92.82Kohm
5
*short 0_4
30.1K/F_4
51216_S3
PC123
0.01u/25V_4
DDR=1.35V
OCP=9A
PR84=10K/F_4
PR86=30.1K/F_4
4
Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge
S3 S5
S0
S3 (mainon off)
S4/S5
1
0
1
1
3
ON
ON ON
OFF
VTTREF+1.35VSUS
ON ON
OFF
OFF OFF0 0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
ZYW
2A
2A
2A
37 46Tuesday, April 29, 2014
37 46Tuesday, April 29, 2014
37 46Tuesday, April 29, 2014
1
5
4
3
2
1
VIN
+VCC_CORE
+VCC_CORE
ZYW
38
2A
2A
2A
JP6
IMON offset
+VIN_VCCIN
D D
C C
B B
111
PR
2M/F_4
PR216
51624_OCP-I
2M/F_4
102
30K/F_4
PR
69
PC
PR141
0.1u/10V_4
H_PROCHOT#4,33,34
VR_SVID_CLK5
VR_SVID_ALERT#5
VR_SVID_DATA5
IMVP_PWRGD5,10
VRON_CPU5
VRON33
20131014 add
VCC_SENSE5
VSS_SENSE12
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
PR128 *short 0_4
PR218 *0_4
PR221 *short 0_4
Parallel
51624_VRON
PR112
100K/F_4
+1.05V
56_4
PR140
PR139
*75/F_4
130/F_4
+3V
PR120
100K/F_4
*100K/F_4
+VCC_CORE
PR114
*100K/F_4
PR133
*10_4
PR132
*10_4
Close to the
CPU side.
PR222
BW-U 28W 1 phase
Location Value
PR79 CS22212FB11
PR122 CS32262FB15
PR94 CS45232FB00
A A
PR223 CS24752FB12
PR98
CS35622FB10
CS44122FB00PR109
+3V_S5 51624_VREF +5V_S5
PR94
1_6
PR130
PC62
1u/6.3V_4
PR95
36.5K/F_4
20K/F_4
PC67
0.33u/6.3V_4
PR93
665K/F_4
PR104
PR105
100K/F_4
Close to VR
51624_O-USR
51624_F-IMAX
51624_VREF
*56_4
PR225
PR134 *short 0_4
PR135 *short 0_4
PR136 *short 0_4
+3V+3V
PC66
*330p/50V_4
PC61
*0.01u/50V_4
51624_CLK
51624_ALERT#
51624_DATA
51624_SKIP#
51624_VRON
51624_VFB
51624_GFB
51624_VREF
PR129 *short 0_4
PR131 *short 0_4
PR223 4.7K/F_4
51624_VDD
9
2
27
10
VDD
VREF
O-USR
30
VR_HOT
31
VCLK
32
ALERT
1
VDIO
3
PGOOD
7
SKIP
8
VR_ON
24
VFB
23
GFB
51624_COMP
PC63
PR137
10K/F_4
*100p/50V_4
PR138
4.75K/F_4 PR106
F-IMAX
PU9
TPS51624RSM
OCP-I12IMON
DROOP25COMP
13
26
51624_DROOP
51624_IMON
51624_OCP-I
PC70
1500p/50V_4
BW-U 28W 2 phase
Location Value
PL12
PL16 0.24uH_7X7X4
PR79 1.82K/F_4
PR126
*22.6K/F_4
PR122
PR201 2.67K/F_4
PC144
0.15u/10V_4
PR94 294K/F_4
Location Value
PR105 56.2K/F_4
PR223 2.37K/F_4
PR138 10K/F_4
PR109 150K/F_4
PR123
PC162
PC165
Place NTC close to the
VCORE Hot-Spot.
PR213
*90.9K/F_4
*39.2K/F_4
39K/F_4
PR103
150K/F_4
51624_B-RAMP
51624_SLEWA
28
11
15
14
V5A
SLEWA
THERM
B-RAMP
PAD
GND29PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD
33
PR109
365K/F_4
PC47
4700p/25V_4
PR98
39K/F_4
PR127
PC164
PC166
*0.1u/25V_4
PR220
PR214
51624_THERM
51624_V5A
51624_VBAT
16
VBAT
PWM1
PWM2
MODE
CSP1
CSN1
CSN2
CSP2
NC
N/C
42
*0_4
+5V_S5
PC130
1u/10V_4
20/F_6
PR224
10K/F_4
PC68
2.2u/10V_6
PR113
100K/F_4_4250NTC
1n/50V_4
PC49
9.09K/F_4
PR210
2.2/F_6
51624_SKIP#
51624_PWM1
CS_BSTR1
CS_BST1
PC156
0.22u/25V_6
Add 11 GND VIAs
for thermal pad
BW-U 15W(1 phase)
Icc TDC PL214A
6
5
4
17
18
19
20
21
22
PR226
*short 0_8
51624_PWM1
51624_PWM2
51624_MODE
51624_CSP1
51624_CSN1
51624_CSN2
51624_CSP2
51624_CSP2
51624_PWM2
51624_CSN2
PR125
150K/F_4
+3V_S5
PR127
0_4
PR124
PR123
*0_4
0_4
Icc Max32A
OCP37A
Fsw1.2MHz
VCORE L/L
R_DC_LL- 2.0mV/A
R_AC_LL- 7.0mV/A
For BW-U 28W 2 phase
+5V_S5
51624_SKIP#
51624_PWM2
CS_BSTR2
PR227
*2.2/F_6
Block 1.
CS_BST2
PC170
*0.22u/25V_6
Add 11 GND VIAs
for thermal pad
1
8
6
7
PC163
*1u/10V_4
1
8
6
7
2
SKIP#
PWM
BOOT_R
BOOT
PU16
CSD97374CQ4M
51624_CSP1
51624_CSN1
Rmode
2
SKIP#
PWM
BOOT_R
BOOT
PU17
*CSD97374CQ4M
51624_CSP2
51624_CSN2
VDD
VIN
VSW
PGND
PAD
PC162
*0.1u/25V_4
PC164
*0.1u/25V_4
VDD
VIN
VSW
PGND
PAD
PC166
*0.1u/25V_4
PC165
*0.1u/25V_4
+VIN_VCCIN
5
4
CS_SW1
3
9
Close to the
VR side.
100K Ohm
150K OhmONON
+VIN_VCCIN
5
4
CS_SW2
3
9
Close to the
VR side.
PC43
0.1u/50V_6
PR201
2.94K/F_4
PC56
0.12u/10V_4
PR202
10K/F_4_3435KNTC
Close with
phase1 inductor
PC65
*0.1u/50V_6
PR205
*2.67K/F_4
PC59
*0.15u/10V_4
PR206
*10K/F_4_3435KNTC
Close with
phase1 inductor
PC148
PC149
2200p/50V_4
4.7u/25V_8
PL12
0.15uH_7X7X4
1 2
3
4
PR72
2.2_6
2.26K/F_4
PC34
1000p/50V_6
PR79
PR80 *short 0_4
PR122
16.9K/F_4
PS3 OSR
ON
OFF
PC167
PC168
*2200p/50V_4
*4.7u/25V_8
PL16
*0.24uH_7X7X4
1 2
3
4
PR121
*2.2_6
PC57
*1000p/50V_6
PR107 *1.82K/F_4
PR108 *0_4
PR126
*22.6K/F_4
Block 1. Stuff
5
4
3
2
*short 0.001/F_3720
1 2
12
PC64
4.7u/25V_8
+
PC171
33U/25V_6x4.5
DCR= 1mOhm
+
PC35
PC60
0.1u/10V_4
PC151
22u/6.3V_8
PC169
22u/6.3V_8
*330u/2V_7343
BW-U 28W(1 phase)
Icc TDC PL219A
Icc Max40A
OCP47A
Fsw1.2MHz
VCORE L/L
R_DC_LL- 2.0mV/A
R_AC_LL- 7.0mV/A
PC42
*4.7u/25V_8
DCR= 1mOhm
PC58
*0.1u/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014 38 46
Date: Sheet of
Tuesday, April 29, 2014 38 46
Date: Sheet of
Tuesday, April 29, 2014 38 46
PC38
PC134
*22u/6.3V_8
*22u/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+VCCIN(TPS51624)
+VCCIN(TPS51624)
+VCCIN(TPS51624)
1
1
2
3
4
5
+3VPCU
1 2
+3V
JP14
*short 0.001/F_3720
PR181
MAINON
100K/F_4
PR55
*short 0_4
1000p/50V_4
PC124
*100p/50V_4
A A
HWPG_1.5V33
PC119
PC135
10u/6.3V_6
8.06K/F_4
PC125
1500p/50V_4
PR183
PC129
0.1u/25V_6
PR48
121K/F_4
PU14 TPS54318RTER
16
VIN
1
VIN
2
VIN
14
PWRGD
15
EN
7
COMP
8
RT/CLK
9
SS
PC116
0.01u/25V_4
10
PH
11
PH
12
PH
13
GND
GND
PR180 *short 0_6
6
3
4
5
PC113
0.1u/50V_6
1.5V_VSNS
VFB=0.8V
BOOT
VSNS
AGND
PAD17PAD18PAD19PAD20PAD21PAD
22
PL10
1uH_7X7X3
R1
R2
+1.5V
1.5Volt +/- 5%
TDC : 0.6A
PEAK : 0.8A
Width : 40mil
PR188
100K/F_4
PR54
113K/F_4
PC107
0.1u/10V_4
PC109
10u/6.3V_6
+1.5V
12
PC108
10u/6.3V_6
JP12
*short 0.001/F_3720
39
V0=0.8*(R1+R2)/R2
B B
VIN
Thermal protection
PD7
1 3
DA2J10100L
PR25
1M_6
2
1
3
PQ8
AO3409
PR174
*short 0_6
MAINON33,37
SYS_SHDN# 10,33,35
2
PR70
*100K/F_6
PQ21
DTC144EU
1 3
VIN
PR68
1M_4
MAINON_ON_G
PR60
1M_4
+1.05V
PR44
22_8
3
2
PQ15
2N7002K
1
PR73
22_8
3
2
PQ22
2N7002K
1
PR30
22_8
3
2
PQ11
2N7002K
1
+15V+5V+3V
PR91
1M_4
MAIND
3
2
PQ23
2N7002K
1
PC39
*2200p/50V_4
MAIND 35,36
Need fine tune
for thermal protect point
Note placement position
TEMP=70C(3/27modify)
2
S5_ON33,35,36
C C
S5_ON
PQ7
DTC144EU
VLVL
84
PC92
0.1u/50V_6
1
PU12A
AS393MTR-E1
7
PU12B
AS393MTR-E1
PR171
200K_6
PC91
0.1u/50V_6
2
3
2
PQ42
2N7002K
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
4
Date: Sheet of
PROJECT :
+1.5V/Thermal Protect
+1.5V/Thermal Protect
+1.5V/Thermal Protect
ZYW
2A
2A
39 46Tuesday, April 29, 2014
39 46Tuesday, April 29, 2014
5
39 46Tuesday, April 29, 2014
2A
PR167
PR148
200K/F_4
PR168
10K/F_4_3435NTC
3
2
S5_ON
D D
PQ39
2N7002K
1
2.2K/F_4
LM393_PIN2
2.469V
PR169
200K/F_4
3
+
2
-
5
+
6
-
For EC control thermal protection (output 3.3V)
1
5
4
3
2
1
+5V_S5
PR19
*short EV@0_6
D D
PR166
EV@2.2/F_6
PC85
EV@0.22u/25V_6
PR165
EV@2.2/F_6
PC84
EV@0.22u/25V_6
4
4
PQ44
EV@AON6752
4
4
PQ43
EV@AON6752
Value
27K
7.5K
0
6.2K
1.74K
5.6N
2
PQ37
EV@AON6414AL
5
213
5
213
5
213
PQ35
EV@AON6414AL
5
213
*EV@AON6752
PQ40
4
4
4
4
5
213
5
213
PQ41
*EV@AON6752
5
*EV@AON6414AL
213
5
213
PQ34
N15S-GT/N15V-GM
+VGPU_CORE
Countinue current:26A
Peak current:60A
OCP:75A
FSW:300KHz
L/L=0mV/A
R1
PR13
EV_S@20K/F_4
C
PC77
EV_S@2700P/50V_4
3
2
12
1
PR155 EV@6.81K/F_4
PC75 *EV@0.01U/25V_4
1 2
PR143 *EV@1/F_4
PR162 *short EV@0_4
PR161 *short EV@0_4
PR157 *short EV@0_4
1 2
PC79 EV@1U/10V_4
PR14
EV_S@20K/F_4
12
PR147
*EV@5.1K/F_4
PQ33
*EV@2N7002K
PR144
EV_S@2K/F_4
PR145
EV_S@18.2K/F_4
PR146
EV_S@0_4
3V_MAIN_PWGD
PR163
EV@100K/F_4
VGPU_EN8
3V_MAIN_PWGD20,41
DGPU_PSI19
PWM-VID19
C C
DGPU_PSI
+3V_S5
PR159
EV@10K_4
PR15
*EV@0_4
+3VPCU
PR158
*EV@10K_4
1658R-VREF
+VIN_GPU_CORE
PR17 *EV@0_4
3V_MAIN_PWGD
DGPU_PSI
PWM-VID
Phase Number of Operation
B B
Standby
Function
20131018 no need standby function
PC76
*EV@1U/10V_4
Parallel
VGA_VCCSENSE16
VGA_VSSSENSE16
A A
5
PR152 *short EV@0_4
PR151 *short EV@0_4
PR149
*EV@499K/F_4
R2
R3
R4
R5
PR16 EV@12.4K/F_4
PU11
9
1658R-OCS/CB
3
1658R-EN
4
1658R-PSI
5
1658R-VID
8
1658R-VREF
6
1658R-REFADJ
7
PC78
1658R-REFIN
*E@0.01U/25V_4
12
PC80
*EV@22P/50V_4
+VGPU_CORE
PR153
*short EV@0_4
PR150
*short EV@0_4
4
1658R-PVCC
18
OCS/CB
EN
PSI
VID
VREF
REFADJ
REFIN
PVCC
EV@UP1658RQKF
FB
11
1658R-FB
PR156
*short EV@0_4
12
PC86
EV@1U/10V_4
1
1658R-BOOT1
BOOT1
2
BOOT2
COMP
FBRTN
1658R-UGATE1
20
1658R-PHASE1
19
1658R-LGATE1
15
1658R-BOOT2
14
1658R-UGATE2
16
1658R-PHASE2
17
1658R-LGATE2
13
1658R-PG
12
1658R-COMP
10
1658R-FBRTN
12
PC82
EV@4700P/25V_4
PR160
EV@16K/F_6
PR154
*short EV@0_4
N15S-GT
Location Value
PR155 CS26812FB13
PR16 CS31242FB13
PQ34
PQ36
*BAM64140000 BAM64140000
PQ40
PQ41 *BAM67520000 BAM67520000
PR18 EV@10K_4
1 2
PR164 *short EV@0_4
12
PC81
EV@22P/50V_4
+3V
GPU_PWR_GD 20
N15P-GX
Value
CS32002FB29
CS33302FB14
UGATE1
PHASE1
LGATE1
UGATE2
PHASE2
LGATE2
PGOOD
GND
21
N15S-GT(840M)
Location Value
PR13 CS32002FB29
PR14 CS32002FB29
PR144 CS22002FB19
PR145 CS31822FB16
PR146
QCI P/N QCI P/N
20K
20K
2K
18K
CS00002JB38
CH22706KB14PC77
3
0
2.7N
1658R-BOOT1
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
1658R-BOOT2
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
N15V-GM(820M)
CS32702FB16
CS27502FB11
CS00002JB38
CS26202FB17
CS21742FB00
CH25604KB18
+VIN_GPU_CORE
PC88
PC89
PC18
EV@0.1u/50V_6
EV@2200p/50V_4
PQ36
*EV@AON6414AL
PL8
EV@0.36uh_LDCR
PR24
EV@2.2/F_6
PC21
EV@1000p/50V_6
PC87
EV@2200p/50V_4
PL7
EV@0.36uh_LDCR
PR23
EV@2.2/F_6
PC20
EV@1000p/50V_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
EV@4.7u/25V_8
DCR=1.1m ohm
PC99
EV@0.1u/10V_4
+VIN_GPU_CORE
PC19
PC90
EV@0.1u/50V_6
DCR=1.1m ohm
PC94
EV@0.1u/10V_4
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
Tuesday, April 29, 2014 40 46
Tuesday, April 29, 2014 40 46
Tuesday, April 29, 2014 40 46
JP7
*short EV@0.001/F_3720
1 2
PC16
EV@4.7u/25V_8
+VGPU_CORE
+
PC98
PC100
EV@10u/6.3V_8
EV@330u/2V_7343
PC17
EV@4.7u/25V_8
PC95
EV@4.7u/25V_8
+
+
PC93
EV@10u/6.3V_8
EV@330u/2V_7343
N15P-GX
+VGPU_CORE
Countinue current:49A
Peak current:76A
OCP:100A
FSW:300KHz
L/L=0mV/A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
40
VIN
12
+
PC83
EV@33U/25V_6x4.5
PC15
PC14
EV@4.7u/25V_8
EV@4.7u/25V_8
+VGPU_CORE
+
PC97
PC96
EV@330u/2.5V_6X4.2
EV@330u/2.5V_6X4.2
ZYW
2A
2A
2A
5
+1.05V_GFX16,17,18
+1.5V_GFX16,17,21
+3V_GFX16,19,20,33
D D
4
3
2
1
41
VIN
3
2
1
3
2
1
PC8
EV@1u/10V_4
*EV@SHORT_6
PR175
EV@22_8
PQ10
EV@2N7002K
PR92
EV@22_8
PQ29
EV@2N7002K
PR6
PR58
EV@1M_4
PR64
3V_MAIN_PWGD20,40
C C
DGPU_PWR_EN10
B B
PR7
EV@100K/F_4
FBVDDQ_EN20
A A
HWPG_1.5VGFX20
PR9 *short EV@0_4
PC72
*EV@1u/10V_4
OCP=8A
L ripple current
=(19-1.5)*1.5/(2.2u*290k*19)
=2.165A
Vtrip=8-(2.165/2)*14mohm
=96.84mV
Rlimit=96.84mV/10uA*8=77.47Kohm
*short EV@0_4
*EV@1u/10V_4
*EV@1u/10V_4
+3V
PR8 EV@78.7K/F_4
PR12 EV@464K/F_4
PC29
PR212
*short EV@0_4
PC159
HWPG_1.5VGFX
1.5GFX_ENFBVDDQ_EN
1.5GFX_TRIP
1.5GFX_TST
12
PR52
EV@100K_4
12
2
2
PR96
EV@100K_4
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
PQ20
1 3
EV@PDTC143TT
PQ28
1 3
EV@PDTC143TT
7
PU6
EV@TPS51211DSCR
GND13GND14GND15GND
PR59
EV@1M_4
VIN
PR37
EV@1M_4
PR33
EV@1M_4
+5V_S5
V5IN
DRVH
VBST
DRVL
GND
16
1.5GFX_DRVH
9
10
1.5GFX_VBST
8
1.5GFX_SW
SW
6
1.5GFX_DRVL
11
FB
4
1.5GFX_FB
+15V+1.05V_GFX
3
2
1
+15V+3V_GFX
3
2
1
4
PC6
EV@0.1u/50V_6
4
PQ32
EV@MDV1595S
PR40
EV@1M_4
dGPU_D1
PQ18
EV@2N7002K
PR53
EV@1M_4
dGPU_D
PQ30
EV@2N7002K
52
3
1
52
3
1
PQ31
EV@MDV1528
+1.05V_S5
4
PC27
*EV@2.2n/50V_4
2
PC32
*EV@2.2n/50V_4
PC7
EV@2200p/50V_6
PL6
EV@2.2uH_7X7X3
PR11
*EV@4.7_6
PC9
*EV@680p/50V_6
52
PQ45
EV@MDV1528Q
3
1
+1.05V_GFX
+3VPCU
3
PQ24
EV@AO3404
1
+3V_GFX
PC74
EV@4.7u/25V_8
PR142
EV@11.5K/F_4
PC71
EV@0.1u/50V_6
PR10
EV@12K/F_4
ZYW B-SMT:
change PR10 from 10k to 12k
+1.05V_GFX
TDC : 2.7A
PEAK : 3.6A
Width : 120mil
+3V_GFX
TDC : 0.23A
PEAK : 0.3A
Width : 40mil
VIN
ZYW B-SMT:
+1.5V_GFX = 1.35V (EMI issue)
+
PC73
EV@330u/2V_7343
+1.5V_GFX
+1.5V_GFX
1.5 Volt +/- 5%
TDC : 4.5A
PEAK : 6A
OCP : 8A
Width : 200mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Tuesday, April 29, 2014 41 46
Date: Sheet of
Tuesday, April 29, 2014 41 46
Date: Sheet of
5
4
3
2
Tuesday, April 29, 2014 41 46
PROJECT :
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
ZYW
2A
2A
2A
1
1
2
3
4
5
6
7
8
VGA power up sequence
42
+3VPCU
GPIO49
A A
DGPU_PWR_EN
MOSFET
+3V_GFXPCH
3V_MAIN_EN (GPU GPIO5)
MOSFET
3V_MAIN_PWGD
PG
+1.05V_S5
3V_MAIN_PWGD
MOSFET +1.05V_GFX
+3V_MAIN
All 3.3V
NVVDD
PXE_VDD
+1.05V
FBVDDQ
t>0
t>0
N15x Power on sequance
Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
PWM-VID (GPU GPIO11)
B B
VIN
3V_MAIN_PWGD
PWM
VGPU_PWRGD
+VGPU_CORE
VIN
OR
Gate
FBVDDQ_EN
PWM
+1.5V_GFX
HWPG_1.5VGFX
VGPU_PWRGD
DGPU_PWROK
EC_FB_CLAMP(EC)
GC6_FB_EN (GPU GPIO0 )
C C
GPIO17
VGA Reset
PLTRST#
PCH
DGPU_HOLD_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
1
2
PEGX_RST#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GPU PWR CRL
GPU PWR CRL
GPU PWR CRL
Date: Sheet of
Date: Sheet of
3
4
5
6
Date: Sheet of
7
PROJECT :
ZYW
ZYW
ZYW
42 46Tuesday, April 29, 2014
42 46Tuesday, April 29, 2014
42 46Tuesday, April 29, 2014
8
3A
3A
3A
5
Battery Mode
Support Deep Sx
MAINON
+5V
+3V
+1.05V
MAINON
9
8
21
22
21
17
21
11
10
12
21
8
18
19
23
24
24
12
2929
28
27
25
HWPG_VDDR
HWPG_1.05V_S5
HWPG_1.5V
+5VPCU
3
+3VPCU
D D
3
S5 PWR
VIN
1
DDR VDDQ
VR
S3
S5
C C
+3VPCU
3
1.5V
VR
EN
+5V_S5
+3V_S5
S5_ON
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
HWPG_VDDR
PG
DDR_PG_CTRL
MAINON
SUSON
26
+1.5V
HWPG_1.5V
PG
RUN PWR
B B
A A
3
3
9
+5VPCU
+3VPCU
+1.05V_S5
PCH
MOS1
MOS2
MOS3
G
VIN
1
+1.05V_S5
VR
EN
S5_ON
MAINON
5
HWPG_1.05V_S5
PG
+1.05V_S5
4
VIN
3V/5V
VR
EN2
1
VL
+15V
EN1
NBSWON#
3 3
+3VPCU +5VPCU
3V_LDO
2
PWR
BTN
7
30
HWPG
EC_PWROK
31C
HWPG_1.05V_EC#
+1.05V
VIN
1
IMVP
0 ohm
+1.05V_VCCST
+VCC_CORE
33
VR
34
32a
32b
SVID
37
IMVP_PWRGD
PG
EN
VRON_CPU
VRON
CPU
4
3
+3VPCU
3
2
depend on A measure
+3.3V_DSW
result to implement
EC
VRON
MAINON
for B test
5a
S5_ON
SUSON
81721
3
DSW_ON
6
DPWROK
13
RSMRST#
14
SB_ACDC
DNBSWON#
15
SUSC#
SUSB#
PCH_SUSACK#
PCH_SUSPWARN#
PCH_SLP_SUS#
31b
PCH_PWROK
35
38
34
31C
31C
12
31b
36
HWPG_1.05V_EC#
30a
HWPG+1ms
16
20
IMVP_PWRGD
EC_PWROK
EC_PWROK
HWPG_1.05V
PCH_PWROK
SYS_PWROK
4
32b30a
2
EN
Delay DSW power well 10ms
APWROK
31a
31C
EC_PWROK
PCH_CLK
PLTRST#
VCCST_PWRGD_EN
2
5b
+3.3V_DSW
36
SYS_PWROK
10K ohm
1
1
CHARGER
DPWROK
RSMRST#
ACPRESENT
PWRBTN#
SLP_S4#
SLP_S3#
SUSACK
SUSWRAN
SLP_SUS#
APWROK
PCH_PWROK
PLTRST#
SYS_PWROK
BAT-VVIN
Battery
DSW PWR
PCH
3
SUS PWR
ASW PWR
SPI PWR
HSIO PWR
PLL PWR
CORE PWR
SDIO PWR
HDA PWR
+3VPCU or +3.3V_DSW
43
+3VCC_S5
+1.05V
+3V_S5
+V1.05DX_MODPHY
+1.05V
+1.05V
+3V
+3V_S5
38
PLTRST#
RESET#
PROCPWRGD
SVID
SVID
37
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CORE PWR
CPU
VDDQ PWR
VCCST PWR
VR_ENVRON_CPU
SM_PG_CNTL1
DDR_PG_CTRL
22
VR_READY
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
32a
34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
1
+VCCIN
+1.35V_SUS
+1.05V_VCCST
ZYW
ZYW
ZYW
43 43Tuesday, April 29, 2014
43 43Tuesday, April 29, 2014
43 43Tuesday, April 29, 2014
3A
3A
3A
1
2
3
4
5
6
7
8
+3V_S5
+3V
44
SDRAM
2.2K2.2K
AP2
A A
SMB_PCH_CLK
AH1
SMB_PCH_DAT
+3V
2N7002DW
Level shift
CLK_SCLK
CLK_SDATA
4.7K4.7K
Mini Card-WLAN
XDP
Haswell
ULT
+3V_S5
B B
AN1
VGA_MBCLK
AK1
VGA_MBDATA
+3V_S5
*2.2K*2.2K
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
+3V_S5
2.2K2.2K
+3V_S5
*2N7002DW
Level shift
+3V_GFX
C C
2ND_MBCLK
115
2ND_MBDATA
116
00
4.7K4.7K
4.7K4.7K
+3V_MAIN
2N7002DW
Level shift
GFX_SCL
GFX_SDA
VGA
+3V
2N7002DW
EC
IT8587
D D
110
MBCLK
111 MBDATA
1
2
3
+3VPCU
4.7K4.7K
4
Level shift
CHARGER
5
CIICSCL
CIICSDA
+3V
6
CIICSCL
CIICSDA
RTD2136R
4.7K4.7K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
Block Diagram
Block Diagram
Block Diagram
ZYW
ZYW
ZYW
44 44Tuesday, April 29, 2014
44 44Tuesday, April 29, 2014
44 44Tuesday, April 29, 2014
8
3A
3A
3A
defult
5
reserve
SYS_HWPG
D D
PWR
3V_LDO
EN1
EN2
PWRGD3V_LDO
3V/5V
TPS51225
Vin
S5_Vout
S3_Vout
VIN
4
+5VPCU
+3VPCU
S5D
MAIND
S5D
MDV1528Q
MDV1528Q
AO3404
+5V_S5
+5V
+3V_S5
3
2
1
45
VGPU_PWRGD
VIN
Vin
3V_MAIN_PWGD
PWRGD
VGPU Core
up1658
EN
Vout
+VGPU_CORE
PWRGD
+1.5V_GFX
TPS51211
EN
HWPG_1.5VGFX
Vout
+VCC_CORE
+1.5V
+1.5V_GFX
MDV1528Q
MAIND
C C
dGPU_PWR_EN
PCH
HWPG_1.05V
PWRGD
VIN
EC
B B
EC
EC
A A
PCH
+1.05V_S5
Vin
TPS51211
S5_ON
MAINON
DDR_VTTT_PG_CTRL
MAINON
Vout
EN
PWRGDSUSON
S5 EN
+1.35V_SUS
TPS51216
S3 EN
Vin
+1.05V_S5
HWPG_VDDR
S5_Vout
S3_Vout
PCH
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
3V_MAIN_PWGD
MODPHY_EN
AON6756
MAIND
MDV1528Q
AO3404
AO3404
+1.05V
+1.05V_GFX
+1.05V_MODPHY
+3V
+3V_GFX
VIN
+3VPCU
VRON_CPU
VRON
Vin
Vin
MAINON
VIN
IMVP_PWRGD
PWRGD
+VCC_CORE
TPS51624RSMR
EN
HWPG_1.5V
PWRGD
+1.5V
TPS54318
EN
Vin
FBVDDQ_EN
Vout
Vout
Quanta Computer Inc.
Quanta Computer Inc.
VIN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ULT PWR CONTROL
ULT PWR CONTROL
ULT PWR CONTROL
ZYW
ZYW
ZYW
45 45Tuesday, April 29, 2014
45 45Tuesday, April 29, 2014
1
45 45Tuesday, April 29, 2014
3A
3A
3A
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