Page 1
5
4
3
2
1
ZYL (17")
D D
C C
B B
3.3V EC code
SPI ROM(1Mb)
Keyboard
Touch Pad
A A
I2C from CPU
5
Intel Bay Trail-M Platform Block Diagram
GPU
N15V-GM (GeForce 820M)
eDP
HDMI Conn PAGE 20
Port0
USB3.0 Conn PAGE 25
Port0
Port2
Card Reader
USB Hub -4
GL834L
Power :
Package : QFN-32
PAGE 28
Size : 4 x 4 (mm)
I/O board (card reader+LED)
PAGE 13~18
PAGE 20
USB Hub
GL850G-OHY31
Package : QFN-28
Size : 5 x 5 (mm)
PAGE 25
Port1
PAGE 24
USB2.0 Port x 2
USB Hub -2
USB Hub -3
2
DDR3L SO-DIMM 0
Maximum 8GB
SATA - HDD
Package : 9.5 (mm)
Power :
SATA - ODD
Package : 9.5 (mm)
Power :
1.8V BIOS+TXE
SPI ROM(64Mb)
PAGE 23
PAGE 21
PAGE 21
I2C
PAGE 21
KB
PS2
PAGE 11
PAGE 23
PAGE 22
PAGE 6
TPM
Embedded Controller
NPCE985LB1
Power :
Package : LQPF128
Size : 14 x 14 (mm)
FAN
DDR3L 1066MT/s
SATA0 3GB/s
SATA1 3GB/s
SPI Interface
PAGE 28
PAGE 19
PAGE 22
Intel Bay Trail-M
Power : 7.5 Watt
Package : FCBGA 1170
Size : 25 x 27 (mm)
Audio Codec
ALC283
Power :
Package : QFN-48
Size : 6 x 6 (mm)
4
PAGE 2~10
Azalia
PAGE 26
Speaker
Universal Jack
Headphone + MIC
Analog MIC
PCIE0 & PCIE1
DDI 1
DDI 0
32.768KHz
PAGE 6
25 Mhz
PAGE 6
USB3.0
USB 2.0 Interface
PCIE Gen 2 x 1 Lane LPC Interface
Port3 Port2
LAN
RTL8111 GS-CG
Power :
Package : QFN-32
Size : 4 x 4 (mm)
PAGE 27
PAGE 26
PAGE 26
PAGE 26
Camera
PAGE 20
25 Mhz
PAGE 27
3
PCIE Gen 2 x 2 Lane
Port0 & Port1
Port3
Half Mini Card
WLAN / BT Combo
27 Mhz
PAGE 15
PAGE 24
12 Mhz
PAGE 24
PCB 6L STACK UP
LAYER 1 : TOP
LAYER 2 : SVCC
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SGND
LAYER 6 : BOT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
PROJECT :
Intel Block Diagram
Intel Block Diagram
Intel Block Diagram
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 1
44 1
44 1
1A
1A
1A
01
Page 2
5
4
3
2
1
M_A_A[15:0] [11]
D D
M_A_DM0 [11]
M_A_DM1 [11]
M_A_DM2 [11]
M_A_DM3 [11]
M_A_DM4 [11]
M_A_DM5 [11]
M_A_DM6 [11]
M_A_DM7 [11]
M_A_RAS# [11]
M_A_CAS# [11]
M_A_WE# [11]
M_A_BS#0 [11]
M_A_BS#1 [11]
M_A_BS#2 [11]
M_A_CS#0 [11]
M_A_CS#1 [11]
C C
+1.35VSUS
R431
4.7K_4
R430
4.7K_4
B B
A A
GND GND
SLP_S4# [6,12]
C435
0.1U/10V_4
+1.35VSUS [8,11,36,37]
+3V_S5 [9,12,19,21,24,27,28,34,35,37,39,40]
+3V_S5
R382
4.7K_4
DRM_PWOK_C1
SLP_S4#
5
3 4
5
Q43A
PJ4N3KDW
GND
R389
10K_4
+1.35VSUS
2
GND
GND
6 1
M_A_CKE0 [11]
M_A_CKE1 [11]
M_A_ODT0 [11]
M_A_ODT1 [11]
M_A_CLK0 [11]
M_A_CLK0# [11]
M_A_CLK1 [11]
M_A_CLK1# [11]
M_A_DRAMRST# [11]
R434 100K/F_4
R435 100K/F_4
R432 23.2/F_4
R436 29.4/F_4
R433 162/F_4
HWPG_1.35V SOC_DRAM_PWROK
Q43B
PJ4N3KDW
R388
*short_0/J_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CKE0
M_A_CKE1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_DRAMRST# CPU_VREF
CPU_VREF
ICLK_DRAM_TERMN_0
ICLK_DRAM_TERMN_1
SOC_DRAM_PWROK
SOC_VCCA_PWROK
DRAM_RCOMP0
DRAM_RCOMP1
DRAM_RCOMP2
C417
*0.1U/10V_4
GND
HWPG_1.35V [36]
4
U29A
K45
DRAM0_MA_00
H47
DRAM0_MA_11
L41
DRAM0_MA_22
H44
DRAM0_MA_33
H50
DRAM0_MA_44
G53
DRAM0_MA_55
H49
DRAM0_MA_66
D50
DRAM0_MA_77
G52
DRAM0_MA_88
E52
DRAM0_MA_99
K48
DRAM0_MA_1010
E51
DRAM0_MA_1111
F47
DRAM0_MA_1212
J51
DRAM0_MA_1313
B49
DRAM0_MA_1414
B50
DRAM0_MA_1515
G36
DRAM0_DM_00
B36
DRAM0_DM_11
F38
DRAM0_DM_22
B42
DRAM0_DM_33
P51
DRAM0_DM_44
V42
DRAM0_DM_55
Y50
DRAM0_DM_66
Y52
DRAM0_DM_77
M45
DRAM0_RAS
M44
DRAM0_CAS
H51
DRAM0_WE
K47
DRAM0_BS_00
K44
DRAM0_BS_11
D52
DRAM0_BS_22
P44
DRAM0_CS_0
P45
DRAM0_CS_2
C47
DRAM0_CKE_00
D48
RESERVED_D48
F44
DRAM0_CKE_22
E46
RESERVED_E46
T41
DRAM0_ODT_0
P42
DRAM0_ODT_2
M50
DRAM0_CKP_0
M48
DRAM0_CKN_0
P50
DRAM0_CKP_2
P48
DRAM0_CKN_2
P41
DRAM0_DRAMRST
AF44
DRAM_VREF
AH42
ICLK_DRAM_TERMN
AF42
ICLK_DRAM_TERMN_AF42
AD42
DRAM_VDD_S4_PWROK
AB42
DRAM_CORE_PWROK
AD44
DRAM_RCOMP_00
AF45
DRAM_RCOMP_11
AD45
DRAM_RCOMP_22
AF40
RESERVED_AF40
AF41
RESERVED_AF41
AD40
RESERVED_AD40
AD41
RESERVED_AD41
VLV_M_D/BGA
REV = 1.15
M_A_DQS0 [11]
M_A_DQS#0 [11]
M_A_DQS1 [11]
M_A_DQS#1 [11]
M_A_DQS2 [11]
M_A_DQS#2 [11]
M_A_DQS3 [11]
M_A_DQS#3 [11]
M_A_DQS4 [11]
M_A_DQS#4 [11]
M_A_DQS5 [11]
M_A_DQS#5 [11]
M_A_DQS6 [11]
M_A_DQS#6 [11]
M_A_DQS7 [11]
M_A_DQS#7 [11]
C416
*0.1U/10V_4
M_A_DQ[63:0] [11]
2
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
PROJECT :
Valley 1/9 (DDRA)
Valley 1/9 (DDRA)
Valley 1/9 (DDRA)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 2
44 2
44 2
1A
1A
1A
M_A_DQ0
R390
10K_4
+1.35VSUS
2
M36
J36
P40
M40
P36
N36
K40
K42
B32
C32
C36
A37
C33
A33
C37
B38
F36
G38
F42
J42
G40
C38
G44
D42
A41
C41
A45
B46
C40
B40
B48
B47
K52
K51
T52
T51
L51
L53
R51
R53
T47
T45
Y40
V41
T48
T50
Y42
AB40
V45
V47
AD48
AD50
V48
V50
AB44
Y45
V52
W51
AC53
AC51
W53
Y51
AD52
AD51
J38
K38
C35
B34
D40
F40
B44
C43
N53
M52
T42
T44
Y47
Y48
AB52
AA51
6 1
PJ4N3KDW
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS0
M_A_DQS#0
M_A_DQS1
M_A_DQS#1
M_A_DQS2
M_A_DQS#2
M_A_DQS3
M_A_DQS#3
M_A_DQS4
M_A_DQS#4
M_A_DQS5
M_A_DQS#5
M_A_DQS6
M_A_DQS#6
M_A_DQS7
M_A_DQS#7
Q44B
SOC_VCCA_PWROK
GND
DRAM0_DQ_00
DRAM0_DQ_11
DRAM0_DQ_22
DRAM0_DQ_33
DRAM0_DQ_44
DRAM0_DQ_55
DRAM0_DQ_66
DRAM0_DQ_77
DRAM0_DQ_88
DRAM0_DQ09_C32
DRAM0_DQ_1010
DRAM0_DQ_1111
DRAM0_DQ_1212
DRAM0_DQ_1313
DRAM0_DQ_1414
DRAM0_DQ_1515
DRAM0_DQ_1616
DRAM0_DQ_1717
DRAM0_DQ_1818
DRAM0_DQ_1919
DRAM0_DQ_2020
DRAM0_DQ_2121
DRAM0_DQ_2222
DRAM0_DQ_2323
DRAM0_DQ_2424
DRAM0_DQ_2525
DRAM0_DQ_2626
DRAM0_DQ_2727
DRAM0_DQ_2828
DRAM0_DQ_2929
DRAM0_DQ_3030
DRAM0_DQ_3131
DRAM0_DQ_3232
DRAM0_DQ_3333
DRAM0_DQ_3434
DRAM0_DQ_3535
DRAM0_DQ_3636
DRAM0_DQ_3737
DRAM0_DQ_3838
DRAM0_DQ_3939
DRAM0_DQ_4040
DRAM0_DQ_4141
DRAM0_DQ_4242
DRAM0_DQ_4343
DRAM0_DQ_4444
DRAM0_DQ_4545
DRAM0_DQ_4646
DRAM0_DQ_4747
DRAM0_DQ_4848
DRAM0_DQ_4949
DRAM0_DQ_5050
DRAM0_DQ_5151
DRAM0_DQ_5252
DRAM0_DQ_5353
DRAM0_DQ_5454
DRAM0_DQ_5555
DRAM0_DQ_5656
DRAM0_DQ_5757
DRAM0_DQ_5858
DRAM0_DQ_5959
DRAM0_DQ_6060
DRAM0_DQ_6161
DRAM0_DQ_6262
DRAM0_DQ_6363
DRAM0_DQSP_00
DRAM0_DQSN_00
DRAM0_DQSP_11
DRAM0_DQSN_11
DRAM0_DQSP_22
DRAM0_DQSN_22
DRAM0_DQSP_33
DRAM0_DQSN_33
DRAM0_DQSP_44
DRAM0_DQSN_44
DRAM0_DQSP_55
DRAM0_DQSN_55
DRAM0_DQSP_66
DRAM0_DQSN_66
DRAM0_DQSP_77
DRAM0_DQSN_77
1 OF 13
+3V_S5
R383
4.7K_4
DRM_PWOK_C2
EC_PWROK [12,19]
EC_PWROK
3 4
5
Q44A
PJ4N3KDW
GND
3
Page 3
5
4
3
2
1
U29B
AY45
DRAM1_MA_00
BB47
DRAM1_MA_11
AW41
DRAM1_MA_22
BB44
DRAM1_MA_33
BB50
D D
C C
B B
BC53
BB49
BF50
BC52
BE52
AY48
BE51
BD47
BA51
BH49
BH50
BD38
BH36
BC36
BH42
AT51
AM42
AK50
AK52
AV45
AV44
BB51
AY47
AY44
BF52
AT44
AT45
BG47
BE46
BD44
BF48
AP41
AT42
AV50
AV48
AT50
AT48
AT41
DRAM1_MA_44
DRAM1_MA_55
DRAM1_MA_66
DRAM1_MA_77
DRAM1_MA_88
DRAM1_MA_99
DRAM1_MA_1010
DRAM1_MA_1111
DRAM1_MA_1212
DRAM1_MA_1313
DRAM1_MA_1414
DRAM1_MA_1515
DRAM1_DM_00
DRAM1_DM_11
DRAM1_DM_22
DRAM1_DM_33
DRAM1_DM_44
DRAM1_DM_55
DRAM1_DM_66
DRAM1_DM_77
DRAM1_RAS
DRAM1_CAS
DRAM1_WE
DRAM1_BS_00
DRAM1_BS_11
DRAM1_BS_22
DRAM1_CS_0
DRAM1_CS_2
DRAM1_CKE_00
RESERVED_BE46
DRAM1_CKE_22
RESERVED_BF48
DRAM1_ODT_0
DRAM1_ODT_2
DRAM1_CKP_0
DRAM1_CKN_0
DRAM1_CKP_2
DRAM1_CKN_2
DRAM1_DRAMRST
VLV_M_D/BGA
REV = 1.15
2 OF 13
DRAM1_DQ_00
DRAM1_DQ_11
DRAM1_DQ_22
DRAM1_DQ_33
DRAM1_DQ_44
DRAM1_DQ_55
DRAM1_DQ_66
DRAM1_DQ_77
DRAM1_DQ_88
DRAM1_DQ_99
DRAM1_DQ_1010
DRAM1_DQ_1111
DRAM1_DQ_1212
DRAM1_DQ_1313
DRAM1_DQ_1414
DRAM1_DQ_1515
DRAM1_DQ_1616
DRAM1_DQ_1717
DRAM1_DQ_1818
DRAM1_DQ_1919
DRAM1_DQ_2020
DRAM1_DQ_2121
DRAM1_DQ_2222
DRAM1_DQ_2323
DRAM1_DQ_2424
DRAM1_DQ_2525
DRAM1_DQ_2626
DRAM1_DQ_2727
DRAM1_DQ_2828
DRAM1_DQ_2929
DRAM1_DQ_3030
DRAM1_DQ_3131
DRAM1_DQ_3232
DRAM1_DQ_3333
DRAM1_DQ_3434
DRAM1_DQ_3535
DRAM1_DQ_3636
DRAM1_DQ_3737
DRAM1_DQ_3838
DRAM1_DQ_3939
DRAM1_DQ_4040
DRAM1_DQ_4141
DRAM1_DQ_4242
DRAM1_DQ_4343
DRAM1_DQ_4444
DRAM1_DQ_4545
DRAM1_DQ_4646
DRAM1_DQ_4747
DRAM1_DQ_4848
DRAM1_DQ_4949
DRAM1_DQ_5050
DRAM1_DQ_5151
DRAM1_DQ_5252
DRAM1_DQ_5353
DRAM1_DQ_5454
DRAM1_DQ_5555
DRAM1_DQ_5656
DRAM1_DQ_5757
DRAM1_DQ_5858
DRAM1_DQ_5959
DRAM1_DQ_6060
DRAM1_DQ_6161
DRAM1_DQ_6262
DRAM1_DQ_6363
DRAM1_DQSP_00
DRAM1_DQSN_00
DRAM1_DQSP_11
DRAM1_DQSN_11
DRAM1_DQSP_22
DRAM1_DQSN_22
DRAM1_DQSP_33
DRAM1_DQSN_33
DRAM1_DQSP_44
DRAM1_DQSN_44
DRAM1_DQSP_55
DRAM1_DQSN_55
DRAM1_DQSP_66
DRAM1_DQSN_66
DRAM1_DQSP_77
DRAM1_DQSN_77
BG38
BC40
BA42
BD42
BC38
BD36
BF42
BC44
BH32
BG32
BG36
BJ37
BG33
BJ33
BG37
BH38
AU36
AT36
AV40
AT40
BA36
AV36
AY42
AY40
BJ41
BG41
BJ45
BH46
BG40
BH40
BH48
BH47
AY52
AY51
AP52
AP51
AW51
AW53
AR51
AR53
AP47
AP45
AK40
AM41
AP48
AP50
AK42
AH40
AM45
AM47
AF48
AF50
AM48
AM50
AH44
AK45
AM52
AL51
AG53
AG51
AL53
AK51
AF52
AF51
BF40
BD40
BG35
BH34
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
AK47
AK48
AH52
AJ51
3 3
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
5
4
3
2
Thursday, July 10, 2014
PROJECT :
Valley 2/9 (DDRB)
Valley 2/9 (DDRB)
Valley 2/9 (DDRB)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 3
44 3
44 3
Page 4
5
4
3
2
1
4
U29C
VSS_AH3
VSS_AH2
3
AG3
AG1
AF3
AF2
AD3
AD2
AC3
AC1
AK3
AK2
K30
P30
G30
N30
J30
M30
AH14
AH13
AF14
AF13
AH3
AH2
BA3
AY2
BA1
AW1
AY3
BD2
BF2
BC1
BC2
T7
T9
AB13
AB12
Y12
Y13
V10
V9
T12
T10
V14
V13
T14
T13
T6
T4
P14
K34
D32
N32
J34
K28
F28
F32
D34
J28
D28
M32
F34
INT_eDP_TXP0 [20]
INT_eDP_TXN0 [20]
INT_eDP_TXP1 [20]
INT_eDP_TXN1 [20]
INT_eDP_AUXP [20]
INT_eDP_AUXN [20]
DDI1_DDCDATA
DDI1_DDCCLK
PCH_DISP_ON_C
PCH_EDP_BLON_C
PCH_DPST_PWM_C
GND
VGA/CRT No Used
VGA DDCCLK/DDCDATA need link GND.
GND
DDI1_EDP_HPD_R [20] HDMI_HPD_CON [20]
R266 2.2K_4
R265 *2.2K_4
Bay Trail-M Hardware Straps:
+1.8V
DDI1_DDCCLK in eDP/DP Mode : Unused
Q47A
PJ4N3KDW
PCH_DISP_ON_C
+1.8V
PCH_EDP_BLON_C
PCH_DPST_PWM_C PCH_DPST_PWM
1
2
3 4
5
R551 200K/F_4
R553 200K/F_4
2
6 1
Q47B
PJ4N3KDW
+1.8V
2
+3V
R290
4.7K/J_4
3
Q37
PJA138K
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet of
Thursday, July 10, 2014
PCH_DISP_ON [20]
PCH_EDP_BLON [19,22]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Valley 3/9 (Display)
Valley 3/9 (Display)
Valley 3/9 (Display)
+3V
PCH_DPST_PWM [20]
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1
1A
1A
1A
44 4
44 4
44 4
D D
IN_D2 [20]
IN_D2# [20]
IN_D1 [20]
IN_D1# [20]
IN_D0 [20]
IN_D0# [20]
IN_CLK [20]
IN_CLK# [20]
SDVO_DATA [20]
SDVO_CLK [20]
1.8V Pull High on p.13 HDMI
R174
402/F_4
C C
+1.8V [5,6,7,9,12,19,20,21,27,28,37]
+3V [5,7,9,11,12,13,17,19,20,22,24,25,26,27,28,35,37,39,40]
B B
+1.8V
R513
*10K_4
R512
10K_4
GND
A A
TP48
TP47
5
SOC_DDIO_RCOMP
SOC_DDIO_RCOMP_P
GND
GPIO_NC13
GPIO_NC14
INTD_DSI_TE
AV3
DDI0_TXP_0
AV2
DDI0_TXN_0
AT2
DDI0_TXP_1
AT3
DDI0_TXN_1
AR3
DDI0_TXP_2
AR1
DDI0_TXN_2
AP3
DDI0_TXP_3
AP2
DDI0_TXN_3
AL3
DDI0_AUXP
AL1
DDI0_AUXN
D27
DDI0_HPD
C26
DDI0_DDCDATA
C28
DDI0_DDCCLK
B28
DDI0_VDDEN
C27
DDI0_BKLTEN
B26
DDI0_BKLTCTL
AK13
DDI0_RCOMP
AK12
DDI0_RCOMP_P
AM14
RESERVED_AM14
AM13
RESERVED_AM13
AM3
VSS_AM3
AM2
VSS_AM2
T2
RESERVED_T2
T3
RESERVED_T3
AB3
RESERVED_AB3
AB2
RESERVED_AB2
Y3
RESERVED_Y3
Y2
RESERVED_Y2
W3
RESERVED_W3
W1
RESERVED_W1
V2
RESERVED_V2
V3
RESERVED_V3
R3
RESERVED_R3
R1
RESERVED_R1
AD6
RESERVED_AD6
AD4
RESERVED_AD4
AB9
RESERVED_AB9
AB7
RESERVED_AB7
Y4
RESERVED_Y4
Y6
RESERVED_Y6
V4
RESERVED_V4
V6
RESERVED_V6
A29
GPIO_S0_NC13
C29
GPIO_S0_NC14_C29
AB14
RESERVED_AB14
B30
GPIO_S0_NC12
C30
RESERVED_C30
VLV_M_D/BGA
REV = 1.15
DDI1_TXP_0
DDI1_TXN_0
DDI1_TXP_1
DDI1_TXN_1
DDI1_TXP_2
DDI1_TXN_2
DDI1_TXP_3
DDI1_TXN_3
DDI1_AUXP
DDI1_AUXN
DDI1_HPD
DDI1_DDCDATA
DDI1_DDCCLK
DDI1_VDDEN
DDI1_BKLTEN
DDI1_BKLTCTL
RESERVED_AH14
RESERVED_AH13
RESERVED_AF14
RESERVED_AF13
VGA_RED
VGA_BLUE
VGA_GREEN
VGA_IREF
VGA_IRTN
VGA_HSYNC
VGA_VSYNC
VGA_DDCCLK
VGA_DDCDATA
RESERVED_T7
RESERVED_T9
RESERVED_AB13
RESERVED_AB12
RESERVED_Y12
RESERVED_Y13
RESERVED_V10
RESERVED_V9
RESERVED_T12
RESERVED_T10
RESERVED_V14
RESERVED_V13
RESERVED_T14
RESERVED_T13
RESERVED_T6
RESERVED_T4
RESERVED_P14
RESERVED_K34
GPIO_S0_NC26
GPIO_S0_NC25
GPIO_S0_NC24
GPIO_S0_NC23
GPIO_S0_NC22
GPIO_S0_NC21
GPIO_S0_NC20
GPIO_S0_NC18
GPIO_S0_NC17
3 OF 13
4
GPIO_S0_NC16
GPIO_S0_NC15
Page 5
5
4
3
2
1
U29D
SATA_TXP0 [23]
SATA HDD
D D
SATA ODD
+1.8V [4,6,7,9,12,19,20,21,27,28,37]
C C
SATA_TXN0 [23]
SATA_RXP0 [23]
SATA_RXN0 [23]
SATA_TXP1 [22]
SATA_TXN1 [22]
SATA_RXP1 [22]
SATA_RXN1 [22]
SOC_KBC_SCI [12]
+1.8V
R173
402/F_4
GND
R144 *short_0/J_4
R128 *short_0/J_4
R133 *short_0/J_4
R125 *10K_4
R116 *10K_4
GND
R121 49.9/F_4
ICLK_SATA_TERMP
ICLK_SATA_TERMN
SATA_GP0
SATA_GP1
SATA_LED_R_N
SATA_RCOMP_DP
SATA_RCOMP_DN
MMC1_RCOMP
201/04/18 : Add GPU Power Control Siganls
VGPU_EN [39]
DGPU_HOLD_RST#_Q [12]
DGPU_PWR_EN_Q [12]
DGPU_PWROK_Q [12]
GND
GND
VGPU_EN
DGPU_HOLD_RST#_Q
DGPU_PWR_EN_Q
DGPU_PWROK_Q
DGPU_PW_CTRL#
R567 100K/F_4
R112 49.9/F_4
SD3_RCOMP
201/04/18 : Add GPU Power Control Siganls
B B
BF6
SATA_TXP_0
BG7
SATA_TXN_0
AU16
SATA_RXP_0
AV16
SATA_RXN_0
BD10
SATA_TXP1
BF10
SATA_TXN_1
AY16
SATA_RXP_1
BA16
SATA_RXN_1
BB10
ICLK_SATA_TERMP
BC10
ICLK_SATA_TERMN
BA12
SATA_GP0
AY14
SATA_GP1
AY12
SATA_LED
AU18
SATA_RCOMP_P_AU18
AT18
SATA_RCOMP_N_AT18
AT22
MMC1_CLK
AV20
MMC1_D0
AU22
MMC1_D1
AV22
MMC1_D2
AT20
MMC1_D3
AY24
MMC1_D4
AU26
MMC1_D5
AT26
MMC1_D6
AU20
MMC1_D7
AV26
MMC1_CMD
BA24
MMC1_RST
AY18
MMC1_RCOMP
BA18
SD2_CLK
AY20
SD2_D0
BD20
SD2_D1
BA20
SD2_D2
BD18
SD2_D3_CD
BC18
SD2_CMD
AY26
SD3_CLK
AT28
SD3_D0
BD26
SD3_D1
AU28
SD3_D2
BA26
SD3_D3
BC24
SD3_CD#
AV28
SD3_CMD
BF22
SD3_1P8EN
BD22
SD3_PWREN
BF26
SD3_RCOMP
VLV_M_D/BGA
REV = 1.15
PCIE_RCOMP_P_AP14_AP14
PCIE_RCOMP_N_AP13_AP13
LPE_I2S2_DATAOUT
4 OF 13
PCIE_TXP_0
PCIE_TXN_0
PCIE_RXP_0
PCIE_RXN_0
PCIE_TXP_1
PCIE_TXN_1
PCIE_RXP_1
PCIE_RXN_1
PCIE_TXP_2
PCIE_TXN_2
PCIE_RXP_2
PCIE_RXN_2
PCIE_TXP_3
PCIE_TXN_3
PCIE_RXP_3
PCIE_RXN_3
VSS_BB7
VSS_BB5
PCIE_CLKREQ_0
PCIE_CLKREQ_1
PCIE_CLKREQ_2
PCIE_CLKREQ_3
SD3_WP_BD5
RESERVED_BB4
RESERVED_BB3
RESERVED_AV10
RESERVED_AV9
HDA_LPE_RCOMP
HDA_RST
HDA_SYNC
HDA_CLK
HDA_SDO
HDA_SDI0
HDA_SDI1
HDA_DOCKRST
HDA_DOCKEN
LPE_I2S2_CLK
LPE_I2S2_FRM
LPE_I2S2_DATAIN
RESERVED_P34
RESERVED_N34
RESERVED_AK9
RESERVED_AK7
PROCHOT
C_PEG_TX0
AY7
C_PEG_TX#0
AY6
AT14
AT13
C_PEG_TX1
AV6
C_PEG_TX#1
AV4
AT10
AT9
PCIE_TXP2_WLAN_C
AT7
PCIE_TXN2_WLAN_C
AT6
AP12
AP10
PCIE_TXP3_LAN_C
AP6
PCIE_TXN3_LAN_C
AP4
AP9
AP7
VSS_BB7
BB7
VSS_BB5
BB5
CLK_PEGA_REQ#
BG3
PCIE_CLKREQ1#
BD7
PCIE_CLKREQ2_WLAN#
BG5
PCIE_CLKREQ3_LAN#
BE3
BD5
SOC_PCIE_COMP
AP14
SOC_PCIE_COMN
AP13
BB4
BB3
AV10
AV9
HDA_RCOMP
BF20
ACZ_RST#
BG22
ACZ_SYNC
BH20
ACZ_BCLK
BJ21
ACZ_SDOUT
BG20
ACZ_SDIN0
BG19
BG21
BH18
BG18
BF28
BIOS_STRAP
BA30
SOC_Override
BC30
BD28
P34
N34
AK9
AK7
SOC_PROCHOT#
C24
C433 0.1U/10V_4
C439 0.1U/10V_4
C446 0.1U/10V_4
C445 0.1U/10V_4
R117 49.9/F_4
R419 33_4
R418 33_4
R402 33_4
R401 33_4
R507 *short_0/J_4
R496 71.5/F_4
C422 EV@0.22u/10V_4
C426 EV@0.22u/10V_4
C427 EV@0.22u/10V_4
C431 EV@0.22u/10V_4
R141 *short_0/J_4
R136 *short_0/J_4
+1.05V
PEG_TX0 [13]
PEG_TX#0 [13]
PEG_RX0 [13]
PEG_RX#0 [13]
PEG_TX1 [13]
PEG_TX#1 [13]
PEG_RX1 [13]
PEG_RX#1 [13]
PCIE_TXP2_WLAN [28]
PCIE_TXN2_WLAN [28]
PCIE_RXP2_WLAN [28]
PCIE_RXN2_WLAN [28]
PCIE_TXP3_LAN [27]
PCIE_TXN3_LAN [27]
PCIE_RXP3_LAN [27]
PCIE_RXN3_LAN [27]
CLK_PEGA_REQ# [13]
PCIE_CLKREQ2_WLAN# [28]
PCIE_CLKREQ3_LAN# [27]
GND
PCH_AZ_CODEC_RST# [26]
PCH_AZ_CODEC_SYNC [26]
PCH_AZ_CODEC_BITCLK [26]
PCH_AZ_CODEC_SDOUT [26]
PCH_AZ_CODEC_SDIN0 [26]
H_PROCHOT# [19,35]
GND
R171
402/F_4
GPU x2
WLAN x1
LAN x1
CLK_PEGA_REQ#
PCIE_CLKREQ1#
PCIE_CLKREQ2_WLAN#
PCIE_CLKREQ3_LAN#
R127 10K_4
R119 10K_4
R123 10K_4
R132 10K_4
5
+1.8V
High UMA Only
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
R85 UMA@10K_4
+3V
R88 *10K_4
+1.8V
R86 *10K_4
+3V
R89 *10K_4
+1.8V
R98 EV@10K_4
+3V
R93 *10K_4
+1.8V
R100 *10K_4
+3V
R91 *10K_4
+1.8V
A A
R111 *10K_4
+3V
R118 *10K_4
+1.8V
Low
DGPU_PW_CTRL#
Default NC No Pull High / Low
VGPU_EN
Default Pull High 10K(+3V)
DGPU_HOLD_RST#_Q
Default NC No Pull High / Low
DGPU_PWR_EN_Q
Default Pull Low 10K(GND)
DGPU_PWROK_Q
5
R82 EV@10K_4
R109 *10K_4
R97 *10K_4
R108 EV@10K_4
GND
GND
GND
GND
GND
EN_OVERRIDE [19]
AC_PRESENT_EC [19]
4
R386 *short_0/J_4 R83 *10K_4
R391 *short_0/J_4
SOC_Override_NM
AC_PRESENT_NM
Security Flash Descriptors
0 = Override
1 = Normal Operation
SOC_Override
3 4
PJ4N3KDW
5
Q45A
GND
6 1
2
Q45B
PJ4N3KDW
GND
3
AC Present: This input pin indicates when the
platform is plugged into AC power.
0 = LPC
1 = SPI
AC_PRESENT [6]
BIOS_STRAP
+1.8V
GND
2
R87
10K_4
R84
*10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
PROJECT :
Valley 4/9 (SD/PCIE/SATA)
Valley 4/9 (SD/PCIE/SATA)
Valley 4/9 (SD/PCIE/SATA)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 5
44 5
44 5
1A
1A
1A
Page 6
5 4 3
+1.8V_S5 [7,9,12,21,37]
+1.8V [4,5,7,9,12,19,20,21,27,28,37]
C458 12P/50V_4
GND
GND
D D
C C
+1.8V_S5
B B
+1.8V_S5
R248 51/F_4
R260 51/F_4
R228 51/F_4
R247 200/F_4
R229 51/F_4
R246 51/F_4
GND
R505 10K_4
R493 *10K_4
R494 *10K_4
R514 *10K_4
R504 *10K_4
C453 12P/50V_4
XTAL25_OUT
1
2
Y12
25MHZ +-10PPM
4
3
XTAL25_IN
XDP_H_TDO
XDP_H_TMS
XDP_H_TDI
XDP_H_PREQ#
XDP_H_TRST#
XDP_H_TCK
TP_INT#
SOC_JTAG2_TMS
SOC_JTAG2_TDI
SOC_JTAG2_TDO
R456
1M_4
GPU
WLAN
LAN
Touch pad
R463 4.02K/F_4
R462 47.5/F_4
GND
CLK_PCIE_VGAN [13]
CLK_PCIE_VGAP [13]
CLK_PCIE_WLANN [28]
CLK_PCIE_WLANP [28]
CLK_PCIE_LANN [27]
CLK_PCIE_LANP [27]
TP_INT# [21]
SOC_KCB_SMI [12]
TP28
R492 *short_0/J_4
R529 49.9/F_4
GND
XTAL25_IN
XTAL25_OUT
ICLK_ICOMP
ICLK_RCOMP
SRT_CRST#
XDP_H_TCK
XDP_H_TRST#
XDP_H_TMS
XDP_H_TDI
XDP_H_TDO
XDP_H_PRDY#
XDP_H_PREQ#
SOC_SPI_CS#
SOC_SPI_MISO
SOC_SPI_MOSI
SOC_SPI_CLK
TP_INT#
SOC_JTAG2_TCK
SOC_JTAG2_TMS
SOC_JTAG2_TDI
SOC_JTAG2_TDO SOC_JTAG2_TCK
BOARD_ID4
BOARD_ID5
SOC_GPIO_RCOMP
SOC_GPOI7
BOARD_ID1
BOARD_ID2
BOARD_ID3
AH12
AH10
AD14
AD13
AD10
AD12
AM10
AT34
AD9
AF6
AF4
AF9
AF7
AK4
AK6
AM4
AM6
AM9
BH7
BH5
BH4
BH8
BH6
BJ9
C12
D14
G12
F14
F12
G16
D18
F16
C23
C21
B22
A21
C22
B18
B16
C18
A17
C17
C16
B14
C15
C13
A13
C19
N26
U29E
ICLK_OSCIN
ICLK_OSCOUT
RESERVED_AD9
ICLK_ICOMP
ICLK_RCOMP
RESERVED_AD10
RESERVED_AD12
PCIE_CLKN_00
PCIE_CLKP_00
PCIE_CLKN_11
PCIE_CLKP_11
PCIE_CLKN_22
PCIE_CLKP_22
PCIE_CLKN_33
PCIE_CLKP_33
RESERVED_AM10
RESERVED_AM9
PMC_PLT_CLK_00
PMC_PLT_CLK_11
PMC_PLT_CLK_22
PMC_PLT_CLK_33
PMC_PLT_CLK_44
PMC_PLT_CLK_55
ILB_RTC_RST
TAP_TCK
TAP_TRST
TAP_TMS
TAP_TDI
TAP_TDO
TAP_PRDY
TAP_PREQ
RESERVED
PCU_SPI_CS_00
PCU_SPI_CS_11
PCU_SPI_MISO
PCU_SPI_MOSI
PCU_SPI_CLK
GPIO_S5_0
GPIO_S5_1
GPIO_S5_2
GPIO_S5_3
GPIO_S5_4
GPIO_S5_5
GPIO_S5_6
GPIO_S5_7
GPIO_S5_8
GPIO_S5_9
GPIO_S5_10
GPIO_RCOMP
VLV_M_D/BGA
REV = 1.15
5 OF 13
SIO_UART1_RXD
SIO_UART1_TXD
SIO_UART1_RTS
SIO_UART1_CTS
SIO_UART2_RXD
SIO_UART2_TXD
SIO_UART2_RTS
SIO_UART2_CTS
PMC_SUSPWRDNACK
PMC_SUSCLK0_G24
PMC_SLP_S0IX
PMC_SLP_S4
PMC_SLP_S3
GPIO_S514_J20
PMC_ACPRESENT
PMC_WAKE_PCIE_0
PMC_BATLOW
PMC_PWRBTN
PMC_RSTBTN
PMC_PLTRST
GPIO_S517_J24
PMC_SUS_STAT
ILB_RTC_TEST
PMC_RSMRST
PMC_CORE_PWROK
ILB_RTC_X1
ILB_RTC_X2
ILB_RTC_EXTPAD
SVID_ALERT
SVID_DATA
SVID_CLK
SIO_PWM_00
SIO_PWM_11
GPIO_S5_22
GPIO_S5_23
GPIO_S5_24
GPIO_S5_25
GPIO_S5_26
GPIO_S5_27
GPIO_S5_28
GPIO_S5_29
GPIO_S5_30
SIO_SPI_CS
SIO_SPI_MISO
SIO_SPI_MOSI
SIO_SPI_CLK
AU34
AV34
BA34
AY34
BF34
BD34
BD32
BF32
SUS_PWRDOWNACK
D26
G24
F18
F22
D22
J20
AC_PRESENT
D20
SOC_PMC_WAKE
F26
PMU_BATLOW#_R
K26
J26
SOC_REST_BTN
BG9
F20
J24
G18
SOC_RTEST#
C11
B10
B7
RTC_X1
C9
RTC_X2
A9
BRTC_EXTPAD
B8
SVID_ALERT#_SOC
B24
SVID_DATA_SOC
A25
SVID_CLK_SOC
C25
TOUCHPANEL_INTR#_SOC
AU32
SOC_SENS_HUB_RST#
AT32
K24
N24
M20
J18
M18
K18
K20
M22
M24
AV32
BA28
AY28
AY30
R264 *short_0_4
C482 0.1U/10V_4
R517 20/F_4
R518 16.9R_4
R519 *0/short_4
R90 *10K_4
R96 *10K_4
2
PMU_BATLOW#_R
SUSWARN#_EC [19]
SLP_S0IX# [12]
SLP_S4# [2,12]
SLP_S3# [12]
AC_PRESENT [5]
SOC_PMC_WAKE [12]
SOC_PWRBTN# [12]
SOC_PLTRST# [12]
PCH_SLP_S0# [12]
SOC_RSMRST# [12]
CORE_PWROK [12]
GND
VR_SVID_ALERT#
VR_SVID_DATA VR_SVID_ALERT#
VR_SVID_CLK
VR_SVID_ALERT# [35]
VR_SVID_DATA [35]
VR_SVID_CLK [35]
C293
*0.1u/10V_4
+1.8V
SUS_PWRDOWNACK
SOC_PMC_WAKE
AC_PRESENT
SOC_REST_BTN
*71.5/F_4
GND
VR_SVID_DATA
VR_SVID_CLK
intel check list 2.0: 70 Ω ±5% pull-up to V1P0S,
PLM does not have it, so use 71.5 Ω ±1% to replace.
RTC Clock 32.768KHz
RTC_X1
R487
10M_4
RTC_X2
2013/07/25
change package , P/N change
from BG332768224 to
BG332768453
R526
+1.0V
1 2
1
R525
71.5/F_4
Y13
32.768KHZ
R242 10K_4
R263 10K_4
R243 10K_4
R262 10K_4
R409 10K_4
R527
*71.5/F_4
C477 15P/50V_4
C476 15P/50V_4
GND
6
+1.8V_S5
+1.8V
+1.8V_S5
C513
0.1U/10V_4
+1.8V_S5
A A
GND
R561 3.3K/F_4
R557 3.3K/F_4
+1.8V_S5
SPI NOR FLASH
U33
8
VCC
3
SPI_7P
WP#
SPI_HOLD7GND
SPI_FLASH
soic8-7_9-1_27
AKE5EZN0N00
IC FLASH (8P) W25Q64FWSSIG (SOIC)
R552 3.3K/F_4
SPI_SI
SPI_SO
SPI_SCK
5
2
1
CS#
6
4
SOC_SPI_CS#
SOC_SPI_MOSI_R
SOC_SPI_MISO_R
SOC_SPI_CS#_R
SOC_SPI_CLK_R
GND
R563 *short_0/J_4
R558 *short_0/J_4
R554 *short_0/J_4
R560 *short_0/J_4
R556 EC18@0/J_4
R555 EC18@0/J_4
R559 EC18@0/J_4
R564 EC18@0/J_4
SOC_SPI_MOSI
SOC_SPI_MISO
SOC_SPI_CS#
SOC_SPI_CLK SPI_3P
SOC_SPI_CLK_R1 [19]
SOC_SPI_CS#_R1 [19]
SOC_SPI_MISO_R1 [19]
SOC_SPI_MOSI_R1 [19]
+1.8V_S5
R502 UMA@10K_4
R503 *10K_4
R506 *TPM@10K_4
R537 *10K_4
R535 *10K_4
BOARD_ID1 : UMA or DIS HIGH= UMA, LOW= DIS
BOARD_ID2 : None
BOARD_ID3 : TPM HIGH=TPM, LOW=W/O TPM
BOARD_ID4 : Reserve for UMA and GPU
BOARD_ID5 : Reserve for UMA and GPU
BOARD ID
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
3
R490 EV@10K_4
R491 10K_4
R495 10K_4
R543 10K_4
R534 10K_4
RTC Circuitry(RTC)
CN17
BAT_CONN
20mils
R520 1K/J_4
+3V_RTC_0
+3V_RTC_0
1 2
GND
2
+3VPCU
VCCRTC_1
20MIL
20MIL 20MIL
+3V_RTC
R542 20K/J_4
C503
D32
30mils
BAT54C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R536 20K/J_4
C504
1u/6.3V_4
6/25 Change G9G10 footprint from
"SOLDERJUMPER-2" to "RC0603-C" for
SMT request
Valley 5/9 (SPI/GPIO/CLK)
Valley 5/9 (SPI/GPIO/CLK)
Valley 5/9 (SPI/GPIO/CLK)
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
1u/6.3V_4
C498
1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
SOC_RTEST#
1 2
G10
*SHORT_ PAD1
SRT_CRST#
1 2
G9
*SHORT_ PAD1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 6
44 6
44 6
1A
1A
1A
Page 7
5
+1.8V_S5 [6,9,12,21,37]
+1.8V [4,5,6,9,12,19,20,21,27,28,37]
+3V [4,5,9,11,12,13,17,19,20,22,24,25,26,27,28,35,37,39,40]
+1.8V_S5
D D
Port 1 is debug port
USB3.0
USB 2.0 HUB
Bluetooth
CAMERA
C C
GND
B B
A A
CLK_24M_KBC [19]
CLK_TPM [28]
SMB_SOC_CLK
R428 22_4
R411 *22_4 R429 22_4
For TPM
+1.8V
5
2
6
+1.8V
SMB_RUN_DAT SMB_SOC_DATA
SMB_RUN_CLK
Q46
4 3
1
PJ4N3KDW
R475 *10K_4
SOC_USB_OC0 [24]
GND
+1.8V_S5
SOC_USB_OC1 [25]
R219 45.3/F_4
GND
R489 45.3/F_4
R124 49.9/F_4
LAD0 [19,28]
LAD1 [19,28]
LAD2 [19,28]
LAD3 [19,28]
LFRAME# [19,28]
CLK_24M_DEBUG [28]
CLKRUN# [19,28]
SOC_SERIRQ [12,28]
R394 2.2K_4
R410 2.2K_4
R426 2.2K_4
R392 4.7K_4
R387 4.7K_4
USBP0+ [25]
USBP0- [25]
USB_H1_P [24]
USB_H1_N [24]
USBP2+ [28]
USBP2- [28]
USBP3+ [20]
USBP3- [20]
R244 1K_4
R245 1K_4
GND
+3V
+3V
R478 *0/J_4
LAD0
LAD1
LAD2
LAD3
LFRAME#
R427 *22_4
SMB_RUN_DAT [11,28]
SMB_RUN_CLK [11,28]
4
SOC_PWR_BUT
ICLK_USB_TERMN_0
ICLK_USB_TERMN_1
R515 10K_4
R516 10K_4
USB_RCOMP
USB_PLL_MON
USB_HSIC_RCOMP
LPC_RCOMP
SOC_CLKOUT_0
SOC_CLKOUT_1
SOC_CLKRUN#
SOC_SERIRQ
SMB_SOC_DATA
SMB_SOC_CLK
SMB_SOC_ALERTB
U29F
G2
GPIO_S5_31
M3
GPIO_S5_32
L1
GPIO_S5_33
K2
GPIO_S5_34
K3
GPIO_S5_35
M2
GPIO_S5_36
N3
GPIO_S5_37
P2
GPIO_S5_38
L3
GPIO_S5_39
J3
GPIO_S5_40
P3
GPIO_S5_41
H3
GPIO_S5_42
B12
GPIO_S5_43
M16
USB_DP0
K16
USB_DN0
J14
USB_DP1
G14
USB_DN1
K12
USB_DP2
J12
USB_DN2
K10
USB_DP3
H10
USB_DN3
D10
ICLK_USB_TERMN_D10
F10
ICLK_USB_TERMN
C20
USB_OC_00
B20
USB_OC_11
D6
USB_RCOMPO
C7
USB_RCOMPI
M13
USB_PLL_MON
B4
USB_HSIC0_DATA
B5
USB_HSIC0_STROBE
E2
USB_HSIC1_DATA
D2
USB_HSIC1_STROBE
A7
USB_HSIC_RCOMP
BF18
LPC_RCOMP
BH16
ILB_LPC_AD_00
BJ17
ILB_LPC_AD_11
BJ13
ILB_LPC_AD_22
BG14
ILB_LPC_AD_33
BG17
ILB_LPC_FRAME
BG15
ILB_LPC_CLK_00
BH14
ILB_LPC_CLK_11
BG16
ILB_LPC_CLKRUN
BG13
ILB_LPC_SERIRQ
BG12
PCU_SMB_DATA
BH10
PCU_SMB_CLK
BG11
PCU_SMB_ALERT
VLV_M_D/BGA
REV = 1.15
6 OF 13
3
RESERVED_M10
RESERVED_M9
RESERVED_P7
RESERVED_P6
RESERVED_M7
USB3_REXT0
RESERVED_P10
RESERVED_P12
RESERVED_M4
RESERVED_M6
USB3_RXP0
USB3_RXN0
USB3_TXP0
USB3_TXN0
RESERVED_H8
RESERVED_H7
RESERVED_H5
RESERVED_H4
GPIO_S0_SC_55
GPIO_S0_SC_56
GPIO_S0_SC_57
GPIO_S0_SC_58
GPIO_S0_SC_59
GPIO_S0_SC_60
GPIO_S0_SC_61
ILB_8254_SPKR
SIO_I2C0_DATA
SIO_I2C0_CLK
SIO_I2C1_DATA
SIO_I2C1_CLK
SIO_I2C2_DATA
SIO_I2C2_CLK
SIO_I2C3_DATA
SIO_I2C3_CLK
SIO_I2C4_DATA
SIO_I2C4_CLK
SIO_I2C5_DATA
SIO_I2C5_CLK
SIO_I2C6_DATA
SIO_I2C6_CLK
GPIO_S0_SC_092
GPIO_S0_SC_093
M10
M9
P7
P6
M7
M12
P10
P12
M4
M6
D4
E3
K6
K7
H8
H7
H5
H4
BD12
BC12
BD14
BC14
BF14
BD16
BC16
BH12
BH22
BG23
BG24
BH24
BG25
BJ25
BG26
BH26
BF27
BG27
BH28
BG28
BJ29
BG29
BH30
BG30
USB3_P0_REXT
Top Swap (A16 Override)
0 = Top address bit is unchanged
1 = Top address bit is inverted
GPIO_S0_SC_56
SOC_UART_TX
SOC_UART_RX
I2C_0_SDA_R
I2C_0_SCL_R
I2C_1_SDA
I2C_1_SCL
I2C_2_SDA_R
I2C_2_SCL_R
I2C_3_SDA
I2C_3_SCL
I2C_4_SDA
I2C_4_SCL
I2C_5_SDA
I2C_5_SCL
I2C_6_SDA
I2C_6_SCL
I2C_NFC_SOC_SDA
I2C_NFC_SOC_SCL
R477 1.24K/F_4
USB30_RX1+ [25]
USB30_RX1- [25]
USB30_TX1+ [25]
USB30_TX1- [25]
R420 22/J_4
R421 22/J_4
T10
T9
SPKR [26]
2
GND
I2C_0_SDA [21]
I2C_0_SCL [21]
+1.8V
R120
*10K_4
R113
*10K_4
GND
Touch pad
1
7
SOC_UART_TX SOC_UART_RX
I2C_0_SDA
I2C_0_SCL
I2C_1_SDA
I2C_1_SCL
I2C_2_SDA_R
I2C_2_SCL_R
I2C_3_SDA
I2C_3_SCL
I2C_4_SDA
I2C_4_SCL
I2C_5_SDA
I2C_5_SCL
I2C_6_SDA
I2C_6_SCL
I2C_NFC_SOC_SDA
I2C_NFC_SOC_SCL
I2C pull up:
Standard/ Fast Mode --> 560 ohm
Hight speed mode --> CLK- 560 ohm;
DATA- 910 ohm
R126 *0/J_4
Un-Stuff for Test Only
R403 560_4
R404 560_4
R422 *560_4
R405 *560_4
R423 *560_4
R399 *560_4
R395 *560_4
R416 *560_4
R406 *560_4
R396 *560_4
R417 *560_4
R400 *560_4
R397 *560_4
R407 *560_4
R424 *560_4
R425 *560_4
+1.8V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
5
4
3
2
Thursday, July 10, 2014
PROJECT :
Valley 6/9 (USB/LPC/I2C)
Valley 6/9 (USB/LPC/I2C)
Valley 6/9 (USB/LPC/I2C)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 7
44 7
44 7
Page 8
5
4
3
2
1
8
GND
+1.35VSUS
R271 100/F_4
R143 100/F_4
R270 100/F_4
R269 *0/short_4
C432 4.7U/6.3V_6
C436 1u/6.3V_4
C213 0.1U/10V_4
+VCC_CORE
C499
22U/6.3V_6
C500
22U/6.3V_6
VCC_SENSE
VCC_AXG_SENSE
VSS_SENSE
+1.35VSUS
C221 10U/6.3V_6
C207 4.7U/6.3V_6
C235 4.7U/6.3V_6
C255 2.2U/6.3V_6
C489 2.2U/6.3V_6
C488 22U/6.3V_6
C487 22U/6.3V_6
C486 22U/6.3V_6
GND
C501
22U/6.3V_6
TP43
C502
22U/6.3V_6
U29G
P28
CORE_VCC_SENSE_P28
BB8
UNCORE_VNN_SENSE
N28
CORE_VSS_SENSE_N28
AD38
DRAM_VDD_S4_AD38
AF38
DRAM_VDD_S4_AF38
A48
DRAM_VDD_S4
AK38
DRAM_VDD_S4_AK38
AM38
DRAM_VDD_S4_AM38
AV41
DRAM_VDD_S4_AV41
AV42
DRAM_VDD_S4_AV42
BB46
DRAM_VDD_S4_BB46
AA27
CORE_VCC_S0IX_AA27
AA29
CORE_VCC_S0IX_AA29
AA30
CORE_VCC_S0IX_AA30
AC27
CORE_VCC_S0IX_AC27
AC29
CORE_VCC_S0IX_AC29
AC30
CORE_VCC_S0IX_AC30
AD27
CORE_VCC_S0IX_AD27
AD29
CORE_VCC_S0IX_AD29
AD30
CORE_VCC_S0IX_AD30
AF27
CORE_VCC_S0IX_AF27
AF29
CORE_VCC_S0IX_AF29
AG27
CORE_VCC_S0IX_AG27
AG29
CORE_VCC_S0IX_AG29
AG30
CORE_VCC_S0IX_AG30
P26
CORE_VCC_S0IX_P26
P27
CORE_VCC_S0IX_P27
U27
CORE_VCC_S0IX_U27
U29
CORE_VCC_S0IX_U29
V27
CORE_VCC_S0IX_V27
V29
CORE_VCC_S0IX_V29
V30
CORE_VCC_S0IX_V30
Y27
CORE_VCC_S0IX_Y27
Y29
CORE_VCC_S0IX_Y29
Y30
CORE_VCC_S0IX_Y30
AF30
TP_CORE_V1P05_S4
VLV_M_D/BGA
REV = 1.15
7 OF 13
DRAM_VDD_S4_BD49
DRAM_VDD_S4_BD52
DRAM_VDD_S4_BD53
DRAM_VDD_S4_BF44
DRAM_VDD_S4_BG51
DRAM_VDD_S4_BJ48
DRAM_VDD_S4_C51
DRAM_VDD_S4_D44
DRAM_VDD_S4_F49
DRAM_VDD_S4_F52
DRAM_VDD_S4_F53
DRAM_VDD_S4_H46
DRAM_VDD_S4_M41
DRAM_VDD_S4_M42
DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38
UNCORE_VNN_S3_AA24
UNCORE_VNN_S3_AC22
UNCORE_VNN_S3_AC24
UNCORE_VNN_S3_AD22
UNCORE_VNN_S3_AD24
UNCORE_VNN_S3_AF22
UNCORE_VNN_S3_AF24
UNCORE_VNN_S3_AG22
UNCORE_VNN_S3_AG24
UNCORE_VNN_S3_AJ22
UNCORE_VNN_S3_AJ24
UNCORE_VNN_S3_AK22
UNCORE_VNN_S3_AK24
UNCORE_VNN_S3_AK25
UNCORE_VNN_S3_AK27
UNCORE_VNN_S3_AK29
UNCORE_VNN_S3_AK30
UNCORE_VNN_S3_AK32
UNCORE_VNN_S3_AM22
TP2_CORE_VCC_S0IX
BD49
BD52
BD53
BF44
BG51
BJ48
C51
D44
F49
F52
F53
H46
M41
M42
V38
Y38
AA24
AC22
AC24
AD22
AD24
AF22
AF24
AG22
AG24
AJ22
AJ24
AK22
AK24
AK25
AK27
AK29
AK30
AK32
AM22
AA22
+1.35VSUS
C175
2.2U/6.3V_6
GND
+VCC_GFX
GND
SOC_CORE_PIN_AA22 SOC_CORE_PINAF30
TP46
C470
10U/6.3V_6
C473
22U/6.3V_6
C174
2.2U/6.3V_6
C471
10U/6.3V_6
C474
22U/6.3V_6
C261
2.2U/6.3V_6
C189
10U/6.3V_6
C475
22U/6.3V_6
C222
2.2U/6.3V_6
C220
1u/6.3V_4
Near CPU
C472
22U/6.3V_6
C234
1u/6.3V_4
C199
1u/6.3V_4
C273
+
*330u/2V_7343
C196
1u/6.3V_4
C266
0.1U/10V_4
C195
0.1u/10V_4
C192
0.1u/10V_4
C197
0.1u/10V_4
+VCC_CORE
D D
C C
+VCC_GFX
VCC_AXG_SENSE [35]
VSS_AXG_SENSE [35]
VCC_SENSE [35]
VSS_SENSE [35]
GND
Near CPU
C283
+
*330u/2V_7343
B B
+VCC_CORE [29,35]
+VCC_GFX [9,29,35]
+1.35VSUS [2,11,36,37]
+3VPCU [6,19,21,22,25,26,30,31,32,37,39,40]
+3VPCU
R142
*10K_4
IO Thrm Protect
default 25 degree for detect temperature
THRM_MOINTOR [19]
R152
*0/J_4
A A
5
THER_CPU
R488
*10K_6_NTC
4
C159
*0.1U/10V_4
1 2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
3
2
Thursday, July 10, 2014
PROJECT :
Valley 7/9 (Power 1)
Valley 7/9 (Power 1)
Valley 7/9 (Power 1)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 8
44 8
44 8
Page 9
5
4
3
2
1
GND
9
+1.8V_S5
GND
1A
1A
1A
44 9
44 9
44 9
For layout move
C200 1u/6.3V_4
GND
D D
C240 1u/6.3V_4
C226 1u/6.3V_4
GND
C231 0.01U/25V_4
+VCC_GFX
C C
B B
C229 0.1U/10V_4
20140421:
Delete L14
+1.0V
+1.0V_S5
+1.0V
+1.0V
+1.0V
GND
+1.05V
+1.35V
+1.35V
GND
R176 *0/short_4
GND
GND
R181 *0/short_4
GND
GND
USB3_V1P0_G3
R188 *0/short_4
C163 22U/6.3V_6
C165 22U/6.3V_6
C169 22U/6.3V_6
C203 1u/6.3V_4
C243 1u/6.3V_4
R216 *0/short_4
R272 *0/short_4
C440 *22uF/6.3V_6
C441 1u/6.3V_4
C225 1u/6.3V_4
C204 1u/6.3V_4
C210 1u/6.3V_4
C198 1u/6.3V_4
C202 1u/6.3V_4
C179 22U/6.3V_6
USB3_V1P0_G3
CORE_V1P05
+1.0V
GND
+1.0V
GND
+1.0V
GND
GND
GND
+1.35V
GND
GND
+1.0V
C193 1u/6.3V_4
C214 1uF/6.3_4
C238 1u/6.3V_4
+1.35V
C206
1u/6.3V_4
GND
20140418:
+1.0V
Add CAPs for +1.0V
A A
GND
C151
1u/6.3V_4
C145
1u/6.3V_4
Near CPU Side
5
C144
1u/6.3V_4
C152
0.01U/25V_4
C246 1u/6.3V_4
C434 1u/6.3V_4
VIS_V1P0_SIOX_PW
VIS_V1P0_SIOX_PW
USB3_V1P0_G3
VIS_V1P0_SIOX_PW
C215 1u/6.3V_4
C237 1u/6.3V_4
C216 0.01U/25V_4
C185 1u/6.3V_4
C181 1u/6.3V_4
C177 0.01U/25V_4
CORE_V1P05_S3_PW
VIS_V1P0_SIOX_PW
C277 1uF/6.3_4
C276 1uF/6.3_4
C228 1u/6.3V_4
C245 1u/6.3V_4
C209 1u/6.3V_4
C442 1u/6.3V_4
C211
1u/6.3V_4
U29H
V32
SVID_V1P0_S3_V32
BJ6
VGA_V1P0_S3_BJ6
AD35
DRAM_V1P0_S0IX_AD35
AF35
DRAM_V1P0_S0IX_AF35
AF36
DRAM_V1P0_S0IX_AF36
AA36
DRAM_V1P0_S0IX_AA36
AJ36
DRAM_V1P0_S0IX_AJ36
AK35
DRAM_V1P0_S0IX_AK35
AK36
DRAM_V1P0_S0IX_AK36
Y35
DRAM_V1P0_S0IX_Y35
Y36
DRAM_V1P0_S0IX_Y36
AK19
DDI_V1P0_S0IX_AK19
AK21
DDI_V1P0_S0IX_AK21
AJ18
DDI_V1P0_S0IX_AJ18
AM16
DDI_V1P0_S0IX_AM16
U22
UNCORE_V1P0_G3_U22
V22
UNCORE_V1P0_G3_V22
AN29
VIS_V1P0_S0IX_AN29
AN30
VIS_V1P0_S0IX_AN30
AF16
UNCORE_V1P0_S3_AF16
AF18
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
G1
UNCORE_V1P0_S3_G1
AM21
PCIE_V1P0_S3_AM21
AN21
PCIE_V1P0_S3_AN21
AN18
PCIE_GBE_SATA_V1P0_S3_AN18
AN19
SATA_V1P0_S3_AN19
AA33
CORE_V1P05_S3_AA33
AF21
UNCORE_V1P0_S0IX_AF21
AG21
UNCORE_V1P0_S0IX_AG21
V24
VIS_V1P0_S0IX_V24
Y22
VIS_V1P0_S0IX_Y22
Y24
VIS_V1P0_S0IX_Y24
M14
USB_V1P0_S3_M14
U18
USB_V1P0_S3_U18
U19
USB_V1P0_S3_U19
AN25
GPIO_V1P0_S3_AN25
Y19
USB3_V1P0_G3_Y19
C3
USB3_V1P0_G3_C3
C5
UNCORE_V1P0_G3_C5
B6
UNCORE_V1P0_G3_B6
AC32
CORE_V1P0_S3_AC32
Y32
CORE_V1P0_S3_Y32
U36
UNCORE_V1P35_S0IX_F4_U36
AA25
UNCORE_V1P35_S0IX_F5_AA25
AG32
UNCORE_V1P35_S0IX_F2_AG32
V36
UNCORE_V1P35_S0IX_F3_V36
BD1
VGA_V1P35_S3_F1_BD1
AF19
UNCORE_V1P35_S0IX_F6
AG19
UNCORE_V1P35_S0IX_F1_AG19
AJ19
ICLK_V1P35_S3_F1_AJ19
AG18
ICLK_V1P35_S3_F2
AN16
VSSA_AN16
U16
USB_VSSA_U16
VLV_M_D/BGA
GND
4
REV = 1.15
+1.0V [6,35,37]
+VCC_GFX [8,29,35]
+1.0V_S5 [33,37]
+1.05V [5,34]
+1.35V [37]
+1.5V [22,23,26,34]
+1.8V [4,5,6,7,12,19,20,21,27,28,37]
+3V [4,5,7,11,12,13,17,19,20,22,24,25,26,27,28,35,37,39,40]
+3V_RTC [6]
+1.8V_S5 [6,7,12,21,37]
8 OF 13
DRAM_V1P35_S0IX_F1_AD36
HDA_LPE_V1P5V1P8_S3_AM32
UNCORE_V1P8_S3_AM30
UNCORE_V1P8_S3_AN32
LPC_V1P8V3P3_S3_AM27
UNCORE_V1P8_G3_U24
USB_V3P3_G3_N18
USB_V3P3_G3_P18
UNCORE_V1P8_S3_U38
VGA_V3P3_S3_AN24
PCU_V1P8_G3_V25
PCU_V3P3_G3_N22
SD3_V1P8V3P3_S3_AN27
USB_HSIC_V1P2_G3_V18
UNCORE_V1P8_G3_AA18
RTC_VCC_P22
USB_V1P8_G3_N20
PMU_V1P8_G3_U25
CORE_V1P05_S3_AF33
CORE_V1P05_S3_AG33
CORE_V1P05_S3_AG35
CORE_V1P05_S3_U33
CORE_V1P05_S3_U35
CORE_V1P05_S3_V33
VSS_A49_A49
VSS_A51_A51
VSS_A52_A52
VSS_B52_B52
VSS_B53_B53
VSS_BE1_BE1
VSS_BE53_BE53
VSS_BG1_BG1
VSS_BG53_BG53
VSS_BH1_BH1
VSS_BH2_BH2
VSS_BH52_BH52
VSS_BH53_BH53
VSS_BJ2_BJ2
VSS_BJ3_BJ3
VSS_BJ5_BJ5
VSS_BJ49_BJ49
VSS_BJ51_BJ51
VSS_BJ52_BJ52
VSS_C53_C53
VSS_E53_E53
RESERVED_F1
PCIE_V1P0_S3_AK18
PCIE_V1P0_S3_AM18
3
VSS_AD16
VSS_AD18
VSS_A3_A3
VSS_A5_A5
VSS_A6_A6
VSS_B2_B2
VSS_C1_C1
VSS_E1_E1
AD36
AM32
AM30
AN32
AM27
U24
N18
P18
U38
AN24
V25
N22
AN27
AD16
AD18
V18
AA18
P22
N20
U25
AF33
AG33
AG35
U33
U35
V33
A3
A49
A5
A51
A52
A6
B2
B52
B53
BE1
BE53
BG1
BG53
BH1
BH2
BH52
BH53
BJ2
BJ3
BJ5
BJ49
BJ51
BJ52
C1
C53
E1
E53
F1
AK18
AM18
GND
C217
0.47uF/6.3V_4
UNCORE_V1P8_AN32_PWR
LPC_V3P3_PWR
V1P8_S5_PWR
PCU_V3P3_G3_PWR
UNCORE_V1P8_AN32_PWR
VGA_V3P3_PWR
V1P8_S5_PWR
PCU_V3P3_G3_PWR
+VSDIO
VSS_AD18_AD16_PWR
USB_HSIC_V1P2_G3
V1P8_AA18_PEW
RTC_VCC_P22_PWR
V1P8_S5_PWR
CORE_V1P05_S3_PW
C232
1uF/6.3_4
C183 1u/6.3V_4
C170 1u/6.3V_4
C188 1u/6.3V_4
C190 1u/6.3V_4
C218 1u/6.3V_4
C492 1uF/6.3_4
C247 0.1U/10V_4
R261 *0/short_4
C251
1uF/6.3_4
2
C138 1u/6.3V_4
R79 *0/short_4
R528 *0/short_4
C462 *1U/6.3V_4
R466 *0/short_4
+1.8V_S5
R209 *0/short_6
C257
0.01U/25V_4
+1.0V
GND
GND
GND
+1.35V
+1.5V
R150 *0/short_4
C239 1uF/6.3_4
GND
C186 1u/6.3V_4
+3V
C187 1u/6.3V_4
R77 *0/short_4
C136 1u/6.3V_4
+3V_S5
R78 *0/short_4
C137 1u/6.3V_4
GND
R472 *0/short_4
R215 *0/short_4
C248 1uF/6.3_4
+1.05V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.8V
GND
C252 1uF/6.3_4
C256 1uF/6.3_4
C242 1uF/6.3_4
C254 0.01U/25V_4
+3V
GND
+3V
GND
+1.0V_S5
GND
Valley 8/9 (Power 2)
Valley 8/9 (Power 2)
Valley 8/9 (Power 2)
R469 *0/short_4
C465 1u/6.3V_4
+3V_RTC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
Page 10
5
4
3
2
1
10
D D
U29I
A11
VSS1
A15
VSS2
A19
VSS3
A23
VSS4
A27
VSS5
A31
VSS6
A35
VSS7
A39
VSS8
A43
VSS9
A47
VSS10
AA1
VSS11
AA16
VSS12
AA19
VSS13
AA21
VSS14
AA3
VSS15
AA32
VSS16
AA35
VSS17
AA38
VSS18
AA53
VSS19
AB10
VSS20
AB4
VSS21
AB41
VSS22
AB45
VSS23
AB47
VSS24
AB48
C C
GND GND GND GND GND GND GND GND GND GND
AB50
AB51
AC16
AC18
AC19
AC21
AC25
AC33
AC35
AB6
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VLV_M_D/BGA
REV = 1.15
9 OF 13
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
AC36
AC38
AD19
AD21
AD25
AD32
AD33
AD47
AD7
AE1
AE11
AE12
AE14
AE3
AE4
AE40
AE42
AE43
AE45
AE46
AE48
AE50
AE51
AE53
AE6
AE8
AE9
AF10
AF12
AF25
AF32
AF47
AG16
AG25
AG36
AG38
AH41
AH45
AJ16
AJ21
AJ25
AJ27
AJ29
AJ30
AJ32
AJ33
AJ35
AJ38
AJ53
AK10
AK14
AK16
AK33
AK41
AK44
AM12
AM19
AM24
AM25
AM29
AM33
AM35
AM36
AM40
AH4
AH7
AH9
AJ1
AJ3
M28
U29J
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VLV_M_D/BGA
REV = 1.15
10 OF 13
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
AH47
AH48
AH50
AH51
AH6
AM44
AM51
AM7
AN1
AN11
AN12
AN14
AN22
AN3
AN33
AN35
AN36
AN38
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN5
AN51
AN53
AN6
AN8
AN9
AP40
AT12
AT16
AT19
AT24
AT27
AT30
AT35
AT38
AT47
AT52
AU24
AU30
AU38
AU51
AV12
AV13
AV14
AV18
AV19
AV24
AV27
AV30
AV35
AV38
AV47
AV51
AW13
AW19
AW27
AW3
AW35
AY10
AY22
AY32
AT4
AU1
AU3
AV7
U29K
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VLV_M_D/BGA
REV = 1.15
11 OF 13
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
AY36
AY4
AY50
AY9
BA14
BA19
BA22
BA27
BA32
BA35
BA40
BA53
BB19
BB27
BB35
BC20
BC22
BC26
BC28
BC32
BC34
BC42
BD19
BD24
BD27
BD30
BD35
BE19
BE2
BE35
BE8
BF12
BF16
BF24
BF38
BF30
BF36
BG31
BG34
BG39
BG42
BG45
BG49
BJ11
BJ15
BJ19
BJ23
BJ27
BJ31
BJ35
BJ39
BJ43
BJ47
BF4
BJ7
C14
C31
C34
C39
C42
C45
C49
D12
D16
D24
D30
D36
D38
E19
E35
U29L
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VLV_M_D/BGA
REV = 1.15
12 OF 13
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
E8
F19
F2
F24
F27
F30
F35
F5
F7
G10
G20
G22
G26
G28
G32
G34
G42
H19
H27
H35
J1
J16
J19
J22
J27
J32
J35
J40
J53
K14
K22
K32
K36
K4
K50
K9
L13
L19
L27
L35
M19
M26
M27
M34
M35
M38
M47
M51
N1
N16
N38
N51
P13
P16
P19
P20
P24
P32
P35
P38
P4
P47
P52
P9
T40
U1
U11
U12
U14
U21
U29M
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VLV_M_D/BGA
REV = 1.15
13 OF 13
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
U3
U30
U32
U40
U42
U43
U45
U46
U48
U49
U5
U51
U53
U6
U8
U9
V12
V16
V19
V21
V35
V40
V44
V51
V7
Y10
Y14
Y16
Y21
Y25
Y33
Y41
Y44
Y7
Y9
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
5
4
3
2
Thursday, July 10, 2014
PROJECT :
Valley 9/9 (GND)
Valley 9/9 (GND)
Valley 9/9 (GND)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 10
44 10
44 10
Page 11
5
4
3
2
1
Address A0H
M_A_A[15:0] [2]
D D
+1.35VSUS [2,8,36,37]
+VDDQ_VTT [36]
+3V [4,5,7,9,12,13,17,19,20,22,24,25,26,27,28,35,37,39,40]
R115 10K/F_4
R114 10K/F_4
C C
B B
M_A_BS#0 [2]
M_A_BS#1 [2]
M_A_BS#2 [2]
M_A_CS#0 [2]
M_A_CS#1 [2]
M_A_CLK0 [2]
M_A_CLK0# [2]
M_A_CLK1 [2]
M_A_CLK1# [2]
M_A_CKE0 [2]
M_A_CKE1 [2]
M_A_CAS# [2]
M_A_RAS# [2]
M_A_WE# [2]
SMB_RUN_CLK [7,28]
SMB_RUN_DAT [7,28]
M_A_ODT0 [2]
M_A_ODT1 [2]
M_A_DM0 [2]
M_A_DM1 [2]
M_A_DM3 [2]
M_A_DM2 [2]
M_A_DM4 [2]
M_A_DM7 [2]
M_A_DM5 [2]
M_A_DM6 [2]
M_A_DQS[7:0] [2]
M_A_DQS#[7:0] [2]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
M_A_DQS0
M_A_DQS1
M_A_DQS3
M_A_DQS2
M_A_DQS4
M_A_DQS7
M_A_DQS5
M_A_DQS6
M_A_DQS#0
M_A_DQS#1
M_A_DQS#3
M_A_DQS#2
M_A_DQS#4
M_A_DQS#7
M_A_DQS#5
M_A_DQS#6
JDIM9A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=5.2_STD
ddr-ddrsk-20401-tp4b-204p-smt
DGMK4000433
IC SOCKET DDR3 STD SO-DIMM(204P,H5.2)
Other one: DGMK4000109
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
EZIW
M_A_DQ5
5
M_A_DQ4
7
M_A_DQ6
15
M_A_DQ2
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ7
16
M_A_DQ3
18
M_A_DQ13
21
M_A_DQ12
23
M_A_DQ15
33
M_A_DQ14
35
M_A_DQ9
22
M_A_DQ8
24
M_A_DQ10
34
M_A_DQ11
36
M_A_DQ25
39
M_A_DQ24
41
M_A_DQ30
51
M_A_DQ31
53
M_A_DQ29
40
M_A_DQ28
42
M_A_DQ27
50
M_A_DQ26
52
M_A_DQ21
57
M_A_DQ20
59
M_A_DQ18
67
M_A_DQ23
69
M_A_DQ17
56
M_A_DQ16
58
M_A_DQ22
68
M_A_DQ19
70
M_A_DQ33
129
M_A_DQ32
131
M_A_DQ39
141
M_A_DQ38
143
M_A_DQ36
130
M_A_DQ37
132
M_A_DQ35
140
M_A_DQ34
142
M_A_DQ61
147
M_A_DQ60
149
M_A_DQ59
157
M_A_DQ58
159
M_A_DQ56
146
M_A_DQ57
148
M_A_DQ62
158
M_A_DQ63
160
M_A_DQ45
163
M_A_DQ44
165
M_A_DQ46
175
M_A_DQ43
177
M_A_DQ40
164
M_A_DQ41
166
M_A_DQ42
174
M_A_DQ47
176
M_A_DQ52
181
M_A_DQ53
183
M_A_DQ54
191
M_A_DQ50
193
M_A_DQ49
180
M_A_DQ48
182
M_A_DQ51
192
M_A_DQ55
194
Place these Caps near So-Dimm0.
For EMI RESERVE
+1.35VSUS
EC14 *120P/50V_4
EC12 *120P/50V_4
EC11 *120P/50V_4
EC15 *120P/50V_4
EC18 *120P/50V_4
EC16 *120P/50V_4
EC19 *120P/50V_4
A A
+VDDQ_VTT
EC9 *120P/50V_4
EC10 *120P/50V_4
5
+1.35VSUS
EC13 *120P/50V_4
EC22 *120P/50V_4
EC17 *120P/50V_4
EC20 *0.1U/10V_4
EC21 *0.1U/10V_4
EC23 *0.1U/10V_4
EC24 *0.1U/10V_4
4
+1.35VSUS
+
*330u/2V_7343
Near SO-DIMM
0.1uF/10uF 4pcs on each side of connector
+1.35VSUS +VDDQ_VTT
C227
C223 0.1U/10V_4
C233 0.1U/10V_4
C244 0.1U/10V_4
C253 0.1U/10V_4
C260 0.1U/10V_4
C265 0.1U/10V_4
C268 0.1U/10V_4
C269 0.1U/10V_4
C219 10U/6.3V_6
C230 10U/6.3V_6
C241 10U/6.3V_6
C250 10U/6.3V_6
C259 10U/6.3V_6
C264 10U/6.3V_6
C267 10U/6.3V_6
C272 10U/6.3V_6
M_A_DQ[63:0] [2]
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ
3
M_A_DRAMRST# [2]
C149 1u/6.3V_4
C150 1u/6.3V_4
C147 1u/6.3V_4
C148 1u/6.3V_4
C146 10U/6.3V_6
C208 0.1U/10V_4
C201 *2.2U/6.3V_6
C313 0.1U/10V_4
C314 *2.2U/6.3V_6
+3V
C153 0.1U/10V_4
C154 0.1U/10V_4
Follow CHK list
+3V
TP16
+SMDDR_VREF_DQ
+SMDDR_VREF_DIMM
+VDDQ
+1.35VSUS
2.48A
+3V
R122 10K/F_4
PM_EXTTS#0
C289 *0.1U/10V_4
+VDDQ [36]
R170 *0_6
2
+VDDQ
+1.35VSUS
JDIM9B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
R179
4.7K/F_4
R168
4.7K/F_4
25
26
31
32
37
38
43
R294 *0_6
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM0_H=5.2_STD
ddr-ddrsk-20401-tp4b-204p-smt
DGMK4000433
IC SOCKET DDR3 STD SO-DIMM(204P,H5.2)
Other one: DGMK4000109
+1.35VSUS
R295
4.7K/F_4
R296
4.7K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
203
VTT1
204
VTT2
205
GND
206
GND
VREF DQ0 M1 Solution
+SMDDR_VREF_DIMM
DDR3 DIMM0-STD(5.2H)
DDR3 DIMM0-STD(5.2H)
DDR3 DIMM0-STD(5.2H)
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
11
+VDDQ_VTT
+SMDDR_VREF_DQ
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 11
44 11
44 11
1A
1A
1A
Page 12
5
4
3
2
1
+1.8V
R249
10K_4
D D
GND
R230 0_4
VCCA1VCCB
3
A
GND2OE
*G2129TL1U
+3V_S5 +1.8V_S5
U16
6
4
B
5
R220
*10K_4
SERIRQ [19] SOC_SERIRQ [7,28]
+1.8V_S5
EC_PWROK [2,19]
DPWROK_EC [19]
RSMRST# [19]
EC_PWROK
use 985LB1, SERIRQ just bypass.
+1.8V [4,5,6,7,9,19,20,21,27,28,37]
+3V_S5 [2,9,19,21,24,27,28,34,35,37,39,40]
+3V [4,5,7,9,11,13,17,19,20,22,24,25,26,27,28,35,37,39,40]
+1.8V_S5 [6,7,9,21,37]
+1.8VPCU [19,32,37]
PCH_SLP_S0# [6]
C C
DNBSWON# [19]
GND
SIO_EXT_SCI# [19]
R240
+3V_S5
WAKE_SRC_1 [19,27,28]
SIO_EXT_SMI# [19]
B B
10K_4
GND
+1.8V_S5
1
*PJA138K
U17
1
A1
2
GND
A23Y2
74LVC2G07GW
U15
1
A1
2
GND
A23Y2
74LVC2G07GW
2
VCC
VCC
R223 *10K_4
3
Q33
R258 10K_4
SOC_PWRBTN#
6
Y1
5
4
R256 10K_4
6
Y1
5
4
SOC_PMC_WAKE
R238 *10K_4
+3V_S5
PCH_SLP_S0_N [19]
+1.8V_S5
SOC_PWRBTN# [6]
+1.8V_S5
SOC_KBC_SCI [5]
+1.8V
SOC_PMC_WAKE [6]
+3V_S5
SOC_KCB_SMI [6]
+1.8V_S5
SLP_S3# [6]
+1.8V_S5
SLP_S4# [2,6]
Reserve For EC GPIO input.
R227 *0_4
PJ4N3KDW
Q31A
3 4
5
2
Q31B
PJ4N3KDW
R253 *10K_4
R222 *10K_4
6 1
R235 *0_4
Reserve For EC GPIO input.
R236 *10K_4
SUSB# [19]
SUSC# [19]
R226 *10K_4
GND
+1.8VPCU
GND
R199 0_4
R212 *0/J_4
R206
100K/F_4
GND
R200 0_4
R207
100K/F_4
GND
SLP_S0IX# [6]
SOC_PLTRST# [6]
CORE_PWROK [6]
SOC_RSMRST# [6]
R218 *0/J_4
+1.8V_S5
PJ4N3KDW
Q29A
3 4
5
2
6 1
Q29B
PJ4N3KDW
+3V_S5
R250
10K_4
SLP_SUS#_EC [19]
PLTRST# [13,19,24,25,27,28]
R217 10K_4
12
+3V
+3V
2
*2N7002K
+1.8V
2
Q41
*PJA138K
3
Q32
R221
3
R384
R385 *10K_4
4
+3V
DGPU_HOLD_RST# [13] DGPU_HOLD_RST#_Q [5]
3
DGPU_PWROK [17] DGPU_PWR_EN [40] DGPU_PWR_EN_Q [5] DGPU_PWROK_Q [5]
1
0_4
Check Q51 / Q52 Gate Power to +3V Power rail.
Check which GPIO(+1.8V_S0)
A A
5
1
0_4
R251 *10K_4
+1.8V
1
0_4
2
Q30
*PJA138K
R231
R224 *10K_4
3
+3V +1.8V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
2
Thursday, July 10, 2014
PROJECT :
Level Shfiter
Level Shfiter
Level Shfiter
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 12
44 12
44 12
Page 13
5
<VGA>
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
D D
place under BGA
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
place under BGA
1000mA
C125 EV@22u/6.3V_8
C123 EV@22u/6.3V_8
C102 EV@10u/6.3V_6
C94 EV@10u/6.3V_6
C105 EV@4.7u/6.3V_6
C92 EV@1u/6.3V_4
C109 EV@1u/6.3V_4
C131 EV@22u/6.3V_8
C130 EV@22u/6.3V_8
C93 EV@10u/6.3V_6
C103 EV@10u/6.3V_6
C107 EV@4.7u/6.3V_6
C108 EV@1u/6.3V_4
C101 EV@1u/6.3V_4
2500mA
C C
210mA of +3V_GFX
PLACE NEAR BGA
+3V_GFX
+1.05V_GFX [14,15,40]
+3V_GFX [16,17,40]
+VGPU_CORE [39]
+3V_MAIN [16,17]
+3V [4,5,7,9,11,12,17,19,20,22,24,25,26,27,28,35,37,39,40]
VGA_VCCSENSE [39]
VGA_VSSSENSE [39]
B B
PEX_PLLVDD : 0.3MM = 12mils (150mA)
RSVD R1 and C1 for GV2 co-layout sDDR3
+1.05V_GFX
C91
C1
EV@1u/6.3V_4
A A
EV@10K/F_4
C98 EV@0.1u/10V_4
C99 EV@4.7u/6.3V_6
PEX_TSTCLK
R372 *EV@200/F_4
PEX_TSTCLK#
R1
PEX_PLLVDD
R51 *short_6
C104 EV@4.7u/6.3V_6
C89 EV@1u/6.3V_4
C90 EV@0.1u/10V_4
TESTMODE
R56
PEX_TERMP
R59 EV@2.49K/F_4
5
U25A
AA22
PEX_IOVDD
AB23
PEX_IOVDD
AC24
PEX_IOVDD
AD25
PEX_IOVDD
AE26
PEX_IOVDD
AE27
PEX_IOVDD
AA10
PEX_IOVDDQ
AA12
PEX_IOVDDQ
AA13
PEX_IOVDDQ
AA16
PEX_IOVDDQ
AA18
PEX_IOVDDQ
AA19
PEX_IOVDDQ
AA20
PEX_IOVDDQ
AA21
PEX_IOVDDQ
AB22
PEX_IOVDDQ
AC23
PEX_IOVDDQ
AD24
PEX_IOVDDQ
AE25
PEX_IOVDDQ
AF26
PEX_IOVDDQ
AF27
PEX_IOVDDQ
AA8
PEX_PLL_HVDD
AA9
PEX_PLL_HVDD
AB8
PEX_SVDD_3V3
F2
VDD_SENSE
F1
GND_SENSE
8mils width
(0.2MM)
AF22
PEX_TSTCLK_OUT
AE22
PEX_TSTCLK_OUT
AA14
PEX_PLLVDD
AA15
PEX_PLLVDD
place near BGA
place near ball
AD9
TESTMODE
AF25
PEX_TERMP
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_WAKE
PEX_RST
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119 GF117
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
4
4
PEGX_RST#
PEX_CLKREQ#
C_PEG_RX0
C_PEG_RX#0
PEG_TX0
PEG_TX#0
C_PEG_RX1
C_PEG_RX#1
PEG_TX1
PEG_TX#1
C120 EV@0.22u/10V_4
C119 EV@0.22u/10V_4
C117 EV@0.22u/10V_4
C118 EV@0.22u/10V_4
U25C
14/14 XVDD/VDD33
AD10
NC
AD7
NC
B19
NC
F11
3V3AUX_NC
V5
FERMI_RSVD1_NC
V6
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
G1
XPWR_G1
G2
XPWR_G2
G3
XPWR_G3
G4
XPWR_G4
G5
XPWR_G5
G6
XPWR_G6
G7
XPWR_G7
V1
XPWR_V1
V2
XPWR_V2
W1
XPWR_W1
W2
XPWR_W2
W3
XPWR_W3
W4
XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMON
PEX_CLKREQ#
CLK_PCIE_VGAP [6]
CLK_PCIE_VGAN [6]
PEG_RX0 [5]
PEG_RX#0 [5]
PEG_TX0 [5]
PEG_TX#0 [5]
PEG_RX1 [5]
PEG_RX#1 [5]
PEG_TX1 [5]
PEG_TX#1 [5]
G10
VDD33
G12
VDD33
G8
VDD33
G9
VDD33
R55
EV@10K/F_4
1
Q15
EV@2N7002K
3
+3V_GFX +3V_GFX
Follow Z09 to isolate CLK_REQ#
2
3
CLK_PEGA_REQ# [5]
PU at page 9
PLACE CLOSE TO BGA
J8/K8
+3V_GFX
C39 EV@4.7u/6.3V_6
C43 EV@1u/6.3V_4
C33 EV@0.1u/10V_4
PLACE CLOSE TO GPU BALLS L8/M8
not GC6 2.0 unstuff resistor
PLACE CLOSE TO BGA
L8/M8
+3V_MAIN
C40 EV@4.7u/6.3V_6
C31 EV@1u/6.3V_4
C32 EV@0.1u/10V_4
C44 EV@0.1u/10V_4
PLACE CLOSE TO GPU BALLS L8/M8
0.4MM = 16mils
+3V_GFX
+3V_MAIN
0.4MM = 16mils
3
bga595-nvidia-n13p-gv2-s-a2
for meet Power down sequence
for +3V_GFX
+VGPU_CORE
+1.5V_GFX
D11 *EV@RB500V-40
D10 *EV@820@RB500V-40
No stuff D8 when GC6 support.
C392
EV@0.1u/10V_4
PLTRST# [12,19,24,25,27,28]
DGPU_HOLD_RST# [12]
2
1
R375
PCH control PEGX_RST#
11/14 NVVDD
+3V
3 5
U25E
COMMON
+VGPU_CORE
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
L11
VDD
L13
VDD
L15
VDD
L17
VDD
M10
VDD
M12
VDD
M14
VDD
M16
VDD
M18
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
P10
VDD
P12
VDD
P14
VDD
P16
VDD
P18
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
T10
VDD
T12
VDD
T14
VDD
T16
VDD
T18
VDD
U11
VDD
U13
VDD
U15
VDD
U17
VDD
V10
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
4
U26
EV@TC7SH08FU
*EV@0_4
2
+VGPU_CORE
+3V_GFX
2
PLACE UNDER GPU BALLS
C65
EV@4.7u/6.3V_6
C49
EV@4.7u/6.3V_6
+
C74
*EV@22u/6.3V_8
C380
EV@330u/2V_7343
PEGX_RST# [16]
C375
EV@4.7u/6.3V_6
4.7uF x 15 population x10
C50
EV@4.7u/6.3V_6
C376
EV@47u/6.3V_8
C71
*EV@22u/6.3V_8
C378
*EV@4.7u/6.3V_6
C88
*EV@22u/6.3V_8
C374
EV@4.7u/6.3V_6 R52 *EV@0_4
C86
EV@22u/6.3V_8
C82
EV@4.7u/6.3V_6
C80
*EV@4.7u/6.3V_6
47u x1 22u x7
stuff x 1
C377
EV@4.7u/25V_8
0817 RSVD more NVVDD caps by NV DG
C53
*EV@22u/6.3V_8 C100 EV@4.7u/6.3V_6
VDD33
+3V_GFX/
+3V_MAIN
NVDD
+VGPU_CORE
PXE_VDD
+1.05V_GFX
FBVDDQ
+1.35_GFX
I/O 3.3V
PEX_RST
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
13
C379
EV@4.7u/6.3V_6
C67
*EV@4.7u/6.3V_6
C72
*EV@22u/6.3V_8
Trise >= 1uS Tfail <=500nS
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
C373
EV@4.7u/6.3V_6
C64
*EV@4.7u/6.3V_6
PLACE NEAR GPU
4.7u x6
330u x1
stuff x 5
RSVD by DG
C52
EV@4.7u/25V_8
C51
EV@4.7u/25V_8
C85
*EV@22u/6.3V_8
+VGPU_CORE
0.1uF x 8 population x 4
C83 EV@0.1u/10V_4
C69 EV@0.1u/10V_4
C75 EV@0.1u/10V_4
C59 EV@0.1u/10V_4
C81 *EV@0.1u/10V_4
C79 *EV@0.1u/10V_4
C76 *EV@0.1u/10V_4
C66 *EV@0.1u/10V_4
t>0
t>0
N15x Power on sequance
PEX_RST timing
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
C55
EV@4.7u/6.3V_6
C68
*EV@4.7u/6.3V_6
C73
EV@4.7u/25V_8
C87
*EV@4.7u/25V_8
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
13 44 Thursday, July 10, 2014
13 44 Thursday, July 10, 2014
13 44 Thursday, July 10, 2014
C56
EV@4.7u/6.3V_6
C54
EV@4.7u/25V_8
1A
1A
1A
Page 14
5
4
3
2
1
<VGA>
FB_CLAMP
R359 EV@10K_4
N15V-GM no support GC6 function.
D D
+1.05V_GFX [13,15,40]
+1.5V_GFX [13,18,40]
FBA_CMD[30:0] [18]
C C
B B
+1.5V_GFX
VMA_CLK0 [18]
VMA_CLK0# [18]
VMA_CLK1 [18]
VMA_CLK1# [18]
+1.05V_GFX
A A
EV@HCB1608KF/1A/30ohm_6
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
TP36
FBA_DEBUG0
R39 *EV@60.4/F_4
FBA_DEBUG1
R42 *EV@60.4/F_4
L11
C63 EV@22u/6.3V_8
C62 EV@0.1u/10V_4
+FB_PLLAVDD
C70 EV@0.1u/10V_4
+FB_PLLAVDD
C41 EV@0.1u/10V_4
C87 close ball H22 35mA
U25B
F3
FB_CLAMP
C27
FBA_CMD0
C26
FBA_CMD1
E24
FBA_CMD2
F24
FBA_CMD3
D27
FBA_CMD4
D26
FBA_CMD5
F25
FBA_CMD6
F26
FBA_CMD7
F23
FBA_CMD8
G22
FBA_CMD9
G23
FBA_CMD10
G24
FBA_CMD11
F27
FBA_CMD12
G25
FBA_CMD13
G27
FBA_CMD14
G26
FBA_CMD15
M24
FBA_CMD16
M23
FBA_CMD17
K24
FBA_CMD18
K23
FBA_CMD19
M27
FBA_CMD20
M26
FBA_CMD21
M25
FBA_CMD22
K26
FBA_CMD23
K22
FBA_CMD24
J23
FBA_CMD25
J25
FBA_CMD26
J24
FBA_CMD27
K27
FBA_CMD28
K25
FBA_CMD29
J27
FBA_CMD30
J26
FBA_CMD31
F22
FBA_DEBUG0
J22
FBA_DEBUG1
D24
FBA_CLK0
D25
FBA_CLK0
N22
FBA_CLK1
M22
FBA_CLK1
D18
FBA_WCK01
C18
FBA_WCK01
D17
FBA_WCK23
D16
FBA_WCK23
T24
FBA_WCK45
U24
FBA_WCK45
V24
FBA_WCK67
V25
FBA_WCK67
F16
FB_PLLAVDD
P22
FB_PLLAVDD
H22
FB_DLLAVDD
GF119 NC
GF117
GF119
GF117 FB_PLLAVDD
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25
D19
D14
C17
C22
P24
W24
AA25
U25
E19
C15
B16
B22
R25
W23
AB26
T26
F19
C14
A16
A22
P25
W22
AB27
T27
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
VMA_DQ[63:0]
For Fermi
FBA_CMD2
FBA_CMD3
FBA_CMD5
FBA_CMD18
FBA_CMD19
VMA_DM[7..0] [18]
VMA_WDQS[7..0] [18]
VMA_RDQS[7..0] [18]
VMA_DQ[63:0] [18]
R36 EV@10K/F_4
R32 EV@10K/F_4
R41 EV@10K/F_4
R368 EV@10K/F_4
R53 EV@10K/F_4
+1.5V_GFX
PLACE CLOSE TO GPU BALLS
sDDR3
R47=42.2/F
R50=51.1/F
FB_CAL_PD_VDDQ
R35 EV@40.2/F_4
FB_CAL_PU_GND
R29 EV@42.2/F_4
FB_CAL_TERM_GND
R27 EV@51.1/F_4
D22
FB_CAL_PD_VDDQ
C24
FB_CAL_PU_GND
B25
FB_CALTERM_GND
U25D
12/14 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
bga595-nvidia-n13p- gv2-s-a2
COMMON
B26
C25
E23
E26
F14
F21
G13
G14
G15
G16
G18
G19
G20
G21
H24
H26
J21
K21
L22
L24
L26
M21
N21
R21
T21
V21
W21
PLACE CLOSE TO GPU BALLS
+1.5V_GFX
+1.5V_GFX
C38 EV@0.1u/10V_4
C35 EV@0.1u/10V_4
C57 *EV@0.1u/10V_4
C36 *EV@0.1u/10V_4
C30 EV@1u/6.3V_4
C27 EV@1u/6.3V_4
C28 *EV@1u/6.3V_4
C77 *EV@1u/6.3V_4
C45 EV@4.7u/6.3V_6
C133 EV@4.7u/6.3V_6
C97 *EV@4.7u/6.3V_6
C14 *EV@4.7u/6.3V_6
C46 EV@10u/6.3V_6
C84 *EV@10u/6.3V_6
C21 *EV@10u/6.3V_6
C11 *EV@10u/6.3V_6
C15 EV@22u/6.3V_8
C13 EV@22u/6.3V_8
C12 *EV@22u/6.3V_8
C16 EV@22u/6.3V_8
PLACE CLOSE TO BGA
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
COMMON bga595-nvidia-n13p-gv2-s-a2
+
C10 *EV@330u/2V_7343
+
C350 EV@330u/2V_7343
13/14 GND
U25F
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
14
A2
AB17
AB20
AB24
AC2
AC22
AC26
AC5
AC8
AD12
AD13
A26
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AB11
AF1
AF11
AF14
AF17
AF20
AF23
AF5
AF8
AG2
AG26
AB14
B1
B11
B14
B17
B20
B23
B27
B5
B8
E11
E14
E17
E2
E20
E22
E25
E5
E8
H2
H23
H25
H5
K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
FB_VREF_PROBE
5
4
D23
COMMON bga595-nvidia-n13p- gv2-s-a2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
14 44 Thursday, July 10, 2014
14 44 Thursday, July 10, 2014
14 44 Thursday, July 10, 2014
1A
1A
1A
Page 15
5
<VGA> <HDM> <CRT>
U25G
4/14 IFPAB
GF119
AA6
IFPAB_RSET
V7
D D
C C
W7
W6
Y6
IFPAB_PLLVDD
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPAB
GF117 GF119
NC
NC
GF117
4
GF119
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
GPIO14
COMMON bga595-nvidia-n13p- gv2-s-a2
AC4
AC3
Y3
Y4
AA2
AA3
AA1
AB1
AA5
AA4
AB4
AB5
AB2
AB3
AD2
AD3
AD1
AE1
AD5
AD4
B3
3
U25K
3/14 DACA
GF119
TSEN_VREF
GF117
NC
NC
NC
GF117
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
bga595-nvidia-n13p- gv2-s-a2 COMMON
U25I
6/14 IFPD
GF119
U6
IFPD_RSET
T7
IFPD_PLLVDD
R7
IFPD_PLLVDD
IFPD
R6
IFPD_IOVDD
GF119
GF117
NC
GF117
NC
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
I2CX_SDA
I2CX_SCL
2
GF119
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
GF119
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
B7
A7
AE3
AE4
AG3
AF4
AF3
DP DVI/HDMI
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
GPIO17
EV_CRTDCLK
EV_CRTDDAT
P4
P3
R5
R4
T5
T4
U4
U3
V4
V3
D4
R339 EV@2.2K_4
R344 EV@2.2K_4
1
15
U25H
5/14 IFPC
GF119
T6
IFPC_RSET
M7
IFPC_PLLVDD
N7
IFPC_PLLVDD
B B
P6
IFPC_IOVDD
L9 EV@HCB1608KF/1A/30ohm_6
+1.05V_GFX
+1.05V_GFX
A A
C29
EV@22u/6.3V_8
Near GPU
C42
EV@0.1u/10V_4
Under GPU
L10 EV@BLM15PX181SN1D(180,1.5A)_4
C48
C58
EV@22u/6.3V_8
EV@4.7u/6.3V_6
NV_PLLVDD 0.3MM=12mils 78mA
GPU_SP_PLLVDD 0.3MM=12mils
SP_VID_PLLVDD
C61
C60
EV@0.1u/10V_4
EV@0.1u/10V_4
close to balls one by one ball
+1.05V_GFX [13,14,40]
5
NV_PLLVDD
GF117
NC
NC
NC
NC
R336 EV@10K/F_4
CLK_27M_VGA_2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
U25M
L6
PLLVDD
M6
SP_PLLVDD
N6
VID_PLLVDD
A10
XTALSSIN
C11
XTALIN
CLK_27M_VGA_2
XTALOUT
4
9/14 XTAL_PLL
DVI/HDMI DP
I2CW_SDA
I2CW_SCL
GF119 GF117
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
NC
C367
EV@10p/50V_4
GF119
GF117
IFPC
IFPC_AUX
IFPC_AUX
IFPC_L3
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
GPIO15
COMMON bga595-nvidia-n13p- gv2-s-a2
1 3
2 4
Y11
EV@27MHZ
N5
N4
N3
N2
R3
R2
R1
T1
T3
T2
C3
R342 EV@10K/F_4
C10
XTALOUTBUFF
B10
XTALOUT
C366
EV@10p/50V_4
XTALOUT
COMMON bga595-nvidia-n13p- gv2-s-a2
3
bga595-nvidia-n13p- gv2-s-a2 COMMON
U25J
J7
K7
K6
7/14 IFPEF
GF119
IFPEF_PLLVDD
IFPEF_PLLVDD
IFPEF_RSET
GF117
GF117
DVI-DL
I2CY_SDA
NC
NC
NC
NC
NC
I2CY_SCL
NC
TXC
NC
TXC
TXD0
NC
NC
TXD0
NC
TXD1
NC
TXD1
NC
TXD2
NC
TXD2
GF119
DVI-SL/HDMI
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPE
HPD_E NC
GF119
IFPF
GF117
NC
GF117
NC
DVI-DL
NC
NC
NC
NC
TXD3
NC
NC
TXD3
NC
TXD4
TXD4
NC
TXD5
NC
TXD5
NC
NC
H6
IFPE_IOVDD
J6
IFPF_IOVDD
bga595-nvidia-n13p- gv2-s-a2 COMMON
HPD_E
GF119
DVI-SL/HDMI
I2CZ_SDA
I2CZ_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_F
2
DP
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
GPIO18
DP
IFPF_AUX
IFPF_AUX
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
GPIO19
J3
J2
J1
K1
K3
K2
M3
M2
M1
N1
C2
H4
H3
J5
J4
K5
K4
L4
L3
M5
M4
F7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
DGPU 3/5 (Display)
DGPU 3/5 (Display)
DGPU 3/5 (Display)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
15 44 Thursday, July 10, 2014
15 44 Thursday, July 10, 2014
15 44 Thursday, July 10, 2014
1A
1A
1A
Page 16
5
<VGA>
D D
R3
R362 *EV@40.2K/F_4
N15V-GM NC
R38 *EV@40.2K
R34 *EV@40.2K
+3V_GFX [13,17, 40]
+3V_MAIN [13,17]
C C
JTAG_TCK
JTAG_TMS
JTAG_TDI JTAG_TDI
JTAG_TDO
TP39
JTAG_TRST#
B B
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
E10
F10
D1
D2
E4
E3
D3
C1
F6
F4
F5
E12
F12
AE5
AD6
AE6
AF6
AG4
U25L
10/14 MISC2
VMON_IN0
VMON_IN1
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
GF119
STRAP5_NC
MULTISTRAP_REF0_GND
GF119
MULTISTRAP_REF1_GND
MULTISTRAP_REF2_GND
U25N
8/14 MISC1
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
GF117
NC
GF117
NC
NC
GF117
NC
NC
GF117
NC
NC
NC
ROM_SCLK
I2CC_SDA
GF119
GF119
ROM_CS
ROM_SI
ROM_SO
BUFRST
PGOOD
COMMON bga595-nvidia-n13p-gv2-s-a2
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CB_SCL
I2CB_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO16
GPIO20
GPIO21
COMMON bga595-nvidia-n13p-gv2-s-a2
CEC
4
D12
R37 EV@10K_4
ROM_SI
B12
ROM_SO
A12
ROM_SCLK
C12
D11
R21 *EV@10K_4
D10
E9
D9
D8
A9
B9
C9
C8
C6
B2
D6
C7
F9
A3
A4
B6
A6
F8
C5
E7
GPIO12_ACIN
D7
DGPU_PSI
B4
D5
E6
C4
TP34
I2CS Slave Address= 0x9E (default)
GFX_SCL
GFX_SDA
DGPU_EDIDCLK
DGPU_EDIDDATA
N13P_SCL
N13P_SDA
TP10
TP9
GPIO8_OVERT#
GPIO9_ALERT
GPU_PEX_RST_HOLD#
+3V_GFX
R337 EV@2.2K_4
R343 EV@2.2K_4
R338 EV@2.2K_4
R30 EV@2.2K_4
PWM-VID [39]
DGPU_PSI [39]
3
Binary mode strapping:
For N15V-GM-B sku:
Device ID=0x1140
R3= N.C.
1.ROM_SCLK =10K pull down.
2.ROM_SI= 10k pull down
3.ROM_SO= 10k pull down
4.Strap3~0 = RVL memory
binary mode setting.
5.Strap4 =10k pull down
+3V_MAIN
R334
R335
*EV@4.99K/F_4
R341
EV@10K/F_4
*EV@4.99K/F_4
R340
EV@10K/F_4
ROM_SI
ROM_SO
ROM_SCLK
Stuff 10K pull down N15V-GM:
N15V-GM VRAM Configuration Table:
4Gb
Vendor P/N Vendor
HYNIX
HT5C4G63AFR-11C
MICRON
MT41J256M16HA-093G:E
SAMSUNG
K4W4G164D-BC1A
R18
*EV@4.99K/F_4
R19
EV@10K/F_4
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R353
EV@10K/F_4
R352
*EV@10K/F_4
N15V-GM: Memory strap setting Please follow N15x latest RVL "RVL-06891-001".
Strap
[3:0]
0100 (0x4)
1101 (0xD) DDR3 256MBx16,1000MHz MICRON
1001 (0x9)
DESCRIPTION
DDR3 256MBx16,1000MHz
DDR3 256MBx16,1000MHz SAMSUNG
Vendor Vendor P/N
HYNIX
2
+3V_GFX
R357
R351
*EV@10K/F_4
*EV@10K/F_4
R350
R356
EV@10K/F_4
EV@10K/F_4
H5TC4G63AFR-11C
MT41J256M16HA-093G:E
K4W4G1646D-BC1A
Strap0 Strap3 Strap2 Strap1
0 0
0
000
1
R355
EV@10K/F_4
R354
*EV@10K/F_4
1
1
1 1
1
Default
R349
*EV@10K/F_4
STRAP0~3:
R348
EV@10K/F_4
N15V-GM Stuff 10K
QCI P/N
STRAP3
Optimus ---> 4.99k PD
Resistor P/N
10K ---> CS31002FB26
1
16
GPIO8 VGA thrmtrip# => inform EC
GPIO9_ALERT
DGPU_PSI
GPIO8_OVERT#
JTAG_TMS
JTAG_TDI
GPIO12_ACIN
GPU_PEX_RST_HOLD#
JTAG_TCK
JTAG_TRST#
A A
R25 EV@10K/F_4
R346 *EV@10K/F_4
R345 EV@10K/F_4
R48 *EV@10K/F_4
R49 *EV@10K/F_4
R11 EV@10K/F_4
R347 *EV@10K/F_4
R57 *EV@10K/F_4
R60 EV@10K/F_4
5
+3V_GFX
over temperature protect
GPIO8_OVERT#
Q13 EV@2N7002K
R20 *EV@0_4
GPIO12_ACIN
1
2
+3V_GFX
2
1
+3V_GFX
3
R22 *0/ short_4
Q9
EV@2N7002K
3
GPIO12 AC detect
AC high
DC low
4
dGPU_OTP# = EC control
dGPU_OTP# [19]
PEGX_RST# [13]
dGPU_OPP# = EC control
dGPU_OPP# [19]
SMBus(VGA)
EV@10K/F_4
GFX_SCL
GFX_SDA
R15
+3V_GFX
R14
EV@10K/F_4
4 3
1
EV@2N7002DW
+3V_MAIN
Q11
5
2
6
820M QCI P/N Vendor P/N
N15V-GM-B-A2 AJ0N15V0T03
3
0x1140 GeForce 820M
MBCLK2 [19,22]
MBDATA2 [ 19,22]
EC/S5 VGA/VGA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
16 44 Thursday, July 10, 2014
16 44 Thursday, July 10, 2014
16 44 Thursday, July 10, 2014
1A
1A
1A
Page 17
5
+3V_GFX [13,16,40]
+3V_MAIN [13,16]
+3V [4,5,7,9,11,12,13,19,20,22,24,25,26,27,28,35,37,39,40]
4
3
2
1
17
D D
+3V_GFX
60mil
R10
EV@0_8
N15V stuff not support GC6.
C C
+3V
R12
EV@4.7K_4
2
+3V_MAIN
B B
R9 EV@4.7K_4
2
C17
*EV@1000p/50V_4
1 3
EV@MMBT3904-7-F
C18
EV@1000p/50V_4 Q10
+3V_GFX
R16
EV@4.7K_4
Q12
1 3
EV@DTC144EU
60mil
+3V_MAIN
3V_MAIN_PWGD [39,40]
R17
EV@100K/F_4
+1.05V_GFX and GPU core power EN
DGPU_PWROK [12]
R64
EV@100K_4
FBVDDQ_EN [40]
U10
+3V
C127
EV@0.1u/10V_4
4
2
1
EV@TC7SH08FU
3 5
R63 *EV@0_4
R65 *short_4
GPU_PWR_GD
For N15V-GM no Support GC6 Stuff R1299
R62 EV@0_4
R61
EV@100K_4
HWPG_1.5VGFX [40]
GPU_PWR_GD [39]
GPU_PWR_GD
PD at GPU power side
C122 *EV@0.1u/10V_4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
PROJECT :
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1
1A
1A
1A
17 44 Thursday, July 10, 2014
17 44 Thursday, July 10, 2014
17 44 Thursday, July 10, 2014
Page 18
5
4
3
2
1
+1.05V_GFX [13,14,15,40]
VREFC_VMA1
VREFD_VMA1
FBA_CMD9 [14]
D D
FBA_CMD11 [14]
FBA_CMD8 [14]
FBA_CMD25 [14]
FBA_CMD10 [14]
FBA_CMD24 [14]
FBA_CMD22 [14]
FBA_CMD7 [14]
FBA_CMD21 [14]
FBA_CMD6 [14]
FBA_CMD29 [14]
FBA_CMD23 [14]
FBA_CMD28 [14]
FBA_CMD20 [14]
FBA_CMD4 [14]
FBA_CMD14 [14]
FBA_CMD12 [14]
FBA_CMD27 [14]
FBA_CMD26 [14]
VMA_CLK0 [14]
VMA_CLK0# [14]
FBA_CMD3 [14]
FBA_CMD2 [14]
C C
FBA_CMD0 [14]
FBA_CMD30 [14]
FBA_CMD15 [14]
FBA_CMD13 [14]
FBA_CMD5 [14]
Should be 240
Ohms +-1%
B B
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS1
VMA_RDQS1
VMA_DM1
VMA_DM0
VMA_WDQS0
VMA_RDQS0
FBA_CMD5
VMA_ZQ1
R33
EV@243/F_4
VRAM9
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_WDQS[7..0] [14]
VMA_RDQS[7..0] [14]
VMA_DQ12
VMA_DQ9
VMA_DQ13
VMA_DQ11
VMA_DQ14
VMA_DQ10
VMA_DQ15
VMA_DQ8
VMA_DQ7
VMA_DQ0
VMA_DQ5
VMA_DQ3
VMA_DQ4
VMA_DQ2
VMA_DQ6
VMA_DQ1
+1.5V_GFX
VMA_DQ[63..0] [14]
VMA_DM[7..0] [14]
Should be 240
Ohms +-1%
CHANNEL A: 2048MB DDR3X16
VREFC_VMA1
VREFD_VMA1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS2
VMA_RDQS2
VMA_DM2
VMA_DM3
VMA_WDQS3
VMA_RDQS3
FBA_CMD5
VMA_ZQ2 VMA_ZQ3
R358
EV@243/F_4
VRAM11
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ21
E3
VMA_DQ19
F7
VMA_DQ20
F2
VMA_DQ18
F8
VMA_DQ23
H3
VMA_DQ16
H8
VMA_DQ22
G2
VMA_DQ17
H7
VMA_DQ31
D7
VMA_DQ24
C3
VMA_DQ30
C8
VMA_DQ26
C2
VMA_DQ28
A7
VMA_DQ27
A2
VMA_DQ29
B8
VMA_DQ25
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK1 [14]
VMA_CLK1# [14]
FBA_CMD19 [14]
FBA_CMD18 [14]
FBA_CMD16 [14]
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS5
VMA_RDQS5
VMA_DM5
VMA_DM4
VMA_WDQS4
VMA_RDQS4
FBA_CMD5 FBA_CMD5
R50
EV@243/F_4
VRAM10
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
18
VMA_DQ40
E3
VMA_DQ45
F7
VMA_DQ41
F2
VMA_DQ47
F8
VMA_DQ43
H3
VMA_DQ46
H8
VMA_DQ42
G2
VMA_DQ44
H7
VMA_DQ33
D7
VMA_DQ39
C3
VMA_DQ34
C8
VMA_DQ37
C2
VMA_DQ35
A7
VMA_DQ36
A2
VMA_DQ32
B8
VMA_DQ38
A3
B2
+1.5V_GFX
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS7
VMA_RDQS7
VMA_DM7
VMA_DM6
VMA_WDQS6
VMA_RDQS6
VMA_ZQ4
R365
EV@243/F_4
VRAM12
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#H2
VDDQ#H9
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#E9
VDDQ#F1
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ62
E3
VMA_DQ58
F7
VMA_DQ63
F2
VMA_DQ56
F8
VMA_DQ61
H3
VMA_DQ57
H8
VMA_DQ60
G2
VMA_DQ59
H7
VMA_DQ54
D7
VMA_DQ48
C3
VMA_DQ55
C8
VMA_DQ50
C2
VMA_DQ53
A7
VMA_DQ51
A2
VMA_DQ52
B8
VMA_DQ49
A3
B2
D9
G7
K2
K8
N1
N9
R1
+1.5V_GFX
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
FBA_CMD17 [14]
VMA_CLK0
R31
EV@162/F_4
VMA_CLK0#
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
A A
+1.5V_GFX
C132 EV@1u/10V_4
C393 EV@1u/10V_4
C121 EV@1u/10V_4
C384 EV@1u/10V_4
5
+1.5V_GFX
C34 EV@10u/6.3V_6
C404 EV@1u/10V_4
C371 EV@1u/10V_4
C381 EV@1u/10V_4 C383 EV@0.1u/10V_4
C23 EV@1u/10V_4
R361
EV@1.33K/F_4
4
R360
EV@1.33K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
C372
EV@0.1u/10V_4
+1.5V_GFX
C362 EV@10u/6.3V_6
C364 EV@1u/10V_4
C390 EV@1u/10V_4
C124 EV@1u/10V_4
C37 EV@1u/10V_4
C113 EV@1u/10V_4
C24 EV@1u/10V_4 C365 EV@1u/10V_4
C368 EV@1u/10V_4
R26
EV@1.33K/F_4
R23
EV@1.33K/F_4
C26
EV@0.1u/10V_4
+1.5V_GFX
FBA_CMD1 [14]
C400 EV@10u/6.3V_6
C128 EV@10u/6.3V_6
C363 EV@0.1u/10V_4
C370 EV@0.1u/10V_4
C403 EV@0.1u/10V_4
C369 EV@0.1u/10V_4
C114 EV@0.1u/10V_4
3
FBA_CMD17
FBA_CMD1
10/14 modify
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
TP11
TP35
VMA_CLK1
R58
EV@162/F_4
VMA_CLK1#
+1.5V_GFX
C20 EV@10u/6.3V_6
C361 EV@10u/6.3V_6
C115 EV@0.1u/10V_4
C25 EV@0.1u/10V_4
2
+1.5V_GFX +1.5V_GFX +1.5V_GFX
R47
EV@1.33K/F_4
C96
EV@0.1u/10V_4
R44
EV@1.33K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
N15P- DDR3 VRAM 1/2
N15P- DDR3 VRAM 1/2
N15P- DDR3 VRAM 1/2
+1.5V_GFX
R370
EV@1.33K/F_4
1
R371
EV@1.33K/F_4
C386
EV@0.1u/10V_4
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 18
44 18
44 18
Page 19
5
EC 985LB1(KBC)
1.8V interface
L15 PBY160808T-250Y-N/3A/25ohm_6
1.8V p/n: AJ009850F02
Discription:IC CONTROLLER(128P)NPCE985LB1DX(LQFP)
30mil
C236
39p/50V_4
SIO_A20GATE
SIO_RCIN#
+1.05V_VTT_EC
EC_PECR_R
E775AGND
C171
0.1u/10V_4
MBCLK
MBDATA
MBCLK2
MBDATA2
D D
C C
B B
+3VPCU
R153 2.2/J_6
1 2
CLK_24M_KBC
R177
*22/J_4
C194
*10p/50V_4
+3V
R211
10K_4
R185
10K_4
1 2
SIO_EXT_SCI#
SIO_EXT_SMI#
SERIRQ
D17
*14V/38V/100P_4
+3V [4,5,7,9,11,12,13,17,20,22,24,25,26,27,28,35,37,39,40]
+3VPCU [6,8,21,22,25,26,30,31,32,37,39,40]
+1.8V [4,5,6,7,9,12,20,21,27,28,37]
+1.8VPCU [12,32,37]
Reserve for writing ME ROM
PECI interface should be used on Bay Trail platform,
thus VTT pin can wire to GND and PECI signal
can be left un-connected.
PLTRST# [12,13,24,25,27,28]
+3VPCU_EC
C168
4.7U/10V_6
0.03A(30mils)
C249
C178
*.1u/16V_4
0.1u/10V_4
LFRAME# [7,28]
LAD0 [7,28]
LAD1 [7,28]
LAD2 [7,28]
LAD3 [7,28]
CLK_24M_KBC [7]
CLKRUN# [7,28]
TP18
SIO_EXT_SCI# [12]
TP20
AMP_MUTE# [26]
PLTRST#
IOAC_PCIERST# [28]
SERIRQ [12]
SIO_EXT_SMI# [12]
EN_OVERRIDE [5]
TP21
C271
0.1u/10V_4
MX0 [21]
MX1 [21]
MX2 [21]
MX3 [21]
MX4 [21]
MX5 [21]
MX6 [21]
MX7 [21]
MY0 [21]
MY1 [21]
MY2 [21]
MY3 [21]
MY4 [21]
MY5 [21]
MY6 [21]
MY7 [21]
MY8 [21]
MY9 [21]
MY10 [21]
MY11 [21]
MY12 [21]
MY13 [21]
MY14 [21]
MY15 [21]
MY16 [21]
MY17 [21]
MBCLK [30]
MBDATA [30]
MBCLK2 [16,22]
MBDATA2 [16,22]
TPCLK [21]
TPDATA [21]
TP_INT_EC# [21]
MAINON [30,35]
R187 0_4
R190 *43/J_4 R203 10K_4
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
SM Bus 3
Battery
PCH
GPU
985LB1 Pin88
A A
20130606 Colay with 985L
+3VPCU_EC
R154 *0_6
0_6
R155
+1.8VPCU
5
C173
10U/6.3V_6
C182
0.1U/10V_4
VCCSPI
4
+A3VPCU
C167
C176
10U/6.3V_6
0.1u/10V_4
VCCSPI
19
46
76
88
115
U13
3
LFRAME
126
LAD0
127
LAD1
128
LAD2
1
LAD3
2
LCLK
8
GPIO11/CLKRUN
121
GPIO85/GA20
122
KBRST/GPIO86
29
ECSCI/GPIO54
6
GPIO24/LDRQ
124
GPIO10/LPCPD
7
LREST
123
GPIO67/PWUREQ
125
SERIRQ
9
GPIO65/SMI
54
KBSIN0
55
KBSIN1
56
KBSIN2
57
KBSIN3
58
KBSIN4
59
KBSIN5
60
KBSIN6
61
KBSIN7
53
KBSOUT0/JENK
52
KBSOUT1/TCK
51
KBSOUT2/TMS
50
KBSOUT3/TDI
49
KBSOUT4/JEN0
48
KBSOUT5/TDO
47
KBSOUT6/RDY
43
KBSOUT7
42
KBSOUT8
41
KBSOUT9/SDP_VIS
40
KBSOUT10/P80_CLK
39
KBSOUT11/P80_DAT
38
KBSOUT12/GPIO64
37
KBSOUT13/GPIO63
36
KBSOUT14/GPIO62
35
KBSOUT15/GPIO61/XOR_OUT
34
GPIO60/KBSOUT16
33
GPIO57/KBSOUT17
70
GPIO17/SCL1
69
GPIO22/SDA1
67
GPIO73/SCL2
68
GPIO74/SDA2
119
GPIO23/SCL3
120
GPIO31/SDA3
72
GPIO37/PSCLK1
71
GPIO35/PSDAT1
10
GPIO26/PSCLK2
11
GPIO27PSDAT2
77
GPIO00/32KCLKIN
12
VTT
13
PECI
NPCE985LB1DX
102
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
GND1
5
L14 PBY160808T-250Y-N/3A/25ohm_6
E775AGND
4
LPC
KB
SMB
PS/2
GND2
GND3
GND4
GND5
18
45
78
89
116
10mA
R172
*RB500V-40
0_6
A/D
D/A
GPIO06/IOX_DOUT/RTS1
GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS
GPIO
GPIO50/PSCLK3/TDO
GPIO52/PSDAT3/RDY
GPIO75/SPI_SCK
GPO82/IOX_LDSH/TEST
GPO84/IOX_SCLK/XORTR
GPIO20/TA2/IOX_DIN_DIO
TIMER
GND6
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO45/E_PWM
GPIO40/F_PWM/RI1
GPIO66/G_PWM
GPIO33/H_PWM/SOUT1
GPIO87/CIRRXM/SIN_CR
GPIO34/SIN1/CIRRXL
IR
GPIO46/CIRRXM/TRST
GPO83/SOUT_CR/TRIST
F_SDI/F_SDIO1
F_SDO/F_SDIO0
FIU
GPIO55/CLKOUT/IOX_DIN_DIO
VCORF
AGND
44
103
VCORF_uR
C270
1u/6.3V_4
R156 2.2/J_6
1 2
D18
GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO94/DA0
GPI95/DA1
GPI96/DA2
GPIO01/TB2
GPIO02
GPIO03
GPIO04
GPIO05
GPIO07
GPIO16
GPIO30
GPIO36/CTS1
GPIO41
GPIO44/TDI
GPO47/SCL4
GPIO51
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPO76/SHBM
GPIO77
GPIO81
GPIO97
GPIO56/TA1
GPIO14/TB1
F_CS0
F_SCK
VCC_POR
VREF
4
VDD
C191
4.7U/10V_6
97
98
99
100
101
105
106
64
79
95
96
108
93
94
114
109
15
80
VRON
HWPG_EC
17
20
21
24
TP_POWER_ON
25
26
27
28
73
74
RSMRST#_uR
75
EMU_LID
82
83
84
91
110
112
107
31
117
63
32
118
62
65
22
16
81
66
113
PCH_EDP_BLON_R
14
23
111
PCH_SPI_SO_R
86
PCH_SPI_SI_R
87
SPI_CS0#_UR_EC
90
PCH_SPI_CLK_R
92
30
VCC_POR#
85
104
+1.8V
C184
ICMNT_R
dGPU_OTP#
dGPU_OPP#
PROCHOT_EC
3
985L-A0 connects to +3v / 985L-B1 connects to +1.8v
1 2
C180
D16
0.1u/10V_4
0.1u/10V_4
C164 *10u/6.3V_6
C172 0.01U/25V_4
R164 *0/short_4
EC_DRAMRST_CNTRL
R198 *0/short_4
R196 *0/short_4
R192 0_4
R454 *0/short_4
R184 *0/short_4
R182 *0/short_4
R178 *0/short_4
TP26
R189 *47K/F_4
5V/30V/0.2p_4
ICMNT E775AGND
ICMNT
TP23
TP24
TP22
TP27
TP45
3
TEMP_MBAT [30]
ICMNT [30]
THRM_MOINTOR [8]
TP19
ACIN [30]
SLP_SUS#_EC [12]
NBSWON# [22]
SLP_SUS_ON [36]
LID# [22]
EC_FPBACK# [22]
BT_POWERON [28]
DPWROK_EC [12]
VRON [35]
SUSC# [12]
SUSB# [12]
TP_POWER_ON [37]
S5_ON [31,33,37,38]
PCH_SLP_S0_N [12]
TP_EN_EC [21]
RSMRST# [12]
RF_EN [28]
WAKE_SRC_1 [12,27,28]
DNBSWON# [12]
USBON# [24,25]
EC_ODD_EJ [22]
dGPU_OTP# [16]
SUSON [36]
FANSIG [22]
PCBEEP_EC [26]
PWRLED# [25]
BATLED0# [25]
CPUFAN# [22]
SUSLED# [25]
BATLED1# [25]
SUSWARN#_EC [6]
PCH_EDP_BLON [4,22]
dGPU_OPP# [16]
SOC_SPI_MISO_R1 [6]
SOC_SPI_MOSI_R1 [6]
SOC_SPI_CS#_R1 [6]
SOC_SPI_CLK_R1 [6]
+3VPCU
AC_PRESENT_EC [5]
EC_PWROK PWROK_EC_uR
2014/04/21:
Delete GPIO66 DGPU_PWR_EN for +3V_GFX
2
20140421:
Delete 1.05V_GFX_EN for Page.40
20140418:
Add VRON for Page.35
20140421:
Delete DGPU_PWROK
EC_PWROK [2,12]
pin91 in 985L is 1.8V only
<20090721_FAE suggestion>
Stuff 100K and close to EC side
for improving power consumption
PCH_SPI_SO_R
R186
100K_4
2
S5_ON
R205 4.7K/J_4
SM BUS PU(KBC)
MBCLK2
MBDATA2
PROCHOT_EC
R161
100K_4
PLTRST#
C521
0.1U/10V_4
5V/30V/0.2p_4
HWPG(KBC)
HWPG_1.0V [33]
HWPG_1.05V [34,37]
HWPG_1.8V [32]
HWPG_1.5V [34,37]
20140421:
Change to HWPG_1.5V
<20130722>Change power from +3V
to +3V_S5 for power sequence issue
HWPG_1.0V
HWPG_1.05V
HWPG_1.8V
MAINON
R191
100K/F_4
GND GND
S5_ON
R202
*100K/F_4
GND GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VPCU
MBCLK
MBDATA
R213 4.7K/J_4
R210 4.7K/J_4
2
EC_PWROK
R201 4.7K/J_4
R204 4.7K/J_4
R208 0_4
R214 *0_4
3
Q24
2N7002K
1
Q54 need Replacement at BOT layer.
1 2
D37
D19 *BAS316
D20 *BAS316
D21 *BAS316
D22 BAS316
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
1 2
5V/30V/0.2p_4
R193 10K_4
R197 10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
NPCE885/FLASH
NPCE885/FLASH
NPCE885/FLASH
1
+3VPCU
20140423:
Default use +3V
D38
+3V_S5
SLP_SUS_ON
SUSON
1
19
2013/07/31
SMBus Tr fail (spec
1000 ns max, result
1046 ns)
Change PU
resister(R424,R428)
from 10K to 4.7K
+3V
+3VPCU
H_PROCHOT# [5,35]
Close to EC
+3V_S5
R195
10K_4
HWPG_EC
R175
100K/F_4
R160
100K/F_4
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 19
44 19
44 19
1A
1A
1A
Page 20
5
4
3
2
1
EDP Conn.
+3V
U23
R326
*100K/F_4
IC(5P) G5243AT11U
5
IN
4
IN
3
ON/OFF
L23
*short_8
1
OUT
2
GND
INT
C353 *4.7U/25V_8
C352 0.1U/50V_6
C351 0.01U/25V_4
+LCDVCC_1
+VIN_BLIGHT
R327 *0/short_8
C348
*0.1u/10V_4
C343
0.1u/10V_4
C342
33p/50V_4
1 2
LCDVCC
C344
10u/10V_8
C347
*10p/50V_4
CCD_PWR
C345
1000p/50V_4
CCD_PWR
eDP_AUXP
eDP_AUXN
+VIN_BLIGHT
LCDVCC
PCH_DPST_PWM
BLON_CON
EDP_HPD_R
USBP3+_R
USBP3-_R
eDP_AUXP INT_eDP_AUXP
eDP_AUXN
eDP_TXP1
eDP_TXN1 INT_eDP_TXN1
eDP_TXP0
eDP_TXN0 INT_eDP_TXN0
+1.8V
R333
10K_4
DDI1_EDP_HPD_R [4]
Q39
2N7002K
3
EDP_HPD_R
2
1
GND GND
R328
100K/F_4
CCD
INT_eDP_AUXP [4]
INT_eDP_AUXN [4]
INT_eDP_TXP1 [4]
INT_eDP_TXN1 [4]
INT_eDP_TXP0 [4]
INT_eDP_TXN0 [4]
USBP3+ [7]
USBP3- [7]
USBP3+
USBP3-
+3V
INT_eDP_AUXN
INT_eDP_TXP1
INT_eDP_TXP0
+3V
R325 *short_6
PCH_DPST_PWM [4]
BLON_CON [22]
R332 *0/short_4
R331 *0/short_4
R330 100K/F_4
R329 100K/F_4
C359 EDP@0.1u/16V_4
C358 EDP@0.1u/16V_4
C357 EDP@0.1u/16V_4
C356 EDP@0.1u/16V_4
C355 EDP@0.1u/16V_4
C354 EDP@0.1u/16V_4
Refer to intel CRB
D D
PCH_DISP_ON [4]
C C
C346
*1U/6.3V_4
+VIN
C349
0.1U/50V_6
+VIN [29,30,31,35,36,37,38,39,40]
+1.8V [4,5,6,7,9,12,19,21,27,28,37]
+5V [22,23,26,37]
+3V [4,5,7,9,11,12,13,17,19,22,24,25,26,27,28,35,37,39,40]
CN9
G_5
40
39
38
37
36
35
34
33
32
G_4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
G_1
9
8
7
6
5
4
3
2
1
G_0
20
EDP@50398-04071-001
HDMI_HPD_CON [4]
EMI (EMC)
C_TX0_HDMI+
R377 *100/F_4
C_TX1_HDMI+
R379 *100/F_4
C_TX2_HDMI+
R380 *100/F_4
C_TXC_HDMI+
R376 *100/F_4
Q14
2N7002K
C_TX0_HDMI-
C_TX1_HDMI-
C_TX2_HDMI-
C_TXC_HDMI-
+1.8V
R46
10K_4
3
2
1
C_TX2_HDMI+
C_TX2_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
C_TXC_HDMI+
C_TXC_HDMI-
HDMI_SCLK
HDMI_SDATA
HDMI_5V
C95
220P/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RB500V-40
HDMI_HPD
C412 0.1U/10V_4
C411 0.1U/10V_4
C410 0.1U/10V_4
C409 0.1U/10V_4
C406 0.1U/10V_4
C405 0.1U/10V_4
C402 0.1U/10V_4
C401 0.1U/10V_4
5V_HSMBCK
5V_HSMBDT
2
C116
*220p/50V_4
R364 2.2K_4
R367 2.2K_4
C385 *10P/50V_4
C382 *10P/50V_4
VC9
*TVM0G5R5M220R
HDMI_5V
D14
*AZ5125-01J
IN_D2 [4]
IN_D2# [4]
IN_D1 [4]
IN_D1# [4]
IN_D0 [4] SDVO_CLK [4]
IN_D0# [4]
IN_CLK [4]
IN_CLK# [4]
2 1
D12
+5V
+5V
HDMI_HPD
R45
100K/F_4
3
2 1
D13 RB500V-40
Q16
3
OUT
IN
GND
AP2331SA-7
1
2
CN11
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
HDMI connector
LCD/HDMI/Camera
LCD/HDMI/Camera
LCD/HDMI/Camera
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
20
SHELL1
23
GND
22
GND
21
SHELL2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 20
44 20
44 20
HDMI Conn.
B B
HDMI-Level shift (HDM)
A A
+3V
R381
Close to Q31
1 2
C413
0.1U/10V_4
5
HDMI SMBus Isolation
+1.8V
SDVO_DATA [4]
+1.8V
Close to HDMI connector
DGPU_CL_HDMIP
3
Q42
2N7002K
2
1
*100K/F_4
R369 2.2K_4
R363 2.2K_4
R76 619/F_4
R74 619/F_4
R73 619/F_4
R71 619/F_4
R70 619/F_4
R69 619/F_4
R67 619/F_4
R66 619/F_4
Q40
4 3
1
PJ4N3KDW
C_TX2_HDMI+
C_TX2_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
C_TXC_HDMI+
C_TXC_HDMI-
+1.8V
5
2
6
HDMI_SCLK
HDMI_SDATA
HDMI-detect (HDM)
4
Page 21
5
4
3
2
1
TOUCHPAD BOARD CONN (TPD
I2C/PS2 co-lay)
+TPVDD_1
D D
+1.8V
C483
0.1U/25V_4
I2C_0_SDA [7]
I2C_0_SCL [7]
1
2
4
3
U31
GND
VREF1
SDA1
SCL1
PCA9306
EN
VREF2
SDA2
SCL2
R232
200K/F_4
8
C280
7
0.1U/25V_4
5
6
R255
2.2K/J_4
R254
2.2K/J_4
I2C_TP_SDA_R
I2C_TP_SCL_R
+3V_S5
+TPVDD
TPCLK [19]
TPDATA [19]
L30 *0_6
L29 0_6
R233
10K_4
R234
10K_4
C495
*0.1u/10V_4
50mil
*0.1u/10V_4
C494
+TPVDD_1
C496
0.1u/10V_4
TP_EN_EC [19]
connector to EC, check
+TPVDD_1
I2C_TP_SDA_R
I2C_TP_SCL_R
TP_INT#_R
CN19
1
2
3
4
5
6
789
TP CN
21
10
+1.8V_S5
+TPVDD_1
R252
2
C C
TP_INT_EC# [19]
3
Q34
2N7002K
*10K_4
TP_INT#_R
1
pull high at SOC side
TP_INT# [6]
3
1
R225
*10K_4
2N7002K
Q28
2
use for Acer request to change design.
KEYBOARD (KBC)
B B
A A
CN20
KB CONN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
5
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY17 MX4
MY16
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0
MX0 [19]
MX1 [19]
MX2 [19]
MX3 [19]
MX4 [19]
MX5 [19]
MX6 [19]
MX7 [19]
MY17 [19]
MY16 [19]
MY15 [19]
MY14 [19]
MY13 [19]
MY12 [19]
MY11 [19]
MY10 [19]
MY9 [19]
MY8 [19]
MY7 [19]
MY6 [19]
MY5 [19]
MY4 [19]
MY3 [19]
MY2 [19]
MY1 [19]
MY0 [19]
+3VPCU
MX4
MX5
MX6
MX7
<EMI>
MY17
MY16
10
9
8
7 4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
RP9
1
MX3
2
MX2
3
MX1
MX0
5 6
*10K_10P8R
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
C282 *100p/50V_4
C281 *100p/50V_4
4
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
CP13
*220P_8P4R
CP12
*220P_8P4R
CP11
*220P_8P4R
CP10
*220P_8P4R
CP9
*220P_8P4R
CP14
*220P_8P4R
+3VPCU [6,8,19,22,25,26,30,31,32,37,39,40]
+1.8V [4,5,6,7,9,12,19,20,27,28,37]
+3V_S5 [2,9,12,19,24,27,28,34,35,37,39,40]
+1.8V_S5 [6,7,9,12,37]
+TPVDD [28,37]
3
+TPVDD_1
R237
10K_4
R259
10K_4
3
2
2N7002K
Q27
1
TP_INT#_R
2
TP_INT#_R
C493
*10P/50V_4
reserve for auto wake up from S3 issue.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
KB/BT/TP/LED/Power Connector
KB/BT/TP/LED/Power Connector
KB/BT/TP/LED/Power Connector
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1
21 44 Thursday, July 10, 2014
21 44 Thursday, July 10, 2014
21 44 Thursday, July 10, 2014
1A
1A
1A
Page 22
5
4
3
2
1
SATA ODD
22
Connector
CN15
14
GND14
1
GND1
SATA_TXP_1ST_ODD_C
2
RXP
SATA_TXN_1ST_ODD#_C
3
RXN
4
D D
C C
GND2
SATA_RXN_1ST_ODD#_C
5
TXN
SATA_RXP_1ST_ODD_C
6
TXP
7
GND3
GND15
6030D-13G20
SATA_TXP1 [5]
SATA_TXN1 [5]
SATA_RXN1 [5]
SATA_RXP1 [5]
+5V
+5V
GND
GND
SATA_DP
8
DP
9
10
11
MD
12
13
15
+5V [20,23,26,37]
+3V [4,5,7,9,11,12,13,17,19,20,24,25,26,27,28,35,37,39,40]
+1.5V [9,23,26,34]
+3VPCU [6,8,19,21,25,26,30,31,32,37,39,40]
R183 *1K_4
C448
0.01U/25V_4
R167 10K_4
C447
0.01U/25V_4
SATA_TXP1
SATA_TXN1
SATA_RXN1
SATA_RXP1
C469 0.01u/25V_4
C468 0.01u/25V_4
C466 0.01u/25V_4
C464 0.01u/25V_4
C452
*0.1u/16V_4
EC_ODD_EJ [19]
+3V
C451
*0.1u/16V_4
C449
10U/6.3V_6
SATA_TXP1
SATA_TXN1
SATA_RXN1
SATA_RXP1
+5V_ODD +5V
R450 *0/short_8
+
C450
*100u/6.3V_3528
CPU FAN CTRL(THM)
B B
CPUFAN# [19]
CPU Thermal sensor(THS) /
MB Local TEMP
A A
+3V
2
1 3
Q19
MMBT3904-7-F
MBCLK2 [16,19]
MBDATA2 [16,19]
TP40
+3V
5
+5V
R94
1K/J_4
R81
10K_4
FAN_PWM_CN1
FANSIG [19]
MBCLK2
MBDATA2 THERMDA
ALERT#
R414 *10K/F_4
30mil
For EMI
8
7
6
4
+3V
R92
10K_4
C141
*220p/50V_4
U28
*EMC1412-1-ACZL-TR
VCC
SCLK
DXP
SDA
DXN
ALERT#
GND
OVERT#
+5V
R80
*short_8
+5V_FAN1
1
2
3
5
CN12
6
345
2
1
FAN1
C139
*220p/50V_4
C423 *0.01U/16V_4
THERMDC
4
+3V
TP42
TP41
EMC1412-1-ACZL-TR(98h) Main:AL001412003
TMP431ADGKR(98h) 2nd:AL000431014
HALL IC (HSR)
1st source EOD
2nd source AL008251000 -- YBT
3rd source AL009132001
4th source AL009249000
BLON_CON [20]
3
+3VPCU
+3V
1 3
C9 1u/10V_4
R130
10K_4
BLON_CON
Q22
2N7002K
2
Q23
DTC144EUA
Power Switch. (FSW)
AL009247000 -- BCD
AL009132001 -- ANC Main source
1
AL008251000 -- YBT 2nd
2
HE9
APX9132H AI
3
D15 RB500V-40
+3V
3
1
2
BL#
Q21
2N7002K
R129
10K_4
3
2
1
R139
*100K_4
2 1
D9
*VPORT_6
LID#
PCH_EDP_BLON [4,19]
EC_FPBACK# [19]
2
LID# [19]
NBSWON# [19]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VPCU
NBSWON#
C284
0.1u/10V_4
ODD/FAN/Hall/PSW
ODD/FAN/Hall/PSW
ODD/FAN/Hall/PSW
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
R241
10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
2 1
D23
*VPORT_6
SW10
MISAKI_SW_H1.5
1
3
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
2
4
5
6
1A
1A
1A
44 22
44 22
44 22
Page 23
5
4
3
2
1
SATA HDD1
D D
C C
B B
HDD1
CN21
12
11
SATA_CONN
10
9
8
7
6
5
4
3
2
1
SATA_TXP_1ST_HDD_C
SATA_TXN_1ST_HDD#_C
SATA_RXN_1ST_HDD#_C
SATA_RXP_1ST_HDD_C
C507
+
*100u/6.3V_3528
SATA_TXP0 [5]
SATA_TXN0 [5]
SATA_RXN0 [5]
SATA_RXP0 [5]
+5V [20,22,26,37]
+1.5V [9,22,26,34]
C514 0.01U/25V_4
C512 0.01U/25V_4
C511 0.01U/25V_4
C510 0.01U/25V_4
C509
10U/6.3V_6
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
+5V_HDD1
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
C508
0.1U/10V_4
120mil
R548 *short_8
C506
0.1U/10V_4
+5V
23
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
SATA HDD/SATA REDRIVER
SATA HDD/SATA REDRIVER
SATA HDD/SATA REDRIVER
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
23 44 Thursday, July 10, 2014
23 44 Thursday, July 10, 2014
23 44 Thursday, July 10, 2014
1A
1A
1A
Page 24
5
4
3
2
1
USB HUB
D D
12MHz
Y10
3 4
USB_H1_N1
USB_H1_P1
+3V_USB
HUB_USB2_N2
HUB_USB2_P2
GND GND
XIN
R289 *0/short_4
R288 *0/short_4
1 2
LCS
USB_H1_N [7]
USB_H1_P [7]
+3V_S5 [2,9,12,19,21,27,28,34,35,37,39,40]
+3V [4,5,7,9,11,12,13,17,19,20,22,25,26,27,28,35,37,39,40]
+5V_S5 [25,31,33,34,35,36,37,39]
C C
C311
22P/50V_4
TP31
XOUT
C319
22P/50V_4
USB_HUB_5V
U20
1
DD-0
2
DD+0
3
DD-1
4
DD+1
5
VCC_A_5
6
DD-2
7
DD+2
QFN28
EEPROM_SDA
nOVRP2
nOVRP1
+3V_USB
26
28
27
24
VCC
VREG
OVR#[1]25OVR#[2]
I2C_SDA
GL850G-OHY31
RREF8VCC_A_99XIN10XOUT11DD-312DD+313VCC_A_14
XOUT
XIN
+3V_USB
RREF
HUB_USB3_N
PGANG
23
HUB_USB3_P
PSELF
22
GANG
VCC_D
SELFPWR
OVR#[3]
OVR#[4]
RESET#
14
+3V_USB
GND
TEST
DD+4
DD-4
GND
29
52.4mA
+3V_USB_D
21
20
nOVRP3
19
nOVRP4
EEPROM_SCL
18
RESET#_USB
17
16
15
GL850G-OHY31
PLTRST# [12,13,19,25,27,28]
+3V_S5
R291 0_4
+3V
R314
*47K_4
R292 *0/J_4
20130619 Follow vendor's suggestion(Close to pin 21)
R317 *0/short_4
TP33
R321 *0/J_4
+3V_USB
C333
0.1U/10V_4
1 2
GND
USB_CAR_P [25]
USB_CAR_N [25]
+3V_USB
RESET#_USB
C335
0.1U/10V_4
GND GND
CARDREADER
R322
100K_4
+3V_USB
15 mil
C517
C515
0.1U/10V_4
0.1U/10V_4
1 2
1 2
GND
(Close to GL850G-31)
EEPROM_SDA
HUB_USB3_P
HUB_USB3_N
nOVRP1
nOVRP2
nOVRP3
nOVRP4
PSELF
PGANG
RREF
R302 10K_4
R307 *1K_4
R301 *1K_4
R305 10K_4
R310 10K_4
R316 10K_4
R315 10K_4
R313 10K_4
R312 100K/F_4
R287 619/F_4
C518
1u/6.3V_4
+3V_USB
C516
1u/6.3V_4
C519
0.1U/10V_4
1 2
24
+3V_USB
1 2
GND
C318
0.1U/10V_4
C315
10U/6.3V_4
(Close to pin 28)
B B
USBPWR2 USBPWR2
USB 2.0 CONNECTOR X2
+5V_S5
1u/6.3V_4
C263
USBON# [19,25]
SOC_USB_OC0 [7]
A A
U14
5
IN
4
EN
G524B2T11U
OUT
GND
1
2
3
/OC
Close USB2.0
C274
470P/50V_4
C275
0.1u/10V_4
USBPWR2
C278
*100U/6.3V_1206
HUB_USB2_N2
HUB_USB2_P2
2014/07/02 Change to
CH71001M687
(100U.6.3V_3528)
EMI@MCM2012B900GBE/400mA/90ohm
1
2
1
2
3
443
L28
*5V/30V/0.2p_4
G524B2T11U: Enable: Low Active /2.5A
5
4
+
C224
100u/6.3V_3528
USBP6_C- USBP7_CUSBP6_C+
1 2
1 2
D31
*5V/30V/0.2p_4
3
USB 2.0 Port1 USB 2.0 Port2
CN16
1
VDD
2
D-
3
D+
4
GND1
USB 2.0 CONN
D30
Main: DFHD04MR377
UB2-UARDM-4K1926-4P-R
GND6
GND5
GND7
GND8
6
5
7
8
HUB_USB3_N
HUB_USB3_P
2
2014/07/02 Change to
CH71001M687
(100U.6.3V_3528)
EMI@MCM2012B900GBE/400mA/90ohm
1
2
1
2
3
443
L31
*5V/30V/0.2p_4
+
C279
100u/6.3V_3528
CN18
1
VDD
2
USBP7_C+
1 2
1 2
D34
*5V/30V/0.2p_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
D-
3
D+
4
GND1
USB 2.0 CONN
D33
Main: DFHD04MR377
UB2-UARDM-4K1926-4P-R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
USB BOARD CONN
USB BOARD CONN
USB BOARD CONN
1
GND6
GND5
GND7
GND8
6
5
7
8
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 24
44 24
44 24
1A
1A
1A
Page 25
5
4
3
2
1
USB 3.0 Connector
USBP0- [7]
USBP0+ [7]
D D
USB30_RX1- [7]
USB30_RX1+ [7]
+3VPCU [6,8,19,21,22,26,30,31,32,37,39,40]
+3V [4,5,7,9,11,12,13,17,19,20,22,24,26,27,28,35,37,39,40]
+5V_S5 [24,31,33,34,35,36,37,39]
+5V_S5
C C
USBON# [19,24]
SOC_USB_OC1 [7]
USBON#
Change footprint 4/23
C415 1u/6.3V_4
U27
5
IN
4
EN
G524B2T11U
OUT
GND
/OC
1
2
3
Close USB3.0
C418
470P/50V_4
USB30_TX1- [7]
USB30_TX1+ [7]
C419
0.1u/10V_4
USBPWR1
C414
+
100u/6.3V_3528
USB30_TX1-
USB30_TX1+
2014/07/02 Change to
CH71001M687
(100U.6.3V_3528)
Need Check P/N and F/P
USBP0USBP0+
USB30_RX1USB30_RX1+
C424 0.1u/10V_4 R398 *0/short_4
C421 0.1u/10V_4 R393 *0/short_4
USB30_TX1-_C
USB30_TX1+_C
R412 *0/short_4
R415 *0/short_4
R446 *0/short_4
R447 *0/short_4
USBP0-_R
USBP0+_R
USB30_RX1-_R
USB30_RX1+_R
USB30_TX1-_R
USB30_TX1+_R
USBPWR1
CN13
USB3.0 CONN
1
VBUS
1
2
D-
2
3
3
D+
4
4
GND
5
5
SSRX-
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
9
SSTX+
12
USBP0-_R
USBP0+_R
USB30_RX1-_R
USB30_RX1+_R
USB30_TX1-_R
USB30_TX1+_R
11111010131312
RV11 *EGA_4
RV12 *EGA_4
RV13 *EGA_4
RV14 *EGA_4
RV10 *EGA_4
RV9 *EGA_4
1 2
1 2
1 2
1 2
1 2
1 2
25
G547E2P81U: Enable: Low Active /2.5A
B B
Card Reader+ LED/B Connector
+3VPCU
+3V
PWRLED# [19]
SUSLED# [19]
BATLED0# [19]
BATLED1# [19]
PLTRST# [12,13,19,24,27,28]
USB_CAR_N [24]
A A
5
USB_CAR_P [24]
4
CN23
1
13
2
14
3
4
5
6
7
8
9
10
11
12
Card reader+LED/B CONN
+3V +3VPCU
C336
39P/50V_4
For ESD
3
C520
39P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
USB 3.0 / Card Reader+LED CONN
USB 3.0 / Card Reader+LED CONN
USB 3.0 / Card Reader+LED CONN
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
PROJECT :
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1
1A
1A
1A
44 25
44 25
44 25
Page 26
5
Codec(ADO)
C329
10U/6.3V_4
near Codec
Low is power down
amplifier output
C328
0.1u/10V_4
+3V
placed close to codec
C316
1u/10V_4
ADOGND
C323 10U/6. 3V_4
+5V_PVDD
L_SPK+
C325
L_SPK-
0.1u/10V_4
R_SPKR_SPK+
PD#
TP32
R299 * 0/short_6
C322
Place next to pin 1
0.1u/10V_4
TP30
TP29
C317 10U/6.3V_4
+AZA_VDD
36
CPVDD
37
CBP
38
AVSS2
39
LDO2-CAP
40
AVDD2
41
PVDD1
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
46
PVDD2
47
PDB
48
SPDIFO/GP IO2
49
DGND
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP
+AZA_VDD
C321
10U/6.3V_4
DMIC_DAT
DMIC_CLK
+1.5V [9,22,23,34]
+5V [20,22,23,37]
+3V [4,5,7,9,11,12,13,17,19,20,22,24,25,27,28,35, 37,39,40]
+3VPCU [6,8,19,21,22,25,30, 31,32,37,39,40]
D D
+1.5VA
C326
10U/6.3V_4
ADOGND
Place next to pin 40
Analog
Digital
C C
+5V
L22 *0/short_6
C327
0.1u/10V_4
near Codec
Tied at one point only under
the codec or near the codec
R311 * 0/short_4
R324 * 0/short_4
R565 * 0/short_4
R562 * 0/short_4
R550 * 0/short_4
R566 * 0/short_4
C505 * 1000p/50V_4
C290 * 1000p/50V_4
B B
ADOGND
Cap need near AVDD1 and
AVDD2
power source input
35
CBN
C312 1u/10V_4
34
33
CPVEE
4
31
32
HP-OUT-L
HP-OUT-R
LINE1-VREFO-L
ALC283
HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF
30
28
29
VREF
MIC2-VREFO
LINE1-VREFO-R
C309
10U/6.3V_4
ACZ_SDIN
C310 *22p/50V_4
INT_AMIC-VREFO
25
27
26
AVSS1
AVDD1
LDO1-CAP
LINE2-L
LINE2-R
LINE1-L
LINE1-R
MIC1-CAP
MIC2-R/SLEEVE
MIC2-L/RING2
MONO-OUT
Sense B
Sense A
12
PCBEEP
PCH_AZ_CODEC_RST#
R286 33_4
C307 2. 2U/6.3V_4
C301 10U/6. 3V_4
R282 100K/ F_4
U19
24
23
22
21
20
NC
19
18
17
16
15
JDREF
14
13
LINE2-L
LINE2-R
LINE1-L
LINE1-R
SLEEVE
RING2
CODEC_JDREF
SENSEA
1.6Vrms
C299 1u/10V_4
3
ADOGND
ADOGND
C300
0.1u/10V_4
for discharge
+5VA
C303
10U/6.3V_4
Place next to pin 26
2 0 1 4 0 4 1 8 : F o l l o w R o x y P r o j e c t
ADOGND
A d d A - M I C I n p u t C h a n n e l .
C295 1u/ 10V_6
C296 1u/ 10V_6
C297 10U/6.3V_4
trace width of SLEEVE & RING2
are required at least 40mil and
its length should be asshort as possible
R278 20K/F_4
R279 39. 2K/F_4
MIC1_INT_R_C
ADOGND
R274 1K/ J_4
R275 1K/ J_4
HP_JD#
Placement near Audio Codec
BEEP_1
R281 47K_4
C291
R276
4.7K_4
100p/50V_4
PCH_AZ_CODEC_RST# [5]
PCH_AZ_CODEC_SYNC [5]
DVDD_IO
PCH_AZ_CODEC_SDIN0 [5]
PCH_AZ_CODEC_BITCLK [5]
PCH_AZ_CODEC_SDOUT [5]
MIC1_INTL1 MIC1_INT_L_C
ADOGND
Analog
Digital
D26 RB500V-40
D25 RB500V-40
R284 *0/J_4
R285 0_4
C305
C304
10U/6.3V_4
0.1u/10V_4
Place next to pin 9
SPKR [7]
PCBEEP_EC [19]
+3V +1.5V
2
Grounding circuit(ADO)
Analog-MIC
8 / 1 C h a n g e C N 1 f o o t p r i n t t o m i c - a - m - q t z e a 0 1 h f - 2 p - t o
DN001542000
mic-a-m-qtzea01hf-2p-top
U22
1
2
INT_AMIC_SMD
PIN1, PIN4, PIN3, PIN6 are ANALOG
MIC1_INTL1 INT_AMIC-VREFO
1
2
ADOGND
C337
*22p/50V_4
Q36
1
4 3
2N7002DW
R318
R323
+1.8V_INT_AMIC-VREFO
*2.2K/J_4
10K_4
6
SLEEVE
2
RING2
5
+3VPCU
R273
100K_4
Power (ADO)
+3V
C332
*0.1u/10V_4
Vset =1.25V
Vset =1.25V
Vout =Vset[1+AR(1,2)/AR(2,GND)]
Vout =Vset[1+AR(1,2)/AR(2,GND)]
HEADPHONE/MIC/LINE combo (AMP)
MIC2-VREFO
SLEEVE
HP-L2
HP-R2 HP-R4
LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
p .
LINE1-R
RING2
R283 2. 2K/J_4
R309 2. 2K/J_4
R303 56/ F_4
R298 56/ F_4
C320 4. 7U/6.3V_6
R300 4. 7K_4
R293 4. 7K_4
C308 4. 7U/6.3V_6
FB1/FB2(SLEEVE/RING2) should choose DC resistance (Rdc) < 30m-ohm
to get the best audio performance for HP crosstalk
L17 BLM15AG121SN1D/120/500MA_4
L21 BLM15AG121SN1D/120/500MA_4
HP-L3
L19 BLM15AG121SN1D/120/500MA_4
HP-R3
L18 BLM15AG121SN1D/120/500MA_4
C294
C324
C330
C306
ADOGND
100p/50V_4
100p/50V_4
*14V/38V/100P_4
100p/50V_4
100p/50V_4
1 2
D24
*14V/38V/100P_4
+1.5V
R268
3
*100K_4
Q35
2
PJA138K
C288
*1u/10V_4
1
Demodulation Filter
U21
IN
GND
SHDN
*G923-330T1UF
HP-L4
HP_JD#
OUT
SET
1 2
*14V/38V/100P_4
ADOGND
4
5
D35
3
2
1
1 2
D28
1
R267 10K_4
ANALOG
R319 *8.2K/F_4
R320
*10K/F_4
ADOGND ADOGND
4
3
1
2
5
6 7
PCH_AZ_CODEC_RST#
+1.8V_INT_AMIC-VREFO
ADOGND
Combo Jack
CN22
SIT_2SJ3052-005111F
26
C334
*0.1u/10V_4
ADOGND
Codec PWR 5V(ADO)
ANALOG DIGITAL
+5V
C287
C286
*10u/6.3V_6
A A
*0.1u/10V_4
close pin3
L16 HCB2012KF220T60/6A/22ohm_8
U18
IN
GND
SHDN
*G923-330T1UF
4
OUT
5
SET
3
2
1
R549 *0/J_4
5
ADOGND
R280 *29.4K/F_4
R277
*10K/F_4
C298
*10u/6.3V_6
+5VA
ADOGND
C292
*0.1u/10V_4
4
Codec PWR 1.5V(ADO)
+1.5V
1u/6.3V_4
C331
L20 *0/short_6
Internal Speaker
R_SPK+
R_SPKL_SPKL_SPK+
35mil for each signal
C341
C339
1000P/50V_4
1000P/50V_4
Place these EMI components next to codec
ANALOG DIGITAL
C340
1000P/50V_4
3
+1.5VA
C338
1000P/50V_4
CN24
1
2
345
6
SPK_CONN_4P
Mute(ADO)
+AZA_VDD
R304
*1K_4
PD#
R308
*10K_4
D27 RB500V-40
D29 RB500V-40
2
AMP_MUTE# [19]
Level shift
+1.5V +3V
R306
10K_4
2
Q38
PJA138K
PCH_AZ_CODEC_RST# PCH_AZ_CODEC_RST_R# PCH_AZ_CODEC_RST_R#
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
44 26
44 26
44 26
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Codec ALC3225
Codec ALC3225
Codec ALC3225
1
1A
1A
1A
Page 27
5
LAN
D D
C C
+3V [4,5,7,9,11,12,13,17,19,20,22,24,25,26,28,35,37,39,40]
+1.8V [4,5,6,7,9,12,19,20,21,28,37]
+3V_S5 [2,9,12,19,21,24,28,34,35,37,39,40]
LANVCC
R378 *0/short_8
LANVCC +3V_S5
40 mils (Iout=1A) 40 mils (Iout=1A)
C408
0.1u/10V_4
C407
10U/6.3V_6
LANVCC
VDD10
VDD10
4
R54 2.49K/F_4
LANVCC
MDI_0+
MDI_0-
MDI_1+
MDI_1MDI_2+
MDI_2-
MDI_3+
MDI_3-
33
1
2
3
4
5
6
7
8
VDD10
U9
GND
MDIP0
MDIN0
AVDD10(NC)
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10
RSET
10 mils
32
RTL8111GS-CG
3
XTAL2
TP38
TP12
TP13
26
27
31
30
28
25
LED0
RSET
AVDD33
AVDD10
CKXTAL229CKXTAL1
LED1/GPO
LED2(LED1)
VDDREG(VDD33)
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
AVDD33(NC)11MDIP3(NC)9MDIN3(NC)
16
12
10
PCIE_REQ_LAN#_R
REGOUT
DVDD10(NC)
LANWAKEB
ISOLATEB
PERSTB
HSON
HSOP
24
23
22
21
20
19
18
17
XTAL1
REGOUT
VDDREG/VDD33
VDD10
ISOLATEB
PCIE_RXN0_LAN_R
PCIE_RXP0_LAN_R
C111 15P/50V_4
1
2
Y9
25MHZ +-30PPM
4
3
C112 12P/50V_4
PCIE_LAN_WAKE#_R
C396 0.1u/10V_4
C399 0.1u/10V_4
CLK_PCIE_LANN [6]
CLK_PCIE_LANP [6]
PCIE_TXN3_LAN [5]
PCIE_TXP3_LAN [5]
PLTRST# [12,13,19,24,25,28]
PCIE_RXN3_LAN [5]
PCIE_RXP3_LAN [5]
Consider VCC33 may be connected to Main
Power or chipset/bios's GPO, the pull-low
resistor R14 can be NC only when Main Power
or chipset/bios's GPO can ensure to drive the
ISOLATEB pin to a voltage level < 0.8V at the
system state S1~S5.
If the ISOLATEB pin can not be well-controlled to
a voltage level < 0.8V at S1~S5, the pull-low
resistor R14 is needed to make sure the LAN
chip is well isolated.
2
1
27
+3V
+1.8V
R72
3
R68 *1K/J_4
Q17
1 3
*DTC144EUA
10K_4
PCIE_REQ_LAN#_R
PCIE_LAN_WAKE#_R
2
PCIE_CLKREQ3_LAN# [5]
+3V
R374
1K/J_4
R373
*15K_4
WAKE_SRC_1 [12,19,28]
1
Q18
PJA138K
R75 0_4
+3V_S5
2
LANVCC
40 mils (Iout=1A)
C135
0.1u/10V_4
For RTL8111GS
* Place 0.1uF/4.7uF CAP close to each
VDD33 pin-- 11, 32
Tramsformer
B B
A A
C110
0.1u/10V_4
5
C134
4.7U/6.3V_6
C106
4.7U/6.3V_6
C22
0.01U/50V_4
R366 *0/short_8
40 mils (Iout=1A)
Remove For Not Using SWR mode
close to Pin23.
MDI_0+
MDI_0-
MDI_1+
MDI_1-
MDI_2+
MDI_2-
MDI_3+
MDI_3-
C387
0.1u/10V_4
VDDREG/VDD33
C388
4.7U/6.3V_6
U24
1
TD1+
2
TD1-
3
TCT1
4
5
6
7
8
9
10
11
12
NS692417
4
TCT2
TD2+
TD2-
TD3+
TD3TCT3
TCT4
TD4+
TD4-
MX1+
MX1MCT1
MCT2
MX2+
MX3+
MCT3
MCT4
MX4+
MX2-
MX3-
MX4-
RTL8111GS
40 mils (Iout=1A) 40 mils (Iout=1A)
LAN_MX0+
24
LAN_MX0-
23
LAN_MCT0
22
LAN_MCT1
21
LAN_MX1+
20
LAN_MX1-
19
LAN_MX2+
18
LAN_MX2-
17
LAN_MCT2
16
LAN_MCT3
15
LAN_MX3+
14
LAN_MX3-
13
Layout:All termination
signal should have 30
mil trace
R24 75/F_12
R28 75/F_12
R40 75/F_12
R43 75/F_12
(SWR mode) support
L13 4.7uH
4.7U/6.3V_6
LANCT3
3
C126
C360
10P/3KV/NPO_1808
LGND
C129
0.1u/10V_4
For RTL8111G(S)
* Place 0.1uF CAP close to each
VDD10 pin-- 3, 8, 22, 30
C391
0.1u/10V_4
C394
0.1u/10V_4
RJ45 Connector
2
C397
C398
0.1u/10V_4
0.1u/10V_4
Need Check P/N and F/P
LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX2+
LAN_MX2LAN_MX1LAN_MX3+
LAN_MX3-
For RTL8111G(S)
* Place 1uF CAP close to each VDD10 pin-- 22 (reserve)
VDD10 REGOUT
C395
C389
1u/6.3V_4
0.1u/10V_4
CN10
1
2
3
4
5
6
7
8
LAN_RJ45
9
10
LGND
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
LAN
LAN
LAN
PROJECT :
1
C19 *0.01U/50V/X7R_4
C78 *0.1U/10V_4
R13 *short_8
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
LGND
1A
1A
1A
44 27
44 27
44 27
Page 28
5
4
3
2
1
WLAN
28
R138
*4.7K/J_4
WLAN_CLK_SDATA
WLAN_CLK_SCLK
+3.3V
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
USB_D+
USB_D-
SMB_DATA
SMB_CLK
+1.5V
+3.3Vaux
PERST#
W_DISABLE#
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
+3.3V
GND54GND
WLAN CONN
GND
GND
GND
GND
GND
GND
+3V_Mini1_VDD
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
Unmount R509, R511 for
broadcom WLAN LED issue
WPAN_LED#
WLAN_LED#
WIMAX_LED#
WLAN_CLK_SDATA
WLAN_CLK_SCLK
R439 *0/J_4
PLTRST#_2
R440 *0/short_4
RF_EN
LFRAME#_C
R441 *0/short_4
LAD3_C
R442 *0/short_4
LAD2_C
R443 *0/short_4
LAD1_C
R444 *0/short_4
LAD0_C
R445 *0/short_4
WAKE_SRC_1 [12,19,27]
+3V_Mini1_VDD
BT_POWERON [19]
CLK_24M_DEBUG [7]
D D
C C
PCIE_CLKREQ2_WLAN# [5]
R451 *0/short_4
PLTRST#
R452 *0/J_4
R453 *0/J_4
PCIE_TXP2_WLAN [5]
PCIE_TXN2_WLAN [5]
PCIE_RXP2_WLAN [5]
PCIE_RXN2_WLAN [5]
CLK_PCIE_WLANP [6]
CLK_PCIE_WLANN [6]
+TPVDD [21,37]
+3V [4,5,7,9,11,12,13,17,19,20,22,24,25,26,27,35,37,39,40]
+1.8V [4,5,6,7,9,12,19,20,21,27,37]
+3V_S5 [2,9,12,19,21,24,27,34,35,37,39,40]
BT_POWERON_C
PLTRST#_C
CLK_24M_DEBUG_C
CLK_PCIE_WLAN_REQ#_R
PCIE_WAKE#_R
+1.8V
2
1
Q25
PJA138K
CN14
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
UIM_C4
17
UIM_C8
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
53
+3V_Mini1_VDD
R163
10K_4
3
CLK_PCIE_WLAN_REQ#_R
R437 *0/J_4
R438 *0/J_4
IOAC_PCIERST#
+3V_Mini1_VDD
R413
*4.7K/J_4
USBP2+ [7]
USBP2- [7]
IOAC_PCIERST# [19]
PLTRST# [12,13,19,24,25,27]
RF_EN [19]
LFRAME# [7,19]
LAD3 [7,19]
LAD2 [7,19]
LAD1 [7,19]
LAD0 [7,19]
TP44
+3V_Mini1_VDD
3
Q26
*PJA138K
R166 *0/J_4
R137 *0/J_8
+3V_S5
R140 *0/short_8
+3V
C157
10U/6.3V_6
R162
2
*4.7K/J_4
1
PCIE_WAKE#_R
+3V_Mini1_VDD
C437
0.1u/10V_4
SMB_RUN_DAT [7,11]
SMB_RUN_CLK [7,11]
C438
*0.1u/10V_4
+3V_Mini1_VDD
C162
*0.1u/10V_4
4 3
1
R135 *0/J_4
*2N7002DW
Q20
R131 *0/J_4
+3V
+3V_Mini1_VDD
R134
5
2
6
*4.7K/J_4
TPM (TPM)
C158
*TPM@0.1U/10V_4
+3V +1.8V
6
4
B
5
2
TPM_VDD
C161
*TPM@0.1U/10V_4
R157
**TPM_I@10K_4
+1.8V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
WiFi & BT & TPM
WiFi & BT & TPM
WiFi & BT & TPM
1
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1A
1A
1A
44 28
44 28
44 28
R159 *TPM@2.2_6
TPM_VDD
B B
17
LAD3
20
LAD2/SPI_IRQ
23
LAD1/MOSI
26
LAD0/MISO
22
LFRAME/SCS
27
SERIRQ
21
LCLK/SCLK
15
CLKRUN/GPIO04
16
LRESET/SPI_RST
28
LPCPD
U11
R146
*TPM_N@10K_4
LAD3
LAD2
LAD1
LAD0
LFRAME#
5
TPM_SERIRQ
PLTRST#
C160 **TPM@10p/50V_4
R145 *TPM_N@0_4
LPCPD#
TP17
CLK_TPM [7]
CLKRUN# [7,19]
A A
R107 *TPM_I@0_4
R106 *TPM_N@0_4
24
10
19
5
VSB
VDD3
VDD1
VDD2
GPIO0/XOR_OUT
GPIO3/BADD
GND2
GND14GND318GND4
*TPM_S@NPCT620/650_TSSOP28
11
25
AL000650K00 : NPCT650AA0WX
AL009655K01 : SNI SLB9655TT1.2
4
GPX/GPIO2
GPIO1
TEST
PP
NC1
NC2
NC3
NC4
7
6
2
1
9
8
3
12
13
14
TPM_VDD
TPM_VSB
R104 *TPM_I@4.7K_4
R103 **TPM_I@4.7K_4
R105 **TPM_I@20K_4
TP14
TP15
R101 *TPM_I@0_4
R102 **TPM_N@10K_4
pin9 : 9655
TPM_VDD
PLTRST#
reset , 9660 and Nuvoton NC pin
+3V
+1.8V
R165
**TPM_I@10K_4
C425
*TPM@0.1U/10V_4
C142
*TPM_N@10u/6.3V_6
GND
C420
*TPM@0.1U/10V_4
TPM_VSB
C140
*TPM_N@0.1U/10V_4
R158 **TPM_I@0_4
U12
VCCA1VCCB
3
A
GND2OE
**TPM_I@G2129TL1U
20140303:NPCT650 TPM doesn't need SERIRQ.
C166
*TPM@10u/6.3V_6
R95 **TPM_N@0_4
+TPVDD
R99 *TPM_N@0_4
+3V_S5
PU at page 14
SOC_SERIRQ [7,12]
3
SOC_SERIRQ TPM_SERIRQ
Page 29
HOLE(OTH)
5
4
3
2
1
29
D D
C C
B B
HOLE20
*H-C315D110P2
1
HOLE23
*HG-C315D110P2
8
9
123
HOLE24
*HG-C315D110P2
8
9
123
6 7
5
4
6 7
5
4
HOLE22
*HG-C315D110P2
8
9
123
HOLE27
*HG-C315D110P2
8
9
123
HOLE28
*H-C315D110P2
1
HOLE29
6 7
5
4
HOLE25
6 7
5
4
*HG-C315D110P2
8
9
123
6 7
5
4
HOLE15
*HG-C315D110P2
8
9
123
6 7
5
4
HOLE14
*H-C110D110N
1
*hg-tc315bc236d110p2
8
9
123
6 7
5
4
GPU nuts Mini card nuts
HOLE16
EV@H-C236D138P2
1
CPU nuts
HOLE9
*H-TC256BC236D161P2
1
HOLE13
*HG-C315D110P2
8
9
HOLE19
EV@H-C236D138P2
HOLE10
*H-TC256BC236D161P2
1
1
123
6 7
5
4
HOLE18
*H-C315D110P2
1
HOLE17
EV@H-TC236I138BC236D138P2
1
HOLE11
*H-TC256BC236D161P2
1
reserve for ESD
C522 0.1U/25V_4
C523 0.1U/25V_4
+1.05V_GFX
+VA_IACM
C258 0.1U/25V_4
C302 0.1U/25V_4
+3V
+5V_S5
HOLE12
*HG-C315D110P2-V5
123
6
5
4
*HG-C315D110P2
8
9
HOLE21
H-C217D61P2
1
HOLE26
123
C212 *0.1U/10V_4
C429 *0.1U/25V_4
C262 *0.1U/25V_4
6 7
5
4
C205 *1000p/50V_4
C428 *1000p/50V_4
C47 *1000p/50V_4
+VCC_GFX +VCC_CORE
+VIN +VA_IACM
+VIN
C524 0.1U/25V_4
A A
5
4
+3V
3
C285 0.1U/25V_4
C143 0.1U/25V_4
+3VPCU
+5V_S5 +3VPCU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
C430 2.2n/50V_6
USB BOARD CONN
USB BOARD CONN
USB BOARD CONN
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+VA_IACM
ZYL/ZYLA
ZYL/ZYLA
ZYL/ZYLA
1
1A
1A
1A
44 29
44 29
44 29
Page 30
5
4
3
2
1
30
DFPJ06MR013-- 95W
DFPJ06MR007--- 45W
D D
ZE7
POWER_JACK
dcjk-2dc2003-000111-3p-v
PJ9
1
2
3
456
7
C C
B B
+VA
PC92
0.1U/25V_4
+VA
+BATCHG
Place this ZVS
close to INPUT
+VAD_LD [37]
2013/07/24
PR109 change from
CS+0108F200 to CS+0208F200
RC1206-R020
PD9
P4SMAJ20A
2 1
PR107
*0/short_4
20140506
Add noise filter cap
PR55
560K/F_4
PR178
84.5K/F_4
PD12
MEW316
2 1
PD11
MEW316
2 1
VAC= AC Adapter detection
ACAV = To indicate the adapter status.
Pin ACAV goes high when Vvac >
8.7V/13.2V & Vvac > Vichm + 0.8V the
Vvac = 8,7 or 13.2V threshold can be
chosen via SMbus commend
PR105
PR174
20/F_6
PR108
*0/short_4
2 1
+VA_IACM
PC161
*0.1u/25V_4
MBDATA
MBCLK
MAINON [19,35]
PC196
0.47U/25V_6
+VA_IACM
QM3016D
4 3
PC194 *1000P/50V_4
PC195 *1000P/50V_4
PR171 *0/short_4
PR170 *0/short_4
PQ37
1
BATDIS_G
PR166 *0_4
ACIN [19]
PC177
*0.01U/50V_4
PR156 *0/short_4
IACM
IACP
CHG_VAC
8690_DATA
8690_CLK
CHG_CEN
PR173
100K/F_4
8690AGND
PR180
100K/F_4
8690AGND
PU19
31
NC
10
PA
2
IACM
3
IACP
37
ADDIV
40
VAC
8
SDA
7
SCL
4
CEN
PC42
1000P/50V_4
14
15
36
8690AGND
8690AGND
+VAD
12
11
VAD
VAD
VAD13VAD
VAD
OZ8691LN-B
IOUT
ACAV
1
9
8690AGND
PC41
47P/50V_4
PR164 *0/short_6
46
6
VSYS
COMP
30
PR172
*0/short_4
PC191
0.047U/25V_4
GNDP28GNDP29GNDP
42
PR53
10/F_4
VSYS49VSYS48VSYS47VSYS
GNDA
25
43
VSYS
GNDA
GNDA
5
35
8690AGND
8690AGND
23
VSYS24VSYS
GNDA55GNDA44GNDA54GNDA
22
21
50
56
VSYS
VSYS
VSYS
VSYS
VSYS51VSYS57VSYS
VBATT
VBATT
VBATT
VBATT
VBATT
LX
LX
LX
LX
LX
LX
BST
VDDP
ICHP38ICHM
39
45
ICMNT [19]
PC40
0.01U/50V_4
Place this cap
close to EC
+VIN
PC212
CBST1
PD13
1N4148WS
TEMP_MBAT [19]
PC219
0.01U/50V_4
PL16
6.8uH_7X7X3
PC210
0.47U/25V_6
PJ10
89
7
6
5
4
3
2
1
10
C114F3-108A1-L_Batt_Conn
PC214
10U/25V_8
PR209
100/J_4
PR202
100K_4
2013/07/24
PR122 change from
CS+0108F200 to CS+0208F200
RC1206-R020
PC223
10U/25V_8
PR59
*0/short_4
BATT_EN#
SMC
SMD
TEMP_MBAT_C
PC227
*47p/50V_4
PR198
PR210
100/J_4
PDZ5.6B
PD15
2 1
2 1
PR60
*0/short_4
2 1
PD14
PDZ5.6B
PR211
100/J_4
PC211
4.7U/25V_8
20
19
CHG_VBATT
18
17
16
PR188
*2.2/J_6
CHG_LX
*0/short_6
2 1
PC206
2.2U/10V_4
ICHP
ICHM
*2200P/50V_4
PR194
53
52
27
33
34
41
CHG_BST
26
CHG_VDDP
32
8690AGND
Follow Command to change same as ZQK pin assignment
PR208 *0/short_4
MBDATA [19]
MBCLK [19]
PC228
*47p/50V_4
PC229
100P/50V_4
+BATCHG
PC231
0.1U/25V_4
+3VPCU
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Charger (OZ8690ALN)
Charger (OZ8690ALN)
Charger (OZ8690ALN)
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 30
44 30
1
44 30
Page 31
5
DC/DC +3VPCU/+5V_S5
LDO(MAX)=100mA
PC179
10U/6.3V_6
*665K/F_4
*330K/F_4
PR149
*0/short_4
PR39 *0_4
unstuff
+3V_LDO
PR47
NB670PG
*0/short_4
PR43
PR148
NB670ENLDO
NB670EN NB670VOUT
PC158
*0.1u/10V_4
PR157
SYS_SHDN#
D D
+3VPCU
S5_ON [19,33,37,38]
C C
10K/F_4
PR49
10K/F_4
SYS_HWPG
+VIN
SYS_SHDN#
4
+3VPCU [6,8,19,21,22,25,26,30,32,37,39,40]
+5V_S5 [24,25,33,34,35,36,37,39]
SYS_SHDN# [32,38]
PC169
4.7U/25V_8
PC164
0.1U/25V_4
Remove JP15
PC168
4.7U/25V_8
PU16
6
LDO
3
NC
5
CLK
4
PGOOD
12
ENLDO
13
EN
NB670
AGND
PGND
BST
VCC
VOUT
1
VIN
14
2
10
NB670BST
8
NB670SW
SW
9
SW
15
SW
16
SW
11
670AGND
7
670AGND
VL
PC160
1u/6.3V_4
PC180
*0.1u/10V_4
PC165
0.1U/25V_4
NB670BST_S
PR151
*0/short_6
PR147 *0/short_4
PC166
PR46
*2.2/J_6
PC34
*2200P/50V_4
3
2200P/50V_4
PL13
3.3uH_7X7X3
+VIN
PC155
0.1U/25V_4
PR158
*0/short_4
2
1
+3.3 Volt +/- 5%
Countinue current:2A
Peak current:2.7A
31
OCP minimum:A
+3VPCU
Remove JP13
+
PC152
PC142
*220uF/6.3V_6X4.2
0.1u/10V_4
PC151
PC149
22U/6.3V_6
22U/6.3V_6
PC159
PC156
22U/6.3V_6
22U/6.3V_6
Remove JP18
PU21
6
NC
3
LP#
5
PC46
*0.1u/10V_4
4
11
13
NC
PGOOD
VCC
EN
NB671GQ-Z
4
PR183
*0/short_4
B B
Exchange AGND and PGND 5/7
A A
5
SYS_HWPG
S5_ON
NB671PG
PR184 *0/short_4
PC224
10U/6.3V_4
PR57 *0/short_4
671AGND
PR61
NB671EN
*0/short_4
AGND
PGND
BST
VOUT
1
VIN
14
671AGND
2
10
NB671BST
PR58 4.7_6
8
NB671SW
SW
9
SW
15
SW
16
SW
7
NB671VOUT
12
NB671FB
FB
PR199
11K/F_4
671AGND
PC217
0.1U/25V_4
NB671BST_S
PR200 82K/F_4
PC216
4.7U/25V_8
0.1U/25V_4
PC44
PC218
PC215
4.7U/25V_8
2200P/50V_4
PR56
*2.2/J_6
PC43
*2200P/50V_4
PC45
PL18
3.3uH_7X7X3
3
0.1U/25V_4
+VIN
1 2
+
33U/25V_6x4.5
PC239
+5 Volt +/- 5%
Countinue current:5.7A
Peak current:7.5A
OCP minimum: A
PR205
*0/short_4
PC238
0.1u/10V_4
Remove JP17
+
PC234
220u/6.3V_6X4.2
2
PC232
PC235
22U/6.3V_6
PC241
22U/6.3V_6
22U/6.3V_6
+5V_S5
PC240
22U/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
3/5VS5 (NB670/NB669)
3/5VS5 (NB670/NB669)
3/5VS5 (NB670/NB669)
ZHJ
ZHJ
ZHJ
44 31
44 31
1
44 31
1A
1A
1A
Page 32
5
4
3
2
1
32
D D
+1.8VPCU [12,19,37]
+3VPCU [6,8,19,21,22,25,26,30,31,37,39,40]
C C
PC185
PR163
NC
LX
LX
NC
FB
EN
*2.2/J_6
1
2
3
7
6
5
554LX_1.8V
554NC_1.8V
554FB_1.8V 554SVIN_1.8V
554EN_1.8V
PL15 1uH_7X7X3
PC199
*22P/50V_4
PC197
*68P/50V_4
PR176
20K/F_4
PC198
0.1u/10V_4
554FB_1.8V_S
R1
R2
PR179
20K/F_4
PR177
10K/F_4
554PG_1.8V
PR167
10_6
PC188
PC193
10U/6.3V_6
1u/6.3V_4
PC187
PR54 *0/short_4
0.01U/50V_4
HWPG_1.8V [19]
+3VPCU
*2200P/50V_4
PU18
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
RT8068AZQW
+1.8V Volt +/- 5%
Countinue current:0.08A
Peak current:0.11A
OCP minimum:A
PR168 *0/short_4
PC186
22U/6.3V_6
PC190
0.1u/10V_4
V0=0.6*(R1+R2)/R2
+1.8VPCU
removed PR161 and PR165
SYS_SHDN# [31,38]
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+1.8VPCU
+1.8VPCU
+1.8VPCU
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 32
44 32
1
44 32
Page 33
5
4
3
2
1
+1.0V Volt +/- 5%
+1.0V_S5 [9,37]
+5V_S5 [24,25,31,34,35,36,37,39]
+3V_S5 [2,9,12,19,21,24,27,28,34,35,37,39,40]
D D
PC202
PR181
HWPG_1.0V [19]
+5V_S5
PR189 *0/short_4
PC203
0.01U/50V_4
554PG_1.0V
PR185
10_6
PC205
PC209
10U/6.3V_6
1u/6.3V_4
*2200P/50V_4
PU20
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
RT8068AZQW
*2.2/J_6
NC
LX
LX
NC
FB
EN
1
2
3
7
6
5
554LX_1.0V
554NC_1.0V
554FB_1.0V 554SVIN_1.0V
554EN_1.0V
1uH_7X7X3
PC213
*68P/50V_4
PR191 *0/short_4
PC220
*0.1u/10V_4
PL17
PC222
*22P/50V_4
554FB_1.0V_S
R1
R2
PR195
6.65K/F_4
PR192
10K/F_4
Countinue current:2.4A
Peak current:3.2A
OCP minimum:A
PR196 *0/short_4
PC207
0.1u/10V_4
V0=0.6*(R1+R2)/R2
33
+1.0V_S5
removed PR169 ,PR175 and PR182
PC208
22U/6.3V_6
C C
20140609:
Change PR192 from 10K to 9.31K Ohm
B B
A A
S5_ON [19,31,37,38]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
+1.0V
+1.0V
+1.0V
PROJECT :
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 33
44 33
1
44 33
Page 34
5
4
3
2
1
34
+3V_S5 [2,9,12,19,21,24,27,28,35,37,39,40]
D D
+1.05V [5,9]
+1.5V [9,22,23,26]
+3V_S5
PC253
0.47uF/6.3V_4
PU22
5
PG
1
EN
APW8824
HWPG_1.05V [19,37]
IMVP_PWRGD [35,37]
C C
PR238
*0/short_4
PR233 10K_4
R2
4
6
VIN
FB
PR237
15K/F_4
GND
4.7U/6.3V_6
LX
PC254
3
2
R1
PR236
11.3K/F_4
8002LX1.05V
+1.05V Volt +/- 5%
Countinue current:0.75A
Peak current:1A
OCP minimum:A
PL21
2.2uH/1.85A_2.5X2X1.2
PR235
*0/short_4
PC251
10U/6.3V_6
PC250
*10U/6.3V_6
+1.05V
removed PR232 and PR234
PC252
0.1u/10V_4
VO=(0.6(R1+R2)/R2)
+3V_S5
+1.5V Volt +/- 5%
Countinue current:0.023A
Peak current:0.03A
PC127
10U/6.3V_6
*10U/6.3V_6
OCP minimum:A
+1.5V
PC135
0.1u/10V_4
7
VOUT
GND1
ADJ
R1
PR134
100K/F_4
NC
5
6
8
9
PR138
91K/F_4
PC129
2013/08/19 Change PR161 from 88.7k to 91k for
HD audio codec issue
PC137
PC128
0.1U/10V_4
10U/6.3V_6
+5V_S5
PR132 *0/short_4
B B
HWPG_1.05V
PR133
20K/F_4
HWPG_1.5V [19,37]
0.1u/10V_4
PC140
1u/6.3V_4
VIN
PU13
G9661
2
EN
VDD4GND
1
PGOOD
R2
3
PC130
VO=(0.8(R1+R2)/R2)
R2<120Kohm
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014
Thursday, July 10, 2014
5
4
3
2
Thursday, July 10, 2014
PROJECT :
+1.05V/1.5V
+1.05V/1.5V
+1.05V/1.5V
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 34
44 34
1
44 34
Page 35
5
4
3
2
1
20130617 Change +1.05V to +1.0V
Close to VR
D D
+1.0V
PR71
PC66
0.1u/10V_4
73.2/F_4
PR75
73.2/F_4
PR73
*73.2/F_4
VR_SVID_ALERT# close to CPU
VR_SVID_ALERT#
VR_SVID_DATA
VR_SVID_CLK
+1.0V [6,9,37]
+VCC_GFX [8,9,29]
+VIN [20,29,30,31,36,37,38,39,40]
+5V_S5 [24,25,31,33,34,36,37,39]
35
VR_SVID_DATA and VR_SVID_CLK close to VR
PC230
PR214
330p/50V_4
2K/F_4
95833_NTCG
PR197
3.83K/F_4
95833_BOOTG
95833_UGATEG
95833_PHASEG
95833_LGATEG
95833_ISUMPG
95833_ISUMNG
PR201
27.4K/F_4
PR64
+VCC_GFX
VCC_AXG_SENSE [8]
VSS_AXG_SENSE [8]
PR187 *0/short_4
PR190 *0/short_4
Parallel
C C
+1.0V
PR220
PR69 *0/short_4
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
Parallel
VCC_SENSE [8]
VSS_SENSE [8]
5
*499/F_4
PR78
1.91K/F_4
PR70 20/F_4
PR72
*0/short_4
PR74 16.9/F_4
PR215
1.91K/F_4
PR89 *0/short_4
PR86 *0/short_4
PR67 *0_4
VRON [19]
MAINON [19,30]
IMVP_PWRGD [34,37]
TP25
H_PROCHOT# [5,19]
PC65
43p/50V_4
B B
VR_SVID_CLK [6]
VR_SVID_ALERT# [6]
VR_SVID_DATA [6]
A A
PR186
*10_4
PR193
*10_4
Close to the
CPU side.
PR218
PR65
*0/short_4
PC49
*330p/50V_4
33
PAD
9
PC79
*330p/50V_4
PC71
*0.01U/50V_4
95833_ISUMNG
PR63
649/F_4
PC53 4700P/25V_4
PR216 787/F_4
95833_NTCG
95833_ISUMPG
1
NTCG
NTC
7
95833_NTC
95833_ISUMN
31
32
ISUMPG
ISUMNG
PU9
ISL95833HRTZ-T
ISUMP10ISUMN11RTN12FB13COMP
95833_ISUMP
PC70
4700P/25V_4
PR82
649/F_4
PR225 787/F_4
4
PC54
*0.01U/50V_4
+3V +3V_S5
*100K/F_4
2
VR_ON
15
PGOOD
27
PGOODG
6
VR_HOT#
3
SCLK
4
ALERT#
5
SDA
ISEN28ISEN1
PR77
*0/short_4
+5V_S5
+VCC_CORE
PR87
*10_4
PR88
*10_4
Close to the
CPU side.
PR207
1.78K/F_4
PC52
PR62
470p/50V_4
499/F_4
95833_COMPG
29
FBG
PR83
499/F_4
PR229 1.78K/F_4
28
VCCP
COMPG
VDD
BOOTG
UGATEG
PHASEG
LGATEG
PWM2
LGATE1
PHASE1
UGATE1
BOOT1
14
470p/50V_4
PR231
470K_4 NTC
PC72
22
21
26
25
24
23
20
19
18
17
16
95833_NTC
PR85
3.83K/F_4
30
RTNG
21K/F_4
PC58
220P/50V_4
95833_BOOTG
95833_UGATEG
95833_PHASEG
95833_LGATEG
95833_LGATE1
95833_PHASE1
95833_UGATE1
95833_BOOT1
95833_COMP
PC68
220P/50V_4
PR80
21K/F_4
PR226
2K/F_4
PR84
27.4K/F_4
1000p/50V_4
PR222
*0/short_6
PC242
1u/10V_4
1000p/50V_4
330p/50V_4
PC50
+5V_S5
PC74
PC246
PR223
1/F_6
PC61
1U/16V_6
470K_4 NTC
3
PR219
21K/F_4
PR221
64.9K/F_4
PR203
95833_BOOT1
95833_UGATE1
95833_PHASE1
95833_LGATE1
95833_ISUMP
95833_ISUMN
PR68
2.2/F_6
PC60
0.22u/25V_6
PR76
2.2/F_6
0.22u/25V_6
*0.1u/25V_4
PC63
*0.1u/25V_4
Close to the
VR side.
G1
1
S1/D2
8
G2
PC48
Close to the
VR side.
G1
1
S1/D2
8
G2
PC77
2
PC236
D1
D1
D1
95833_PHASEG
9
S2
S2
S2
PQ44
567
AON6978(30V,20A,2.3W)
PC57
33n/25V_4
PC47
0.1U/25V_4
Close with
AXG inductor
2
D1
D1
D1
PC243
95833_PHASE1
9
PQ45
S2
S2
S2
567
AON6978(30V,20A,2.3W)
PC69
33n/25V_4
PC78
0.1U/25V_4
0.1U/50V_6
PC51
0.1U/50V_6
PC73
2
1 2
PC56
4.7u/25V_8
2.2/J_6
PR66
PC59
2200p/50V_6
PR206
2.61K/F_4
47n/16V_4
PR204
1 2
PC67
4.7u/25V_8
PR79
2.2/J_6
PC75
2200p/50V_6
PR81
2.61K/F_4
47n/16V_4
PR230
Close with
phase1 inductor
AXG
1 2
PC55
4.7u/25V_8
PL19
0.47uH_7X7x3
1 2
3
4
PR212 3.65K/F_6
11K/F_4
PR217
10K/F_4_4250NTC
Core
1 2
PC76
4.7u/25V_8
PL20
0.47uH_7X7x3
1 2
3
4
PR227 3.65K/F_6
11K/F_4
PR224
10K/F_4_4250NTC
PR213 1/F_4
PR228 1/F_4
Remove JP19
PC237
2200p/50V_4
DCR=4.2mOhm
PC225
PC226
0.1u/10V_4
10U/6.3V_8
Remove JP20
2200p/50V_4
PC244
DCR=4.2mOhm
PC247
PC248
0.1u/10V_4
10U/6.3V_8
+VIN
1 2
+
PC249
33U/25V_6x4.5
+VCC_GFX
+
+VIN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+VCC_GFX
TDC : A
PEAK : 14A
PC233
330u/2V_7343
OCP : A
Width : mil
GFX_CORE Load Line :
-5.9mV/A for 2.xW SDP
+VCC_CORE
+
+VCC_CORE
TDC : A
PEAK : 12A
PC245
330u/2V_7343
OCP : A
Width : mil
VCORE Load Line :
-5.9mV/A for 2.xW SDP
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+VCC_CORE/+VGFX (ISL95833)
+VCC_CORE/+VGFX (ISL95833)
+VCC_CORE/+VGFX (ISL95833)
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
ZHJ
ZHJ
ZHJ
44 35
44 35
1
44 35
1A
1A
1A
Page 36
1
2
3
4
5
36
+1.35VSUS [2,8,11,37]
A A
+VDDQ_VTT [11]
+5V_S5 [24,25,31,33,34,35,37,39]
( VTT / 0.75A )
+VDDQ_VTT
PC175
10U/6.3V_6
B B
SLP_SUS_ON [19]
SUSON [19]
C C
PR42 *0/short_4
PR41 *0/short_4
( VDDQ / 0.375mA )
+VDDQ [11]
PC163
*0.1u/10V_4
PC162
*0.1u/10V_4
PR159
100/J_4
PC181
0.1U/10V_4
HWPG_1.35V [2]
PR150 *0/short_4
47K/F_4
+5V_S5
PR44
120K/F_4
PR45
PC178
0.22u/10V_4
51216S3
51216S5
51216PG
51216TRIP
51216MODE
1
4
7
21
5
17
16
20
18
19
12
PC176
1u/6.3V_4
PU17
VTT3VLDOIN
VTTSNS
VTTGND
GND
GND
VTTREF
S3
S5
PGOOD
TRIP
MODE
V5IN
APW8819QAI
DRVH
VBST
DRVL
PGND
VDDQSNS
VREF
REFIN
SW
+1.35VSUS
2
*10U/6.3V_6
14
51216DRVH
15
51216VBST
13
51216SW
11
51216DRVL
10
9
51216VDDQSNS
+1.8VREF
6
PC184
0.1U/10V_4
8
51216REFIN
PC183
0.01U/25V_4
PC170
PR152
2.2/J_6
51216VBST_S
PR51
10K/F_4
PR52
31.6K/F_4
PC173
0.1U/25V_4
PQ38
AON7410
PQ39
AON7752
5 2
4
3
1
5 2
4
3
1
Rds(on)=13mohm
PC171
0.1U/25V_4
51216SW
PR48
*2.2/J_6
PC39
*2200P/50V_4
PC37
PC172
4.7U/25V_8
4.7U/25V_8
2.2uH_7X7X3
Remove JP14
PC36
PL14
+VIN
PC157
0.1U/25V_4
2200P/50V_4
PR162
*0/short_4
+1.35V +/- 5%
Countinue current:3.7A
Peak current:5A
OCP minimum: A
Remove JP16
+
PC154
330u/2.5V_6X4.2
+1.35VSUS
PC167
0.1U/10V_4
Fsw = 400KHz
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Thursday, July 10, 2014
Thursday, July 10, 2014
Date: Sheet of
Date: Sheet of
1
2
3
4
Date: Sheet of
PROJECT :
DDR3 (APW8819)
DDR3 (APW8819)
DDR3 (APW8819)
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 36
44 36
5
44 36
Page 37
5
PR137
+VIN
*22_6
PR136
+VAD_LD [30]
20130620 Reserved RC delay
D D
C C
S5_ON [19,31,33,38]
2.8A
+3V
PC136
0.1U/10V_4
PR141 20K/F_4
TP_POWER_ON [19]
HWPG_1.5V [19,34]
PC138
*10U/6.3V_6
PC141
0.1U/10V_4
HWPG_1.5V
PR142 *0/short_4
+3V_S5 +TPVDD
4
3
1
PQ34
MDV1528Q
G5934DISC1
5 2
22_6
PC134
0.1U/25V_4
HWPG1.8VD
+3VPCU
PC147
0.1U/10V_4
G5934VIN
1
ON1
2
ON2
3
ON3
4
ON4
5
DISC1
20
VIN
DRIVER4
12
PC143
2200P/50V_4
4
PC133
0.1U/25V_4
1 2
G5934CN
G5934CP
19
18
CP
CN
PU15
G5934RZ1U
DISC4
DRIVER3
8
11
G5934DISC4
PR143
*0/short_4
+3V
3
+3V [4,5,7,9,11,12,13,17,19,20,22,24,25,26,27,28,35,39,40]
+5V [20,22,23,26]
+1.8V_S5 [6,7,9,12,21]
+1.0V_S5 [9,33]
+3V_S5 [2,9,12,19,21,24,27,28,34,35,39,40]
+5V_S5 [24,25,31,33,34,35,36,39]
PC132
1U/35V_6
PC131
G5934VOUT
0.47U/25V_6
DCAP
16
17
VOUT
D_CAP
15
PG
14
VSENSE
+12VALW
13
REG
PC139
1U/16V_4
7
G5934DISC3
DISC3
6
G5934DISC2
DISC2
DRIVER1
DRIVER2
10
EC_GPIO50_SUS
PC146
2200P/50V_4
GND
21
9
AO3404
PC150
2200P/50V_4
PR144
*0/short_4
PR145
*0/short_4
+3VPCU
PQ26
2
+1.35VSUS [2,8,11,36]
+1.8V [4,5,6,7,9,12,19,20,21,27,28]
+1.0V [6,9,35]
+1.35V [9]
+VIN [20,29,30,31,35,36,38,39,40]
+1.8VPCU [12,19,32]
+3VPCU [6,8,19,21,22,25,26,30,31,32,39,40]
+5V
3
PC148
2.2U/6.3V_4
+TPVDD
1
PC62
*10U/6.3V_6
PC64
4.7U/10V_6
HWPG_1.5V
HWPG_1.05V [19,34]
PR38
*0/short_4
2014/04/18 :
Remove PC139/R148/R149 for +1.0VSX
Remove PC157/R340/R341/R346 for +1.35VSX
PR160
*0/short_4
PC30
0.1U/10V_4
2
PQ21
DTC144EUA
2
PC182
1 3
PQ40
DTC144EUA
2
0.1U/10V_4
+VIN
PC31
2200p/50V_4
PR153
1M_6
1
PQ24
AO3404
2
PQ35
AO3404
2
PC174
2200p/50V_4
+1.8VPCU
3
1
+1.35VSUS
3
1
PC35
0.1U/10V_4
PC145
0.1U/10V_4
37
PC33
0.1U/10V_4
0.008A
+1.8V
PC153
0.1U/10V_4
0.034A
+1.35V
PC38
*10U/6.3V_6
PC144
*10U/6.3V_6
3
1
PR35
22_8
PQ22
2N7002K
+1.35V
2
PQ23
2N7002K
3
1
+12VALW
2
PR50
22_8
PQ25
2N7002K
3
1
PQ41
2N7002K
PR40
1M_6
+12VALW
2
+1.0V_S5
3
1
+1.8V
PR37
1M_4
2
PR36
1M_4
+VIN
PR154
1M_4
PR155
1M_4
1 3
+VIN
PR30
1M_4
PR29
1M_4
1.43A
0.281A
2
20130717 no S0ix power plane
+1.0V +12VALW
PR31
1M_6
3
PQ16
2N7002K
2
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thursday, July 10, 2014
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet
3
1
PR27
22_8
PQ14
2N7002K
PC192
0.1U/10V_4
+1.35VSUS
PC32
0.1U/10V_4
20140505
Change PQ14 from SOT23 to QFN3X3
+1.0V_S5
5 2
PQ42
4
PC200
2200p/50V_4
Dis-charge IC (G5934)
Dis-charge IC (G5934)
Dis-charge IC (G5934)
MDV1528Q
2.1A
3
1
PC21
0.1U/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+1.0V
PC20
*10U/6.3V_6
ZHJ
ZHJ
ZHJ
PC189
0.1U/10V_4
of
1A
1A
1A
44 37
44 37
44 37
S5D
+5V
3
1
PQ19
AO3404
2
PR34
*22_8
PQ18
*2N7002K
+3VPCU
3
1
PC27
*10U/6.3V_6
PC25
0.1U/10V_4
0.038A
+3V_S5
PC26
0.1U/10V_4
MAIND
2.5A
B B
A A
+5V
PC201
0.1U/10V_4
PC204
*10U/6.3V_6
5
3
1
PQ43
MDV1528Q
4
5 2
PC221
0.1U/10V_4
+5V_S5
PC22
2200P/50V_4
PC29
2200P/50V_4
+VIN
PR32
*1M_4
PR33
*1M_4
2
3
PQ17
*2N7002K
2
1
4
+1.8VPCU
3
PQ20
AO3404
2
3
PC28
0.1U/10V_4
0.056A
PC24
+1.8V_S5
PC23
0.1U/10V_4
*10U/6.3V_6
PQ15
PC19
0.1U/10V_4
DTC144EUA
2
1 3
2
PR28
*0/short_4
1
IMVP_PWRGD [34,35]
Page 38
5
4
3
2
1
+VIN
D D
S5_ON
S5_ON [19,31,33,37]
C C
Thermal protection
Need fine tune
VL VL
2
PQ32
DTC144EUA
for thermal protect point
Note placement position
PR135
1.91K/F_4
PR146
10K/F_4_4250NTC
3
S5_ON
2
B B
1
PQ36
2N7002K
PR139
200K/F_4
2.469V
PR140
200K/F_4
3
2
1 3
8 4
+
-
PD10
DA2J10100L
PR129
1M_6
2
PC125
0.1U/50V_6
1
PU14A
AS393MTR-E1
1
3
PR130
*0/short_6
PQ33
AO3409
PR131
200K_6
PC126
0.1U/50V_6
SW9
MISAKI_SW_H1.5
1
3
SYS_SHDN# [31,32]
3
2
PQ9
2N7002K
1
2
4
5
6
38
5
+
note: PR173 change to 1.5k/F
CS21502FB14 RES CHIP 1.5K +-1% 1/16W(0402)
20140702 Change PR135 from 1.5K/F_4 to 1.91K/F_4 for
thermal request
6
-
7
PU14B
AS393MTR-E1
For EC control thermal protection (output 3.3V)
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet of
Thursday, July 10, 2014
Date: Sheet of
5
4
3
Thursday, July 10, 2014
2
PROJECT :
Thermal / Hole
Thermal / Hole
Thermal / Hole
ZHJ
ZHJ
ZHJ
1A
1A
1A
44 38
44 38
1
44 38
Page 39
5
4
3
2
1
39
+5V_S5
D D
11/4 Change to 6.81K/F 11/4 Change to 12.4K/F
R1
PR13
EV@27K/F_4
EV@5600P/25V_4
2
1 2
PR12 EV@6.81K/F_4
PC94 *EV@0.01U/25V_4
1 2
PR97 *EV@1/F_4
PR115 *0/short_4
PR113 *0/short_4
PR109 *0/short_4
1 2
PC96 EV@1u/10V_4
EV@7.5K/F_4
1 2
C
PC97
EV@6.2K/F_4
PR106
*EV@5.1K/F_4
3
1
EV@1.74K/F_4
PQ27
*EV@2N7002K
PR121 EV@0_4
PR119 EV@0_4
PR98
PR100
EV@0_4
PR101
PR99
3V_MAIN_PWGD
PR114
EV@100K/F_4
VGPU_EN [5]
3V_MAIN_PWGD [17,40]
DGPU_PSI [16]
PWM-VID [16]
C C
+3V_S5
PR111
DGPU_PSI
EV@10K_4
PR19
*EV@0_4
+3VPCU
PR110
*EV@10K_4
1658R-VREF
+VIN_GPU_CORE
PR20 *EV@0_4
3V_MAIN_PWGD
DGPU_PSI
PWM-VID
Phase Number of Operation
B B
20131018 no need standby function
Standby
Function
PC95
*EV@1u/10V_4
VGA_VCCSENSE [13]
VGA_VSSSENSE [13]
PR103
*EV@499K/F_4
R2
R3
R4
R5
+VGPU_CORE
PR17 EV@12.4K/F_4
PU11
9
1658R-OCS/CB
1658R-EN
1658R-PSI
1658R-VID
1658R-VREF
1658R-REFADJ
1658R-REFIN
PR122
EV@0_4
PR120
EV@0_4
OCS/CB
3
EN
4
PSI
5
VID
8
VREF
6
REFADJ
7
REFIN
PC98
*EV@0.01U/25V_4
1 2
PC99
*EV@22P/50V_4
Parallel
A A
PR23
*0/short_6
1658R-PVCC
18
PVCC
UGATE1
PHASE1
LGATE1
EV@UP1658RQKF
UGATE2
PHASE2
LGATE2
PGOOD
FB
GND
11
21
1658R-FB
EV@0_4
PR104
BOOT1
BOOT2
COMP
FBRTN
1 2
PC11
EV@1u/10V_4
1
1658R-BOOT1
2
1658R-UGATE1
20
1658R-PHASE1
19
1658R-LGATE1
15
1658R-BOOT2
14
1658R-UGATE2
16
1658R-PHASE2
17
1658R-LGATE2
13
1658R-PG
12
1658R-COMP
10
1658R-FBRTN
PR102
+VIN_GPU_CORE
PR118
1658R-BOOT1
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
PR21 EV@10K_4
1 2
PR116 *0/short_4
1 2
PC100
1 2
EV@4700P/25V_4
PC101
PR112
EV@16K/F_6
EV@0_4
EV@22P/50V_4
+3V
GPU_PWR_GD [17]
1658R-BOOT2
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
EV@2.2/F_6
PC102
EV@0.22u/25V_6
PR117
EV@2.2/F_6
PC103
EV@0.22u/25V_6
4
4
PQ31
EV@AON6752
4
4
PQ30
EV@AON6752
5
213
5
213
5
213
PQ28
EV@AON6414AL
5
213
PC105
PQ29
EV@AON6414AL
PR26
EV@2.2/F_6
PC17
EV@1000p/50V_6
+VIN_GPU_CORE
PC108
PR25
EV@2.2/F_6
PC18
EV@1000p/50V_6
EV@2200p/50V_4
EV@0.24uH_7X7X3
EV@2.2n/50V_4
EV@0.24uH_7X7X3
PC107
EV@0.1u/50V_6
PL11
PC106
EV@0.1u/50V_6
PL10
Remove JP11
PC15
EV@4.7u/25V_8
DCR=1.1m ohm
PC113
PC114
EV@0.1u/10V_4
PC14
EV@4.7u/25V_8
DCR=1.1m ohm
PC111
PC112
EV@0.1u/10V_4
+VIN
1 2
PC16
EV@10u/6.3V_8
PC13
EV@10u/6.3V_8
+
EV@4.7u/25V_8
EV@4.7u/25V_8
PC104
EV@33U/25V_6x4.5
+VGPU_CORE
+
PC109
EV@330u/2V_7343
+VGPU_CORE
+
+
PC119
PC110
EV@330u/2V_7343
EV@330u/2.5V_6X4.2
N15V-GM
Component Value
R1
R2
R3
R4
Config D
27K
7.5K
0
6.2K
N15V-GM
+VGPU_CORE
Countinue current:33.5A
Peak current:51.5A
OCP:75A
FSW:300KHz
L/L=0mV/A
R5
C
5
4
3
1.74K
5.6nF
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014 39 44
Thursday, July 10, 2014 39 44
2
Thursday, July 10, 2014 39 44
PROJECT :
+VGPU_CORE (UP1658RQKF)
+VGPU_CORE (UP1658RQKF)
+VGPU_CORE (UP1658RQKF)
ZQ0
ZQ0
ZQ0
1
1A
1A
1A
Page 40
5
+1.05V_GFX [13,14,15]
+1.5V_GFX [13,14,18]
+3V_GFX [13,16,17]
4
3
2
1
40
+1.05V_GFX
PC122
20140421:
Change 554PG_1.05V to Test PAD.
D D
Remove JP12
+3V_S5
PC121
EV@0.01U/50V_4
554PG_1.05V
PR127
EV@10_6
PC120
PC118
EV@10U/6.3V_6
EV@1u/6.3V_4
*EV@2200P/50V_4 TP37
PU12
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
EV@RT8068AZQW
PR128
*EV@2.2_6
NC
LX
LX
NC
FB
EN
1
2
3
7
6
5
554LX_1.05V
554NC_1.05V
554FB_1.05V 554SVIN_1.05V
554EN_1.05V
PL12 EV@1uH_7X7X3
PC116
*EV@22P/50V_4
PC117
*EV@68P/50V_4
PR124
EV@20K/F_4
PC115
EV@0.1u/10V_4
554FB_1.05V_S
R1
R2
PR123
*0/short_4
PR126
EV@20K/F_4
PR125
EV@26.7K/F_4
3V_MAIN_PWGD [17,39]
20140421:
Change Enable from 3V_MAIN_PWRGD
20140529:
Change PR125 from 10K to 26.7K Ohm
V0=0.6*(R1+R2)/R2
PC123
EV@0.1u/10V_4
+1.05V_GFX
Remove JP14
PC124
EV@22U/6.3V_6
TDC : 1.553A
PEAK : 2.29A
Width : 90mil
2
PC12
*EV@2.2n/50V_4
PC90 EV@4.7u/25V_8
PC91 EV@4.7u/25V_8
PC86 EV@0.1u/50V_6
+3VPCU
3
PQ13
EV@AO3404
1
Remove JP9
20140609:
Change PL9 from 3.3uH to 2.2uH
Remove JP10
PC85 EV@22u/6.3V_8
PC84 EV@22u/6.3V_8
+VIN
PC83 EV@22u/6.3V_8
+3V_GFX
2
+3V_GFX
TDC : 0.17A
PEAK : 0.342A
Width : 20mil
+1.5V_GFX
+1.5V_GFX
1.5 Volt +/- 5%
TDC : 3.24A
PEAK : 4.25A
Width : 170mil
Change to 1.35V_GFX
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, July 10, 2014 40 44
Date: Sheet of
Thursday, July 10, 2014 40 44
Date: Sheet of
Thursday, July 10, 2014 40 44
PROJECT :
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
1
ZQ0
ZQ0
ZQ0
1A
1A
1A
+VIN +12VALW
C C
PR18
PR92
*EV@0.1u/10V_4
EV@0_4
PC10
*EV@1u/10V_4
1.5VGFX_EN 1.5VGFX_SW
1.5VGFX_PG
PC82
20140606:
modify +1.5V_GFX PG sequence
DGPU_PWR_EN [12]
1.5VGFX_VCC
PR96
EV@100K/F_4
B B
HWPG_1.5VGFX [17]
PR239
EV@200K/F_4
20140606:
modify +1.5V_GFX PG sequence
FBVDDQ_EN [17]
A A
5
PR94
*0/short_4
*0/short_4
2
1 2
PR14
EV@100K_4
PR91
*EV@499K/F_4
PR95
*0/short_4
1.5VGFX_VCC
EV@1u/6.3V_4
4
PQ10
1 3
EV@PDTC143TT
1
13
EN
4
PG
3
LP#
5
NC1
6
NC2
14
AGND
11
PC81
PR16
EV@1M_4
PR15
EV@1M_4
1.5VGFX_BST 1.5VGFX_BST1
10
VIN
BST
SW1
SW2
SW3
PU10
EV@NB671
SW4
VOUT
PGND
VCC
FB
12
+3V_GFX
3
2
1
1.5VGFX_VIN
PR93
EV@1/F_6
PC80
EV@0.1u/50V_6
8
9
15
16
7
2
PC93
EV@0.1u/16V_4
1.5VGFX_FB
VREF=0.604V
PR10
*0/short_6
PR24
EV@22_8
PQ12
EV@2N7002K
3
3
2
1
PC87 EV@2200p/50V_6
PC88 EV@4.7u/25V_8
PL9
EV@2.2uH_7X7X3
PR11
*EV@4.7_6
PC9
*EV@680p/50V_6
PR9
EV@64.9K/F_4
PR22
EV@1M_4
dGPU_D
PQ11
EV@2N7002K
PC89 EV@4.7u/25V_8
PR90
EV@82K/F_4
20140709 Change PR9 from 54.9K to 66.5K for EMI
request and +1.5V_GFX will Change to 1.35V_GFX
Page 41
5
4
3
2
1
Bay Trail-M Power On Timing without S0ix (G3 to S0)
41
+3V_RTC
SOC_RTEST#
SRT_CRST#
D D
+3VPCU
TP_POWER_ON
+TPVDD
SYS_HWPG
SYS_SHDN#
+1.8VPCU
HWPG_1.8V
S5_ON
+5V_S5
+3V_S5
+1.8V_S5
+1V_S5
HWPG_1.0V
C C
RSMRST#
(SOC_RSMRST#)
SUS_PWRDOWNACK
(SUSWARN#_EC)
NBSWON#
(SOC_PWRBTN#)
SLP_S4# (SUSC#)
SLP_SUS_ON
+1.35VSUS
HWPG_1.35V
SLP_S3# (SUSB#)
SUS_ON
+VDDQ_VTT
+VDDQ
+SMDDR_VREF_DIMM
SOC_DRAM_PWROK
B B
MAINON
+1.05V
IMVP_PWRGD
+1.05VS
HWPG_1.05V
HWPG_EC
+1.8V
+1.35V
SDIO3_PWR_EN#
+VSDIO
EC_PWROK
SOC_VCCA_PWROK
(DRAM_CORE_PWROK)
A A
CORE_PWROK
(PMC_CORE_PWROK)
PCH SPI Interface
PCH_SLP_S0#
(PCH_SLP_S0_N)
SOC_PLTRST#
PLTRST#
>9ms
VIN
>10us
>26us
+5V
+3V
>99ms
Soft Straps Read
>1ms
>60us
Quanta Computer Inc.
Quanta Computer Inc.
G3 -> S5/S4 S5/S4 -> S3 S3 -> S0
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 10, 2014 41 44
Thursday, July 10, 2014 41 44
Thursday, July 10, 2014 41 44
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZYL
ZYL
Bay Trail-M Power Sequence
Bay Trail-M Power Sequence
Bay Trail-M Power Sequence
ZYL
1
1A
1A
1A
of
of
of
Page 42
1
2
3
4
5
6
7
8
VGA power up sequence
42
+3VPCU
GPIO_S0_SC36
A A
DGPU_PWR_EN
MOSFET
+3V_S5
S/W LDO
3V_MAIN_PWGD
APW8804QBI-TRG
+3V_GFXPCH
+1.05V_GFX
PG
HWPG_+1.05V_GFX
0ohm
(0805)
MOSFET
3V_MAIN_PWGD
PG
+3V_MAIN
All 3.3V
NVVDD
PXE_VDD
+1.05V
FBVDDQ
t>0
t>0
N15x Power on sequance
Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
PWM-VID (GPU GPIO11)
B B
3V_MAIN_PWGD
VIN
PWM
VGPU_PWRGD
+VGPU_CORE
VIN
0ohm
(0402)
FBVDDQ_EN
S/W LDO
NB671
+1.5V_GFX
HWPG_1.5VGFX
VGPU_PWRGD
DGPU_PWROK
C C
GPIO_S0_SC37
VGA Reset
PLTRST#
PCH
DGPU_HOLD_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
1
2
PEGX_RST#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GPU PWR CRL
GPU PWR CRL
GPU PWR CRL
Date: Sheet of
Date: Sheet of
3
4
5
6
Date: Sheet of
7
PROJECT :
ZYL
ZYL
ZYL
42 44 Thursday, July 10, 2014
42 44 Thursday, July 10, 2014
42 44 Thursday, July 10, 2014
8
1A
1A
1A
Page 43
5
4
3
2
1
ZYL POWER BLOCK DIAGRAM
ON1
D D
TP_POWER_ON
HWPG_1.5V
ON2
ON3
ON4
PU16
DC/DC
G5934RZ1U
PAGE37
C C
Adapter 60W
19V*3.16A
PU8
DC/DC
NB670LGQ-Z
PAGE31
+VIN
Battery 2S2P
4 cell 48Wh
PU10
B B
DC/DC
NB670LGQ-Z
PAGE31
S5D S5_ON
Driver1
Driver2
MAIND
Driver3
HWPG1.8VD
Driver4
NB670L-LDO5
+3VPCU
SYS_SHDN#
PU7
Switch LDO
APW8804QBI-TRG
+1.8VPCU
TDC=P 0.11A/C 0.08A
S5_ON
+5V_S5
TDC=P 7.5A/C 5.7A
PAGE32
EC_GPIO50_SUS
PQ38
N-MOSFET
AO3404
PAGE37
S5D
PQ17
N-MOSFET
AO3404
PAGE37
S5_ON
PU6
Switch LDO
APW8804QBI-TRG
PAGE33
S5D
PQ13
N-MOSFET
AO3404
PAGE37
PU9
DC/DC
APW8819QAI
PAGE36
IMVP_PWRGD
PU13
Switch LDO
HWPG_1.05V
HWPG1.8VD
IMVP_PWRGD
HWPG_1.5V
PQ11
N-MOSFET
AO3404
MAIND
PQ34
N-MOSFET
MDV1528Q
HWPG_1.05V
PQ28
N-MOSFET
AO3404
+VDDQ_VTT
APW8824
PAGE34
PU14
LDO
G9661
PAGE34
PQ16
N-MOSFET
MDV1528Q
PQ14
N-MOSFET
AO3404
PAGE37
PAGE37
PAGE37
PAGE37
( VTT / 0.525A )
PAGE37
+1.05V
TDC=P 1A/C 0.75A
+1.5V
TDC=P 0.03A/C 0.023A
+3V
TDC=2.8A TDC=P 32.7A/C 2A
+1.0V
TDC=0.64A
+1.8V
TDC=0.008A
+5V
TDC=2.5A
+1.35V
TDC=0.034A
+TPVDD
+3V_S5
TDC=0.038A
+1.0V_S5
TDC=P 3.2A/C 2.4A
+1.8V_S5
TDC=0.056A
SUSON
S5
+1.35VSUS
TDC=P 5A/C 3.7A
S3
SLP_SUS_ON
43
+VDDQ
A A
5
4
3
( VDDQ / 0.375mA )
2
MAINON
PU12
DC/DC
ISL95833HRTZ-T
PAGE35
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 10, 2014 43 44
Thursday, July 10, 2014 43 44
Thursday, July 10, 2014 43 44
+VCC_CORE
+VCC_GFX
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZYL Power Block Diagram
ZYL Power Block Diagram
ZYL Power Block Diagram
1
TDP=12A
TDP=14A
ZYL
ZYL
ZYL
1A
1A
1A
Page 44
5
4
3
2
1
Model
ZYL REV:A
D D
C C
ZYL REV:B
Date
CHANGE LIST
1. FIRST RELEASED
Check CPU of P/N.
Change VRAM of P/N.
Check PJ6 for UMA or Dis- GVA.
VGA Chip (Buy and Sell)
AJ0N15V0T07
VR4GbIII9:
HYNIX Graphic DDRIII 900 4Gb H5TC4G63AFR-11C
AKD5PGWTW13 (B/S)
MICRON Graphic DDRIII 900 4Gb MT41J256M16HA-093G:E
AKD5PZSTL05 (B/S)
SAMSUNG Graphic DDRIII 900 4Gb K4W4G1646D-BC1A
AKD5PGWT504 (B/S)
CPU (Buy and Se ll)
Intel BayTrial M
cpu n3530
VGA Chip (Buy a nd Sell)
AJ0N15V0T07
VRAM (Buy and S ell) VR2Gb III9
HYNIX Graphic D DRIII 900 2Gb H5TC2G63FFR-11 C
AKD5MZDTW04 ; AKD5MZDTW05 (B/S)
MICRON Graphic DDRIII 900 2Gb MT41J128M16JT -093G:K
AKD5MGSTL15 ; A KD5MGSTL25 (B/ S)
SAMSUNG Graphic DDRIII 900 2G b K4W2G1646Q-B C1A
AKD5MGST511 ; A KD5MGST513 (B/ S)
5/27
1.PAGE.22 , modify SW10 pin3 connect to pin1 ,pin2 connect to pin4&pin5&pin6
2.PAGE.24 , modify CN16 & CN18 footprint from "USB-TARA4-9B1323-9P-SMT" to "UB2-UARDM-4K1926-4P-R"
1.PAGE.25 , SWAP CN23 USB_CAR_N & USB_CAR_P 5/28
1.PAGE.40 , Change PR125 from 10K to 26.7K due to 1.05V_GFX output is incorrect 5/29
6/6 1.PAGE.6 , Change C458
2.PAGE.40 , Add PR239 to modify +1.5V_GFX PG sequence
6/9 1.PAGE.29 , change hole 18hole20hole28 footprint from "HG-C315D110P2" to "H-C315D110P2"
2.PAGE.19 , Add D37 D38 C521
3.PAGE.20 , change R66 R67 R69 R70 R71 R73 R74 R76 from 620ohm to 619 ohm
4.PAGE.29 , Change C430 from "CH22206K917" to "CH22206J911"
5.PAGE.22 , Change C464 C466 C468 C469 from "0.01u/16V_4" to "0.01u/25V_4"
6/10 1.PAGE.29 , reserve & mount C522 C523 C524 for ESD
2.PAGE.40 , Change PL9 from 3.3uH to 2.2uH for modified 1.5V_GFX efficiency.
C453 from 10P/50V to 12P/50V
6/11 1.PAGE.24 , delete R465 R468 R522 R530 & mount L28,L31 for EMI
6/13 1.PAGE.7 , PAGE.26,PAGE.28 , unmount R427,C310,R452,R453
2.PAGE.19 , mount D16 and change value form 14V/38V to 5V/30V
3.PAGE.26 , mount C338,C339,C340,C341 for EMI
ZYL REV:C
B B
6/25 1.PAGE.6 , Change G9
2.PAGE.26 , Change R311
6/27 1.PAGE.7 & 28 , Unmount R411 & Delete R147,R148,R149
2.PAGE.9 , Delete R180 for CPU +1.0V voltage
G10 footprint from "SOLDERJUMPER-2" to "RC0603-C"
R324R565R562R550R566 L23R13 from "0ohm" to "shortpad"
7/1 1.PAGE.24 & 25 , Change C279,C224,C414 from 100u/6.3V_3216 to 100U/6.3V_3528
7/2 1.PAGE.38 , Change PR135 from 1.5K/F_4 to 1.91K/F_4 for thermal request
7/9 1.PAGE.40 , Change PR9 from 54.9K to 64.9K for EMI request and +1.5V_GFX will Change to 1.35V_GFX
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZYL/ZYLA
PROJECT :
ZYL/ZYLA
PROJECT :
Size Document Number R ev
Size Document Number R ev
Size Document Number R ev
Date: Sheet
Date: Sheet
Date: Sheet
Change list
Change list
Change list
5
ZYL/ZYLA
of
44 44 Thursday, July 10, 2014
of
44 44 Thursday, July 10, 2014
of
44 44 Thursday, July 10, 2014
DOC NO.
1A
1A
1A
PROJECT MODEL : ZYL/ZYLA APPROVED BY:
PART NUMBER: DRAWING BY: REVISON:
4
3
2
DATE:
1
Page 45