QUANTA ZYF Schematics

5

www.qdzbwx.com

EV@ --- GPU only
MS@ --- iGPU & GPU Muxless
W@ --- Whistler GPU
G@ --- Granville GPU
DO@ --- 4 DIMM
SP@ --- Operation P/N

4

3

ZYF SYSTEM BLOCK DIAGRAM

2

GPU CORE PWR

ISL6264

GPU IO PWR

ISL62827

1

CHARGER

P44

ISL88731

3/5V SYS PWR

P45

RT8206

P37

P38

D D

BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz

intel

<MCH Processor>

DDR SYSTEM MEMORY

FDI

SATA

6.0 GT/s

SATA

3.0 GT/s

USB

HDA

SPI

P8

Sandy Bridge

rPGA 989

(37.5mm X 37.5mm)

P3.4.5.6

DMI

DMIFDI

intel

<PCH>

CougarPoint

mBGA 989

(27mm X 25mm)

P7.8.9.10.11.12

EC (WPC791)

PCI-E
X16

PCIE

2.5GT/s

X4 DMI interface

Graphics Interfaces

PCI-E

RTC
P9

LPC

DDR III

SO-DIMM 0
SO-DIMM 1
SO-DIMM 2

P13,14, 15, 16

C C

Note:
HM65 does not support USB 6 & 7
HM65 does not support SATA 2 & 3

SO-DIMM 3

HDD (SATA) *2

Dual Channel

1066/ 1333 MHz

800 MT/s 1066 MT/s

P28

FDI interface

SATA0
SATA1

eSATA Conn.

USB 9 P33

(Debug)

eSATA Buffer

P33

ODD (SATA)

P28

USB 2.0 Port x 3

USB 1, 3, 11, 12

B B

(Debug)

P33

Bluetooth

USB 4 P34

SATA5

SATA4

USB 2.0

Azalia

CCD

P26USB 8

FingerPrint

Audio CODEC

P34USB 2

ALC669X

P30

SPI ROM

4MB x1 (Basic ME+Braidwood)

Fan Driver

(PWM Type)

CPU
XDP Conn.

AMD GPU

Granville-Pro / Whistle-Pro
2GB/1GB

(128Mb/64Mb x 32 IO x 8 pcs)

P18,19,20,21,22,23,24,25

INT_CRT
INT_LVDS
INT_HDMI

PCI-Express

2.5GT/s

X'TAL

32.768KHz

P36

P35

P17

CRT
LVDS

X'TAL

27.0MHz

HDMI

PCIE-2

CLKOUT_PEG_3

PCIE-5

CLKOUT_PCIE2 CLKOUT_PEG_B

IEEE1394 &
Media Cardreader

JM388A

USB3.0 Chip

UPD720200F1

X'TAL

P32

24.576MHz

DISCHARGER

+3V,+ 5V,+1.5V,+1.05V,+1.1V_VTT

+1.0V/+1.8V

RT9018A + TPS54418

CPU VGFX_AXG

ISL62881

THERMAL
PROTECTION

LVDS_CRT
Switch Grapgics

P26

P34

Realtek

Giga-LAN

RTL8111E

P33 & Daughter Board

PCIE-3 & 6

CLKOUT_PEG_1&2

PCIE-6

CPU CORE PWR

P46

ISL62882

CPU VTT

P47

UP61111AQDD

VTT 1.05V

P40

UP61111AQDD

DDR3 PWR

P47

RT8207A

CRT

LVDS

HDMI

USB 3.0 Conn .

X'TAL
25MHz

ARD: 1.05V
CFD: 1.1V

P26

P26

P27

Mini Card

WLAN

USB 10

P39

P411

P41

P42

P34

P29

Transformer

Daughter Board

RJ45 Connector

Daughter Board

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

ZYF Block Diagram

ZYF Block Diagram

ZYF Block Diagram

ZYF

ZYF

ZYF

1 50Monday, November 08, 2010

1 50Monday, November 08, 2010

1

1 50Monday, November 08, 2010

1A

1A

1A

CIR

IEEE1394a
connector

P36

SPI ROM

A A

Front Stereo Amp
(G1453L/ 2W+2W)

Front Speaker

P31

P31

Center Mono Amp
(G1442/ 2W)

Center Speaker

5

P30

P31

Rear Audio Amp
& Head phone

TPA6047

Speaker

S/PDIF

P31

P31

P31

Sub-Amplifier
(TPA311D1)

SUBWOOFER

4

P31

P31

Line in

P31

MIC Jack

P31

Int. D-MIC

P31

Touch Pad

K/B COON.

P36

P35

P35

3

P32

Card Reader
Connector

2

P32

1

www.qdzbwx.com

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V

2

VIN

VIN

3

+1.5V

4

+1.5V_SUS

5

+1.8V

6

7

8

+5V

dGPU_VRON

A A

VDDR3

MOS (AO3413)

+3_D (0.5A)

+3V_D

P22

VDDC

ISL6264

+VGPU_CORE (20A)

P44

PG_GPUIO_EN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

P47

PG_1.5V_EN

VDDR1

MOS (AO4710)

P43

+1.5V_GPU (10A)

PG_1.5V_EN

VDDR4

MOS (AO6402)

P43

+1.8V_GPU (3A)

PG_1.5V_EN

BJT

P22

dGPU_PWROK

dGPU_PWR_EN#

MOS

AO3413

+5_GPU

P22

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

dGPU_VRON

VIN

VDDC

ISL6264

PG_GPUIO_EN

P44

+VGPU_CORE (20A)

Power States

POWER PLANE

B B

C C

VIN
+VCCRTC
+3VPCU
+5VPCU
+15V
+3V_S5
+5V_S5
+5V

+1.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG S0GFX_ONInternal GPU POWER
+1.8V
+1.5V
+1.1V_VTT S0
+1.05V
+VCC_CORE
LCDVCC
+5V_GPU
+GPU_CORE
+GPU_IO PG_GPUIO_EN+0.9V~+1.1V

VOLTAGE

+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.5V
+0.75V
variation
+1.8V
+1.5V

+1.05V or +1.1V

+1.05V
variation
+3.3V
+5V Discrete enableSWITCHABLE PWM IC POWER

DESCRIPTION

RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
PCH/GPU/Peripheral component POWER+3V
CPU/SODIMM CORE POWER
SODIMM Termination POWER

CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER

PCH CORE POWER MAINON
CPU CORE POWER
LCD POWER

+1.5V

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

CONTROL
SIGNAL

ALWAYSMAIN POWER
ALWAYS
ALWAYS
ALWAYS

S5_ON
S5_ON
MAINON
MAINON
SUSON
MAINON

MAINON
MAINON
MAINONCPU VTT POWER

VRON
LVDS_VDDEN

dGPU_PWR_EN#

PG_1.5V_EN+1.5V+1.5V_GPU

PG_1V_EN+1V+1V Discrete enableDP/PEG POWER

P47

PG_1.5V_EN

+1.5V_SUS

VDDR1

MOS (AO4710)

+1.5V_GPU (10A)

ACTIVE IN

ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0

S0
S0

S0
S0
S0

Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V
Discrete enableGPU I/O POWER
Discrete enableVRAM CORE POWER
Discrete enableGPU_CRE/LVDS/PLL POWER +1.5V_GPU+1.8V+1.8V_GPU

+1.5V_GPU

P43

Thermal Follow Chart

CPU
CORE PWR

+3.3V

VDDR3

MOS (AO3413)

P22

+3_D (0.5A)

+3V_D

H_ORICHOT#

H/W Throttling

+1.8V

VDDR4

MOS (AO6402)

P43

+1.8V_GPU (3A)

NTC
Thermal
Protection

CPU

PCH

SM-Bus

EC

PG_1.5V_EN

BJT

P22

PM_THRMTRIP#

SML1ALERT#

CPUFAN#

dGPU_PWROK

SYS_SHDN#

WIRE-AND

dGPU_PWR_EN#

3V/5 V
SYS PWR

FANFAN Driver

+5V

MOS

AO3413

+5_GPU

P22

D D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

1

2

3

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

Date: Sheet of

Date: Sheet of

4

5

6

Date: Sheet of

7

PROJECT :

ZYF

ZYF

ZYF

1A

1A

2 50Monday, November 08, 2010

2 50Monday, November 08, 2010

2 50Monday, November 08, 2010

8

1A

5

www.qdzbwx.com

4

3

2

1

Sandy Bridge Processor (CLK,MISC,JTAG)

Sandy Bridge Processor (DMI,PEG,FDI)

DMI_TXN0[7]
DMI_TXN1[7]
DMI_TXN2[7]

D D

C C

HPD disable

This signal can be left as no
connect if entire eDP interface
is disabled.

B B

DMI_TXN3[7]
DMI_TXP0[7]

DMI_TXP1[7]
DMI_TXP2[7]
DMI_TXP3[7]

DMI_RXN0[7]
DMI_RXN1[7]
DMI_RXN2[7]
DMI_RXN3[7]

DMI_RXP0[7]
DMI_RXP1[7]
DMI_RXP2[7]
DMI_RXP3[7]

FDI_TXN0[7]
FDI_TXN1[7]
FDI_TXN2[7]
FDI_TXN3[7]
FDI_TXN4[7]
FDI_TXN5[7]
FDI_TXN6[7]
FDI_TXN7[7]

FDI_TXP0[7]
FDI_TXP1[7]
FDI_TXP2[7]
FDI_TXP3[7]
FDI_TXP4[7]
FDI_TXP5[7]
FDI_TXP6[7]
FDI_TXP7[7]

FDI_INT[7]

eDP_COMP
INT_eDP_HPD_Q

FDI_FSYNC0
FDI_FSYNC1

FDI_LSYNC0
FDI_LSYNC1

FDI_FSYNC0[7]
FDI_FSYNC1[7]

FDI_LSYNC0[7]
FDI_LSYNC1[7]

TP41TP41

FDI_INT

U33A

U33A

B27
B25
A25
B24

B28
B26
A24
B23

G21
E22
F21
D21

G22
D22
F20
C21

A21
H19
E19
F18
B21
C20
D18
E17

A22
G19
E20
G18
B20
C19
D19
F17

J18
J17

H20
J19

H17

A18
A17
B16

C15
D15

C17
F16
C16
G15

C18
E16
D16
F15

CPU-989P_CONN

CPU-989P_CONN

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

FDI0_FSYNC
FDI1_FSYNC

FDI_INT
FDI0_LSYNC

FDI1_LSYNC

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

eDP_AUX
eDP_AUX#

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]

DMI

DMI

PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0 ]
PEG_RX[1 ]
PEG_RX[2 ]
PEG_RX[3 ]
PEG_RX[4 ]
PEG_RX[5 ]
PEG_RX[6 ]
PEG_RX[7 ]
PEG_RX[8 ]

PEG_RX[9 ]
PEG_RX[1 0]
PEG_RX[1 1]
PEG_RX[1 2]
PEG_RX[1 3]
PEG_RX[1 4]
PEG_RX[1 5]

PEG_TX#[0 ]
PEG_TX#[1 ]
PEG_TX#[2 ]
PEG_TX#[3 ]
PEG_TX#[4 ]

Intel(R) FDI

Intel(R) FDI

PEG_TX#[5 ]
PEG_TX#[6 ]
PEG_TX#[7 ]
PEG_TX#[8 ]
PEG_TX#[9 ]

PEG_TX#[1 0]
PEG_TX#[1 1]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[1 2]
PEG_TX#[1 3]
PEG_TX#[1 4]
PEG_TX#[1 5]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

eDP

eDP

PEG_TX[9]
PEG_TX[10 ]
PEG_TX[11 ]
PEG_TX[12 ]
PEG_TX[13 ]
PEG_TX[14 ]
PEG_TX[15 ]

PEG_RXN0

K33

PEG_RXN1

M35

PEG_RXN2

L34

PEG_RXN3

J35

PEG_RXN4

J32

PEG_RXN5

H34

PEG_RXN6

H31

PEG_RXN7

G33

PEG_RXN8

G30

PEG_RXN9

F35

PEG_RXN10

E34

PEG_RXN11

E32

PEG_RXN12

D33

PEG_RXN13

D31

PEG_RXN14

B33

PEG_RXN15

C32

PEG_RXP0

J33

PEG_RXP1

L35

PEG_RXP2

K34

PEG_RXP3

H35

PEG_RXP4

H32

PEG_RXP5

G34

PEG_RXP6

G31

PEG_RXP7

F33

PEG_RXP8

F30

PEG_RXP9

E35

PEG_RXP10

E33

PEG_RXP11

F32

PEG_RXP12

D34

PEG_RXP13

E31

PEG_RXP14

C33

PEG_RXP15

B32

PEG_TXN0_C

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

0.22uF AC coupling Caps for PCIE GEN1/2/3

C751 0.22u/6.3V_4C751 0.22u/6.3V_4

PEG_TXN1_C PEG_TXN1

C757 0.22u/6.3V_4C757 0.22u/6.3V_4

PEG_TXN2_C

C744 0.22u/6.3V_4C744 0.22u/6.3V_4

PEG_TXN3_C

C749 0.22u/6.3V_4C749 0.22u/6.3V_4

PEG_TXN4_C

C736 0.22u/6.3V_4C736 0.22u/6.3V_4

PEG_TXN5_C

C743 0.22u/6.3V_4C743 0.22u/6.3V_4

PEG_TXN6_C

C728 0.22u/6.3V_4C728 0.22u/6.3V_4

PEG_TXN7_C

C735 0.22u/6.3V_4C735 0.22u/6.3V_4

PEG_TXN8_C

C713 0.22u/6.3V_4C713 0.22u/6.3V_4

PEG_TXN9_C

C726 0.22u/6.3V_4C726 0.22u/6.3V_4

PEG_TXN10_C

C703 0.22u/6.3V_4C703 0.22u/6.3V_4

PEG_TXN11_C

C710 0.22u/6.3V_4C710 0.22u/6.3V_4

PEG_TXN12_C

C685 0.22u/6.3V_4C685 0.22u/6.3V_4

PEG_TXN13_C

C696 0.22u/6.3V_4C696 0.22u/6.3V_4

PEG_TXN14_C

C678 0.22u/6.3V_4C678 0.22u/6.3V_4

PEG_TXN15_C

C683 0.22u/6.3V_4C683 0.22u/6.3V_4

PEG_TXP0_C

C747 0.22u/6.3V_4C747 0.22u/6.3V_4

PEG_TXP1_C

C753 0.22u/6.3V_4C753 0.22u/6.3V_4

PEG_TXP2_C

C740 0.22u/6.3V_4C740 0.22u/6.3V_4

PEG_TXP3_C

C746 0.22u/6.3V_4C746 0.22u/6.3V_4

PEG_TXP4_C

C733 0.22u/6.3V_4C733 0.22u/6.3V_4

PEG_TXP5_C

C739 0.22u/6.3V_4C739 0.22u/6.3V_4

PEG_TXP6_C

C718 0.22u/6.3V_4C718 0.22u/6.3V_4

PEG_TXP7_C

C731 0.22u/6.3V_4C731 0.22u/6.3V_4

PEG_TXP8_C

C708 0.22u/6.3V_4C708 0.22u/6.3V_4

PEG_TXP9_C

C716 0.22u/6.3V_4C716 0.22u/6.3V_4

PEG_TXP10_C

C695 0.22u/6.3V_4C695 0.22u/6.3V_4

PEG_TXP11_C

C706 0.22u/6.3V_4C706 0.22u/6.3V_4

PEG_TXP12_C

C682 0.22u/6.3V_4C682 0.22u/6.3V_4

PEG_TXP13_C

C693 0.22u/6.3V_4C693 0.22u/6.3V_4

PEG_TXP14_C

C675 0.22u/6.3V_4C675 0.22u/6.3V_4

PEG_TXP15_C

C681 0.22u/6.3V_4C681 0.22u/6.3V_4

PEG_COMP

J22

PEG_ICOMPI

J21

PEG_ICOMPO

H22

PEG_RXN[0..15] [18]

PEG_RXP[0..15] [18]

PEG_TXN0
PEG_TXN2

PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_TXN[0..15] [18]

PEG_TXP[0..15] [18]

H_SNB_IVB#[8]

H_PECI[10]

H_PROCHOT#[36,39]

PM_THRMTRIP#[10]

R569 56_4R569 56_4

TP16TP16

TP13TP13

PM_THRMTRIP#

SKTOCC#

TP_CATERR#

H_PROCHOT#_R

9/14 modify

+3V_S5

U30

U30

2
1

74AHC1G09

74AHC1G09

3 5

R469 *0_4R469 *0_4

PM_SYNC_R

H_PWRGOOD_R

PM_DRAM_PWRGD_R

CPU_PLTRST#_R

C614

C614

0.1U/10V_4

0.1U/10V_4

4

R467 *39_4R467 *39_4

+1.05V_VTT

CPU_PLTRST#

R567 *Short_4R567 *Short_4

R564 *Short_4R564 *Short_4

R561 10K/_4R561 10K/_4

C913 0.1U/10V_4C913 0.1U/10V_4

R558 75_4R558 75_4
R559 43_4R559 43_4

PM_SYNC[7]

H_PWRGOOD[10,17]

SYS_PWROK[7,17,32]

PM_DRAM_PWRGD[7]

U33B

U33B

C26

PROC_SEL ECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPW RGOOD

V8

SM_DRAMPW ROK

AR33

RESET#

CPU-989P_CONN

CPU-989P_CONN

+1.5V_CPU

R465

R465
200/F_4

200/F_4
R466 130/F_4R 466 130/F_4

3

Q30 *2N7002KQ30 *2N7002K

2

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

1

HSIN : WO S3 leakege, used R469

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

MAINON_G [47]

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0 ]
SM_RCOMP[1 ]
SM_RCOMP[2 ]

DDR3

MISC

DDR3

MISC

PRDY#

PREQ#

TCK

TMS

TRST#

TDI

TDO

DBR#

BPM#[0]
BPM#[1]

JTAG & BPM

JTAG & BPM

BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

CLK_CPU_BCLKP_R

A28

CLK_CPU_BCLKN_R

A27

CLK_DPLL_SSCLKP_R

A16

CLK_DPLL_SSCLKN_R

A15

R8

SM_RCOMP_0

AK1

SM_RCOMP_1

A5

SM_RCOMP_2

A4

XDP_PRDY#_R

AP29

XDP_PREQ#_R

AP27

XDP_TCLK_R

AR26

XDP_TMS_R

AR27
AP30

XDP_TRST#_R
XDP_TDI_R

AR28

XDP_TDO_R

AP26

XDP_DBR#_R

AL35

XDP_BPM0_R

AT28

XDP_BPM1_R

AR29

XDP_BPM2_R

AR30

XDP_BPM3_R

AT30

XDP_BPM4_R

AP32

XDP_BPM5_R

AR31

XDP_BPM6_R

AT31

XDP_BPM7_R

AR32

3
1

R509 0_4P2RR509 0_4P2R

3
1

R477 MS@0_2RR477 MS@0_2R
R486 EV@1K/F_4R486 EV@1K/F_4
R481 EV@1K/F_4R481 EV@1K/F_4

R105 140/F_4R 105 140/F_4
R34 25.5/F_4R34 25.5/F_4
R37 200/F_4R37 200/F_4

R600 0_4P2RR600 0_4P2R

1
3

R212 0_4P2RR212 0_4P2R

1
3

R217 0_4P2RR217 0_4P2R

1
3

R224 0_4P2RR224 0_4P2R

1
3

R588 0_4P2RR588 0_4P2R

1
3

R587 0_4P2RR587 0_4P2R

1
3

R584 0_4P2RR584 0_4P2R

1
3

R581 0_4P2RR581 0_4P2R

1
3

PLTRST#[9,17,29,32,33,34,36]

CPU_DRAMRST# [4]

2
4

2
4

2
4

2
4

2
4
2
4
2
4
2
4

4
2

4
2

XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7

+1.05V_VTT

CLK_CPU_BCLKP [9]
CLK_CPU_BCLKN [9]

CLK_DPLL_SSCLKP [9]
CLK_DPLL_SSCLKN [9]

8/11 modify

XDP_PRDY# [17]
XDP_PREQ# [17]

XDP_TCLK [17]
XDP_TMS [17]

XDP_TRST# [17]
XDP_TDI [17]

XDP_TDO [17]
XDP_DBRST# [7,17]

U13

U13

1
2

IN
GND3OUT

74LVC1G07GW

74LVC1G07GW

VCC5NC

XDP_BPM[0:7] [17]

+3V_S5

C353

C353

0.1U/10V_4

0.1U/10V_4

CPU_PLTRST#

4

Q39

Q39
FDV301N

FDV301N

Q38

Q38
MMBT3904

MMBT3904

+1.05V_VTT

SYS_SHDN# [38,48]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

PROJECT :

Sandy Bridge 1/4

Sandy Bridge 1/4

Sandy Bridge 1/4

1

ZYF

ZYF

ZYF

3 50

3 50

3 50

FDI Disabling (Discrete Only) DP & PEG Compensation

FDI_INT

R511 EV@0_4R511 EV@0_4
R510 EV@0_4R510 EV@0_4

R519

R519
EV@1K/F_4

EV@1K/F_4

R513 EV@0_4R513 EV@0_4

R516
EV@1K/F_4

EV@1K/F_4

A A

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

FDI_FSYNC can gang
all these 4
signals together
and tie them with
only one 1K
resistor to GND
(DG V0.5 Ch2.2.9).

5

R491 24.9/F_4R491 24.9/F_4

eDP_COMPIO and ICOMPO signals should
be shorted near balls and routed with
typical impedance <25 mohms

+1.05V_VTT+1.05V_VTT

R106 24.9/F_4R106 24.9/F_4R516

PEG_ICOMPI and RCOMPO signals should
be routed within 500 mils
typical impedance = 43 mohms

PEG_ICOMPO signals should
be routed within 500 mils
typical impedance = 14.5 mohms

4

PEG_COMPeDP_COMP

Processor pull-up(CPU)

+1.05V_VTT

H_PROCHOT#

R572 62_4R572 62_4

XDP_TMS

R204 51_4R204 51_4

XDP_TDI_R

R223 51_4R223 51_4

XDP_PREQ#

R598 *51_4R598 *51_4

XDP_TCLK

R563 51_4R563 51_4

XDP_TRST#

R215 51_4R215 51_4

3

IMVP_PWRGD[7,39]

PM_THRMTRIP#

2

2

1 3

3

1

R576

R576
1K_4

1K_4

2

1A

1A

1A

5

www.qdzbwx.com

4

Sandy Bridge Processor (DDR3)

U33C

U33C

3

U33D

U33D

2

1

AB6

SA_CLK[0]

M_A_DQ[63:0][13,14]

D D

C C

B B

M_A_BS#0[13,14]
M_A_BS#1[13,14]
M_A_BS#2[13,14]

M_A_CAS#[13,14]
M_A_RAS#[13,14]
M_A_WE#[13,14]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AP11
AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8
AK9

AH8
AH9
AL9
AL8

AE8
AD9
AF9

F10

AJ5
AJ6
AJ8

AJ9

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9

F9

F7
G8
G7

K4

K5

K1

K2
M8

N8
N7

M9
N9
M7

V6

J1
J5
J4
J2

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLK0 [14]
M_A_CLK0# [14]
M_A_CKE0 [14]

M_A_CLK1 [14]
M_A_CLK1# [14]
M_A_CKE1 [14]

M_A_CLK2 [13]
M_A_CLK2# [13]
M_A_CKE2 [13]

M_A_CLK3 [13]
M_A_CLK3# [13]
M_A_CKE3 [13]

M_A_CS#0 [14]
M_A_CS#1 [14]
M_A_CS#2 [13]
M_A_CS#3 [13]

M_A_ODT0 [14]
M_A_ODT1 [14]
M_A_ODT2 [13]
M_A_ODT3 [13]

M_A_DQSN[7:0] [13,14]

M_A_DQSP[7:0] [13,14]

M_A_A[15:0] [13,14]

M_B_DQ[63:0][15,16]

M_B_BS#0[15,16]
M_B_BS#1[15,16]
M_B_BS#2[15,16]

M_B_CAS#[15,16]
M_B_RAS#[15,16]
M_B_WE#[15,16]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AM5
AM6
AR3

AN3
AN2
AN1

AN9

AN8
AR6
AR5
AR9

AJ11

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]

AP3

SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]
SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLK0 [16]
M_B_CLK0# [16]
M_B_CKE0 [16]

M_B_CLK1 [16]
M_B_CLK1# [16]
M_B_CKE1 [16]

M_B_CLK2 [15]
M_B_CLK2# [15]
M_B_CKE2 [15]

M_B_CLK3 [15]
M_B_CLK3# [15]
M_B_CKE3 [15]

M_B_CS#0 [16]
M_B_CS#1 [16]
M_B_CS#2 [15]
M_B_CS#3 [15]

M_B_ODT0 [16]
M_B_ODT1 [16]
M_B_ODT2 [15]
M_B_ODT3 [15]

M_B_DQSN[7:0] [15,16]

M_B_DQSP[7:0] [15,16]

M_B_A[15:0] [15,16]

CPU-989P_CONN

CPU-989P_CONN

CPU-989P_CONN

HSIN : WO S3 leakage used R36

A A

5

R31 1K/F_4R31 1K/F_4

DRAMRST_CNTRL_PCH[9]

4

+1.5V_SUS

R32

R32
1K/F_4

1K/F_4

R33 0_4R33 0_4

R36 *0_4R36 *0_4

3

2

C72

C72

0.047U/10V_4

0.047U/10V_4

1

Q9
2N7002KQ92N7002K

R38

R38

4.99K/F_4

4.99K/F_4

CPU_DRAMRST# [3]DDR3_DRAMRST#[13,14,15,16]

3

CPU-989P_CONN

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

2

Monday, November 08, 2010

PROJECT :

Sandy Bridge 2/4

Sandy Bridge 2/4

Sandy Bridge 2/4

1

ZYF

ZYF

ZYF

4 50

4 50

4 50

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

CPU VTT

Sandy Bridge Processor (POWER)

POWER

POWER

U33F

U33F

D D

CPU Core Power

SNB 45W:52A

Spec

470uF/4mohm x 4
22uF x 16
10uF x 10

C704

C704

C801

C801

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C C

C715

C715

C732

C732

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C325

C325
22U/6.3V_8

22U/6.3V_8

C737

C737
22U/6.3V_8

22U/6.3V_8

C337

C337

10U/6.3V_8

10U/6.3V_8

Real

470uF/4mohm x 4
22uF x 14
10uF x 10

C371

C371

C326

C326

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C293

C293

C707

C707

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C684

C684

C766

C766

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C717

C717

C777

C777

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

8/3 del

0uF (Reserved)

1

C346

C346

C762

*10U/6.3V_8

*10U/6.3V_8

C180

C180
470u/2V_7343

470u/2V_7343

C762

*10U/6.3V_8

*10U/6.3V_8

+

+

C220

C220
470u/2V_7343

470u/2V_7343

C694

C694

*10U/6.3V_8

+

+

C196

C196

470u/2V_7343

470u/2V_7343

*10U/6.3V_8

+

+

B B

A A

C313

C313
22U/6.3V_8

22U/6.3V_8

C741

C741
22U/6.3V_8

22U/6.3V_8

C335

C335

10U/6.3V_8

10U/6.3V_8

C355

C355

10U/6.3V_8

10U/6.3V_8

C730

C730

*10U/6.3V_8

*10U/6.3V_8

8/5 del

+VCC_CORE

C302

C302
22U/6.3V_8

22U/6.3V_8

C720

C720
22U/6.3V_8

22U/6.3V_8

C765

C765

10U/6.3V_8

10U/6.3V_8

C714

C714

10U/6.3V_8

10U/6.3V_8

C358

C358

*10U/6.3V_8

*10U/6.3V_8

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU-989P_CONN

CPU-989P_CONN

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30

PEG AND DDR

PEG AND DDR

VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

SENSE LINES SVID

SENSE LINES SVID

VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSSIO_SENSE

CORE SUPPLY

CORE SUPPLY

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

SNB 45W:8.5A

Spec

330uF/6mohm x 2
22uF x 12

+1.05V_VTT

22uF x 7 (Non-stuff)

10U/6.3V_8

10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

R504 *0/short_4R504 *0/short_4

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

R198 0_4R198 0_4
R201 0_4R201 0_4

C668

C668
22U/6.3V_8

22U/6.3V_8

C673

C673
22U/6.3V_8

22U/6.3V_8

C621

C621

C629

C629

+

+

C620

C620
*330u/2V_7343

*330u/2V_7343

C680

C680
22U/6.3V_8

22U/6.3V_8

C664

C664
22U/6.3V_8

22U/6.3V_8

10uF (Reserved)

8/5 del

+1.05V_VTT

R203 100_4R203 100_4

R205 100_4R205 100_4

VCCP_SENSE [41]
VSSP_SENSE [41]

Real

330uF/10mohm x 1
22uF x 10
10uF x 2

+

+

C78

C78
330u/2V_7343

330u/2V_7343

C93

C93
22U/6.3V_8

22U/6.3V_8

C622

C622

*22U/6.3V_8

*22U/6.3V_8

C79

C79

*10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

CPU VCCPL

SNB 45W:1.5A

Spec

330uF/7mohm x 1
10uF x 1
1uF x 2

C697

C697
22U/6.3V_8

22U/6.3V_8

C92

C92
22U/6.3V_8

22U/6.3V_8

C89

C89

+VCC_CORE

C623

C623
22U/6.3V_8

22U/6.3V_8

C687

C687
10U/6.3V_8

10U/6.3V_8

C81

C81

*10U/6.3V_8

*10U/6.3V_8

VCC_SENSE [39]
VSS_SENSE [39]

C709

C709
22U/6.3V_8

22U/6.3V_8

C82

C82

10U/6.3V_8

10U/6.3V_8

Real

10uF x 1
1uF x 2

R107 *short_8R107 *short_8

CPU VGT

SNB 45W:21.5A

Spec

470uF/4mohm x 2
22uF x 12

+VCC_GFX

8/5 del

C374

C374

*MS@10U/6.3V_8

*MS@10U/6.3V_8

*MS@10U/6.3V_8

*MS@10U/6.3V_8

MS@22U/6.3V_8

MS@22U/6.3V_8

MS@22U/6.3V_8

MS@22U/6.3V_8

MS@10U/6.3V_8

MS@10U/6.3V_8

10uF (Reserved)

+1.8V

10U/6.3V_8

10U/6.3V_8

+VDDR_REF_CPU+SMDDR_VREF

C912

C912

0.1u/50V_6

0.1u/50V_6

C360

C360

C774

C774

C347

C347

C767

C767

R196 EV@0_4R196 EV@0_4

Ra 0 ohmENA

C70

C70

9/13 add

5

4

3

Sandy Bridge Processor (GRAPHIC POWER)

Real

330uF/10mohm x 2
22uF x 8
10uF x 6

+

+

+

+

C790

C790

C768

C768
*MS@330u/2V_7343

*MS@330u/2V_7343

MS@330u/2V_7343

MS@330u/2V_7343

C785

C785

C350

C350

*MS@10U/6.3V_8

*MS@10U/6.3V_8

C311

C311

MS@22U/6.3V_8

MS@22U/6.3V_8

C772

C772

MS@22U/6.3V_8

MS@22U/6.3V_8

C786

C786

MS@10U/6.3V_8

MS@10U/6.3V_8

C778

C778

*MS@10U/6.3V_8

*MS@10U/6.3V_8

MS@10U/6.3V_8

MS@10U/6.3V_8

C367

C367
MS@22U/6.3V_8

MS@22U/6.3V_8

C333

C333

MS@22U/6.3V_8

MS@22U/6.3V_8

C781

C781

MS@10U/6.3V_8

MS@10U/6.3V_8

C788

C788

*MS@10U/6.3V_8

*MS@10U/6.3V_8

*MS@10U/6.3V_8

*MS@10U/6.3V_8

C780

C780

MS@10U/6.3V_8

MS@10U/6.3V_8

C323

C323

MS@22U/6.3V_8

MS@22U/6.3V_8

C356

C356

MS@22U/6.3V_8

MS@22U/6.3V_8

C792

C792

MS@10U/6.3V_8

MS@10U/6.3V_8

C336

C336

Ra

MS

8/17 change 3528 type

+

+

C73

C73

C71

C71
1u/6.3V_4

1u/6.3V_4

Layout note: need routing
together and ALERT need
between CLK and DATA

H_CPU_SVIDCLK

Place PU resistor close to CPU

H_CPU_SVIDDAT

C613

C613

1u/6.3V_4

1u/6.3V_4

*150u/6.3V_3528

*150u/6.3V_3528

+1.05V_VTT +1.05V_VTT

Place PU resistor close to CPU

H_CPU_SVIDALRT#

R214 43_4R214 43_4 R221 *Short_4R221 *Short_4

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18

AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24

AL23

AL21

AL20

AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23
AH21
AH20
AH18
AH17

B6
A6
A2

R213 *Short_4R213 *Short_4

R216

R216
130/F_4

130/F_4

U33G

U33G

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

CPU-989P_CONN

CPU-989P_CONN

R219 *Short_4R219 *Short_4

+1.05V_VTT

R218

R218
75_4

75_4

2

POWER

POWER

VAXG_SE NSE

VSSAXG_ SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

GRAPHICS

GRAPHICS

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SE NSE

1.8V RAIL

1.8V RAIL

VCCSA_VID1

SVID CLK

+1.05V_VTT

Close to VR

R206

R206

54.9/F_4

54.9/F_4

VR_SVID_CLK [39]

SVID DATA

Close to VR

R222

R222
130/F_4

130/F_4

VR_SVID_DATA [39]

SVID ALERT

VR_SVID_ALERT# [39]

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

TP15TP15

R194

R194

R195 MS@100_4R195 MS@100_4

*0/short_4

AK35
AK34

AL1

*0/short_4
*0/short_4

*0/short_4

R188 MS@100_4R188 MS@100_4

R183

R183

TP12TP12

+VDDR_REF_CPU

CAD Note: +VDDR_REF_CPU should
have 10 mil trace width

+VCC_GFX

+VDDR_REF_CPU

8/17 modify

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

C127

C127

C121

C121

C90

10U/6.3V_8

10U/6.3V_8

C105

C105

10U/6.3V_8

10U/6.3V_8

C90

10U/6.3V_8

10U/6.3V_8

C87

C87

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C137

C137

10U/6.3V_8

10U/6.3V_8

8/11 change 3528 type

C165

C165

C698

C698

10U/6.3V_8

10U/6.3V_8

R498 0_4R498 0_4

1 2

H_FC_C22

R483 10K_4R483 10K_4

VCCSA_SEL [43]

MAIND[38,41,42,47]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

C691

C691

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

VCCSA_SENSE [43]

+1.5V_SUS

PQ21

PQ21

*AO6402A

*AO6402A

3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Sandy Bridge 3/4

Sandy Bridge 3/4

Sandy Bridge 3/4

1

VCC_AXG_SENSE [40]
VSS_AXG_SENSE [40]

CPU MCH

SNB 45W: 5A

Spec

330uF/6mohm x 1
10uF x 6

10uF x 8

Real

+1.5V_CPU

C99

C99

C98

C98

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C114

C114

C94

C94

*10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

10uF (Reserved)

+VCCSA

+

+

C177

C177
*150u/6.3V_3528

*150u/6.3V_3528

CPU SA

SNB 45W: 6A

Spec

330uF/7mohm x 1
10uF x 3

Real

10uF x 3

65241

R75

R75

R63

R63

0_1206

0_1206

0_1206

0_1206

6A/maximum

ZFY

ZFY

ZFY

5 50

5 50

5 50

+1.5V_CPU

8/17add

+

+

C80

C80
*330u/2V_7343

*330u/2V_7343

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

Sandy Bridge Processor (GND)

U33I

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26

N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34

K35
K32
K29
K26

H33
H30
H27
H24
H21
H18
H15
H13
H10

G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

U33I

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198
VSS199
VSS200
VSS201
VSS202

J34

VSS203

J31

VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

Sandy Bridge Processor (RESERVED, CFG)

U33E

U33E

RSVD28

CFG0[17]

TP11TP11
TP9TP9

SMDDR_VREF_DQ0_M3

T1T1

SMDDR_VREF_DQ1_M3

T2T2

R39

R39
*1K_4

*1K_4

02/20 Add for Pre-ES1

T40T40

H_SNB_IVB#_PWRCTRL

CFG0CFG0
CFG2
CFG4CFG4

CFG5
CFG6
CFG7CFG7

R47

R47
*1K_4

*1K_4

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

CPU-989P_CONN

CPU-989P_CONN

RESERVED

RESERVED

RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

VCC_DIE_SENSE

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

KEY

L7
AG7
AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

CLK_XDP_ITPP [17]
CLK_XDP_ITPN [17]

#27636 SNB EDS0.7v1 no function.

AT2
AT1
AR1

B1

For rPGA socket, RSVD59 pin should be left NC

U33H

U33H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

D D

C C

B B

AT10

AR25
AR22
AR19
AR16
AR13
AR10

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

AT7
AT4
AT3

AR7
AR4
AR2

AP7
AP4
AP1

AN7
AN4

AL7
AL4
AL2

AK7
AK4

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

CPU-989P_CONN

CPU-989P_CONN

CPU-989P_CONN

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1 0

CFG2

A A

(PEG Static Lane Reversal)

CFG4
(DP Presence Strap)

CFG7
(PEG Defer Training)

Normal Operation

Disable; No physical DP attached to eDP

PEG train immediately following
xxRESETB de assertion

5

CPU-989P_CONN

Lane Reversed

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

CFG2
CFG4
CFG7

R555 1K/F_4R555 1K/F_4
R554 *1K/F_4R554 *1K/F_4
R560 *1K/F_4R560 *1K/F_4

3

CFG5
CFG6

R556 *1K/F_4R556 *1K/F_4
R557 *1K/F_4R557 *1K/F_4

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

2

Monday, November 08, 2010

PROJECT :

Sandy Bridge 4/4

Sandy Bridge 4/4

Sandy Bridge 4/4

ZYF

ZYF

ZYF

6 50

6 50

1

6 50

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

Cougar Point (LVDS,DDI)

U42D

AF37
AF36

AE48
AE47

AK39
AK40

AN48
AM47
AK47

AJ48

AN47
AM49
AK49

AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

J47
M45

P45
T40

K47
T45

P39

N48
P49
T49

T39
M40

M47
M49

T43
T42

U42D

L_BKLTEN
L_VDD_EN

L_BKLTCTL
L_DDC_CLK

L_DDC_DATA
L_CTRL_CLK

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

CougarPoint_R1P0

CougarPoint_R1P0

SDVO_INTN
SDVO_INTP

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

INT_HDMI_HPD_R
INT_HDMITX2N_R

INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R

8/5 modify

R380 MS@0_4R380 MS@0_4
C312 MS@0.1U/10V_4C312 MS@0.1U/10V_4

C304 MS@0.1U/10V_4C304 MS@0.1U/10V_4
C297 MS@0.1U/10V_4C297 MS@0.1U/10V_4
C283 MS@0.1U/10V_4C283 MS@0.1U/10V_4
C332 MS@0.1U/10V_4C332 MS@0.1U/10V_4
C322 MS@0.1U/10V_4C322 MS@0.1U/10V_4
C274 MS@0.1U/10V_4C274 MS@0.1U/10V_4
C266 MS@0.1U/10V_4C266 MS@0.1U/10V_4

INT_HDMI_DDCCLK [27]
INT_HDMI_DDCDATA [27]

INT_HDMI_HPD [27]
INT_HDMI_TXN2 [27]

INT_HDMI_TXP2 [27]
INT_HDMI_TXN1 [27]
INT_HDMI_TXP1 [27]
INT_HDMI_TXN0 [27]
INT_HDMI_TXP0 [27]
INT_HDMI_TXCN [27]
INT_HDMI_TXCP [27]

INT. HDMI

Cougar Point (DMI,FDI,PM)

U42C

U42C

D D

C C

SUS_PWR_ACK

PM_DRAM_PWRGD[3]

ICH_RSMRST#[32,36]

DNBSWON#[32,36]

B B

PM_PWRBTN#

XDP_DBRST#[3,17]

SYS_PWROK

PWROK_EC

+1.05V_PCH

DMI_RXN0[3]
DMI_RXN1[3]
DMI_RXN2[3]
DMI_RXN3[3]

DMI_RXP0[3]
DMI_RXP1[3]
DMI_RXP2[3]
DMI_RXP3[3]

DMI_TXN0[3]
DMI_TXN1[3]
DMI_TXN2[3]
DMI_TXN3[3]

DMI_TXP0[3]
DMI_TXP1[3]
DMI_TXP2[3]
DMI_TXP3[3]

R665 49.9/F_4R665 49.9/F_4
R662 750/F_4R662 750/F_4

R643 *0_4R643 *0_4

R308 *Short_4R308 *Short_4
R286 *0_4R286 *0_4

R288 0_4R288 0_4

R306 *Short_4R306 *Short_4

R654 *Short_4R654 *Short_4

SYS_PWROK_R

APWROK_R

PM_DRAM_PWRGD

ICH_RSMRST#

SUS_PWR_ACK

DMI_COMP

SUSACK#_R

XDP_DBRST#

EC_PWROK_R

EC_PWROK_R

AC_PRESENT

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

CougarPoint_R1P0

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

+3V

CLKRUN# / GPIO32

+3V_S5

SUS_STAT# / GPIO61

+3V_S5

SUSCLK / GPIO62

+3V_S5

SLP_S5# / GPIO63

System Power Management

System Power Management

DSW

+3V_S5

+3V_S5

SLP_LAN# / GPIO29

FDI_RXP7

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

SLP_S4#

+3V_S5

SLP_S3#

SLP_SUS#

PMSYNCH

FDI_INT

WAKE#

SLP_A#

BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

PCIE_WAKE#

CLKRUN#

SLP_A#

SLP_SUS#

SLP_LAN#

R344 *Short_4R344 *Short_4

T34T34
T31T31

T32T32

FDI_TXN0 [3]
FDI_TXN1 [3]
FDI_TXN2 [3]
FDI_TXN3 [3]
FDI_TXN4 [3]
FDI_TXN5 [3]
FDI_TXN6 [3]
FDI_TXN7 [3]

FDI_TXP0 [3]
FDI_TXP1 [3]
FDI_TXP2 [3]
FDI_TXP3 [3]
FDI_TXP4 [3]
FDI_TXP5 [3]
FDI_TXP6 [3]
FDI_TXP7 [3]

FDI_INT [3]
FDI_FSYNC0 [3]
FDI_FSYNC1 [3]
FDI_LSYNC0 [3]
FDI_LSYNC1 [3]

ICH_RSMRST#

PCIE_WAKE# [33,34]

CLKRUN# [36]

SUS_STAT# [32]

PCH_SUSCLK [36]

SUSC# [32,36]

SUSB# [32,36]

T33T33

T35T35

PM_SYNC [3]

8/10 modify

INT_HSYNC[26]
INT_VSYNC[26]

R place close to PCH

R688 MS@150/F_4R688 MS@150/F_4
R689 MS@150/F_4R689 MS@150/F_4
R690 MS@150/F_4R690 MS@150/F_4

INT_LVDS_BLON[26]

INT_LVDS_DIGON[26]

INT_LVDS_BRIGHT[26]

INT_LVDS_EDIDCLK[26]
INT_LVDS_EDIDDATA[26]

+3V

INT_TXLCLKOUT-[26]

INT_TXLCLKOUT+[26]

INT_TXLOUT0-[26]
INT_TXLOUT1-[26]
INT_TXLOUT2-[26]

INT_TXLOUT0+[26]
INT_TXLOUT1+[26]
INT_TXLOUT2+[26]

INT_TXUCLKOUT-[26]

INT_TXUCLKOUT+[26]

INT_TXUOUT0-[26]
INT_TXUOUT1-[26]
INT_TXUOUT2-[26]

INT_TXUOUT0+[26]
INT_TXUOUT1+[26]
INT_TXUOUT2+[26]

INT_CRT_BLU[26]
INT_CRT_GRE[26]
INT_CRT_RED[26]

INT_CRT_DDCCLK[26]
INT_CRT_DDCDAT[26]

R686 MS@20/F_4R686 MS@20/F_4
R687 MS@20/F_4R687 MS@20/F_4

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

R389 MS@2.2K_4R389 MS@2.2K_4
R387 MS@2.2K_4R387 MS@2.2K_4

R363 MS@2.37K/F_4R363 MS@2.37K/F_4

T36T36

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

INT_CRT_HSYNC_R
INT_CRT_VSYNC_R

DAC_IREF

R358

R358
1K/F_4

1K/F_4

PCH Pull-high/low(CLG) System PWR_OK(CLG)

CLKRUN#

R614 8.2K_4R614 8.2K_4

XDP_DBRST#

R610 10K_4R610 10K_4

R623 *1K_4R623 *1K_4

ICH_RSMRST#
SYS_PWROK

R347 10K_4R347 10K_4

R287 *10K_4R287 *10K_4

8/3 modify

A A

CRB 1.0 change R8315 to 1K

+3V

PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT

PM_DRAM_PWRGD

wo S3 leakage

5

R639 10K_4R639 10K_4
R318 8.2K_4R318 8.2K_4
R640 10K_4R640 10K_4
R636 *10K_4R636 *10K_4
R642 10K_4R642 10K_4
R655 10K_4R655 10K_4

R647 200/F_4R647 200/F_4

+3V_S5

+3V_RTC+3V_S5

R650

R650
330K_4

3

330K_4

R651

R651
*330K_4

*330K_4

C511

C511
*0.1U/10V_4

*0.1U/10V_4

U20

U20

SYS_PWROK

4

4

TC7SH08FU

TC7SH08FU

SYS_PWROK[3,17,32]

2

PWROK_EC

1

3 5

R289

R289
100K/J_4

100K/J_4

IMVP_PWRGD [3,39]
PWROK_EC [32,36]

DSWVREN

On Die DSW VR Enable
High = Enable (Default)
Low = Disable

SMBus(CLK)

SMB_PCH_DAT[9,17]

SMB_PCH_CLK[9,17]

+3V

R220

R220

4.7K/J_4

Q23

Q23
2N7002K

2N7002K

Q22

Q22
2N7002K

2N7002K

4.7K/J_4

1

R211

R211

4.7K/J_4

4.7K/J_4

1

2

CLK_SDATA [13,14,15,16,29]

CLK_SCLK [13,14,15,16,29]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet

PROJECT :

Cougar Point 1/6

Cougar Point 1/6

Cougar Point 1/6

ZYF

ZYF

ZYF

of

7 50

7 50

1

7 50

1A

1A

1A

2

3

+3V

2

3

5

www.qdzbwx.com

RTC Circuitry(RTC)

20mils

+3V_RTC

D35

+3V_RTC_1

20MIL

D35

BAT54C

BAT54C

R717 20K_4R717 20K_4

30mils

R718 20K_4R718 20K_4

8/3 del

C909

C909
1u/6.3V_4

1u/6.3V_4

C911

C911
1u/6.3V_4

1u/6.3V_4

RTC_RST#

12

J1

J1

*SHORT_ PAD1

*SHORT_ PAD1

SRTC_RST#

12

J2

J2

*SHORT_ PAD1

*SHORT_ PAD1

R719 *Short_6R719 *Short_6

+3VPCU

D D

R715

R715
1K_4

1K_4

20MIL

CN29

CN29

1

1

2

2

RTC_CONN

RTC_CONN

7/29 change parts

HDA Bus(CLG)

8

R327 3.3K_4R327 3.3K_4

7
4

ACZ_BITCLK_R
ACZ_SYNC_CODEC
ACZ_RST#_R
ACZ_SDOUT_R

+3V

C478

C478

0.1U/10V_4

0.1U/10V_4

PCH_AZ_CODEC_BITCLK[30]

PCH_AZ_CODEC_SYNC[30]

PCH_AZ_CODEC_RST#[30]

PCH_AZ_CODEC_SDOUT[30]

C C

PCH JTAG Debug (CLG)

+3V_S5

R278

R278

R259

R259

210/F_4

210/F_4

210/F_4

210/F_4

PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TCK_R

R261

R261

R276

R275

R275
51_4

51_4

PCH Dual SPI (CLG)

B B

PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO

R256 3.3K_4R256 3.3K_4

+3V

A A

R276

100/F_4

100/F_4

100/F_4

100/F_4

MX25L3205DM2I-12G: AKE39FP0Z00
W25X32VSSIG: AKE39ZP0N00

C472

C472
*22P/50V_4

*22P/50V_4

R401 33_4R401 33_4
R403 33_4R403 33_4
R400 33_4R400 33_4
R402 33_4R402 33_4

U18

U18

1

CE#

VDD

6

SCK

5

SI

2

SO

HOLD#

3

WP#

VSS

SPI Flash

SPI Flash

8/10 modify footprint

4

3

PCH2(CLG)

C857 18P/50V_4C857 18P/50V_4

C854 18P/50V_4C854 18P/50V_4

Add MOSFET to separate CODEC SYNC signal

+5V

R354 10K_4R354 10K_4

1

PCH_JTAG_TCK[17]
PCH_JTAG_TMS[17]

PCH_JTAG_TDI[17]

PCH_JTAG_TDO[17]

23

+3V_RTC

2

3

Q26

Q26
2N7002K

2N7002K

PCH_AZ_CODEC_SDIN0[30]

Y3

32.768KHZY332.768KHZ

4 1

R339 1M_4R339 1M_4

SPKR[30]

8/16 swap

3
1

R249 0_4P2RR249 0_4P2R

R250 0_4P2RR250 0_4P2R

1
3

R615 *10K_4R615 *10K_4

+3VPCU

R663

R663
10M_4

10M_4

TP62TP62
TP21TP21

4
2

2
4

PCH Strap Table

Pin Name

SPKR

Strap description

No reboot mode setting PWROK

GNT3# / GPIO55 Top-Block Swap Override

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up

GNT1# / GPIO51

GPIO19

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

HDA_SDO Flash Descriptor Security RSMRST

DF_TVS

GPIO28

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

GPIO8

Integrated Clock Chip Enable

SPI_MOSI iTPM function Disable APWROK

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)NV_ALE

Sampled

PWROK

PWROK

PWROK

PWROK

RSMRST#

Configuration

0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode

0 = "top-block swap" mode
1 = Default (weak pull-up 20K)

0 = Override
1 = Default (weak pull-up 20K)

0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)

0 = Disable
1 = Enable (Default)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

Should be pull-down
(weak pull-up 20K)

0 = Default (weak pull-down 20K)
1 = Enable

Cougar Point (HDA,JTAG,SATA)

RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN

ACZ_BITCLK_R
ACZ_SYNC_RACZ_SYNC_CODEC
SPKR
ACZ_RST#_R

TP25TP25

ACZ_SDOUT_R

ODD_MD#

PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R

PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#

PCH_SPI_SI
PCH_SPI_SO

GNT0#GNT1#

11
00

U42A

U42A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

CougarPoint_R1P0

Boot Location

SPI

*

LPC

2

C38

FWH0 / LAD0

A38

FWH1 / LAD1

B37

FWH2 / LAD2

C37

FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

+3V

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

SATA 6G

SATA 6G

+3V

SATA

SATA

+3V_S5

SATAICOMPO

JTAG

JTAG

SATA3RCOMPO

SPI

SPI

+3V

SATA0GP / GPIO21

+3V

SATA1GP / GPIO19

+3V

+3V_RTC

Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]

ME_WR#[36]

R263 *1K_4R263 *1K_4

+3V_S5

D36
E36

LDRQ0#

K36
V5

SERIRQ

AM3

SATA0RXN

AM1

SATA0RXP

AP7

SATA0TXN

AP5

SATA0TXP

AM10

SATA1RXN

AM8

SATA1RXP

AP11

SATA1TXN

AP10

SATA1TXP

AD7

SATA2RXN

AD5

SATA2RXP

AH5

SATA2TXN

AH4

SATA2TXP

AB8

SATA3RXN

AB10

SATA3RXP

AF3

SATA3TXN

AF1

SATA3TXP

Y7

SATA4RXN

Y5

SATA4RXP

AD3

SATA4TXN

AD1

SATA4TXP

Y3

SATA5RXN

Y1

SATA5RXP

AB3

SATA5TXN

AB1

SATA5TXP

Y11
Y10

SATAICOMPI

AB12
AB13

SATA3COMPI

AH1

SATA3RBIAS

P3

SATALED#

V14
P1

R660 *1K_4R660 *1K_4

R684 *1K_4R684 *1K_4

R656 330K_4R656 330K_4

R702 *1K_4R702 *1K_4
R626 *1K_4R626 *1K_4

R630 2.2K_4R630 2.2K_4
R629 1K_4R629 1K_4

R355 1K_4R355 1K_4

PCH_DRQ#0
PCH_DRQ#1

IRQ_SERIRQ

SATA_TXN0_C
SATA_TXP0_C

SATA_RX1­SATA_RX1+
SATA_TXN1_C
SATA_TXP1_C

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C

SATA_TX5N_C
SATA_TX5P_C

SATA_COMP

SATA3_COMP

SATA3_RBIAS

PCH_ODD_EN
BBS_BIT0

SPKR

PCI_GNT3# [9]

PCH_INVRMEN

BBS_BIT1 [9]

BBS_BIT0

R356

R356
0_4

0_4

+1.8V

PLL_ODVR_EN [10]

Need check schematic

TP26TP26
TP24TP24

C454 0.01u/25V_4C454 0.01u/25V_4
C453 0.01u/25V_4C453 0.01u/25V_4

C456 0.01u/25V_4C456 0.01u/25V_4
C455 0.01u/25V_4C455 0.01u/25V_4

C397 0.01u/25V_4C397 0.01u/25V_4
C395 0.01u/25V_4C395 0.01u/25V_4
C840 0.01u/25V_4C840 0.01u/25V_4
C839 0.01u/25V_4C839 0.01u/25V_4

C846 0.01u/25V_4C846 0.01u/25V_4
C847 0.01u/25V_4C847 0.01u/25V_4

R313 37.4/F_4R313 37.4/F_4

R317 49.9/F_4R317 49.9/F_4

R618 750/F_4R618 750/F_4

ACZ_SDOUT_RACZ_SDO_TEST

DF_TVS [10]
H_SNB_IVB# [3]

ACZ_SYNC_R

1

LPC_LAD0 [29,36]
LPC_LAD1 [29,36]
LPC_LAD2 [29,36]
LPC_LAD3 [29,36]

LPC_LFRAME# [29,36]

IRQ_SERIRQ [36]

TP19TP19
TP20TP20
TP49TP49
TP51TP51

SATA_ACT# [33]
PCH_ODD_EN [28]

+1.05V_PCH

8/12 add

IRQ_SERIRQ
PCH_ODD_EN

SATA_RX0- [28]
SATA_RX0+ [28]
SATA_TX0- [28]
SATA_TX0+ [28]

SATA_RX1- [28]
SATA_RX1+ [28]
SATA_TX1- [28]
SATA_TX1+ [28]

SATA_RX4- [33]
SATA_RX4+ [33]
SATA_TX4- [33]
SATA_TX4+ [33]

SATA_RX5- [28]
SATA_RX5+ [28]
SATA_TX5- [28]
SATA_TX5+ [28]

SATA HDD

2nd SATA HDD

eSATA

SATA ODD

New Add in CPT EDS Rev1.0 at 0316

New Add in CPT EDS Rev1.0 at 0316

3/16 Remove based on CPT EDS rev1.0

3/16 Remove based on CPT EDS rev1.0

3/16 Remove based on CPT EDS rev1.0

R268 8.2K_4R268 8.2K_4
R253 *10K_4R253 *10K_4

+3V

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

4

3

2

Monday, November 08, 2010

PROJECT :

Cougar Point 2/6

Cougar Point 2/6

Cougar Point 2/6

ZYF

ZYF

ZYF

1A

1A

8 50

8 50

1

8 50

1A

5

www.qdzbwx.com

4

3

2

1

Cougar Point-M (PCI-E,SMBUS,CLK)

Cougar Point-M (PCI,USB,NVRAM)

PCIE_RX2-_USB3.0[34]
PCIE_RX2+_USB3.0[34]
PCIE_TX2-_USB3.0[34]

PCIE_TX2+_USB3.0[34]

CLK_PCIE_USB3.0_REQ#[34]

CLK_PCIE_LAN_REQ#[33]

R386 8.2K_4R386 8.2K_4
R680 8.2K_4R680 8.2K_4
R679 8.2K_4R679 8.2K_4
R357 8.2K_4R357 8.2K_4

dGPU_HOLD_RST#

1

EXTTS_SNI_DRV1_PCH

2

dGPU_EDIDSEL#

3
56

Setup
Menu

UMA

Hidden

GPU

Hidden

Discrete/SG

UMA

UMA/SG

3

PCIE_RX1-[33]
PCIE_RX1+[33]

PCIE_TX1-[33]
PCIE_TX1+[33]

PCIE_RX3-_TV[29]

PCIE_RX3+_TV[29]
PCIE_TX3-_TV[29]
PCIE_TX3+_TV[29]

PCIE_RX5-[32 ]

PCIE_RX5+[32]
PCIE_TX5-[32]
PCIE_TX5+[32]

PCIE_RX6-[29]
PCIE_RX6+[29]

PCIE_TX6-[29]

PCIE_TX6+[29]

CLK_PCH_SRC2#[29]
CLK_PCH_SRC2[29]

CLKREQ_WLAN#[29]

CLK_PCH_SRC1#[29]
CLK_PCH_SRC1[29]

CLKREQ_TV#[29]

CLK_USB3.0_SRC3#[34]
CLK_USB3.0_SRC3[34]

CLK_PCH_SRC5#[32]
CLK_PCH_SRC5[32]

CLK_PCIE_LOM#[33]
CLK_PCIE_LOM[33]

CLK_PCIE_XDPN[17]
CLK_PCIE_XDPP[17]

+3V

dGPU_SELECT#

UMA boot

GPU boot

UMA boot

UMA boot

TP27TP27
TP28TP28
TP22TP22
TP23TP23

TP64TP64
TP65TP65

TP29TP29
TP30TP30

9/14 SWAP

C513 0.1u/10V_4C513 0.1u/1 0V_4
C506 0.1u/10V_4C506 0.1u/10V_4

C517 0.1u/10V_4C517 0.1u/1 0V_4
C516 0.1u/10V_4C516 0.1u/1 0V_4

C504 0.1u/10V_4C504 0.1u/10V_4
C494 0.1u/10V_4C494 0.1u/10V_4

C523 0.1u/10V_4C523 0.1u/10V_4
C527 0.1u/10V_4C527 0.1u/10V_4

C554 0.1u/10V_4C554 0.1u/10V_4
C555 0.1u/10V_4C555 0.1u/10V_4

T38T38

R692 0_4R692 0_4
R693 0_4R693 0_4

R694 0_4R694 0_4
R695 0_4R695 0_4

R376 0_4R376 0_4
R377 0_4R377 0_4

T37T37

R342 10K_ 4R342 10K_4

7/30 add

R374 0_4R374 0_4
R375 0_4R375 0_4

8/9 del

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN5_C
PCIE_TXP5_C

PCIE_TXN6_C
PCIE_TXP6_C

PCIE_CLKREQ0#

CLK_PCH_SRC2#_R

CLK_PCH_SRC2_R

CLKREQ_WLAN#

CLK_PCH_SRC1N
CLK_PCH_SRC1P

CLKREQ_TV#

CLK_PCH_SRC3#_R
CLK_PCH_SRC3_R

CLK_PCIE_USB3.0_REQ#

PCIE_CLKREQ4#

PCIE_CLKREQ5#

CLK_PCIE_LOM#_R
CLK_PCIE_LOM_R

CLK_PCIE_LAN_REQ#

CLK_PCIE_REQ6#

CLK_PCIE_REQ7#

+3V_S5

R621 10K_4R62 1 10 K_4
R637 10K_4R63 7 10 K_4
R635 10K_4R63 5 10 K_4
R340 *10K_4R340 *10K_4
R311 10K_4R31 1 10 K_4
R281 10K_4R28 1 10 K_4
R319 10K_4R31 9 10 K_4

+3V

R612 10K_4R61 2 10 K_4
R267 10K_4R26 7 10 K_4

+3V_S5

R279 *10K_4R279 *10K_4
R262 EV@10K_4R262 EV@10K_4

CLK_BUF_BCLKN
CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M

CLOCK TERMINATION for FCIM

U42E

U42E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AW30

AH37
AK43
AK45

AH12

AB46
AB45

AY16
BG46

BE28
BC30
BE32

BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

C18
N30

H3

AM4
AM5

Y13
K24
L24

B21

M20

BJ32

K40
K38
H38
G38

C46
C44
E40

D47
E42
F46

G42
G40
C42
D44

K10

C6

H49
H43
J48
K42
H40

TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PME#
PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

CougarPoint_R1P0

CougarPoint_R1P0

RSVD

RSVD

+3V
+3V
+3V

+3V
+3V
+3V

+3V
+3V
+3V
+3V

PCI

PCI

+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5

USB

USB

D D

C C

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

dGPU_EDIDSEL#

NEW!!

PCI_GNT3#[8]

dGPU_PWM_SELECT#[26]

NEW!!

TP31TP31

CLK_PCI_FB CLK_PCI_FB_C

CLK_LPC_DEBUG[29]

CLK_PCI_775[36]

B B

CLK_LPC_DEBUG_C

BBS_BIT1[8]

TP66TP66

TP17TP17

R685 22_4R685 22_4
R381 22_4R381 22_4
R673 22_4R673 22_4

C916

C916

*0.1U/10V_4

*0.1U/10V_4

dGPU_SELECT#
dGPU_PWR_EN#

MPC_PWR_CTRL#
dGPU_PWM_SELECT#
dGPU_HOLD_RST#
EXTTS_SNI_DRV1_PCH

PCI_PME#
PCI_PLTRST#

CLK_LPC_DEBUG_C
CLK_PCI_775_C

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25
RSVD26

RSVD27
RSVD28

RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

NV_ALE

AV5
AV10

AT8
AY5

BA2
AT12

BF3

C24

TP57TP57

A24

TP58TP58

C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29

TP60TP60

B29

TP61TP61

N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USB_BIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

USB_OC7#

C14

TP18TP18

Port1 and port9 can be used on debug mode

USBP1- [34]

MB USB

USBP1+ [34]
USBP2- [35]

Finger Printer

USBP2+ [35]
USBP3- [33]

EXT/B-USB1-3

USBP3+ [33]
USBP4- [35]

BLUETOOTH

USBP4+ [35]

USB port6/7 may not be available on all PCH sku
(HM56 support 12port only)

USBP8- [26]

Camera

USBP8+ [26]
USBP9- [33]

eSATA

USBP9+ [33]
USBP10- [29]

Mini Card (WLAN)

USBP10+ [29]
USBP11- [33]

EXT/B-USB1-1

USBP11+ [33]
USBP12- [33]

EXT/B-USB1-2

USBP12+ [33]
USBP13- [29]

Mini Card (TV)

USBP13+ [29]

R671 22.6/F_4R671 22.6/F_4

USB_OC0# [34]

USB_OC4# [33]

MPC Switch Con trol

MPC_PWR_CTRL#

MPC_PWR_CTRL#

EHCI1

EHCI2

Low = MPC ON
High = MPC OFF (Default)

R369 *1K _4R369 *1K _4

LAN

USB3.0

Mini TV

JM388

MiniWLAN

MiniWLAN

Mini TV

USB3.0

JM388

LAN

10/26 EMI

PLTRST#(CLG)

PCI_PLTRST#

+3V_S5

C490

C490

0.1U/10V_4

0.1U/10V_4

2
1

3 5

U19

U19
TC7SH08FU

TC7SH08FU

PLTRST#

4

R290

R290
100K/J_4

100K/J_4

PLTRST# [3,17,29,32,33,34,36]

PCI/USBOC# Pull-up(CLG)

+3V_S5

R648

R648

10

9
8
7 4

10K_10P8R

10K_10P8R

1
2
3

56

USB_OC4#
USB_OC1#
USB_OC2#
USB_OC3#

USB_OC6#
USB_OC0#
USB_OC7#
USB_OC5#

8/16 swap

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

dGPU_PWM_SELECT#
dGPU_PWR_EN#

MPC_PWR_CTRL#

+3V

10

9
8
7 4

R368

R368

10K_10P8R

10K_10P8R

9/14 del R305

dGPU_PW_CTRL#

SKU_ID1

SKU_ID0

VGA H/W

(GPIO16)

Signal

0

0

0

1

1

0

UMA+GPU

1

1

R50

R50
100K/J_4

100K/J_4

5

+3V

C88

C88

0.1U/10V_4

0.1U/10V_4

2

4

1

U1

3 5

TC7SH08FUU1TC7SH08FU

GPU_RST# [19,32]

+3V

R370 MS@10K_4R370 MS@10K_4
R367 EV@10K_4R367 EV@10K_4

+3V

R616 10K_4R61 6 10 K_4
R627 *10K_4R627 *10K_4

4

SKU_ID1

SKU_ID0 [10]

GPU RST#(CLG)

A A

PLTRST#[3,17,29,32,33,34,36]

dGPU_HOLD_RST#

(GPIO68)

(GPIO53)

UMA Only

1

Discrete Only

0 or 1

Switchable

0

(Mux)

Optimize

0

(Muxless)

0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize)
1 = GPU power is control by H/W (pure Discrete SKU)

U42B

U42B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_R1P0

CougarPoint_R1P0

PCIE_CLKREQ0#
CLK_PCIE_USB3.0_REQ#
PCIE_CLKREQ4#
PCIE_CLKREQ5#
CLK_PCIE_LAN_REQ#
CLK_PCIE_REQ6#
CLK_PCIE_REQ7#

CLKREQ_TV#
CLKREQ_WLAN#

PCIE_CLKREQ_PEG#

R668 10K_4R668 10K_4
R670 10K_4R670 10K_4

R331 10K_4R331 10K_4
R336 10K_4R336 10K_4
R348 10K_4R348 10K_4
R345 10K_4R345 10K_4
R294 10K_4R294 10K_4
R293 10K_4R293 10K_4
R388 10K_4R388 10K_4

SMBALERT#

+3V_S5

SMBALERT# / GPIO11

+3V_S5

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

+3V_S5

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

SML1CLK / GPIO58

+3V_S5

SML1DATA / GPIO75

PCI-E*

PCI-E*

Link

Link

+3V_S5

PEG_A_CLKRQ# / GPIO47

+3V_S5

+3V

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLOCKS

CLOCKS

+3V

+3V_S5

CLKIN_DOT_96N
CLKIN_DOT_96P

+3V_S5

+3V_S5

CLKIN_PCILOOPBACK

+3V_S5

+3V_S5

+3V

CLKOUTFLEX0 / GPIO64

+3V

+3V_S5

CLKOUTFLEX1 / GPIO65

+3V

CLKOUTFLEX2 / GPIO66

+3V

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

SMBus/Pull-up(CLG)CLK_REQ/Strap Pin(CLG)

2ND_MBCLK[36]

2ND_MBDATA[36]

+3V_S5

R646 1K/F_4R646 1K/F_4
R320 10K_ 4R320 10K_4

R307 2.2K_ 4R307 2.2K_4
R312 2.2K_ 4R312 2.2K_4
R638 2.2K_ 4R638 2.2K_4
R328 2.2K_ 4R328 2.2K_4
R329 10K_ 4R329 10K_4

2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

3

DRAMRST_CNTRL_PCH
SMBALERT#

SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

E12
H14
C9

A12
C8
G12

C13
E14
M16

M7

T11

P10

M10

AB37
AB38

AV22
AU22

AM12
AM13

BF18
BE18

BJ30
BG30

G24
E24

AK7
AK5

K45

H45

V47
V49

Y47

K43
F47
H47
K49

+3V_S5

2

R722 0_4R722 0_4

+3V_S5

2

R723 0_4R723 0_4

SMB_PCH_CLK
SMB_PCH_DAT

DRAMRST_CNTRL_PCH
SMB_ME0_CLK
SMB_ME0_DAT

SML1ALERT#_R
SMB_ME1_CLK
SMB_ME1_DAT

PCIE_CLKREQ_PEG#

CLK_PCIE_VGA#_R
CLK_PCIE_VGA_R

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP

CLK_BUF_BCLKN
CLK_BUF_BCLKP

CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP

CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP

CLK_PCH_14M

CLK_PCI_FB

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

SKU_ID1
CLK_FLEX1
CLK_FLEX2
CLK_FLEX3

1

Q24

Q24
*2N7002K

*2N7002K

R330 *0_4R3 30 * 0_4

R691 90.9/F_4R691 90.9/F_4

R304

R304
*2.2K_4

*2.2K_4

SMB_ME1_CLK

SMB_PCH_CLK [7,17]
SMB_PCH_DAT [7,17]

DRAMRST_CNTRL_PCH [4]

CL_CLK1 [29]

CL_DATA1 [29]

CL_RST1# [29]

R379 EV@0_4R379 EV@0_4
R378 EV@0_4R378 EV@0_4

R382 G@22_4R382 G@22_4

T51T51
T52T52

For LAN

SML1ALERT# [10,35,36]

For EC

PEG_CLKREQ# [19]

CLK_PCIE_VGA# [18]
CLK_PCIE_VGA [18]

CLK_CPU_BCLKN [3]
CLK_CPU_BCLKP [3]

CLK_DPLL_SSCLKN [3]
CLK_DPLL_SSCLKP [3]

+1.05V_PCH

8/4 modify

9/13 add

R326

R326
*2.2K_4

*2.2K_4

SMB_ME1_DAT

1

Q25

Q25
*2N7002K

*2N7002K

9/13 add

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

PROJECT :

Cougar Point 3/6

Cougar Point 3/6

Cougar Point 3/6

1

R696

R696
1M_4

1M_4

7/27 modify

ZYF

ZYF

ZYF

C883 27P/50V_4C883 27P/50V_4

21

Y5
25MHzY525MHz

C882 27P/50V_4C882 27P/50V_4

27M_CLK [19]

9 50

9 50

9 50

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

Cougar Point (GPIO,VSS_NCTF,RSVD)

U42F

U42F

S_GPIO

R283 100_4R283 100_4

8/12 modify

D D

SIO_EXT_SMI#[36]

SIO_EXT_SCI#[36]

SMIB[34]

8/13 add

NEW!!

SKU_ID0[9]

dGPU_PW ROK[21,32]

8/12 modify

CR_WAKER#[32]

PLL_ODVR_EN[8]

Need Check

C C

dGPU_VRON[21,32,44]

ODD_PRSNT#[28]

8/12 modify

SML1ALERT#[9,35,36]

B B

SIO_EXT_SMI#
BOARD_ID1
SIO_EXT_SCI#

PCH_GPIO15

BIOS_REC
CR_WAKER#
PCH_GPIO27
PLL_ODVR_EN
STP_PCI#

R255 0_4R255 0_4

FDI_OVRVLTG
MFG_MODE
BOARD_ID0
TEST_SET_UP

R617 0_4R617 0_4

SV_DET

DMI_OVRVLTG

CRIT_TEMP_REP#

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

C4
G2

U2

D40

E16

M5
N2
M3

V13

D6

A44
A45
A46

B47

BD1

BD49

BE1

BE49

BF1

BF49

+3V_S5

GPIO8
LAN_PHY_PWR_CTRL / GPIO12

+3V_S5

GPIO15

SATA4GP / GPIO16

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

DSW

GPIO27

P8
K1
K4
V8

V3

A4

A5
A6
B3

+3V_S5

GPIO28
STP_PCI# / GPIO34

+3V

GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
SLOAD / GPIO38
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49

+3V_S5

GPIO57

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14

CougarPoint_R1P0

CougarPoint_R1P0

+3V
+3V
+3V
+3V

+3V

+3V

+3V

+3V_S5

+3V

+3V
+3V

+3V

+3V

+3V
+3V

+3V
+3V
+3V
+3V

+3V_S5

GPIO

GPIO

NCTF

NCTF

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4

NC_1

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

C40

R700 1.5K/F_4R700 1.5K/F_4

B41

R683 1.5K/F_4R683 1.5K/F_4

C41

R682 1.5K/F_4R682 1.5K/F_4

A40

SIO_A20GATE

P4
AU16

SIO_RCIN#

P5
AY11

PCH_THRMTRIP#

AY10
T14
AY1

AH8
AK11
AH10
AK10

P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

SGPIO

S_GPIO

R285 *0_4R285 *0_4

dGPU_PW _CTRL#

+3V

R257 *Short_4R257 *Short_4

R284 390_4R284 390_4

R254 1K/F_4R254 1K/F_4
R265 *0_4R265 *0_4

+3V

Intel ME Crypto Transport Layer
Security (TLS) cipher suite

Low = Disable (Default)

A A

R260 100K/J_4R260 100K/J_4

FDI TERMINATION
VOLTAGE OVERRIDE

FDI_OVRVLTG DMI_OVRVLTG BIOS_REC

R277 *10K_4R277 *10K_4

LOW - Tx, Rx terminated
to same voltage

5

DMI TERMINATION
VOLTAGE OVERRIDE

R292 200K/F_4R292 200K/F_4

Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)

4

+3V+3V +3V

R282 10K_4R282 10K_4
R264 *0_4R264 *0_4

BIOS RECOVERY

High = Disable (Default)
Low = Enable

3

High = Enable

MFG-TEST

NEW!!

SIO_A20GATE [36]CR_CPPE#[32]

EC_PECI [36]

H_PECI [3]
SIO_RCIN# [36]
H_PWRGOOD [3,17]
PM_THRMTRIP# [3]

DF_TVS [8]

SV_SET_UP

High = Strong (Default)

TEST_SET_UP

PCH_GPIO15

MFG_MODE

R609 1K_4R609 1K_4

R613 10K_4R613 10K_4
R625 *0_4R625 *0_4

2

PD3 no PU, PD3 connect to EC

R266 10K_4R266 10K_4
R291 *0_4R291 *0_4

+3V

GPIO Pull-up/Pull-down(CLG)

8/16 modify

8/16 modify

+3V_S5

R303 *10K_4R303 *10K_4

R624 *10K_4R624 *10K_4
R675 *10K_4R675 *10K_4

+3V_S5

NEW

+3V

R699 *10K_4R699 *10K_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

CR_WAKER#
SMIB
PLL_ODVR_EN

SIO_EXT_SMI#
SIO_EXT_SCI#

STP_PCI#
SIO_A20GATE
SIO_RCIN#
CRIT_TEMP_REP#

PCH_GPIO27

BOARD_ID0
BOARD_ID1

high

low

dGPU_PW _CTRL#

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Cougar Point 4/6

Cougar Point 4/6

Cougar Point 4/6

R298 10K_4R298 10K_4
R296 *10K_4R296 *10K_4
R280 10K_4R280 10K_4

R701 10K_4R701 10K_4
R359 10K_4R359 10K_4

R622 *10K_4R622 *10K_4
R252 10K_4R252 10K_4
R251 10K_4R251 10K_4
R628 10K_4R628 10K_4

R335 *10K_4R335 *10K_4

SV_DET

R611 *10K_4R611 *10K_4
R677 *10K_4R677 *10K_4

GPU power is control by
H/W (pure Discrete SKU)

GPU power is control by PCH
GPIO (Discrete, SG or Optimize)

ZYF

ZYF

ZYF

1

+3V_S5

R297 100K/J_4R297 100K/J_4

R681 100K/F_4R681 100K/F_4

10 50

10 50

10 50

+3V

+3V+3V

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

PCH5(CLG)

COUGAR POINT (POWER)

POWER

POWER

U42G

+1.05V_PCH +1.05V_PCH_VCC

R351 *short_1206R351 *short_1206

D D

+1.05V_PCH +1.05V_VCCAPLL_EXP

+1.05V_PCH +1.05V_VCCIO

C C

B B

+1.05V_PCH_VCCDPLL_EXP+1.05V_PCH

R310 *Short_6R310 *Short_6

L64 *1uH/25mA_6L64 *1 uH/25mA_6

R352 *short_1206R352 *short_1206

VccCORE =1.3 A(60mils)

C510

C510

C501

C501

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

C855

C855
*10u/6.3V_6

*10u/6.3V_6

VccIO =2.925 A(140mils)

C522

C522

C521

C521

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

C505

C505
1u/6.3V_4

1u/6.3V_4

R666 *short_8R666 *short_8

+VCCAFDI_VRM

+1.05V_PCH

R645 0_6R645 0_6

+1.5V

R641 *0_6R641 *0_6

+1.05V_PCH

C491

C491

C507

C507

10U/6.3V_6

10U/6.3V_6

1u/6.3V_4

1u/6.3V_4

C515

C515
1u/6.3V_4

1u/6.3V_4

C514

C514
10U/6.3V_6

10U/6.3V_6

+3V_VCC_EXP+3V

C858

C858

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM

R322 *0_8R322 *0_8

+1.05V_VCCAPLL_FDI

R321 0_8R321 0_8

+1.05V_VCCDPLL_FDI

+1.05V_VTT

+VCCAFDI_VRM

VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1

1.5V (Mobile)

AA23
AC23
AD21
AD23

AF21

AF23
AG21
AG23
AG24
AG26
AG27
AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16
AN17

AN21
AN26
AN27
AP21
AP23
AP24
AP26

AT24

AN33
AN34

BH29

AP16

BG6

AP17

AU20

U42G

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]

VCCIO[25]
VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

CougarPoint_R1P0

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

DMI

DMI

VCCIO

VCCIO

DFT / SPI HVCMOS

DFT / SPI HVCMOS

FDI

FDI

VCCADAC

VSSADAC

VCCALVDS
VSSALVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

8/11 modify

U48

U47

AK36
AK37

VccTX_LVDS=60mA(10mils)

AM37
AM38

C531

C531
MS@0.01U/25V_4

MS@0.01U/25V_4

AP36
AP37

R672 *Short_6R672 *Short_6

V33

C861

C861

0.1U/10V_4

0.1U/10V_4

V34

+VCCAFDI_VRM

AT16

AT20

AB36

C885

C885
1u/6.3V_4

1u/6.3V_4

AG16

AG17

AJ16

AJ17

V1

VccADAC =1mA(8mils)

C553

C553

C552

C552

0.01U/25V_4

0.01U/25V_4

0.1U/10V_4

0.1U/10V_4

VccALVDS=1mA(8mils)

C530

C530
MS@0.01U/25V_4

MS@0.01U/25V_4

+3V+3V_VCC_GIO

+VCCAFDI_VRM

L69 * 10uH/100mA_8L69 *10uH/100mA_ 8

C887

C887
*10u/6.3V_6

*10u/6.3V_6

+1.8V+VCCP_NAND

R620 *short_8R620 *short_8

C485

C485

0.1U/10V_4

0.1U/10V_4

+3V+3 V_VCCME_SPI

R608 *Short_6R608 *Short_6

C845

C845
1u/6.3V_4

1u/6.3V_4

VCCSPI = 20mA(8mils)

+VCCA_DAC_1_2

L30 BKP1 608HS181T/180ohm_6L30 BKP1 608HS181T/180ohm_6

C556

C556
10U/6.3V_6

10U/6.3V_6

+VCCALVDS +3V

R366 MS@0_4R366 MS@0_4

Ra

R371 EV@0_4R371 EV@0_4

L28 M S@0.1uH/250mA_8L28 MS@0.1uH/250mA_8

Rb

R365 EV@0_4R365 EV@0_4

C537

C537
MS@22U/6.3V_8

MS@22U/6.3V_8

DIS MS

Ra

0 ohm NA
0 ohm

Rb NA

VCCDMI = 42mA(10mils)

+VCC_DMI_CCI +1.05V_PCH+1.1V_VCC_DMI_CCI

+1.05V_VTT+1.1V_VCC_DMI

R338 *Short_4R338 *Short_4

C496

C496
1u/6.3V_4

1u/6.3V_4

VCCCLKDMI = 20mA(8mils)

R711 *1/F_4R711 *1 /F_4
R710 0_4R710 0_4

VCCPNAND = 190 mA(15mils)

+3V

+1.8V+VCC_TX_LVDS

+1.05V_PCH

+1.05V_PCH

1mA(8mils)

VCCRTC<1mA(8mils)

+3V_S5

+VCCAPLL_CPY_PCH

L65 * 10uH/100mA_8L65 *10uH/100mA_ 8

VCCME(+1.05V) = ??A(??mils)

+1.05V_VCCEPW

R619 *short_1206R619 *short_1206

+1.05V_PCH

R274 *Short_6R274 *Short_6

R411 *Short_6R411 *Short_6

R410 *Short_6R410 *Short_6

+1.05V_PCH

R341 *0_6R341 *0_6

+1.05V_VTT

R333 *Short_4R333 *Short_4

+3V_RTC

+1.05V_PCH

R659 *Short_4R659 *Short_4

C856

C856
*10u/6.3V_6

*10u/6.3V_6

+1.05V_PCH

VCCDSW3_3= 3mA

C489

C489

0.1U/10V_4

0.1U/10V_4

VccASW =1.01 A(60mils)

C500

C500

C509

C509

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

C519

C519
22U/6.3V_8

22U/6.3V_8

C486

C486
1u/6.3V_4

1u/6.3V_4

C564

C564
1u/6.3V_4

1u/6.3V_4

C563

C563
1u/6.3V_4

1u/6.3V_4

C487

C487
*1u/6.3V_4

*1u/6.3V_4

C473

C473

4.7u/6.3V_6

4.7u/6.3V_6

C497

C497
1u/6.3V_4

1u/6.3V_4

VCCDIFFCLKN= 55mA(10mils)
VCCSSC= 95mA(10mils)

C462

C462

0.1U/10V_4

0.1U/10V_4

C908

C908

0.1U/10V_4

0.1U/10V_4

R385 *0_8R385 *0_8

R373 *Short_6R373 *Short_6

C508

C508
1u/6.3V_4

1u/6.3V_4

C837

C837
22U/6.3V_8

22U/6.3V_8

C479 0.1U/10V_4C479 0.1U/10V_4

+VCCAFDI_VRM

65mA(10mils)
8mA(8mils)

C483 0.1U/10V_4C483 0.1U/10V_4

C467

C467

0.1U/10V_4

0.1U/10V_4

C498

C498

0.1U/10V_4

0.1U/10V_4

C452

C452
*0.1U/10V_4

*0.1U/10V_4

C493

C493
*1u/6.3V_4

*1u/6.3V_4

+VCCACLK

+VCCPDSW

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCDPLL_CPY

+VCCSUS1

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL

+VCCDIFFCLK
+VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

+V1.05M_VCCSUS

+VTT_VCCPCPU

Cougar Point-M (POWER)

POWER

POWER

U42J

U42J

AD49

T16

V12

T38

BH23

AL29

AL24

AA19
AA21
AA24
AA26
AA27
AA29

AA31
AC26
AC27
AC29
AC31
AD29
AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47
BF47

AF17

AF33

AF34
AG34

AG33

V16

T17
V19

BJ8

A22

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2
VCCIO[14]

DCPSUS[3]

VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA
VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoint_R1P0

CougarPoint_R1P0

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]
VCCIO[3]
VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26
P26
P28
T27
T29

T23
T24
V23
V24
P24

T26

M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2

AF13

AH13
AH14

AF14
AK1

VCCVRM= 114mA(15mils)

AF11

AC16
AC17
AD17

T21

V21

T19

P32

+3V_VCCPUSB

+3V_VCCAUBG

+VCCAUPLL

+5V_PCH_VCC5REFSUS

+VCCA_USBSUS
+3V_VCCPSUS

+5V_PCH_VCC5REF

+3V_VCCPSUS

+3V_VCCPCORE

+3V

C848

C848

0.1U/10V_4

0.1U/10V_4

+V1.05S_SATA3

+V1.1LAN_VCCAPLL

+VCCAFDI_VRM

C484

C484
1u/6.3V_4

1u/6.3V_4

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C864

C864
*1u/6.3V_4

*1u/6.3V_4

R346 *Short_6R346 *Short_6

C495

C495
*1u/6.3V_4

*1u/6.3V_4

R273 *Short_6R273 *Short_6

R676 *0_4R676 *0_4
R678 0_4R6 78 0_4

C862

C862

0.1U/10V_4

0.1U/10V_4

R669 *short_8R669 *short_8

C860

C860
1u/6.3V_4

1u/6.3V_4

R658 *Short_6R658 *Short_6

C503

C503

0.1U/10V_4

0.1U/10V_4

R349 *Short_6R349 *Short_6

C512

C512

0.1U/10V_4

0.1U/10V_4

+1.05V_PCH

R667 10_4R667 10_4

D31 RB500V-40D31 RB50 0V-40

C859

C859

0.1U/10V_4

0.1U/10V_4

R674 10_4R674 10_4

D32 RB500V-40D32 RB50 0V-40

C863

C863
1u/6.3V_4

1u/6.3V_4

R337 *Short_6R337 *Short_6

VCCSUS3_3 = 119mA(15mils)

C502

C502
1u/10V_4

1u/10V_4

R269 *Short_6R269 *Short_6

VCCPCORE = 28mA(10mils)

C444

C444

0.1U/10V_4

0.1U/10V_4

+3V

C518

C518

0.1U/10V_4

0.1U/10V_4
R272 *short_8R272 *short_8

C482

C482
1u/10V_4

1u/10V_4

L63 *10uH/100mA_8L63 *10uH/100mA_8
C844

C844
*10u/6.3V_6

*10u/6.3V_6

+1.05V_PCH

VCCME = 1.01A(60mils)

+1.05V_PCH+1.05V_VCCUSBCORE

VCCSUS3_3 = 119mA(15mils)

+3V_S5

VCC5REFSUS=1mA

+5V_S5
+3V_S5

V5REF= 1mA

+5V
+3V

+3V_S5

+3V

+1.05V_PCH

??mA(??mils)

+1.05V_PCH

+1.5V_SUS

VCCSUSHDA= 10mA(8mils)

+3V_S5

L68 1 0uH/100mAL68 10uH/100mA

+1.05V_PCH

+3V

R706 *0_6R706 *0_6
R707 1/F_4R707 1/F_4

A A

5

4

3

L70 1 0uH/100mAL70 10uH/100mA

C520

C520
10U/6.3V_6

10U/6.3V_6

+3V_SUS_CLKF33

C528

C528
1u/10V_4

1u/10V_4

2

L67 1 0uH/100mAL67 10uH/100mA

+

+

+

+

C870

C870
220U/2.5V_3528

220U/2.5V_3528

C865

C865
220U/2.5V_3528

220U/2.5V_3528

+1.05V_VCCA_A_DPL

C545

C545
1u/6.3V_4

1u/6.3V_4

+1.05V_VCCA_B_DPL

C540

C540
1u/6.3V_4

1u/6.3V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Cougar Point 5/6

Cougar Point 5/6

Cougar Point 5/6

Monday, November 08, 2010

Monday, November 08, 2010

Monday, November 08, 2010

1

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

ZYF

ZYF

ZYF

11 50

11 50

11 50

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

PCH6(CLG)

U42I

U42I

AY4

VSS[159]

IBEX PEAK-M (GND)

D D

U42H

U42H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

C C

B B

A A

5

AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39

AD4
AD40
AD42
AD43
AD45
AD46

AD8

AE2

AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38

AF4
AF42
AF46

AF5

AF7

AF8
AG19

AG2
AG31
AG48
AH11

AH3
AH36
AH39
AH40
AH42
AH46

AH7

AJ19
AJ21
AJ24
AJ33
AJ34

AK12

AK3

CougarPoint_R1P0

CougarPoint_R1P0

VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

4

AY42
AY46

BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38

BB46
BC14
BC18

BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46

BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28

BD3
BF30
BF38
BF40

BG17
BG21
BG33
BG44

BG8
BH11
BH15
BH17
BH19

BH27
BH31
BH33
BH35
BH39
BH43

BH7

AY8
B11
B15
B19
B23
B27
B31
B35
B39

F45

BB4

BF8

H10

D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42

E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34

B7

D3

D8

F3

VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

CougarPoint_R1P0

CougarPoint_R1P0

3

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

Monday, November 08, 2010

Date: Sheet of

2

Monday, November 08, 2010

PROJECT :

Cougar Point 6/6

Cougar Point 6/6

Cougar Point 6/6

1

ZYF

ZYF

ZYF

12 50

12 50

12 50

1A

1A

1A

5

www.qdzbwx.com

M_A_A[15:0][4,14]

SA1 SA0

CHA0

D D

CHA1
CHB0
CHB1

+3V

C C

B B

0

0

10
1 0
1 1

R7 DO@10K_4R7 DO@10K_4
R5 DO@10K_4R5 DO@10K_4

M_A_DQSP[7:0][4,14]

M_A_DQSN[7:0][4,14]

M_A_BS#0[4,14]
M_A_BS#1[4,14]
M_A_BS#2[4,14]
M_A_CS#2[4]
M_A_CS#3[4]
M_A_CLK2[4]
M_A_CLK2#[4]
M_A_CLK3[4]
M_A_CLK3#[4]
M_A_CKE2[4]
M_A_CKE3[4]
M_A_CAS#[4,14]
M_A_RAS#[4,14]
M_A_WE#[4,14]

CLK_SCLK[7,14,15,16,29]

CLK_SDATA[7,14,15,16,29]

M_A_ODT2[4]
M_A_ODT3[4]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM1_SA0
DIMM1_SA1
CLK_SCLK
CLK_SDATA

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

107

119

109
108

114
121
101
103
102
104

115
110
113
197
201
202
200

116
120

136
153
170
187

137
154
171
188

135
152
169
186

98
97
96
95
92
91
90
86
89
85

84
83

80
78

79

73
74

11
28
46
63

12
29
47
64

10
27
45
62

Place these Caps near So-Dimm0.

4

JDIM1A

JDIM1A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DO@DDR3-DIMM0_H=4.0_RVS

DO@DDR3-DIMM0_H=4.0_RVS

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ5
M_A_DQ1
M_A_DQ6
M_A_DQ7
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ13
M_A_DQ8
M_A_DQ15
M_A_DQ14
M_A_DQ12
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ21
M_A_DQ16
M_A_DQ22
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ23
M_A_DQ18
M_A_DQ29
M_A_DQ28
M_A_DQ30
M_A_DQ25
M_A_DQ27
M_A_DQ24
M_A_DQ26
M_A_DQ31
M_A_DQ36
M_A_DQ32
M_A_DQ39
M_A_DQ38
M_A_DQ33
M_A_DQ37
M_A_DQ34
M_A_DQ35
M_A_DQ41
M_A_DQ45
M_A_DQ47
M_A_DQ42
M_A_DQ40
M_A_DQ44
M_A_DQ46
M_A_DQ43
M_A_DQ48
M_A_DQ52
M_A_DQ50
M_A_DQ55
M_A_DQ53
M_A_DQ49
M_A_DQ54
M_A_DQ51
M_A_DQ57
M_A_DQ60
M_A_DQ59
M_A_DQ62
M_A_DQ56
M_A_DQ61
M_A_DQ63
M_A_DQ58

3

M_A_DQ[63:0] [4,14]

+1.5V_SUS

+1.5V_SUS

+3V

8/4 modify

DDR3_DRAMRST#[4,14,15,16]

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM_A

R13

R13
10K_4

10K_4

+SMDDR_VREF_DIMM_A

R12

R12
10K_4

10K_4

R9
10K_4R910K_4

+SMDDR_VREF_DQ0

R14

R14
10K_4

10K_4

C36

C36
470p/50V_4

470p/50V_4

C29

C29
470p/50V_4

470p/50V_4

2.48A

R4 *short_8R4 *short_8

TP5TP5

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM_A

2

+1.5V_SUS

+3V_JM9000

JDIM1B

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DO@DDR3-DIMM0_H=4.0_RVS

DO@DDR3-DIMM0_H=4.0_RVS

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0.75V_VTT_1

1

+0.75V_DDR_VTT

R11 *short_8R11 *short_8

+1.5V_SUS

8/3 add

+

+

C25

C26

C38

C38
DO@10u/6.3V_6

DO@10u/6.3V_6

A A

+3V_JM9000

C20

C20
DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

+0.75V_VTT_1 +SMDDR_VREF_DQ0

C21

C21

DO@0.1u/16V_4

DO@0.1u/16V_4

5

C40

C40

DO@1u/6.3V_4

DO@1u/6.3V_4

C35

C35
DO@1u/6.3V_4

DO@1u/6.3V_4

C39

C39

DO@10u/6.3V_6

DO@10u/6.3V_6

C37

C37

DO@1u/6.3V_4

DO@1u/6.3V_4

C23

C23
DO@10u/6.3V_6

DO@10u/6.3V_6

C26

DO@0.1u/16V_4

DO@0.1u/16V_4

C30

C30
DO@1u/6.3V_4

DO@1u/6.3V_4

4

C33

C33
DO@0.1u/16V_4

DO@0.1u/16V_4

C31

C31

*DO@10u/6.3V_6

*DO@10u/6.3V_6

C24

C32

C32

DO@0.1u/16V_4

DO@0.1u/16V_4

C24
DO@0.1u/16V_4

DO@0.1u/16V_4

+SMDDR_VREF_DIMM_A

C55

C55

DO@0.1u/16V_4

DO@0.1u/16V_4

C25

DO@0.1u/16V_4

DO@0.1u/16V_4

C34

C34

DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

C18

C18
330u/2V_7343

330u/2V_7343

C28

C28
DO@0.1u/16V_4

DO@0.1u/16V_4

3

C27

C27

DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZYF

ZYF

ZYF

1A

1A

1A

13 50Monday, November 08, 2010

13 50Monday, November 08, 2010

13 50Monday, November 08, 2010

1

5

www.qdzbwx.com

M_A_A[15:0][4,13]

SA1 SA0

CHA0
CHA1

D D

CHB0
CHB1

C C

B B

0

1 0
1 1

R17 10K_4R17 10K_4
R16 10K_4R16 10K_4

0
10

M_A_BS#0[4,13]
M_A_BS#1[4,13]
M_A_BS#2[4,13]
M_A_CS#0[4]
M_A_CS#1[4]
M_A_CLK0[4]
M_A_CLK0#[4]
M_A_CLK1[4]
M_A_CLK1#[4]
M_A_CKE0[4]
M_A_CKE1[4]
M_A_CAS#[4,13]
M_A_RAS#[4,13]
M_A_WE#[4,13]

CLK_SCLK[7,13,15,16,29]

CLK_SDATA[7,13,15,16,29]

M_A_ODT0[4]
M_A_ODT1[4]

M_A_DQSP[7:0][4,13]

M_A_DQSN[7:0][4,13]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

107

119

109
108

114
121
101
103
102
104

115
110
113
197
201
202
200

116
120

136
153
170
187

137
154
171
188

135
152
169
186

98
97
96
95
92
91
90
86
89
85

84
83

80
78

79

73
74

11
28
46
63

12
29
47
64

10
27
45
62

JDIM2A

JDIM2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

4

M_A_DQ5
M_A_DQ1
M_A_DQ6
M_A_DQ7
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ13
M_A_DQ8
M_A_DQ15
M_A_DQ14
M_A_DQ12
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ21
M_A_DQ16
M_A_DQ22
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ23
M_A_DQ18
M_A_DQ29
M_A_DQ28
M_A_DQ30
M_A_DQ25
M_A_DQ27
M_A_DQ24
M_A_DQ26
M_A_DQ31
M_A_DQ36
M_A_DQ32
M_A_DQ39
M_A_DQ38
M_A_DQ33
M_A_DQ37
M_A_DQ34
M_A_DQ35
M_A_DQ41
M_A_DQ45
M_A_DQ47
M_A_DQ42
M_A_DQ40
M_A_DQ44
M_A_DQ46
M_A_DQ43
M_A_DQ48
M_A_DQ52
M_A_DQ50
M_A_DQ55
M_A_DQ53
M_A_DQ49
M_A_DQ54
M_A_DQ51
M_A_DQ57
M_A_DQ60
M_A_DQ59
M_A_DQ62
M_A_DQ56
M_A_DQ61
M_A_DQ63
M_A_DQ58

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

3

M_A_DQ[63:0] [4,13]

+3V

DDR3_DRAMRST#[4,13,15,16]

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM_A

2.48A

R15 *short_8R15 *short_8

TP7TP7

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM_A

2

+1.5V_SUS

+3V_JM8000

JDIM2B

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=8.0_RVS

DDR3-DIMM0_H=8.0_RVS

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0.75V_VTT_0

1

+0.75V_DDR_VTT

R21 *short_8R21 *short_8

DDR3-DIMM0_H=8.0_RVS

DDR3-DIMM0_H=8.0_RVS

Place these Caps near So-Dimm0.

+1.5V_SUS

+

C43

C50

C60

C60
1u/6.3V_4

1u/6.3V_4

4

C50

10u/6.3V_6

10u/6.3V_6

C54

C54
1u/6.3V_4

1u/6.3V_4

C46

C46
10u/6.3V_6

10u/6.3V_6

A A

+3V_JM8000

C47

C47

2.2u/6.3V_6

2.2u/6.3V_6

C48

C48

0.1u/16V_4

0.1u/16V_4

5

+0.75V_VTT_0

C58

C58
1u/6.3V_4

1u/6.3V_4

C59

C59
10u/6.3V_6

10u/6.3V_6

C44

C44
1u/6.3V_4

1u/6.3V_4

C61

C61

0.1u/16V_4

0.1u/16V_4

C49

C49
*10u/6.3V_6

*10u/6.3V_6

C41

C41

0.1u/16V_4

0.1u/16V_4

C43

0.1u/16V_4

0.1u/16V_4

+SMDDR_VREF_DIMM_A

C56

C56

0.1u/16V_4

0.1u/16V_4

3

C51

C51

0.1u/16V_4

0.1u/16V_4

C57

C57

2.2u/6.3V_6

2.2u/6.3V_6

C62

C62

0.1u/16V_4

0.1u/16V_4

+

C12

C12
*330u/2V_7343

*330u/2V_7343

+SMDDR_VREF_DQ0

C45

C45

0.1u/16V_4

0.1u/16V_4

C42

C42

2.2u/6.3V_6

2.2u/6.3V_6

2

modify

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

DDRIII SO-DIMM-0

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

ZYF

ZYF

ZYF

14 50Monday, November 08, 2010

14 50Monday, November 08, 2010

14 50Monday, November 08, 2010

1

1A

1A

1A

5

www.qdzbwx.com

4

3

2

1

M_B_A[15:0][4,16]

M_B_A0
M_B_A1

SA1 SA0

CHA0
CHA1

D D

CHB0
CHB1

+3V

C C

B B

0 0
0 1
1

0
11

R182 DO@10K_4R182 DO@10K_4
R189 DO@10K_4R189 DO@10K_4

M_B_DQSP[7:0][4,16]

M_B_DQSN[7:0][4,16]

M_B_BS#0[4,16]
M_B_BS#1[4,16]
M_B_BS#2[4,16]
M_B_CS#2[4]
M_B_CS#3[4]
M_B_CLK2[4]
M_B_CLK2#[4]
M_B_CLK3[4]
M_B_CLK3#[4]
M_B_CKE2[4]
M_B_CKE3[4]
M_B_CAS#[4,16]
M_B_RAS#[4,16]
M_B_WE#[4,16]

CLK_SCLK[7,13,14,16,29]

CLK_SDATA[7,13,14,16,29]

M_B_ODT2[4]
M_B_ODT3[4]

+1.5V_SUS

M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM3_SA0
DIMM3_SA1

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

JDIM4A

JDIM4A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

PC2100 DDR3 SDRAM SO-DIMM

12
29
47

64
137
154
171
188

10

27

45

62
135
152
169
186

DO@DDR3-DIMM1_H=4.0_RVS

DO@DDR3-DIMM1_H=4.0_RVS

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

Place these Caps near So-Dimm1.

M_B_DQ5
M_B_DQ1
M_B_DQ3
M_B_DQ7
M_B_DQ0
M_B_DQ6
M_B_DQ2
M_B_DQ4
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ9
M_B_DQ8
M_B_DQ10
M_B_DQ11
M_B_DQ16
M_B_DQ20
M_B_DQ22
M_B_DQ23
M_B_DQ17
M_B_DQ21
M_B_DQ19
M_B_DQ18
M_B_DQ24
M_B_DQ28
M_B_DQ26
M_B_DQ30
M_B_DQ29
M_B_DQ25
M_B_DQ27
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ39
M_B_DQ36
M_B_DQ37
M_B_DQ35
M_B_DQ38
M_B_DQ45
M_B_DQ40
M_B_DQ43
M_B_DQ47
M_B_DQ41
M_B_DQ44
M_B_DQ46
M_B_DQ42
M_B_DQ48
M_B_DQ53
M_B_DQ50
M_B_DQ55
M_B_DQ52
M_B_DQ49
M_B_DQ54
M_B_DQ51
M_B_DQ57
M_B_DQ60
M_B_DQ59
M_B_DQ63
M_B_DQ56
M_B_DQ58
M_B_DQ62
M_B_DQ61

M_B_DQ[63:0] [4,16]

+1.5V_SUS

+3V

DDR3_DRAMRST#[4,13,14,16]

+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM_B

R125

R125
10K_4

10K_4

+SMDDR_VREF_DIMM_B

R126

R126
10K_4

10K_4

+1.5V_SUS

R29

R29
10K_4

10K_4

+SMDDR_VREF_DQ1

R30

R30
10K_4

10K_4

C205

C205
470p/50V_4

470p/50V_4

2.48A

R176 *short_8R176 *short_8

TP10TP10

C69

C69
470p/50V_4

470p/50V_4

+1.5V_SUS

+3V_JM9001

+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM_B

JDIM4B

JDIM4B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DO@DDR3-DIMM1_H=4.0_RVS

DO@DDR3-DIMM1_H=4.0_RVS

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0.75V_VTT_3

+0.75V_DDR_VTT

R179 *short_8R179 *short_8

+

C132

C112

C170

C170

DO@10u/6.3V_6

DO@10u/6.3V_6

+3V_JM9001

C362

A A

C362

DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

+0.75V_VTT_3 +SMDDR_VREF_DQ1

C369

C369
DO@0.1u/16V_4

DO@0.1u/16V_4

5

C382

C382

DO@1u/6.3V_4

DO@1u/6.3V_4

C112
DO@10u/6.3V_6

DO@10u/6.3V_6

C372

C372
DO@1u/6.3V_4

DO@1u/6.3V_4

C186

C186

DO@10u/6.3V_6

DO@10u/6.3V_6

C373

C373

DO@1u/6.3V_4

DO@1u/6.3V_4

C162

C162
DO@0.1u/16V_4

DO@0.1u/16V_4

C381

C381
DO@1u/6.3V_4

DO@1u/6.3V_4

4

C150

C150

DO@0.1u/16V_4

DO@0.1u/16V_4

C385

C385

*DO@10u/6.3V_6

*DO@10u/6.3V_6

C167

C167
DO@0.1u/16V_4

DO@0.1u/16V_4

+SMDDR_VREF_DIMM_B

C132

DO@0.1u/16V_4

DO@0.1u/16V_4

C204

C204
DO@0.1u/16V_4

DO@0.1u/16V_4

C133

C133
DO@0.1u/16V_4

DO@0.1u/16V_4

C203

C203

DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

+

C138

C138

330u/2V_7343

330u/2V_7343

3

C65

C65
DO@0.1u/16V_4

DO@0.1u/16V_4

C67

C67

DO@2.2u/6.3V_6

DO@2.2u/6.3V_6

8/3 add

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRIII SO-DIMM-1

DDRIII SO-DIMM-1

DDRIII SO-DIMM-1

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZYF

ZYF

ZYF

1A

1A

1A

15 50Monday, November 08, 2010

15 50Monday, November 08, 2010

15 50Monday, November 08, 2010

1