QUANTA ZU1 Schematics

http://mycomp.su/x/

5

4

3

2

1

ZU1 SYSTEM BLOCK DIAGRAM

DVI / 7307
Chrontel

D D

(only for ezDock)

Page 21

S-VIDEO CONN

Page 20

LCD CONN

(12.1"WXGA)

Page 20

CRT Port

Page 19

C C

HDD (SATA)

Page 26

ODD (PATA)

Page 26

USB Port x 3

USB0~2

Page 27

CLOCK GENERATOR

CK505

Page 2

SDVO
TV
LVDS
VGA

SATA

PATA

USB 2.0

Azalia

Merom 479
uFCPGA

Page 3,4

FSB
667/800 Mhz

NB

Crestline
(GM965)

Page 5~11

X4 DMI interface

SB

ICH8M

Page 14~17

CPU

Thermal Sensor

Dual Channel DDR2

533/667 MHz

PCI-Express

PCI Bus

Page 3

DDRII
SO-DIMM 0
SO-DIMM 1

Page 12,13

Mini Card /
WLAN

Page 27

PCIE-0

REQ# / GNT#PCI DEVICE

AD17

REQ0# / GNT0# INTA#CB1410

AD18

REQ1# / GNT1# INTB#MR510

AD25

REQ2# / GNT2# INTE#TIAB23

RJ45

Page 18

Transformer

Giga Lan

(BCM 5787)

Page 18

Page 18

PCIE-1

InterruptsIDSEL#

CLOCK

CK505/PCI1

CK505/PCI0

CK505/PCI2

LPC

Bluetooth

USB4

Page 27

PCMCIA
Controller

Finger Printer

USB6

B B

CCD

USB8

INT SPK

Line in & MIC

A A

Page 32

Page 32

Page 29

Page 20

Page 32

HP AMPHP

Page 31

SPK AMP

Page 32

Audio Codec
(ALC268)

Page 31

uR PC8763L

Page 28

SPI ROM

Page 28 Page 29 Page 29

Touch Pad

K/B CONN

ezDockII/II+
Connector

PCIE , Lan ,1394

Ser & Par Port

PS2 , VGA, DVI

SPDIF,SM BUS

MediaBay

Express Card

PCI-Express
DVI
USB
1394*2
TV out / CRT

Audio

Super I/O
NS PC87383

Page 30

FIR

Page 30

PCIE-2

USB3

Switch

Page 20

(CB 1410)

Page 22

PCMCIA

Page 24

5V/3V (ISL6236)

VCORE(ISL6262A)

VTT 1.05V (SC411)

Card Reader
Controller

(MR510)

Page 23

Card Reader

Page 24

1.25V 1.5V 2.5V

Page 34

Discharge

Page 35

Charger (ISL6251)

Page 36

1394
Controller

(TI 43AB23)

Page 25

1394 CONN

Page 25

Page 38

Page 38

Page 39

A1A
(11/2):(1) Re-name.

(2) Gerber out

B1C
(11/29):Gerber out

C2A
(12/28):Gerber out

D3A
(2/12):Gerber out

E3A
(4/2):Gerber out

MDC 1.5

Page 31 Page 33

5

4

10/100/1G

3

Switch

Page 18

1.8V (TPS51116)

Page 37

2

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

Block Diagram

Block Diagram

Block Diagram

139Tuesday, April 10, 2007

139Tuesday, April 10, 2007

139Tuesday, April 10, 2007

of

of

1

of

3B

3B

3B

http://mycomp.su/x/

5

Clock Generator

L55

L55

+3V

BKP1608HS181-T_6

BKP1608HS181-T_6

C655

C655

C542

C542

R436

*4.7U_6

*4.7U_6

A1A:(9/24)
ICS FAE suggest to change
C542,C287 from 4.7uF to 10uF

A1A:(9/28)

D D

Reverse RC0603 footprint for EMI

PCI_CLK_51023

PCI_CLK_CB71422

PCLK_139425
PCLK_59128

PCI_CLK_SIO27,30

PCLK_ICH15

C C

A1A:(9/24) FAE : (14M_ICH and SIO_14M) signals trace should be equal length

B B

CLKUSB_4816

14M_ICH16

SIO_14M30

A1A:(9/20) change R186 value from 33ohm to 22 ohm(Intel check list 1.301)

C2A:(12/26) Base on vendor-FCE suggestion,
change C310/C299 from CH03306JBD7 (33p) to CH02706JB06(27p)

<check list>
XTAL length < 500mils

R436

10U_6

10U_6

R199

R199

R444

R444

A1A:(9/20) remove SATACLKREQ function, change R188 value from 475ohm to 22 ohm

+3V

+3V

+3V

CLK_BSEL0
CLK_BSEL1

CLK_BSEL2 FSC

A1A:(9/24) ICS FAE suggest R change from 22 to 33 ohm

C310 27P_4C310 27P_4

C299 27P_4C299 27P_4

C288 .1U_4C288 .1U_4

C294 .1U_4C294 .1U_4

0_6

0_6

C287 10U_8C287 10U_8

C540 .1U_4C540 .1U_4
C292 .1U_4C292 .1U_4

C319 .1U_4C319 .1U_4

0_6

0_6

C318 .1U_4C318 .1U_4

0_6

0_6

R429 10K_4R429 10K_4

R428 *10K_4R428 *10K_4

R427 10K_4R427 10K_4
R181 *10K_4R181 *10K_4
R182 10K_4R182 10K_4

R426 2.2K_4R426 2.2K_4

R441 10K_4R441 10K_4

R442 22_4R442 22_4

R443 22_4R443 22_4

CG_XIN

21

Y2

Y2

14.318MHZ

14.318MHZ

CG_XOUT

E3A:(3/16) Change C542 from 0805(CH6102K9A01) to 0603(CH6101M9905) base on ME request(HDD Mylar issue)

+1.25V_VDD

R188 22_4R188 22_4
R434 33_4R434 33_4
R433 33_4R433 33_4
R187 33_4R187 33_4
R431 22_4R431 22_4
R186 22_4R186 22_4

R430 33_4R430 33_4

4

VDD_CK_VDD_PCI
VDD_CK_VDD_48
VDD_CK_VDD_SRC

VDD_CK_VDD_REF

VDD_CK_VDD_SRC

VDD_CK_VDD_CPU

PCI_CLK_510_R
PCI_CLK_CB714_R
PCLK_1394_R
PCLK_591_R
PCI_CLK_SIO_R
PCLK_ICH_R
CG_XIN
CG_XOUT
FSA

3

ICS9LPRS365BGLFT

U19

<Description>

U19

<Description>

2

VDD_PCI

9

VDD_48

16

VDD_PLL3

61

VDD_REF

CK505

39
55

12
20
26
45
36
49

1
3
4
5
6

7
60
59
10
57
62

8
11
15
19
52
23
29
42
58

<check list>
(1)PCI2/TME: PU be used, the CK505 cannot over clock any of the clock for Trust Mode security purposes.

(2)PCI4/SRC5_EN: PU be used, the CK505 will be configured to use Pin37/38 to SRC5 clock.
If PD be detect at powe-on,the CK505 will setting Pin 37/38 to PCI_STOP/CUP_SOTP
(Default is setting to PCI_STOP/CUP_SOTP)

(3)PCIF5/ITP_EN: PU be used, the CK505 will be configured to use Pin46/47 to CPU ITP clock.
If PD be detect at powe-on,the CK505 will setting Pin 46/47 to SRC8
(Default is setting to SRC8)

(4)SLG8SP512 Pin 6 select Pin 17, 18 output is LCDCLK or 27 M, PD is LCDCLK, PU is 27 M ,
Pin 37, 38 will fixed be use CPU_Stop and PCI_Stop.

(5)SLG505YC64 CK505 Standar parts follow standar setting

CK505

VDD_SRC
VDD_CPU

VDD_96_IO
VDD_PLL3_IO
VDD_SRC_IO_1
VDD_SRC_IO_3
VDD_SRC_IO_2
VDD_CPU_IO

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/SRC5_EN
PCIF5/ITP_EN
XTAL_IN
XTAL_OUT
USB_48/FSA
FSB/TEST/MODE
REF0/FSC/TESTSEL
VSS_PCI

VSS_48
VSS_IO
VSS_PLL3
VSS_CPU
VSS_SRC1
VSS_SRC2
VSS_SRC3
VSS_REF

SRC5#/CPU_STOP#

CKPWRGD/PWRDWN#

SLG8SP512T: AL8SP512K05

A1A:(9/20) remove IO_VOUT

48

IO_VOUT

SRC5/PCI_STOP#

SRC8/ITP

SRC8#/ITP#

SRC10#

SRC11/CR#_H

SRC11#/CR#_G

SRC7/CR#_F

SRC7#/CR#_E

SRC3/CR#_C

SRC3#/CR#_D

SRC2/SATA

SRC2#/SATA#

SRC1/SE1

SRC1#/SE2

SRC0/DOT96

SRC0#/DOT96#

ICS9LPRS365AGLFT/ SLG8SP512T

ICS9LPRS365AGLFT/ SLG8SP512T

CGCLK_SMB

64

SCLK

CGDAT_SMB

63

SDA

38
37

CLK_CPU_BCLK_R

54

CPU0

CLK_CPU_BCLK#_R

53

CPU0#

CLK_MCH_BCLK_R

51

CPU1

CLK_MCH_BCLK#_R

50

CPU1#

47
46

CLK_PCIE_3GPLL#_R

35

CLK_PCIE_3GPLL_R

34

SRC10

PCIE_CLK_RBS_R

33

PCIE_CLK_RBS#_R

32

CLK_PCIE_EZ1_R

30

SRC9

CLK_PCIE_EZ1#_R

31

SRC9#

44
43

CLK_PCIE_ICH_R

41

SRC6

CLK_PCIE_ICH#_R

40

SRC6#

CLK_PCIE_MINI1_R

27

SRC4

CLK_PCIE_MINI1#_R

28

SRC4#

CLK_PCIE_LAN_R

24

CLK_PCIE_LAN#_R PCIE_CLKREQ#

25

CLK_PCIE_SATA_R

21

CLK_PCIE_SATA#_R

22

DREFSSCLK_R

17

DREFSSCLK#_R

18

DREFCLK_R

13

DREFCLK#_R

14
56

RP36 0X2RP36 0X2

RP35 0X2RP35 0X2

RP34 0X2RP34 0X2

R194 475_4R194 475_4
R185 475_4R185 475_4

RP29 0X2RP29 0X2

RP37 0X2RP37 0X2

RP30 0X2RP30 0X2

RP31 0X2RP31 0X2

RP32 0X2RP32 0X2

RP41 0X2RP41 0X2

RP33 0X2RP33 0X2

2

1

4

3

2

1

4

3

4

3

2

1

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

4

3

2

1

During initial power-up be used to
sample FSB speed with FSA/B/C

2

Clock Gen I2C

PDAT_SMB13,16,18,27,33

PM_STPPCI# 16
PM_STPCPU# 16

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

CLK_PCIE_3GPLL# 6
CLK_PCIE_3GPLL 6

CLK_MCH_OE# 6
PCIE_CLKREQ# 33

PCIE_CLK1+ 33
PCIE_CLK1- 33

PCLK_SMB13,16,18,27,33

Active

Pin

Low

32

Low

33

A1A:(9/24) Base on above table, SWAP SRC3 and SRC9

CLK_PCIE_ICH 15
CLK_PCIE_ICH# 15

CLK_PCIE_MINI1 27
CLK_PCIE_MINI1# 27

CLK_PCIE_LAN 18
CLK_PCIE_LAN# 18

CLK_PCIE_SATA 14
CLK_PCIE_SATA# 14

DREFSSCLK 6
DREFSSCLK# 6

DREFCLK 6

DREFCLK# 6
CK_PWRGD 16

+3V

R184 10K_4R184 10K_4

A1A:(9/24) Add PCIE_CLKREQ# PU to +3V

Clock Gen Differential IO power

C309

C320

C320
*10U_8

*10U_8

C309
*10U_8

*10U_8

C301

C301

C316

C300

C300
*10U_8

*10U_8

C316

10U_8

10U_8

.1U_4

.1U_4

0.1U close to each VDD_IO Power pin

C314

C314
.1U_4

.1U_4

C317

C317
.1U_4

.1U_4

C290

C290
.1U_4

.1U_4

1

+3V

Q21

Q21
RHU002N06

RHU002N06

3

Q20

Q20
RHU002N06

RHU002N06

3

2

+3V

2

R197

R197
10K_4

10K_4

CGDAT_SMB

1

R195

R195
10K_4

10K_4

CGCLK_SMB

1

Control signal

SRC9/9#

SRC10/10#

C2A:(12/12)change from +1.05V to +1.25V.
Because VDD_IO will drop out when high loading

C315

C315
.1U_4

.1U_4

+1.25V_VDD

C293

C293

C291

C291

.1U_4

.1U_4

.1U_4

.1U_4

L26

L26
BKP1608HS181-T_6

BKP1608HS181-T_6

<Description>

<Description>

+1.25V

CPU Clock select

CPU_BSEL03

+1.05V_CPU

CPU_BSEL13

A A

+1.05V_CPU

CPU_BSEL23

+1.05V_CPU

R180 0_4R180 0_4

R425 *56_4R425 *56_4

R179 *1K_4R179 *1K_4

R440 0_4R440 0_4

R439 *0_4R439 *0_4

R198 *1K_4R198 *1K_4

R448 0_4R448 0_4

R449 *0_4R449 *0_4

R447 *1K_4R447 *1K_4

5

CLK_BSEL0

CLK_BSEL1

MCH_BSEL0 6

MCH_BSEL1 6

A1A: (9/20) Remove 0ohm

CLK_BSEL2

MCH_BSEL2 6

C2A: (12/10) no stuff R179,R198,R447 for auto CPU frequence selection (follow ZD1,ZO1)

BSEL Frequency Select Table

FSC FSB FSA Frequency

0

0

0

1

0

1

0

1

1

1

1

0

1

0

4

0

1

1

0

01

1

1

0

266Mhz0

133Mhz

166Mhz

200Mhz

400Mhz

Reserved

100Mhz

333Mhz

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

Quanta Computer Inc.

CLK. GEN./ CK505

CLK. GEN./ CK505

CLK. GEN./ CK505

3B

3B

239Tuesday, April 10, 2007

239Tuesday, April 10, 2007

239Tuesday, April 10, 2007

1

3B

of

of

of

http://mycomp.su/x/

5

H_A#[16:3]5

CPU(HOST)

D D

C C

H_STPCLK#14

B B

+1.05V_CPU

A A

H_ADSTB0#5
H_REQ#[4:0]5

H_A#[35:17]5

R173 0_4R173 0_4

H_D#[15:0]5

H_DSTBN#05
H_DSTBP#05
H_DINV#05
H_D#[31:16]5

<Check list & CRB>
Layout note: Z=55 ohm
H_GTLREF<0.5"

R92

R92

H_DSTBN#15

1K_4

1K_4

H_DSTBP#15
H_DINV#15

T4T4
T57T57

T6T6

R90

R90
2K_6

2K_6

CPU_BSEL02
CPU_BSEL12
CPU_BSEL22

H_ADSTB1#5

H_A20M#14
H_FERR#14

H_IGNNE#14

H_INTR14

H_NMI14

H_SMI#14

T55T55
T50T50
T56T56
T53T53
T108T108
T48T48
T52T52
T5T5
T54T54
T49T49

R94 *1K_4R94 *1K_4
R93 *1K_4R93 *1K_4

C132 *.1U_4C132 *.1U_4

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_STPCLK_R#

TP_CPU_RSVD01
TP_CPU_RSVD02
TP_CPU_RSVD03
TP_CPU_RSVD04
TP_CPU_RSVD05
TP_CPU_RSVD06
TP_CPU_RSVD07
TP_CPU_RSVD08
TP_CPU_RSVD09
TP_CPU_RSVD10

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6

U30A

U30A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a
U30B

U30B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK

TDI
TDO
TMS

TRST#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

DBR#

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RESERVED

RESERVED

DATA GRP 0

DATA GRP 0

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

DSTBN[2]#
DSTBP[2]#

DINV[2]#

DATA GRP 1

DATA GRP 1

DSTBN[3]#
DSTBP[3]#

DINV[3]#

COMP[0]

MISC

MISC

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

PWRGOOD

DPWR#

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

SLP#

PSI#

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

4

H_IERR#

XDP_TCK
XDP_TDI

XDP_TMS
XDP_TRST#
XDP_DBRESET#

H_PROCHOT_R#
H_THERMDA
H_THERMDC

THERMTRIP#_PWR

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25
Y26
AA26
U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23
AE25
AF24
AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1
E5

B5
D24
D6
D7
AE6

4

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

R109 56.2_4R109 56.2_4

A1A: (9/4)
Remove XDP/ITP signals

R112 0_4R112 0_4

R107 1k_4R107 1k_4
R111 0_4R111 0_4

<check list>
Default PU 56ohm if no use.
Serial R NC, If connect to power side PU 68ohm. Serial R 2.2K

CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2

H_D#[47:32] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[63:48] 5

H_DSTBN#3 5
H_DSTBP#3 5

R89 27.4_6R89 27.4_6
R91 54.9_4R91 54.9_4
R172 27.4_6R172 27.4_6
R169 54.9_4R169 54.9_4

H_DINV#3 5

H_DPSLP# 14
H_DPWR# 5

H_CPUSLP# 5
PSI# 35

H_BREQ#0 5

+1.05V_CPU

H_INIT# 14
H_LOCK# 5
H_CPURST# 5

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

SYS_RST# 16

+1.05V_CPU

H_PROCHOT# 35

D3A:(2/28)
Implement PROCHOT method
(1)R107 was changed to 1K ohm.
(2)R111 was changed to 0 ohm.

<Check list & CRB>
Layout note: L<0.5"
COMP0/2 Z=27.4ohm
COMP1/3 Z=54.9

<CRB & Design guide>
Layout Note:Connect from
SB and daisy chain to CPU
CORE VR.Not use T
connect.(SB/VR/CPU/NB)

ICH_DPRSTP# 6,14,35

A1A: (9/22) Remove H_PWRGD_XDP

3

H_PWRGD 14

3

2

CPU Thermal monitor

A1A:(9/29) change SMBUS from MBCLK/MNDATA to 2ND_MBCLK/2ND_MBDATA

2ND_MBCLK28

2ND_MBDATA28

A1A: (9/26) Add (U27/Pin6) PU to 3V
A1A: (10/30) remove R389, already PU in ICH8

THERM_ALERT#16

+3V

Q31

Q31

2

RHU002N06

+3V

2

+3V

RHU002N06

1

Q30

Q30
RHU002N06

RHU002N06

1

R390 *0_4R390 *0_4
R381 10K_4R381 10K_4

3

3

CPU FAN

A1A: (9/26) Add CPUFAN#_ON to (U28/PIN1)
A1A: (10/23) Add Diode D39 and PU +5V for (U28/Pin1)
C2A:(12/12) Add level shift circuit (follow ZO1), remove D39,no stuff R383.
E3A:(3/14) Add C653 base in G995 failure rate issue

+5V+3V

+5V

C653

C653

2.2U_6

R383

R383
*10K_4

*10K_4

2

1

Q34

Q34
2N7002E

2N7002E

3

CPUFAN#28

PU/PD (ITP700)

+1.05V_CPU

XDP_TMS

XDP_TDI

XDP_TCK

XDP_TRST#

A1A: (9/4) <checklist>
Retain the termination resistors
on these signals even when ITP700Flex
is not implemented.

R150 150_4R150 150_4

R152 27_4R152 27_4

R151 680_4R151 680_4

2.2U_6

CPUFAN#_ON_RCPUFAN#_ON

FANPWR = 1.6*VSET

G995/Pin1- internal pull high (+5V)

1
4

Thermal Trip

DELAY_VR_PWRGOOD6,16,35

THERMTRIP#_PWR

<CRB & Design guide>
Layout Note: Thermal trip should connect to ICH8 & GMCH without T-ing
(ZS1 default NC)

2

+3V

R389

R389
*10K_4

*10K_4

THERM_ALERT#_R

U28

U28

VIN2VO

GND

/FON

GND
GND

VSET

GND

G995

G995

1

+3V

R388

R388
10K_4

10K_4

CPUFAN#_ON

3
5
6
7
8

FANSIG28

R387

R387
10K_4

10K_4

U27

U27

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

MAX6657

MAX6657

ADDRESS: 98H

TH_FAN_POWER

TH_FAN_POWER

C99

C99
10U_8

10U_8

R385

R385
200_6

200_6

LM86VCC

1

VCC

2

DXP

3

DXN

5

GND

<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard

C96

C96

C106

C106

.01U_4

.01U_4

*.01U_4

*.01U_4

+3V

R70

R70
10K_4

10K_4

CN23

CN23

1
2
345

PTI_CWY030-B0G1Z

PTI_CWY030-B0G1Z

C466

C466
.1U_4

.1U_4

C461

C461
2200P_4

2200P_4

A1A: (9/24) change FAN CONN (follow ZC3)

+1.05V_CPU

3

D19

R183

R183
*10K_4

*10K_4

SYS_SHDN# 34

PM_THRMTRIP# 6,14

1

D19
*BAS316

*BAS316

C271 *1U_6C271 *1U_6R157 39_4R157 39_4

339Tuesday, April 10, 2007

339Tuesday, April 10, 2007

339Tuesday, April 10, 2007

Q18

Q18

2

FDV301N

FDV301N

+1.05V_CPU

R174

R174

56.2_4

56.2_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

A1A: (9/26)
change name from THERM_SYS_PWR to SYS_SHDN#

Q19

Q19

2

MMBT3904

MMBT3904

1 3

R175 *0_4R175 *0_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

CPU(1 of 2)/FAN/Thermal

CPU(1 of 2)/FAN/Thermal

CPU(1 of 2)/FAN/Thermal

H_THERMDA

H_THERMDC

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

CPU(Power)

VCC_CORE

C483

C483

C481

C222

C222
10U_8

10U_8

C480

C480
10U_8

10U_8

C223

C223
10U_8

10U_8

C193

C193
10U_8

10U_8

C481
10U_8

10U_8

C482

C482
10U_8

10U_8

C500

C500
10U_8

10U_8

C504

C504
10U_8

10U_8

10U_8

10U_8

C514

C514
10U_8

10U_8

C503

C503
10U_8

10U_8

C192

C192
10U_8

10U_8

C517

D D

C C

B B

C517
10U_8

10U_8

C478

C478
10U_8

10U_8

C230

C230
10U_8

10U_8

C516

C516
10U_8

10U_8

+

+

C198

C198

330U_7343

330U_7343

A1A:(10/13) stuff C198, unstuff C217
(base on layout location)

<Check list>
Option1:330U*6(ESR=1.5m ohm aggregate , ESL=0.8nH/6) and 22U*20(ESR=3mohm typ/20 , ESL=0.6nH/20)
Option2:330U*6(ESR=1.5m ohm aggregate , ESL=1.8nH/6) and 22U*32(ESR=3mohm typ/32 , ESL=0.6nH/32)

C499

C499
10U_8

10U_8

C502

C502
10U_8

10U_8

C231

C231
10U_8

10U_8

C173

C173
10U_8

10U_8

+

+

C217

C217

*330U_7343

*330U_7343

C479

C479
10U_8

10U_8

C171

C171
10U_8

10U_8

C501

C501
10U_8

10U_8

C484

C484
10U_8

10U_8

CH61001ME96

CH61001ME96
<Description>

<Description>

+

+

C197

C197

330U_7343

330U_7343

C515

C515

C513

C513

10U_8

10U_8

10U_8

10U_8

C191

C191

C172

C172

10U_8

10U_8

10U_8

10U_8

DESIGN GUIDE
CHANGE FROM 22UF *20 TO 10UF *32

C221

C221
10U_8

10U_8

C512

C512
10U_8

10U_8

4

C498

C498
10U_8

10U_8

C521

C521
10U_8

10U_8

U30C

U30C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

.

.

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

3

CPU_G21
CPU_V6

+VCCA_PROC

<CRB>
R for test only

R108 0_4R108 0_4
R159 0_4R159 0_4

H_VID0 35
H_VID1 35
H_VID2 35
H_VID3 35
H_VID4 35
H_VID5 35
H_VID6 35

2

<REV.NO. 0.5/REF.NO.19343>
Ivcc Max 52A
Ivccp Max 6A(VCCP supply before Vcc stable)

Max 2A(VCCP supply after Vcc stable)
Ivcca Max 130mA

+1.05V_CPU

C154

C250

C250
.1U_6

.1U_6

+

+

VCC_CORE

R156

R156
100_6

100_6

R160

R160
100_6

100_6

C280

C280
330U_7343

330U_7343

C154
.1U_6

.1U_6

<Check list>
ESR=12m ohm

<CRB>
.01U near to B26 ball

C472

C472
.01U_4

.01U_4

<Demo board>
Routing 27.4ohm with 50mils spacing
PU/PD near to CPU 1"

C251

C251

C153

C153

.1U_6

.1U_6

.1U_6

.1U_6

R176 0_1210R176 0_1210

R386 0_6R386 0_6

C471

C471
10U_8

10U_8

VCCSENSE 35

VSSSENSE 35

C249

C249
.1U_6

.1U_6

+1.05V+1.05V_CPU

+1.5V

C152

C152
.1U_6

.1U_6

1

U30D

U30D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.

A A

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

CPU(2 of 2)

CPU(2 of 2)

CPU(2 of 2)

3B

3B

439Tuesday, April 10, 2007

439Tuesday, April 10, 2007

439Tuesday, April 10, 2007

1

3B

of

of

of

5

4

3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

http://mycomp.su/x/

5

D3A:(2/1) Change 965GM from ES sample to QS sample

NB(HOST)

D D

C C

B B

A A

A1A:(9/20) remove R74 (0 ohm)

Change U29 P/N from AJ0QN120T37 to AJ0QP200T09

+1.05V_GMCH

R86

R86
221_4

221_4

H_SWING

C137

C137

R85

R85
100_4

100_4

R95

R95

24.9_4

24.9_4

+1.05V_GMCH

R87

R87

54.9_4

54.9_4

+1.05V_GMCH

R88

R88

54.9_4

54.9_4

5

H_RCOMP

H_SCOMP

H_SCOMP#

<check list>

0.1U close to B3

.1U_4

.1U_4

<check list>
10:20 mils(Width:Spacing)

<check list>
Impedance 55ohm

<check list>
Impedance 55ohm

+1.05V_GMCH

R392

R392
1K_4

1K_4

R391

R391
2K_4

2K_4

C473

C473
.1U_4

.1U_4

H_CPURST#3

<check list>

0.1U close to B9

4

U29A

M10
N12

P13

W10

AD12

AE3
AD9
AC9

AC7
AC14
AD11
AC11

AB2

AD7

AB1

AC6

AE2

AC5

AG3

AJ9

AH8

AJ14

AE9
AE11
AH12

AJ5

AH5

AJ6

AE7

AJ7
AJ2

AE5

AJ3

AH2
AH13

E2

G2
G7
M6
H7
H3
G4

F3
N8
H2

N9
H5

K9
M2

Y8

V4
M3

J1
N5
N3

W6
W9

N2

Y7
Y9
P4

W3

N1

Y3

B3

C2

W1
W2

B6
E5

B9
A9

U29A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE_1p0

CRESTLINE_1p0

H_D#[63:0]3

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_AVREF
H_DVREF

3

HOST

HOST

3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1

H_REQ#_2
H_REQ#_3

H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

H_A#[35:3] 3

H_A#[35:32] are not supported in
Calero Interposer
Crestline support 36 bit address

H_ADS# 3
H_ADSTB0# 3
H_ADSTB1# 3
H_BNR# 3
H_BPRI# 3
H_BREQ#0 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3:0] 3

H_DSTBN#[3:0] 3

H_DSTBP#[3:0] 3

H_REQ#[4:0] 3

H_RS#[2:0] 3H_CPUSLP#3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH HOST(1 of 7)

GMCH HOST(1 of 7)

GMCH HOST(1 of 7)

Date: Sheet

Date: Sheet

2

Date: Sheet

1

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

of

of

of

539Tuesday, April 10, 2007

539Tuesday, April 10, 2007

539Tuesday, April 10, 2007

1

3B

3B

3B

http://mycomp.su/x/

5

MCH_RSVD1

T39T39

MCH_RSVD2

T46T46

MCH_RSVD3

T36T36

MCH_RSVD4

T43T43

MCH_RSVD5

T9T9

MCH_RSVD6

T12T12

MCH_RSVD7

T8T8

MCH_RSVD8

T11T11

MCH_RSVD9

T10T10

MCH_RSVD10

T45T45

MCH_RSVD11

T42T42

MCH_RSVD12

T38T38

MCH_RSVD13

D D

M_A_A1412,13
M_B_A1412,13

C C

MCH_BSEL02
MCH_BSEL12
MCH_BSEL22

MCH_CFG_511

MCH_CFG_911

MCH_CFG_1211
MCH_CFG_1311

MCH_CFG_1611

MCH_CFG_1911
MCH_CFG_2011

B B

A A

PM_BMBUSY#16
ICH_DPRSTP#3,14,35
PM_EXTTS#013
PM_EXTTS#113

DELAY_VR_PWRGOOD3,16,35

PLTRST#_NB15

PM_THRMTRIP#3,14

PM_DPRSLPVR16,35

T40T40

MCH_RSVD14

T21T21

C157 .1U_4C157 .1U_4

MCH_RSVD20

T7T7

MCH_RSVD21

T103T103

MCH_RSVD22

T84T84

MCH_RSVD23

T86T86

MCH_RSVD24

T13T13

MCH_RSVD25

T25T25

MCH_RSVD26

T83T83

MCH_RSVD27

T82T82

MCH_RSVD28

T30T30

MCH_RSVD29

T15T15

MCH_RSVD30

T33T33

MCH_RSVD31

T17T17

MCH_RSVD34

T44T44

MCH_RSVD35

T18T18

MCH_RSVD36

T85T85

MCH_RSVD37

T98T98

MCH_RSVD38

T51T51

MCH_RSVD39

T95T95

MCH_RSVD40

T96T96

MCH_RSVD41

T90T90

MCH_RSVD42

T91T91

MCH_RSVD43

T89T89

MCH_RSVD44

T88T88

MCH_RSVD45

T87T87

C2A:(12/26) Intel schematic Rev1.5:
change ball-C48 from RSVD48 to LVDSA_DATA#_3
change ball-D47 from RSVD47 to LVDSA_DATA_3
change ball-B44 from RSVD39 to LVDSB_DATA#_3
change ball-C44 from RSVD40 to LVDSB_DATA_3

MCH_CFG_3

T24T24

MCH_CFG_4

T26T26

MCH_CFG_6

T19T19

MCH_CFG_7

T27T27

MCH_CFG_8

T22T22

MCH_CFG_10

T32T32

MCH_CFG_11

T23T23

MCH_CFG_14

T20T20

MCH_CFG_15

T28T28

MCH_CFG_17

T29T29

MCH_CFG_18

T34T34

PM_BMBUSY#_R
ICH_DPRSTP#_R

PM_EXTTS#1_R

RST_IN#_MCH
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH

TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16

R105

R105
20_4

20_4

M_RCOMP

+1.8VSUS_GMCH

M_RCOMP#

5

R158 0_4R158 0_4
R424 0_4R424 0_4

R147 0_4R147 0_4
R115 100_4R115 100_4

R116 *0_4R116 *0_4
R149 0_4R149 0_4

T105T105
T106T106
T107T107
T102T102
T99T99
T80T80
T78T78
T76T76
T75T75
T77T77
T81T81
T104T104
T100T100
T101T101
T97T97
T79T79

R106

R106
20_4

20_4

AR12
AR13

AM12

AN13
AR37

AM36

AL36

AM37

BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39

AW20

BK20

AW49

AV20

BJ51
BK51
BK50
BL50
BL49

P36
P37
R35
N35

J12

D20

H10
B51

C48
D47
B44
C44
A35
B37
B36
B34
C34

P27
N27
N24
C21
C23
F23
N23

G23

J20
C20
R24

L23

J23
E23
E20
K23
M20
M24

L32

N33

L35

G41

L39

L36

J36

N20
G36

BL3
BL2
BK1

BJ1

E1

A5
C51
B50
A50
A49
BK2

U29B

U29B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16

CRESTLINE_1p0

CRESTLINE_1p0

+3V

4

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

SM_CK#_0
SM_CK#_1
SM_CK#_3

SM_CK#_4
SM_CKE_0

SM_CKE_1
SM_CKE_3
SM_CKE_4

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF_0

DDR MUXINGCLK

DDR MUXINGCLK

SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2

CFGRSVD

CFGRSVD

PM

PM

NC

NC

R423 10K_4R423 10K_4
R421 10K_4R421 10K_4
R419 10K_4R419 10K_4

DMI_TXN_3
DMI_TXP_0

DMI_TXP_1

DMI

DMI

DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

ME

ME

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

MISC

MISC

TEST_1
TEST_2

CLK_MCH_OE#
PM_EXTTS#0
PM_EXTTS#1

4

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BL15
BK14

BK31
BL31

SMDDR_VREF_MCH

AR49
AW4

B42
C42
H48
H47

K44
K45

DMI_TXN0

AN47

DMI_TXN1

AJ38

DMI_TXN2

AN42

DMI_TXN3

AN46

DMI_TXP0

AM47

DMI_TXP1

AJ39

DMI_TXP2

AN41

DMI_TXP3

AN45

DMI_RXN0

AJ46

DMI_RXN1

AJ41

DMI_RXN2

AM40

DMI_RXN3

AM44

DMI_RXP0

AJ47

DMI_RXP1

AJ42

DMI_RXP2

AM39

DMI_RXP3

AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49

+1.25V_CL_VREF

AM50

H35
K36

CLK_MCH_OE#

G39
G40

GMCH_TEST1

A37

GMCH_TEST2

R32

+1.8VSUS_GMCH

M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR3 13
M_CLK_DDR4 13

M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#3 13
M_CLK_DDR#4 13

M_CKE0 12,13
M_CKE1 12,13
M_CKE3 12,13
M_CKE4 12,13

M_CS#0 12,13
M_CS#1 12,13
M_CS#2 12,13
M_CS#3 12,13

M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

R84 *10K_6R84 *10K_6
R82 *10K_6R82 *10K_6

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

T37T37
T93T93
T92T92
T94T94
T41T41

R133 1K_4R133 1K_4

SMDDR_VREF

R83 0_6R83 0_6

+1.8VSUS_GMCH

DREFCLK 2
DREFCLK# 2
DREFSSCLK 2
DREFSSCLK# 2

CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2

DMI_TXN[3:0] 15

DMI_TXP[3:0] 15

DMI_RXN[3:0] 15

DMI_RXP[3:0] 15

R411 1.3K_6R411 1.3K_6

CL_CLK0 16
CL_DATA0 16
MPWROK 16,28
CL_RST#0 16

SDVO_CTRLCLK 21
SDVO_CTRLDATA 21

CLK_MCH_OE# 2
MCH_ICH_SYNC# 16

R143 0_4R143 0_4
R129 20K_4R129 20K_4

R114

R114

3.01K_4

3.01K_4

R123

R123
1K_4

1K_4

3

INT_LVDS_EDIDCLK20
INT_LVDS_EDIDDATA20
INT_LVDS_DIGON20

+3V

INT_CRT_DDCCLK19
INT_CRT_DDCDAT19

SM_RCOMP_VOH

C207

C207
.01U_4

.01U_4

SM_RCOMP_VOL

C194

C194
.01U_4

.01U_4

3

INT_LVDS_PWM20
INT_LVDS_BLON20

INT_TXLCLKOUT-20
INT_TXLCLKOUT+20

C246

C246
.1U_4

.1U_4

INT_TXLOUT0-20
INT_TXLOUT1-20
INT_TXLOUT2-20

INT_TXLOUT0+20
INT_TXLOUT1+20
INT_TXLOUT2+20

INT_TV_COMP20

INT_TV_Y/G20
INT_TV_C/R20

INT_CRT_BLU19
INT_CRT_GRN19
INT_CRT_RED19

INT_HSYNC19
INT_VSYNC19

+3V

R148 2.4K_4R148 2.4K_4

R417 2.2K_4R417 2.2K_4
R415 2.2K_4R415 2.2K_4

+1.25V_AXD

R155

R155
1K_4

1K_4

R161

R161
392_6

392_6

C177

C177

2.2U_6

2.2U_6

C180

C180

2.2U_6

2.2U_6

R146 10K_4R146 10K_4
R154 10K_4R154 10K_4

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R

TV_DCONSEL_0
TV_DCONSEL_1

R153 *0_4R153 *0_4
R145 *0_4R145 *0_4

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

R416 30_4R416 30_4
R418 30_4R418 30_4

R117 150_4R117 150_4
R118 150_4R118 150_4
R113 150_4R113 150_4

R119 150_4R119 150_4
R122 150_4R122 150_4
R126 150_4R126 150_4

T47T47

LVDS_IBG

HSYNC1
CRTIREF
VSYNC1

U29C

U29C

J40
H39
E39
E40
C37
D35
K40

L41
L43
N41
N40
D46
C45
D44
E42

G51
E51
F49

G50
E50
F48

G44
B47
B45

E44
A47
A45

E27
G27
K27

F27
J27
L27

M35

P33

H32
G32
K29
J29
F29
E29

K33
G35
F33
C32
E33

CRESTLINE_1p0

CRESTLINE_1p0

2

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2

TVA_DAC
TVB_DAC
TVC_DAC

TVA_RTN
TVB_RTN
TVC_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

2

1

EXP_A_COMPX

N43

PEG_COMPI

PEG_COMPO

LVDS

LVDS

TV VGA

TV VGA

PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

C_PEG_TXP0
C_PEG_TXN0
C_PEG_TXP1
C_PEG_TXN1
C_PEG_TXP2
C_PEG_TXN2
C_PEG_TXP3
C_PEG_TXN3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

M43

J51

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

GMCH DMI/VIDEO(2 of 7)

GMCH DMI/VIDEO(2 of 7)

GMCH DMI/VIDEO(2 of 7)

PEG_RXN1

L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

J50

PEG_RXP1

L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

C_PEG_TXN0

N45

C_PEG_TXN1

U39

C_PEG_TXN2

U47

C_PEG_TXN3

N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

C_PEG_TXP0

M45

C_PEG_TXP1

T38

C_PEG_TXP2

T46

C_PEG_TXP3

N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

C270 .1U_4C270 .1U_4
C272 .1U_4C272 .1U_4
C278 .1U_4C278 .1U_4
C277 .1U_4C277 .1U_4
C276 .1U_4C276 .1U_4
C275 .1U_4C275 .1U_4
C273 .1U_4C273 .1U_4
C274 .1U_4C274 .1U_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

R164 24.9_4R164 24.9_4

PEG_RXN1 21

PEG_RXP1 21

1

+VCC_PEG

SDVOB_R+ 21
SDVOB_R- 21
SDVOB_G+ 21
SDVOB_G- 21
SDVOB_B+ 21
SDVOB_B- 21
SDVOB_CLK+ 21
SDVOB_CLK- 21

639Tuesday, April 10, 2007

639Tuesday, April 10, 2007

639Tuesday, April 10, 2007

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

NB(Memory controller)

4

3

2

1

M_A_DQ[63:0]13

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AR43

AW44

BA45
AY46
AR41
AR45
AT42

AW47

BB45
BF48
BG47

BJ45
BB47
BG50
BH49
BE45

AW43

BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40

AW40

AT39

AW36
AW41

AY41
AV38
AT38
AV13
AT13

AW11

AV11
AU15
AT11
BA13
BA11
BE10
BD10

BD8
AY9

BG10

AW9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AM8
AN10

AT9
AN9

AM9
AN11

U29D

U29D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

BB19

SA_BS_0

BK19

SA_BS_1

BF29

SA_BS_2

BL17

SA_CAS#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_WE#

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP_SA_RCVEN#

M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13

M_A_DM[7:0] 13

M_A_DQS[7:0] 13

M_A_DQS#[7:0] 13

M_A_A[13:0] 12,13

M_A_RAS# 12,13

T31T31

M_A_WE# 12,13

M_B_DQ[63:0]13

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50
BJ44

BJ43
BL43
BK47
BK49
BK43
BK42

BJ41
BL41

BJ37

BJ36
BK41

BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12

BJ10

BL9
BK5
BL5
BK9

BK10

BJ8
BJ6

BF4
BH5
BG1
BC2
BK3
BE4
BD3

BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

U29E

U29E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

AY17

SB_BS_0

BG18

SB_BS_1

BG36

SB_BS_2

BE17

SB_CAS#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

TP_SB_RCVEN#

M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13

M_B_DM[7:0] 13

M_B_DQS[7:0] 13

M_B_DQS#[7:0] 13

M_B_A[13:0] 12,13

M_B_RAS# 12,13

T14T14

M_B_WE# 12,13

A A

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

MCH DDR(3 of 7)

MCH DDR(3 of 7)

MCH DDR(3 of 7)

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

739Tuesday, April 10, 2007

739Tuesday, April 10, 2007

739Tuesday, April 10, 2007

of

of

1

of

3B

3B

3B

http://mycomp.su/x/

5

NB(Power-1)

+1.05V_VCC_GMCH

U29G

U29G

AT35

VCC_1

AT34

VCC_2

AH28

VCC_3

AC32

VCC_5

D D

R127 0_4R127 0_4

+1.8VSUS

C210

C210

330U_7343

330U_7343

.1U_4

.1U_4

C C

B B

A A

5

+1.05V_VCC_GMCH_VCC13

+

+

C144

C144

C215

C215
22U_8

22U_8

C232

C232
22U_8

22U_8

AC31
AK32

AJ31

AJ28
AH32
AH31
AH29

AF32

R30

+1.8VSUS_GMCH

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35

BF33

BF34
BG32
BG33
BG35
BH32
BH34
BH35

BJ32

BJ33

BJ34
BK32
BK33
BK34
BK35

BL33
AU30

+VGFX_CORE_INT

R20

T14
W13
W14

Y12

AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28

AF21

AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31

AJ20
AN14

VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

CRESTLINE_1p0

CRESTLINE_1p0

4

VCC CORE

VCC CORE

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

4

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

+VGFX_CORE_INT

+1.05V

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6

VCCSM_LF7

3

R136 10_4R136 10_4

A1A(10/23): Short R116

+1.05V

C145

C145
.1U_4

.1U_4

3

VCCGFPLLOW

ADD 10ohm
THEY ONLY USE IN UMA (GM OR GML)

A1A:(9/26) Change +VCC_CFXCORE_INT to +1.05V

A1A(10/23): Short R115,R117

+

+

C464

C464

330U_7343

330U_7343

C147

C147
.1U_4

.1U_4

D13 PDZ5.6BD13 PDZ5.6B

+

+

C225

C225

C95

C95

22U_8

22U_8

330U_7343

330U_7343

+

+

C463

C463

C156

C156

330U_7343

330U_7343

.47U_6

.47U_6

+1.05V

C188

C188
22U_8

22U_8

C136

C136

C158

C158

.22U_4

.22U_4

.22U_4

.22U_4

C238

C238
.47U_6

.47U_6

21

C216

C216

C199

C199

.22U_4

.22U_4

.22U_4

.22U_4

+VGFX_CORE_INT

C164

C164

C150

C150

10U_8

10U_8

1U_6

1U_6

C179

C179
.22U_4

.22U_4

C224

C224
1U_6

1U_6

2

+1.05V_VCC_GMCH+3V_VCCSYNC

+1.05V_VCC_GMCH

C208

C208
.1U_4

.1U_4

C182

C182

C151

C151

22U_8

22U_8

.1U_4

.1U_4

C206

C206

C186

C186

.22U_4

.22U_4

.1U_4

.1U_4

C252

C252
1U_6

1U_6

2

C178

C178
.1U_4

.1U_4

C155

C155
.1U_4

.1U_4

1

U29F

U29F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

C189

C189
.1U_4

.1U_4

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE_1p0

CRESTLINE_1p0

C2A:(12/12)Change Crestline VCC_AXM to 1.25V,
reference to SR ww48 MoW.
reserved 0 ohm resister (R576)

C2A:(12/12)Change Crestline VCC_AXM from +1.25V to +1.05V,
reserved 0 ohm resister (R578)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH Power-1(4 of 7)

GMCH Power-1(4 of 7)

GMCH Power-1(4 of 7)

Date: Sheet

Date: Sheet

Date: Sheet of

VCC NCTF

VCC NCTF

POWER

POWER

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15

VSS NCTF

VSS NCTF

VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VSS SCBVCC AXM

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

VCC AXM NCTF

VCC AXM NCTF

1

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

A3
B2
C1
BL1
BL51
A51

+1.25V+1.05V

R578

R578

R576

R576

0_6

0_6

*0_6

*0_6

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

3B

3B

839Tuesday, April 10, 2007

839Tuesday, April 10, 2007

839Tuesday, April 10, 2007

3B

of

of

http://mycomp.su/x/

5

NB(Power-2)

<Description>

<Description>

L53 10UH_8

+1.25V

D D

+1.25V

+1.25V

C C

+3V

B B

+1.5V

A A

A1A:(10/18)
INTEL CRB VCCD_QDAC Filter Modification:
change L13 to R125(100ohm),
change R145(*0 ohm) to C507(1uF)

D3A:(01/02)
R125 shortage issue, Add 2nd source CS11003F953

D3A:(2/13)
Change R125 from CS11003B900 (100 ohm 0.1%) to CS11003F953(100 ohm 1%)

L53 10UH_8

+

+

L25 10UH_8L25 10UH_8

+

+

<Description>

<Description>

C465 22U_8C465 22U_8

B1D:(12/9) change C143 from CH71002MJC8 to CH7102MT804 (Z-limit issue)

L51

L51
BKP1608HS181-T_6

BKP1608HS181-T_6

C485

C485
22U_8

22U_8

C492

C492
10U_8

10U_8

R137 0_6R137 0_6

R125 100_6R125 100_6

5

C262

C262

C527

C527

.1U_4

.1U_4

470U_7343

470U_7343

C528

C528

C264

C264

470U_7343

470U_7343

.1U_4

.1U_4

L49 BKP1608HS181-T_6

L49 BKP1608HS181-T_6

L50 BKP1608HS181-T_6L50 BKP1608HS181-T_6

V1.25M_MPLL_RC

+1.25V

C489

C489
.1U_4

.1U_4

C488

C488
.1U_4

.1U_4

C494

C494
.1U_4

.1U_4

+3V_TV_DAC

C196

C196
.1U_4

.1U_4

C143

C143

+

+

100U_7343

100U_7343

C487

C487
22N_4

22N_4

C493

C493
22N_4

22N_4

C495

C495
22N_4

22N_4

C214

C214
22N_4

22N_4

C519

C519
.1U_4

.1U_4

R130 0_6R130 0_6

+3V

<FAE>
INT VGA disable
VCCSYNC connect to GND

L18 BKP1608HS181-T_6L18 BKP1608HS181-T_6

+3V

R124 0_6R124 0_6

R404

R404
*0_4

*0_4

R402

R402
*0_4

*0_4

R401

R401
*0_4

*0_4

C511

C511
22N_4

22N_4

R128 0_6R128 0_6

C138

C138
.1U_4

.1U_4

C133

C133
.1U_4

.1U_4

C507

C507
1U_6

1U_6

+3V_TV_DAC

C469

C469
22U_8

22U_8

R384

R384

0.5_6

0.5_6

R120 0_6R120 0_6

+1.25V

C165

C165
*22U_8

*22U_8

4

+3V_VCCSYNC

C205

C205
.1U_4

.1U_4

C226

C226
*22U_8

*22U_8

R166 0_8R166 0_8

+3V

C159

C159

4.7U_6

4.7U_6

C200

C200

C203

C203

*1U_6

*1U_6

*1U_6

*1U_6

R131 *0_4R131 *0_4
R138 0_6R138 0_6

+1.25V

L24 BKP1608HS181-T_6L24 BKP1608HS181-T_6

+1.25V

+V1.25S_PEGPLL_FB

C263

C263
10U_8

10U_8

R163 0_6R163 0_6

+1.8VSUS

4

C522

C522

C220

C220

.1U_4

.1U_4

22N_4

22N_4

C505

C505

C508

C508

.1U_4

.1U_4

22N_4

22N_4

C176

C176
22U_8

22U_8

C213

C213
22U_8

22U_8

R81 0_6R81 0_6

C244

C244
1000P_4

1000P_4

C266

C266
.1U_4

.1U_4

C168

C168
1U_6

1U_6

C201

C201
.1U_4

.1U_4

C128

C128
.1U_4

.1U_4

R168

R168
1_8

1_8

C257

C257
1U_6

1U_6

R412

R412
*0_4

*0_4

+3V_VCCA_CRT_DAC

R132

R132
*0_4

*0_4

+3V_VCCA_DAC_BG

+1.25V_VCCA_DPLLA
+1.25V_VCCA_DPLLB
+1.25VM_VCCA_HPLL
+1.25VM_VCCA_MPLL

+1.8VSUS_VCC_TX_LVDS

+3V_VCCA_PEG_BG

+1.25V_VCCD_PEG_PLL

+1.25VM_VCCA_SM

+1.25VM_VCCA_SM_CK

+1.5V_VCCD_CRT
+1.5V_VCCD_TVDAC

+1.5V_VCCD_QDAC

+1.25VM_MCH_VCCD_HPLL

+1.25V_VCCD_PEG_PLL

C268

C268
.1U_4

.1U_4

+1.8V_VCCD_LVDS

C243

C243
*10U_8

*10U_8

3

CRT/TV Disable/Enable guideline

EnableBall EnableDisable DisableBall

VCCA_CRT

3.3V GND
VCCD_CRT
VCCDQ_CRT

1.5V
VCCA_A_TVO

3.3V
VCCA_B_TVO VCC_SYNC

3.3V

AW18

AV19
AU19
AU18
AU17

AT22
AT21
AT19
AT18
AT17
AR17
AR16

BC29
BB29

C259

C259
.1U_4

.1U_4

GND
GND
GND
GND

U29H

U29H

J32

VCCSYNC

A33

VCCA_CRT_DAC_1

B33

VCCA_CRT_DAC_2

A30

VCCA_DAC_BG

B32

VSSA_DAC_BG

B49

VCCA_DPLLA

H49

VCCA_DPLLB

AL2

VCCA_HPLL

AM2

VCCA_MPLL

A41

VCCA_LVDS

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

U51

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

VCCA_SM_CK_1
VCCA_SM_CK_2

C25

VCCA_TVA_DAC_1

B25

VCCA_TVA_DAC_2

C27

VCCA_TVB_DAC_1

B27

VCCA_TVB_DAC_2

B28

VCCA_TVC_DAC_1

A28

VCCA_TVC_DAC_2

M32

VCCD_CRT

L29

VCCD_TVDAC

N28

VCCD_QDAC

AN2

VCCD_HPLL

U48

VCCD_PEG_PLL

J41

VCCD_LVDS_1

H42

VCCD_LVDS_2

CRESTLINE_1p0

CRESTLINE_1p0

VCCA_C_TVO
VCCD_TVO
VCCABG_DAC
VSSABG_DAC

+1.05V

+3V

3

3.3V

1.5V1.5V

3.3V
GND

3.3V

CRTPLLA PEGA SMTV

CRTPLLA PEGA SMTV

POWER

POWER

A CK A LVDS

A CK A LVDS

D TV/CRTLVDS

D TV/CRTLVDS

D8 PDZ5.6BD8 PDZ5.6B

2 1

<CRB>
+1.25V AND +1.25M shall be
+1.5V for Calero Interposer

GND

1.5V
GND
GND
GND

AXD

AXD

VCC_AXD_NCTF

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

PEG

PEG

VCC_RXR_DMI_1
VCC_RXR_DMI_2

DMI

DMI

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13

VTT

VTT

VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

VCC_DMI

VCC_HV_1
VCC_HV_2

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VTTLF1
VTTLF2
VTTLF3

VTTLF

VTTLF

+1.05V_SD

+1.05V_GMCH

U13
U12
U11
U9
U8
U7
U5
U3

+1.25V_AXD

U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

+1.25V_VCC_AXF

B23
B21
A21

+1.25V_VCC_DMI

AJ50

+1.8VSUS_VCC_SM_CK

BK24
BK23
BJ24
BJ23

+1.8VSUS_VCC_TX_LVDS

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

C129

C129
.47U_4

.47U_4

R64

R64
10_4

10_4

R67 0_4R67 0_4

2

LVDS Disable/Enable guideline

External VGA with EV@part,Internal VGA with IV@ part

Signal
VCCD_LVDS
VCCA_LVDS
VCCTX_LVDS

+3V_VCC_HV

C470

C470

C146

C146

.47U_4

.47U_4

.47U_4

.47U_4

2

If SDVO Disable
LVDS Disable

GND
GND

EXTERNAL INTERNAL

C148

C148

C126

C126

C142

C142

4.7U_8

4.7U_8

C187

C187
1U_6

1U_6

C170

C170
.1U_4

.1U_4

A1A: (9/20) Remove R138 0 ohm

+3V_VCC_HV

C112

C112
.1U_4

.1U_4

2.2U_8

2.2U_8

4.7U_8

4.7U_8

R121 0_6R121 0_6

C195

C195
*22U_8

*22U_8

R405 0_6R405 0_6

C477

C477

C475

C475

1U_6

1U_6

10U_8

10U_8

R165 0_6R165 0_6

C265

C265
.1U_4

.1U_4

L19 1UH_8L19 1UH_8

C211

C211

R134 1_6R134 1_6

22U_8

22U_8

+VCC_PEG

A1A: (9/20) Remove +VCC_RXR_DMI

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH Power-2(5 of 7)

GMCH Power-2(5 of 7)

GMCH Power-2(5 of 7)

Date: Sheet

Date: Sheet

Date: Sheet

If SDVO enable
LVDS Disable

1.8V
GND
GNDGND

C134

C134
.47U_6

.47U_6

C284

C284
10U_8

10U_8

1

If SDVO enable
LVDS enable

1.8V

1.8V

1.8V

A1A(10/23): Short R122

+

+

C462

C462
330U_7343

330U_7343

+1.25V

+1.25V

+1.25V

+1.8VSUS_GMCH

+V1.8_SMCK_RC

C239

C239
1000P_4

1000P_4

+

+

C529

C529
220U_7343

220U_7343

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

C233 22U_8C233 22U_8

L21 1UH_8L21 1UH_8

+

+

C526

C526
220U_7343

220U_7343

L54 91nHL54 91nH

<FAE>
VCC_RXR_DMI and VCC_PEG
connect to+1.05V

939Tuesday, April 10, 2007

939Tuesday, April 10, 2007

939Tuesday, April 10, 2007

1

+1.05V

+1.05V

of

of

of

+1.8VSUS

3B

3B

3B

http://mycomp.su/x/

5

4

3

2

1

NB(Power-3)

U29I

U29I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

D D

C C

B B

A A

5

AB23
AB26
AB28
AB31
AC10
AC13

AC3
AC39
AC43
AC47

AD1
AD21
AD26
AD29

AD3
AD41
AD45
AD49

AD5
AD50

AD8
AE10
AE14

AE6

AF20
AF23
AF24
AF31

AG2
AG38
AG43
AG47
AG50

AH3
AH40
AH41

AH7

AH9

AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45

AJ49
AK20
AK21
AK26
AK28
AK31
AK51

AM11
AM13

AM3

AM4
AM41
AM45

AN1
AN38
AN39
AN43

AN5

AN7

AP4
AP48
AP50
AR11

AR2
AR39
AR44
AR47

AR7

AT10
AT14
AT41
AT49

AU1
AU23
AU29

AU3
AU36
AU49
AU51
AV39
AV48

AW1
AW12
AW16

AL1

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CRESTLINE_1p0

CRESTLINE_1p0

VSS

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

4

3

U29J

U29J

C46
C50

C7
D13
D24

D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36

F4
F40
F50

G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48

G8

H24
H28

H4

H45
J11
J16

J2
J24
J28
J33
J35
J39

K12
K47

K8

L1
L17
L20
L24
L28

L3
L33
L49

M28
M42
M46
M49

M5

M50

M9
N11
N14
N17
N29
N32
N36
N39
N44
N49

N7
P19

P2

P23

P3
P50
R49
T39
T43
T47
U41
U45
U50

V2

V3

CRESTLINE_1p0

CRESTLINE_1p0

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243

VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286

VSS

VSS

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305

VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

VSS_GMCH_T29
VSS_GMCH_T31
VSS_GMCH_T33
VSS_GMCH_R28

2

R409 0_4R409 0_4
R413 0_4R413 0_4
R414 0_4R414 0_4
R410 0_4R410 0_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH Power-3(6 of 7)

GMCH Power-3(6 of 7)

GMCH Power-3(6 of 7)

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

10 39Tuesday, April 10, 2007

10 39Tuesday, April 10, 2007

10 39Tuesday, April 10, 2007

1

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

4

3

2

1

Strap table

All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up

CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be left NC Pin

Pin Name Strap description

D D

CFG[2:0]

CFG[4:3]

CFG5

CFG6

CFG7

CFG8

CFG9

CFG[11:10]

C C

CFG[13:12]

CFG[15:14]

CFG16

CFG[18:17]

SDVO_CTRLDATA

CFG19

CFG20

B B

DMI X2 Select

MCH_CFG_5 Low = DMIX2

High = IDMIX4(Default)

FSB Dynamic ODT

MCH_CFG_16 Low = ODT Disable

A A

MCH_CFG_166

High = ODT Enable(Default)

5

FSB Frequency Select

Reserved

DMI X2 Select

Reserved

CPU Strap

Low power PCI Express

PCI Express Graphics Lane Reversal

Reserved

XOR/ALLZ

Reserved

FSB Dynamic ODT

Reserved

SDVO Present

DMI Lane Reversal

SDVO/PCIe concurrent

DMI Lane Reversal

MCH_CFG_19 Low = Normal operation(Default)

R394

R394
*4.02K_4

*4.02K_4

MCH_CFG_196

SDVO/PCIE Concurrent operation

MCH_CFG_20

R393

R393
*4.02K_4

*4.02K_4

MCH_CFG_206

High = Reverse Lane

+3V

R420

R420
*4.02K_4

*4.02K_4

Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port

+3V

R422

R422
*4.02K_4

*4.02K_4

4

Configuration

010 = FSB 800MHz
011 = FSB 667MHz

0 = DMI X2
1 = DMI X4(Default)

0 = Reserved
1 = Mobile CPU(Default)

0 = Normal mode
1 = Low Power mode

0 = Reverse Lanes
1 = Normal operation(Default)

00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)

0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)

0 = No SDVO Card present(Default)
1 = SDVO Card Present

0 = Normal operation(Default)
1 = Reverse Lanes

0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port

XOR /ALLz /Clock Un-gating

MCH_CFG_12MCH_CFG_13 Configuration

0

0

1

1

MCH_CFG_126
MCH_CFG_136

0

1

0

1

Clock gating disable

XOR Mode Enable

ALL-z Mode Enable

Normal operation(Default)

3

R397

R397
*4.02K_4

*4.02K_4

PCI Express Graphics

MCH_CFG_9 Low = Reverse Lane

R395

R395
*4.02K_4

*4.02K_4

High = Normal operation(Default)

MCH_CFG_96MCH_CFG_56

2

R396

R396
*4.02K_4

*4.02K_4

SDVO Present

Strap define at External
DVI control page

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

GMCH Strap(7 of 7)

GMCH Strap(7 of 7)

GMCH Strap(7 of 7)

11 39Tuesday, April 10, 2007

11 39Tuesday, April 10, 2007

11 39Tuesday, April 10, 2007

of

of

1

of

3B

3B

3B

http://mycomp.su/x/

1

DDR2 Dual channel A/B PU

2

3

4

5

6

7

8

A A

DDRII A CHANNEL DDRII B CHANNEL

SMDDR_VTERM SMDDR_VTERM

C229

C160

C160
.1U_4

.1U_4

C219

C219
.1U_4

.1U_4

C163

C163
.1U_4

.1U_4

C254

C254
.1U_4

.1U_4

C212

C212
.1U_4

.1U_4

C247

C247
.1U_4

.1U_4

C162

C162
.1U_4

.1U_4

C184

C184
.1U_4

.1U_4

C241

C241
.1U_4

.1U_4

C229
.1U_4

.1U_4

M_A_A[13..0]
M_B_A[13..0]

C260

C260
.1U_4

.1U_4

C245

C245
.1U_4

.1U_4

M_A_A[13..0] 7,13
M_B_A[13..0] 7,13

C161

C161
.1U_4

.1U_4

C255

C255
.1U_4

.1U_4

C190

C190
.1U_4

.1U_4

C166

C166
.1U_4

.1U_4

C183

C183
.1U_4

.1U_4

C167

C167
.1U_4

.1U_4

C237

C237
.1U_4

.1U_4

C248

C248
.1U_4

.1U_4

.1U_4

.1U_4

C256

C256

C209

C209
.1U_4

.1U_4

C169

C169
.1U_4

.1U_4

C253

C253
.1U_4

.1U_4

C258

C258
.1U_4

.1U_4

C204

C204
.1U_4

.1U_4

Place one cap close to every 2 pull-up resistor terminated to SMDDR_VTERM

B B

M_CKE16,13

M_A_BS#27,13

M_CKE06,13

M_A_BS#17,13

C C

M_B_BS#07,13

M_B_BS#17,13

D D

M_A_A3
M_A_A1

M_A_A7
M_A_A5

M_A_A2
M_A_A4

M_A_A11

M_A_A12
M_A_A9

M_A_A0

M_B_A10

M_B_A3
M_B_A1

M_B_A0

M_B_A6
M_B_A11

M_B_A12
M_B_A5

M_B_A2
M_B_A4

M_B_A8
M_B_A9

RP16 56X2RP16 56X2

RP21 56X2RP21 56X2

RP17 56X2RP17 56X2

RP26 56X2RP26 56X2

RP24 56X2RP24 56X2

RP27 56X2RP27 56X2

RP11 56X2RP11 56X2

RP10 56X2RP10 56X2

RP13 56X2RP13 56X2

RP9 56X2RP9 56X2

RP18 56X2RP18 56X2

RP19 56X2RP19 56X2

RP15 56X2RP15 56X2

RP22 56X2RP22 56X2

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

SMDDR_VTERM

SMDDR_VTERM

M_A_A8

RP20 56X2RP20 56X2

M_A_A6

M_A_A10

RP28 56X2RP28 56X2

RP4 56X2RP4 56X2

RP1 56X2RP1 56X2

RP12 56X2RP12 56X2

RP7 56X2RP7 56X2

RP8 56X2RP8 56X2

RP5 56X2RP5 56X2

RP25 56X2RP25 56X2

RP6 56X2RP6 56X2

RP2 56X2RP2 56X2

RP3 56X2RP3 56X2

M_CKE36,13

M_B_BS#27,13

M_A_BS#07,13

M_ODT16,13

M_ODT36,13

M_CS#26,13

M_A_CAS#7,13

M_A_WE#7,13

M_CS#16,13

M_A_RAS#7,13

M_CS#06,13

M_B_WE#7,13

M_B_CAS#7,13

M_CKE46,13

M_CS#36,13

M_B_RAS#7,13

M_ODT06,13

M_ODT26,13

M_B_A7

M_A_A13

M_B_A13

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

SMDDR_VTERM

INTEL FAE (08/17)
ADD MA14 FOR DUAL LAYERS RAM

M_A_A146,13
M_B_A146,13

1

R144 56_4R144 56_4
R135 56_4R135 56_4

2

SMDDR_VTERM

3

4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

6

Date: Sheet

Quanta Computer Inc.

DDR RES. ARRAY

DDR RES. ARRAY

DDR RES. ARRAY

7

3B

3B

12 39Tuesday, April 10, 2007

12 39Tuesday, April 10, 2007

12 39Tuesday, April 10, 2007

8

3B

of

of

of

http://mycomp.su/x/

1

DDR2 Dual channel A/B CONN

A A

B B

C C

D D

M_CKE06,12

M_A_BS#27,12

M_A_BS#07,12

M_A_WE#7,12

M_A_CAS#7,12

M_CS#16,12
M_ODT16,12

DDRDAT_SMB
DDRCLK_SMB

+3V

+3V

1

SMDDR_VREF_DIMM

+1.8VSUS

1

M_A_DQ6
M_A_DQ5

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3

M_A_DQ12
M_A_DQ8 M_A_DM1

M_A_DQS#1
M_A_DQS1

M_A_DQ11
M_A_DQ15

M_A_DQ17
M_A_DQ20

M_A_DQS#2
M_A_DQS2

M_A_DQ23
M_A_DQ19

M_A_DQ24
M_A_DQ25

M_A_DM3

M_A_DQ26
M_A_DQ27

M_A_A12
M_A_A9
M_A_A8

M_A_A5
M_A_A3
M_A_A1

M_A_A10

M_A_DQ36

M_A_DQS#4
M_A_DQS4

M_A_DQ39
M_A_DQ34

M_A_DQ40
M_A_DQ41

M_A_DM5
M_A_DQ42

M_A_DQ46
M_A_DQ53

M_A_DQ49

M_A_DQS#6
M_A_DQS6

M_A_DQ50

M_A_DQ56
M_A_DQ60

M_A_DM7
M_A_DQ62

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

2

CN25

CN25

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

FOX_AS0A426-N2RN-7F

FOX_AS0A426-N2RN-7F

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

H: 5.2mm

+1.8VSUS +1.8VSUS +1.8VSUS

M_A_DQ4
M_A_DQ0

M_A_DM0
M_A_DQ7

M_A_DQ1
M_A_DQ13

M_A_DQ9

M_A_DQ14
M_A_DQ10

M_A_DQ21
M_A_DQ16

M_A_DM2
M_A_DQ18

M_A_DQ22
M_A_DQ29

M_A_DQ28
M_A_DQS#3

M_A_DQS3
M_A_DQ30

M_A_DQ31

M_A_A11
M_A_A7
M_A_A6

M_A_A4
M_A_A2
M_A_A0

M_A_A13

M_A_DQ32
M_A_DQ33M_A_DQ37

M_A_DM4
M_A_DQ35

M_A_DQ38
M_A_DQ44

M_A_DQ45
M_A_DQS#5

M_A_DQS5
M_A_DQ43

M_A_DQ47
M_A_DQ48

M_A_DQ52

M_A_DM6
M_A_DQ54

M_A_DQ55M_A_DQ51
M_A_DQ61

M_A_DQ57
M_A_DQS#7

M_A_DQS7
M_A_DQ58M_A_DQ59

M_A_DQ63

R74 10K_4R74 10K_4 R65 10K_4R65 10K_4
R71 10K_4R71 10K_4

SO-DIMM0 SPD Address is 0xA0
SO-DIMM0 TS Address is 0x30

3

M_A_DM[0..7] 7
M_A_DQ[0..63] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[0..13] 7,12

M_CLK_DDR0 6
M_CLK_DDR#0 6

PM_EXTTS#0 6

M_CKE1 6,12

M_A_A14 6,12

INTEL FAE (08/17)
ADD MA14 FOR DUAL LAYERS RAM

M_A_BS#1 7,12
M_A_RAS# 7,12
M_CS#0 6,12

M_ODT0 6,12

M_CLK_DDR1 6 M_CLK_DDR#4 6
M_CLK_DDR#1 6

M_CKE36,12 M_CKE4 6,12

M_B_BS#27,12

M_B_BS#07,12

M_B_WE#7,12

M_B_CAS#7,12

M_CS#36,12

M_ODT36,12

4

SMDDR_VREF_DIMM

CN24

CN24

1

VREF

3

M_B_DQ0
M_B_DQ5

M_B_DQS#0
M_B_DQS0

M_B_DQ7
M_B_DQ3

M_B_DQ9
M_B_DQ8 M_B_DM1

M_B_DQS#1
M_B_DQS1

M_B_DQ11
M_B_DQ10

M_B_DQ20
M_B_DQ17

M_B_DQS#2
M_B_DQS2

M_B_DQ22
M_B_DQ23

M_B_DQ29

M_B_DQ28

M_B_DM3

M_B_DQ26
M_B_DQ27

M_B_A12
M_B_A9
M_B_A8

M_B_A5
M_B_A3
M_B_A1

M_B_A10

M_B_DQ37
M_B_DQ38

M_B_DQS#4
M_B_DQS4

M_B_DQ34
M_B_DQ35

M_B_DQ40
M_B_DQ41

M_B_DM5

M_B_DQ46

M_B_DQ43

M_B_DQS#6
M_B_DQS6

M_B_DQ54
M_B_DQ56

M_B_DQ61
M_B_DM7
M_B_DQ59

M_B_DQ62
DDRDAT_SMB

DDRCLK_SMB
+3V

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

FOX_AS0A426-NARN-7F

FOX_AS0A426-NARN-7F

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

H: 9.2mm

CLOCK 0,1 CLOCK 3,4

CKE 2,3CKE 0,1

2

3

4

5

2

VSS46

DQ4
DQ5

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21

VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31

VSS8
CKE1

VDD8

A15
A14

VDD11

SO-DIMM (200P)

SO-DIMM (200P)

A11

A7
A6

VDD4

A4
A2
A0

VDD12

BA1

RAS#

S0#
VDD1
ODT0

A13
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61

VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

SA0
SA1

5

M_B_DQ4

4

M_B_DQ1

6
8

M_B_DM0

10
12

M_B_DQ2

14

M_B_DQ6

16
18

M_B_DQ12

20

M_B_DQ13

22
24
26
28
30
32
34

M_B_DQ14

36

M_B_DQ15

38
40

42

M_B_DQ16

44

M_B_DQ21

46
48
50

M_B_DM2

52
54

M_B_DQ18

56

M_B_DQ19

58
60

M_B_DQ24

62

M_B_DQ25

64
66

M_B_DQS#3

68

M_B_DQS3

70
72

M_B_DQ31

74

M_B_DQ30

76
78
80
82
84
86
88

M_B_A11

90

M_B_A7

92

M_B_A6

94
96

M_B_A4

98

M_B_A2

100

M_B_A0

102
104
106
108
110
112
114

M_B_A13

116
118
120
122

M_B_DQ36

124

M_B_DQ32

126
128

M_B_DM4

130
132

M_B_DQ39

134

M_B_DQ33

136
138

M_B_DQ44

140

M_B_DQ45

142
144

M_B_DQS#5

146

M_B_DQS5

148
150

M_B_DQ42

152

M_B_DQ47

154
156

M_B_DQ52M_B_DQ53

158

M_B_DQ48M_B_DQ49

160
162
164
166
168

M_B_DM6

170
172

M_B_DQ55M_B_DQ51

174

M_B_DQ50

176
178

M_B_DQ60

180

M_B_DQ57

182
184

M_B_DQS#7

186

M_B_DQS7

188
190

M_B_DQ63

192

M_B_DQ58

194
196

R69 10K_4R69 10K_4

198
200

+3V

SO-DIMM1 SPD Address is 0xA4
SO-DIMM1 TS Address is 0x34

6

M_B_DM[0..7] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..13] 7,12

M_CLK_DDR3 6
M_CLK_DDR#3 6

PM_EXTTS#1 6

M_B_A14 6,12

M_B_BS#1 7,12
M_B_RAS# 7,12
M_CS#2 6,12

M_ODT2 6,12

M_CLK_DDR4 6

6

7

+1.8VSUS

+1.8VSUS

C174

C174

C202

C202

.1U_4

.1U_4

.1U_4

.1U_4

+1.8VSUS

INTEL FAE (08/17)
ADD MA14 FOR DUAL LAYERS RAM

+1.8VSUS

C524

C524

C242

C242

.1U_4

.1U_4

.1U_4

.1U_4

PDAT_SMB2,16,18,27,33

PCLK_SMB2,16,18,27,33

SMDDR_VREF_DIMM

A1A:(10/30) no stuff R192, stuff R191,R193
A1A:(11/09) stuff R192, no stuff R191,R193

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR SO-DIMM(200P)

DDR SO-DIMM(200P)

DDR SO-DIMM(200P)

Date: Sheet

Date: Sheet

Date: Sheet

7

+

+

C496

C496

C523

2.2U_6

2.2U_6

SMDDR_VREF_DIMM

C497

C497
.1U_4

.1U_4

C523

2.2U_6

2.2U_6

C307

C307
.1U_4

.1U_4

C135

C135
330U_7343

330U_7343

C520

C520
.1U_4

.1U_4

Close to DIMM0

+

+

C490

C490

C127

C127
330U_7343

330U_7343

C506

C506
.1U_4

.1U_4

C234

C234

2.2U_6

2.2U_6

2.2U_6

2.2U_6

SMDDR_VREF_DIMM

C304

C304

C185

C185

.1U_4

.1U_4

.1U_4

.1U_4

Close to DIMM1

+3V

Q13

Q13

2

RHU002N06

RHU002N06

3

3

R192 0_6R192 0_6

R193 *10K_4R193 *10K_4R191 *10K_4R191 *10K_4

Quanta Computer Inc.

Quanta Computer Inc.

1

+3V

Q12

Q12

2

RHU002N06

RHU002N06

1

PROJECT : ZU1

PROJECT : ZU1

C218

C218

2.2U_6

2.2U_6

+3V

C308

C308

2.2U_6

2.2U_6

C509

C509

2.2U_6

2.2U_6

C306

C306

2.2U_6

2.2U_6

R53

R53
10K_4

10K_4

SMDDR_VREF

+1.8VSUS

8

C510

C510

2.2U_6

2.2U_6

C113

C113

2.2U_6

2.2U_6

C491

C491

2.2U_6

2.2U_6

+3V

C100

C100

2.2U_6

2.2U_6

R54

R54
10K_4

10K_4

DDRDAT_SMB

DDRCLK_SMB

13 39Tuesday, April 10, 2007

13 39Tuesday, April 10, 2007

13 39Tuesday, April 10, 2007

of

of

of

8

C525

C525

2.2U_6

2.2U_6

C518

C518

2.2U_6

2.2U_6

C118

C118
.1U_4

.1U_4

C110

C110
.1U_4

.1U_4

3B

3B

3B

http://mycomp.su/x/

5

RTC

VCCRTC_4

R205

R205
1K_4

1K_4

CN12

CN12

1
2

ACS_85204-0200L

ACS_85204-0200L

+5VPCU

R201 1.2K_6R201 1.2K_6

R202

R202

4.7K_4

4.7K_4

R206

R206
15K_4

15K_4

D23 CH500H-40D23 CH500H-40

D22 CH500H-40D22 CH500H-40

1
2

+3VPCU

D D

C C

VCCRTC

VCCRTC

R246

R246

1M_6

1M_6

R210 20K_6R210 20K_6

C328 1U_6C328 1U_6

<check list>
Delay 18~25ms

12

G1

G1

*SHORT_PAD

*SHORT_PAD

A1A: (9/24) change RTC CONN (follow ZC3)

CMOS Setting G1
Clear CMOS Short
Keep CMOS Open

VCCRTC_3

R200 1K_4R200 1K_4

VCCRTC_2VCCRTC_1

Q22

Q22

MMBT3904

MMBT3904

13

2

C363

C363

1U_6

1U_6

SATA Disable

1.Connect to GND: SATA[2:0]RXp/n , SATARBIAS , SATARBIAS# , SATA_CLKP , SATACLKN

2.NC: SATA[2:0]TXp/n , SATALED#

3.VccSATAPLL should be connected directly to Vcc1_5,Filter cap are not required

B B

4.BIOS disable

4

CHANGE FROM 18PF
TO 10PF

C548 10P_4C548 10P_4

Y4

Y4

32.768KHZ

32.768KHZ

C547 10P_4C547 10P_4

R231

R231
10M_6

10M_6

2 1

CLK_32KX1
CLK_32KX2

RTCRST#
SM_INTRUDER#
ICH_INTVRMEN

LAN100_SLP

3

D3A:(2/1) Change ICH8M from ES sample to QS sample
Change U32 from AJ0QM740T31 to AJ0QN230T10

AG25
AF24

AF23
AD22
AF25

AD21

A1A: 9/1 Remove GLAN

E3A:(3/30) Intel checklist Rev1.6
The GLAN_COMPO/GLAN_COMPI connection to 1.5-V rail through the resistor
remains even if non-Intel LAN is used.
Stuff R232 (CS02492FB29)

+1.5V_PCIE

+3V +3V

R289

R289

R467

R467

*10K_4

*10K_4

*10K_4

*10K_4

RST_RBAY#
RBAYON# RBAYON#

SATA_RXN026
SATA_RXP026

SATA_TXN026
SATA_TXP026

T111T111
T63T63

GLAN_COMP_SB

ACZ_BCLK
ACZ_SYNC

ACZ_RST#

ACZ_SDIN2
ACZ_SDIN3

ACZ_SDOUT
RST_RBAY#

SATA_LED#
SATA_RXN0_C

SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

R232 24.9_4R232 24.9_4

ACZ_SDIN031
ACZ_SDIN131

SATA_LED#29

C407 3900P_4C407 3900P_4
C408 3900P_4C408 3900P_4
C406 3900P_4C406 3900P_4
C405 3900P_4C405 3900P_4

A1A: (9/20) Remove SATA1/SATA2

CLK_PCIE_SATA#2
CLK_PCIE_SATA2

R495 24.9_4R495 24.9_4

<check list>
L<500mils

SATA_BIAS

AH21

AE14

AH17
AH15
AD13

AE13
AE10

AG14
AF10

U32A

U32A

RTCX1
RTCX2

RTCRST#
INTRUDER#
INTVRMEN

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2
GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC
HDA_RST#

AJ17

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDOUT
HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO34
SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8M REV 1.0

ICH8M REV 1.0

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD/GPIO49

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

IHDA

IHDA

IDE

IDE

SATA

SATA

DCS1#
DCS3#

DIOR#
DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

INIT#

INTR

NMI

SMI#

TP8
DD0

DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8

DD9
DD10
DD11
DD12
DD13
DD14
DD15

DA0

DA1

DA2

E5
F5
G8
F6

C4
G9

E6
AF13

AG26
AF26

AE26
AD24
AG29
AF27
AE24

AC20
AH14

AD23
AG28

AA24
AE27
AA23
V1

U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

AA4
AA1
AB3

Y6
Y5

W4
W3
Y2
Y3
Y1
W5

2

LDRQ#1
GATEA20

H_DPRSTP#_R
H_DPSLP#_R

H_PWRGD_R

RCIN#

H_SMI#_R

H_THERMTRIP_R
ICH_TP8
PDD0

PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0
PDA1
PDA2

1

LAD0 27,28,30
LAD1 27,28,30
LAD2 27,28,30
LAD3 27,28,30

LFRAME# 27,28,30
LDRQ#0 30

T66T66

GATEA20 28
H_A20M# 3

R221 0_4R221 0_4
R224 0_4R224 0_4

R220 0_4R220 0_4

R219 0_4R219 0_4

+1.05V_V_CPU_IO

R209

R209

R222

R222

*56.2_4

*56.2_4

*56.2_4

*56.2_4

ICH_DPRSTP# 3,6,35
H_DPSLP# 3

H_PWRGD 3
H_IGNNE# 3
H_INIT# 3

H_INTR 3
RCIN# 28

H_NMI 3
H_SMI# 3

H_STPCLK# 3

R214 24_6R214 24_6

T59T59

PDD[15:0] 26

E3A:(3/14)Change R214 from CS02403F908 to CS02403F916 (Lead free)

0810 UR FAE:
RCIN# DOESN'T NEED PU

PDA[2:0] 26

+1.05V_V_CPU_IO

R212

R212

56.2_4

56.2_4
R211 *0_4R211 *0_4

Placement close SB L<2"

+3V +3V

RCIN#
GATEA20

R273

R273
10K_4

10K_4

A1A: (9/20) RCIN# PU 10K

PDCS1# 26
PDCS3# 26

PDIOR# 26

PDIOW# 26

PDDACK# 26
IRQ14 26
PIORDY 26

PDDREQ 26

+1.05V_V_CPU_IO

R237

R237

56.2_4

56.2_4

H_FERR# 3

PM_THRMTRIP# 3,6

R262

R262

8.2K_4

8.2K_4

SB Strap HDA

ICH8-M Internal VR Enable strap
(Internal VR for Vccsus1_05,VccSus1_5 and VccCL1_5)

INTVRMEN Low = Internal VR disable

A A

High = Internal VR enable(Default)

VCCRTC

A1A: (9/20) Change INTVRMEN from PU to PD

R227

R227

B1C: (11/18) Change INTVRMEN from PD to PU

332K_6

332K_6

ICH_INTVRMEN

R228

R228
*0_4

*0_4

5

ICH8-M LAN100_SLP Strap
(Internal VR for VccLAN1_05 and VccCL1.05)

LAN100_SLP Low = Internal VR disable

High = Internal VR enable(Default)

VCCRTC

R226

R226
332K_6

332K_6

R241

R241
*0_4

*0_4

4

E3A:(4/3)Stuff R226(332K_6) and don't stuff R241
to enable Internal VR for VCCCL1_05 and VCCLAN1_05.

A1A: 9/1 Disable the internal VR powering
VccLAN1_05, and VccCL1_05

LAN100_SLP

D3A:(2/16)ICH8M Internal VR should not be disabled.
no stuff R241, stuff R226

D3A:(2/28) Battery life issue. Disable ICH8M Internal VR (LAN)
. stuff R241, no stuff R226 for C-build

XOR Chain Entrance Strap

ICH_RSV0 HDA_SDOUT Description

0

0

1

1

3

0

1

0

1

+3V

R272

R272
*1K_6

*1K_6

R457

R457
*1K_4

*1K_4

Enter XOR Chain

Normal opration(Default)

Set PCIE port config bit 1

ACZ_SDOUT

RSVD

ICH_TP3 16

2

A1A: 9/6 base on Intel design guide, add it.

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST#

R282 33_4R282 33_4

R283 33_4R283 33_4

R464 33_4R464 33_4

R465 33_4R465 33_4

R462 33_4R462 33_4

R463 33_4R463 33_4

R268 33_4R268 33_4

R267 33_4R267 33_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

ICH8M HOST(1 of 4)

ICH8M HOST(1 of 4)

ICH8M HOST(1 of 4)

ACZ_SDOUT_AUDIO 31

ACZ_SDOUT_MDC 31

ACZ_SYNC_AUDIO 31

ACZ_SYNC_MDC 31

BIT_CLK_AUDIO 31
BIT_CLK_MDC 31

ACZ_RST#_AUDIO 31,32
ACZ_RST#_MDC 31

1

3B

3B

14 39Tuesday, April 10, 2007

14 39Tuesday, April 10, 2007

14 39Tuesday, April 10, 2007

3B

of

of

of

http://mycomp.su/x/

5

SB-PCIE/USB/DMI

PCIE_RXN133
PCIE_RXP133

PCIE_TXN133

to Docking

D D

to LAN

to WLAN

PCIE_TXP133

PCIE_RXN318
PCIE_RXP318

PCIE_TXN318
PCIE_TXP318

PCIE_RXN427
PCIE_RXP427

PCIE_TXN427
PCIE_TXP427

C343 .1U_4C343 .1U_4
C342 .1U_4C342 .1U_4

C335 .1U_4C335 .1U_4
C334 .1U_4C334 .1U_4

C337 .1U_4C337 .1U_4
C336 .1U_4C336 .1U_4

A1A: 9/1 remove SPI interface

D3A:(2/2) Add test point for ASF function

C C

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

T131T131
T132T132
T133T133

T134T134
T135T135

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9

N29
N28

M27
M26

H27
H26
G29
G28

D27
D26
C29
C28

C23

D23

AJ19
AG16
AG15
AE15
AF15
AG17
AD12

AJ18
AD14
AH18

P27
P26

L29
L28

K27
K26
J29
J28

F27
F26
E29
E28

B23
E22

F21

U32D

U32D

PERN1
PERP1
PETN1
PETP1

PERN2
PERP2
PETN2
PETP2

PERN3
PERP3
PETN3
PETP3

PERN4
PERP4
PETN4
PETP4

PERN5
PERP5
PETN5
PETP5

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

ICH8M REV 1.0

ICH8M REV 1.0

SB-PCI

U32B

AD[0..31]22,23,25

B B

INTA#22

A A

INTB#23

T68T68
T64T64

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

INTA#
INTB#
INTC#
INTD#

5

U32B

D20

AD0

E19

AD1

D19

AD2

A20

AD3

D17

AD4

A21

AD5

A19

AD6

C19

AD7

A18

AD8

B16

AD9

A12

AD10

E16

AD11

A14

AD12

G16

AD13

A15

AD14

B6

AD15

C11

AD16

A9

AD17

D11

AD18

B12

AD19

C12

AD20

D10

AD21

C7

AD22

F13

AD23

E11

AD24

E13

AD25

E12

AD26

D8

AD27

A6

AD28

E8

AD29

D6

AD30

A3

AD31

Interrupt I/F

Interrupt I/F

F9

PIRQA#

B5

PIRQB#

C5

PIRQC#

A10

PIRQD#

ICH8M REV 1.0

ICH8M REV 1.0

PCI

PCI

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#

C/BE1#

C/BE2#

C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

A4
D7
E18
C18
B19
F18
A11
C10

C17
E15
F16
E17

C8
D9
G6
D16
A7
B7
F10
C16
C9
A17

AG24
B10
G7

F8
G11
F12
B3

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

IRDY#

DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLT_RST-R#
PCLK_ICH

INTE#
INTF#
INTG#
INTH#

4

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

PCI-Express

PCI-Express

DMI_IRCOMP

SPI

SPI

USB

USB

R490 *0_4R490 *0_4

T26

DMI_CLKN

T25

DMI_CLKP

Y23

DMI_ZCOMP

Y24

Direct Media Interface

Direct Media Interface

G3

USBP0N

G2

USBP0P

H5

USBP1N

H4

USBP1P

H2

USBP2N

H1

USBP2P

J3

USBP3N

J2

USBP3P

K5

USBP4N

K4

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBRBIAS#

USBRBIAS

4

USBP5-

K2

USBP5+

K1
L3
L2

USBP7-

M5

USBP7+

M4
M2
M1

USBP9-

N3

USBP9+

N2
F2

USB_RBIAS_PN

F3

<CRB>
USB_RBIAS_PN<500mils

REQ0# 22
GNT0# 22
REQ1# 23
GNT1# 23
REQ2# 25
GNT2# 25

CBE0# 22,23,25
CBE1# 22,23,25
CBE2# 22,23,25
CBE3# 22,23,25

IRDY# 22,23,25
PAR 22,23,25
PCIRST# 22,23,27
DEVSEL# 22,23,25
PERR# 22,23,25

SERR# 22,23,25
STOP# 22,23,25
TRDY# 22,23,25
FRAME# 22,23,25

PCLK_ICH 2
PCI_PME# 22,23,25

DMI_RXN0 6
DMI_RXP0 6
DMI_TXN0 6
DMI_TXP0 6

DMI_RXN1 6
DMI_RXP1 6
DMI_TXN1 6
DMI_TXP1 6

DMI_RXN2 6
DMI_RXP2 6
DMI_TXN2 6
DMI_TXP2 6

DMI_RXN3 6
DMI_RXP3 6
DMI_TXN3 6
DMI_TXP3 6

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

DMI_IRCOMP_R

USBP0- 27
USBP0+ 27
USBP1- 27
USBP1+ 27
USBP2- 27
USBP2+ 27
USBP3- 33
USBP3+ 33
USBP4- 27

USBP4+ 27

T114T114
T113T113

USBP6- 29

USBP6+ 29

T67T67
T69T69

USBP8- 20

USBP8+ 20

T70T70
T112T112

R328

R328

22.6_6

22.6_6

INTE# 25

CRT_SENSE# 19,28,33

+1.5V_PCIE

R244

R244

24.9_4

24.9_4

<CRB>
DMI_IRCOMP_R<500mils

to Docking

to Bluetooth

A1A:(10/2) Remove USB5

to finger printer

A1A:(10/2) Remove USB7

to CCD

R230 0_6R230 0_6

U20

PLT_RST-R#

U20

2
1

TC7SH08FU

TC7SH08FU

3

A16 SWAP Override strap

PCI_GNT#3 Low = A16 swap override enabled

GNT3#

+3V

4

3 5

3

PLTRST#_NB 6

C546

C546
.1U_4

.1U_4

R248

R248
100K_6

100K_6

R301 *1K_4R301 *1K_4

PLTRST# 16,18,21,25,26,27,28,30,33

High = Default

2

SERR#
REQ0#
INTH#

+3V

USBOC#0
USBOC#7
USBOC#5

+3V_S5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

USBOC#1

USBOC#8
USBOC#9

REQ1#
DEVSEL#
FRAME#
STOP#

+3V

LOCK#
IRDY#
PERR#
INTF#

+3V

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

ICH8M PCIE(2 of 4)/ BIOS

ICH8M PCIE(2 of 4)/ BIOS

ICH8M PCIE(2 of 4)/ BIOS

1

RP40

RP40

6
7
8
9

10

8.2KX8

8.2KX8

RP42

RP42

6
7
8
9

10

8.2KX8

8.2KX8
R264 8.2K_4R264 8.2K_4
R251 8.2K_4R251 8.2K_4

RP38

RP38

6
7
8
9

10

8.2KX8

8.2KX8

RP39

RP39

6
7
8
9

10

8.2KX8

8.2KX8

1

+3V

5
4
3

INTC#

2

INTB#

1

+3V_S5

5

USBOC#2

4

USBOC#3

3

USBOC#4

2

USBOC#6

1

+3V_S5
+3V_S5

+3V

5

REQ2#

4

TRDY#

3

INTG#

2
1

+3V

5

INTE#

4

INTD#

3

REQ3#

2

INTA#

1

3B

3B

15 39Tuesday, April 10, 2007

15 39Tuesday, April 10, 2007

15 39Tuesday, April 10, 2007

3B

of

of

of

http://mycomp.su/x/

5

SB-GPIO

D3A:(1/31) ASF issue:when iAMT is not implemented,
ICH8M SMBus and SMLink should be connected together to support slave mode
Connect SMLINK0 to SMBCLK and SMLINK1 to SMBDATA (Add R474,R475 for debug use)
A1A:(9/29) no support iAMT, remove SMB_CLK_ME,SMB_DATA_ME

D D

A1A: (9/26) change name from VR_PWRGD_CLKEN#
to VR_PWRGD_CK410#

VR_PWRGD_CK410#35

B1C: (11/24) add D43,D44 to stop leakage from EC to SB

B1C:(11/28) change DOCKIN# from GPIO7 to GPIO12

C C

MCH_ICH_SYNC#6

A1A:(9/29) no support iAMT, remove 2ND_MBCLK,2ND_MBDATA,Q11,Q12

PM_STPPCI#2
PM_STPCPU#2

DOCKIN#18,33

R469 0_4R469 0_4

1
2

U31

U31

NC7SZ04

NC7SZ04

+3V

R254

R254

R256

R256
*10K_4

*10K_4

*10K_4

*10K_4

+3V

C338 .1U_4C338 .1U_4

5
43

R250 100K_4R250 100K_4

BOARD_ID0
BOARD_ID1

A1A: (9/26) Remove SATACLKREQ#

+3V

R468

R468
*10K_4

*10K_4

<check list>
internal PD

KBSMI#28
LID591#20,28,29

PCLK_SMB2,13,18,27,33
PDAT_SMB2,13,18,27,33

CL_RST#127

A1A: (9/11) Remove RI#

LPC_PD#30
SYS_RST#3

PM_BMBUSY#6

R459 0_4R459 0_4
R460 0_4R460 0_4

PCIE_WAKE#18,27

THERM_ALERT#3

BAS316

BAS316

T120T120

RST_HDD#26

ACZ_SPKR31

D24

D24

PCLK_SMB
PDAT_SMB

SERIRQ22,23,28,30

KBSMI# KBSMI#_ICH
LID591# LID591#_ICH

SCI#28

ICH_TP314

A1A:(9/20) Refer to ZD1, Add ICH_PWROK circuit

No Reboot strap

B B

ECN 2A
INTEL CRB V1.301
CL_RST# NO NEED PU.

A A

A1A:(9/29) no support iAMT, remove PU +3V_S5 circuit (R259/R258)

HDA_SPKR Low = Default

High = No Reboot

ACZ_SPKR

BIOS/ ERIC: UNSTUFF

GPIO35
THERM_ALERT#
SERIRQ
CLKRUN#

RI#
CL_RST#1

PCLK_SMB
PDAT_SMB
SMB_ALERT#
PCIE_WAKE#
PM_BATLOW#_R
GPIO7

5

R265 10K_4R265 10K_4
R270 8.2K_4R270 8.2K_4
R299 10K_4R299 10K_4
R305 8.2K_4R305 8.2K_4

R258 10K_4R258 10K_4
R242 *10K_4R242 *10K_4

R455 2.2K_4R455 2.2K_4
R255 2.2K_4R255 2.2K_4
R235 10K_4R235 10K_4
R260 1K_4R260 1K_4
R245 8.2K_4R245 8.2K_4
R259 *10K_4R259 *10K_4

+3V

+3V

+3V_S5

C2A:(12/21) no stuff R259 to prevent leakage issue

4

R474 0_4R474 0_4
R475 0_4R475 0_4

T110T110

D43 BAS316D43 BAS316
D44 BAS316D44 BAS316

GPIO7

T128T128

T109T109
T61T61

INTEL CRB: PU +3V

4

U32C

PCLK_SMB
PDAT_SMB
CL_RST#1

SMLINK0
SMLINK1

RI#

SYS_RST#

SMB_ALERT#
PM_STPPCI_ICH#

PM_STPCPU_ICH#
CLKRUN#
PCIE_WAKE#

SERIRQ
THERM_ALERT#

VR_PWRGD_CLKEN
ICH_TP7

SCI#
DOCKIN#_ICH_R

BOARD_ID3
ICH_GPIO22
ICH_GPIO27
ICH_GPIO28
GPIO35
RST_HDD#
ICH_GPIO39

ICH_GPIO48
ACZ_SPKR
MCH_ICH_SYNC#_R

DELAY_VR_PWRGOOD3,6,35

A1A:(10/30) change DOCKIN#_ICH_R PU from +3V to +3V_S5

U32C

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#/GPIO15

AG18

STP_CPU#/GPIO25

AH11

CLKRUN#/GPIO32

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8M REV 1.0

ICH8M REV 1.0

SYS_RST#

DNBSWON#

ICH_GPIO24
DOCKIN#_ICH_R

LID591#_ICH
KBSMI#_ICH

SCI#
ICH_GPIO10

ICH_GPIO22
ICH_GPIO48
RST_HDD#
RBAYID0
RBAYID1

ICH_GPIO14
PM_DPRSLPVR

ICH_PWROK

DELAY_VR_PWRGOOD
PWROK_EC

R298 100K_4R298 100K_4

TC7SH08FU

TC7SH08FU

R263 10K_4R263 10K_4

R329 *10K_4R329 *10K_4

Internal Pull up

R454 *10K_4R454 *10K_4
R319 8.2K_4R319 8.2K_4

R473 10K_4R473 10K_4R288 *10K_4R288 *10K_4
R480 10K_4R480 10K_4

R261 10K_4R261 10K_4
R568 10K_4R568 10K_4

R312 10K_4R312 10K_4
R315 10K_4R315 10K_4
R314 10K_4R314 10K_4
R311 8.2K_4R311 8.2K_4
R300 8.2K_4R300 8.2K_4

R569 10K_4R569 10K_4
R269 100K_4R269 100K_4

R238 10K_4R238 10K_4

With EZ Dock

W/O EZ Dock

RSV

RSV

RSV

3

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36

SATA

SATA

GPIO

GPIO

SATA3GP/GPIO37

SMB

SMB

Clocks

Clocks

S4_STATE#/GPIO26

SYS

GPIO

SYS

GPIO

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#
LAN_RST#

Power MGTController Link

Power MGTController Link

CK_PWRGD

CLPWROK

CL_DATA0

GPIO

GPIO

MISC

MISC

1
2

+3VSUS

53

CL_DATA1
CL_VREF0

CL_VREF1

MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14

WOL_EN/GPIO9

A1A:(10/12) change from +3V to +3VSUS
(Refer to ZC1)

.1U_4C393 .1U_4C393

U21

U21

ICH_PWROK

4

+3V_S5

+3V

ID2ID3

0000

000

00

1

00

1

000

1

3

EMAIL_LED#

AJ12

BOARD_ID2

AJ10

RBAYID0

AF11

RBAYID1

AG11

14M_ICH

AG9

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

RSMRST#

SLP_M#

CL_CLK0
CL_CLK1

CL_RST#

CLKUSB_48

G5

ICH8_SIO_32K

D3

SLP_S3#

AG23

SLP_S4#

AF21

SLP_S5#

AD18

A1A: (9/26) Remove S4_STAT#, need be confirm?

AH27

ICH_PWROK

AE23

PM_DPRSLPVR_R

AJ14

PM_BATLOW#_R

AE21

DNBSWON#

C2

PM_LAN_ENABLE_R

AH20

RSMRST#_R

AG27
E1
E3
AJ25
F23

AE18
F22

AF19

CL_VREF0_SB

D24

CL_VREF1_SB

AH23
AJ23

ICH_GPIO24

AJ27

ICH_GPIO10

AJ24

ICH_GPIO14

AF22
AG19

A1A: (9/11) Remove LAN_WOL_EN circuit

INTEL CRB NEED THOSE PU & PD.

PM_LAN_ENABLE_R

INTEL CRB SHOW IT

ICH_GPIO39

INTEL CRB SHOW IT

PM_LAN_ENABLE_R

DISABLE LAN: STUFF

ID0ID1Board ID

1

0

1

C2A:(12/12) Intel Suggest :ICH8M CPIO20 should not be pulled HIGH.
Remove BOARD_ID3 circuit(remove R474,R475)

2

T145T145

14M_ICH 2
CLKUSB_48 2

SIO/ PC87383 DOES NOT NEED 32KHz

T71T71

R234 100_4R234 100_4
R243 100_4R243 100_4

T60T60

R466 100_4R466 100_4

DNBSWON# 28

R247 *0_4R247 *0_4

CK_PWRGD 2
PWROK_EC 6,28
MPWROK 6,28

CL_CLK0 6

CL_DATA0 6

CL_RST#0 6

A1A: (9/26) Remove (1)ME_EC_ALERT#

B1C:(11/24) add GPIO10 PU +3V,GPIO14 PD to GND

R456 *10K_4R456 *10K_4

R470 10K_4R470 10K_4

R204 10K_4R204 10K_4

BOARD_ID2 BOARD_ID0BOARD_ID1

(2)EC_ME_ALERT

+3V+3V +3V

R472

R472

*10K_4

*10K_4

R471

R471

10K_4

10K_4

R310

R310

R304

R304

SUSB# 28
SUSC# 28

PM_DPRSLPVR

A1A: 9/1 change to PLTRST#

PLTRST#

15,18,21,25,26,27,28,30,33

B1C:(11/20) short PWROK_EC to MPWROK

A1A:(9/16) Remove SUSM#
used to control power planes to the Intel AMT sub-system

CL_CLK1 27

CL_DATA1 27

+3V

R324

R324

*10K_4

*10K_4

*10K_4

10K_4

10K_4

*10K_4

R320

R320

10K_4

10K_4

2

1

CLKUSB_48 14M_ICH

R335

R335
*10_4

2

2

1
2

1

+3V_S5

R233

R233
*3.24K_6

*3.24K_6

C355

C355
*.1U_4

*.1U_4

D21

D21
BAV99

BAV99

D20

D20
BAV99

BAV99

*10_4

C412

C412
*10P_4

*10P_4

+3VSUS

R207

R207

4.7K_4

4.7K_4

+3V

R453

R453

3.24K_6

3.24K_6

R452

R452
453_4

453_4

RSMRST# 28

FROM uR(EC)TO ICH8

16 39Tuesday, April 10, 2007

16 39Tuesday, April 10, 2007

16 39Tuesday, April 10, 2007

1

<FAE>
Since your CPU VRM has no
DPRSTP# pin, connect
PM_DPRSLPVR to IMVP6 is correct

PM_DPRSLPVR 6,35CLKRUN#28,30

E3A:(3/26)
LAN_RST# should be terminated by 8.2-10 kΩ pull down resistor to GND
if an IntelR 82566 MM/MC integrated LAN solution is not used.->
(1)Stuff 10k for R204

PLTRST#

(2)Don't stuff R456
(3)Don't stuff R247

R229

R229
*453_4

*453_4

B1C:(11/29) no stuff R229,R233,C355

INTEL FAE (08/17)
"Add RSMRST# isolation (important!!! See ww22 Santa Rosa MoW)"

Q23

Q23
MMBT3906

RSMRST#_R

MMBT3906

3 1

R215

R215
10K_4

10K_4

3

3

R196

R196

2.2K_4

2.2K_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH8M GPIO(3 of 4)

ICH8M GPIO(3 of 4)

ICH8M GPIO(3 of 4)

Date: Sheet

Date: Sheet

Date: Sheet

R481

R481
*33_4

*33_4

C559

C559
*10P_4

*10P_4

C357

C357
.1U_4

.1U_4

3B

3B

3B

of

of

of

http://mycomp.su/x/

5

+3V_S5

21

D25

D25

PDZ5.6B

R331 10_6R331 10_6

+5V_S5

D D

+1.5V

Intel use 0.5UH inductor

+1.5V

R450 0_8R450 0_8

C C

+3V

+1.5V

<Description>

<Description>

+1.5V_PCIE

R327 0_6R327 0_6

R461 0_6R461 0_6

R458 1_8R458 1_8

B B

A A

PDZ5.6B

C401

C401
.1U_4

.1U_4

L56

L56
FBMJ2125HS420-T_8

FBMJ2125HS420-T_8

R489 0_8R489 0_8

L57 1UH_1210

L57 1UH_1210

C359

C359

4.7U_6

4.7U_6

5

R266 100_6R266 100_6

+5V

+1.5V_PCIE

+

+

C543

C543
220U_7343

220U_7343

A1A: (9/20) Change back R489 to 0 ohm

+1.5V_USB

C366

C366
.1U_4

.1U_4

C360

C360
22U_8

22U_8

+1.5V_APLL_RR

C361

C361
10U_6

10U_6

+3V

+3V

VCCRTC

21

D40

D40

PDZ5.6B

PDZ5.6B

C385

C385
.1U_4

.1U_4

C346

C346
22U_8

22U_8

L60

L60
10UH_8

10UH_8

CV01001MN08

CV01001MN08

C375

C375
1U_6

1U_6

C384

C384
1U_6

1U_6

C387

C387
.1U_4

.1U_4

C404

C404
.1U_4

.1U_4

C358

C358

2.2U_6

2.2U_6

R240 0_6R240 0_6

C332

C332
1U_4

1U_4

C353

C353

2.2U_6

2.2U_6

C390

C390
10U_6

10U_6

+1.5V_SATA
TP_VCCLAN1_05_ICH_1

TP_VCCLAN1_05_ICH_2
+3V_VCCLAN

+1.5V_VCCGLANPLL

C352

C352
.1U_4

.1U_4

+5VREF_SB
+5VREF_SUS_SB

+1.5V_APLL+1.5V_SATA

C396

C396
1U_6

1U_6

+3V_GLAN

4

4

C330

C330
.1U_4

.1U_4

AD25

AA25
AA26
AA27
AB27
AB28
AB29

W25

AC10

W23

D28
D29

G24
H23
H24

M24
M25
N23
N24
N25

R24
R25
R26
R27

U24
U25

AE7
AF7
AG7
AH7

AC1
AC2
AC3
AC4
AC5

AC9
AA5

AA6
G12

G17

AC7
AD7

G18

G20

A16

T7

G4

E25
E26
E27
F24
F25

J23
J24
K24
K25
L23
L24
L25

P24
P25

T23
T24
T27
T28
T29

V23
V24
V25

Y25
AJ6

AJ7

H7

D1

F1
L6

L7
M6
M7

F17

F19

A24
A26

A27
B26
B27
B28

B25

U32F

U32F

VCCRTC
V5REF[1]

V5REF[2]
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]

VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]

VCC1_5_A[11]
VCC1_5_A[12]

VCC1_5_A[13]
VCC1_5_A[14]

VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]

VCC1_5_A[18]
VCC1_5_A[19]

VCCUSBPLL
VCC1_5_A[20]

VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]

VCC1_5_A[25]
VCCLAN1_05[1]

VCCLAN1_05[2]
VCCLAN3_3[1]

VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]

VCCGLAN3_3

ICH8M REV 1.0

ICH8M REV 1.0

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]

CORE

CORE

VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]

VCCA3GP ATXARX

VCCA3GP ATXARX

V_CPU_IO[1]
V_CPU_IO[2]

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

IDE

IDE

PCI

PCI

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]

VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]

USB CORE

USB CORE

VCCSUS3_3[06]
VCCSUS3_3[07]

VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]

GLAN POWER

GLAN POWER

VCCCL3_3[1]
VCCCL3_3[2]

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]

VCCHDA

VCCCL1_05

VCCCL1_5

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
AE28

AE29
AC23

AC24
AF29
AD2
AC8

AD8
AE8
AF8

AA3
U7
V7
W1
W6
W7
Y7

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

AC12
AD11
J6

AF20
AC16
J7
C3
AC18

AC21
AC22
AG20
AH28

P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6

TP_VCCCL1_05_ICH

G22

VCCCL1_5_INT_ICH

A22

+V3.3M_ICH

F20
G21

3

+1.05V_SB

C382

C382
.1U_4

.1U_4

VCCDMIPLL_ICH

+1.25V_DMI

+1.05V_V_CPU_IO

+V3.3_DMI_ICH
+V3.3_SATA_ICH
+V3.3S_VCCPCORE_ICH

+V3.3S_IDE_ICH

C395

C395
.1U_4

.1U_4

+V3.3S_PCI_ICH

C372

C372
.1U_4

.1U_4

+3V_1.5V_HDA_IO_ICH
+VCCSUSHDA
TP_VCCSUS1_05_ICH_1

TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2

+V3.3A_ICH

+V3.3A_USB_ICH

R257 0_6R257 0_6

3

+1.05V

R505 0_1206R505 0_1206

A1A:(9/28) EMI suggest C373 from 0.1u to 10uF

C373

C373
10U_8

10U_8

C340

C340

C348

C348

10U_6

10U_6

.01U_4

.01U_4

+1.25V

R451 0_8R451 0_8

C544

C544
22U_8

C379

C379
.1U_4

.1U_4

C345

C345
.1U_4

.1U_4

C415

C415

4.7U_6

4.7U_6

C364

C364
1U_6

1U_6

22U_8

C356

C356
.1U_4

.1U_4

C397

C397
.1U_4

.1U_4

C388

C388
.1U_4

.1U_4

C380

C380
.1U_6

.1U_6

R316 0_6R316 0_6

C369

C369
22N_4

22N_4

R340 0_8R340 0_8

C367

C367
*.1U_4

*.1U_4

+3V

C341

C341
.1U_4

.1U_4

C545

C545
.1U_4

.1U_4

R286 0_6R286 0_6

R313 *0_6R313 *0_6

A1A:(10/25) Add +1.5V_S5

TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2

TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH

L27

L27
1UH_1210

1UH_1210

<Description>

<Description>

R216 0_6R216 0_6

C541

C541

4.7U_6

4.7U_6

R213 0_6R213 0_6
R326 0_6R326 0_6

R302 0_6R302 0_6
R303 0_6R303 0_6
R309 0_6R309 0_6

+3V_S5

2

R239 1_8R239 1_8

+3V_S5
+1.5V_S5

C365 .1U_6C365 .1U_6
C371 .1U_6C371 .1U_6

C391 .1U_6C391 .1U_6
C362 .1U_6C362 .1U_6

2

+1.5V

+1.05V

+3V

A1A:(10/30) change to +1.5V

R287 0_6R287 0_6
R308 *0_6R308 *0_6

C377

C377
.1U_4

.1U_4

T62T62
T65T65
T58T58

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

A23

AA2
AA7

A25

AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29

AD3

AD4

AD6

AE1
AE12

AE2
AE22

AD1
AE25

AE5

AE6

AE9
AF14
AF16
AF18

AF3

AF4
AG5
AG6

AH10
AH13
AH16
AH19

AH2

AF28
AH22
AH24
AH26

AH3
AH4
AH8

AJ5

B11

B14

B17

B20

B22

C24

C26

C27

D12

D15

D18

+3V
+1.5V

ICH8M Power(4 of 4)

ICH8M Power(4 of 4)

ICH8M Power(4 of 4)

E21

E24

F15

E23

F28

F29

G10
G13
G19
G23
G25
G26
G27

H25

H28

H29

J25

J26

J27

K23

K28

K29

Quanta Computer Inc.

Quanta Computer Inc.

1

U32E

U32E

VSS[001]

A5

VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]

B2

VSS[052]
VSS[053]
VSS[054]

B8

VSS[055]
VSS[056]
VSS[057]
VSS[058]

C6

VSS[059]
VSS[060]
VSS[061]
VSS[062]

D2

VSS[063]

D4

VSS[064]
VSS[065]
VSS[066]

E4

VSS[067]

E9

VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]

F7

VSS[073]

G1

VSS[074]

E2

VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]

H3

VSS[086]

H6

VSS[087]

J1

VSS[088]
VSS[089]
VSS[090]
VSS[091]

J4

VSS[092]

J5

VSS[093]
VSS[094]
VSS[095]
VSS[096]

K3

VSS[097]

K6

VSS[098]

ICH8M REV 1.0

ICH8M REV 1.0

PROJECT : ZU1

PROJECT : ZU1

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

1

VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

3B

3B

17 39Tuesday, April 10, 2007

17 39Tuesday, April 10, 2007

17 39Tuesday, April 10, 2007

3B

of

of

of

http://mycomp.su/x/

5

Giga LAN BCN5787M

A1A:(9/27) Change +3V_LAN_S5 to +3V_S5

D D

C61

C61

C122

C122

.1U-16V_4

.1U-16V_4

.1U-16V_4

.1U-16V_4

C71

C71

C67

C67

4.7U-10V_8

4.7U-10V_8

.1U-16V_4

.1U-16V_4

L10 BLM11A601S_6L10 BLM11A601S_6

L12 BLM11A601S_6L12 BLM11A601S_6 C455

VAUX_12

C C

PCIE_WAKE#16,27

A1A:(9/1 BCM recommend)
Pull up Vmainprsnt (U10/Pin53) to the system main power (3.3v),
but not the standby power .

LOW_PWR28

D3A:(1/21) Add CableSence circuit (unstuff R78)
E3A:(3/21) Stuff R78 (Disable LAN Low Power mode)

B B

A A

E3A:(3/30) Base on PM suggestion,
add serial 0 ohm (R806) for debug use.
(default : no stuff)

+3V_S5

Q17

Q17

2

DTC144EUA

DTC144EUA

13

R806 *0_4R806 *0_4

5

R80

R80

4.7K_4

4.7K_4

PCIE_WAKE_R#

PCIE_RXP315
PCIE_RXN315

PCIE_TXP315
PCIE_TXN315

PLTRST#15,16,21,25,26,27,28,30,33
CLK_PCIE_LAN2
CLK_PCIE_LAN#2

R78

R78

4.7K_4

4.7K_4

L13 BLM11A601S_6L13 BLM11A601S_6

L9 BLM11A601S_6L9 BLM11A601S_6

+3V_S5

+3V

C94 27P-50V_4C94 27P-50V_4

C114 27P-50V_4C114 27P-50V_4

A1A: (9/1 BCM recommend)
Change pull-up resistor value to 47-k. at pin 58 (SMB)CLK)
and pin 57 (SMB_DATA) as the SM-Bus isn't used.

A1A: (9/1 BCM recommend) change R42 to 1.24k as default

C2A: (12/12) base on BCM IEEE test result, change RDAC value from 1.24k to 1.18k

C123

C123

.1U-16V_4

.1U-16V_4

C121

C121

.1U-16V_4

.1U-16V_4

R79 0_4R79 0_4

PCLK_SMB2,13,16,27,33
PDAT_SMB2,13,16,27,33

XTALO_R

Y1
25MhzY125Mhz

VAUX_12

C82

C82

.1U-16V_4

.1U-16V_4

VAUX_12

C79

C79

.1U-16V_4

.1U-16V_4

C58

C58

4.7U-10V_8

4.7U-10V_8

C57

C57

4.7U-10V_8

4.7U-10V_8

C77

C77

4.7U-10V_8

4.7U-10V_8

C66

C66

4.7U-10V_8

4.7U-10V_8

C85 .1U-16V_4C85 .1U-16V_4
C88 .1U-16V_4C88 .1U-16V_4

R377 1K_4R377 1K_4
R378 1K_4R378 1K_4

R60 200_4R60 200_4

C92

C92
.1U-16V_4

.1U-16V_4

C89

C89
.1U-16V_4

.1U-16V_4

4

+3V_S5

C456

C456

C468

C467

C467

C457

C457

4.7U-10V_8

4.7U-10V_8

.1U-16V_4

.1U-16V_4

U10

U10

BCM5787MKMLG

BCM5787MKMLG

VAUX_12

5

VDDC

13

VDDC

20
34
55

AVDDL

C62

C62
.1U-16V_4

.1U-16V_4

GPHY_PLLVDD

C68

C68
.1U-16V_4

.1U-16V_4

PCIE_PLLVDD

C80

C80
.1U-16V_4

.1U-16V_4

PCIE_SDS_VDD

C75

C75
.1U-16V_4

.1U-16V_4

PCIE_WAKE_R#

60
39

44
46
51

35

30

27
33

24

TXDP_C

26

TXDN_C

25
31
32
12

-LAN_RST

10
29
28

AUX_PRES

54

VMA_PRES

53

LAN_SMBC

58

LAN_SMBD CS#

57

XTALO

22

XTALI

21

RDAC

37

R42

R42

1.18K_6

1.18K_6

11

T74T74

VDDC
VDDC
VDDC
VDDC

AVDDL
AVDDL
AVDDL
AVDDL

GPHY_PLLVDD

PCIE_PLLVDD

PCIE_VDD
PCIE_VDD

PCIE_GND

PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
REFCLK+
REFCLK-

VAUXPRSNT
VMAINPRSNT

3

LOW_PWR
SMB_CLK

SMB_DATA
XTALO

XTALI
RDAC

NC(CLK_REQ#)

VDDIO6VDDIO15VDDIO19VDDIO56VDDIO

BCM5787M

BCM5787M

+3V_S5

C468

.1U-16V_4

.1U-16V_4

.1U-16V_4

.1U-16V_4

61

10mm X 10mm

10mm X 10mm
68-Pin QFN

68-Pin QFN

Package Body

GND

69

CS# SI BCM_SCL

R61

R61

4.7K_4

4.7K_4

CS#

C460

C460

.1U-16V_4

.1U-16V_4

68

BIASVDD

VDDP17VDDP

XTALVDD

TRD3­TRD3+

TRD2­TRD2+

TRD1­TRD1+

TRD0­TRD0+

LINKLED#

SPD100LED#
SPD1000LED#
TRAFFICLED#

GPIO2

UART_MODE

GPIO1_SERIALDI

GPIO0_SERIALDO

NC/(ENERGY_DET)

REGCTL25

REGCTL12

REG_GND

R379

R379
*4.7K_4

*4.7K_4

EEPROM Strapping

SO SI CS# SCLK

24c64

1101

AT45DB011B

4

1110

VAUX_25

AVDD
AVDD
AVDD

SCLK

CS#

R380

R380

4.7K_4

4.7K_4

SI

SO

D11 BAS316D11 BAS316

LINKLED#

D10 BAS316D10 BAS316

100#

D9 BAS316D9 BAS316

1000#

VDDP+AVDD)

C459

C459

.1U-16V_4

.1U-16V_4

BIASVDD

C65

C65

.1U-16V_4

.1U-16V_4

36

XTALVDD

23

C458

C458

38

.1U-16V_4

.1U-16V_4

AVDD_F14

45
52

.1U-16V_4

.1U-16V_4

49
50

48
47

42
43

41
40

LINKLED#

2

100#

1

1000#

67

LAN_MB_ACTLED#

66
8

T72T72

9

T73T73

7

T3T3

4

T2T2

65

SI

63
64
62

R579

R579

59

0_4

0_4

LAN REGCTL25

18

LAN REGCTL12

14

16

R72

R72
*4.7K_4

*4.7K_4

3

LAN_MB_LINKLED#

21
21
21

VAUX_25

A1A:(9/20) the chip already integrate
internal terminators

TX3N
TX3P

TX2N
TX2P

TX1N
TX1P

TX0N
TX0P

+3V_S5

R66

R66

R38

R38

R29

R29

4.7K_4

4.7K_4

4.7K_4

4.7K_4

Q9
MMJT9435Q9MMJT9435

2 3

4

MMJT9435

MMJT9435

2 3

4

.1U-16V_4

.1U-16V_4

R30 1.5_1206R30 1.5_1206

R47 *1_1206R47 *1_1206

A1A: (9/1 BCM recommend)
stuff R30,no stuff R47(in order to pull up C90,C86 and Q16/pin 3 to
3V_LAN rail)

R382

R382

4.7K_4

4.7K_4

*4.7K_4

*4.7K_4

A1A: (9/20) Internal PU

BCM_SCL
BCM_RESET#

ENERGY_DET 28

C54

C54

.1U-16V_4

.1U-16V_4

LAN_REG1_2V

C90

C90

Q16

Q16

.1U-16V_4

.1U-16V_4

C93

C93

C104

C104
10U-6.3V_8

10U-6.3V_8

1
2
3
4

D3A:(1/21) Add CableSence circuit (reserve R579)

C44

C44

4.7U-10V_8

4.7U-10V_8

C86

C86

10U/10V_8

10U/10V_8

A1A: (9/1 BCM recommend)
Change capacitance value from 47-uF to 10-uF.

VAUX_12

+3V_S5

VAUX_25

C455

BCM_WP

BCM_RESET#

BCM_SCL
BCM_SDA

LAN_REG1_2V

L11 BLM11A601S_6L11 BLM11A601S_6

L48 BLM11A601S_6L48 BLM11A601S_6

L14 BLM11A601S_6L14 BLM11A601S_6

C63

C63
.1U-16V_4

.1U-16V_4

1

1

3

U5

U5

SI
SCK
RESET#
CS#

AT45DB011B-SC(LAN FLASH)

AT45DB011B-SC(LAN FLASH)

C53

C53

.1U-16V_4

.1U-16V_4

SO
GND
VCC
WP#

C51

C51
47U-6.3V_1210

47U-6.3V_1210

8
7
6
5

2

C46

C46

C59

C59

.1U_4

.1U_4

10U_8

A1A:(9/28) EMI suggest C59 from 0.1u to 10uF

SIBCM_SDA

BCM_WPCS#

+3V_S5

VAUX_25

10U_8

+3V_S5

R376

R376

10K_4

10K_4

DOCKIN#16,33

.1U-16V_4

.1U-16V_4

C52

C52

+3V_S5

D4 BAS316D4 BAS316

A1A: (9/20) Add Diode for isolation

A1A: 9/6 chnage from MAX4892 to PI3L500

D3A:(1/31) Don't use AL000500005 and use AL000500030 only(change to 8KV solution)

VAUX_25

L8

L8

A1A:(10/11)
Change the pin name from GND to MGND

A1A:(9/20) change from
LAN_MB_ACTLED#, LAN_MB_LINKLED# to
SYS_ACTLED#, SYS_LINKLED#

C2A:(12/28) EMI request: reserve .1U for EMI Solution

2

TX0P
TX0N

TX1P
TX1N

TX2P
TX2N

TX3P
TX3N

LAN_MB_ACTLED#
LAN_MB_LINKLED#

LAN_DOCKIN#

0: A to B1
1: A to B2

BLM11A601S_6

BLM11A601S_6

C449

C449
.1U-16V_4

.1U-16V_4

C450

C450
.1U-16V_4

.1U-16V_4

+3V_S5

+3V_S5

1

+3V_S5

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

19

LED0

20

LED1

54

LED2

17

SEL

5

NC

C42

C42
.1U-16V_4

.1U-16V_4

C38

C38
.1U-16V_4

.1U-16V_4

R369 220_4R369 220_4

SYS_ACTLED#

R368 220_4R368 220_4

SYS_LINKLED#

+3V_2.5V_LAN
TX0P_SYS
TX0N_SYS

+3V_2.5V_LAN
TX1P_SYS
TX1N_SYS

+3V_2.5V_LAN
TX2P_SYS
TX2N_SYS

+3V_2.5V_LAN
TX3P_SYS
TX3N_SYS

*.1U-16V_4

*.1U-16V_4

A1A: (9/20) Change from +3V_S5 to +3V_LAN_S5

4

10

18

27

9

38

6

1

56

50

VDD1

VDD2

VDD3

VDD4

PI3L500

PI3L500

GND00

GND0116GND0221GND0324GND04

13

MGND

X-TX3N
X-TX3P
X-TX1N
X-TX2N
X-TX2P
X-TX1P
X-TX0N
X-TX0P

C651

C651

0B1

VDD5

VDD7

VDD6

1B1

GND13

GND12

GND11

2B1
3B1

4B1
5B1

6B1
7B1

0LED1
1LED1
2LED1

0B2
1B2

2B2
3B2

4B2
5B2

6B2
7B2

0LED2
1LED2
2LED2

GND05

GND06

GND07

GND08

GND09

GND10

33

39

44

49

53

55

28

U3

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

6

TD2-

MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

NS892402PU3NS892402P

C31

C31
1500P-2KV_1808

1500P-2KV_1808

CN19

CN19

11

YELLOW__P

12

YELLOW_N

1

RX2-

2

RX2+

3

RX1-

4

TX2-

GND1

5

TX2+

GND2

6

RX1+

7

TX1-

8

TX1+

9

GREEN_P

A1A:(10/11)
Change the pin name from GND to MGND in CN26.13

10

GREEN_N

C109

C109

*.1U-16V_4

*.1U-16V_4

AOP_C100D8-108A4-L

AOP_C100D8-108A4-L

TX0P_PR

48

TX0N_PR

47

TX1P_PR

43

TX1N_PR

42

TX2P_PR

37

TX2N_PR

36

TX3P_PR

32

TX3N_PR

31
22

23
52

TX0P_SYS

46

TX0N_SYS

45

TX1P_SYS

41

TX1N_SYS

40

TX2P_SYS

35

TX2N_SYS

34

TX3P_SYS

30

TX3N_SYS

29

SYS_ACTLED#

25

SYS_LINKLED#

26
51

A1A:(9/20) Add SYS_ACTLED#,
SYS_LINKLED#

U6

U6
PI3L500 (LAN SW)

PI3L500 (LAN SW)

24
23
22

21
20
19

18
17
16

15
14
13

R28

R28

R27

R27

75_4

75_4

75_4

75_4

13
14

A1A:(9/21) Change CONN (refer to ZC1)

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

GigaLAN (BCM5787M) / RJ45

GigaLAN (BCM5787M) / RJ45

GigaLAN (BCM5787M) / RJ45

1

to Docking

TX0P_PR 33
TX0N_PR 33

TX1P_PR 33
TX1N_PR 33

TX2P_PR 33
TX2N_PR 33

TX3P_PR 33
TX3N_PR 33

LAN_ACTLED# 33
LAN_LILED# 33

X-TX0P
X-TX0N

X-TX1P
X-TX1N

X-TX2P
X-TX2N

X-TX3P
X-TX3N

R26

R26

R25

R25

75_4

75_4

75_4

75_4

C445 .1U-10V_4C445 .1U-10V_4
C11 .01U-16V_4C11 .01U-16V_4
C36 1500P-2KV_1808C36 1500P-2KV_1808

18 39Tuesday, April 10, 2007

18 39Tuesday, April 10, 2007

18 39Tuesday, April 10, 2007

of

of

of

MGND

3B

3B

3B

http://mycomp.su/x/

1

2

3

4

5

6

7

8

CRT Select

A A

U4

INT_CRT_RED6
INT_CRT_GRN6
INT_CRT_BLU6

PR_INSERT_5V20,33

SEL

FUNCTION

LOW

B B

IN_0

IN_1HIGH

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU

PR_INSERT_5V

U4

C_A4A0

7

C_B

9

C_C

12

C_D

1

SE

15

EN#

A1A: (9/20) Remove NEZ@ ciucuit

VCC

A1
B0

B1
C0
C1
D0
D1

GND

SN74CBTLV3257PWR

SN74CBTLV3257PWR

16
2
3
5
6
11
10
14
13

8

SYS_VGA_RED
SYS_VGA_GRN
SYS_VGA_BLU

DOCK_R 33
DOCK_G 33
DOCK_B 33

D3A:(2/12) Reserve R525 for docking CRT flicker issue

R525 0_6R525 0_6

C41

C41
.1U_4

.1U_4

+5V

CRT CONNECTOR AND ESD

C8 .1U_4C8 .1U_4

D1 SSM14D1 SSM14
C652

C652
.1U_4

.1U_4

L5 BLM18BA470SN1(47,300MA)L5 BLM18BA470SN1(47,300MA)
L4 BLM18BA470SN1(47,300MA)L4 BLM18BA470SN1(47,300MA)
L6 BLM18BA470SN1(47,300MA)L6 BLM18BA470SN1(47,300MA)

C15

C15

C16

R7
150_4R7150_4

D3A:(11/30) EMI issue.
Change L4,L5,L6 from CX8BA220007 to CX8BA470003

C98

C98

.1U_4

.1U_4

C16

C17

10P_4

10P_4

1
7

8
2

3
4
5

6

C17

10P_4

10P_4

10P_4

10P_4

A1A: (9/20) change name from CRTVDD3 to +5V

U1

VCC_SYNC
VCC_DDC

BYP
VCC_VIDEO

VIDEO_1
VIDEO_2
VIDEO_3

GND

IP4772U1IP4772

A1A: (9/20) change from 39ohm to 0 ohm

16

SYNC_OUT2

14

SYNC_OUT1

15

SYNC_IN2

13

SYNC_IN1

10

DDC_IN1

11

DDC_IN2

9

DDC_OUT1

12

DDC_OUT2

CRTVSYNC1
CRTHSYNC1

INT_VSYNC
INT_HSYNC

INT_CRT_DDCCLK
INT_CRT_DDCDAT

DDCCLK_1
DDCDAT_1

CM2009: AL002009W01
IP4772: AL004772000

2

CRTVDD3

CRT_R1
CRT_G1
CRT_B1

C6
10P_4C610P_4C510P_4C510P_4

C4
10P_4C410P_4

A1A:(9/21) Change CONN P/N (Follow ZC1)

R16 2.2K_4R16 2.2K_4
R17 2.2K_4R17 2.2K_4

L43 BLM18BA220SN1_6L43 BLM18BA220SN1_6
L44 BLM18BA220SN1_6L44 BLM18BA220SN1_6

R12 0_4R12 0_4
R10 0_4R10 0_4

A1A:change from 2.7k to 2.2k

CRT_SENSE#_L

DOCK_VSYNC 33
DOCK_HSYNC 33

R5
150_4R5150_4

C25

C25

.1U_4

.1U_4

C23 .22U/25V_6C23 .22U/25V_6

C22

C22

.1U_4

.1U_4

INT_CRT_DDCCLK6
INT_CRT_DDCDAT6

CRT_R1
CRT_G1
CRT_B1

INT_HSYNC6
INT_VSYNC6

1

+5V

R6
150_4R6150_4

+5V

D3A:(2/12) EMI suggest add C652(0.1uF)

SYS_VGA_RED
SYS_VGA_GRN
SYS_VGA_BLU

C C

D3A:(2/12) Reserve C98 for docking CRT flicker issue

+5V

+3V

D D

A1A:(10/18) Change net name:
from SYS_VGA_RED to CRT_R1
from SYS_VGA_GRN to CRT_G1
from SYS_VGA_BLU to CRT_B1

CRT_SENSE#_L

A1A:(10/18) Change CRT_SENSE# from
CRT CONN Pin11 to Pin5

CN18

CN18

1617

SUY_070546FR015S200ZR

SUY_070546FR015S200ZR

6

111

7

12

2
8

13

3
9

14

4

10

15

5

+5V

R371

R371

R370

R370

+3V

3

2.7K_4

2.7K_4

2.7K_4

2.7K_4

A1A: (9/20) change to 30 ~ 50p, default: don't stuff

D37 MTW355D37 MTW355

E3A:(3/29) Stuff D38 for ESD issue

CRTVSYNC
CRTHSYNC

C439

C439

C440

C440

*47P-50V_4

*47P-50V_4

*47P-50V_4

*47P-50V_4

C7
*47P-50V_4C7*47P-50V_4

4

CRT_SENSE# 15,28,33

D38

D38
MTW355

MTW355

RESERVE FOR ESD

DOCK_DDCK 33
DOCK_DDDA 33

C441

C441

to Docking

*47P-50V_4

*47P-50V_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CRT

CRT

CRT

Date: Sheet

Date: Sheet of

5

6

Date: Sheet of

7

Quanta Computer Inc.

of

19 39Tuesday, April 10, 2007

19 39Tuesday, April 10, 2007

19 39Tuesday, April 10, 2007

8

3B

3B

3B

http://mycomp.su/x/

5

LVDS

B1C: (11/20)
(1) change PWM control from 965GM to EC
(2) Short L7, un-stuff C28 (L-C filter will impact PWM signal)
(3)stuff R13,no stuff R15

C2A:(12/28) EMI request: reserve L-C footprint for debug use (R52,C650)
D3A:(2/12) Stuff R15, Change PWM control from EC to 965GM
D3A:(2/14) Acer inform no support DPST in C build, remove R15 E3A:(3/14)Change MB LCD connector pin define(CN2) and LCD cable pin define to cover production line issue

A1A:(10/2) change from USB7 to USB8

D D

A1A: (9/20) Come from 965GM for PWM control

INT_LVDS_PWM6

CONTRAST28

E3A:(3/15) Link C650 from DMIC-CLK to DMIC-CLK_1

C C

DMIC-CLK31

A1A(10/5):Change C12 from CH6102M9900
to CH61004M3E5 (refer to ZC3)
E3A:(4/3) EOL issue change from CH61004M3E5 to CH61004M398

INT_LVDS_DIGON6

<demo circuit>
Crestline suggest 100K
G73 suggest 10K(ZS1 Default)
8/27 change back to 100K

USBP8-15
USBP8+15

R15 *0_4R15 *0_4
R13 0_4R13 0_4

C28 *.1U_4C28 *.1U_4

DMIC-CLK DMIC-CLK_1

R52 0_4R52 0_4

C24

C24
.1U_4

.1U_4

INT_LVDS_EDIDCLK6

R20 0_4R20 0_4

INT_LVDS_EDIDDATA6

C650

C650
*10P_4

*10P_4

VIN

10U-25V_1210

10U-25V_1210

+3V

DISP_ON

R14

R14
100K_4

100K_4

INT_TXLOUT2-6

INT_TXLOUT2+6

INT_TXLOUT1-6

INT_TXLOUT1+6

INT_TXLOUT0-6

INT_TXLOUT0+6

INT_TXLCLKOUT-6
INT_TXLCLKOUT+6

+3V

DMIC-1231

12

C12

C12

+

+

U2

6

IN

4

IN

3

ON/OFF

AAT4280U2AAT4280

INT_TXLOUT2­INT_TXLOUT2+

INT_TXLOUT1­INT_TXLOUT1+

INT_TXLOUT0­INT_TXLOUT0+

INT_TXLCLKOUT­INT_TXLCLKOUT+

INT_LVDS_EDIDCLK

T142T142

T143T143

USBP8-_CN
USBP8+_CN

INT_LVDS_EDIDDATA

DISPON

CCD_POWER

DMIC-12
LCDVCC

C13

C13

1000P_4

1000P_4

OUT
GND
GND

D3A:(2/12)
change U2 from AL004280000(AAT4280IGU-3-T1) to AL004280018(AAT4280IGU-1-T1).
rise time of LCDVCC is >0.5ms and <=10ms.
AL004280018 can meet this spec

4

CN2

CN2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

(Inverter short with signal to burn system)->ZR1 issue

21

21

(1)pin 27,29->NC

23

23

(2)pin 28,30->INVCC(VIN)->same as C build

25

25

(3)pin 8->INT_LVDS_EDIDDATA

27

27

29

29

2

2

4

4

6

6

8

8

10

VADJNEW

INVCC0

+3V

C14

C14
1000P_4

1000P_4

1
2
5

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

31

28

31

30

32

30

32

ACS_88242-3001

ACS_88242-3001

A1A: (9/20) Change LVDS CONN to 30pin
(9/21)change footprint to 88242-3000-30P-RUV

LCDVCC_1 LCDVCC

C27

C27

.1U_4

.1U_4

R18 0_8R18 0_8

C29

C29

10U_8

10U_8

C26

C26
.1U_4

.1U_4

C18

C18
.01U_4

.01U_4

C20

C20
10U_8

10U_8

3

2

1

CAMERA MODULE

1

+3V

R11

R11

2.2K_4

2.2K_4

INT_LVDS_EDIDCLK6

INT_LVDS_EDIDDATA6

INT_LVDS_EDIDCLK

+3V

R9

2.2K_4R92.2K_4

INT_LVDS_EDIDDATA

+3V

3

Q1

2

AO3413Q1AO3413

CCD_POWER

+

+

C30 10U_8

C30 10U_8R19 0_4R19 0_4
C444 1000P_4C444 1000P_4

+3V

R21

R21

4.7K_4

4.7K_4

BECAUSE UR'S SUGGESTION,
ACTICE CHANGE FROM LOW TO HIGH.

2

Q2

1 3

DTC144EUQ2DTC144EUR8 0_8R8 0_8

CCD_POWERON 28

TV Out (SVHS) MiniDIN 7-pin MR Sensor

D3A:(2/12) Follow ZO1 design,
Remove R24 footprint, DEL D3(BC000316Z07).
Add R73,Q36,Q37

TV-CHROMA

3

B B

INT_TV_Y/G6
INT_TV_C/R6

INT_TV_COMP6

C19

C19

6P_4

6P_4

PR_INSERT_5V

BLM18PG181SN1D_6

BLM18PG181SN1D_6

TV-CHROMA SYS_TV_Y/GSYS_TV_C/R

C3

6P_4C36P_4

PR_INSERT_5V19,33

SEL

FUNCTION

LOW

A A

R2
150_4R2150_4

IN_0

IN_1HIGH

L3

L3

A1A:(9/21) Change CONN (Follow ZC1)

5

U8

U8

C_A4A0

7

C_B

9

C_C

12

C_D

1

SE

15

EN#

VCC

A1
B0
B1
C0
C1
D0
D1

GND

SN74CBTLV3257PWR

SN74CBTLV3257PWR

16
2
3
5
6
11
10
14
13

8

A1A: (9/20) Remove "NEZ@" circuit

CN17

CN17

6

6

9

9

3

7

7

SUY_030107FR007S112FR

SUY_030107FR007S112FR

5

5

TV-LUMA

4

4

8

8

13

2

2

SYS_TV_Y/G
SYS_TV_C/R
SYS_TV_COMP

L1 BLM18PG181SN1D_6L1 BLM18PG181SN1D_6

C1

6P_4C16P_4

L2 BLM18PG181SN1D_6L2 BLM18PG181SN1D_6

C2

6P_4C26P_4

4

DOCK_TV_Y/G 33
DOCK_TV_C/R 33
DOCK_TV_COMP 33

C9

6P_4C96P_4

C10

C10

6P_4

6P_4

R3
150_4R3150_4

SYS_TV_COMPTV-COMP

R4

150_4R4150_4

C78

C78
.1U_4

.1U_4

+5V

+3V

TV-LUMA

+3V

TV-COMP

+3V

3

2

1

D35

D35
*DA204U

*DA204U

INT_LVDS_BLON6

3

2

1

D36

D36
*DA204U

*DA204U

3

2

1

D34

D34
*DA204U

*DA204U

INT_LVDS_BLON

2

R23

R23

100K_4

100K_4

+3V

3

2

1

D3A:(2/12) system sometimes will no backlight issue .
For short term solution:
change R22 from 10k(CS31002JB28) to 1K (CS21002FB24)

R22

R22

R73

R73

1K_4

1K_4

10K_4

10K_4

BL#

Q37

Q37
2N7002

2N7002

Q36

Q36
2N7002

2N7002

DISPON

3

2

1

D2

BAS316D2BAS316

2

Q3

Q3

1 3

DTC144EUA

DTC144EUA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LVDS/MR senseor/SVIDEO

LVDS/MR senseor/SVIDEO

LVDS/MR senseor/SVIDEO

Date: Sheet

Date: Sheet of

Date: Sheet of

MR# 16,28,29

LID591# 16,28,29

EC_FPBACK# 28

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

20 39Tuesday, April 10, 2007

20 39Tuesday, April 10, 2007

1

20 39Tuesday, April 10, 2007

3B

3B

3B

of

http://mycomp.su/x/

5

4

3

2

1

SDVO-DVI

SDVOB_R+6
SDVOB_R-6

SDVOB_G+6
SDVOB_G-6

SDVOB_B+6
SDVOB_B-6

SDVOB_CLK+6

D D

AS->Address Select (Internal pull-up)
This pin determines the serial port address of the device (0,1,1,1,0,0,AS*,0).
When AS is low the address is 72h, when high the address is 70h.

R62 10K_4R62 10K_4

+2.5V

L46 BLM11A601S_6L46 BLM11A601S_6

+3V +2.5V

L47 BLM11A601S_6L47 BLM11A601S_6

+2.5V

C C

C108

C108
.1U_4

.1U_4

C87

C87
.1U_4

.1U_4

DVI_AVDD_PLL

C115

C115
10U_8

10U_8

DVI_DVDD

C91

C91
.1U_4

.1U_4

C81

C81
10U_8

10U_8

SDVO_CTRLCLK6

SDVO_CTRLDATA6

SDVOB_CLK-6

R63 *100K_4R63 *100K_4

PLTRST#15,16,18,25,26,27,28,30,33

AS

DOCK_DDC_DT33
DOCK_DDC_CK33

to Docking

DVI_CLK-33
DVI_CLK+33

DVI_D0-33
DVI_D0+33

DVI_D1-33
DVI_D1+33

DVI_D2-33
DVI_D2+33

1
2
3
4
5
6
7
8

9
10
11
12

CH7307C-DEF

CH7307C-DEF

DVI_AVDD

DVI_AVDD

48

U12

U12

AVDD3

AVDD_PLL
RESET*
AS
SPC
SPD
AGND_PLL
DGND1
SD_PROM
SC_PROM
SD_DDC
SC_DDC
DVDD1

TLC*13TLC14TVDD115TDC0*16TDC017TGND118TDC1*19TDC120TVDD221TDC2*22TDC223TGND2

47

46

45

43

40

39

38

44

42

41

37

AVDD2

AGND3

AGND2

SDVOB_B-

SDVOB_R-

SDVOB_G-

SDVOB_B+

SDVOB_R+

SDVOB_CLK-

SDVOB_G+

SDVOB_CLK+

AVDD1
BSCAN

SDVOB_INT-

SDVOB_INT+

AGND1
DGND2

HPDET

DVDD2
PROM2
PROM1

VSWING

24

RSV

36
35
34
33
32
31
30
29
28
27
26
25

DVI_AVDD

INT­INT+

TMDS_HPD
DVI_DVDD

DVI_TVDD

R50

R50

1.2K_4

1.2K_4

R56 4.7K_4R56 4.7K_4

+2.5V

R51 4.7K_4R51 4.7K_4

+2.5V

NB internal PD for SDVO is not implement
Nedd external PU for SDVO exist

INT-

C107 .1U_4C107 .1U_4

INT+

C97 .1U_4C97 .1U_4

C111

C125

C125
.1U_4

.1U_4

C111
.1U_4

.1U_4

C73

C73
.1U_4

.1U_4

C124

C124
.1U_4

.1U_4

C72

C72
.1U_4

.1U_4

SDVO_CTRLCLK

SDVO_CTRLDATA

L16 BLM11A601S_6L16 BLM11A601S_6

C117

C117
10U_8

10U_8

L45 BLM11A601S_6L45 BLM11A601S_6

C74

C74

10U_8

10U_8

A1A:(9/21) Change R51,R56 value from 2.2k to 4.7k.
(FAE suggest R value from 4K~9K)

C2A:(12/12)Follow Intel New Guideline(MoW 48 update)
Change R51,R56 from 4.7K to 3.9K ohm

D3A:(2/6)
change R51,R56 from 3.9k(CS23902FB14) to 4.7k(CS24702JB38).
fix ZU1 docking sometimes can't detect DVI device issue

PEG_RXN1 6
PEG_RXP1 6

+3V

+3V+3V

R574

R574

10K_4

B B

D3A:(1/30) remove U13,R68,R75,R73,C98

A A

1/16 confirm with CHRONTEL FAE,
he said we can remove CH9901 (U13),
If ZU1 need support HDCP,
just need change controller from CH7307 to CH7313.
CH7313 already integrated HDCP function, no need external EEPROM.

5

4

C2A:(12/22) confrim with FAE ->
Due to Intel VBIOS already integrate the EEPROM function.
ZU1 will remove the U11,R57,R52,C109 to save layout space.

3

TMDS_HPD

2N7002

2N7002

10K_4

3

Q33

Q33

C2A:(12/12) Intel suggest:Add hotplug circuit to DVI_DET (follow ZC1)

2

2N7002

2N7002

1

R575

R575
100K_4

100K_4

3

Q35

Q35

2

DVI_DET

2

1

DVI_DET 33

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

DVI (CH7307)

DVI (CH7307)

DVI (CH7307)

21 38Tuesday, April 10, 2007

21 38Tuesday, April 10, 2007

21 38Tuesday, April 10, 2007

of

of

1

of

3B

3B

3B

http://mycomp.su/x/

+3V

C532

C532

C534

C534

.1U_4

.1U_4

.1U_4

.1U_4

C535

C535

C536

D D

VCCD0#
VCCD1#

C C

AVCC AVPP

+5V +3V

B B

C536

.1U_4

.1U_4

.1U_4

.1U_4

C283

C283

C282

C282

.1U_4

.1U_4

.1U_4

.1U_4

+5V +3V +3V

C530

C530

C298

C298

4.7U_6

4.7U_6

.1U_4

.1U_4

C313

C313

C312

C312

.1U_4

.1U_4

4.7U_6

4.7U_6

5

C531

C531
.1U_4

.1U_4

C295

C295
.1U_4

.1U_4

U18

U18

1

VCCD0#

2

VCCD1#

3

3.3V

4

3.3V

5

5V

6

5V

7

GND

8

OC#

ENE CP-2211

ENE CP-2211

C285

C285

4.7U_6

4.7U_6

C311

C311

4.7U_6

4.7U_6

C537

C537
.1U_4

.1U_4

C303

C303
.1U_4

.1U_4

SHDN#

VPPD0
VPPD1

C286

C286
.1U_4

.1U_4

C296

C296
.1U_4

.1U_4

AVCC
AVCC
AVCC
AVPP

INTA#15

SERIRQ16,23,28,30

PCI_PME#15,23,25

PCI_CLK_CB7142

AD[31..0]15,23,25

16
15
14
13
12
11
10
9

12V

AVCC

C297

C297
.1U_4

.1U_4

AD[31..0]

C538

C538
.1U_4

.1U_4

CBE0#15,23,25
CBE1#15,23,25
CBE2#15,23,25
CBE3#15,23,25

PAR15,23,25

AVPPAVCC

VPPD0
VPPD1

PCIRST#15,23,27

FRAME#15,23,25

TRDY#15,23,25

DEVSEL#15,23,25

PERR#15,23,25
SERR#15,23,25

REQ0#15
GNT0#15

IRDY#15,23,25

STOP#15,23,25

PCI_PME#

PCMSPK_DELAY
PCMSPK

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#
PAR

R190 *22_4R190 *22_4

R805 0_4R805 0_4

R804 *0_4R804 *0_4

REQ0#
GNT0#
AD17

R189 47_4R189 47_4

PCIRST#
PCI_CLK_CB714

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

N8

AD0

K7

AD1

L7

AD2

N7

AD3

M7

AD4

N6

AD5

M6

AD6

K6

AD7

M5

AD8

L5

AD9

K5

AD10

M4

AD11

K4

AD12

N3

AD13

M3

AD14

N2

AD15

J2

AD16

J1

AD17

H4

AD18

H3

AD19

G3

AD20

G2

AD21

F1

AD22

F2

AD23

E2

AD24

E3

AD25

E4

AD26

D1

AD27

D2

AD28

D4

AD29

C1

AD30

C2

AD31

N5

CBE0#

N1

CBE1#

J3

CBE2#

E1

CBE3#

M2

PAR

4

CB_RSMRST#

R445 0_4R445 0_4

L1

M1

L2

STOP#

PERR#L3SERR#

DEVSEL#

GND1D3GND2H2GND3L4GND4M8GND5

PCLK_PCM_RPCI_CLK_CB714

K1

K3

TRDY#

F12

K11

IRDY#

GND6

SERIRQ

PCM_PME#

PCM_IDSEL

J4

H1

FRAME#

GND7

GND8

B6

C10

INTA#

G4

PCICLK

R178 *0_6R178 *0_6
R177 100K_6R177 100K_6

CB_RSMRST#

B1

A1

F4

IDSEL

PCIRST#

PCIGNT#

PCIREQ#

VCC1F3VCC2G1VCC3K2VCC4N4VCC5L6VCC6L9VCC7

H11

*10p_4C302 *10p_4C302

C281

C281
.22U_6

.22U_6

R437

R437

43K_4

43K_4

M10

PCIRST#

G_RST#

VCCA1

G13

+3V

PCM_SUS#

L8

M9

L11

SPKROUT

SUSPEND#

VCCA2A7VCC8

VCC9C8VCC10

B4

D12

+3V

T119T119 T117T117

T118T118

L10

N11

M11

MFUNC5

MFUNC6

RI_OUT#/PME#

3

R572

R572

R567

R567

0_4

0_4

0_4

0_4

T116T116

T115T115

K8

M13

N13

N9

K9

N10

VCCD1#

VCCD0#

MFUNC0

MFUNC1

MFUNC2

MFUNC3

MFUNC4

CAUDIO/BVD2/SPKR#

CBLOCK#/A19

CGNT#/WE#

CINT#/READY/IREQ#

CREQ#/INPACK#

CSTSCHG/BVD1/STSCHG#C5CTRDY#/A22

B5

B8

D6

D11

C11

A2

M12

N12

VPPD1

VPPD0

CDEVSEL#/A21

CPERR#/A14

CSERR#/WAIT#A5CSTOP#/A20

B13

A13

C13

C12

E10

J13

RSVD/D2

RSVD/A18

RSVD/D14

CFRAME#/A23

CIRDY#/A15

B11

A12

L12

A4

D9

CVS1/VS1C6CVS2/VS2

CCD1#/CD1#

CCD2#/CD2#

CCLK/A16

CCLKRUN#/WP/IOIS16#

CRST#/RESET

B9

D5

B12

2

A_CRSVD/D2
A_CRSVD/D14
A_CRSVD/A18

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE0#/CE1#

CCBE1#/A8

CCBE2#/A12

CCBE3#/REG#

CPAR/A13

VCCD1#
VCCD0#

VPPD1
VPPD0

A_CCD1#
A_CCD2#

A_CVS1#
A_CVS2#

U17

U17

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

H13
E11
A11
B7
D13

CB1410

CB1410

A_CRSVD/D2 24
A_CRSVD/D14 24
A_CRSVD/A18 24

A_CCD1# 24
A_CCD2# 24

A_CVS1# 24
A_CVS2# 24

A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0

A_CC/BE0#
A_CC/BE1#
A_CC/BE2#
A_CC/BE3#
A_CPAR

A_CAD[31..0]

A_CC/BE0# 24
A_CC/BE1# 24
A_CC/BE2# 24
A_CC/BE3# 24
A_CPAR 24

1

A_CCD1#
A_CCD2#

A_CAD[31..0] 24

C539

C539

10P_4

10P_4

C533

C533

10P_4

10P_4

+3V

C700

C700
*.1U_4

*.1U_4

A A

2

PCM-1

1

*CHN217

*CHN217

C701

C701

2

*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

1

*CHN217

*CHN217

C706

C706
*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

D41

D41

3

D39

D39

3

5

PCMSPK

C704

C704
*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

PCM-2

C702

C702
*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

PCM-3

R432 *200K/F_4R432 *200K/F_4

PCM-5PCM-4 PCM-5

R571

R571
*86.6K/F_4

*86.6K/F_4

1
2

+3V

53

U41

U41
*TC7SH08FU

*TC7SH08FU

C703

C703

*.1U_4

*.1U_4

4

PCMSPK_DELAY

R577

R577
*10K_4

*10K_4

4

C705

C705
*.1U_4

*.1U_4

+3V AVCC +3V

PCMSPK_DELAY 31

2

A_CCLK

A_CRST#

A_CCLKRUN#

A_CCLK 24
A_CRST# 24
A_CCLKRUN# 24

<OrgName>

<OrgName>

<OrgName>
<OrgAddr1>

<OrgAddr1>

<OrgAddr1>
<OrgAddr2>

<OrgAddr2>

<OrgAddr2>
<OrgAddr3>

<OrgAddr3>

<OrgAddr3>
<OrgAddr4>

<OrgAddr4>

<OrgAddr4>
Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

PCMCIA (ENE CB1410)

PCMCIA (ENE CB1410)

PCMCIA (ENE CB1410)

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

of

of

of

22 39Tuesday, April 10, 2007

22 39Tuesday, April 10, 2007

22 39Tuesday, April 10, 2007

1

3B

3B

3B

R_A_CCLK

R446 10_4R446 10_4

A_CFRAME#

A_CIRDY#

A_CTRDY#

A_CDEVSEL#

A_CSTOP#
A_CPERR#

A_CSERR#
A_CREQ#
A_CGNT#

A_CBLOCK#

A_CINT#

A_CSTSCHG

3

A_CAUDIO

A_CFRAME# 24
A_CIRDY# 24
A_CTRDY# 24
A_CDEVSEL# 24
A_CSTOP# 24
A_CPERR# 24
A_CSERR# 24
A_CREQ# 24
A_CGNT# 24
A_CBLOCK# 24
A_CINT# 24
A_CSTSCHG 24
A_CAUDIO 24

http://mycomp.su/x/

5

ID Select : AD18
Interrupt Pin : INTB#
Request Indicate : REQ1#
Grant Indicate : GNT1#

D D

A1A:(9/22) no stuff R496,R522

GRST# should
connect to Power
On reset if
support S3

C607

C607
.1U_4

.1U_4

C643

C643
.1U_4

.1U_4

C566

C566
.1U_4

.1U_4

AD[31..0]

C636

C636
.1U_4

.1U_4

C645

C645
.1U_4

.1U_4

5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C637

C637
.1U_4

.1U_4

C646

C646
.1U_4

.1U_4

XDCLE/SDDAT224

xDDATA4/SDDAT324

xDALE/SDCMD24

XDWE#/SDCLK24
xDDATA7/SDDAT024
xDDATA0/SDDAT124

REQ1#15
GNT1#15

CBE3#15,22,25

R503 47_4R503 47_4

A1A:(9/22) FAE suggest R value under 47 ohm.

C615

C615

.1U_4

.1U_4

C582

C582

.1U_4

.1U_4

AD[31..0]15,22,25

C C

B B

+3V

C599

C599
.1U_4

.1U_4

C577

C577
.1U_4

A A

.1U_4

C644

C644
.1U_4

.1U_4

4

R496 *0_4R496 *0_4

SDPWREN33#

+3V_CRVCC

+3V

+3V_CRVCC

4

+3V_CRVCC

GND_SD
xDCLE/SDDAT2
xDDATA4/SDDAT3
xDALE/SDCMD
XDWE#/SDCLK
xDDATA7/SDDAT0
xDDATA0/SDDAT1

REQ#
GNT#

AD31
AD30
AD29

AD28
AD27
AD26
AD25
AD24

C/BE3#

510_IDSELAD18

PCI_CLK_5102

C618

C618

.1U_4

.1U_4

XDRE#/MSCLK24

SDWP24
SDCD#24

R522 *0_4R522 *0_4

U39

U39

1

XSDPWR33OZ

2

NC

3

GND_SD

4

SDDAT2SMCLE

5

SDDAT3SMDAT4

6

SDCMDSMALE

7

SDCLKSMWEOZ

8

SDDAT0SMDAT7

9

SDDAT1SMDAT0

10

VCC_SD

11

NC

12

NC

13

NC

14

NC

15

NC

16

PCIREQOZ

17

PCIGNTIZ

18

PCIAD31

19

PCIAD30

20

PCIAD29

21

VSS

22

PCIAD28

23

PCIAD27

24

PCIAD26

25

PCIAD25

26

PCIAD24

27

PCICBE3Z

28

PCIIDSELI

29

VCC

30

NC

31

NC

32

NC

3

118

VSS

XMSCLKOSMREOZ

SDCLKI

+3V

117

XMSDAT3BSMDAT3B

3

116

XMSDAT2BSMDAT5B

SERIRQ
INTB#
GND_SD

+3V_CRVCC

T127T127

111

113

114

115

112

VCC_SD

XMDAT5BSMWPOZ

XMSDAT1BSMDAT6B

XMSDAT0BSMDAT2B

48

AD17

C/BE2#

AD16

SDPWREN33#

xDDATA3/MSDATA3
xDDATA5/MSDATA2
xDDATA2/MSDATA0
XDDATA6/MSDATA1

XDWP#
XDBSY#

PRST#

GND_SD

T126T126

T124T124

SUSPEND#

T125T125

104

109

105

106

107

108

110

GND_SD

XMFUNC4B

XMFUNC5B

XMFUNC6B

XMFUNC7B

XSUSPENDIZ

XMDAT6BSMBSYIZ

PCIFRAMEZ49NC50NC51VCC52PCIIRDYZ53PCITRDYZ

54

55

TRDY#

IRDY#

FRAME#

DEVSEL#

+3V

R573

R573

SERIRQ

T122T122

T123T123

+3V

0_4

0_4

101

102

103

XGRSTIZ

XMFUNC2B

XMFUNC3B

PCIDEVSELZ

PCISTOPZ56PCIPERRZ

57

PERR#

STOP#

SERR#

SERIRQ16,22,28,30

INTB#15 SDPWREN33# 24

+3V

126

128

127

NC

XPMPWR_ENIZ

D3A:(2/12)
(1)no stuff 43K(CS34302JB19):
R562,R527,R533,R538,R539,R565,R561,R540,R498,R497,R500,R552,R555
(2)no stuff 10k(CS31002JB28) : R560
(3) Change R547 from 43k (CS34302JB19) to 8.2k (CS28202JB14)
(4)Change R528 from 10K(CS31002JB28) to 43K(CS34302JB19)

MR510

MR510

AD23

PCIRST#15,22,27

R529 22_4R529 22_4

CBE2#15,22,25

FRAME#15,22,25

IRDY#15,22,25

TRDY#15,22,25

DEVSEL#15,22,25

STOP#15,22,25
PERR#15,22,25
SERR#15,22,25

PAR15,22,25

CBE1#15,22,25

+3V

SDCD#

SDWP

120

122NC123NC124

125

XPMPWR_O

XPMPWR_VCC

PCIAD2333PCIAD2234PCIAD2135PCIAD2036PCIRSTIZ37PCICLKI38PCIAD1939PCIAD1840SDCLKI41VCC42VSS43NC44NC45PCIAD1746PCIAD1647PCICBE2Z

AD22

AD21

119

121

VCC

XSDCDIZ

XSDWPISMWPDIZ

PRST#

AD19

PCI_CLK_510_L

AD18

AD20

A1A:(9/26) For EMI solution

xDDATA3/MSDATA3 24
xDDATA5/MSDATA2 24
xDDATA2/MSDATA0 24
XDDATA6/MSDATA1 24
XDWP# 24
XDBSY# 24

XDCE#

T121T121

98

99

97

100

VSS

VCC

XMDAT4B

XMFUNC1B

XMDAT7BSMCEOZ

PCISERROZ58PCIPAR59PCICBE1Z

VSS61NC62NC63NC

60

PAR

C/BE1#

2

SDCLKI

R534

R534
*0_4

*0_4

+3V

R548

R548

XDCE# 24

A1A:(9/22) XMDAT4B is for 8 bit MMC,remove it.

MFUNC0

VSS

PCIAD0

MSINSIZ

SMCDIZ
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD6
PCIAD7

VCC
VSS

PCIAD8

PCIAD9
PCIAD10
PCIAD11

VCC
PCIAD12
PCIAD13
PCIAD14
PCIAD15

2

NC
NC
NC
NC
NC

R524

R524
*0_4

*0_4

12

C600

C600

*10P_4

*10P_4

96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65

MSBSOSMDAT1

MS_SMPWROZ

RIOUTZ_PMEOZ

PCICBE0Z

64

A1A:(9/26) For EMI solution
(close to MR510)

PCI_CLK_510_L

43K_4

43K_4

SUSPEND#

INTB#

510_PME#

R564 0_4R564 0_4

AD0

AD1
AD2
AD3
AD4
AD5
AD6
AD7

+3V

C/BE0#
AD8
AD9
AD10
AD11

+3V

AD12
AD13
AD14
AD15

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Card Reader (MR510)

Card Reader (MR510)

Card Reader (MR510)

Date: Sheet of

Date: Sheet of

Date: Sheet

1

48MHz Clock

Y6

Y6

3

OUT

2

GND

*TXC-48MHz-30PPM-15Pf

*TXC-48MHz-30PPM-15Pf

A1A:(9/26) Add 22ohm for R490 and 10p for C839
Change Y7 from 50MHz to 48MHz

A1A:(9/28) base on EMI suggest: remove R490,C839

XDDATA1/MSBS

XDPWREN#MSPWREN#

PCI_PME#

R563 43K_4R563 43K_4

MSINX#

XDCD#

CBE0# 15,22,25

XDDATA1/MSBS
xDDATA3/MSDATA3
xDDATA5/MSDATA2
xDDATA2/MSDATA0
XDDATA6/MSDATA1

XDCD#
SDCD#
SDWP

XDWP#
XDCE#
XDWE#/SDCLK
XDBSY#
XDRE#/MSCLK
XDALE/SDCMD
XDCLE/SDDAT2
XDDATA0/SDDAT1
XDDATA4/SDDAT3
XDDATA7/SDDAT0

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

4

VDD

1

OE

+3V

A1A:(9/22) Add PU/PD resister

R562 *43K_4R562 *43K_4
R527 *43K_4R527 *43K_4
R533 *43K_4R533 *43K_4
R538 *43K_4R538 *43K_4
R539 *43K_4R539 *43K_4

R560 *10K_4R560 *10K_4
R565 *43K_4R565 *43K_4
R561 *43K_4R561 *43K_4

R540 *43K_4R540 *43K_4
R556 43K_4R556 43K_4
R499 43K_4R499 43K_4
R547 8.2K_4R547 8.2K_4
R528 43K_4R528 43K_4
R498 *43K_4R498 *43K_4
R497 *43K_4R497 *43K_4
R500 *43K_4R500 *43K_4
R552 *43K_4R552 *43K_4
R555 *43K_4R555 *43K_4

1

+3V

C576

C576
*.01U_4

*.01U_4

XDDATA1/MSBS 24
XDPWREN#MSPWREN# 24

PCI_PME# 15,22,25

MSINX# 24
XDCD# 24

+3V

+3V_CRVCC

of

23 39Tuesday, April 10, 2007

23 39Tuesday, April 10, 2007

23 39Tuesday, April 10, 2007

3B

3B

3B

http://mycomp.su/x/

5

4

3

2

1

AVCC

R438 43K_4R438 43K_4

A_CC/BE0#22

A_CAD1122
A_CAD1222
A_CAD1422

A_CC/BE1#22
A_CPERR#22

A_CGNT#22

A_CIRDY#22

A_CC/BE2#22

A_CAD1822
A_CAD2022
A_CAD2122
A_CAD2222
A_CAD2322
A_CAD2422
A_CAD2522
A_CAD2622
A_CAD2722

A_CAD2922
A_CRSVD/D222
A_CCLKRUN#22

A_CCD1#22

A_CRSVD/D1422

A_CAD1022

A_CVS1#22
A_CAD1322
A_CAD1522
A_CAD1622

A_CRSVD/A1822

A_CBLOCK#22

A_CSTOP#22

A_CDEVSEL#22

A_CTRDY#22

A_CFRAME#22

A_CAD1722
A_CAD1922

A_CVS2#22
A_CRST#22

A_CSERR#22

A_CREQ#22

A_CC/BE3#22

A_CAUDIO22

A_CSTSCHG22

A_CAD2822
A_CAD3022
A_CAD3122
A_CCD2#22

+3V

12

C598

C598
*10P_4

*10P_4

R537 0_4R537 0_4
R536 0_4R536 0_4

A_CAD022
A_CAD122
A_CAD322
A_CAD522
A_CAD722

A_CAD922

A_CPAR22

A_CINT#22

AVCC
AVPP

A_CCLK22

A_CAD222
A_CAD422
A_CAD622

A_CAD822

AVCC
AVPP

+3V +3V

R535

R535

43K_4

43K_4

Main Source:TTN DFHD36MR000

D D

XDBSY#23

XDCE#23
XDCLE/SDDAT223
XDALE/SDCMD23

XDWP#23

XDDATA0/SDDAT123
XDDATA1/MSBS23

C C

XDDATA2/MSDATA023
XDDATA3/MSDATA323
XDDATA4/SDDAT323

XDDATA5/MSDATA223
XDDATA6/MSDATA123
XDDATA7/SDDAT023

XDWE#/SDCLK23

B B

XDRE#/MSCLK23

A A

2nd Source:NorthStar DFHS36FR003

+3V_CRVCC

CN15

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

R493 22_4R493 22_4

R515 22_4R515 22_4

CN15

1

xD-R/B

2

xD-RE

3

xD-CE

4

xD-CLE

5

xD-ALE

6

xD-WE

7

xD-WP

8

xD-D0

9

xD-D1
SD-DAT2
SD-DAT3
SD-CMD
4in1-GND
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0
MS-DATA1
MS-BS
4in1-GND
SD-VCC
SD-CLK
SD-DAT0
xD-D2
xD-D3
xD-D4
SD-DAT1
xD-D5
xD-D6
xD-D7
xD-VCC
xD-CD-SW
SD-WP-SW
SD-CD-SW
GND
GND

TTN_R015-210-LM

TTN_R015-210-LM

XDCD#

XDBSY#
XDRE#/MSCLK_R
XDCE#
XDCLE/SDDAT2
XDALE/SDCMD
XDWE#/SDCLK_R
XDWP#
XDDATA0/SDDAT1

XDDATA1/MSBS
XDCLE/SDDAT2
XDDATA4/SDDAT3
XDALE/SDCMD

XDRE#/MSCLK_R
XDDATA3/MSDATA3

MSINX#23

XDCD#23

SDWP23

SDCD#23

MSINX#
XDDATA5/MSDATA2
XDDATA2/MSDATA0
XDDATA6/MSDATA1
XDDATA1/MSBS

XDWE#/SDCLK_R
XDDATA7/SDDAT0

XDDATA2/MSDATA0

XDDATA3/MSDATA3

XDDATA4/SDDAT3
XDDATA0/SDDAT1

XDDATA5/MSDATA2

XDDATA6/MSDATA1

XDDATA7/SDDAT0

XDCD#
SDWP
SDCD#

XDWE#/SDCLK XDWE#/SDCLK_R

XDRE#/MSCLK XDRE#/MSCLK_R

5

12

R488

R488

A1A:(9/26) For EMI solution
(close to socket)

*0_4

*0_4

12

C562

C562

*10P_4

*10P_4

A1A:(9/26) For EMI solution
(close to socket)

C642

C642
*10P_4

*10P_4

R514

R514

A1A:(9/26) For EMI solution
(close to socket)

*0_4

*0_4

12

C581

C581

*10P_4

*10P_4

MSINX#

R523 43K_4R523 43K_4

A1A:(9/26) PU MSINX# to +3V

XDPWREN#MSPWREN#23

SDPWREN33#23

4

XDPWREN#MSPWREN#
SDPWREN33#

A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#
A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR
A_CPERR#
A_CGNT#
A_CINT#

A_CCLK
A_CIRDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#

A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_CRSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#

A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#

+3V

3

A_CAD11

1
2
3

4

C617

C617

.1U_4

.1U_4

CN13

CN13

1

GND

2

D3 - CAD0

3

D4 - CAD1

4

D5 - CAD3

5

D6 - CAD5

6

D7 - CAD7

7

CE1- CCBE0

8

A10- CAD9

9

OE - CAD11

10

A11- CAD12

11

A9 - CAD14

12

A8 - CCBE1

13

A13- CPAR

14

A14- CPERR

15

WE/PGM - CGNT

16

RDY/BSY,IRQ*INT

17

VCC

18

VPP1

19

A16- CCLK

20

A15- CIRDY

21

A12- CCBE2

22

A7 - CAD18

23

A6 - CAD20

24

A5 - CAD21

25

A4 - CAD22

26

A3 - CAD23

27

A2 - CAD24

28

A1 - CAD25

29

A0 - CAD26

30

D0 - CAD27

31

D1 - CAD29

32

D2 - RFU

33

WP,IOIS16-CKRUN

34

GND

35

GND

36

CD1- CCD1

37

D11- CAD2

38

D12- CAD4

39

D13- CAD6

40

D14- RFU

41

D15- CAD8

42

CE2- CAD10

43

RFSH,VS*1-CVS1

44

IORD-CAD13

45

IOWR-CAD15

46

A17- CAD16

47

A18- RFU

48

A19- CBLOCK

49

A20- CSTOP

50

A21- CDEVSEL

51

VCC

52

VPP2

53

A22- CTRDY

54

A23- CFRAME

55

A24- CAD17

56

A25- CAD19

57

NC - CVS2

58

RESET-CRST

59

WAIT-CSERR

60

INPACK-CREQ

61

REG- CCBE3

62

BVD2,SP-CAUDIO

63

BVD1,STSCHG-C*

64

D8 - CAD28

65

D9 - CAD30

66

D10- CAD31

67

CD2- CCD2

68

GND

85

HOLE1

86

HOLE2

87

HOLE3

88

HOLE4

Q32

Q32

GND
IN
IN

EN#

OUTNC

G545B2P8U

G545B2P8U

FOX_WZ21131-G2-8F

FOX_WZ21131-G2-8F

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND69GND70GND71GND72N-PTH_Hole73N-PTH_Hole

74

+3V_CRVCC

8

OUT

7

OUT

6

OUT

5

75
76
77
78
79
80
81
82
83
84

A1A:(9/22) Change PCMCIA CONN (follow BH1)

A1A:(9/26)Change C593 from 0.1u to 10uF

C593

C593

C587

.1U_4

.1U_4

C587

A1A:(9/28)EMI suggest add C587 0.1uF

10U-10V_8

10U-10V_8

2

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Quanta Computer Inc.

CARD Reader & PCMCIA SLOT

CARD Reader & PCMCIA SLOT

CARD Reader & PCMCIA SLOT

1

of

24 39Tuesday, April 10, 2007

24 39Tuesday, April 10, 2007

24 39Tuesday, April 10, 2007

3B

3B

3B

http://mycomp.su/x/

5

4

3

2

1

+3V

C580

PCI_PME#

C580

22P-50V_4

22P-50V_4

Y5

24.576MHZY524.576MHZ

R510

R510

4.7K_4

4.7K_4

FILTER1

XI

XO

111

110

112

113

114

115

116

VDDP

DVDD

DGND

PCI_PCLK

PCI_GNT#

PCI_REQ#

AD5

AD4

AD3

AD2

AD1

102

103

104XI105XO106

107

108

109

PLLVDD

G_RST#

FILTER1

PLLGND

REG_EN#

PCI_INTA#

PCI_CLKRUN#

AD0

R517

R517

R512

R512

4.7K_4

4.7K_4

4.7K_4

4.7K_4

R516

R516
22K_4

22K_4

G_RST#

C588

C588
.1U-10V_4

AD25

.1U-10V_4

+3V+3V AVDDPLLVDD

C609

C609
.1U-10V_4

.1U-10V_4

U33

U33

1

DGND

2

R531 150_4R531 150_4

AD23
AD22

AD21
AD20
AD19
AD18

AD17
AD16

AD15
AD14

CBE0#15,22,23
PLTRST#15,16,18,21,26,27,28,30,33

3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

PCI_C/BE3#
VDDP
PCI_IDSEL
PCI_AD23
PCI_AD22
DVDD
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
DGND
PCI_AD17
PCI_AD16
PCI_C/BE2#
VDDP
PCI_FRAME#
PCI_IRDY#
DVDD
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
DGND
PCI_PERR#
PCI_SERR#
PCI_PAR
DVDD
PCI_C/BE1#
PCI_AD15
VDDP
PCI_AD14
DGND

AD27

AD28

AD29

AD25

AD24

126

127

128

PCI_AD25

PCI_AD24

PCI_AD1333PCI_AD1234PCI_AD1135DGND36PCI_AD1037PCI_AD938PCI_AD839DVDD40PCI_C/BE0#41PCI_AD742DGND43PCI_AD644PCI_AD545VDDP46PCI_AD447PCI_AD348PCI_AD249PCI_AD150DGND51PCI_AD052PCI_RST#53CYCLEOUT54CYCLEIN55DVDD56GPIO3/TEST157GPIO2/TEST058SCL59SDA60REG1861PC262PC163PC0

AD13

AD12

AD11

AD31

AD26

AD30

123

117

118

119

120

121

122

124

125

DVDD

DGND

REG18

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD28

PCI_AD27

PCI_AD26

AD9

AD8

AD7

AD6

AD10

+3V

D D

INTE#15
PCLK_13942
GNT2#15
REQ2#15
PCI_PME#15,22,23
AD[0..31]15,22,23

CBE3#15,22,23

C C

CBE2#15,22,23
FRAME#15,22,23

IRDY#15,22,23
TRDY#15,22,23

DEVSEL#15,22,23
STOP#15,22,23

PERR#15,22,23
SERR#15,22,23
PAR15,22,23
CBE1#15,22,23

B B

PLTRST# GNT2#

R518 *0_4R518 *0_4

C579

C579
22P-50V_4

22P-50V_4

C2A:(12/26) Base on vendor-FCE suggestion,
change C580/C579 from CH01206JB05 (12p) to CH02206JB08 (22p)

12

C572

R487

R487

.1U-10V_4

.1U-10V_4

6.34K_4

6.34K_4

R1

R0

FILTER0

97

98R199R0100

101

AVDD

AGND

FILTER0

PHY_TEST_MA

R502

R502
220_4

220_4

TPBIAS2

TPA2+

TPB2+

TPBIAS1

TPA1+

TPB1+

TPBIAS0

TPA0+

TPB0+

64

TSB43AB23

TSB43AB23

TPA2­AVDD

TPB2­AVDD
AGND

TPA1­AVDD
AGND

TPB1­AVDD
AGND

TPA0­AGND

TPB0­AGND
AVDD
AGND
AVDD

CPS

CNA
DGND
DVDD

R494

R494
220_4

220_4

SDA
SCL

TPBIAS2

96

TPA2+

95

TPA2-

94
93

TPB2+

92

TPB2-

91
90
89

TPBIAS1

88

TPA1+

87

TPA1-

86
85
84

TPB1+

83

TPB1-

82
81
80

TPBIAS0

79

TPA0+

78

TPA0-

77
76

TPB0+

75

TPB0-

74
73
72
71
70
69
68
67
66
65

C571

C571
.1U-10V_4

.1U-10V_4

R323 390K_4R323 390K_4

R321

R321

4.7K_4

4.7K_4

R322

R322

4.7K_4

4.7K_4

AVDD

C549

C549
1U-16V_6

1U-16V_6

C378

C378
1U-16V_6

1U-16V_6

C392

C392
1U-16V_6

1U-16V_6

R478

R478

R479

R479

56.2_4

56.2_4C572

56.2_4

56.2_4

R285

R285

R284

R284

56.2_4

56.2_4

56.2_4

56.2_4

C376

C376

R271

R271

270P-25V_4

270P-25V_4

5.1K_4

5.1K_4

B1C:(11/23) change R271,R306,R307 value from 56.2 to 5.1k

R476

R476

R477

R477

56.2_4

56.2_4

56.2_4

56.2_4

R294

R294

R295

R295

56.2_4

56.2_4

56.2_4

56.2_4

R306

R306

C389

C389
270P-25V_4

270P-25V_4

5.1K_4

5.1K_4

R292

R292

R293

R293

56.2_4

56.2_4

56.2_4

56.2_4

R290

R290

R291

R291

56.2_4

56.2_4

56.2_4

56.2_4

C386

C386

R307

R307

270P-25V_4

270P-25V_4

5.1K_4

5.1K_4

R554 0_6R554 0_6
R559 0_6R559 0_6
R553 0_6R553 0_6
R550 0_6R550 0_6

L1394_TPA2+
L1394_TPA2­L1394_TPB2+
L1394_TPB2-

R281 0_6R281 0_6
R280 0_6R280 0_6
R279 0_6R279 0_6
R278 0_6R278 0_6

R277 0_6R277 0_6
R276 0_6R276 0_6
R275 0_6R275 0_6
R274 0_6R274 0_6

1394TPAP1
1394TPAN1
1394TPBP1
1394TPBN1

1394TPAP0
1394TPAN0
1394TPBP0
1394TPBN0

A1A(10/24):change P/N and footprint to 1394-020115FR004SX01ZL-4P-H

A1A(10/25):change footprint to 1394-020115FR004S518ZL-4P-V

CN32

1394TPAP1 33
1394TPAN1 33
1394TPBP1 33
1394TPBN1 33

1394TPAP0 33
1394TPAN0 33
1394TPBP0 33
1394TPBN0 33

L1394_TPB2­L1394_TPA2­L1394_TPA2+
L1394_TPB2+

SUY_020115FR004S518ZL

SUY_020115FR004S518ZL

CN32

1
3
4
2

5
6

C383

C383
.1U-10V_4

.1U-10V_4

R296

R296

R297

R297

2.7K_4

2.7K_4

2.7K_4

U23

U23

1
2
3

A A

5

A0
A1
A3
GND4SDA

24LC02BT

24LC02BT

8

VCC

7

NC

6

SCL

5

2.7K_4

4

+3V

L58

L58

BLM18PG181SN1D_6

BLM18PG181SN1D_6

C565

C565
1000p/50V_4

1000p/50V_4

L59

L59

BLM18PG181SN1D_6

BLM18PG181SN1D_6

C595

C595
1000p/50V_4

1000p/50V_4

C603

C603

.01U_4

.01U_4

PLLVDD

C558

C558

10U/10V_8

10U/10V_8

C574

C574
1000p/50V_4

1000p/50V_4

AVDD

C394

C553

C553
1000p/50V_4

1000p/50V_4

C625

C625

.01U_4

.01U_4

C394

1000p/50V_4

1000p/50V_4

C597

C597

.01U_4

.01U_4

C561

C561
.01U_4

.01U_4

C627

C627

.01U_4

.01U_4

C552

C552
.01U_4

.01U_4

.01U_4

.01U_4

C624

C624

C555

C555
.1U-10V_4

.1U-10V_4

C628

C628
.1U-10V_4

.1U-10V_4

C550

C550
.1U-10V_4

.1U-10V_4

C605

C605
.1U-10V_4

.1U-10V_4

C551

C551
.1U-10V_4

.1U-10V_4

C554

C554
.1U-10V_4

.1U-10V_4

2

C578

C578
.1U-10V_4

.1U-10V_4

C626

C626
270P-25V_4

270P-25V_4

C623

C623
270P-25V_4

270P-25V_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Quanta Computer Inc.

1394(TSB43AB23)

1394(TSB43AB23)

1394(TSB43AB23)

1

of

25 39Tuesday, April 10, 2007

25 39Tuesday, April 10, 2007

25 39Tuesday, April 10, 2007

3B

3B

3B

C557

C557

10U/10V_8

10U/10V_8

C556

C556

10U/10V_8

10U/10V_8

3

http://mycomp.su/x/

1

SATA HDD

A1A:(10/2)change footprint to SATA-C166D9-100B-22P-R
A1A:(10/9)change footprint to SATA-C16669-100A-22P-R

C370

C370
.1U_4

.1U_4

HDD_VDD

C374

C374
.1U_4

.1U_4

A A

R249 0_8R249 0_8

C368

C368
.1U_4

.1U_4

C381

C381

+

+

150U_7343

150U_7343

2

CN27

CN27

1

GND1

2

RXP

3

RXN

4

GND2

5

TXN

6

TXP

7

GND3

+3.3VSATA

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

RSVD

19

GND

20

12V

21

12V

22

12V

AOP_C16669-12204-L

AOP_C16669-12204-L

R225 *0_8R225 *0_8

HDD_VDD

+3.3VSATA

3

SATA_TXP0 14
SATA_TXN0 14

SATA_RXN0 14
SATA_RXP0 14

+3V+5V

SATA HDD DOESN'T USE 3V PWR

C351

C351
*4.7U_8

*4.7U_8

C350

C350
*4.7U_8

*4.7U_8

C354

C354
*.1U_4

*.1U_4

4

1442

RST

GND

1442

20

GND

X

43

43

PATA ODD

B B

+3V +5V

Q24

Q24

2

DTC144EU

RST_HDD#16

PLTRST#15,16,18,21,25,27,28,30,33

R252 *0_4R252 *0_4

R253 33_4R253 33_4

A1A: change from 0 to 33ohm

DTC144EU

1 3

R236

R236
10K_4

10K_4

-IDERST

+5V

C324

C325

C325

C329

C329

.1U_4

.1U_4

.1U_4

A1A:(9/29) change footpint: CDR-C124A9-100C-50P

C C

-IDERST
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#

IDELED#29

A1A:(10/30) remove D23, already add in page29

D D

NC FOR SLAVE

ODDLED#

RCSEL

1

ODD Connector

R203

R203

470_4

470_4

CN26

CN26

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

515152

52

AOP_C124A9-150A1-L

AOP_C124A9-150A1-L

-PDIAG

A1A:(10/30) no stuff

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#

PDDACK#

-PDIAG
PDA2
PDCS3#

C344

C344

+

+

C327

C327

150U_7343

150U_7343

.1U_4

.1U_4

A1A:(10/30) add 150uF ,0.1uF for +5V

R217 *10K_4R217 *10K_4

+5V

C326

C326
.1U_4

.1U_4

+5V+5V

.1U_4

2

C331

C331
.1U_4

.1U_4

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDIOR#
PDIOW#
PDDACK#
IRQ14
PIORDY
PDDREQ

PDA0
PDA1
PDA2

PDCS1#
PDCS3#

R223 4.7K_4R223 4.7K_4

+3V

R218 8.2K_4R218 8.2K_4

+3V

C324
.1U_4

.1U_4

PDD[0..15] 14

PDIOR# 14

PDIOW# 14

PDDACK# 14

IRQ14 14

PIORDY 14

PDDREQ 14

PDA[2:0] 14

PDCS1# 14
PDCS3# 14

PIORDY

<check list & FAE>

IRQ14

Must be PU even when IDE device is not use

3

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

SATA-HDD & PATA-ODD

SATA-HDD & PATA-ODD

SATA-HDD & PATA-ODD

4

26 39Tuesday, April 10, 2007

26 39Tuesday, April 10, 2007

26 39Tuesday, April 10, 2007

of

of

of

3B

3B

3B

http://mycomp.su/x/

1

2

3

4

5

6

7

8

MINI-Card

BLUETOOTH MODULE CONNECTOR

D3A:(2/8)EMI suggest, add common Choke, co-lay R795,R796

USBP4+15

Q10

Q10

AO3413

A A

A1A: (9/20) Change from +3V to +3V_WL_VDD
A1A: (10/23)change +3V to +3VSUS
B1C: (10/23)change from +3VSUS to +3V

+3VSUS

AO3413

1

3

2

USB CONN

+3V

L28

L28

FBJ3216HS800_1206

FBJ3216HS800_1206

10U/10V/X5R_8

10U/10V/X5R_8

B B

D3A:(1/21) Stuff R349,R350 for debug use

+1.5V

A1A:9/4 Reserved for debug only

PCIRST#

R353 *0_4R353 *0_4
R348 *0_4R348 *0_4
R356 *0_4R356 *0_4
R354 0_4R354 0_4
R351 0_6R351 0_6

R355 0_4R355 0_4

+3VSUS

2

13

R349 0_4R349 0_4
R350 0_4R350 0_4

KEDRON_GND_37

PCIE_RXP4
PCIE_RXN4

CLK_PCIE_MINI12
CLK_PCIE_MINI1#2

R357

R357
*4.7K_4

*4.7K_4

PCIE_WAKE#_MINI-Card

PCIRST#15,22,23

PCI_CLK_SIO2,30

CL_RST#116
CL_DATA116

CL_CLK116

+3V_WL_VDD

A1A(10/30):
Add (CN28/Pin39,41) to
+3V_WL_VDD (follow ZO1)

C C

D D

PCIE_TXP415
PCIE_TXN415

PCIE_RXP415
PCIE_RXN415

uR_SOUT_CR28

uR_SWD28

PCIE_WAKE#16,18

E3A:(3/16) Base on Acer demand, remove wake on lan for Mini PCIE function.
no stuff Q25,R357

B1C:(11/29) no stuff R353,R348,R356

A1A:(10/20) Remove 0.1uF *2pcs

Q25

Q25
*DTC144EU

*DTC144EU

1

CL_DATA1_CN
CL_CLK1_CNPCLK_SIO

CL_RST#0_CN
CL_DATA1_CN
CL_CLK1_CN
KEDRON_GND_43
KEDRON_VCC

CN28

CN28

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

Reserved

41

Reserved

39

Reserved

37

Reserved

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

Reserved

17

Reserved

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

ACS_88911-5204

ACS_88911-5204

B1D:(12/9) change from 9.0mm to 9.9mm (ME request)

2

C398

C398

+3.3V
+1.5V

LED_WPAN#

LED_WLAN#

LED_WWAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

+1.5V

+3.3Vaux

PERST#

Reserved

Reserved
Reserved
Reserved
Reserved
Reserved

+1.5V
+3.3V

GND

GND

GND

GND

GND

GND

+3V_WL_VDD

C413

C413
.1U_4

.1U_4

R3360_4 R3360_4

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

16
14
12
10
8
6
4
2

PDAT_SMB2,13,16,18,33

PCLK_SMB2,13,16,18,33

C414

C414
.1U_4

.1U_4

+3V_WL_VDD

+1.5V_MINI-Card

3

Q14

Q14
RHU002N06

RHU002N06

3

Q15

Q15
RHU002N06

RHU002N06

3

C419

C419
.1U_4

.1U_4

+3V_WL_VDD

A1A:(10/30)change form +3VSUS to +3V_WL_VDD

+

+

A1A: (9/26) Remove (CN28/Pin46)BT_LED

A1A: (9/20) Remove USB ciucuit

MINI_DAT_SMB
MINI_CLK_SMB

RF_EN_RR

R343 0_4R343 0_4

R3370_4 R3370_4
R3450_4 R3450_4
R3440_4 R3440_4
R3380_4 R3380_4
R3390_4 R3390_4

A1A:9/4 Reserved for debug only

+3V

R48

2

+3V

2

R48
10K_4

10K_4

MINI_DAT_SMB

1

R58

R58
10K_4

10K_4

MINI_CLK_SMB

1

4

+1.5V

+

+

C403

C403

C402

C402

.1U_4

.1U_4

10U_8

10U_8

C424

C424

C422

C422
.1U_4

.1U_4

10U_8

10U_8

WIRELESS_LED# 29

B1C:(11/13) Robson ES1 to ES2 change.
PIN 37 => GND

B1C:(11/20) need support BCM module
PIN 40 => GND

PLTRST# 15,16,18,21,25,26,28,30,33

RF_EN 28

LFRAME# 14,28,30

LAD3 14,28,30
LAD2 14,28,30
LAD1 14,28,30
LAD0 14,28,30

POWER DECOUPLING

5

USBON#28

USBP0-15
USBP0+15

USBP1-15

USBP1+15

USBP2-15

USBP2+15

USBP4-15

L15 BK2125HS330_8L15 BK2125HS330_8

BT_POWERON# 28

+5V_S5

+5V_S5

C305

C305
.1U_4

.1U_4

U15

U15
CM1293-04SO

CM1293-04SO

1

CH1

2

VN
CH23CH3

6

CH4

5

VP

4

+

+

C105 10U_8

C105 10U_8
C101 1000P_4C101 1000P_4

U16

U16

2

IN1
IN23OUT2

4

EN#

1

GND

9

GND-C

TPS2061DGNR

TPS2061DGNR

+5V_S5

A1A:(10/25) SI suggest to remove 22pF*2

CN21

CN21

1

1

3

3

5

5

7

7

9

9

11

11

(B-B) ACS 88028-1210M

(B-B) ACS 88028-1210M

A1A: (10/13) change CONN (follow ZH2 Audio DB)

6

A1A: (9/25) change CONN (follow ZH3)

CN5

C102

C102
.01U_4

.01U_4

CN5

1
2
3
4
5

ACS_88266-05001-06

ACS_88266-05001-06

BT_LED29

BT_POWERBT_POWER_R

A1A:(10/25) SI suggest to remove 22pF*2

8

OUT3

7
6

OUT1

R435 *6.34K_4R435 *6.34K_4

5

OC#

USBPWR1

C279

C279

C289

C289

100U_3528

100U_3528

1000P_4

1000P_4

BT_POWER

BT_LED

USBPWR1

CN11

CN11

1

5

2

6

3

7

4

8

SUY_020133MB004S557ZL

SUY_020133MB004S557ZL

A1A: (9/24)change USB CONN (follow ZC3)

8

+5V_S5

27 39Tuesday, April 10, 2007

27 39Tuesday, April 10, 2007

27 39Tuesday, April 10, 2007

C45

C45

.1U_4

.1U_4

of

of

of

USBON#

2

2

4

4

6

6

8

8

10

10

12

12

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

7

Quanta Computer Inc.

Mini card/USB/Bluetooth

Mini card/USB/Bluetooth

Mini card/USB/Bluetooth

+5V_S5

3B

3B

3B

http://mycomp.su/x/

5

+3VPCU

A1A:(9/16)Change from WPC8769 to WPC8763

C139

C139

C235

C235
10U_8

D D

10U_8

.1U_4

.1U_4

C175

C175
.1U_4

.1U_4

A1A: (9/25) place the above capacitors as close to the pins as possible

LFRAME#14,27,30

LAD014,27,30
LAD114,27,30
LAD214,27,30
LAD314,27,30

PCLK_591

R142

R142
*22_4

*22_4

C240

C240
*10P_4

*10P_4

08/10 FAE: SMI DOESN'T NEED DIODE

C C

FOLLOW INTEL ME-EC INTERFACE SPECIFICATION,
2ND_SMB IS DEDICATED FOR ICH8 CONTROLLER LINK BUS.

B B

PR_KB_CLK33

PR_KB_DATA33

PR_MS_CLK33

PR_MS_DATA33

A1A: (9/25)
FAE: PUT Y6 with EC in the same side

A1A:(9/27)change C130,C131 from 6.8p to 5.6p

A A

C2A:(12/26) Base on vendor-FCE suggestion,
change C130/C131 from CH-5606TB01 (5.6p) to CH01006JBD1 (10p)

A1A: (9/26) Add HWPG_CPUIO

C2A:(12/25) Steven:D16 not necessary if 3V/5V fail, EC can't work.
This monitor circuit is't necessary.
E3A:(3/16)PE request move D15~D18 location for FFC cable issue.Remove D16 footprint and net (HWPG_3/5VPCU) to save layout space.

RP23

RP23

4.7KX4

4.7KX4

HWPG_CPUIO38

HWPG_1.05V36

+5V

C130

C130
10P_4

10P_4

HWPG_1.8V37

5

PCLK_5912
CLKRUN#16,30

GATEA2014

RCIN#14

SCI#16

CAPSLED#29

A1A: (9/26) Remove LAN_WOL_EN

PLTRST#15,16,18,21,25,26,27,30,33

NUMLED#29

SERIRQ16,22,23,30
KBSMI#16

A1A: (9/26) Remove MY17

2ND_MBCLK3

23

Y3

Y3

32.768KHZ

32.768KHZ
C131

C131

4 1

10P_4

10P_4

8769AGND

D18 BAS316D18 BAS316

D17 BAS316D17 BAS316
D15 BAS316D15 BAS316

2ND_MBDATA3

1 2

3 4

5 6

7 8

R101 20M_6R101 20M_6

1/13 Comfirm by vendor mail :
Connect to AGND

C227

C227

C486

C486

.1U_4

.1U_4

.1U_4

.1U_4

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

D14 BAS316D14 BAS316

PLTRST#

SERIRQ

MX029
MX129
MX229
MX329
MX429
MX529
MX629
MX729

MY029
MY129
MY229
MY329
MY429
MY529
MY629
MY729
MY829

MY929
MY1029
MY1129
MY1229
MY1329
MY1429
MY1529
MY1629

MBCLK39

MBDATA39

TBCLK29

TBDATA29

R96

R96
33K/F_6

33K/F_6

MX0
MX1
MX2
MX3
MX4
MX5
MX6

MY16

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

8768_32KX2

08/10 FAE:
ADD ONE GAD PAD UNDER X'TAL,
AND KEEP CLEANCE.

+3V

4

A1A: (9/25) change VBAT from +3VPCU to +A3VPCU

L52 BLM18AG601SN1_6L52 BLM18AG601SN1_6

C141

C141
.1U_4

.1U_4

SCI#_uR

8768_32KX1

R140

R140
10K_4

10K_4

HWPG

U14

U14

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

CLKRUN/GPIO11/HGPIO02

121

GA20

122

KBRST

29

ECSCI

6

LDRQ/GPIO24/HGPIO01

124

LPCPD/GPIO10/HGPIO00

7

LREST

123

PWUREQ

125

SERIRQ

9

SMI

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9

40

KBSOUT10

39

KBSOUT11

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

KBSOUT16/GPIO60

33

KBSOUT17/GPIO57/HGPIO03

70

SCL1

69

SDA1

67

SCL2

68

SDA2

72

PSCLK1

71

PSDAT1

10

PSCLK2/GPIO26

11

PSDAT2/GPIO27

12

PSCLK3/GPIO25

13

PSDAT3/GPIO12

77

32KX1/32KCLKIN

79

32KX2

WPC8763LDG

WPC8763LDG

4

19

VCC1

46

VCC2

76

88

VCC3

VCC4

+A3VPCU

102

115

VCC5

AVCC

GND1

5

18

L17

L17
HZ0603B601R-00_6

HZ0603B601R-00_6

GND2

45

C140

C140
.1U_4

.1U_4

8769AGND

LPC

LPC

KB

KB

SMB

SMB

PS/2

PS/2

GND3

GND4

GND5

GND6

78

89

116

8769AGND

+A3VPCU

C476

C476
10U_8

10U_8

08/10 FAE:

0.1UF

80

VBAT

A/D

A/D

D/A

D/A

GPIO06/HGPIO06

GPIO07/HGPIP07

GPIO

GPIO

GPIO46/TRST

GPO82/HGPIO00/TRIS

GPO84/HGPIO01/BADDR0

TB1/GPIO14/HGPIO4

TIMER

TIMER

A_PWM1/GPIO21
B_PWM0/GPIO13

SPI

SPI

IR

IR

FIU

FIU

SPI_DI/GPIO77

SPI_DO/GPO76/SHBM

SPI_SCK/GPIO75

IRRX1/GPIO72

IRRX2_IRSL0/GPIO70

SIN_CR/CIRRX/GPIO87

GPIO34/CIRRX2

CIRTX/GPIO16/HGPIO04

SOUT_CR/GPO83/BADDR1

CLKOUT/GPIO55

VCORF

AGND

44

103

VCORF_uR

C181

C181
1U_6

1U_6

3

1/13 Comfirm by vendor mail:

+3V

VDD must power up after VCC/AVCC

C474

C474
.1U_4

.1U_4

AD4/GPIO05
AD5/GPIO04

GPIO42/TCK

GPIO43/TMS

GPO47/JEN0
GPIO50/TDO

GPIO52/RDY

TA1/GPIO56
TA2/GPIO20

IRTX/GPIO71

SWD/GPIO66

AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

GPIO01
GPIO03

GPIO23
GPIO30
GPIO31
GPIO32
GPIO33
GPIO36
GPIO40

GPIO44/TDI

GPIO45

GPIO51
GPIO53

GPIO81

A_PWM0

F_SDI

F_SDO

F_CS0
F_SCK

VCC_POR

VREF

C228

C228

C236

C236

1/13 Comfirm by vendor mail:

.1U_4

.1U_4

4

VDD

97
98
99
100
108
96

101
105
106
107

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112

31
117
63

32
118
62

84
83
82

75
73
74
113
14
114
111

86
87
90
92

81
30
85
104

VBAT for keep PLL power let power up can quick.

10U_8

10U_8

If no VBAT will switch to VCCpower.
If PLL no power will cause boot time delay.

MTEMP
ICMNT_L

A1A: (9/26) Add it. Capacitors as close to EC as possible

E3A:(3/15) ICMNT connect to EC pin100(AD pin for power control) ,
reserve R570 0ohm for debug use

EC_GPIO42

DNBSWON#_uR
CCD_POWERON#

CRT_SENSE#
RF_EN

RSMRST#_uR
PWROK_EC_uR

SOUT_CR_DEBUG

SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

SWD_DEBUG
uR_TP_CLKOUT
VCC_POR#
VREF_uR +A3VPCU

C149

C149
C654

C654

ICMNT_L

A1A: (9/26) Remove BL/C#

R570 0_4R570 0_4

B1C:(10/20)SWAP GPIO1 & GPIO3 (follow EC team)
A1A:(9/29)SWAP GPIO3 & GPIO6 (follow EC team)

D12 BAS316D12 BAS316

08/10 FAE: ADD TP FOR DEBUG

R103 0_4R103 0_4

R406 0_4R406 0_4

R596 22R596 22
R597 22R597 22

R400 0_4R400 0_4

R97 4.7K_4R97 4.7K_4
R403 0_4R403 0_4

0~AVCC power for DA pin
power reference

08/14 FAE:
Please connect VREF(uRider pin104) to
+A3VPCU instead of +3VPCU.

DEBUG PORTS

B1C:(11/28) change CN10/pin1 from +3V to +3VPCU

EC Debug Port

+3VPCU

SOUT_CR_DEBUG
SWD_DEBUG

3

1
2
3
4

CN10

CN10

*ACS_88231-04001

*ACS_88231-04001

1
2
3
4

2

.1U_4

.1U_4
.1U_4

.1U_4

T136T136
T139T139

T137T137
T138T138

T140T140
T141T141

A1A: (9/26) Remove RBAYINS#

T130T130

HWPG

T16T16

R1040_6 R1040_6

SPI_SDO_uR_R
SPI_SCK_uR_R

T35T35

+3VPCU

MTEMP 39

ICMNT 39

CC-SET 39
CPUFAN# 3

ACIN 39
NBSWON# 29,33
LID591# 16,20,29
SUSB# 16
EC_FPBACK# 20

SUSLED# 29

PWRLED# 29
BATLED0# 29
BATLED1# 29
VRON 35
MAINON 36,37,38

AMP_MUTE# 32
PR_STS 33

SUSON 37,38
ENERGY_DET 18

D/C# 39

S5_ON 34,38

LOW_PWR 18

DNBSWON# 16
BT_POWERON# 27
CCD_POWERON 20

CCD_POWERON ACITVE LO => HI

HIGH_LOAD 33

FANSIG 3

CONTRAST 20

USBON# 27

SYS_CHARGE 33

CRT_SENSE# 15,19,33
RF_EN 27

CELL-SET 39

RSMRST# 16
SUSC# 16
PWROK_EC 6,16

A1A: (9/26) Remove LAN_ON
A1A: (9/26) Remove EC_ME_ALERT

uR_SOUT_CR 27

uR_SWD 27

C2A:(12/12)FAE suggest add 22 Ohm dumping resistors
on SPI flash interface F_SCK(pin92) and F_SDO(pin87)
to avoid potential EMI problem

D3A:(1/21) Add CableSence circuit

D3A:(1/31)
Anda inform: change LAN Low power pin from GPIO47 to GPIO52

LPC debug card

A1A(10/5):Change LPC debug CONN to DFFC10FR103

E3A:(3/22) confirm with BIOS-CM, no need LPC dedug CONN,
Remove CN6,R432 footprint to save space for layout.

2

1

SM BUS PU

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

EC_GPIO42
CRT_SENSE#

R98 4.7K_4R98 4.7K_4
R99 4.7K_4R99 4.7K_4
R102 4.7K_4R102 4.7K_4
R100 4.7K_4R100 4.7K_4

R139 4.7K_4R139 4.7K_4
R398 4.7K_4R398 4.7K_4

I/O ADDRESS SETTING

BADDR1-0

0 0
0 1
1 0
1 1

SHBM=0: Enable shared memory with host BIOS

BADDR0
BADDR1
SHBM

1/13 Comfirm by vendor mail :
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

ACER ID

CCD_POWERON#
SOUT_CR_DEBUG
RF_EN

A1A:(9/29) change from MBCLK/MNDATA to 2ND_MBCLK/2ND_MBDATA

2ND_MBCLK
2ND_MBDATA

I/O Address

Index

Data
XOR TREE TEST MODE
CORE DEFINED
2Eh 2Fh

R408 10K_4R408 10K_4
R407 *10K_4R407 *10K_4
R399 10K_4R399 10K_4

U7

SCL
SDA

VCC

WP

GND

24LC08U724LC08

164Fh

A0
A1
A2

164Eh

6
5

7

SPI FLASH

+3VPCU

SPI_SDI_uR

R45

R45

SPI_SDO_uR_R

10K_4

10K_4

SPI_SCK_uR_R
SPI_CS0#_uR

1/13 Comfirm by vendor mail :
If the Southbridge enables 'Long Wait Abort' by default, the
flash device should be 50MHz (or faster)

U26

U26

2

SO

5

SI

6

SCK

1

CE

W25X80VSSIG

W25X80VSSIG

VDD

HOLD

WP

VSS

BUTTON ON KEYBOARD MATRIX

MX0
MX1
MX2
MX3
MX4
MX5

MY16

MX0 29
MX1 29
MX2 29
MX3 29
WIRELESS_SW# 29
BLUETOOTH_SW# 29

MY16 29

INTERNAL KEYBOARD STRIP SET

MY0

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

EC (PC8763LDG)/ FLASH

EC (PC8763LDG)/ FLASH

EC (PC8763LDG)/ FLASH

R110 10K_4R110 10K_4

PROJECT : ZU1

PROJECT : ZU1

1

+3VPCU

+3V

+3VPCU

1
2
3

8
4

+3VPCU
8
7
3
4

28 39Tuesday, April 10, 2007

28 39Tuesday, April 10, 2007

28 39Tuesday, April 10, 2007

C69

C69
.1U_4

.1U_4

C454

C454
.1U_4

.1U_4

+3VPCU

3B

3B

3B

of

of

of

http://mycomp.su/x/

5

INT K/B

MY1528
MY1428
MY1328
MY1228
MY1128
MY1028
MY928
MY828
MY728
MY628
MY528
MY428

D D

MY328
MX728
MX628
MY228
MX528
MX428
MX328
MX228
MY128
MY028
MX128
MX028

MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5
MX4
MX3
MX2
MY1
MY0
MX1
MX0

CN7

CN7

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

ACS_88502-250N

ACS_88502-250N

BOT CONTACT

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5

A1A: (9/26) Refer to ZH3, change K/B matrix

MX6
MX7

MX1
MX2
MX3
MX0

+3VPCU

10

4

RP14

RP14

9
8
7 4

10KX8

10KX8

3

2

1

TOUCH PAD

20 MIL

L23

L23

MX4

1

MX7

2

MX6

3

MX5

56

uR REQUEST
MY DOES NOT NEED PU.
MY CAN NOT USE EMI BYPASS CAP, DUE TO FLASH.

+5V

R167

R167
10K_4

10K_4

TBDATA28

TBCLK28

+5V_TP

BK2125HS330_8

BK2125HS330_8

R162

R162
10K_4

10K_4

L22 LZA10-2ACB104MT_6L22 LZA10-2ACB104MT_6
L20

L20

C269 .1U-10V_4C269 .1U-10V_4

LZA10-2ACB104MT_6

LZA10-2ACB104MT_6

C267

C267
*.1U_4

*.1U_4

C261

C261
*.1U_4

*.1U_4

TP_DATA
TP_CLK

CONNECT TO TP/B

CN8

CN8

1

BOT CONTACT

2
3

6

4 5

ACS_88502-0401

ACS_88502-0401

Finger Printer

LED

+3VPCU

R367 330_4R367 330_4
R800 330_4R800 330_4

C C

B1C:(11/27)Base on ME request, refer to ZH3, change LED type
B1C:(11/28)Base on ME request, change LED type
D3A:(1/24) Base on SMT-ME request, change LED type to 2 in 1
DEL LED4,LED5,LED6,LED7,R570,R571,Add LED2,LED3
E3A:(3/16)Change LED2, LED3 type base on ME request, Add R800,R801
E3A:(3/30) ESD issue, change LED type (follow B stage)

B B

R366 330_4R366 330_4
R801 330_4R801 330_4

NUMLED#28

Function Board

A A

LED4

LED4

2 1

LED_Y_LTST-C190KFKT

LED_Y_LTST-C190KFKT

2 1

LED5 LED_G_LTST-C190KGKTLED5 LED_G_LTST-C190KGKT

LED6

LED6

2 1

LED_Y_LTST-C190KFKT

LED_Y_LTST-C190KFKT

2 1

LED7 LED_G_LTST-C190KGKTLED7 LED_G_LTST-C190KGKT

+3V

R41

R41
330_4

330_4

NUMLED

3

Q8

2

2N7002EQ82N7002E

1

+3VPCU

MX028
MX128
MX228
MY1628
MR#16,20,28

WIRELESS_SW#28
BLUETOOTH_SW#28
WIRELESS_LED#27

BT_LED27

+3V

MX0
MX1
MX2
MY16
MR#
WIRELESS_SW#
BLUETOOTH_SW#
WIRELESS_LED#
BT_LED

CAPSLED#28

A1A:(9/27) Add Function Board CONN (14pin)

A1A:(10/30) add +3V for Daughter Board use

5

SUSLED# 28
PWRLED# 28

BATLED1# 28
BATLED0# 28

CN4

CN4

1
2
3
4
5
6
7
8
9
10
11
12
13
14

ACS_88502-1401

ACS_88502-1401

IDELED#26

SATA_LED#14

+3V

R40

R40
330_4

330_4

CAPSLED

3

Q7

2

2N7002EQ72N7002E

1

A1A(10/5):Change Pin define (Base on Acer ID)

BOT CONTACT

4

R37

R37

R36

R36

10K_4

10K_4

10K_4

10K_4

D6 BAS316D6 BAS316
D5 BAS316D5 BAS316

A1A:(10/30) no stuff (ZU1 no support EMAIL LED)

E3A:(3/30)Remove Q27,R1 footprint to save space for layout
ZU1 no support E-Mail LED

Keyboard Matrix Button

MX0/MY16

MX1/MY16

MX2/MY16

MX3/MY16

MX4/MY16

MX5/MY16

+3V+3V +3V+3V

R43

R43

R46

R46

10K_4

10K_4

330_4

330_4

3

2

Q11

Q11
2N7002E

2N7002E

1

acer EAP Buttton

acer EMAIL Buttton

acer WWW Buttton

acer EPM Buttton

WIRELESS Button

BLUETOOTH Button

3

IDE_LED

LED Board

MX328

R170 0_6R170 0_6
R171 0_6R171 0_6

+3VPCU

MX3
MY16
NBSWON#
PWRLED#
NUMLED
CAPSLED
IDE_LED
SUSLED#

USBP6-15

USBP6+15

BOT CONTACT

ACS_88502-1001

ACS_88502-1001

A1A:(9/27) Add LED Board CONN (10pin)

A1A:(10/26) Add SUSLED#

NBSWON#28,33

NBSWON#

A1A: (9/24) change SW CONN (follow ZC3)

D3A: (1/29) remove SW1, add G2 footprint

+3VPCU

LED1

R141 330_4R141 330_4

LED1

2 1

LED_G_LTST-C190KGKT

LED_G_LTST-C190KGKT

A1A: (10/30) Reserved LED for debug use

2

A1A:(9/27) Power need be confirm

BUSBP1­BUSBP1+

A1A:(10/30) remove22pF*2

CN1

CN1

1

A1A(10/5):Change Pin define (Base on Acer ID)

2
3
4
5
6
7
8
9
10
11
12

G2

G2

1 2

*SHORT_PAD

*SHORT_PAD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SWITCH,LED,KB,Finger,TP

SWITCH,LED,KB,Finger,TP

SWITCH,LED,KB,Finger,TP

Date: Sheet

Date: Sheet

Date: Sheet

+3VSUS

DA204UD3DA204U

+3VPCU

E3A:(3/30) change ESD protect Diode location from LED/B to MB
(Add D3)

PWRLED#ECPWRLED

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

D3

1

NBSWON#

3

2

1

CN9

CN9

4
3

6
2
1

5

ACS_88266-04001-06

ACS_88266-04001-06

29 39Tuesday, April 10, 2007

29 39Tuesday, April 10, 2007

29 39Tuesday, April 10, 2007

of

of

of

3B

3B

3B

+3VPCU

http://mycomp.su/x/

5

4

3

2

1

NS SIO PC87383

U9

C76

C76
.1U_4

.1U_4

C116

C116

C39

C39

U9

42

LAD0

46

LAD1

51

LAD2

53

LAD3

33

LCLK

22

LDRQ/XOR_OUT

38

LFRAME

35

LRESET

36

SERIRQ

29

LPCPD/GPIO21

27

CLKRUN/GPIO22

58

CLKIN

15

GPIO00

16

GPIO01

19

GPIO02

20

GPIO03

21

GPIO04

40

GPIO05

7

GPIO06

41

GPIO07

23

GPIO20

1

NC

2

NC

17

NC

18

NC

47

NC

48

NC

49

NC

64

NC

45

VDD

32

VDD

11

VDD

44

VSS

31

VSS

12

VSS

13

VCORF

PC87383

PC87383

AJ873830H22

AJ873830H22
<Description>

<Description>

0.1U/X7R-50V_6

0.1U/X7R-50V_6

NS PC87383

NS PC87383

PD7/GPIO23
ACK/GPIO24
AFD_DSTRB

BUSY_WAIT

SLIN_ASTRB

STB_WRITE

IRRX2_IRSL0/GPIO17

CTS1/GPIO11
DCD1/GPIO16
DSR1/GPIO15

DTR1_BOUT1/BADDR

RI1/GPIO10

RTS1/GPIO13/TRIS

SIN1/GPIO14

SOUT1/GPIO12/TEST

+3V +3V

C83

C83

C2A:(12/22) EMI suggest to add .1u *2 to prevent noise (+3V)

C443

C447

C447

C443
.1U-10V_4

.1U-10V_4

PCI_CLK_SIO

SIO_14M

R39

R39

R49

R49

*22_4

*22_4

*22_4

*22_4

D D

HOLE17

HOLE17

1
2
3
4

*h-c276d94p2

*h-c276d94p2

5

C2A:(12/28) change Hole17 type to improve thermal issue,
(change footprint to H-C276D94N-4)

HOLE

HOLE26

HOLE26

HOLE29

HOLE29

HOLE27

HOLE28

HOLE28

*h-c236d236

*h-c236d236

*h-c236d236

*h-c236d236

C C

HOLE35

HOLE35
*h-c236d236

*h-c236d236

HOLE37

HOLE37
*h-c236d236

*h-c236d236

HOLE22

HOLE22
h-c236d138p2

h-c236d138p2

B B

HOLE25

HOLE25
h-c217d59p2

h-c217d59p2

1

1

HOLE32

HOLE32
*h-c236d236

*h-c236d236

1

1

HOLE38

HOLE38
*h-c236d236

*h-c236d236

1

1

HOLE14

HOLE14
h-c236d138p2

h-c236d138p2

1

1

HOLE24

HOLE24
h-c217d59p2

h-c217d59p2

*h-c236d236

*h-c236d236

1

HOLE33

HOLE33
*h-c236d236

*h-c236d236

1

HOLE34

HOLE34
*h-c236d236

*h-c236d236

1

HOLE27
*h-c236d236

*h-c236d236

1

HOLE31

HOLE31
*h-c236d236

*h-c236d236

1

HOLE36

HOLE36
*h-c236d236

*h-c236d236

1

C55

C55

C84

C84

*10P_4

*10P_4

*10P_4

*10P_4

LPC_PD#16

C2A:(12/12)Intel suggest:All LPC devices support LPCPD# protocol,stuff D7.

+3V

+

+

EMI Cap

VIN VIN VIN VIN VIN

C333

C333

0.1U/X7R-50V_6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

VIN VIN VIN VIN VIN +3VPCU +3VPCU +3VPCU

C347

C347

LAD014,27,28
LAD114,27,28
LAD214,27,28
LAD314,27,28

PCI_CLK_SIO2,27

LDRQ#014

LFRAME#14,27,28

PLTRST#15,16,18,21,25,26,27,28,33

SERIRQ16,22,23,28

CLKRUN#16,28

SIO_14M2

D7BAS316 D7BAS316

C64

C64
10U_8

10U_8

A1A:(10/19) EMI suggest :Add the VIN power shape
bypass cap 0.1uF x 10pcs
Add the +3VPCU power traces bypass cap 0.1uF x 3pcs

C33

C33

0.1U/X7R-50V_6

0.1U/X7R-50V_6

C349

C349

C119

C119
.1U_4

.1U_4

+3V

R44

R44
10K_4

10K_4

SIO_PD#

C56

C56
.1U_4

.1U_4

C120 .1U_4C120 .1U_4

C35

C35

C40

C40

SIO_PD#

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PD0
PD1
PD2
PD3
PD4
PD5
PD6

ERR
INIT

SLCT

IRRX1

IRTX

C648

C648
.1U-10V_4

.1U-10V_4

C103

C103
.1U-10V_4

.1U-10V_4

PD0

52

PD1

50

PD2

43

PD3

6

PD4

39

PD5

37

PD6

34

PD7

30

ACK#

28

AFD#

57

BUSY

26

ERROR#

54

INIT#

56

PE

25

PE

SLCT

24

SLIN#

55

STRB#

14

IRRX

8

IRMODE

10

IRTXOUT

9

MCTS1#

3

MDCD1#

59

MDSR1#

60

MDTR1#

4

MRI1

5

MRTS1#

62

MRXD1

61

MTXD1

63

PPT_PD0 33
PPT_PD1 33
PPT_PD2 33
PPT_PD3 33
PPT_PD4 33
PPT_PD5 33
PPT_PD6 33
PPT_PD7 33

PPT_ACK# 33
PPT_AFD# 33
PPT_BUSY 33
PPT_ERR# 33
PPT_INIT# 33
PPT_PE 33
PPT_SLCT 33
PPT_SLIN# 33
PPT_STB# 33

R77 10K_4R77 10K_4

R76 *10K_4R76 *10K_4

R55 *10K_4R55 *10K_4

R59 *10K_4R59 *10K_4

C649

C649
.1U-10V_4

.1U-10V_4

C32

C32
.1U-10V_4

.1U-10V_4

A1A:(9/20) PPT PU 4.7k circuit exist in Docking.
remove it.

+3V

MCTS1#
MDCD1#
MDSR1#
MDTR1#
MRI1
MRTS1#
MRXD1
MTXD1

OPEN : 164Eh~164Fh
LOW : 2Eh~2Fh

OPEN : normal pin operation
LOW : float device pin

OPEN : normal Device operation
LOW : XOR pin tree

FIR

IRTXOUT
IRRX
IRMODE

U40

U40

3

TXD

4

RXD

5

SD

8

GND

VISHAY_TFDU6102_8P

VISHAY_TFDU6102_8P

VCC

MODE

LED_C

LED_A

+3V

6
7

2
1

T = 20mil

C640

C640

C638

C638

10U-10V_8

10U-10V_8

.1U-10V_4

.1U-10V_4

+5V_FIR

T = 20mil

R557 5.6_1206R557 5.6_1206
R551 5.6_1206R551 5.6_1206

E3A:(3/14)Remove PAD18 (SMT C-test open issue)
E3A:(3/14)ME request, change EMI Spring from FDTA1003014 to FDZU1002010

D3A:(2/14)EMI request add two of clip(FDTA1003014) in PAD17 and PAD19 for EMI issue

PAD19

PAD19
EMIPAD

EMIPAD

1

PAD17

PAD17
EMIPAD

EMIPAD

1

PAD25

PAD25
*EMIPAD

*EMIPAD

1

PAD24

PAD24
*EMIPAD

*EMIPAD

1

PAD23

PAD23
*EMIPAD

*EMIPAD

1

PR_CTS 33
PR_DCD# 33
PR_DSR# 33
PR_DTR# 33
PR_RI 33
PR_RTS# 33
PR_SIN 33
PR_SOUT 33

C639

C639
10U-10V_8

10U-10V_8

+3V

C641

C641
10U-10V_8

10U-10V_8

1

1

HOLE42

HOLE42
*h-o110x94d110x94n

*h-o110x94d110x94n

Non - PTH Hole

1

HOLE19

HOLE19

HOLE16

HOLE16

h-c217d122p2

h-c217d122p2

h-c217d122p2

h-c217d122p2

1

A A

1

HOLE3

HOLE3
*H-C315D177P2

*H-C315D177P2

1

HOLE9

HOLE9
*h-c276d94p2

*h-c276d94p2

1

D3A:(2/2) change Hole9 footprint

HOLE30

HOLE30
h-c217d122p2

h-c217d122p2

1

5

HOLE18

HOLE18
h-c217d122p2

h-c217d122p2

HOLE23

HOLE23
*h-c276d94p2

*h-c276d94p2

B1C:(11/27)change Hole42 footprint
B1C:(11/23)remove Hole7
D3A:(2/8)Remove hole13

HOLE15

HOLE15

HOLE21

HOLE21
h-c217d122p2

h-c217d122p2

h-c217d122p2

h-c217d122p2

1

1

HOLE4

HOLE4

HOLE2

HOLE2

*h-c276d94p2

*h-c276d94p2

*h-c276d94p2

*h-c276d94p2

1

1

HOLE11

HOLE11
h-c217d122p2

h-c217d122p2

1

1

C2A:(12/1) change Hole21 from MBZU1001010 to MBZU1004010

HOLE10

HOLE10
*h-c276d94p2

*h-c276d94p2

1

1

HOLE1

HOLE1
*h-c276d94p2

*h-c276d94p2

1

0.1U/X7R-50V_6

0.1U/X7R-50V_6

HOLE5

HOLE5
*h-c276d94p2

*h-c276d94p2

4

0.1U/X7R-50V_6

0.1U/X7R-50V_6

HOLE12

HOLE12
*h-c276d94p2

*h-c276d94p2

1

1

HOLE39

HOLE39
*h-c276d94p2

*h-c276d94p2

1

0.1U/X7R-50V_6

0.1U/X7R-50V_6

ESDPad

PAD15

PAD15

PAD5

PAD5

*EMIPAD

*EMIPAD

*EMIPAD

*EMIPAD

1

HOLE43

HOLE43
*h-c276d94p2

*h-c276d94p2

1

0.1U/X7R-50V_6

0.1U/X7R-50V_6

1

HOLE40

HOLE40
*h-c276d94p2

*h-c276d94p2

C2A:(12/22) change Hole20 footprint to h-c276i134d94p2

PAD14

PAD14
*EMIPAD

*EMIPAD

1

1

HOLE41

HOLE41
*h-c276d94p2

*h-c276d94p2

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PAD11

PAD11
*EMIPAD

*EMIPAD

1

HOLE20

HOLE20
*h-c276i134d94p2

*h-c276i134d94p2

1

3

PAD13

PAD13
*EMIPAD

*EMIPAD

1

1

PAD3

PAD3
*EMIPAD

*EMIPAD

1

HOLE6

HOLE6
*h-c276d94p2

*h-c276d94p2

PAD16

PAD16
*EMIPAD

*EMIPAD

1

ADOGND

1

HOLE8

HOLE8
*H-C276D122P2

*H-C276D122P2

PAD10

PAD10
*EMIPAD

*EMIPAD

1

1

PAD2

PAD2

PAD7

PAD7

*EMIPAD

*EMIPAD

*EMIPAD

*EMIPAD

1

EMIPAD142X91

EMIPAD157X79

C2A:(12/22) EMI suggest add three clip to contact with CPU cooler's fins
(PAD23,24,25)

PAD4

PAD4

PAD1

PAD1

*EMIPAD

*EMIPAD

*EMIPAD

*EMIPAD

1

2

1

1

PAD12

PAD12

PAD8

PAD8

*EMIPAD

*EMIPAD

*EMIPAD

*EMIPAD

1

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SUPER-IO/FIR/HOLE

SUPER-IO/FIR/HOLE

SUPER-IO/FIR/HOLE

Date: Sheet

Date: Sheet

Date: Sheet

EMIPAD157X79

PAD6

PAD6
*EMIPAD

*EMIPAD

1

C2A:(12/22) Add theree PAD per ME request (fix wire)
D3A:(2/2) change PAD20.PAD21.PAD22 footprint
D3A:(2/12) Add PAD20.PAD21.PAD22 P/N (FDZU1001010)

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

PAD9

PAD9
*EMIPAD

*EMIPAD

1

PAD20

PAD20
MEPAD

MEPAD

1

1

PAD21

PAD21
MEPAD

MEPAD

1

30 39Tuesday, April 10, 2007

30 39Tuesday, April 10, 2007

30 39Tuesday, April 10, 2007

PAD22

PAD22
MEPAD

MEPAD

1

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

CODEC(ALC268)

+5V +5V_ADO

D D

+3V

+1.5V

C C

B B

+5V +5V_ADO

A A

L61 TI321611U480_1206L61 TI321611U480_1206

C567

C567

C563

C563

.1U-10V_4

.1U-10V_4

10U-10V_8

10U-10V_8

R482 0_6R482 0_6

R483 *0_6R483 *0_6

C560

C560

.1U-10V_4

.1U-10V_4

10U-10V_8

10U-10V_8

SURR-L32

SURR-R32

A1A:(10/18) reserve R513 to reduce ringing

DMIC-CLK DMIC-CLK_R

EAPD32
AU_SPDIF33

B1C: (11/24) stuff R330 for Int-SPK issue

A1A:(9/28) EMI suggest:
Add Additional two more bridge resistor
between ADDGND and GND

R330 0_6R330 0_6
R558 *0_6R558 *0_6
R530 *0_6R530 *0_6

Tied at one point only
under the codec or
near the codec

R325 *0_6R325 *0_6

*G961-18ADJTEU(SOT89-5)

*G961-18ADJTEU(SOT89-5)

ADOGND

U24

U24

4

VEN

VOUT

5

VIN

GND

2

Vo=1.2*(R371+R372)/R371= 4.8V

5

C620

C620

C604

C604

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

+AZA_VDD

C570

C570

+5V_ADO

SURR-L

R521 20K_6R521 20K_6

ADOGND

ADOGND

R513 100_4R513 100_4

SPDIF_OUT SPDIF_OUT_268

R504 0_4R504 0_4

3

ADJ

1

ADOGND

SURR-R

EAPD

C418

C418
*10U-25V_1206

*10U-25V_1206

R333

R333
*36K_4

*36K_4

ADOGND

R332

R332
*12K_4

*12K_4

A1A:(10/2) change from GND to ADOGND

C608

C608
.1U-10V_4

.1U-10V_4

C564

C564

10U-10V_8

10U-10V_8

ADOGND

+3V

C622

C622
10U-10V_8

10U-10V_8

FRONT-L
FRONT-R

U34

U34

37

MONO-OUT

38

AVDD2

39

HP-OUT-L

40

JDREF

41

HP-OUT-R

42

AVSS2

43

NC

44

NC

45

NC

46

DMIC-CLK

47

EAPD

48

SPDIFO

C568

C568

.1U-10V_4

.1U-10V_4

A1A: (9/26) Remove DMIC-34

4

MIC1-VREFO-R

MIC2-VREFO

MIC1-VREFO-L

+5V_ADO

SENSEB

26

27

29

31

32

34

35

33

36

NC

Sense B

FRONT-L

FRONT-R

MIC1-VREFO-R

Acer ALC268

Acer ALC268

DVDD11DMIC-1/2/GPIO02DMIC-3/4/GPIO33DVSS14SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD29SYNC10RESET#11PCBEEP

DMIC-12

4

30

GPIO1

BIT_CLK268

DMIC-CLK
DMIC-12

28

VREF

AVSS1

MIC2-VREFO

LINE1-VREFO

MIC1-VREFO-L

+AZA_VDD

ACZ_SDIN268

R485 33_4R485 33_4
R484 33_4R484 33_4

C569 22P-50V_4C569 22P-50V_4

DMIC-CLK 20
DMIC-12 20

MIC1-VREFO-R 32

MIC2-VREFO 32

MIC1-VREFO-L 32

C2A:(12/25) solve S3 resume POP sound issue
change C619 from CH61004M2E8 to CH5222K9A09

C619 2.2U/X5R-10V_8C619 2.2U/X5R-10V_8

1 2

ADOGND

25

AVDD1

24

LINE1-R

23

LINE1-L

22

MIC1-R

21

MIC1-L

20

CD-R

19

CD-GND

18

CD-L

17

MIC2-R

16

MIC2-L

15

NC

14

NC

13

Sense A

12

A1A: (9/20) Change serial R value from 22ohm to 33ohm

LINE1-R
LINE1-L
MIC1-R

MIC1-L

C602 .1U-10V_4C602 .1U-10V_4
C594 .1U-10V_4C594 .1U-10V_4
C590 .1U-10V_4C590 .1U-10V_4

MIC2_INT_R
MIC2_INT_L

A1A:(11/1)FAE: Docking MIC share from System MIC

SENSEA

SENSEB

C399 1U-16V_6C399 1U-16V_6

R507 20K_6R507 20K_6
R501 10K_6R501 10K_6

R492 5.1K_6R492 5.1K_6
R346 *20K_6R346 *20K_6

C411

C411

100P-50V_6

100P-50V_6

ADOGND

ADOGND

R334

R334
1K_4

1K_4

3

LINE1-R 32
LINE1-L 32
MIC1-R 32
MIC1-L 32

MIC2_INT_R 32
MIC2_INT_L 32

AU_JD_MIC

R347 0_4R347 0_4

MIC1_JD 32
LINEIN_JD 32,33
AU_JD_LINEIN 32,33

LINEOUT_JD#_OD 32,33
AU_JD_MIC 33

R317 10K_4R317 10K_4

A1A: (9/20) Change DGND to AGND

3

BEEPBEEP_1PCBEEP

ACZ_RST#_AUDIO 14,32

ACZ_SYNC_AUDIO 14

ACZ_SDIN0 14

BIT_CLK_AUDIO 14

ACZ_SDOUT_AUDIO 14

2

LINE OUT Amplifier

D3A:(1/31) SMT B open issue:
(1)Remove footprint for D41,D42,R525. DEL R577 (0 ohm)
(2) Remove net SECNTL

MUTE#32

C2A:(12/25) no stuff R525,D41, add bypass R577 to solve pop sound issue

+3V

A1A:(9/28) EMI suggest to change from AGND to GND

A1A:(9/20) Refer to ZD1,
change R352,R532,R543,R358 to 10k

R532

FRONT-L HPL

C614

C614

4.7U-6.3V_8

4.7U-6.3V_8

FRONT-R

C621

C621

4.7U-6.3V_8

4.7U-6.3V_8

L62

L62

1 2

BLM11A601S_6

BLM11A601S_6

C575

C575
*10U-10V_8

*10U-10V_8

C601

C601

10U-10V_8

10U-10V_8

ADOGND ADOGND

.1U-10V_4

.1U-10V_4

FRONT-L_1

C616

C616

FRONT-R_1

R532

+3V_AVDD

MUTE#

R543

R543

+3V_AVDD

Change C19 to 4.7u

SYS / EZ MIC
SYS Line-in
EZ Line-in

SYS/EZ Line-out

EZ MIC (reserve)

SN74LVC1G86DCKR

SN74LVC1G86DCKR

+3V

R318 10K_4R318 10K_4

U22

U22

4

3 5

1
2

PCMSPK_DELAY
PCSPK

PCMSPK_DELAY 22
ACZ_SPKR 16

MDC

ACZ_SDOUT_MDC14

ACZ_SYNC_MDC14

ACZ_SDIN114

ACZ_RST#_MDC14 BIT_CLK_MDC 14

A1A:(10/13) change R598 from 22ohm to 33 ohm

ACZ_SDOUT_MDC
ACZ_SYNC_MDC

R509 33_4R509 33_4

+1.5V

2

MDC_SDIN1

+1.5V 4,9,17,27,38

FRONT-L_2

10K_6

10K_6

+NVDD

10K_6

10K_6

FRONT-R_2

+NVDD

C606

C606

4.7U/6.3V_6

4.7U/6.3V_6

ADOGND

A1A:(9/20) Refer to ZD1,
Add 0 ohm(Default:no stuff)

CN14

CN14

1
3
5
7
9

11

ACS_88018-124L

ACS_88018-124L

C583

C583
*10P-50V_4

*10P-50V_4

1

R352 10K_6R352 10K_6

C425 47P_4C425 47P_4

U37

U37

4

3

15

6

10

1

16

8

GND
AC_SDO
GND
AC_SYNC
AC_SDI
AC_RST#

-

-

INL

+

+

SVDD
PVDD

SVSS
NVDD

SHDNR#
SHDNL#

+

+

-

-

INR

G1412

G1412

C426 47P_4C426 47P_4

R358 10K_6R358 10K_6

+NVDD+3V

+1.5V_MDC

2

RSV

4

RSV

6

3.3V

8

GND

10

GND

12

AC_BCLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AUDIO(ALC268)/AMP/MDC

AUDIO(ALC268)/AMP/MDC

AUDIO(ALC268)/AMP/MDC

Date: Sheet

Date: Sheet

Date: Sheet

5

OUTL

9

NC1

11

NC2

12

NC3

14

NC4

2

SGND

13

PGND

17

TPAD

OUTR

C421 4.7U/6.3V_6C421 4.7U/6.3V_6

U35

U35

1

VOUT

2

VIN

3

C-

G5930

G5930

D3A:(1/21) Change CN14/pin 2 from +3v to +3v_s5.
Fix Modem wake from S3 fail issue.

+1.5V

ADOGND

7

HPR

C+

/SHDN

GND

A1A:(10/30) change from +3V_S5 to +3V

+3V_S5

R486

R486

R491

R491

0_6

0_6

*0_6

*0_6

A1A:(9/27)change P/N (follow ZC3)

R508

R508
*22_4

*22_4

C585

C585

*10P-50V_4

*10P-50V_4

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

1

6
5
4

ADOGND

HPL 32

HPR 32

+3V_S5

31 39Tuesday, April 10, 2007

31 39Tuesday, April 10, 2007

31 39Tuesday, April 10, 2007

MUTE#

A1A:(9/21)
refer to ZD1,
add it.

C573

C573

.1U-10V_4

.1U-10V_4

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

Speaker Amplifier

C591

ADOGND

C611

C611
47P-50V_4

47P-50V_4

C5894.7U/6.3V_6 C5894.7U/6.3V_6
C6354.7U/6.3V_6 C6354.7U/6.3V_6

R544 0_4R544 0_4
R526 0_4R526 0_4

ADOGND

C591

10U-10V_8

10U-10V_8

ADOGND

SURR-L-2

SURR-R-2

SPEAKER

C610

C610
47P-50V_4

47P-50V_4

A1A(10/5):Refer to ZD1, change R604~R607 to 10K

C2A:(12/25) change R546/R520 from 10k to 9.1k

MUTE#

SURR-L-1

R546 9.1K_6R546 9.1K_6

SURR-R-1

R520 9.1K_6R520 9.1K_6

R545 10K_6R545 10K_6

C632 330P_4C632 330P_4

R519 10K_6R519 10K_6

C592 330P_4C592 330P_4

1441 MUTE

+3V_AVDD

R341

R341
10K_4

10K_4

C613

C613
47P-50V_4

47P-50V_4

MUTE# 31EAPD31

C612

C612
47P-50V_4

47P-50V_4

D D

R359

R359
100K_4

100K_4

Q26

Q26

MUTE#

2

2N7002

2N7002

ADOGND

AMP_MUTE#28

ACZ_RST#_AUDIO14,31

C C

INSPKL- INSPKL-N
INSPKR-

INSPKR+

SURR-L31
SURR-R31

+5V_ADO

1441 MUTE

3

1

C2A:(12/25) STEVEN: no stuff d27

L29 BK1608LL121_6L29 BK1608LL121_6
L30 BK1608LL121_6L30 BK1608LL121_6
L31 BK1608LL121_6L31 BK1608LL121_6
L32 BK1608LL121_6L32 BK1608LL121_6

A1A:(10/27) SWAP R&L channel for ME request

C633 2.2U/10V_8C633 2.2U/10V_8
C596 2.2U/10V_8C596 2.2U/10V_8

INSPKL+
INSPKR+

21

D26 MTW355D26 MTW355

21

D28 MTW355D28 MTW355

21

D27 *MTW355D27 *MTW355

ADOGND

INSPKL+NINSPKL+NINSPKL+
INSPKR-N
INSPKR+N

C631

C631

.1U-10V_4

.1U-10V_4

CN16

CN16

1
2

5

3

6

4

4

+5V_ADO

U36

U36

1

LIN1

18

RIN1

2

LIN2

17

RIN2

16

RBYPASS

3

LBYPASS

5

SHDN

11

SE/BTL

G1441

G1441

ACS_85204-0400L

ACS_85204-0400L

ADOGND

+3V_AVDD

C634 1U-16V_6C634 1U-16V_6

T129T129

6

15

14

4

8

CT

NC

VDD3

LVDD

RVDD

GND/HS22GND/HS

GND/HS

GND/HS

THRMPAD

9

21

10

25

ADOGND

R549 *0_6R549 *0_6
R511 *0_6R511 *0_6
C416 .1U-10V_4C416 .1U-10V_4
C409 1000P-50V_4C409 1000P-50V_4
C437 .1U-10V_4C437 .1U-10V_4
C432 .1U-10V_4C432 .1U-10V_4
C427 .1U-10V_4C427 .1U-10V_4
C410 .1U-10V_4C410 .1U-10V_4

23

SECNTL

IN1/IN2

ROUT+

ROUT­LOUT+
LOUT-

VOL

ADOGND

20

13
19

12
24
7

INSPKR+
INSPKR­INSPKL+
INSPKL-

A1A:(10/30) Add 0.1uF *4

ADOGND

3

SYSTEM LINE OUT

HPL31
HPR31

LINEOUT_JD#_OD

R363 75_4R363 75_4

HPR

R362 75_4R362 75_4

A1A(10/9):Change (D44/Pin1) from +5V to +5V_ADO

D31

D31

3

*DA204U

*DA204U

Docking LINE OUT/SPDIF

HPL_SYS

R360 0_4R360 0_4

HPR_SYS

R361 0_4R361 0_4

+5V_ADO

1

2

ADOGND

AU_LINEOUT_L
AU_LINEOUT_R

A1A:(9/29)Add net name

HPL_1

L40 BK1608LL121_6L40 BK1608LL121_6

HPR_1

L39 BK1608LL121_6L39 BK1608LL121_6

R364

R364

R365

R365

*1K_4

*1K_4

*1K_4

*1K_4

AU_LINEOUT_L 33
AU_LINEOUT_R 33

2

C434

C434
470P-50V_4

470P-50V_4

ADOGND

C433

C433
470P-50V_4

470P-50V_4

1

CN29

CN29

1

HPL_SYSHPL
HPR_SYS

LINEOUT_JD#_OD31,33

D3A:(2/5) change CN30,CN31,CN32 footprint
from AUDIO-010164FR006GX53XL-C-8P to AUDIO-JA60331-X39T4-7F-8P

D3A:(2/9) Change CN29 P/N from DFTJ06FR019 to DFTJ06FR061

FOX_JA6033L-L3T4-7F

FOX_JA6033L-L3T4-7F

ADOGND

7
2
6
3
4

8
5

SYSTEM LINE IN

LINE1-L_1

LINE1-L31

B B

LINE1-R31

4.7U-6.3V_8C417 4.7U-6.3V_8C417

4.7U-6.3V_8C423 4.7U-6.3V_8C423

L33 BK1608LL121_6L33 BK1608LL121_6

LINE1-R_1

L34 BK1608LL121_6L34 BK1608LL121_6

D3A:(2/5) change CN30,CN31,CN32 footprint
from AUDIO-010164FR006GX53XL-C-8P to AUDIO-JA60331-X39T4-7F-8P

D3A:(2/9) Change CN30 P/N from DFTJ06FR017 to DFTJ06FR059

LINEINL_SYS

LINEINR_SYS

ADOGND

C436

C436
470P-50V_4

470P-50V_4

LINEIN_JD31,33

C435

C435
470P-50V_4

470P-50V_4

A1A(10/9):Change (D48/Pin1) from +5V to +5V_ADO

LINEIN_JD

A1A(10/9):Change (D48/Pin2) from GND to ADOGND

CN30

CN30

1
2
6
3
4

5

FOX_JA6033L-U3T4-7F

FOX_JA6033L-U3T4-7F

D32

D32

1

3

2

*DA204U

*DA204U

7

8

+5V_ADO

ADOGND

Docking LINE IN

C429

C429
*.1U-10V_4

*.1U-10V_4

AU_LINEIN_L
AU_LINEIN_R

AU_LINEIN_R

C430

C430
*.1U-10V_4

*.1U-10V_4

AU_LINEIN_L 33
AU_LINEIN_R 33

4

LINEINL_SYS

A A

LINEINR_SYS

L36 BK1608LL121_6L36 BK1608LL121_6
L37 BK1608LL121_6L37 BK1608LL121_6

ADOGND ADOGND

5

SYSTEM MIC

Analog MIC

MIC2-VREFO31

MIC2_INT_R31
MIC2_INT_L31

MIC2-VREFO31

no stuff (reserve)

CN33

CN33

1
2
3
4

*85204-0200L_INT_MIC

*85204-0200L_INT_MIC

3

MIC2-VR-R

MIC2-VR-L

R541 2.2K_4R541 2.2K_4
C629 2.2U_6C629 2.2U_6
R542 2.2K_4R542 2.2K_4
C630 2.2U_6C630 2.2U_6

AU_MIC_IN_L
AU_MIC_IN_R

R342 *2.2K_4R342 *2.2K_4
C400 *2.2U_6C400 *2.2U_6
C586 *2.2U_6C586 *2.2U_6

R506 *2.2K_4R506 *2.2K_4

2

MIC1_L1
MIC1_R1

MIC1-VREFO-L31

MIC1-L31

MIC1-VREFO-R31

MIC1-R31

MIC1_L

L41 BK1608LL121_6L41 BK1608LL121_6

MIC1_R

L42 BK1608LL121_6L42 BK1608LL121_6

A1A:(11/1)FAE: Docking MIC share from System MIC

D29

D29

2 1

*MTW355

*MTW355

D30

D30

2 1

*MTW355

*MTW355

B1C:(11/24) Reserve circuit for Analog Mic

C2A:(12/12)Acer change internal Mic solution to Fortemedia,
Remove CN33,D29,D30,R342,R506,C400,C586

MIC2_INTR1
MIC2_INTL1

L38 BK1608LL121_6L38 BK1608LL121_6
L35 BK1608LL121_6L35 BK1608LL121_6

AU_MIC_IN_L 33
AU_MIC_IN_R 33

C584

C584
*.1U-10V_4

*.1U-10V_4

ADOGNDADOGND

C420

C420
*.1U-10V_4

*.1U-10V_4

CN31

CN31

1

MIC1_L
MIC1_R

MIC1_JD31

C431

C431

C428

C428

470P-50V_4

470P-50V_4

470P-50V_4

470P-50V_4

A1A(10/9):Change (D50/Pin1) from +5V to +5V_ADO

D3A:(2/5) change CN30,CN31,CN32 footprint
from AUDIO-010164FR006GX53XL-C-8P to AUDIO-JA60331-X39T4-7F-8P

D3A:(2/9) Change CN31 P/N from DFTJ06FR018 to DFTJ06FR060

MIC2_INTR1
MIC2_INTL1

FOX_JA6033L-P3T4-7F

FOX_JA6033L-P3T4-7F

ADOGND

7
2
6
3
4

8
5

MIC1_JD

A1A(10/9):Change (D50/Pin2) from GND to ADOGND

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Quanta Computer Inc.

Speaker AMP / Audio JACK

Speaker AMP / Audio JACK

Speaker AMP / Audio JACK

1

*DA204U

*DA204U

+5V_ADO

1

2

ADOGND

3B

3B

3B

of

32 38Tuesday, April 10, 2007

32 38Tuesday, April 10, 2007

32 38Tuesday, April 10, 2007

D33

D33

3

http://mycomp.su/x/

A

D45

D45

+3VSUS

Q4

Q4
RHU002N06

RHU002N06

R375

R375

2.2K_4

2.2K_4

R374

R374

2.2K_4

2.2K_4

C47

C47
.1U-10V_4

.1U-10V_4

3

Q5

Q5
RHU002N06

RHU002N06

3

+2.5V

E3A:(3/16)Change Q4,Q5 Pin2 from +3V to +3VSUS .
(Docking side pull up to +3VSUS plane)

+2.5V

1

4 4

3 3

A1A: (9/20)
(1)Remove Level-shift circuit (already in docking side)
(2)change Power from +3V to +2.5V
(3)stuff 2.2k (R374,R375)

2 2

A1A:(9/18) Refer to Acer DVR1019

1 1

PDAT_SMB2,13,16,18,27

PCLK_SMB2,13,16,18,27

DOCK_DDC_DT21

DOCK_DDC_CK21

DOCKIN#16,18

A1A:(11/1) add level shift circuit, already PU 5VA_PR in docking side.
B1C:(11/20) add R566 0ohm for debug use

+3V_S5

R33

R33

100K_4

100K_4

DOCKIN#

D3A:(2/8)The system side should have a diode (D45,D46) to block the AC adaptor power and ezDock.

2

EZ_DAT_SMB

1

+3VSUS

2

EZ_CLK_SMB

1

DVI_DDC_DT

DVI_DDC_CK

+3V_S5

Q6

Q6

RHU002N06

RHU002N06

2

R566 0_4R566 0_4

PR_INSERT_5V 19,20

C647

C647
.1U-10V_4

.1U-10V_4

2N7002

2N7002

2N7002

2N7002

Q28

Q28

Q29

Q29

10K_4

10K_4

2

R32

R32

10K_4

10K_4

2

R31

R31

3

+5V

3

1

+3V_S5

3

1

21

SW1010C

SW1010C

D3A:(1/30)Acer DVR1012_Design Requirement Checklist:
The system side should have a diode
to block the AC adaptor power coming from ezDock.

E3A:(3/14)Change D46 footprint from SBM1040-3P
to SBM1040-3P-ZU1 for SMT C-test open issue

E3A:(3/21) change C451,C452 from 0.1uF
(CH41002KB93) to 0 ohm (CS00002JB38)(R802,R803)

A1A: (9/20) Add PL 100K for DVI_DET

DET_GND#

PR_STS 28

C2A:(12/22) EMI suggest to add .1u to prevent noise

A1A:(9/20) Add Dockin circuit

A

B

D46

VA1 VA1

DVI_DET21

DOCKIN#_RDOCKIN#_1

VA2DCIN

3

R373

R373
100K_4

100K_4

AUDIO_AGND

R34 0_6R34 0_6
R35 0_6R35 0_6
C49 *.1U-10V_4C49 *.1U-10V_4
C50 *1000P-50V_4C50 *1000P-50V_4

AUDIO_AGND

A1A:(9/20) Add R and C
between AUDIO_AGND and GND

B

D46

2
1

PDS1040S

PDS1040S

A1A: (9/20) Add .1uF *2 for VA

1394TPAP025

1394TPAN025

1394TPBP025

1394TPBN025

PCIE_TXP115
PCIE_TXN115

PCIE_RXP115
PCIE_RXN115

PCIE_CLK1+2
PCIE_CLK1-2

DVI_D0+21
DVI_D0-21

DVI_D1+21
DVI_D1-21

TX0P_PR18
TX0N_PR18

TX1P_PR18
TX1N_PR18

A1A:(11/1) Change LAN pin define

PR_KB_DATA28
PR_KB_CLK28

PR_SIN30

PR_SOUT30

PR_DSR#30

PPT_PE30
PPT_BUSY30
PPT_ACK#30

PPT_ERR#30

PPT_AFD#30

PPT_STB#30

DOCK_R19
DOCK_G19
DOCK_B19

DOCK_HSYNC19
DOCK_VSYNC19

DOCK_DDDA19
DOCK_DDCK19

CRT_SENSE#15,19,28

AU_LINEIN_L32
AU_LINEIN_R32

AU_LINEOUT_L32
AU_LINEOUT_R32

AU_MIC_IN_L32
AU_MIC_IN_R32

AU_JD_MIC31

VA1

C21

C21
.1U-50V_6

.1U-50V_6

POWER DECOUPLING

R803 0_4R803 0_4
R802 0_4R802 0_4

DVI_DDC_DT
DVI_DDC_CK

DOCKIN#_R

TIPL RINGL

C

D3A:(2/12) Base on DSC command, change CN22 P/N from DFHDF8MS000 to DFHDF4MS000

VA1

C70

C70
.1U-50V_6

.1U-50V_6

CN22

CN22

PCIE_RXP1_R
PCIE_RXN1_R

C

155

P1

156

P2

1

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

A11

12

A12

13

A13

14

A14

15

A15

16

A16

17

A17

18

A18

19

A19

20

A20

21

A21

22

A22

23

A23

24

A24

25

A25

26

A26

27

A27

28

A28

29

A29

30

A30

31

A31

32

A32

33

A33

34

A34

35

A35

36

A36

37

A37

38

A38

39

A39

40

A40

41

A41

42

A42

43

A43

44

A44

45

A45

46

A46

47

A47

48

A48

49

A49

50

A50

51

A51

52

A52

53

A53

54

A54

55

A55

56

A56

57

A57

58

A58

59

A59

60

A60

61

A61

62

A62

63

A63

64

A64

65

A65

66

A66

67

A67

68

A68

69

A69

70

A70

76

A76

77

A77

159

G3

160

G4

161

G5

162

G6

FOX_QL0177L-D26C02-8F

FOX_QL0177L-D26C02-8F

G10

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70

B76
B77

157

G1

158

G2

DET_GND#

78

B1

79

B2

80

B3

81

B4

82

B5

83

B6

84

B7

85

B8

86

B9

87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147

153
154

163

G7

164

G8

165

G9

166

D

PCIE_RST#

R208 0_6R208 0_6

PWRBTN#

A1A: (9/20) refer to Acer Design Guide:
this signal is asserted to power on the system.
A buffer used for PWRBTN# on the system side
may be necessary to prevent the signal interfered
by the contact noise.

D

E

VA1

VA1 VA2 VA1 VA1 VA1

12

C453

C453

10U/X6S-25V_1206

10U/X6S-25V_1206

.1U-50V_6

.1U-50V_6

A1A:(10/27) EMI suggest add 10u*1pc, 0.1u*5pcs

D3A:(2/2) change net name from VA to VA1

E3A:(3/21) Change C453 from CC1210 (CH61004M3E5) to CC1206 (CH61004M2E8)
Andy inform CH61004M3E5 will EOL

1394TPAP1 25
1394TPAN1 25

1394TPBP1 25

1394TPBN1 25

EZ_DAT_SMB
EZ_CLK_SMB

PCIE_CLKREQ# 2

SYS_CHARGE 28
HIGH_LOAD 28

DVI_D2+ 21
DVI_D2- 21

DVI_CLK+ 21
DVI_CLK- 21

LAN_ACTLED# 18

LAN_LILED# 18

TX2P_PR 18

TX2N_PR 18

TX3P_PR 18

TX3N_PR 18

PR_MS_DATA 28
PR_MS_CLK 28

PR_RTS# 30

PR_CTS 30

PR_DTR# 30

PR_RI 30
PR_DCD# 30
PPT_INIT# 30

PPT_SLIN# 30
PPT_PD0 30
PPT_PD1 30
PPT_PD2 30
PPT_PD3 30
PPT_PD4 30
PPT_PD5 30
PPT_PD6 30
PPT_PD7 30
PPT_SLCT 30

DOCK_TV_COMP 20
DOCK_TV_C/R 20
DOCK_TV_Y/G 20
AU_SPDIF 31

LINEOUT_JD#_OD 31,32
AU_JD_LINEIN 31,32

USBP3+ 15

USBP3- 15

PLTRST# 15,16,18,21,25,26,27,28,30

A1A: (9/20) COPP#: reserve for ATI chipdst

VAUX_25

D3A:(1/30) Base on Safety team request
change Modem capacitor(470p-3KV_1808) to meet standard
(add mark onto the capacitor surface)
change C37,C48 from CH147GK0I09 to CH147GK0I00

A1A:(10/2) change from USB5 to USB3

+5V

PWRBTN#

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Docking(ezDockII/II+)

Docking(ezDockII/II+)

Docking(ezDockII/II+)

Date: Sheet

Date: Sheet

Date: Sheet

C43

C43

C438

C438

.1U-50V_6

.1U-50V_6

.1U-50V_6

.1U-50V_6

A1A:(9/26)Add PLTRST# for (CN22/Pin88)

A1A: (9/20) change +VCC_LAN to VAUX_25

A1A:(9/28)change CONN from 2 pin to 4 pin

470p-3KV_1808C37 470p-3KV_1808C37
470p-3KV_1808C48 470p-3KV_1808C48

A1A: (9/20) change 5VS to +5V

+3VPCU

53

1

4

2

U25

U25
*TC7SH08FU

*TC7SH08FU

R372 0_4R372 0_4

Quanta Computer Inc.

Quanta Computer Inc.

C60

C60

C34

C34

.1U-50V_6

.1U-50V_6

RINGL
TIPL
RINGL
TIPL

C446

C446
.1U-10V_4

.1U-10V_4

PROJECT : ZU1

PROJECT : ZU1

E

.1U-50V_6

.1U-50V_6

33 39Tuesday, April 10, 2007

33 39Tuesday, April 10, 2007

33 39Tuesday, April 10, 2007

C442

C442

CN3CN3

4
3

6
2
1

5

NBSWON# 28,29

of

of

of

3B

3B

3B

http://mycomp.su/x/

MAIND

SUSD

5

MAIND 38

SUSD 38

4

3

2

1

15V

PQ18

PQ18

PQ17

PQ17

1 2

PR121

PR121

0_4

0_4

578

3 6

241

578

3 6

241

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR117

PR117

22_8

22_8

MAIND

ISL6236_3V

VL

PR97

PR97
390K_4

1 2

PR116 210K_4PR116 210K_4

PC97

PC97

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PD6

PD6

2

1

CHN217

CHN217

PD8

PD8

2

1

CHN217

CHN217

390K_4

PC74

PC74

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR95

PR95
150K_4

150K_4

DDPWRGD_R

3V5V_EN

1 2

PC82

PC82

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3

PC81

PC81

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3

1 2

PR128

PR128
200K_4

200K_4

PC91

PC91

0.1U/X7R-50V_6

0.1U/X7R-50V_6

5VPCU

PR124

PR124
1_6

1_6

MAIND

9
10
11
12
13
14
15
16
37
36

1

BAT54-7-F

BAT54-7-F

3

PD7

PD7

.01U/X7R-16V_4

.01U/X7R-16V_4

12

PR122

PR122
39K_4

39K_4

3V5V_EN

5V_DH

D3A:(2/15)Andy inform change PR116 from CS42102FB00 to CS42002FB12

5V_LX

5V_DL

PC78

PC78

+15V_ALWP

PC80

PC80

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+5VPCU

65241

PQ21

3

PQ21
FDC653N_NL

FDC653N_NL

+5V

PC93

PC93

0.1U/X7R-50V_6

0.1U/X7R-50V_6

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

35

VL

PC99

PC99
1U/10V_6

1U/10V_6

2

+3VPCU

3

PC76

PC76

VL

1 2

1 2

5

6

7

8

4

VIN

RTC

LDO

LDOREFIN

PU7

PU7

ISL6236

ISL6236

BST117DL118VDD19SECFB20GND21PGND22DL223BST2

PAD33PAD34PAD

12

PR126

PR126
39K_4

39K_4

65241

PQ29

PQ29
FDC653N_NL

FDC653N_NL

PC107

PC107

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC71

PC71

4.7U/X7R-10V_8

4.7U/X7R-10V_8

PR102

PR102
0_4

0_4

12

1

3

REF

TON2VCC

ONLDO

REFIN2

OUT2

SKIP#

PGOOD2

24

PR125 0_6PR125 0_6

PC73

PC73

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR103

PR103
*0_4

*0_4

32
31

ILIM2

30
29
28
27

EN2

26

DH2

25

LX2

PR123

PR123
1_6

1_6

1 2

PC75

PC75
1U/10V_6

1U/10V_6PC77

12

1 2

1 2

DDPWRGD_R

3V5V_EN

12

PR107

PR107
0_4

0_4

PR109

PR109
*0_4

*0_4

PR112

PR112
287K_4

287K_4

PC90

PC90

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3V_DH

3V_DL

3V_DL

3

4

G2

S2

G2

S2

6

5

3V_LX

Change PL12 part number from (CV-2575MZ02) to (CV-2575TZ51)

DDPWRGD_R

OCP:6.25A

L(ripple current)
=(19-3.3)*3.3/(2.5u*0.5M*19)
~2.18A

Iocp=6.25-(2.18/2)=5.16A
Vth=5.16A*28mOhm=145mV
R(Ilim)=(145mV*10)/5uA
~294K

+3VPCU

PC105

PC105

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+3V +3V_S5

S5D

3

65241

PQ27

PQ27
FDC653N_NL

FDC653N_NL

PC104

PC104

0.1U/X7R-50V_6

0.1U/X7R-50V_6

2

D1 S1/D2

D1 S1/D2

7

1

8

PC94

PC94

0.1U/X7R-50V_6

0.1U/X7R-50V_6

D1

D1

PQ23

PQ23

FDS6900AS

FDS6900AS

G1

G1

3V_DH

SUSD

PC102

PC102

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC87

PC87

2200P/X7R-50V_4

2200P/X7R-50V_4

PL12

PL12

2.5uH_7.5A

2.5uH_7.5A

T144T144

PC86

PC86

10U/X6S-25V_1206

10U/X6S-25V_1206

PR118

PR118
0_6

0_6

PR115
*0_6

*0_6

+3VPCU

3

PL10

PL10

HI0805R800R-00_8

HI0805R800R-00_8

PC83

PC83

10U/X6S-25V_1206

10U/X6S-25V_1206

OCP : 6.25A

3VPCU

PC103

PC103

0.1U/X7R-50V_6

0.1U/X7R-50V_6

65241

PQ22

PQ22
FDC653N_NL

FDC653N_NL

+3VSUS

PC100

PC100

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+3VPCU

+

+

VIN

PC142

PC142

330U/6.3V_6X5.7

330U/6.3V_6X5.7

PC96

PC96

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PL20

PL20

HI0805R800R-00_8

HI0805R800R-00_8

D D

VIN

PL7

PL7

HI0805R800R-00_8

HI0805R800R-00_8

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC77

PC79

PC79

2200P/X7R-50V_4

2200P/X7R-50V_4

SYS_SHDN#3

10U/X6S-25V_1206

10U/X6S-25V_1206

PC72

PC72

10U/X6S-25V_1206

10U/X6S-25V_1206

PC84

PC84

Change PL11 part number from (DC-15A00036) to (DC-15A00010)

OCP: 10A

+5VPCU

C C

PC95

PC95

10U/X6S-25V_1206

10U/X6S-25V_1206

5VPCU

+

+

PC143

PC143

330U/6.3V_6X5.7

330U/6.3V_6X5.7 PR115

PC92

PC92

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR113

PR113

0_4

0_4

1 2
12

PR114

PR114
*0_4

*0_4

PL11

PL11

1.5uH_10A

1.5uH_10A

FDS8884

FDS8884

FDS6690AS

FDS6690AS

OCP:10A

L(ripple current)
=(19-5)*5/(1.5u*0.4M*19)

B B

S5_ON28,38

A A

~6A
Iocp=10-(6/2)=7A

Vth=7A*15mOhm=105mV
R(Ilim)=(105mV*10)/5uA
~210K

VIN

PR159

PR159
1M_6

1M_6

PQ24

PQ24

2

DTC144EU

DTC144EU

PR160

PR160
1M_6

1M_6

1 3

+5VPCU

15V

PC108

PQ26

PQ26

241

FDS8884

FDS8884

PC101

PC101

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC108

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+5V_S5

PR127

PR127

578

1M_6

1M_6

S5D

3

2

1

PQ44

PQ44
2N7002E

2N7002E

3 6

C2A:(12/10) change S5_ON control circuit

B1C:(11/29)Change PQ26 from FDS6690AS (BAM66900022) to FDS8884 (BAM88840006)

5

4

3

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

SYSTEM 5V/3V (ISL6236)

SYSTEM 5V/3V (ISL6236)

SYSTEM 5V/3V (ISL6236)

1

3B

3B

34 39Tuesday, April 10, 2007

34 39Tuesday, April 10, 2007

34 39Tuesday, April 10, 2007

3B

of

of

of

http://mycomp.su/x/

5

+1.05V

PR141

PR139

PR138

PR138
*0_6

*0_6

PWR_MON

H_VID6

PSI#3

PR52 0_8PR52 0_8

12

PC17

PC17

0.1U/X7R-50V_6

0.1U/X7R-50V_6

D D

PR139
*0_6

*0_6

H_VID5 H_VID2H_VID3 H_VID0H_VID1H_VID4

PR25 4.99K_6PR25 4.99K_6

12

for ISL6262A

PSI#

PGD_IN

PC41

PC41

1U/X7R-25V_8

1U/X7R-25V_8

PR60

PR60
10_6

10_6

PR140

PR140
*0_6

*0_6

Close to Phase 1 Inductor

+3VSUS

A1A:(10/20) no stuff PR75
already have PU R in CPU side

C C

H_PROCHOT#3

ED8-B -0623-add

Panasonic
ERT-J0EV474J

PSI#_1

PR37

PR37
*0_6

*0_6

DPRSLPVR

B B

A A

PR36

PR36

*10K_4

*10K_4

PR146

PR146

470K_4 NTC

470K_4 NTC

.01U/X7R-16V_4

.01U/X7R-16V_4

PM_DPRSLPVR6,16

ICH_DPRSTP#3,6,14

VR_PWRGD_CK410#16

ED8-B -0623-390p to330p

Throttling temp.
105 degree C

PSI# PSI#_1
VR_ON

PC26

PC26

H_VID04
H_VID14

H_VID24
H_VID34
H_VID44
H_VID54
H_VID64

VRON28

PR26

PR26

255_4

255_4

PR40 97.6K_4PR40 97.6K_4

PC28

PC28

220P/X7R-50V_4

220P/X7R-50V_4

PR22

PR22

4.02K_4

4.02K_4

1 2

PR59 0_4PR59 0_4
PR79 499_4PR79 499_4
PR55 0_4PR55 0_4
PR53 0_4PR53 0_4

PR30 1K_4PR30 1K_4

1000P/X7R-50V_6

1000P/X7R-50V_6

12

PR33 0_4PR33 0_4
PR34 *0_4PR34 *0_4
PR31 147K_6PR31 147K_6

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

PC20

PC20

1 2

PC21

PC21

470P/X7R-50V_4

470P/X7R-50V_4

PR29 6.81K_4PR29 6.81K_4

PC27

PC27

1 2

1000P/X7R-50V_6

1000P/X7R-50V_6

12

PR141
*0_6

*0_6

+5V_S5

A1A:(10/2) change from +5VSUS to +5V_S5

PC40

PC40

0.1U/X7R-50V_6

0.1U/X7R-50V_6

1 2

21

GND

49

GND_T

2

PSI#

PGD_IN

3

PGD_IN

4

RBIAS

5

VR_TT#

6

NTC

PC23

PC23

7

12

15N/X7R-50V_6

15N/X7R-50V_6

VR_ON
DPRSLPVR

CLKEN#

.01U/X7R-16V_4

.01U/X7R-16V_4

PR38

PR38

1K_4

1K_4

.01U/X7R-16V_4

.01U/X7R-16V_4

PC32

PC32

37
38
39
40
41
42
43
44
45
46
47

13

12

11

10

9

PC29

PC29

1 2

SOFT

VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
DPRSLPVR
DPRSTP#
CLK_EN#

VDIFF

FB2

FB

COMP

VW

12

PR61

PR61
10_6

10_6

22

VCC

VIN_6262

ISL6262A

ISL6262A

RTN

15

20

VIN

12

4

PR142

PR142
*0_6

*0_6

12

PR47

PR47
10_4

10_4

12

PC33 0.1U/X7R-50V_6PC33 0.1U/X7R-50V_6

48

PU3

PU3

3V3

VSEN

DROOP

14

16

PR48

PR48

3.48K_4

3.48K_4

PC24

PC24

.01U/X7R-16V_4

.01U/X7R-16V_4

1 2

PR41 0_4PR41 0_4
PR43 0_4PR43 0_4

PR143

PR143
*0_6

*0_6

+3V

A1A:(10/27) change from 10k to 1.91k

PR46

PR46

1.91K_4

1.91K_4

1

PGOOD

UGATE1

BOOT1

PHASE1
LGATE1

PGND1

ISEN1

PVCC

UGATE2

BOOT2

PHASE2
LGATE2

PGND2

ISEN2

NC

OCSET

VSUM

VO

DFB

17

ED8-B -0623-3.9k to 3.48k

PC31

PC31
180P/NPO-50V_4

180P/NPO-50V_4

12

35

PR69 2.2_6PR69 2.2_6

36

1 2

0.22U/X5R-25V_8

0.22U/X5R-25V_8

34
32
33
24

31

27

PR73 2.2_6PR73 2.2_6

26

1 2

28
30
29
23

25

8

19

12

0.22U/X7R-10V_6

0.22U/X7R-10V_6

18

ISL6262_VO

PR144

PR144
*0_6

*0_6

PC46

PC46

PC45

PC45

1 2

4.7U/X6S-25V_8

4.7U/X6S-25V_8

PC47

PC47

0.22U/X5R-25V_8

0.22U/X5R-25V_8

VSUM

ED8-B -0623-33nf to 68nf

12

PC36

PC36

68N/X7R-25V_6

68N/X7R-25V_6

PC39

PC39

PR49

PR49

1K_4

1K_4

Parallel

DELAY_VR_PWRGOOD 3,6,16

A1A:(10/20) EMI suggest to add it

12

ISEN1

PC44

PC44

0.22U/X5R-25V_6

0.22U/X5R-25V_6

+5V_S5

A1A:(10/2) change from +5VSUS to +5V_S5

12

6262_PH2
6262_LG2

ISEN2

PC42

PC42

0.22U/X5R-25V_6

0.22U/X5R-25V_6

PC25

PC25

12

1000P/X7R-50V_4

1000P/X7R-50V_4

PR35 13.3K_4PR35 13.3K_4

PR58

PR58

PR57

PR57

2.7K_4

2.7K_4

11K_4

11K_4

PR145

PR145

Panasonic
ERT-J1VR103J

10K _6 NTC

10K _6 NTC

12

PC35

PC35

0.22U/X5R-25V_6

0.22U/X5R-25V_6

VCCSENSE 4

VSSSENSE 4

3

6262_UG1

6262_PH1

2200P/X7R-50V_4

2200P/X7R-50V_4

6262_LG1

12

6262_UG2

A1A:(10/20) EMI suggest to add it

2200P/X7R-50V_4

2200P/X7R-50V_4

12

PC130

PC130

PC131

PC131

4

4

VSUM

ISEN2

4

4

VSUM

ISEN1

Close to Phase 1 Inductor

VIN_6262

12

12

5

PC49

PC49

PC43

10U/X6S-25V_1206

10U/X6S-25V_1206

213

PQ36

PQ36
AOL1414

AOL1414

5

PQ35

PQ35

213

AOL1412

AOL1412

PR70 3.65K_6PR70 3.65K_6

PR74 10K_6PR74 10K_6

PR72 1_6PR72 1_6

PR71 *0_6PR71 *0_6

5

10U/X6S-25V_1206

10U/X6S-25V_1206

213

PQ38

PQ38
AOL1414

AOL1414

5

PQ37

PQ37

213

AOL1412

AOL1412

PR65 3.65K_6PR65 3.65K_6

PR62 10K_6PR62 10K_6

PR67 1_6PR67 1_6

PR66 *0_6PR66 *0_6

PC43

10U/X6S-25V_1206

10U/X6S-25V_1206

A1A:(10/2) Remove PD10 for layout space issue

VIN_6262

12

PC136

PC136

A1A:(10/2) Remove PD11 for layout space issue

PC135

PC135

10U/X6S-25V_1206

10U/X6S-25V_1206

12

PC132

PC132
470U/25V

470U/25V

2

+

+

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC134

PC134

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PL6

PL6

HI0805R800R-00_8

HI0805R800R-00_8

PL5

PL5

HI0805R800R-00_8

HI0805R800R-00_8

12

Merom: VCC_CORE/ 44A

PC48

PC48

Yonah: VCC_CORE/ 36A

PL17 0.36uHPL17 0.36uH

12

1 2

3

PR76

PR76
0_6

0_6

PL18 0.36uHPL18 0.36uH

1 2

PR77

PR77
0_6

0_6

3

4

PR75

PR75
0_6

0_6

4

12

PC53

PC53

330u_2V_7343

330u_2V_7343

PR78

PR78

330u_2V_7343

330u_2V_7343

0_6

0_6

+

+

PC51

PC51

VIN

330u_2V_7343

330u_2V_7343

12

+

+

PC50

PC50

12

+

+

VCC_CORE

12

+

+

PC52

PC52

330u_2V_7343

330u_2V_7343

1

5

4

3

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

CPU Core ( ISL6262A)

CPU Core ( ISL6262A)

CPU Core ( ISL6262A)

1

3BCustom

3BCustom

3BCustom

of

of

of

35 39Tuesday, April 10, 2007

35 39Tuesday, April 10, 2007

35 39Tuesday, April 10, 2007

http://mycomp.su/x/

1

B1C:(11/30) T211 Power sequence issue
(1)change PR134 from 0 ohm to 47k ohm.
(2)stuff C448 0.1uF

A A

B B

MAINON28,37,38

HWPG_1.05V28

A1A:(10/18) Reserve .1UF

PR134 47K_6PR134 47K_6

+3V

PR137

PR137
*10K_6

*10K_6

PC125

PC125

0.1U/X7R-50V_6

0.1U/X7R-50V_6

C448

C448

.1U_6

.1U_6

1000P/X7R-50V_6

1000P/X7R-50V_6

PC123

PC123

PR133

PR133

1M_6

1M_6

12

PC120

PC120

12

.01U/X7R-50V_6

.01U/X7R-50V_6

2

A1A:(10/2) change from +5VSUS to +5V_S5

PR136

PR136

10_6

10_6

PU8

PU8
SC411MLTRT

SC411MLTRT

15
16

1
2
3
4
6
5

14

EN/PSV
VIN
VOUT
VCCA
FBK
PGOOD
VSSA
NC
NC

GND18GND19GND20GND

BST

ILIM

VDDP

PGND

TPAD

21

DH

LX

DL

PC126

PC126
*.1U_6

*.1U_6

13
12
11
10
9
8
7
17

+5V_S5

PR8 13.7K_6PR8 13.7K_6

DL-1.5V

PR8 Change from 6.65K(CS26653F911) to 15K(CS31503F939)

PD10

PD10
RB500V

RB500V

PC124

PC124
.1U/X7R-25V_8

.1U/X7R-25V_8

DH-1.5V

3

12

PC127

PC127

4.7U/Y5V-10V_8

4.7U/Y5V-10V_8

578

3 6

578

3 6

241

241

4

VIN-1.5V

12

PC114

PC114

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PQ33 Change from AOL1414 to FDS8884 (BAM88840006)

PQ33

PQ33

PQ34 Change from AOL1412 to FDS6690AS (BAM66900022)

FDS8884

FDS8884

PL19

PL19

1R5UH-3.8mR

1R5UH-3.8mR

PQ34

PQ34
FDS6690AS

FDS6690AS

+

+

PC129

PC129

560U/2.5V_6X5.7

560U/2.5V_6X5.7

12

PC116

PC116

10U/X6S-25V_1206

10U/X6S-25V_1206

PC128

PC128

10U/Y5U-10V_8

10U/Y5U-10V_8

PL14

PL14

HI0805R800R-00_8

HI0805R800R-00_8

PC115

PC115

10U/X6S-25V_1206

10U/X6S-25V_1206

PR9

PR9
11K_6

11K_6

PR10

PR10
10K_6

10K_6

VIN

PC7

PC7
33P/NPO-50V_6

33P/NPO-50V_6

1.05V_FB

5

10A

+1.05V

VOUT=(1+R2/R3)*0.5

B1C:(11/29) Change PR8 from 20K(CS32003F933) to 6.65K ohm (CS26653F911)

PR9 Change from 20K to 11K (CS31103F926)

C C

D D

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

1

2

3

Size Document Number Rev

VTT 1.05V (SC411)

VTT 1.05V (SC411)

VTT 1.05V (SC411)

Date: Sheet

Date: Sheet

4

Date: Sheet

36 39Tuesday, April 10, 2007

36 39Tuesday, April 10, 2007

36 39Tuesday, April 10, 2007

5

3B

3B

3B

of

of

of

http://mycomp.su/x/

5

+1.8VSUS

PC55

PC55
10U/X6S-25V_1206

PC54

PC54

10U/X6S-25V_1206

PC56

PC56
10U/X6S-25V_1206

10U/X6S-25V_1206

DIS_MODE

PC60

PC60

0.033U/50V_6

0.033U/50V_6

5VIN

5VIN

PR89

PR89

0_6

0_6

FOR DDR II

1
2
4
5
3
6
7
8
9

10

PU4

PU4
TPS51116

TPS51116

VLDOIN
VTT
VTTSNS
GND
VTTGND
MODE
VTTREF
COMP
VDDSNS
VDDQSET

+5VPCU

PGOOD

GND21GND22GND23GND24GND25GND26GND

PR87

PR87

0_6

0_6

DRVH

VBST

DRVL

PGND

27

*1000P/50V_6

*1000P/50V_6

A1A(10/5):change net name from
+SMDDR_VTERM to SMDDR_VTERM

SMDDR_VTERM

D D

SMDDR_VREF

A1A(10/5):change net name from
+SMDDR_VREF to SMDDR_VREF

+1.8VSUS

C C

10U/X6S-25V_1206

10U/X6S-25V_1206

PR84 *0_6PR84 *0_6

PR85 0_6PR85 0_6

PR88

PR88

0_6

0_6

DIS_MODE

4

C2A:(11/22) EMI suggest to add 2.2ohm BST resister in 1.8V power

19

PR153 2.2_6PR153 2.2_6

PC58 0.1U/X7R-50V_6PC58 0.1U/X7R-50V_6

1 2

20
18

LL

17
16

S3_1.8V

11

S3

S5_1.8V

12

S5

5VIN

14

V5IN

13
15

CS

PR86

PR86

PC59

PC59

14K/F_6

14K/F_6

5VIN

12

PC61

PC61

4.7U/X5R-6.3V_6

4.7U/X5R-6.3V_6

B1C:(12/11) Change PR86 from 8.25K (CS28253F938) to 14K (CS31403F919)

PR91 0_6PR91 0_6
PR92 0_6PR92 0_6

C322

C322

C321

C321

*.1U_6

*.1U_6

*.1U_6

*.1U_6

A1A:(10/18) Reserve .1UF

PR90

PR90

+3VPCU

100K/F_6

100K/F_6

B1C:(11/29) Change PR86 from 12K (CS31203F911) to 8.25K (CS28253F938)

MAINON 28,36,38
SUSON 28,38

+3VPCU

HWPG_1.8V 28

3

578

PQ16

PQ16
FDS8884

FDS8884

3 6

241

578

3 6

241

PQ19

PQ19

FDS6690AS

FDS6690AS

C2A:(12/28) EMI request: DEL PR120 2.2ohm(CS-2203F911), stuff PC98

578

3 6

241

PQ20

PQ20
*FDS6690AS

*FDS6690AS

PR100

PR100
*2.2_6

*2.2_6

PC70

PC70

*2200P/50V_6

*2200P/50V_6

1R5UH-3.8mR

1R5UH-3.8mR

PC98

PC98
2200P/50V_6

2200P/50V_6

PL8

PL8

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC151

PC151

PC85

PC85

2200P/X7R-50V_6

2200P/X7R-50V_6

10U/X6S-25V_1206

10U/X6S-25V_1206

PC133

PC133

560U/2.5V_6X5.7

560U/2.5V_6X5.7

+

+

PC89

2

HI0805R800R-00_8

HI0805R800R-00_8

HI0805R800R-00_8

HI0805R800R-00_8

PC88

PC88

10U/X6S-25V_1206

10U/X6S-25V_1206

MAX Current 10A

PC67

PC67

10U/Y5V-10V_8

10U/Y5V-10V_8

PL9

PL9

PL16

PL16

PC149

PC149

2200P/X7R-50V_6

2200P/X7R-50V_6PC89

Add PC150, PC151 0.1u (CH41006K911)
Add PL16 HI0805R800R-00_8 (CX0R800R014)

+1.8VSUS

VIN

PC150

PC150

0.1U/X7R-50V_6

0.1U/X7R-50V_6

1

A1A(10/5):Remove +1.8V circuit

B B

A A

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

5

4

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

DDR 1.8V(TPS51116)

DDR 1.8V(TPS51116)

DDR 1.8V(TPS51116)

1

37 39Tuesday, April 10, 2007

37 39Tuesday, April 10, 2007

37 39Tuesday, April 10, 2007

3B

3B

3B

of

of

of

http://mycomp.su/x/

5

+1.8VSUS

12

PC65

PC65

0.1U/X7R-50V_6

0.1U/X7R-50V_6

D D

HWPG_CPUIO28

MAINON28,36,37

C C

D3A:(2/2) DEL PC137 footprint

+3V

PR99 100K_4PR99 100K_4

REV:3A MODIFY

PR105 0_4PR105 0_4

A1A:(10/18) Reserve .1UF

C339

C339
*.1U_6

*.1U_6

+5VPCU

9338ENMAINON

12

PC69

PC69

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC63

PC63
10U/X5R-6.3V_6

10U/X5R-6.3V_6

3

4

1

PGD

EN

VCC

DRV

ADJ

GND

2

PU6

PU6
G9338 ADJ

G9338 ADJ

6

5

Vout1 = (1+Rg/Rh)*0.5

PQ39 FDS8884PQ39 FDS8884

8
7

5

4

9338DRV

PR147

PR147
0_6

0_6

PC138

PC138

.01U/X7R-16V_4

.01U/X7R-16V_4

1 2

4

1
2
36

Rg

Rh

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR108

PR108
20K_6

20K_6

PR104

PR104
10K_6

10K_6

PC140

PC140

12

10U/X5R-6.3V_6

10U/X5R-6.3V_6

PC139

PC139

PR12 Change from 200K to 10K (CS31003F949)

+1.5V

3A

+

+

PC141

PC141

560U/2.5V_6X5.7

560U/2.5V_6X5.7

3

+1.5V 4,9,17,27,31

MAINON

PR12

PR12

10K_6

10K_6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+1.8VSUS

10U/X5R-6.3V_6

10U/X5R-6.3V_6

PC9

PC9

MAINON

PC64

PC64

+3VSUS

PC10

PC10

10U/Y5U-10V_8

10U/Y5U-10V_8

PC62

PC62

0.1U/X7R-50V_6

0.1U/X7R-50V_6

1 2

PR94

PR94

10K_6

10K_6

12

PC66

PC66

0.1U/X7R-50V_6

0.1U/X7R-50V_6

2

1

GND0

2

EN

3

VIN1

4

VIN2

7

1.24V R1

PC8

PC8

1U/16V_6

1U/16V_6

PR18

PR18
10K_4

10K_4

1 2

+5V

PU5

PU5
G966

G966

4

VPP

2

VEN

3

VIN

8

GND

9

GND

C323

C323
*.1U_6

*.1U_6

A1A:(10/18) Reserve .1UF

5

VO1

6

VO2

8

GND1

9

GND2

ADJ

PU1

PU1
AT814

AT814

VTT-ADJ

PR28

PR28

10.2K_4

10.2K_4

R2

Vout=1.24*[1+(R1/R2)]

PC13 Change from 10U to 22U (CH6221M9A07)

1

PGOOD

6

VO

5

NC

ADJ

7

0.8V

PC13

PC13

22U/Y5U-10V_8

22U/Y5U-10V_8

PR82

PR82

19.6K_6

19.6K_6

PR83

PR83
34K_6

34K_6

PC18

PC18

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC57

PC57

10U/Y5U-10V_8

10U/Y5U-10V_8

1

+2.5V

0.5A

+1.25V

2A

Vout =0.8(1+R1/R2)

VIN

PR93

PR111

PR111
1M_6

1M_6

SUSON28,37

B B

2

PQ15

PQ15

DTC144EU

DTC144EU

PR110

PR110
1M_6

1 3

1M_6

PR93
22_8

22_8

3

2

1

PQ11

PQ11
2N7002E

2N7002E

3

2

1

PR81

PR81
22_8

22_8

PQ10

PQ10
2N7002E

2N7002E

+3VSUS 15V+1.8VSUSSMDDR_VREF

PR96

PR96
22_8

22_8

3

2

PQ13

PQ13
2N7002E

2N7002E

1

PR98

PR98
1M_6

1M_6

SUSDSUS_ON_G

3

2

PQ12

PQ12
2N7002E

2N7002E

1

PC68

PC68
*2200p_4

*2200p_4

SUSD 34

*1U/X7R-25V_8

*1U/X7R-25V_8

S5_ON28,34

PC147

PC147

+3VPCU

1 2

=1.25V

A1A:(10/25) Add +1.5V_S5 circuit (refer to ZD1)
B1C:(11/29) no stuff U38,PC144,PC146,PC147,PR149

SOT23-5

SOT23-5

U38 *AT5206G-1.5V

U38 *AT5206G-1.5V

1

VIN

SH3BP

5

VOUT

4

GND

2

12

PC146

PC146

*470P/X7R-50V_4

*470P/X7R-50V_4

PR150

PR150
*0_4

*0_4

12

PC145

PC145

*10U/X6S-25V_1206

*10U/X6S-25V_1206

+1.5V_S5

200mA

PC144

PC144
*1U/X7R-25V_8

*1U/X7R-25V_8

1 2

PR149

PR149
*0_4

*0_4

A1A(10/5):Remove +1.8V
A1A(10/25):Add +1.25V discharge circuit

VIN

PR106

PR106
1M_6

1M_6

A A

DTC144EU

DTC144EU

5

PQ14

PQ14

2

PR101

PR101
1M_6

1M_6

1 3

MAINON28,36,37

+1.05V +3V 15V+5V+2.5V +1.5VSMDDR_VTERM

PR24

PR24
22_8

22_8

3

2

PQ6

PQ6
2N7002E

2N7002E

1

+1.25V

PR130

PR23

PR27

PR27
22_8

22_8

3

2

PQ5

PQ5
2N7002E

2N7002E

1

4

PR23
22_8

22_8

3

2

PQ4

PQ4
2N7002E

2N7002E

1

PR130
22_8

22_8

3

2

PQ28

PQ28
2N7002E

2N7002E

1

PR129

PR129
22_8

22_8

3

2

PQ25

PQ25
2N7002E

2N7002E

1

PR148

PR80

PR80
22_8

22_8

3

2

PQ9

PQ9
2N7002E

2N7002E

1

3

PR148
22_8

22_8

3

2

PQ40

PQ40
2N7002E

2N7002E

1

PR131

PR131
1M_6

1M_6

MAINDRUN_ON_G

3

2

PQ30

PQ30
2N7002E

2N7002E

1

PC106

PC106
*2200p_4

*2200p_4

MAIND 34

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Discharge (1.5V/2.5V)

Discharge (1.5V/2.5V)

Discharge (1.5V/2.5V)

Date: Sheet

Date: Sheet

2

Date: Sheet

1

38 39Tuesday, April 10, 2007

38 39Tuesday, April 10, 2007

38 39Tuesday, April 10, 2007

3B

3B

3B

of

of

of

http://mycomp.su/x/

5

12

12

PC1

PC1

PC2

PC2

0.1U/X7R-50V_6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC122

PC122

47P/NPO-50V_4

47P/NPO-50V_4

PR3

PR3
100_4

100_4

PD1

PD1
ZD3.6V

ZD3.6V

2 1

3/19 Add fuse

1 2

PF1 BUS-7A-1206PF1 BUS-7A-1206

PR63

PR63

10K_6

10K_6

PR64

PR64

6.8K_6

6.8K_6

PC4

PC4

100P/NPO-50V_4

100P/NPO-50V_4

MBAT+

TEMP_MBAT

PC121

PC121

47P/NPO-50V_4

47P/NPO-50V_4

PD2

PD2
ZD3.6V

ZD3.6V

2 1

ACIN_1

PR68

PR68
10K_6

10K_6

12

PC6

PC6

0.1U/X7R-50V_6

0.1U/X7R-50V_6

MBDATA 28

MBCLK 28

PR152

PR152

*100K/F_6

*100K/F_6

HI0805R800R-00_8

HI0805R800R-00_8

PL2

PL2

PL1

PL1

HI0805R800R-00_8

HI0805R800R-00_8

PD5

PD5

2 1

ZD12V

ZD12V

3/19 Add fuse

PF2 BUS-15A-1206PF2 BUS-15A-1206

PR5 100K/F_6PR5 100K/F_6

TEMP_MBAT

12

PJ1

PJ1
SIT_2DC-G026-I06

SIT_2DC-G026-I06

D D

A1A:(9/27)change CONN (Follow ZH2)

C C

B B

A A

1
2
3

4

5

ACIN28

A1A:(9/27)change Pin define
A1A:(9/29) change footpint: BAT-250133MR007G115ZU-7P-R

CN20

CN20

7
6
5
4
3
2
1

SUY_250133MR007G136ZL

SUY_250133MR007G136ZL

10mil

PR4

PR4
100_4

100_4

E3A:(3/14)Change PD9 footprint from SBM1040-3P

VA

to SBM1040-3P-ZU1 for SMT C-test open issue

21

PD4

PD4
SW1010C

SW1010C

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3/19 NC PR54 , PR56

D3A:(2/2) Andy:change PR54,PR56 from NC to stuff

MTEMP 28

1 2

PC5

PC5
.01U/X7R-50V_6

.01U/X7R-50V_6

Change PR5 from 10K to 100K (CS41003F932)
ADD PR152 and NC. Change PC19 from 3.9n to 10n (CH31003KB11)

5

4

2
1

12

12

PC113

PC113

PC109

PC109

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3/19 Change PR42 from 18_6 to 20_6
3/19 Add PR120 2.2_6

3/19 Change PR51 from 2.2_6 to 20_6
3/19 Add PR154 20_6
3/19 Change PC34 from 1U_8 to 47N_6

CSOP

CELL-SET28

PR154 20_6PR154 20_6

DCIN

BAT-V

6251CELLS_1

PR50

PR50

*100K/F_6

*100K/F_6

CSON

HI0805R800R-00_8

HI0805R800R-00_8

PL4

PL4

PL3

PL3

HI0805R800R-00_8

HI0805R800R-00_8

+3VPCU

PD9

PD9

PDS1040S

PDS1040S

PR51 20_6PR51 20_6

ISL6251_VDD

PR151

PR151
0_6

0_6

2

3

47n/X7R-25V_6

47n/X7R-25V_6

PR54

PR54
*130K_6

*130K_6

PR56

PR56

*10K_6

*10K_6

PR45

PR45
*10K_6

*10K_6

3

*2N7002E

*2N7002E

1

0.02_3720

0.02_3720

VA2

PR132

PR132

1 2

1P

2P

CSIP

CSOP_1

PC34

PC34

PC37

PC37

0.1U/X7R-50V_6

0.1U/X7R-50V_6

DCIN

6251ACSET

6251EN VREF

PR44 10K_6PR44 10K_6

PR39 *10K_6PR39 *10K_6

PQ8

PQ8

6251CELLS_1

6251CELLS_2

PR32

PR32
*100K/F_6

*100K/F_6

*2N7002E

*2N7002E

Change PC15 from 3.3n to 6.8n (CH26804KB18)

CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S

4

Change PR20 from 18K/F to 13K/F (CS31302FB19)

0.1U/X7R-50V_6

0.1U/X7R-50V_6

21

CSOP

22

CSON

23

ACPRN

24

DCIN

2

ACSET

3

EN

4

PC19

PC19

3

.01U/X7R-16V_4

.01U/X7R-16V_4

2

PQ7

PQ7

1

*100P/NPO-50V_4

*100P/NPO-50V_4

CELLS

PC16

PC16

CSIN

3

PC3

PC3

PR120

PR120

2.2_6

2.2_6

PC30

PC30

0.1U/X7R-50V_6

0.1U/X7R-50V_6

19

CSIP

ICOMP5VCOMP

6

6251ICOMP

1 2

6251VCOMP1

6251VCOMP1

6251VCOMP2

1 2

PC15

PC15

6.8n_4

6.8n_4

3

12

PR42

PR42

ISL6251_VDD

20_6

20_6

CSIN_1

20

1

VDD

CSIN

ICM7CHLIM

VRFE

8

PR20

PR20
13K_4

13K_4

3300P/X7R-50V_4

3300P/X7R-50V_4

PR1

PR1
220K_6

220K_6

PR2

PR2
220K_6

220K_6

PC38 2.2U/X5R-10V_8PC38 2.2U/X5R-10V_8

PR15

PR15

4.7_6

4.7_6

ISL6251_VDDP

15

VDDP

BOOT

UGATE

PHASE

LGATE

PGND

GND

VADJ

ACLIM

9

PU2

PU2
ISL6251A

ISL6251A

PC12

PC12
100P/NPO-50V_4

100P/NPO-50V_4

PR17

PR17

100_4

100_4

PC14

PC14

2

PQ31

PQ31
SUD45P03-15

SUD45P03-15

43

1

1 6
2
3

IMD2AT108

IMD2AT108

1 2

PR21 2.7_6PR21 2.7_6

6251B_2

16

ISL6251_UGATE

17

ISL6251_PHASE

18

ISL6251_LGATE

14

13
12

11

10

5
4

PQ1

PQ1

PC11 4.7U/X5R-10V_8PC11 4.7U/X5R-10V_8

1 2

PD3

PD3
RB500V

RB500V

PC22 0.1U/X7R-50V_6PC22 0.1U/X7R-50V_6

6251B_1

1 2

VADJ
ACLIM

CC-SET 28

LIM = 1/R2(((0.05/VREF=2.39)VACLM)+0.050)

PR19

PR19

71.5K_6

71.5K_6

PR16

PR16
10K_6

10K_6

PR6 0_6PR6 0_6

PC112 10U/X6S-25V_1206PC112 10U/X6S-25V_1206

PC111 0.1U/X7R-50V_6PC111 0.1U/X7R-50V_6

1 2

VA3VA3VA3VA3

578

3 6

241

578

VREF

3 6

PR13

PR13
*514K_6

*514K_6

241

Float = 4.2V / CELL

PR14

PR14
*514K_6

*514K_6

CURRNT LIMIT POINT = 2.908A

3.79A=1/0.02((0.05/2.365)Vaclm+0.05)

Vaclm=0.3899V

ICMNT 28

3/19 Add PR17
3/19 Add PC14

B1C:(11/29) Change PC19 from 0.01u (CH31003KB11) to 3.9n (CH23904KB13)
B1C:(11/29) Change PC15 from 0.01u (CH31003KB11) to 3.3n (CH23306JB16)
B1C:(11/29) Change PR20 from 3.3K (CS23302FB12)to 18K (CS31802FB09)
B1D:(12/09) Change PR20 from 0402 (CS31802FB09) to 0603 (CS31803F913)

ADP WATT monitor output

For 62W setting. Vicm will 1.3V

2

1

PQ2

PR7

PR7
33K_6

33K_6

2

PQ3

PQ3

PC119

PC119

10U/X6S-25V_1206

10U/X6S-25V_1206

PQ2
SUD45P03-15

SUD45P03-15

1

3

1

PC118

PC118

1

PR11

PR11
10K_6

10K_6

BAT-V

.01U/X7R-50V_6

.01U/X7R-50V_6

VIN

12

PC110

PC110

0.1U/X7R-50V_6

0.1U/X7R-50V_6

D/C# 28

2N7002E

2N7002E

VIN

PL13

PL13

HI0805R800R-00_8

HI0805R800R-00_8

PL15 Change from 2R2 to 4R7(DC-4775M001)
PR135 Change from 0.02 to 0.03(CS+0308FL00)

PQ32

PQ32
FDS8884

FDS8884

4R7UH(PCMC063T-4R7MN)

4R7UH(PCMC063T-4R7MN)

DRC 18m ohm

PQ41

PQ41
FDS6690AS

FDS6690AS

CSOP
CSON

PL15

PL15

6251LR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Charger (ISL6251)

Charger (ISL6251)

Charger (ISL6251)

Date: Sheet

Date: Sheet

Date: Sheet

B1C:(11/29) Change PR135 from 0.03(CS+0308FL00)
to 0.02 (CS+0208GL17)

PR135

PR135

0.03_3720

0.03_3720

1 2

1P

2P

10U/X6S-25V_1206

10U/X6S-25V_1206

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

43

PC117

PC117

39 39Tuesday, April 10, 2007

39 39Tuesday, April 10, 2007

39 39Tuesday, April 10, 2007

+

PC148

+

PC148
100U/25V_6X7.7

100U/25V_6X7.7

of

of

of

3B

3B

3B

http://mycomp.su/x/

5

4

3

2

1

ISL6262A

PU3

D D

+5VPCU+3VPCU

ISL6236

VINVIN

C C

ADAPTER

BATTERY

Charger
ISL6251

PU2

VIN

PU7

VCC_CORE

<VRON>

+5VPCU

<AC/DC Insert>

FDS6690AS

PQ26

FDC653N

PQ21

+3VPCU

<AC/DC Insert>

FDC653N

PQ27

FDC653N

PQ22

FDC653N

PQ29

AT5206G

U38

+5V_S5

<S5_ON>

+5V

<MAIND>

+3V_S5

<S5D>

+3VSUS

<SUSD>

+3V

<MAIND>

+1.5V_S5

<S5_ON>

AT814

PU1 <MAINON>

+2.5V

B B

TPS51116

PU4

A A

+1.8VSUS

SC411

PU8

5

4

+1.8VSUS

<SUSON>

G966

PU5

G9338

PU6

SMDDR_VTERM

<SUSON>

SMDDR_VREF

<SUSON>

+1.05V

<MAINON>

+1.25V

<MAINON>

+1.5V

<MAINON>

ZU1 Power Table

3

2

1

http://mycomp.su/x/

SLP_S3#(SUSB#):
Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).

SLP_S4#(SUSC#):
Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power

5

4

3

2

1

D D

AC Adapter

Battery

Charger Circuit

PU2

1

VIN

Always System power

PU7

NBSWON#

2

+3VPCU

+5VPCU

9

SUSON

10

3

4

S5_ON

6

S5_Power

PU26,PQ27

5

+5V_S5
+3V_S5

RSMRST#

7

DNBSWON#

8

SUSC#

SUSB#

EC

SB

15

CK_PWRGD

CK505

U19

MAINON

C C

VRON

13

PWROK_EC

12

17

ICH_PWROK

U21

18

H_PWRGD

CPU

U30

MPWROK

U14

13

CPU CORE VR +VCC_CORE

PU3

B B

DELAY_VR_PWRGOOD

VR_PWRGD_CK410#

16

U32

20

14

19

H_CPURST#

PLTRST#_NB

10

G9338

PU6

SC411

PU8

FDC653N

PQ21,PQ29

+1.5V

+1.05V

+5V
+3V

HWPG_3/5VPCU

HWPG_CPUIO
HWPG_1.05V
HWPG_1.8V

11

HWPG

MPWROK

NB

G966

PU5

A A

DDR VR +1.8VSUS

PU4

5

+1.25V

SMDDR_VTERM
SMDDR_VREF

U29

4

3

2

ZU1 Power Sequence

1

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

CPU Clock select issue1

2

3

D D

4

5

6

7

8

9

10

11

12

13

C C

14

15

16

17

18

19

20

21

22

B B

23

24

25

26

27

28

29

30

31

32

A A

33

34

PCI Clock issue change R186 value from 33ohm to 22 ohm (refer to Intel check list 1.301)

CK505 issue ICS FAE suggest to change C542,C287 from 4.7u to 10u

EMI issue EMI suggest to reserve R436,R199,R444 for EMI test

CK505 issue Add PCIE_CLKREQ# PU to +3v

CK505 issue SWAP SRC3 and SRC9

CK505 issue Add PCIE_CLKREQ# PU to +3v

CK505 issue Add PCIE_CLKREQ# PU to +3v

CK505 issue FAE : (14M_ICH and SIO_14M) signals trace should be equal length

CPU issue Remove XDP/ITP signals (no use)

CPU issue Retain the termination resistors (R157,R150~R152) on these signals even when ITP700 not implemented.

Thermal Trip issue change Q19/Pin3 net name from THERM_SYS_PWR to SYS_SHDN#

CPU FAN issue change CPU FAN CONN (follow ZC3)

CPU FAN issue

CPU FAN issue

CPU Thermal monitor issue Add (U27/Pin6) PU to 3V

CPU Thermal monitor issue

CPU Thermal monitor issue

CPU Power issue stuff C198, unstuff C217 (base on layout location)

GMCH Power issue Short R115~R117,change +VCC_CFXCORE_INT to +1.05V

GMCH Power issue

GMCH Power issue 9

DDR Power issue stuff R192, no stuff R191,R193 for SMDDR_VREF_DIMM

ICH8-M Strap issue Stuff R241, no stuff R266 (Disable Internal VR powering VccLAN1_05, VccCL1_05)

ICH8-M HDA issue add R283,R465,R463,R267 for MDC module (base on Intel Design Giude)

ICH8-M issue

ICH8-M issue

ICH8-M issue

ICH8-M issue

ICH8-M issue

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

Stuff R179,R198,R447 for CPU Clock select issue

Remove U19/Pin48 (no use)CK505 issue

remove SATACLKREQ function, change R188 value from 475ohm to 22 ohmCK505 issue

Add CPUFAN#_ON to (U28/PIN1)

Add Diode D39 and PU +5V for (U28/Pin1)

remove R389, already PU in ICH8

change SMBUS from MBCLK/MNDATA to 2ND_MBCLK/2ND_MBDATA (Q30,Q31)

Short R122,R138, remove VCC_RXR_DMI circuit (connect to +VCC_PEG directly)

INTEL CRB VCCD_QDAC Filter Modification:change L13 to R125(100ohm), change R145(*0 ohm) to C507(1uF)

Change RTC BATTERY CONN CN12(follow to ZC3)RTC BAT issue

PU RCIN# to +3VICH8-M issue

Remove ICH8-M GLAN/SATA1/SATA2 circuit (no use)

change net name (U31/Pin2) from VR_PWRGD_CLKEN# to VR_PWRGD_CK410#

Remove SATACLKREQ#(U32/Pin:AG13),RI# (U32/Pin:AF17) ;{no use}

no support iAMT, remove SMB_CLK_ME,SMB_DATA_ME

change DOCKIN#_ICH_R PU from +3V to +3V_S5

APPROVE BY : James Lu

4

DRAWING BY:Barry Lee Stage: A1

DOCUMENT NO:

3

DATE :2006/12/09

2

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

CHANGE LIST SHEET 1

1

2

2

2

2

2

2

2

2

2

2

3

3

3

3

3

3

3

3

3

3

4

8

9

13

14

14

14

14

14

16

16

16

16

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

Power sequence issue35

36

37

D D

38

39

40

41

42

43

44

45

46

47

C C

48

49

50

51

52

53

54

55

56

B B

57

58

59

60

61

62

63

64

65

66

A A

67

68

ICH8-M issue Remove WOL_EN (U32/Pin:AG19) -no use

ICH8-M issue

ICH8-M issue

ICH8-M issue

ICH8-M issue

EMI issue

ICH8-M Power issue Reserve R308,R313 for +1.5V MDC module 17

LAN Power issue

LAN Power issue BCM FAE: Change capacitance value from 47-uF to 10-uF.

LAN Power issue

LAN Switch issue

LAN Switch issue

LAN Switch issue

LAN Transformer issue

LAN CONN issue

CRT issue

CRT issue

CRT issue

CRT issue

CRT issue

LVDS issue change CCD function from USB7 to USB8

LVDS issue

TV issue

SDVO issue Change R51,R56 value from 2.2k to 4.7k (FAE suggest R value from 4K~9K)

PCMCIA issue refer to BL3. Add G_RST# circuit.

PCMCIA issue

Card reader issue

Card reader issue

Card reader issue

PCMCIA issue

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

change (U21/Pin5) from +3V to +3VSUS (refer to ZC1)

Remove SUSM# (used to control power planes to the Intel AMT sub-system)

Remove (1)ME_EC_ALERT# (2)EC_ME_ALERT (no use)

connect LAN_RST#(U32/Pin:AH20) to PLTRST# (If no use internal LAN MAC connect LAN_RST# to PLTRST#)

change DOCKIN#_ICH_R PU from +3V to +3V_S5

EMI suggest C373 from 0.1u to 10uF

BCM FAE: Pull up Vmainprsnt (U10/Pin53) to the system main power (3.3v), but not the standby power

BCM FAE:stuff R30,no stuff R47(in order to pull up C90,C86 and Q16/pin 3 to 3V_LAN rail)

EMI suggest C59 from 0.1u to 10uF

Add Diode D4 for isolation (Dockin#)

change LAN Switch from MAX4892 to PI3L500

change TRANSFORMER GND(U3/Pin15,18,21,24) to MGND

Change CONN P/N (follow ZC1)

change CONN GND(CN19/Pin13,14) to MGNDLAN CONN issue

change C439, C440,C7,C441 to 30~50pF(default :no stuff)

Change CRT_SENSE# from CRT CONN Pin11 to Pin5 (follow Acer define)

Change CRT CONN P/N(follow ZC1)

change R16,R17 from 2.7k to 2.2k ; R10,R12 from 39 to 0 ohm

change U1 from CM2009 to IP4772

Change C12 from CH6102M9900 to CH61004M3E5 (refer to ZC3)

Change CN17 CONN P/N (follow ZC1)

FAE suggest R189's value under 47 ohm.

no stuff R496,R522

FAE suggest R503's value under 47 ohm.Card reader issue

Remove U39/Pin99, no use (XMDAT4B is for 8 bit MMC,remove it.)

Change C593 from 0.1u to 10uF,EMI suggest add C587 0.1uF

change PCMCIA CONN (follow BH1)

APPROVE BY : James Lu

4

DRAWING BY:Barry Lee Stage: A1

DOCUMENT NO:

3

DATE :2006/12/09

2

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

CHANGE LIST SHEET 2

1

16

16

16

16

16

16

17

18LAN Power issue change LAN power from +3V_LAN_S5 to +3V_S5

18

18

18

18

18

18

18

18

18

19

19

19

19

19

20

20

20

21

22

22

23

23

23

24

24

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

PATA ODD issue69

70

71

D D

72

73

74

75

76

77

78

79

80

81

C C

82

83

84

85

86

87

88

89

90

B B

91

92

93

94

95

96

97

98

99

100

A A

101

102

PATA ODD issue

PATA ODD issue

Mini Card issue

Mini Card issue

Mini Card issue

Mini Card issue

Mini Card issue

Bluetooth issue 27

USB CONN issue

EC issue Change EC from WPC8769 to WPC8763

EC issue

EC issue

EC issue

EC issue

EC issue

Audio issue

Audio issue

Audio issue

Docking issue (CN22/Pin18,Pin19):(1)Remove Level-shift circuit (2)change Power from +3V to +2.5V (3)stuff 2.2k

Docking Power issue Add .1u*7 , 10U*1 for VA

Docking issue

Docking issue

Leakage issue

ICH8-M issue

Power sequence issue

ICH8-M issue

ICH8-M issue

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

change R253 from 0 to 33ohm

Add C326,C327,C344 for +5V

Remove D23, already add in page29

Reserve R349,R350,R337,R345,R344,R338,R339 for debug card use

Add (CN28/Pin39,41) to +3V_WL_VDD (follow ZO1)

Remove (CN28/Pin36,38) USB circuit

Remove (CN28/Pin46) BT LED

Remove 0.1uF (CN28/Pin23,25), already in WL module 27

SI suggest to remove 22pF*2 (CN5/Pin3,4)

SI suggest to remove 22pF*2 (CN11/Pin2,3)

change U7/Pin5,6 from MBCLK/MNDATA to 2ND_MBCLK/2ND_MBDATA

Remove ME_EC_ALERT#

FAE:Change U14/Pin80 from +3VPCU to +A3VPCU

change C130,C131 from 6.8p to 5.6p

Add D18 for HWPG_CPUIO

SI suggest to remove 22pF*2 (CN9/Pin2,3)Finger Printer issue

Remove PPT PU 4.7K circuit (already in docking)SuperIO issue

Change Serial resister R484,R485 value from 22 ohm to 33 ohm

reserve R513 to reduce ringing

Refer to ZD1, change R546,R520,R545,R519 to 10k

Reserve U25 for docking PWRBTN#Docking issue

Change Docking Pin141/142 from USB5 to USB3Docking issue

PL DVI_DET 100k to GMD (CN22/Pin20)

Change LAN pin define

Change CN29,CN30,CN31 P/N (Base on Acer request)Audio issue A1B 32

Change INTVRMEN from PD to PU

add D43,D44 to stop leakage from EC to SB

change DOCKIN# from GPIO7 to GPIO12

short PWROK_EC to MPWROK

PU GPIO10 to +3V, PD GPIO14 to GND

remove R229,R233,C355

APPROVE BY : James Lu

4

DRAWING BY:Barry Lee Stage: A1 / A2

DOCUMENT NO:

3

DATE :2006/12/09

2

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

A1A

B1C 14ICH8-M Strap issue

B1C

B1C

B1C

B1C

B1C

CHANGE LIST SHEET 3

1

26

26

26

27

27

27

27

27

28

28

28

28

28

28

29

30

31

31

32

33

33

33

33

33

33

16

16

16

16

16

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

PCMCIA issue103

104

105

D D

106

107

108

109

110

111

112

113

114

115

C C

116

117

118

119

120

121

122

123

124

B B

125

126

127

128

129

130

131

132

133

134

A A

135

136

1394 issue

Mini Card issue

Mini Card issue

EC issue

EC issue

LED issue

Audio issue

Docking issue

Mini Card issue

GMCH Power issue B1D

CPU Clock issue

LAN issue

Audio issue

DVI Detect issue 21C2A

GMCH Power issue

ICH8M issue no stuff R259 to prevent leakage issue C2A 16

EMI issue

EMI issue

EMI issue

ME issue

DVI issue 21C2A

Power monitor issue C2A

AUDIO issue C2A

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

Reserve R572 for debug use

Change R271,R306,R307 from 56.2 to 5.1k ohm (fix 1394 can't detect issue)

no stuff R353,R348,R356

need support BCM WL Module, Connect CN28/Pin40 to GND

SWAP GPIO1 and GPIO3

Change CN10/Pin1 from +3V to +3VPCU

Base on Me request, change PWR/SUS/BAT LED type

Stuff R330 to fix Internal SPK issue (floating GND issue) 27

Add R566 for Debug use

ME request :change CN28 P/N from DFHD52MS049 to DFHS52FR082 (9.0mm to 9.9mm)

Change C143 from CH71002MJC8 to CH7102MT804 (Z-limit issue,H2.9mm to H1.5mm)

Set CPU Frequency to auto selection (no stuff R179,R198,R447)

Change S5_ON control circuit (follow ZO1/ZD1)

change CK505 VDD_IO from +1.05V to +1.25V. Because VDD_IO will drop out when high loadingCK505 issue 2C2A

Add level shift circuit (follow ZO1), remove D39,no stuff R383.

FAE suggest add 22 Ohm dumping resistors R596,R597 to avoid potential EMI problem C2A 28BIOS EMI issue

Base on BCM IEEE test result, change RDAC value (R42) from 1.24k to 1.18k

Acer change internal Mic solution to Fortemedia,Remove CN33,D29,D30,R342,R506,C400,C586

Intel suggest:Add hotplug circuit to DVI_DET (follow ZC1)

Intel Suggest :ICH8M CPIO20 should not be pulled HIGH.Remove BOARD_ID3 circuit(remove R474,R475)

Intel Suggest :Follow Intel New Guideline(MoW 48 update) Change R51,R56 from 4.7K to 3.9K ohmSDVO issue

Change Crestline VCC_AXM to 1.25V, reference to SR ww48 MoW.reserved 0 ohm resister (R576)

Intel Suggest :All LPC devices support LPCPD# protocol, stuff D7

EMI suggest add C647 to prevent noise for PR_STSEMI issue C2A 33

EMI suggest to add .1u *2 to prevent noise (+3V)

EMI suggest to add 2.2ohm BST resister (PR153) in 1.8V power

EMI suggest add three clip to contact with CPU cooler's fins (PAD23,24,25)

ME request add three pad for fix wire (PAD20,21,22)

remove the U11,R57,R52,C109 to save layout space.

D16 not necessary if 3V/5V fail, EC can't work.

change C619 from CH61004M2E8 to CH5222K9A09 to solve S3 resume POP sound issueS3 resume POP sound issue

no stuff R525,D41, add bypass R577 to solve pop sound issuePOP sound issue

no stuff D27

APPROVE BY : King Wang

4

DRAWING BY:Barry Lee Stage: A2 / B

DOCUMENT NO:

3

DATE :2006/12/09

2

B1C

B1C

B1C

B1C

B1C

B1C

B1C

B1C

B1D

C2A

C2AS5_ON issue

C2AG995 issue 3

C2A

C2A

C2A 16ICH8M issue

C2A 8

C2ASuperIO issue 30

C2A

C2A

C2A

C2A

C2A

C2A

CHANGE LIST SHEET 4

1

22B1C

25

27

27

28

28

29

33

27

9

2

34

18

32

21C2A

30

37

30

30

28

31

31

32

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

137

138

139

D D

140

141

142

143

144

145

146

147

148

149

C C

150

151

152

153

154

155

156

157

158

B B

159

160

161

162

163

164

165

166

167

168

A A

169

170

Audio issue 32

XTAL issue

XTAL issue

XTAL issue 28

EMI issue 37

EMI issue

EMI issue

debug issue

Modem wake from S3 fail issue

CableSence circuit issue

CableSence circuit issue

LED type issue 29

change Modem capacitor to meet safety standard

Power issue

EMI issue

DVI issue 21

ASF issue 16

SMT B open issue 31

CableSence circuit issue 28

LAN switch issue 18

Change 965GM from ES sample to QS sample Change U29 P/N from AJ0QN120T37 to AJ0QP200T09

Change ICH8M from ES sample to QS sample

docking sometimes can't detect DVI device issue change R51,R56 from 3.9k(CS23902FB14) to 4.7k(CS24702JB38).

EMI issue 27

Audio Jack issue

Audio Jack issue

Audio Jack issue

docking CRT flicker issue Reserve C98,R525 for docking CRT flicker issue

system sometimes will no backlight issue .

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Kin Wang

change R546/R520 from 10k to 9.1k

Change Crestline VCC_AXM from +1.25V to +1.05V, reserved 0 ohm resister (R578)

Base on vendor-FCE suggestion, change C580/C579 from CH01206JB05 (12p) to CH02206JB08 (22p)

Base on vendor-FCE suggestion, change C310/C299 from CH03306JBD7 (33p) to CH02706JB06 (27p)

Base on vendor-FCE suggestion, change C130/C131 from CH-5606TB01 (5.6p) to CH01006JBD1 (10p)

EMI request: DEL PR120 2.2ohm(CS-2203F911), stuff PC98

EMI request: reserve .1U for (CN19/pin9,10)

EMI request: reserve L-C footprint for debug use (R52,C650)

Stuff R349 , R350 for debug use

Change CN14/pin 2 from +3v to +3v_s5.

Add CableSence circuit (unstuff R78) 18

Add CableSence circuit (reserve R579)

Base on SMT-ME request, change LED type to 2 in 1,DEL LED4,LED5,LED6,LED7,R570,R571,Add LED2,LED3

Base on ASSEMBLY -Line request, remove SW1, add G2 footprint

change C37,C48 from CH147GK0I09 to CH147GK0I00

The system side should have a diode (D45,D46) to block the AC adaptor power and ezDock.

Change L4,L5,L6 from CX8BA220007 to CX8BA470003

remove U13,R68,R75,R73,C98 for layout space issue

Connect SMLINK0 to SMBCLK and SMLINK1 to SMBDATA (Add R474,R475 for debug use)

(1)Remove footprint for D41,D42,R525. DEL R577 (0 ohm) (2) Remove net SECNTL

change LAN Low power pin from GPIO47 to GPIO52

Change U6 from AL000500005 to AL000500030 (change to 8KV solution)

Change U32 from AJ0QM740T31 to AJ0QN230T10

change CN30,CN31,CN32 footprint from AUDIO-010164FR006GX53XL-C-8P to AUDIO-JA60331-X39T4-7F-8PAudio Jack issue

EMI suggest, add common Choke, co-lay R795,R796

Change CN30 P/N from DFTJ06FR017 to DFTJ06FR059

Change CN29 P/N from DFTJ06FR019 to DFTJ06FR061

Change CN31 P/N from DFTJ06FR018 to DFTJ06FR060

Follow ZO1 design,Remove R24 footprint, DEL D3(BC000316Z07).Add R73,Q36,Q37backlight control issue 20

EMI suggest add C652(0.1uF)

For short term solution:change R22 from 10k(CS31002JB28) to 1K (CS21002FB24)

APPROVE BY : James Lu

4

DRAWING BY:Barry Lee Stage: B/C

DOCUMENT NO:

3

DATE :2006/12/09

2

C2A

C2A

C2A

C2A

C2A

C2A

C2A

C2A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

CHANGE LIST SHEET 5

1

8GMCH POWER issue

25

2

18

20

27

31

18

29SW button issue

33

33

19

5~11

14~17

32

21

32

32

32

19

19EMI issue

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

171

172

173

D D

174

175

176

177

178

179

180

181

182

183

C C

184

185

186

187

188

189

190

191

192

B B

193

194

195

196

197

198

199

200

201

202

A A

203

204

Quanta DSC Team issue 33

rise time of LCDVCC is >0.5ms and <=10ms.

Card reader issue

Card reader issue

Card reader issue

Card reader issue

Shortage issue

EMI issue 30

DPST issue 20

Shortage issue

ICH8M Power issue

implement it for CPU protect in C build.

Battery life issue.

Change EMI Spring Material

C-Test SMT open issue

ZR1 issue

C-Test SMT open issue

Change NB P/N for RAMP

Change SB P/N for RAMP

Material Lead issue

G995 failure rate issue 3

Run-in auto shot down issue 28 & 39

move D15~D18 location for FFC cable issue 28 & 34

LED issue

HDD Mylar issue 2

Docking issue 33

Docking issue 33

Disable LAN Low Power mode

PO" sounds when insert PCMCIA card

ESD issue 19

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

Base on DSC command, change CN22 P/N from DFHDF8MS000 to DFHDF4MS000

change U2 from AL004280000(AAT4280IGU-3-T1) to AL004280018(AAT4280IGU-1-T1).

no stuff 43K(CS34302JB19):R562,R527,R533,R538,R539,R565,R561,R540,R498,R497,R500,R552,R555

no stuff 10k(CS31002JB28) : R560

Change R547 from 43k (CS34302JB19) to 8.2k (CS28202JB14)

Change R528 from 10K(CS31002JB28) to 43K(CS34302JB19)

Change R125 from CS11003B900 (100 ohm 0.1%) to CS11003F953(100 ohm 1%)

EMI request add two of clip(FDTA1003014) in PAD17 and PAD19 for EMI issue

Acer inform no support DPST in C build, remove R15

Andy inform change PR116 from CS42102FB00 to CS42002FB12

ICH8M Internal VR should not be disabled.no stuff R241, stuff R226

Change R111 from *2.2k to 0ohm,Change R107 from 56.2(CS05622FB22) to 1k(CS21002FB24)

Battery life issue. Disable ICH8M Internal VR (LAN). stuff R241, no stuff R226 for C-build

ME request, change EMI Spring from FDTA1003014 to FDZU1002010

C-test SMT open issue, remove PAD18

Change CN2 Pin define to cover production line issue(Inverter short with signal to burn system)

Change PD9,D46 footprint from SBM1040-3P to SBM1040-3P-ZU1 for SMT C-test open issue

Change U29 P/N form AJ0QP200T09 to AJSLA5T0T05

Change U32 P/N from AJ0QN230T10 to AJSLA5Q0T05

Change R214 from CS02403F908 to CS02403F916 (Lead free)

Add C653 base on G995 failure rate issue

ICMNT connect to EC pin100 , reserve R570 0ohm for debug use, Add C654 to avoid noise

Base on Acer demand, remove wake on lan for Mini PCIE function.no stuff Q25,R357remove wake on lan for Mini PCIE function.

Remove footprint (D16), Remove net (HWPG_3/5VPCU),no stuff PR119

Change LED2, LED3 type base on ME request, Add R800,R801

Change C542 from 0805(CH6102K9A01) to 0603(CH6101M9905) base on ME request(HDD Mylar issue)

Change Q4,Q5 Pin2 from +3V to +3VSUS .(Docking side pull up to +3VSUS plane)

change C451,C452 from 0.1uF (CH41002KB93) to 0 ohm (CS00002JB38)(R802,R803)

Stuff R78(CS24702JB38)

Change C453 from CC1210 (CH61004M3E5) to CC1206 (CH61004M2E8) EOL issue

confirm with BIOS-CM, no need LPC dedug CONN,Remove CN6,R432 footprint to save space for layout. LPC CONN issue

(1)Stuff 10k for R204(2)Don't stuff R456(3)Don't stuff R247LAN_RST# issue

Add 0 ohm (R804) for PCMSPK

Stuff D38 for CRT port

APPROVE BY : Kin Wang

4

DRAWING BY:Barry Lee Stage: C / Ramp

DOCUMENT NO:

3

DATE :2006/12/09

2

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

D3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

CHANGE LIST SHEET 6

1

23

23

23

23

23

9

34

14

3

14

30

30

20

33 & 39

5~11

14~17

14

27

29

18

33

28

16

22

http://mycomp.su/x/

Item:

5

Fixed Issue

4

3

2

Modify List: Schematic Rev. Page

1

205

206

207

D D

208

209

210

211

212

213

214

215

216

217

C C

218

219

220

221

222

223

224

225

226

B B

227

228

229

230

231

232

233

234

235

236

A A

237

238

GLAN issue

ESD issue

PROJECT : ZU1

PROJECT : ZU1

Quanta Computer Inc.

Quanta Computer Inc.

5

PROJECT : ZU1

MB ASSY'S P/N : 31ZU1MB0000 PROJECT LEADER:Jack Wu

Refer to BU1, add circuit for POP sound issue

Stuff R232 (CS02492FB29), The GLAN_COMPO/GLAN_COMPI connection to 1.5-V rail through the resistor remains

change LED type (follow B stage) DEL LED2,LED3, Add LED4~7 29

change ESD protect Diode from location LED/B to MBESD issue 29

Base on PM suggestion, add serial 0 ohm (R806) for debug use.(no stuff)Disable LAN Low power mode 18

APPROVE BY : Kin Wang

4

DRAWING BY:Barry Lee Stage: Ramp

DOCUMENT NO:

3

DATE :2007/03/29

2

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

E3A

CHANGE LIST SHEET 7

1

24PCMCIA POP SOUND issue

14