Quanta ZRZ Schematic

5

4

3

2

1

ZRZ/ZRZL BLOCK DIAGRAM

DDRIII-SODIMM1

P9

D D

DDRIII-SODIMM2

P10

SATA - HDD

SATA - ODD

USB3 Con.

C C

USB3 Con.

P24

P24

P25

P25 P25

Cardreader

CR Con.

P25

B B

USB2 DB

RTS5170-GRT

IO Board
Connector

P25

P25

Azalia

Channel A (CZ)

Channel B

USB Charger

USB2-1 (CCD)

USB2-2 (Touchpad)(CZ-L)

USB2-4 (M.2)

USB2-3 (Touch Screen)

SATA 0

SATA 1

USB3 - 3
USB2 - 7

USB3 - 2
USB2 - 6

USB2-3

USB2-0

FP4
TDP:15W

IMC

CARRIZO(15h)
60h-6Fh
CARRIZO-L(16h)
30h-3Fh

SATA0

SATA1

USB3.0

APU

BGA 968

USB2.0

P2,3,4,5,6,7,8

CLK

HDA

LPC

PEG
TX/RX

DP0

DP1

DP2

GPP

SPI

RTC

PCIE 0~3

PCIE 4~7 (CZ)

I2C-0 (Touc hpad)(CZ)

I2C-1 (Touc h Screen)( CZ)I2C

DP0

PS8339B

DP1

DP DeMUX

P18

DP2

X'TAL

32.768KHz

X'TAL 48MHz

SPI ROM 8M

CZ:1.8V / CZ-L:3.3V

BATT

P7

P6

GEO GPU

Channel

Meso XT 25W
Exo XT 25W

S3 23mm X 23mm

P11,12,13,14,15 P16

X'TAL

27.0MHz

eDP/TS/CCD Con.

USB2-2 (Touch)

USB2-5 (CCD)

P17

HDMI Con.

P18

DP to VGA
IT6516

P19

GPP1

USB2-4

GPP0

CRT Con.

M.2
WLAN+BT
w/ Debug

P19

P21

LAN

X'TAL
25MHz

RTL8111H

P20

VRAM DDR3-128Mb*16*4 = 1GB
VRAM DDR3-256Mb*16*4 = 2GB

CZ@ :CARRIZO
CZL@ :CARRIZO-L
SP@ :special part
UBT@ :USB TS
I2CT@ :I2C TS(only CZ reserve)
EV@ :GPU
Maso@ :Maso GPU
Exo@ :Exo GPU
EV_SP@:GPU special part
TPM@ :TPM
TPM_I@:SLB9655TT1.2
TPM_N@:NPCT650AAAWX
GS@ :G-sensor
HDT@ : Debug
KBL@ :KB Backlight
IOAC@ :IOAC
NIOAC@:non-IOAC

BQ24737

Batery Charger

VRAM

Reset Button

RJ45 Con.

ISL62771

CPU CORE / VDDNB

P30

P20

P34,35

TPM

NPCT650

0ohm
option

P23

I2C-0 (CZ)

CY7C65211
USB to I2C
(CZ-L)

2

USB2-1 (CZ-L)

TYPE1 : CZ
TYPE2 : CZL

AUDIO CODEC

ALC25 5-CG

A A

Phone
Jack

Speaker DMIC

P22

5

P22

P22 P30

Knowles
NeoMEMS

P22

LED

P26

K/B Con.

4

K/B BL Con.

P28 P17 P28 P27

IT8987E/BX

P28

EC

HALL SENSOR

FAN Con.
(DAC)

3

PS/2

Touch Pad
Con.

TPS51225

3V/5V

RT8237

0.95V

G5316

+1.5V_SUS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

RT8068

1.8V

P31

ISL62771

VGPU CORE

P32

RT8068

GPU_POWER / VDDC_GFX

P33

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Block Diagram

Block Diagram

Block Diagram

ZRZ

ZRZ

ZRZ

141Wednesday, March 18, 2015

141Wednesday, March 18, 2015

1

141Wednesday, March 18, 2015

P36

P37

P38

1A

1A

1A

1

(CPU)

LAN

A A

1.05V VDDP only for CZ with DDR-2133 memory
If running DDR-1866 or slower memory,
Platform VDDP should be set to 0.95V

WLAN

PCIE_RXP0[20]
PCIE_RXN0[20]

PCIE_RXP1[21]
PCIE_RXN1[21]

VDDP_0.95V

2

CZ: (196R_CS11962FB00)
CZL:(1.69K_CS21692FB01)

R399 SP@196/F_4

3

U10

P_GPP_RXP[ 0]

U9

P_GPP_RXN[ 0]

T6

P_GPP_RXP[ 1]

T5

P_GPP_RXN[ 1]

T9

P_GPP_RXP[ 2]

T8

P_GPP_RXN[ 2]

P7

P_GPP_RXP[ 3]

P6

P_GPP_RXN[ 3]

P_TX_ZVDD_09 5 P_RX_ZVDD_095

U7

P_ZVDDP

U28B

PCIE

4

P_GPP_TXP[0 ]

P_GPP_TXN[0 ]

P_GPP_TXP[1 ]

P_GPP_TXN[1 ]

P_GPP_TXP[2 ]

P_GPP_TXN[2 ]

P_GPP_TXP[3 ]

P_GPP_TXN[3 ]

P_ZVSS/ P_RX_ZVD DP

R1
R2

R4
R3

N1
N2

N4
N3

U6

PCIE_TXP0_C
PCIE_TXN0_C

PCIE_TXP1_C
PCIE_TXN1_C

5

AC-coupling capactior
CZ :Gen3 (220nF) CH4222K9B04
CZL:Gen1/2 (100nF) CH4103K1B08

Current device no Gen3

C558 0.1U/16V/X7R_4
C557 0.1U/16V/X7R_4

C544 0.1U/16V/X7R_4
C543 0.1U/16V/X7R_4

R400 CZL@1K/F_4
R401 CZ@196/F_4

VDDP_0.95V

6

PCIE_TXP0 [20]
PCIE_TXN0 [20]

PCIE_TXP1 [21]
PCIE_TXN1 [21]

LAN

WLAN

7

8

P10

L10

P9

N6
N5

N9
N8

L7
L6

L9

K6
K5

K9
K8

J7
J6

P_GFX_R XP[0]

P_GFX_R XN[0]

P_GFX_R XP[1]

P_GFX_R XN[1]

P_GFX_R XP[2]

P_GFX_R XN[2]

P_GFX_R XP[3]

P_GFX_R XN[3]

P_GFX_R XP[4]

P_GFX_R XN[4]

P_GFX_R XP[5]

P_GFX_R XN[5]

P_GFX_R XP[6]

P_GFX_R XN[6]

P_GFX_R XP[7]

P_GFX_R XN[7]

FP4 REV 0.93

SP@FP4

PEG_RXP0[11]
PEG_RXN0[11]

PEG_RXP1[11]
PEG_RXN1[11]

PEG_RXP2[11]
PEG_RXN2[11]

PEG_RXP3[11]

X4 : CARRIZO-L (G EN2)

B B

C C

X8 : CARRIZO (GEN3 )

PEG_RXN3[11]

PEG_RXP4[11]
PEG_RXN4[11]

PEG_RXP5[11]
PEG_RXN5[11]

PEG_RXP6[11]
PEG_RXN6[11]

PEG_RXP7[11]
PEG_RXN7[11]

P_GFX_TXP[ 0]

P_GFX_TXN[ 0]

P_GFX_TXP[ 1]

P_GFX_TXN[ 1]

P_GFX_TXP[ 2]

P_GFX_TXN[ 2]

P_GFX_TXP[ 3]

P_GFX_TXN[ 3]

P_GFX_TXP[ 4]

P_GFX_TXN[ 4]

P_GFX_TXP[ 5]

P_GFX_TXN[ 5]

P_GFX_TXP[ 6]

P_GFX_TXN[ 6]

P_GFX_TXP[ 7]

P_GFX_TXN[ 7]

M2

PEG_TXP0_C

M1

PEG_TXN0_C

L1

PEG_TXP1_C

L2

PEG_TXN1_C

L4

PEG_TXP2_C

L3

PEG_TXN2_C

J1

PEG_TXP3_C

J2

PEG_TXN3_C

J4

PEG_TXP4_C

J3

PEG_TXN4_C

H2

PEG_TXP5_C

H1

PEG_TXN5_C

G1

PEG_TXP6_C

G2

PEG_TXN6_C

G4

PEG_TXP7_C

G3

PEG_TXN7_C

C559 EV_SP@0.22u/10V_4
C560 EV_SP@0.22u/10V_4

C546 EV_SP@0.22u/10V_4
C545 EV_SP@0.22u/10V_4

C561 EV_SP@0.22u/10V_4
C562 EV_SP@0.22u/10V_4

C548 EV_SP@0.22u/10V_4
C547 EV_SP@0.22u/10V_4

C563 EV_SP@0.22u/10V_4
C564 EV_SP@0.22u/10V_4

C550 EV_SP@0.22u/10V_4
C549 EV_SP@0.22u/10V_4

C565 EV_SP@0.22u/10V_4
C566 EV_SP@0.22u/10V_4

C551 EV_SP@0.22u/10V_4
C552 EV_SP@0.22u/10V_4

AC-coupling capactior
CZ-8Lane :Gen3(220nF) CH4222K9B04
CZL-4Lane:Gen1/2(100nF) CH4103K1B08

PEG_TXP0 [11]
PEG_TXN0 [11]

PEG_TXP1 [11]
PEG_TXN1 [11]

PEG_TXP2 [11]
PEG_TXN2 [11]

PEG_TXP3 [11]
PEG_TXN3 [11]

PEG_TXP4 [11]
PEG_TXN4 [11]

PEG_TXP5 [11]
PEG_TXN5 [11]

PEG_TXP6 [11]
PEG_TXN6 [11]

PEG_TXP7 [11]
PEG_TXN7 [11]

X4 : CARRIZO-L (G EN2)

X8 : CARRIZO (GEN3 )

D D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

FP4 PCIE I/F(1/7)

FP4 PCIE I/F(1/7)

FP4 PCIE I/F(1/7)

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

PROJECT :

7

ZRZ

ZRZ

ZRZ

1A

1A

1A

241Friday, March 06, 2015

241Friday, March 06, 2015

241Friday, March 06, 2015

8

1

2

3

4

5

6

7

8

(CPU)

Channel A:CZ ONLY

AE28

M_A_A0
M_A_A1
M_A_A2

A A

M_A_BS#[2..0][9]

M_A_DM[7..0][9]

B B

C C

+1.5VSUS

R521

1K/F_4

R522 *short_4

R523

1K/F_4

D D

C606

0.1u/16V_4

PLACE CLOSE TO APU

M_A_DQS0[9]
M_A_DQS#0[9]
M_A_DQS1[9]
M_A_DQS#1[9]
M_A_DQS2[9]
M_A_DQS#2[9]
M_A_DQS3[9]
M_A_DQS#3[9]
M_A_DQS4[9]
M_A_DQS#4[9]
M_A_DQS5[9]
M_A_DQS#5[9]
M_A_DQS6[9]
M_A_DQS#6[9]
M_A_DQS7[9]
M_A_DQS#7[9]

M_A_CLK0[9]
M_A_CLK0#[9]
M_A_CLK1[9]
M_A_CLK1#[9]

M_A_RESET#[9]
M_A_EVENT#[9]

M_A_CKE0[9]
M_A_CKE1[9]

M_A_ODT0[9]
M_A_ODT1[9]

M_A_CS#0[9]
M_A_CS#1[9]

M_A_RAS#[9]
M_A_CAS#[9]
M_A_WE#[9]

M_A_VRFDQ[9] M_B_VRFDQ[1 0]

M_VREF

C607

1000P/50V_4

M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

MA_ADD[0]

Y27

MA_ADD[1]

Y29

MA_ADD[2]

Y26

MA_ADD[3]

W28

MA_ADD[4]

W29

MA_ADD[5]

W26

MA_ADD[6]

U29

MA_ADD[7]

W25

MA_ADD[8]

U26

MA_ADD[9]

AG29

MA_ADD[10]

U27

MA_ADD[11]

T28

MA_ADD[12]

AK26

MA_ADD[13]

T26

MA_ADD[14]/MA_BG[1]

T25

MA_ADD[15]/MA_ACT_L

AG26

MA_BANK[0]

AG27

MA_BANK[1]

T29

MA_BANK[2]/MA_BG[0]

E19

MA_DM[0]

D21

MA_DM[1]

K21

MA_DM[2]

F29

MA_DM[3]

AP28

MA_DM[4]

AV26

MA_DM[5]

AR22

MA_DM[6]

BC22

MA_DM[7]

K29

MA_DM[8]

H19

MA_DQS_H[0]

G19

MA_DQS_L[0]

B22

MA_DQS_H[1]

A22

MA_DQS_L[1]

F23

MA_DQS_H[2]

E23

MA_DQS_L[2]

G27

MA_DQS_H[3]

F27

MA_DQS_L[3]

AP25

MA_DQS_H[4]

AP26

MA_DQS_L[4]

AW27

MA_DQS_H[5]

AV27

MA_DQS_L[5]

AV22

MA_DQS_H[6]

AU22

MA_DQS_L[6]

BA21

MA_DQS_H[7]

AY21

MA_DQS_L[7]

L27

MA_DQS_H[8]

L26

MA_DQS_L[8]

AE25

MA_CLK_H[0]

AE26

MA_CLK_L[0]

AD26

MA_CLK_H[1]

AD27

MA_CLK_L[1]

AB28

MA_CLK_H[2]

AB29

MA_CLK_L[2]

AB25

MA_CLK_H[3]

AB26

MA_CLK_L[3]

N29

MA_RESET_L

AE29

MA_EVENT_L

P27

MA_CKE 0

P29

MA_CKE 1

AK27

MA0_ODT[0]

AL26

MA0_ODT[1]

AH25

MA1_ODT[0]

AL25

MA1_ODT[1]

AH26

MA0_CS_L[0]

AL29

MA0_CS_L[1]

AH29

MA1_CS_L[0]

AL28

MA1_CS_L[1]

AG24

MA_RAS_L/MA_RAS_L_ADD[16]

AK29

MA_CAS_L/MA_CAS_L_ADD[15]

AH28

MA_WE_L/MA_WE_L_ADD[1 4]

B19

MA_VREFDQ

T32

M_VREF

U28A

MEMORY A

FP4 REV 0.93

SP@FP4

MA_DATA[0]

MA_DATA[1]

MA_DATA[2]

MA_DATA[3]

MA_DATA[4]

MA_DATA[5]

MA_DATA[6]

MA_DATA[7]

MA_DATA[8]

MA_DATA[9]

MA_DATA[10]

MA_DATA[11]

MA_DATA[12]

MA_DATA[13]

MA_DATA[14]

MA_DATA[15]

MA_DATA[16]

MA_DATA[17]

MA_DATA[18]

MA_DATA[19]

MA_DATA[20]

MA_DATA[21]

MA_DATA[22]

MA_DATA[23]

MA_DATA[24]

MA_DATA[25]

MA_DATA[26]

MA_DATA[27]

MA_DATA[28]

MA_DATA[29]

MA_DATA[30]

MA_DATA[31]

MA_DATA[32]

MA_DATA[33]

MA_DATA[34]

MA_DATA[35]

MA_DATA[36]

MA_DATA[37]

MA_DATA[38]

MA_DATA[39]

MA_DATA[40]

MA_DATA[41]

MA_DATA[42]

MA_DATA[43]

MA_DATA[44]

MA_DATA[45]

MA_DATA[46]

MA_DATA[47]

MA_DATA[48]

MA_DATA[49]

MA_DATA[50]

MA_DATA[51]

MA_DATA[52]

MA_DATA[53]

MA_DATA[54]

MA_DATA[55]

MA_DATA[56]

MA_DATA[57]

MA_DATA[58]

MA_DATA[59]

MA_DATA[60]

MA_DATA[61]

MA_DATA[62]

MA_DATA[63]

MA_CHECK[0]

MA_CHECK[1]

MA_CHECK[2]

MA_CHECK[3]

MA_CHECK[4]

MA_CHECK[5]

MA_CHECK[6]

MA_CHECK[7]

MA_ZVDDIO_MEM_S

H17
J17
F20
H20
E17
F17
K18
E20

A21
C21
C23
D23
B20
B21
B23
A23

G22
H22
E25
G25
J20
E22
H23
J23

F26
E27
J26
J27
H25
E26
G28
G29

AN26
AP29
AR26
AP24
AN29
AN27
AR29
AR27

AU26
AV29
AU25
AW25
AU29
AU28
AW26
AT25

AV23
AW23
AV20
AW20
AR23
AT23
AR20
AT20

BB23
BB22
BB20
AY19
BA23
BC23
BC21
BB21

K26
K28
N26
N28
J29
K25
L29
N25

AD29

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

MA_ZVDDIO

R124 CZ@39.2/F_4

+1.5VSUS

M_A_DQ[0..63] [9]

U28I

AG31

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_BS#[2..0][10]

M_B_DM[7..0][10]

M_B_DQS0[10]
M_B_DQS#0[1 0]
M_B_DQS1[10]
M_B_DQS#1[1 0]
M_B_DQS2[10]
M_B_DQS#2[1 0]
M_B_DQS3[10]
M_B_DQS#3[1 0]
M_B_DQS4[10]
M_B_DQS#4[1 0]
M_B_DQS5[10]
M_B_DQS#5[1 0]
M_B_DQS6[10]
M_B_DQS#6[1 0]
M_B_DQS7[10]
M_B_DQS#7[1 0]

M_B_CLK0[10]
M_B_CLK0#[10]
M_B_CLK1[10]
M_B_CLK1#[10]

M_B_RESET#[10]
M_B_EVENT#[10]

M_B_CKE0[10]
M_B_CKE1[10]

M_B_ODT0[10]
M_B_ODT1[10]

M_B_CS#0[10]
M_B_CS#1[10]

M_B_RAS#[10]
M_B_CAS#[10]
M_B_WE#[10]

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

MB_ADD[0]

AC30

MB_ADD[1]

AC31

MB_ADD[2]

AB32

MB_ADD[3]

AA32

MB_ADD[4]

AA33

MB_ADD[5]

AA31

MB_ADD[6]

Y33

MB_ADD[7]

AA30

MB_ADD[8]

W32

MB_ADD[9]

AG32

MB_ADD[10]

Y32

MB_ADD[11]

W33

MB_ADD[12]

AL31

MB_ADD[13]

W30

MB_ADD[14]/MB_BG[1]

V32

MB_ADD[15]/MB_ACT_L

AH32

MB_BANK[0]

AG33

MB_BANK[1]

W31

MB_BANK[2]/MB_BG[0]

D25

MB_DM[0]

D29

MB_DM[1]

E33

MB_DM[2]

J33

MB_DM[3]

AR30

MB_DM[4]

AW30

MB_DM[5]

BC30

MB_DM[6]

BC26

MB_DM[7]

N33

MB_DM[8]

B26

MB_DQS_H[0]

A26

MB_DQS_L[0]

B30

MB_DQS_H[1]

A30

MB_DQS_L[1]

F32

MB_DQS_H[2]

E32

MB_DQS_L[2]

K32

MB_DQS_H[3]

J32

MB_DQS_L[3]

AR32

MB_DQS_H[4]

AR33

MB_DQS_L[4]

AW32

MB_DQS_H[5]

AW33

MB_DQS_L[5]

BA29

MB_DQS_H[6]

AY29

MB_DQS_L[6]

BA25

MB_DQS_H[7]

AY25

MB_DQS_L[7]

P32

MB_DQS_H[8]

N32

MB_DQS_L[8]

AE33

MB_CLK_H[0]

AE32

MB_CLK_L[0]

AE30

MB_CLK_H[1]

AE31

MB_CLK_L[1]

AD32

MB_CLK_H[2]

AD33

MB_CLK_L[2]

AC33

MB_CLK_H[3]

AC32

MB_CLK_L[3]

T33

MB_RESET_L

AG30

MB_EVENT_L

U32

MB_CKE 0

U33

MB_CKE 1

AL30

MB0_ODT[0]

AM32

MB0_ODT[1]

AJ32

MB1_ODT[0]

AM33

MB1_ODT[1]

AJ33

MB0_CS_L[0]

AL32

MB0_CS_L[1]

AJ30

MB1_CS_L[0]

AL33

MB1_CS_L[1]

AH33

MB_RAS_L/MB_RAS_L_ADD[16]

AK32

MB_CAS_L/MB_CAS_L_ADD[15]

AJ31

MB_WE_L/MB_WE_L_ADD[1 4]

A19

MB_VREFDQ

MEMORY B

FP4 REV 0.93

SP@FP4

MB_DATA[0]

MB_DATA[1]

MB_DATA[2]

MB_DATA[3]

MB_DATA[4]

MB_DATA[5]

MB_DATA[6]

MB_DATA[7]

MB_DATA[8]

MB_DATA[9]

MB_DATA[10]

MB_DATA[11]

MB_DATA[12]

MB_DATA[13]

MB_DATA[14]

MB_DATA[15]

MB_DATA[16]

MB_DATA[17]

MB_DATA[18]

MB_DATA[19]

MB_DATA[20]

MB_DATA[21]

MB_DATA[22]

MB_DATA[23]

MB_DATA[24]

MB_DATA[25]

MB_DATA[26]

MB_DATA[27]

MB_DATA[28]

MB_DATA[29]

MB_DATA[30]

MB_DATA[31]

MB_DATA[32]

MB_DATA[33]

MB_DATA[34]

MB_DATA[35]

MB_DATA[36]

MB_DATA[37]

MB_DATA[38]

MB_DATA[39]

MB_DATA[40]

MB_DATA[41]

MB_DATA[42]

MB_DATA[43]

MB_DATA[44]

MB_DATA[45]

MB_DATA[46]

MB_DATA[47]

MB_DATA[48]

MB_DATA[49]

MB_DATA[50]

MB_DATA[51]

MB_DATA[52]

MB_DATA[53]

MB_DATA[54]

MB_DATA[55]

MB_DATA[56]

MB_DATA[57]

MB_DATA[58]

MB_DATA[59]

MB_DATA[60]

MB_DATA[61]

MB_DATA[62]

MB_DATA[63]

MB_CHECK[0]

MB_CHECK[1]

MB_CHECK[2]

MB_CHECK[3]

MB_CHECK[4]

MB_CHECK[5]

MB_CHECK[6]

MB_CHECK[7]

MB_ZVDDIO_MEM_S

A25
C25
C27
D27
B24
B25
B27
A27

A29
C29
B32
D32
B28
B29
A31
C31

E30
E31
G33
G32
C33
D33
G30
G31

J30
J31
L33
L32
H32
H33
L30
L31

AN31
AP32
AT32
AU32
AN33
AN32
AR31
AT33

AU30
AV32
BA33
AY32
AU33
AU31
AW31
AY33

BC31
BB30
BB28
AY27
BB32
BA31
BC29
BB29

BB27
BB26
BB24
AY23
BA27
BC27
BC25
BB25

N30
N31
R33
R32
M32
M33
R30
R31

AF32

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15

M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23

M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39

M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47

M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55

M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

MB_ZVDDIO

R515 39.2/F_4

M_B_DQ[0..63] [10]M_A_A[15:0][9] M_B_A[15:0][10]

+1.5VSUS

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FP4 DDR3 I/F(2/7)

FP4 DDR3 I/F(2/7)

FP4 DDR3 I/F(2/7)

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

341Friday, March 06, 2015

341Friday, March 06, 2015

341Friday, March 06, 2015

8

1A

1

(CPU)

VDD_18

R496 300_4
R439 300_4

A A

APU_PWRGD
APU_RST#

Serial VID

VDD_18 VDD_18

R465
*1K_4

B B

R464
*220_4

VFIX MODE

R491

R459
*1K_4

R458
*220_4

R460

*2.2K_4

*1K_4

APU_SVC
APU_SVD

APU_PWRGD_SVID_ REG

R490
*220_4

VID Override table (VDD)

SVDSVC

0

0
0

Boot Voltage

1.1V

1.0V

1100.9V
11

0.8V

R471
*CZ@1K_4

R470
*CZ@220_4

2

R479
*CZ@1K_4

R478
*CZ@220_4

R472
*CZ@1K_4

GFX_SVTAPU_SVT
GFX_SVC
GFX_SVD

APU_PWRGD_SVID_ REG[34,35]

3

DP2_TX0[19]
DP2_TX0#[19]

DP2_TX1[19]
DP2_TX1#[19]

MUX_TX0[18]

MUX_TX0#[18]

MUX_TX1[18]

DP DEMUX

eDP

APU_SVT[34]

APU_SVC[34]

APU_SVD[34]

GFX_SVT[35]

GFX_SVC[35]

GFX_SVD[35]

C589
*27p/50V_4

FOR DEBUG, PLACE THESE CAPS CLOSE TO APU

MUX_TX1#[18]

MUX_TX2[18]

MUX_TX2#[18]

MUX_TX3[18]

MUX_TX3#[18]

EDP_TX0[17]
EDP_TX0#[17]

EDP_TX1[17]
EDP_TX1#[17]

*APU_SVT & GFX_SVT need 0R in power side

Note: Place resistor for SVT on VRM side (Power side)

R461 *short_4
R457 *short_4

R467 *shortCZ@0_4
R469 *shortCZ@0_4

R489 *short_4

APU_PWRGD_D

R492 HDT@0_2

APU_PWRGD
APU_RST#

C572
*27p/50V_4

4

Soldermask open ings for all bottom side vias/TPs under FP4

B6

DP2_TXP[0]

A6

DP2_TXN[0]

D7

DP2_TXP[1]

C7

DP2_TXN[1]

A7

DP2_TXP[2]

B7

DP2_TXN[2]

D9

DP2_TXP[3]

C9

DP2_TXN[3]

A2

DP1_TXP[0]

A3

DP1_TXN[0]

B4

DP1_TXP[1]

A4

DP1_TXN[1]

D5

DP1_TXP[2]

C5

DP1_TXN[2]

A5

DP1_TXP[3]

B5

DP1_TXN[3]

E2

DP0_TXP[0]

E1

DP0_TXN[0]

E3

DP0_TXP[1]

E4

DP0_TXN[1]

D1

DP0_TXP[2]

D2

DP0_TXN[2]

C1

DP0_TXP[3]

B1

DP0_TXN[3]

C15

SVT0

APU_SVC_R
APU_SVD_R

GFX_SVC_R
GFX_SVD_R

APU_SIC
APU_SID

APU_RST#
APU_PWRGD

APU_PROCHOT#
APU_ALERT#

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST# APU_VSS_SENSE
APU_DBRDY
APU_DBREQ#

D17

SVC0

D19

SVD0

B15

SVT1

B16

SVC1

A18

SVD1

CZL:3V_S0

B18

SIC

CZL:3V_S0

C17

SID

D15

RESET_L

C19

PWROK

A15

PROCHOT_L

B17

ALERT_L

H15

TDI

H14

TDO

D13

TCK

G15

TMS

J14

TRST_L

C13

DBRDY

A11

DBREQ_L

DISPLAY/SVI2/JTAG/TEST

DP2 : CZ only

CZ:1.8_S0

U28C

CZ:1.8_S0 CZL:3V_S0

(XX,PD)

(XX,PD)

CZ:1.8_S0 CZL:3V_S0

CZL:3V_S0
CZL:3V_S0

FP4 REV 0.93

SP@FP4

DP_ZVSS

DP_AUX_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

DP2_AUXP

DP2_AUXN

DP2_HPD

DP1_AUXP

DP1_AUXN

DP1_HPD

DP0_AUXP

DP0_AUXN

DP0_HPD

RSVD_1

TEMPIN0

TEMPIN1

TEMPIN2

TEMPINRETURN

TEST410

TEST411

TEST28_H

TEST28_L

DP_STEREOSYNC/TEST36

VDDCR_GF X_SE NSE

VDDCR_NB_ SENSE

VDDCR_CP U_SENS E

VDDP_SE NSE

VSS_SENS E

5

TEST10

TEST14

TEST15

TEST16

TEST17

TEST11

TEST18

TEST19

TEST31

TEST37

A9

DP_ZVSS

B9

DP_AUX_ZVSS

G5
G6

APU_DIGON

F11

APU_BLPWM

H9
G9
E9

F7
E7
F5

F8
E8
G8

K24

RSVD

E15

APU_TEMPIN0

E14

APU_TEMPIN1

E12

APU_TEMPIN2

F14

APU_TEMPRETURN

AK24

APU_TEST410

AL24

APU_TEST411

P24

APU_TEST4

TEST4

N24

APU_TEST5

TEST5

AN24

TEST6

AB8

TEST9

Y9
B10

APU_TEST14

D11

APU_TEST15

A10

APU_TEST16

C11

APU_TEST17

B11

APU_TEST11

A14

APU_TEST18

B14

APU_TEST19

A13

APU_TEST28_H

B13

APU_TEST28_L

P26

APU_TEST31

E11

DP_STEREOSYNC

A17

H11
J12
G12
AY18

H12

6

R437 2K/F_4
R436 150/F_4

APU_DISP_BLEN [17,29]

DP2_AUX [19]
DP2_AUX# [19]

DP2_HPD [1 9]

MUX_AUX [18]
MUX_AUX# [18]

MUX_HPD [18]

EDP_AUX [17]
EDP_AUX# [17]

EDP_HPD [17]

TP12
TP40
TP5
TP4

TP8
TP7
TP10
TP9

R435 *1K/F_4

TP36

R434 *1K/F_4
R446 *1K/F_4
R447 *1K/F_4
R445 1K/F_4
R444 1K/F_4

TP39
TP38

R483 *1K/F_4

TP46
TP37
TP32
TP43

R440 *short_4
R443 *shortCZ@0_4
R506 *0_4

CRB CLOSE TO APU

R482 *1K/F_4

+3V

R448 *0_4

R146 *39.2/J_4
R145 *39.2/J_4
R452 1K/F_4
R453 *1K/F_4

APU_VDDGFX_RUN_FB_ H [35]
APU_VDDNB_RUN_FB_H [34]
APU_VDD_RUN_FB_H [34]
APU_VDDP_RUN_FB_H [32]
APU_VDD_RUN_FB_L [34]
APU_VDDGFX_RUN_FB_ L [35]
APU_VDDP_RUN_FB_L [32]

33S0_18S0

CZ : 1.8V
CZL : 3.3V

APU_BLPWM

APU_DIGON

CZ : 1.8V
CZL : 3.3V

VDD_18

33S0_18S0

VDD_18

7

+3V

33S0_18S0

R426

2

10K_4

LCD 3.3V

1

3

Q37
PJA138K

R410*short_ 4

EN:>1.5V

DP2_AUX

R646 *CZ@100K_4
R647 *CZ@100K_4

DP2_AUX#

M_TEST CON NECTIO N TBD

PU ->enable HDMI video/audi o
PD->Disable HDMI audio

(APU_VDD_RUN_FB_L = APU_VDDNB_RUN_FB_L)

8

APU_DISP_PWM [ 17]

APU_DISP_ON [17]

+3V

33S0_18S0

HDT(Hardware Debug Tool ) Connector

C C

U29

APU_RST#

APU_PWRGD_D APU_PWROK_BUF

1

1A

2

GND

3

2A

HDT@SN74LVC2G07DCKR

VDD_18 VDD_18 VDD_18

R520
HDT@1K/F_4

APU_TRST#

C613

D D

HDT@0.01u/50V_4

R519 HDT@33_4

R518 HDT@10K_4
R517 HDT@10K_4
R516 HDT@10K_4

HDT_TRST# APU_PWROK_BUF

PLACE HDT+ HEADER ON TOP

CN8

1

CPU_VDDIO

3

GND

5

GND

7

GND

9

CPU_TRST_L

11

CPU_DBRDY3

13

CPU_DBRDY2

15

CPU_DBRDY1

17

GND

19

CPU_VDDIO

*HDT@HDT

CPU_TCK

CPU_TMS

CPU_TDI

CPU_TDO

CPU_PWROK_BUF

CPU_RST_L_BUF

CPU_DBRDY0

CPU_DBREQ_L

CPU_PLLTEST0

CPU_PLLTEST1

2

APU_TCK

4

APU_TMS

6

HDT_APU_TDI

8

APU_TDO

10
12

APU_RST_L_BUF

14

APU_DBRDY

16

HDT_DBREQ#

18

APU_TEST19

20

APU_TEST18

R544 HDT@0_4

R539 HDT@33_4

*HDT@0.01u/5 0V_4

C624

VCC

6

1Y

5

4

2Y

VDD_18

C614
HDT@0.1U/16V/X7R_4

APU_RST_L_BUF

R533 HDT@1K/F_4
R532 HDT@1K/F_4

APU_TDI

R543
R542 HDT@1K/F_4
R541 HDT@1K/F_4

APU_DBREQ#

R540 HDT@1K/F_4

C623
HDT@0.01u/50V_4

HDT@1K/F_4

CORE_PWM_PROCHOT#[29,30,34,35]

THERM_ALERT#[28]

3V_S0

5V_S0
(G991 Internal PU)

SMBUS (Internal Thermal sensor)

2ND_MBCLK[12,29]

3V_S5
(PU in EC side )

2ND_MBDATA[12,29]

R494
10K_4

33S0_18S0

Q40

5

43

APU_PROCHOT#

2

6

1

APU_ALERT#

VDD_18

+3V

R502 1K/F_4
R508 1K/F_4
R497 1K/F_4
R493 1K/F_4

R512 CZ@0_4
R505 CZL@0_4

APU_SIC
APU_SID
APU_ALERT#
APU_PROCHOT#

33S0_18S0

PJT138K

Q42

5

43

APU_SIC

2

6

1

APU_SID

PJT138K

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FP4 DISPLAY/MISC(3/7)

FP4 DISPLAY/MISC(3/7)

FP4 DISPLAY/MISC(3/7)

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

441Friday, March 06, 2015

441Friday, March 06, 2015

441Friday, March 06, 2015

8

1A

1

2

3

4

5

6

7

8

(CPU)

VDD_18_S5

R382
22K_4

PCIE_WAKE#
SCL1
SDA1
LR_LED_L
S0A3
DNBSWON#
USB_OC1#
USB_OC2#
USB_OC3#
AGPIO4

AGPIO8
AGPIO40

CLK_SCLK
CLK_SDATA
CLK_REQ3
PCIE_REQ_GPU#_R
AGPIO64
AGPIO66
AGPIO69

I2C_SCL_TP
I2C_SDA_TP

I2C_SCL_TS
I2C_SDA_TS

D29 RB500V-40

10ms RC-delay (PU,PU)

C526
1u/10V_4

A A

+3V_S5

+3V

B B

+3V_S5

VDD_18

CZ :12C Touch interface:2.2K(CS22202JB18)
USB interface:10k(CS31002FB26)

C C

CZL:NC

PCH_RSMRST#[29]

R392 NIOAC@10K/F_4
R81 CZL@10K_4
R79 CZL@10K_4
R78 10K/F_4
R80 10K/F_4
R77 10K/F_4
R389 10K/F_4
R396 10K/F_4
R664 10K/F_4
R93 CZL@10K/F_4

R85 CZ@10K/F_4
R86 CZ@10K/F_4

R476 2.2K_4
R466 2.2K_4
R477 CZ@10K/F_4
R473 CZ@10K/F_4
R498 CZL@10K/F_4
R504 CZL@10K/F_4
R500 CZ@10K/F_4

R386 *10K/F_4

J1

1 2

*SHORT_ PAD

R674 CZ@1K_4
R430 CZ@1K_4
R675 CZ@1K_4
R676 CZ@1K_4
R432 *10K/F_4
R105 CZ@10K/F_4
R111 CZ@10K/F_4

R449 CZ@2.2K_4
R455 CZ@2.2K_4

R425 SP@10K_4
R420 SP@10K_4

SYS_RST# internal
40K pull up

SYS_RST#

ACZ_RST#_R
ACZ_BCLK_R
ACZ_SYNC_R
ACZ_SDOUT_R
PCH_AZ_CODEC_SDIN0
AZ_SDIN1
AZ_SDIN2

PLTRST#[21,23,29]

PCIERST#[11,17,20,21]

PCIE_LAN_WAKE#[12,20,21]

APU_S5_MUX_CTRL[39]

PCIE_REQ_LAN#[20]
PCIE_CLKREQ_WL AN#[21]

PCIE_REQ_GPU#[12]

PCH_AZ_CODEC_BITCLK[22]

PCH_AZ_CODEC_SDIN0[22]

PCH_AZ_CODEC_RST#[22]

PCH_AZ_CODEC_SYNC[22 ]

PCH_AZ_CODEC_SDOUT[22]

C573 150P/50V_4

C569 150P/50V_4

DNBSWON#[29]

SUSB#[29]
SUSC#[29]

KBRST#[29]
SIO_A20GATE[29]
SIO_EXT_SCI#[29]
SIO_EXT_SMI#[2 9]

ACPRESENT[30] ACCEL_INTA [23]

R441 33_4

R431 33_4
R433 33_4
R438 33_4

I2C_SCL_TP[27]
I2C_SDA_TP[27 ]
I2C_SCL_TS[17]
I2C_SDA_TS[17 ]

RTC_CLK[6]
SUS_CLK[21]

32.768KHZ

R450 33_4
R419 33_4

R390 *short_4
C534 *EV@100P/50V_4

TP69

R474 *EV@0_4

USB_OC1#[25]
USB_OC2#[25]
USB_OC3#[25]

C56818p/50V_4

Y4

C56722P/50V_4

12

ACZ_BCLK_R

AZ_SDIN1

AZ_SDIN2
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDOUT_R

R666 *33_4

R409

20M_4

PCH_RSMRST#_R

SYS_PWRGD
SYS_RST#
PCIE_WAKE#

S0A3

APU_TEST0
APU_TEST1
APU_TEST2

LR_LED_L

CLK_REQ3
PCIE_REQ_GPU#_R

LPC_RST#_R
PCIE_RST#

32K_X1

32K_X2

BB12

AY15
BC19

BB13

BC15
BB17
BC17
BB18
BB16

BB10

AN7

AE4

AE1
BC9
AF2
AG2

AK7
AH5

AE8
AH8

AH6
AK8
AE3

AD7

AG3
AD5
AL8
AN8
AE2

AH9
AG1
AH2
AL9

AU6
AR8
AP6
AR5
AU9
AT9
AR7

BB9
BB7
BC7

AG7

AT1

AT2

3V_S5? S0?

LPC_RST_L

3V_S5

PCIE_RST_L/EGPIO26

1.8V_S5

RSMRST_L

3V_S5

PWR_BTN_L/AGPIO0

CZ:3V_S0 CZL:1.8V_S0

PWR_GOOD

SYS_RESET_L/AGPIO1

WAKE_L/AGPIO2

SLP_S3_L

SLP_S5_L

3V_S5

S0A3_GPIO/AGPIO10

CZ ONLY

S5_MUX_CTRL/EGPIO42

(,PD)

TEST0

(,PD)

TEST1/TMS

(,PD)

TEST2

ESPI_RESET_L/KBRST_L/AGPIO129

GA20IN/AGPIO126

LPC_PME_L/AGPIO22

LPC_SMI_L/AGPIO86

AC_PRES /USB_ OC4_L /IR_ RX0/AG PIO23

IR_TX0/USB_OC5_L/AGPIO13

IR_TX1/USB_OC6_L/AGPIO14

IR_RX1/AGPIO15

IR_LED_L/LLB_L/AGPIO12

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

CLK_REQ1_L/AGPIO115

CLK_REQ2_L/AGPIO116

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

CLK_REQG_L/OSCIN/EGPIO132

USB_OC 0_L/ TRST_ L/AGP IO1 6

USB_OC 1_L/ TDI/ AGPIO 17

USB_OC 2_L/ TCK/ AGPIO1 8

USB_OC 3_L/ TDO/ AGPIO2 4

AZ_BITC LK/I2 S_BC LK_M IC

AZ_SDIN0 /I2S _DATA_M IC[0 ]

AZ_SDIN1 /I2S _LR_ PLAYB ACK

AZ_SDIN2 /I2S _DATA_M IC[1 ]

AZ_RST_ L/I2 S_LR _MIC

AZ_SYNC/ I2S_ BCLK _PLAY BACK

AZ_SDOUT/ I2S_ DATA_PL AYBACK

I2C0_SCL/EGPIO145

I2C0_SDA/EGPIO146

CZ:1.8V_S0 CZL:3V

I2C1_SCL/EGPIO147

I2C1_SDA/EGPIO148

3V_S5

(PU,)

RTCCLK

X32K_X1

X32K_X2

(,PD)

SYS PWRGD

SYS_RST#[6]

PWROK_EC[29]

D9 *1N4148WS

D8 *1N4148WS

D10 1N4148WS

Test mode setting (Follow AMD's suggestion)

+3V_S5

NC,no i nstall by defa ult

R87 *2.2K_4

R83 *1K_4

R383 *2.2K_4

TEST2 TEST1 TEST0 Description

0

00

D D

0

0

0

1

1

TMS

1TMS

1

APU_TEST0

APU_TEST1

APU_TEST2

FCH TAP accessible from APU when TAPEN is asserted
FCH JTAG pins are overloaded for multiple
functions, in this configuration the FCH JTAG are
used as non-JTAG pins

1

Reserved

Reserved

X

FCH JTAG multi-function pins are configured as
JTAG pins, in this configuration the FCH TAP

0

can be accessed from FCH JTAG pins

Use on ATE only

1

Yuba JTAG enabled

R88 15K_4

R384 15K_4

2

HWPG[29]

D30 *CZ@RB500V-40

R480 CZ@47K_4

3

Q38

VDDGFX_PD

3

R488 CZ@10K/F_4

2

C578

CZ@1000P/50V_4

4

CZ@2N7002K

1

C577

*CZ@1U/10V_4

VDDGFX_EN [35]VRON[29,34]

(CZ,CZL)

U28D

ACPI/SD /AZ/GP IO/RT C/I2C /UART/MI SC

(PU,PU)

(PU,PU)
(PU,PU)

(PD,PU)

3V_S0

(PU,PU)

3V_S0

(PU,PU)

3V_S5

(PU,PU)

3V_S0

(PU,PU)

(PU,PU)

CZ ONLY

(PU,)
(PU,PU)

3V_S5

(PU,PU)
(PU,PU)

(,PU)
(PU,PU)
(PU,PU)

3V_S0

(PU,)

(PU,PU)

(PU,PU)

(PU,PU)

(PU,PU)

FP4 REV 0.93

SP@FP4

+3V_S5

(,PU)

(,PU)

CZ:3V_S5 CZL:3V_S0

1.8V_S0

1.8V_S0

1.8V_S0

(,PU)

3V_S5

(,PD)
(,PD)

S5

(,PD)

CZ:1.8V_S0 CZL:1.8V_S5

CZ:1.8V_S0 CZL:1.8V_S5

3

2

1

5

(PD,PU)

3V_S0

3V_S0
CZ:3V_S5 CZL:3V_S0

(PD,PU)
(PD,PU)

(PD,PU)

(PD,PU)
(PD,PU)
(PD,)

(PU,)
(PU,)

(PU,)
(PU,)

(PD,PU)
(PD,PU)

(PD,PU)
(PD,)

(PD,)
(PU,PU)
(PU,PU)

(PU,)
(PU,)

R206

100K_4

SD0_PWR_CTRL/AGPIO102

3.3V_S0

SCL0/I2C2_SCL/EGPIO113

SDA0/I2C2_SDA/EGPIO114

SDA1/I2C3_SDA/AGPIO20

(PU,PU)
(PD,)

3.3V_S5

(PD,PU)
(PD,PU)

(PD,PU)

(PD,PU)
(PD,PU)

3.3V_S0

AGPIO71 /SGPI O_DATAOUT

AGPIO72 /SGPI O_DATAI N

3.3V_S0

1.8V_S0

UART1_CT S_L/ BT_I 2S_ BCLK /EGP IO14 0

UART1_RX D/BT _I2S _SD I/EGP IO1 41

UART1_TX D/BT_ I2S _SDO /EGPI O14 3

UART1_I NTR/BT_ I2S _LRC LK/ AGPIO1 44

3

2

Q22

1

2N7002K

SD0_WP/EGPIO101

SD0_CD/AGPIO25

SD0_CLK/EGPIO95

SD0_CMD/EGPIO96

SD0_DATA0/EGPIO97

SD0_DATA1/EGPIO98

SD0_DATA2/EGPIO99

SD0_DATA3/EGPIO100

SD0_LED/EGPIO93

SCL1/I2C3_SCL/AGPIO19

AGPIO3

AGPIO4

AGPIO5

AGPIO6/ LDT_R ST

AGPIO7/ LDT_P WROK

AGPIO8

AGPIO9

VDDGFX_ PD/AGP IO39

AGPIO40

AGPIO64

AGPIO65

AGPIO66 /SHUTDOW N_L

AGPIO68 /SGPI O_CL K

AGPIO69 /SGPI O_LO AD

SPKR/AGPIO91

BLINK/USB_OC7_L/AGPIO11

GENINT1_L/AGPIO89

GENINT2_L/AGPIO90

FANIN0/AGPIO84

FANOUT0/AGPIO85

UART0_CT S_L/ EGPI O135

UART0_RX D/EG PIO1 36

UART0_RT S_L/ EGPI O137

UART0_TX D/EG PIO1 38

UART0_I NTR/AGP IO13 9

UART1_RT S_L/ EGPI O142

+3V

R189
CZ@4.7K_4

C339

0.22u/10V_4

Q21

2N7002K

BB2
BB5
BC2
BB4
AY5

BC3
BA3
BC5
BA5
BB6

BA15
AY17

AG5
AG4

AL5
AL6
AJ1
AJ3
AH1
AJ4
AK5
AD8
AG8
AW15
AU15

AT15
AU12
AT14
AR14
BC13

BA17

AN5

BB14
BA19

BC18
BB19

AY9
AW8
AV5
AV8
AW9

AV11
AU7
AT11
AR11
AP9

VDD_18

R188
CZL@4.7K_4

R187 *short_4

TP34
TP35

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3

SCL1
SDA1

GEVENT2#
AGPIO4
S3_resume

AGPIO8

AGPIO40
AGPIO64

AGPIO66
DGPU_PWREN_A
AGPIO69

6

DGPU_RST_L [1 1]

BOARD_ID4 [17]

CLK_SCLK [9,10,23]
CLK_SDATA [9,10,23]

R84 10K_4

PCH_ODD_EN [24]
ODD_PLUGIN# [24]

SPKR [22]

AGPIO11 [6]

TP6

PE_PWRGD [38]

APU_TP_INT# [17]
APU_I2C_INT# [27]

SYS_PWRGDSUSB#

GEVENT2# [6]

VDDGFX_PD [29]

+3V

R116
*EV@100K/F_6

CZ : mount R659
CZL: mount D2

R659 EV_SP@0_4

DGPU_PWREN[38]

BOARD ID

+3V

ZYV
BOARD_ID4 Depend on cable => always PU, PD DNI
Touch cable PIN2 => NC
non-Touch cable PIN2 => GND

R109 SP@10K_4
R104 SP@10K_4
R106 SP@10K_4
R107 IOAC@10K_4R90 15K_4
R4 10K_4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

GPIO

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FP4 GPIO/AZ/I2C/SD/UARTS(4/7)

FP4 GPIO/AZ/I2C/SD/UARTS(4/7)

FP4 GPIO/AZ/I2C/SD/UARTS(4/7)

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

dTPM

dGPU

non-G sensor

IOAC non-IOAC

Touch

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

High

D2

EV_SP@RB500V-40
C193
EV@0.1u/16V_4

DGPU_PWREN_A

R644

*EV@1M_4

R110 SP@10K_4
R103 SP@10K_4
R102 SP@10K_4
R99 NIOAC@10K_4
R5 *10K_4

Low

iTPM

UMA

G sensor

non-Touch

ZRZ

ZRZ

ZRZ

541Wednesday, March 18, 2015

541Wednesday, March 18, 2015

541Wednesday, March 18, 2015

8

1A

1A

1A

1

2

3

4

5

6

7

8

(CPU)

AU3

SATA_TXP0[24]

HDD

H:SSD
L:ODD

CLK_PCIE_VGAP[11]
CLK_PCIE_VGAN[11]

CLK_PCIE_LANP[20]
CLK_PCIE_LANN[20]

CLK_PCIE_WLANP[21]
CLK_PCIE_WLANN[21]

EMI reserve

ODD

C530 6p/50V_4

C529 6p/50V_4

A A

B B

C574 *15P/50V_4
C575 *15P/50V_4
C576 *15P/50V_4

C C

SATA_TXN0[24]

SATA_RXN0[24]
SATA_RXP0[24]

SATA_TXP1[24]
SATA_TXN1[24]

SATA_RXN1[24]
SATA_RXP1[24]

R413 1K/F_4

VDDP_0.95V

DEVSLP_HDD[24]

DEVSLP_ODD[24]

DEVSLP_ODD PU in ODD connector side

2

Y2

48MHz

4

CLK_PCI_775[29]
PCLK_TPM[23]

CLK_LPC_DEBUG[21]

LPC_LAD0[21,23,29]
LPC_LAD1[21,23,29]
LPC_LAD2[21,23,29]
LPC_LAD3[21,23,29]

LPC_LFRAME#[21,23,29]

SERIRQ[23,29]

LPC_CLKRUN#[23,29]

LPCPD#[23]

CLK_LPC_DEBUG
PCLK_TPM
CLK_PCI_775

R412 1K/F_4

R114 CZ@10K/F_4

+3V

R115 *CZ@10K/F_4

R507 10K/F_4

R404 *shortEV@0_4
R405 *shortEV@0_4

R394 *short_4
R395 *short_4

R398 *short_4
R397 *short_4

13

R388

1M_4

R462 22_4
R456 22_4
R451 22_4

R442 *short_4

R112 CZ@10K/F_4

R117 CZ@10K/F_4

SATA_ZVSS
SATA_ZVDD
DEVSLP_HDD
DEVSLP_ODD

CLK_PCIE_VGAP_C
CLK_PCIE_VGAN_C

CLK_PCIE_LANP_R
CLK_PCIE_LANN_R

CLK_PCIE_WLANP_C
CLK_PCIE_WLANN_C

TP3

48M_X1

48M_X2

LPCCLK0
LPCCLK1

TP33

LPC_CLKRUN#_R

SPI_CLK
SPI_CS#

SPI_SO
SPI_SI
SPI_WP
SPI_HOLD#

SATA_TX0P

AU4

SATA_TX0N

AV1

SATA_RX0N

AV2

SATA_RX0P

AY2

SATA_TX1P

AY1

SATA_TX1N

AW4

SATA_RX1N

AW3

SATA_RX1P

AW1

SATA_ZVSS

AW2

SATA_ZVDDP

AT17

DEVSLP[0]/EGPIO67

AT12

DEVSLP[1]/EGPIO70

BB15

SATA_ACT_L/AGPIO130

AU2

SATA_X1

AU1

SATA_X2

U4

GFX_CLKP

U3

GFX_CLKN

U1

GPP_CLK0P

U2

GPP_CLK0N

W4

GPP_CLK1P

W3

GPP_CLK1N

W1

GPP_CLK2P

W2

GPP_CLK2N

Y2

GPP_CLK3P

Y1

GPP_CLK3N

BC10

X25M_48M_OSC

T2

X48M_X1

T1

X48M_X2

AW14

LPCCLK0/EGPIO74

AY13

LPCCLK1/EGPIO75

BB11

LAD0

BA11

LAD1

AY11

LAD2

BA13

LAD3

AV14

LFRAME_L

BA1

ESPI_ALERT_L/LDRQ0_L

BC14

SERIRQ/AGPIO87

BC11

LPC_CLKRUN_L/AGPIO88

AE9

LPC_PD_L/AGPIO21

BC6

SPI_CLK/ESPI_CLK/EGPIO117

BB8

SPI_CS1_L/EGPIO118

AW7

SPI_CS2_L/ESPI_CS_L/EGPIO119

BA9

SPI_DI/ESPI_DATA/EGPIO120

AY7

SPI_DO/EGPIO121

AW11

SPI_WP_L/EGPIO122

BA7

SPI_HOLD_L/EGPIO133

AW12

SPI_TPM_CS_L/AGPIO76

1.8V_S0

1.8V_S0

CZ:3V_S0 CZL:3V_S5

CZ:3V_S0 CZL:3V_S5
CZ:3V_S0 CZL:3V_S5

CZ:3V_S0 CZL:3V_S5

U28E

CLK/SATA/USB/SPI/LPC

3V_S0
3V_S0
3V_S0

(PD,)

(PD,)
(PD,)
(PD,)

(PD,)

(PD,)

3V_S0

(PU,PU)

3V_S0

(,PU)

3V_S5

(PD,)

CZ:1.8V_S0 CZL:1.8V_S5

(PD,)
(PD,)
(PD,)

CZ:3V_S0 CZL:3V_S5

FP4 REV 0.93

SP@FP4

(PD,)

USBCLK /25 M_48 M_OSC

USB_ZVS S

USB_HSD 0P

USB_HSD 0N

USB_HSD 1P

USB_HSD 1N

USB_HSD 2P

USB_HSD 2N

USB_HSD 3P

USB_HSD 3N

USB_HSD 4P

USB_HSD 4N

USB_HSD 5P

USB_HSD 5N

USB_HSD 6P

USB_HSD 6N

USB_HSD 7P

USB_HSD 7N

USB_SS _ZVS S

USB_SS _ZVDD P

USB_SS _0TX P

USB_SS _0TX N

USB_SS _0RX P

USB_SS _0RX N

USB_SS _1TX P

USB_SS _1TX N

USB_SS _1RX P

USB_SS _1RX N

USB_SS _2TX P

USB_SS _2TX N

USB_SS _2RX P

USB_SS _2RX N

USB_SS _3TX P

USB_SS _3TX N

USB_SS _3RX P

USB_SS _3RX N

(PD,)

AP8

AP5

AR2
AR1

AR3
AR4

AN2
AN1

AN3
AN4

AM1
AM2

AL2
AL1

AL3
AL4

AK2
AJ2

AD2
AD1

AA3
AA4

W9
W8

AA2
AA1

W5
W6

AC1
AC2

Y6
Y7

AC4
AC3

AB5
AB6

USB_ZVSS

TP2

R414 11.8K/F_4

USBSS_CALP
USBSS_CALN

Port0 & Port1 : CZ ONLY

USBP0+ [25]
USBP0- [25]

USBP1+ [27]
USBP1- [27]

USBP2+ [17]
USBP2- [17]

USBP3+ [25]
USBP3- [25]

USBP4+ [21]
USBP4- [21]

USBP5+ [17]
USBP5- [17]

USBP6+ [25]
USBP6- [25]

USBP7+ [25]
USBP7- [25]

R408 1K/F_4
R407 1K/F_4

USB30_TX2+ [25]
USB30_TX2- [25]

USB30_RX2+ [25]
USB30_RX2- [25]

USB30_TX3+ [25]
USB30_TX3- [25]

USB30_RX3+ [25]
USB30_RX3- [25]

DB

Touch Pad

Touch Panel

Card reader

WLAN/BT

CCD

USB3 (Charger)

USB3

VDDP_0.95V_S5

VDD_18
+3V_S5

route SPI bus as daisy chain
SPI IMPEDANCE 50-55R, <4''

SPI_CS[29]
SPI_SCK[29]
SPI_SDI[29]
SPI_SDO[29]

SPI_CS# SPI_CS_A
SPI_CLK

C570 *22P/50V_4

SPI_SI
SPI_SO SPI_SDO_A

33S5_18S0

SPI_WP

R486 CZL@0_4
R422 CZL@0_4
R423 CZL@0_4
R487 CZL@0_4

R484 33_4
R418 33_4

SPI EMI

R424 33_4
R485 33_4
R454 10K/F_4

R463 *short_4

SPI_SCK_A

SPI_SDI_A

SPI_WP_R

SP@ socket P/N: DFHS08FS023 only for A-TEST

SPI ROM

CARRIZO-L

3.3V

CARRIZO

1.8V

Vender Size Quanta P/N

EON

WND

EON

R416 CZ@0_4
R411 CZL@0_4

33S5_18S0

R415

10K/F_4

U27

1

CE#

6

SCK

5

SI

2

SO

3

WP#

SP@W25Q64FW SSIG

AKE3EFP0N07

8M

AKE2EZN0Q00

8M

AKE3EZN0Q01

8M

AKE5EZN0N00

8M

AKE5EG-0Q00 GD25LQ64CSIGRGGD

8M
8M

VDD

HOLD#

VSS

33S5_18S0

33S5_18S0

8

R417

10K/F_4

7

4

Vender P/N

W25Q64FVSSIQWND

GD25B64CSIGRGGD

EN25QH64-104HIP

W25Q64FWSSIG

C571

0.1u/16V_4

SPI_HOLD#

STRAPS PINS

+3V_S5

+3V_S5+3V_S5+3V+3V+3V +3V_S5+3V_S5 +3V_S5 +3V_S5

R92

R95
*CZL@10K_4

LPCCLK0

LPCCLK1

LPC_LFRAME#

RTC_CLK[5]

GEVENT2#[5]

SYS_RST#[5]

AGPIO11[5]

D D

1

R108
*CZ@10K_4

R97
2k_4

2

R96
CZL@10K_4

R101
CZ@10K_4

R100
*2k_4

R531
CZL@10K_4

R475
CZ@10K_4

R468
*2k_4

3

R82
10K_4

R76
*2k_4

*CZ@10K_4

R91
2k_4

R387
10K_4

R385
*2k_4

4

R94
10K_4

R98
*2k_4

LPC_CLK0 LFRAME#

BOOT Fail Timer

PU

ENABLE

LPC_CLK1

Internal CLKGEN

DEFAULT

PD

BOOT Fail Timer

DISABLE

External CLKGEN

DEFAULT

5

SPI ROM

DEFAULT

LPC ROM

RTC_CLK

Coin battery
is on board.

DEFAULT

Coin battery
is not on board.

6

GEVENT2# (AGPIO3)

CZ-L

1.8V SPI ROM

3.3V SPI ROM

DEFAULT

Int pull-up

Int pull-upInt pull-up

SYS_RST#

CZ

Enhanced Reset logic
(faster resume from S5)

normal reset mode

DEFAULT DEFAULT

Default to
Traditional Reset logic

short reset mode

DEFAULT

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FP4 SATA/USB/LPC/SPI(5/7)

FP4 SATA/USB/LPC/SPI(5/7)

FP4 SATA/USB/LPC/SPI(5/7)

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

PROJECT :

Int pull-up

AGPIO11(BLINK)

LDT_RST#/LDT_PWRGD
output to APU

LDT_RST#/LDT_PWRGD
output to Pads

ZRZ

ZRZ

ZRZ

641Friday, March 06, 2015

641Friday, March 06, 2015

641Friday, March 06, 2015

8

1A

1A

1A

1

(CPU)

C215
22u/6.3V_6

A A

VDD_18

B B

C207
10u/6.3V_6

C C

+1.5VSUS

D D

C219

0.22u/10V_4

VDDP_0.95V

C583
10u/6.3V_6

R499 *short_4

+1.5V +3V

C195

0.22u/10V_4

C160

C162

0.22u/10V_4

10u/6.3V_6

DECOUPLING BETWEEN PROCESSOR AND DIMMs
ACROSS VDDIO AND VSS SPLI T

C236

0.22u/10V_4

C235

0.22u/10V_4

VDDCR_NB

C148

0.22u/10V_4

2

C209

C210

22u/6.3V_6

22u/6.3V_6

C237

C216

0.22u/10V_4

0.22u/10V_4

C587

C588

10u/6.3V_6

10u/6.3V_6

+VDDIO_AZ

C596

C595

1u/10V_4

1u/10V_4

C191

C192

0.22u/10V_4

10u/6.3V_6

C220

0.22u/10V_4

4x0.22UF (0402)+2x180PF(0402)

C141

0.22u/10V_4

C149

0.22u/10V_4

C217
1u/10V_4

VDDP_0.95V_S5+3V_S5VDD_18_S5

C234

0.22u/10V_4

C211
22u/6.3V_6

C233

0.22u/10V_4

C590
10u/6.3V_6

C167
10u/6.3V_6

C185
180P/50V_4

C152

0.22u/10V_4

C212
22u/6.3V_6

C227

0.22u/10V_4

C226

0.22u/10V_4

R147 *short_4

C168

0.22u/10V_4

C114

0.22u/10V_4

C194

0.22u/10V_4

C306
180P/50V_4

C151

0.22u/10V_4

3

C213
22u/6.3V_6

C225

0.22u/10V_4

C586

0.22u/10V_4

VDDP_0.95V

R69 SP@0_8

C274

10u/6.3V_6

VDDCR_FCH_ALWVDDCR_FCH_S5

R113 *CZ@0_4

C147

0.22u/10V_4

C199

0.22u/10V_4

C221
180P/50V_4

C224

C232

22u/6.3V_6

22u/6.3V_6

C280

C275

180P/50V_4

180P/50V_4

C579

C214

0.22u/10V_4

0.22u/10V_4

CZL UMA tied to VSS.
CZ UMA&DIS and CZL DIS tied to VDDP

C181

CZ@22u/6.3V_6

C106
22U/6.3V_6

C206

0.22u/10V_4

R70
SP@0_4

C175

CZ@22u/6.3V_6

C115
22U/6.3V_6

C208

0.22u/10V_4

200mA

C304

C218

180P/50V_4

180P/50V_4

C581

C580

0.22u/10V_4

0.22u/10V_4

VDDP_GFX

C133

SP@10u/6.3V_6

VDD33

C180
CZ@0.22u/10V_4

Place under APU

C150
22U/6.3V_6

C222

0.22u/10V_4

4

C337
180P/50V_4

C582
180P/50V_4

1.5A

C153

SP@0.22u/10V_4

1.5A

500mA

200mA

800mA

VDDP_0.95V

VDDCR_NB

C109
22U/6.3V_6

C228

0.22u/10V_4

+1.5VSUS

+VDDIO_AZ

200mA

7A

C184

0.22u/10V_4

+1.5V_RTC_R

20MIL

P25

VDDIO_ME M_S3 _1

P28

VDDIO_ME M_S3 _2

T24

VDDIO_ME M_S3 _3

T27

VDDIO_ME M_S3 _4

U25

VDDIO_ME M_S3 _5

U28

VDDIO_ME M_S3 _6

V30

VDDIO_ME M_S3 _7

V33

VDDIO_ME M_S3 _8

W24

VDDIO_ME M_S3 _9

W27

VDDIO_ME M_S3 _10

Y25

VDDIO_ME M_S3 _11

Y28

VDDIO_ME M_S3 _12

Y30

VDDIO_ME M_S3 _13

AB24

VDDIO_ME M_S3 _14

AB27

VDDIO_ME M_S3 _15

AB30

VDDIO_ME M_S3 _16

AB33

VDDIO_ME M_S3 _17

AD25

VDDIO_ME M_S3 _18

AD28

VDDIO_ME M_S3 _19

AD30

VDDIO_ME M_S3 _20

AE24

VDDIO_ME M_S3 _21

AE27

VDDIO_ME M_S3 _22

AF30

VDDIO_ME M_S3 _23

AF33

VDDIO_ME M_S3 _24

AG25

VDDIO_ME M_S3 _25

AG28

VDDIO_ME M_S3 _26

AH24

VDDIO_ME M_S3 _27

AH27

VDDIO_ME M_S3 _28

AH30

VDDIO_ME M_S3 _29

AK25

VDDIO_ME M_S3 _30

AK28

VDDIO_ME M_S3 _31

AK30

VDDIO_ME M_S3 _32

AK33

VDDIO_ME M_S3 _33

AL27

VDDIO_ME M_S3 _34

AM30

VDDIO_ME M_S3 _35

AR19

VDDIO_AUDI O

AE6

VDDP_GF X_2

AE5

VDDP_GF X_1

AP19

VDD_33 _1

AP21

VDD_33 _2

AP16

VDD_18 _1

AP18

VDD_18 _2

AP10

VDD_18 _S5_ 1

AR9

VDD_18 _S5_ 2

AP15

VDD_33 _S5_ 1

AR15

VDD_33 _S5_ 2

AN12

VDDP_S5 _1

AP12

VDDP_S5 _2

AP13

VDDCR_F CH_S5_ 1

AR12

VDDCR_F CH_S5_ 2

AW19

VDDP_6

AU17

VDDP_1

AU19

VDDP_2

AV17

VDDP_3

AV19

VDDP_4

AW17

VDDP_5

AL12

VDDCR_NB_ 1

AL13

VDDCR_NB_ 2

AL15

VDDCR_NB_ 3

AL18

VDDCR_NB_ 4

AL21

VDDCR_NB_ 5

AN13

VDDCR_NB_ 6

AN16

VDDCR_NB_ 7

AN19

VDDCR_NB_ 8

AN22

VDDCR_NB_ 9

AR17

VDDBT_RTC _G

R554 1K/F_4

C636
1u/10V_4

RTC (RTC)

5

12

G1

*SHORT_ PAD

U28F

POWER

FP4 REV 0.93

SP@FP4

+1.5V_RTC

VDDCR_CP U_1

VDDCR_CP U_2

VDDCR_CP U_3

VDDCR_CP U_4

VDDCR_CP U_5

VDDCR_CP U_6

VDDCR_CP U_7

VDDCR_CP U_8

VDDCR_CP U_9

VDDCR_CP U_10

VDDCR_CP U_11

VDDCR_CP U_12

VDDCR_CP U_13

VDDCR_CP U_14

VDDCR_CP U_15

VDDCR_CP U_16

VDDCR_CP U_17

VDDCR_CP U_18

VDDCR_CP U_19

VDDCR_CP U_20

VDDCR_CP U_21

VDDCR_CP U_22

VDDCR_CP U_23

VDDCR_CP U_24

VDDCR_CP U_25

VDDCR_CP U_26

VDDCR_CP U_42

VDDCR_CP U_31

VDDCR_CP U_43

VDDCR_CP U_32

VDDCR_CP U_44

VDDCR_CP U_33

VDDCR_CP U_45

VDDCR_CP U_34

VDDCR_CP U_46

VDDCR_CP U_35

VDDCR_CP U_47

VDDCR_CP U_36

VDDCR_CP U_28

VDDCR_CP U_29

VDDCR_CP U_40

VDDCR_CP U_30

VDDCR_CP U_37

VDDCR_CP U_49

VDDCR_CP U_38

VDDCR_CP U_39

VDDCR_CP U_48

VDDCR_CP U_41

VDDCR_CP U_27

VDDCR_GF X_14

VDDCR_GF X_15

VDDCR_GF X_16

VDDCR_GF X_17

VDDCR_GF X_18

VDDCR_GF X_19

VDDCR_GF X_20

VDDCR_GF X_21

VDDCR_GF X_22

VDDCR_GF X_23

VDDCR_GF X_24

VDDCR_GF X_25

VDDCR_GF X_26

VDDCR_GF X_27

VDDCR_GF X_28

VDDCR_GF X_29

VDDCR_GF X_1

VDDCR_GF X_2

VDDCR_GF X_3

VDDCR_GF X_4

VDDCR_GF X_5

VDDCR_GF X_6

VDDCR_GF X_7

VDDCR_GF X_8

VDDCR_GF X_9

VDDCR_GF X_10

VDDCR_GF X_11

VDDCR_GF X_12

VDDCR_GF X_30

VDDCR_GF X_31

VDDCR_GF X_32

VDDCR_GF X_33

VDDCR_GF X_34

VDDCR_GF X_35

VDDCR_GF X_36

VDDCR_GF X_37

VDDCR_GF X_13

Q47
AP2138N-1.5TRG1

1

2

6

VDDCR_CPU

U8
W7
W12
W15
W18
W21
Y8
Y10
Y13
Y16
Y19
Y22
AB7
AB9
AB12
AB15
AB18
AB21
AD6
AD10
AD13
AD16
AD19
AD22
AE7
AE12
AK9
AG10
AK10
AG13
AK13
AG16
AK16
AG19
AK19
AG22
AK22
AH7
AE18
AE21
AH21
AG6
AH12
AN6
AH15
AH18
AL7
AK6
AE15

L8
L13
L16
L19
L22
N7
N12
N15
N18
N21
P8
P13
P16
P19
P22
T7
F12
F15
G11
G14
J8
J9
J11
K7
K12
K13
K15
K16
T12
T15
T18
T21
U13
U16
U19
U22
K19

VDDCR_GFX

C201
22U/6.3V_6

C188
22U/6.3V_6

C169

0.22u/10V_4

C163

0.22u/10V_4

C205
CZ@22U/6.3V_6

C190
CZ@22U/6.3V_6

C155
CZ@0.22u/10V_4

C173
CZ@0.22u/10V_4

+3VRTC

3

20MIL20MIL

RTC CR2032 Coin Battery
DBV: AHL03003057
VDE: AHL03003003

C639
1u/10V_4

D39
BAT54CW

C202
22U/6.3V_6

C177
22U/6.3V_6

C171

0.22u/10V_4

C164

0.22u/10V_4

Place under APU

+3VPCU_R

+VCCRTC_2

C203
22U/6.3V_6

C178
22U/6.3V_6

C170

0.22u/10V_4

C161

0.22u/10V_4

C182
CZ@22U/6.3V_6

C196
CZ@22U/6.3V_6

C156
CZ@0.22u/10V_4

C174
CZ@0.22u/10V_4

R562 *short_4

20MIL

R563
1K/F_4

+BAT

20MIL

12

CN11
RTC_2032

7

C186
22U/6.3V_6

C179
22U/6.3V_6

C166

0.22u/10V_4

C183
180P/50V_4

C176
CZ@22U/6.3V_6

C204

CZ@22U/6.3V_6

C157
CZ@0.22u/10V_4

C172
CZ@0.22u/10V_4

+3VPCU

C187
22U/6.3V_6

C165

0.22u/10V_4

C154
CZ@22U/6.3V_6

C200
CZ@22U/6.3V_6

C158
CZ@0.22u/10V_4

C197
CZ@0.22u/10V_4

C189
CZ@22U/6.3V_6

C159
CZ@0.22u/10V_4

C198
CZ@180P/50V_4

8

ACROSS VDDNB AND VSS SPLIT

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FP4 POWER(6/7)

FP4 POWER(6/7)

FP4 POWER(6/7)

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

741Wednesday, March 18, 2015

741Wednesday, March 18, 2015

741Wednesday, March 18, 2015

8

1A

(CPU)

1

2

3

4

5

6

7

8

U28G

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

GND

FP4 REV 0.93

SP@FP4

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

L28
M4
M30
N10
N13
N16
N19
N22
N27
P1
P2
P4
P5
P12
P15
P18
P21
P30
P33
T4
T10
T13
T16
T19
T22
T30
U5
U12
U15
U18
U21
U24
V1
V2
V4
W10
W13
W16
W19
W22
Y4
Y5
Y12
Y15
Y18
Y21
Y24
AB1
AB2
AB4
AB10
AB13
AB16
AB19
AB22
AD4
AD9
AD12
AD15
AD18
AD21
AD24

AE10
AE13
AE16
AE19
AE22

AF1
AF4

AG9
AG12
AG15
AG18
AG21

AH4
AH10
AH13
AH16
AH19
AH22

AK1

AK4
AK12
AK15
AK18

AL16
AL19
AL22

AM4

AN9
AN10
AN15
AN18
AN21
AN25
AN28

AP1

AP2

AP4

AP7
AP22
AP27
AP30
AP33

AR6
AR25
AR28

AT4
AT19
AT22
AT30

AU5

AU8
AU11
AU14
AU20
AU23
AU27

AV4

AV7

AV9

AV12
AV15
AV25

A A

B B

C C

A12
A16
A20
A24
A28
A32

B12
B33

D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D30

F19
F22
F25
F30
F33

G17
G20
G23
G26

H30

J15
J19
J22
J25
J28

K10
K22
K27
K30
K33

L12
L15
L18
L21
L25

A8

B2
B8

C3
D4
D6
D8

F1
F2
F4
F9

G7

H4

J5

K1
K2
K4

L5

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

U28H

GND

FP4 REV 0.93

SP@FP4

VSS_187

VSS_188

VSS_189

VSS_190

VSS_191

VSS_192

VSS_193

VSS_194

VSS_195

VSS_196

VSS_197

VSS_198

VSS_199

VSS_200

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_207

VSS_208

VSS_209

VSS_210

VSS_211

VSS_212

VSS_213

VSS_215

VSS_214

AV30
AV33
AW22
AY4
AY6
AY8
AY10
AY12
AY14
AY16
AY20
AY22
AY24
AY26
AY28
AY30
BB1
BB33
BC4
BC8
BC12
BC16
BC20
BC24
BC28
BC32

L24
AL10
AK21

U30
U31

AN30

RSVD_2

RSVD_3

RSVD_4

U28J

FP4 REV 0.93

SP@FP4

D D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

FP4 GND(7/7)

FP4 GND(7/7)

FP4 GND(7/7)

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

PROJECT :

7

ZRZ

ZRZ

ZRZ

1A

1A

1A

841Friday, March 06, 2015

841Friday, March 06, 2015

841Friday, March 06, 2015

8

5

4

3

2

1

SODIMM (SDM)

M_A_A[15:0][3]

D D

M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLK0[3]
M_A_CLK0#[3]
M_A_CLK1[3]
M_A_CLK1#[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]
M_A_WE#[3]

CLK_SCLK[5,10,23]

C C

B B

+1.5VSUS

CLK_SDATA[5,10,23]

M_A_ODT0[3]
M_A_ODT1[3]

M_A_DM[7..0][3]

M_A_DQS[7:0][3]

M_A_DQS#[7:0][3]

Place these Caps near So-Dimm1.

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

PC2100 DDR3 SDRAM SO-DIMM

12
29
47

64
137
154
171
188

10

27

45

62
135
152
169
186

CZ@DDR3-DIMM1_H=4_REV

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

(204P)

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ4
M_A_DQ5
M_A_DQ6

M_A_DQ3

M_A_DQ1
M_A_DQ0
M_A_DQ7
M_A_DQ2

M_A_DQ8
M_A_DQ9

M_A_DQ11
M_A_DQ10

M_A_DQ12
M_A_DQ13

M_A_DQ15
M_A_DQ14

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQ[63:0] [3]

+3V

+1.5VSUS

M_A_EVENT#[3]

M_A_RESET#[3]

R197
CZ@1K_4

C322

CZ@1U/10V_4

C321 CZ@1000p/50V_4

C320 CZ@0.1u/16V_4

C348 CZ@0.1u/16V_4

C347 CZ@1000p/50V_4

2.48A

+VREF_DQ0
+VREF_CA0

+SMDDR_VREF

+1.5VSUS

R210 *CZ@0_6

3mA

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

CZ@DDR3-DIMM1_H=4_REV

+1.5VSUS

+1.5VSUS

(204P)

PC2100 DDR3 SDRAM SO-DIMM

R209
CZ@1K/F_4

R199
CZ@1K/F_4

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

+SMDDR_VTT

203
204

205
206

+VREF_CA0

C349
CZ@0.1u/16V_4

0.25A

C313
CZ@0.1u/16V_4 R176

+1.5VSUS

A A

C341
CZ@0.1u/16V_4

C314
CZ@0.1u/16V_4

C342
CZ@0.1u/16V_4

5

C317
CZ@0.1u/16V_4

C343
CZ@0.1u/16V_4

C318
CZ@0.1u/16V_4

C344
CZ@0.1u/16V_4

C315
CZ@0.1u/16V_4

C345
CZ@0.1u/16V_4

C316
CZ@0.1u/16V_4

C346
CZ@0.1u/16V_4

4

C332
CZ@180P/50V_4

+SMDDR_VTT

C335

CZ@4.7U/6.3V_6

C333
CZ@0.1u/16V_4

3

CZ@1K/F_4

M_A_VRFDQ[3]

2

R175 *CZ@0_6

3mA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR3 DIMM 1

DDR3 DIMM 1

DDR3 DIMM 1

Date: Sheet of

Date: Sheet of

Date: Sheet of

R177

CZ@1K/F_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+VREF_DQ0

C319
CZ@0.1u/16V_4

ZRZ

ZRZ

ZRZ

1

1A

1A

1A

941Wednesday, March 18, 2015

941Wednesday, March 18, 2015

941Wednesday, March 18, 2015

5

4

3

2

1

SODIMM (SDM)

M_B_A[15:0][3]

D D

M_B_BS#0[3]
M_B_BS#1[3]
M_B_BS#2[3]
M_B_CS#0[3]
M_B_CS#1[3]
M_B_CLK0[3]
M_B_CLK0#[3]
M_B_CLK1[3]
M_B_CLK1#[3]
M_B_CKE0[3]
M_B_CKE1[3]
M_B_CAS#[3]
M_B_RAS#[3]

R211 4.7K_4

+3V

C C

B B

M_B_WE#[3]

CLK_SCLK[5,9,23]

CLK_SDATA[5,9,23]

M_B_ODT0[3]
M_B_ODT1[3]
M_B_DM[7..0][3]

M_B_DQS[7:0][3]

M_B_DQS#[7:0][3]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM2_H=4_STD

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

(204P)

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ5
M_B_DQ0
M_B_DQ6
M_B_DQ7

M_B_DQ4

M_B_DQ1
M_B_DQ2
M_B_DQ3

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23

M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQ[63:0] [3]

+3V

+1.5VSUS

M_B_EVENT#[3]

M_B_RESET#[3]

R225
1K_4

C362

1U/10V_4

C363 1000p/50V_4

C364 0.1u/16V_4

C383 0.1u/16V_4

C394 1000p/50V_4

+VREF_DQ1
+VREF_CA1

2.48A

+1.5VSUS

+SMDDR_VREF

R235 *0_6

3mA

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM2_H=4_STD

+1.5VSUS

PC2100 DDR3 SDRAM SO-DIMM

R234
1K/F_4

R230
1K/F_4

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+VREF_CA1

C397

0.1u/16V_4

+SMDDR_VTT

0.25A

+1.5VSUS

C356

0.1u/16V_4

+1.5VSUS

A A

C386

0.1u/16V_4

Place these Caps near So-Dimm2.

C357

0.1u/16V_4

C387

0.1u/16V_4

C358

0.1u/16V_4

C390

0.1u/16V_4

5

C359

0.1u/16V_4

C391

0.1u/16V_4

C360

0.1u/16V_4

C392

0.1u/16V_4

C361

0.1u/16V_4

C393

0.1u/16V_4

C398
180P/50V_4

C367

*22u/6.3V_6

4

C374
*22u/6.3V_6

C384

*22u/6.3V_6

+SMDDR_VTT

C389

4.7U/6.3V_6

C388

0.1u/16V_4

+1.5VSUS

R208
1K/F_4

M_B_VRFDQ[3]

3

2

R204 *0_6

3mA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR3 DIMM 2

DDR3 DIMM 2

DDR3 DIMM 2

Date: Sheet of

Date: Sheet of

Date: Sheet of

R212

1K/F_4

+VREF_DQ1

C353

0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZRZ

ZRZ

ZRZ

10 41Wednesday, March 18, 2015

10 41Wednesday, March 18, 2015

10 41Wednesday, March 18, 2015

1

1A

1A

1A

5

4

3

2

1

(VGA)

D D

C C

B B

A A

X8 : CARRIZO ( GEN3)

PEG_TXP0[2]

X4 : CARRIZO-L (GEN2)

PEG_TXN0[2]

PEG_TXP1[2]
PEG_TXN1[2]

PEG_TXP2[2]
PEG_TXN2[2]

PEG_TXP3[2]
PEG_TXN3[2]

PEG_TXP4[2]
PEG_TXN4[2]

PEG_TXP5[2]
PEG_TXN5[2]

PEG_TXP6[2]
PEG_TXN6[2]

PEG_TXP7[2]
PEG_TXN7[2]

CLK_PCIE_VGAP[6]
CLK_PCIE_VGAN[6]

R39 EV@1K_4

5

TEST_PG

PERST#_BUF

U24A

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

NC#V30

U31

NC#U31

U29

NC#U29

T28

NC#T28

T30

NC#T30

R31

NC#R31

R29

NC#R29

P28

NC#P28

P30

NC#P30

N31

NC#N31

N29

NC#N29

M28

NC#M28

M30

NC#M30

L31

NC#L31

L29

NC#L29

K30

NC#K30

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

N10

TEST_PG

AL27

PERSTB

EV_SP@Meso/Exo_S3

CLOCK

NC#W24
NC#W23

NC#V27

NC#U26

NC#U24
NC#U23

NC#T26
NC#T27

NC#T24
NC#T23

NC#P27
NC#P26

NC#P24
NC#P23

NC#M27

NC#N26

AH30
AG31

AG29
AF28

AF27
AF26

AD27
AD26

AC25
AB25

Y23
Y24

AB27
AB26

Y27
Y26

W24
W23

V27
U26

U24
U23

T26
T27

T24
T23

P27
P26

P24
P23

M27
N26

Y22

AA22

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCI EXPRESS INTERFACE

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RX

4

PEG_RXP0_C
PEG_RXN0_C

PEG_RXP1_C
PEG_RXN1_C

PEG_RXP2_C
PEG_RXN2_C

PEG_RXP3_C
PEG_RXN3_C

PEG_RXP4_C
PEG_RXN4_C

PEG_RXP5_C
PEG_RXN5_C

PEG_RXP6_C
PEG_RXN6_C

PEG_RXP7_C
PEG_RXN7_C

PCIE_CALR_TX

PCIE_CALR_RX

C556 EV_SP@0.22u/ 10V_4
C553 EV_SP@0.22u/ 10V_4

C535 EV_SP@0.22u/ 10V_4
C533 EV_SP@0.22u/ 10V_4

C542 EV_SP@0.22u/ 10V_4
C537 EV_SP@0.22u/ 10V_4

C525 EV_SP@0.22u/ 10V_4
C527 EV_SP@0.22u/ 10V_4

C531 EV_SP@0.22u/ 10V_4
C528 EV_SP@0.22u/ 10V_4

C524 EV_SP@0.22u/ 10V_4
C522 EV_SP@0.22u/ 10V_4

C521 EV_SP@0.22u/ 10V_4
C520 EV_SP@0.22u/ 10V_4

C519 EV_SP@0.22u/ 10V_4
C518 EV_SP@0.22u/ 10V_4

AC-coupling capactior
CZ-8Lane :Gen3(220nF) CH4222K9B04
CZL-4Lane:Gen1/2(100nF) CH4103K1B08

GPU RESET

DGPU_RST_L[5]

PCIERST#[5,17,20,21]

R47 EV@1.69K/F_4

R53 EV@1K/F_4

PEG_RXP0 [ 2]
PEG_RXN0 [2]

PEG_RXP1 [ 2]
PEG_RXN1 [2]

PEG_RXP2 [ 2]
PEG_RXN2 [2]

PEG_RXP3 [ 2]
PEG_RXN3 [2]

PEG_RXP4 [ 2]
PEG_RXN4 [2]

PEG_RXP5 [ 2]
PEG_RXN5 [2]

PEG_RXP6 [ 2]
PEG_RXN6 [2]

PEG_RXP7 [ 2]
PEG_RXN7 [2]

+3V_GFX

EV@0.1u/16V_4
C103

U5

2

1

3

4

EV@TC7SH08FU

3 5

+PCIE_VDDC_GFX

PERST#_BUF

R89

*EV@100K_4

X4 : CARRIZO-L (GEN2)

X8 : CARRIZO ( GEN3)

PERST#_BUF [12]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Meso/Exo_S3_PCIE(1/6)

Meso/Exo_S3_PCIE(1/6)

Meso/Exo_S3_PCIE(1/6)

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

1A

11 41Friday, March 06, 2015

11 41Friday, March 06, 2015

11 41Friday, March 06, 2015

1

5

4

3

2

1

(VGA)

The SMBus slave ID is default 0x41

Meso SCL/SDA PU : 47k ohm (CS34702JB21)
Exo SCL/SDA PU: 45.3kohm (CS34532FB18)

R55 *shortEV@0_4

PERST#_BUF[11 ]

2ND_MBDATA[4,2 9]

D D

2ND_MBCLK[4,29]

+3V_GFX

R51 EV@10K_4

R50 *EV@10K_4

R353 *EV@10K_4

R355 *EV@10K_4

R357 *EV@10K_4

R356 *EV@10K_4

R36 *EV@10K_4

R364 EV@10K_4

R31 *EV@5.1K/F_4

R352

R354 *EV@10K_4

C C

Peak Current Control (PCC) GPIO_6.
FOR MESO ONLY

AMD GAE:GPIO_6 keep as unconnected, don’t stuff
the components on this relative circuitry

SYS_SHDN#[31,36]

to power IC

PCIE_REQ_GPU#[5]

GPIO_11, 12, and 13 FOR MESO ONLY,
EXO become NC

B B

A A

C555 EV@8.2P/50V_4C

C554 EV@8.2P/50V_4C

EXO MLPS setting PD
MEXO no mount

EXO ONLY: stuff Ra=> disable MLPS

stuff Rb=> enable MLPS

+3V_GFX

EV@2N7002KDW

3 4

EV@2N7002KDW

DGPU_OPP#

GPU_PWM_PROCHOT#

DGPU_TDI

DGPU_TMS

DGPU_TDO

DGPU_TRSTB

PEX_CLKREQ#

VGA_ALERT

TESTEN

EV@10K_4

TEMP_FAIL

DGPU_TCK

AMD GAE:CLKRFQ keep this pin as floating.

EVGA-XTALI

23

Y3
EV@27MHZ_10

4 1

EVGA-XTALO

L4 EV@BLM15AG121SN1D(120,500MA)_4

+1.8V_GFX

1.8V(5mA TSVDD)

5

+3V_GFX

R57
*EV@4.7K_4

R58

EV_SP@47K_4

126

DGPUT_DATA

Q11A

+3V_GFX

R54

EV_SP@47K_4

5

DGPUT_CLK

Q11B

PU/PD

R48 *EV@10K_4

GPU_THROTTING#[30 ]

DGPU_AC_DC#[29]

AMD GAE:Debug port TDO left as floating.

ZYV not PU PEX_CLKREQ#

R34

EV@1K_4

ZYV not PD TEMP_FAIL

GPU_PWM_PROCHOT#[37]

to power IC

3

Q32
*EV@ME2N7002DS-G_300MA

2

1

+3V_GFX

2

3

Q5

*EV@ME2N7002DS-G_300MA

R391
EV@1M/F_4

+3V_GFX

C129
Exo@10U/6.3V_6X

1

Ra

R365 *Exo@10K/F_4

Rb

R362 Exo@10K/F_4

C131

EV@1U/10V_4X

R650 *EV@0_4

EV@2N7002K

+1.8V_GFX

+3V_GFX

R49 *EV@1K/F_4

C102

*EV@0.1u/16V_4

PEX_CLKREQ#

R59 EV@10K_4
R56 EV@10K_4

C132

Exo@0.1U/16V_4X

DGPU_OPP#

Q8

2

DGPU_OPP

R370 Meso@10K_4

R371 Meso@10K_4

R368 *EV@10K_4
R369 *EV@10K_4

DGPUT_DATA
DGPUT_CLK
DGPU_OPP#

GPU_GPIO6

GPU_GPIO15

VGA_ALERT

TEMP_FAIL
GPU_GPIO20

DGPU_TRSTB

DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO
TESTEN

TP1

EVGA-XTALO

GPU_D+
GPU_D-

GPU_GPIO28
+1.8V_TSVDD

3

1

EVGA-XTALI

N9

L9
AE9
Y11
AE8

AD9

AC10

AD7
AC8
AC7

AB9
AB8
AB7
AB4
AB2

Y8

Y7

W6

V6

AC5
AC6

AA5
AA6

U1

U3

Y6

R1

R3

U6

U8

U7

T9

T8

T7
P10

P4

P2

N6

N5

N3

N1

M4

R6

M2

P8

P7

N8

AK10
AM10

N7

L6

L5

L3

L1

K4

K7

AF24

W8

W7

AD10

AJ9
AL9

AB16

AC16

AM28
AK28

AC22
AB22

T4

T2

R5

AD17
AC17

4

U24B

DVO

DBG_DATA16
DBG_DATA15
DBG_DATA14
DBG_DATA13
DBG_DATA12
DBG_DATA11
DBG_DATA10
DBG_DATA9
DBG_DATA8
DBG_DATA7
DBG_DATA6
DBG_DATA5
DBG_DATA4
DBG_DATA3
DBG_DATA2
DBG_DATA1
DBG_DATA0

NC#W6
NC#V6

NC#AC5
N#CAC6

NC#AA5
NC#AA6

NC#U1/BP_0

NC#U3/BP_1
NC#Y6

SCL

I2C

SDA

GENERAL PURPOSE I/O

GPIO_0

SMBDATA
SMBCLK
GPIO_5_AC_BATT
PCC/GPIO_6
NC_GPIO_7
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
NC_GPIO_11
NC_GPIO_12
NC_GPIO_13

GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_THERMAL_INT

GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSB
GPIO_29
GPIO_30
CLKREQB
JTAG_TRSTB

JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN
NC#AF24

NC_GENERICB

NC_GENERICD
NC_GENERICE_HPD4
NC#AJ9
DBG_CNTL0

PX_EN

NC_DBG_VREFG

PLL/CLOCK

XTALIN
XTALOUT

XO_IN
XO_IN2

DPLUS

THERMAL

DMINUS

GPIO28_FDO
TSVDD
TSVSS

EV_SP@Meso/Exo_S3

NC#AF2
NC#AF4

NC#AG3

DPA

NC#AG5

NC#AH3
NC#AH1

NC#AK3
NC#AK1

NC#AK5

NC#AM3

NC#AK6

NC#AM5

DPB

NC#AJ7

NC#AH6

NC#AK8
NC#AL7

DPC

NC#V4

NC#U5

NC#V2

NC#Y4

NC#W5

NC#Y2
NC#J8

NC#AA1/PLL_ANALOG_IN

NC#AA3/PLL_ANALOG_OUT

DCM/NC_R

NC_AVSSN#AK26

NC_AVSSN#AJ25

NC_AVSSN#AG25

DAC1

NC_HSYNC

NC_VSYNC/WAKEb

NC_RSET

NC_AVDD

NC_AVSSQ

NC_VDD1DI

NC_VSS1DI

NC_SVI2#1/GPIO_SVD
NC_SVI2#2/GPIO_SVT
NC_SVI2#3/GPIO_SVC

NC_GENLK_CLK

NC_GENLK_VSYNC

DAC2

NC_SWAPLOCKA
NC_SWAPLOCKB

DDC/AUX

NC_DDC1CLK

NC_DDC1DATA

NC_AUX1P
NC_AUX1N

NC_AUX2P
NC_AUX2N

NC#AE16
NC#AD16

NC_DDCVGACLK

NC_DDCVGADATA

NC_G

NC_B

NC

PS_0

PS_1

PS_2

PS_3

TS_A

AF2
AF4

AG3
AG5

AH3
AH1

AK3
AK1

AK5
AM3

AK6
AM5

AJ7
AH6

AK8
AL7

V4
U5

V2

Y4
W5

Y2
J8

AA1
AA3

Debug port for the die

AM26
AK26

AL25
AJ25

AH24
AG25

AH26
AJ27

PCIE_WAKE#_GPU

AD22

AG24
AE22

AE23
AD23

AM12

AK12

R376 Meso@0_4

AL11
AJ11

R372 Meso@0_4

AL13
AJ13

AG13
AH12

AC19

PS_0

AD19

PS_1

AE17

PS_2

AE20

PS_3

AE19

R65
*EV@0_4

AE6
AE5

AD2
AD4

AD13
AD11

AE16
AD16

AC1

TP31

AC3

TP30

C123
EV@10U/6.3V_6X

+PCIE_VDDC_G FX

C93
Exo@10U/6.3V_8X

DP_VDDC

EXO MESO

10u X1
1u X1

0.1u X1

TP29

R52
*Meso@16.2K/F_4

PLL_ANALOG_OUT: Provide a pull-down
resistor on the PCB (DNI).FOR TOPAZ ONLY

+3V_GFX

PCIeR Optimized Buffer Flush/Fill (OBFF)

R403

on WAKEB FOR TOPAZ ONLY

*MESO@10k_4

R406
EV@4.7K_4

1

R402
*EV@10K_4

GPU_SVD_R
GPU_SVT
GPU_SVC_R

PS0[5:1]

PS1[5:1]

PS2[5:1]

PS3[5:1]

+1.8V_GFX

+1.8V_GFX

3

+1.8V_GFX

C127
EV@1U/10V_4X

C89
EV@1U/10V_4X

1u X1

0.1u X1

2

Q12

*EV@ME2N7002DS-G_300MA

+1.8V_GFX

C72

Exo@0.1U/16V_4X

+3V_GFX

C87

Exo@0.1U/16V_4X

R73
EV@8.45K/F_4

PS_0

R64
EV@2K/F_4

R72
EV_SP@6.98K/F_4

PS_3

R63
EV_SP@4.99K/F_4

U24G

AG15

NC_DP_VDDR#1

AG16

NC_DP_VDDR#2

AF16

NC_DP_VDDR#3

AG17

NC_DP_VDDR#4

AG18

NC_DP_VDDR#5

AG19

NC_DP_VDDR#6

AF14

C126
Exo@0.1U/16V_4X

C88
EV@0.1u/16V_4

DP_PVDD

AG20

NC_DP_VDDC#1

AG21

NC_DP_VDDC#2

AF22

NC_DP_VDDC#3

AG22

NC_DP_VDDC#4

AD14

DP_VDDC

AG14

NC_DP_VSSR#1

AH14

NC_DP_VSSR#2

AM14

NC_DP_VSSR#3

AM16

NC_DP_VSSR#4

AM18

NC_DP_VSSR#5

AF23

NC_DP_VSSR#6

AG23

NC_DP_VSSR#7

AM20

NC_DP_VSSR#8

AM22

NC_DP_VSSR#9

AM24

NC_DP_VSSR#10

AF19

NC_DP_VSSR#11

AF20

NC_DP_VSSR#12

AE14

DP_VSSR

AF17

NC_UPHYAB_DP_CALR

EV_SP@Meso/Exo_S3

0

110

1

3

PCIE_LAN_WAKE#

11001

11000

11000

11xxx

PCIE_LAN_WAKE# [5,2 0,21]

+1.8V_GFX

R377

R373

*Meso@10K_4

Meso@10K_4

GPU_SVD_R
GPU_SVC_R

R374

R378
Meso@10K_4

*Meso@10K_4

EXO MESO

11001

11001

11000

PS_3[3:1]

000

001

010

011 6.98K 4.99KH5TC4G63CFR-N0CHynix 2G 256Mx16 *4,1000Mhz

11xxx

+1.8V_GFX

R75
EV_SP@8.45K/F_4

PS_1

C135

*EV@0.01U/50V_4X

PS_3 [5,4] should be 11 due to this is no output/audio design

C134
*EV@680n/6.3V_4

R71
EV_SP@2K/F_4

GEN2(CZL):R75 NC
R71 4.75K(CS24752FB12)

GEN3(CZ) :R75 8.45K(CS28452FB12)
R71 2K(CS22002FB19)

NC/DP POWERDP POWER

AE11

NC#AE11

AF11

NC#AF11

AE13

NC#AE13

AF13

NC#AF13

AG8

NC#AG8

AG10

NC#AG10

AF6

NC#AF6

AF7

NC#AF7

AF8

NC#AF8

AF9

NC#AF9

AE1

NC#AE1

AE3

NC#AE3

AG1

NC#AG1

AG6

NC#AG6

AH5

NC#AH5

AF10

NC#AF10

AG9

NC#AG9

AH8

NC#AH8

AM6

NC#AM6

AM8

NC#AM8

AG7

NC#AG7

AG11

NC#AG11

AE10

NC#AE10

SVDSVC

Output Voltage

00

1.1 Volts

1.0 Volts

0.9 Volts

10.8 Volts

EXO Level Shift

+1.8V_GFX

1

VCCA

3

GPU_SVD_R

GPU_SVC_R

Hynix 2G

Samsung 2G

Micro 2G

A

2

GND

Exo@G2129TL1U

1

VCCA

3

A

2

GND

Exo@G2129TL1U

256Mx16 *4,1000Mhz

256Mx16 *4,1000Mhz

256Mx16 *4,1000Mhz

C138
*EV_SP@0.01U/50V_4X

Quanta P/N====>

4.53K: CS24532FB08 4.99K: CS24992FB26

6.98K: CS26982FB01 3.24K: CS23242FB17

5.62K: CS25622FB18 8.45K: CS28452FB12

4.75K: CS24752FB12 2K: CS22002FB19

2

EXTERNAL THERMAL SENSOR

U25

DGPUT_CLK GPU_D+

DGPUT_DATA

VGA_ALERT

8

7

6

4

*EV@G781P8

SCLK

SDA

ALERT#

OVERT#

+3V_GFX

C517
*EV@0.1u/16V_4

1

VCC

2

DXP

3

DXN

5

GND

Exo Boot

GPU_GPIO15

GPU_GPIO20

GPU_SVD_R
GPU_SVC_R

+3V_GFX

R359
*Exo@10K_4

R358
Exo@10K_4

to power IC

NC

8.45K

BIT[5:4] C ( nF)

00

01

10

11

BIT[3:1]

GPU_SVT_R [37]
GPU_SVD_R [37]
GPU_SVC_R [37]

Rpu Rpd

VCCB

VCCB

B

OE

B

OE

+1.8V_GFX

U23

6

4

5

U4

6

4

5

R74
*EV@0_4

PS_2

R68
EV@4.75K/F_4

+3V_GFX

GPU_GPIO15

R40 Exo@10K_4

+3V_GFX+1.8V_GFX

GPU_GPIO20

GPU_SVT

Vendor P/NTypeVendor

H5TC4G63AFR-11C

K4W4G1646D-BC1A

MT41J256M16HA-093G:E

C136
*EV@0.01U/50V_4X

+1.8V_GFX

R375 Meso@0_4

000

001

8450

010

011

100

101

110

111

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Meso/Exo_S3_Main(2/6)

Meso/Exo_S3_Main(2/6)

Meso/Exo_S3_Main(2/6)

Date: Sheet of

Date: Sheet of

Date: Sheet of

C516

*EV@2200p/50V_4

GPU_D-

R43
Exo@10K_4

R44
*Exo@10K_4

R3pdR3pu

4.75K

2K

2K4.53K

680

82

10

NC

4750NC

2000

20004530

49906980

49904530

56203240

100003400

NC4750

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZRZ

ZRZ

ZRZ

1A

1A

1A

12 41Wednesday, March 18, 2015

12 41Wednesday, March 18, 2015

12 41Wednesday, March 18, 2015

5

4

3

2

1

(VGA)

U24E

AA27

PCIE_VSS#1

AB24

PCIE_VSS#2

AB32

D D

C C

B B

A A

PCIE_VSS#3

AC24

PCIE_VSS#4

AC26

PCIE_VSS#5

AC27

PCIE_VSS#6

AD25

PCIE_VSS#7

AD32

PCIE_VSS#8

AE27

PCIE_VSS#9

AF32

PCIE_VSS#10

AG27

PCIE_VSS#11

AH32

PCIE_VSS#12

K28

PCIE_VSS#13

K32

PCIE_VSS#14

L27

PCIE_VSS#15

M32

PCIE_VSS#16

N25

PCIE_VSS#17

N27

PCIE_VSS#18

P25

PCIE_VSS#19

P32

PCIE_VSS#20

R27

PCIE_VSS#21

T25

PCIE_VSS#22

T32

PCIE_VSS#23

U25

PCIE_VSS#24

U27

PCIE_VSS#25

V32

PCIE_VSS#26

W25

PCIE_VSS#27

W26

PCIE_VSS#28

W27

PCIE_VSS#29

Y25

PCIE_VSS#30

Y32

PCIE_VSS#31

M6

GND#56

N11

GND#57

N13

GND#58

N16

GND#59

N18

GND#60

N21

GND#61

P6

GND#62

P9

GND#63

R12

GND#64

R15

GND#65

R17

GND#66

R20

GND#67

T13

GND#68

T16

GND#69

T18

GND#70

T21

GND#71

T6

GND#72

U15

GND#73

U17

GND#74

U20

GND#75

U9

GND#76

V13

GND#77

V16

GND#78

V18

GND#79

Y10

GND#80

Y15

GND#81

Y17

GND#82

Y20

GND#83

AA11

GND#86

M12

GND#87

V11

GND#88

EV_SP@Meso/Exo_S3

GND

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#84
GND#85

A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11

A32
AM1
AM32

U24F

LVDS CONTROL

NC_UPHYAB_TMDPA_TX0N

NC_UPHYAB_TMDPA_TX0P

NC_UPHYAB_TMDPA_TX1N

NC_UPHYAB_TMDPA_TX1P

NC_UPHYAB_TMDPA_TX2N

NC_UPHYAB_TMDPA_TX2P

NC_UPHYAB_TMDPA_TX3N

NC_UPHYAB_TMDPA_TX3P

TMDP

NC_UPHYAB_TMDPB_TX0N

NC_UPHYAB_TMDPB_TX0P

NC_UPHYAB_TMDPB_TX1N

NC_UPHYAB_TMDPB_TX1P

NC_UPHYAB_TMDPB_TX2N

NC_UPHYAB_TMDPB_TX2P

NC_UPHYAB_TMDPB_TX3N

NC_UPHYAB_TMDPB_TX3P

EV_SP@Meso/Exo_S3

NC_TXOUT_L3P
NC_TXOUT_L3N

NC_TXOUT_U3P

NC_TXOUT_U3N

AL15
AK14

AH16
AJ15

AL17
AK16

AH18
AJ17

AL19
AK18

AH20
AJ19

AL21
AK20

AH22
AJ21

AL23
AK22

AK24
AJ23

All the ASIC supplies must reach their respective
nominal voltages within 20 ms of the start of the
ramp-up sequence, though a shorter ramp-up
duration is preferred. The maximum slew rate on
all rails is 50 mV/µs.

It is recommended that the 3.3-V rail ramp up first

The 3.3-V, 1.8-V, and 0.95-V rails must reach their
ready state at least 10 µs before VDDC, VDDCI,
and VMEMIO start to ramp up.

For power down, reversing the ramp-up sequence is
recommended.

Power Up/Down Sequence

VDDR3

3.3V

+1.8V_VGA

10us

+PCIE_VDDC_GFX (0.95V)

+1.5V_GFX

+VGA_CORE

20ms

20ms

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Meso/Exo_S3_GND/LVDS/Strap(3/6)

Meso/Exo_S3_GND/LVDS/Strap(3/6)

Meso/Exo_S3_GND/LVDS/Strap(3/6)

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

1A

13 41Friday, March 06, 2015

13 41Friday, March 06, 2015

13 41Friday, March 06, 2015

1

5

4

3

2

1

(VGA)

D D

C137
EV@1U/10V_4X

C116
EV@1U/10V_4X

C92
EV@2.2U/6.3V_4X

C118
EV@2.2U/6.3V_4X

C538
EV@10U/6.3V_6X

C104
EV@0.1u/16V_4

+1.8V_GFX

C139
EV@10U/6.3V_6X

C119

EV@1U/10V_4X

C99
EV@2.2U/6.3V_4X

C84
EV@2.2U/6.3V_4X

C146
EV@10U/6.3V_6X

0.95V~1.1V(2A VDDCI)

C142
EV@0.1u/16V_4

+VGPU_CORE

GPUVDDC_SENSE [37]
GPUVSS_SENSE [37]

C140
Exo@0.01u/50V_4

C91
EV@1U/10V_4X

C117
EV@2.2U/6.3V_4X

C111
EV@2.2U/6.3V_4X

C101
EV@1U/10V_4X

+PCIE_VDDC_GFX

C73
EV@1U/10V_4X

+VGPU_CORE

C144
EV@10U/6.3V_6X

+VGPU_CORE

C94
EV@1U/10V_4X

C82
EV@2.2U/6.3V_4X

C110
EV@2.2U/6.3V_4X

C145
Meso@10U/6.3V_6X

C66
EV@1U/10V_4X

C62
EV@1U/10V_4X

C143
EV@2.2U/6.3V_4X

C97
EV@2.2U/6.3V_4X

C540
Meso@10U/6.3V_6X

C86
EV@1U/10V_4X

C96
EV@10U/6.3V_6X

C81
EV@2.2U/6.3V_4X

C108
EV@2.2U/6.3V_4X

C85
EV@10U/6.3V_6X

C95
Exo@10U/6.3V_6X

C64
EV@2.2U/6.3V_4X

C98
Meso@2.2U/6.3V_4X

C90
Meso@10U/6.3V_6X

MPV18

SPV18

U24D

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL
TRANSLATION

AA20

VDD_CT#1

AA21

VDD_CT#2

AB20

VDD_CT#3

AB21

VDD_CT#4

AA17

VDDR3#1

AA18

VDDR3#2

AB17

VDDR3#3

AB18

VDDR3#4

V12

NC_VDDR4#1

Y12

NC_VDDR4#2

U12

NC_VDDR4#3

PLL

L8

MPLL_PV DD

H7

SPLL_PVDD

H8

SPLL_VDDC

J7

SPLL_PVSS

EV_SP@Meso/Exo_S3

MEM I/O

I/O

PCIE_VDDR : 1.8V @ 100mA

AM30

PCIE_PVDD

PCIE

AB23

NC#AB23

AC23

NC#AC23

AD24

NC#AD24

AE24

NC#AE24

AE25

NC#AE25

AE26

NC#AE26

AF25

NC#AF25

AG26

NC#AG26

L23

PCIE_VDDC#1

L24

PCIE_VDDC#2

L25

PCIE_VDDC#3

L26

PCIE_VDDC#4

M22

PCIE_VDDC#5

N22

PCIE_VDDC#6

N23

PCIE_VDDC#7

N24

PCIE_VDDC#8

R22

PCIE_VDDC#9

T22

PCIE_VDDC#10

U22

PCIE_VDDC#11

V22

PCIE_VDDC#12

AA15

VDDC#1

CORE

POWER

VDDC/VARY_BL

VDDC/GENERICA
VDDC/GENERICC

VDDC/DDC2CLK

VDDC/DDC2DATA

VDDC/GPIO_14_HPD2

ISOLATED
CORE I/O

NC#W1/FB_VDDCI

NC#W3/FB_VSS

N15

VDDC#2

N17

VDDC#3

R13

VDDC#4

R16

VDDC#5

R18

VDDC#6

Y21

VDDC#7

T12

VDDC#8

T15

VDDC#9

T17

VDDC#10

T20

VDDC#11

U13

VDDC#12

U16

VDDC#13

U18

VDDC#14

V21

VDDC#15

V15

VDDC#16

V17

VDDC#17

V20

VDDC#18

Y13

VDDC#20

Y16

VDDC#21

Y18

VDDC#22

AA12

VDDC#23

M11

VDDC#24

N12

VDDC#25

U11

VDDC#26

AB11
AB12

VDDC/DIGON

AB13
W9
AC11
AC13
AC14

VDDC/HPD1

U10

VDDC/GPIO_1

T10

VDDC/GPIO_2

W10

VDDC/GPIO_18

Y9

R21

BIF_VDDC_1

U21

BIF_VDDC_2

M13

VDDCI#1

M15

VDDCI#2

M16

VDDCI#3

M17

VDDCI#4

M18

VDDCI#5

M20

VDDCI#6

M21

VDDCI#7

N20

VDDCI#8

W1
W3

AC20

NC#FB_VDDC

AD20

NC#FB_VSS

EXO no support this function
(refer to GPU SCL)

C130
Exo@0.1U/16V_4X

PCIE_VDDC : 0.95V @ 2.5A ( GEN3.0)

C74
Exo@1U/10V_4X

VDDC+VDDCI:0.85~1.1V(14.2A peak )( Ripple < 87.2mV)

C77
EV@2.2U/6.3V_4X

C78
EV@2.2U/6.3V_4X

C539
EV@10U/6.3V_6X

+PCIE_VDDC_GFX

C541
Exo@0.1U/16V_4X

R45 Meso@0_4
R46 Meso@0_4

GPUVDDC_SENSE_R
GPUVSS_SENSE_R

R67 Meso@0_4
R66 Meso@0_4

+1.5V_GFX

1.35V ( DDR3, MVD DQ = 1.35V@1.2A)

C121
Exo@10U/6.3V_6X

C112

Exo@1U/10V_4X

C80

EV@10U/6.3V_6X

EV@1U/10V_4X

+0.95V_VGA_SPV10

EV@0.1u/16V_4

C70
EV@2.2U/6.3V_4X

C56
Exo@0.1U/16V_4X

+1.8V_GFX

C107
Exo@0.1U/16V_4X

+3V_GFX

C105

Exo@1U/10V_4X

Meso@10U/6.3V_6X

C45

EV@10U/6.3V_6X

C53

C59
EV@2.2U/6.3V_4X

C49
EV@0.1u/16V_4

VDD_GPIO18 @13mA

C100
EV@1U/10V_4X

VDD_GPIO33@25mA

C113

EV@1U/10V_4X

MPV18

C79

SPV18

C46

C52

EV@1U/10V_4X

C57
Exo@10U/6.3V_6X

C65
Meso@0.01u/50V_4

C C

B B

C51
Exo@10U/6.3V_6X

+1.8V_GFX

+1.8V_GFX

+PCIE_VDDC_GFX

C47
EV@10U/6.3V_6X

C71
Exo@0.1U/16V_4X

L3 EV@PBY160808T-221Y-N_6

Memory Phase Lock Loop Power :

1.8V @ 90mA

L1 EV@BLM15AG121SN1D(120,500MA)_4

Engine Phase Lock Loop Power :
analog pow er pin for eng ine PLL

1.8V @ 75mA

L2 EV@BLM15AG121SN1D(120,500MA)_4

Engine Phase Lock Loop Power :
digital power pin for engine PLL

0.95V @ 100mA

C69
EV@2.2U/6.3V_4X

C54
Exo@0.1U/16V_4X

EV@1U/10V_4X

C68
EV@2.2U/6.3V_4X

C63
Exo@0.1U/16V_4X

C120
Exo@10U/6.3V_6X

C76

Exo@0.1U/16V_4X

C60
EV@2.2U/6.3V_4X

C55
Exo@0.1U/16V_4X

C75

C44

Exo@0.1U/16V_4X

C50

Exo@10U/6.3V_6X

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Meso/Exo_S3 _Power(4/6)

Meso/Exo_S3 _Power(4/6)

Meso/Exo_S3 _Power(4/6)

ZRZ

ZRZ

ZRZ

14 41Wednesday, March 18, 2015

14 41Wednesday, March 18, 2015

1

14 41Wednesday, March 18, 2015

1A

1A

1A

5

(VGA)

VMA_ODT0[16 ]
VMA_ODT1[16 ]

VMA_RAS0#[16]

D D

C C

B B

A A

VMA_RAS1#[16]

VMA_CAS0#[16]
VMA_CAS1#[16]

VMA_WE0#[16]
VMA_WE1#[16]

VMA_CS0#[16]

VMA_CS1#[16]

VMA_CKE0[16]
VMA_CKE1[16]

VMA_CLK0[16]
VMA_CLK0#[16]

VMA_CLK1[16]
VMA_CLK1#[16]

VMA_WDQS[7..0][16]

VMA_RDQS[7..0][16]

VMA_DM[7..0][16]

VMA_DQ[63..0][16]

VMA_MA[15..0][16]

VMA_BA0[16 ]
VMA_BA1[16 ]

VMA_BA2[16 ]

C58
EV@1U/6.3V_4X

support 1Gbit
VRAM ( 64M X 16 )

+1.5V_GFX

R32
EV@40.2/F_4

R33
EV@100/F_4

MVREFS CLKTESTA

C48
EV@1U/6.3V_4X

5

VMA_ODT0
VMA_ODT1

VMA_RAS0#
VMA_RAS1#

VMA_CAS0#
VMA_CAS1#

VMA_WE0#
VMA_WE1#

VMA_CS0#

VMA_CS1#

VMA_CKE0
VMA_CKE1

VMA_CLK0
VMA_CLK0#

VMA_CLK1
VMA_CLK1#

VMA_WDQS[7..0]

VMA_RDQS[7..0]

VMA_DM[7..0]

VMA_DQ[63..0]

VMA_MA[15..0]

VMA_BA0
VMA_BA1
VMA_BA2

MVREFD

+1.5V_GFX

R30
EV@40.2/F_4

R29
EV@100/F_4

R38 EV@120/F_4

C61
*EV@0.1u/16V_4

R35
*EV@51.1/F_4

route 50ohms single-ended/100ohms diff and keep short

4

U24C

DRAM_RST

K27

H30
H32
G29

F28
F32
F30

C30

F27
A28

C28

E27
G26
D26

F25

A25
C25

E25
D24

E23

F23
D22

F21

E21
D20

F19

A19
D18

F17

A17
C17

E17
D16

F15

A15
D14

F13

A13
C13

E11

A11
C11

F11

K26

K25

L10

J29

J26

J25

A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3

E1
G7
G6
G1
G3

J6
J1
J3
J5

K8

L7

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MVREFD A
MVREFSA

NC
MEM_CAL RP0

DRAM_RST

CLKTESTA
CLKTESTB

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8
MAA0_9

MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7

MMA1_8

MAA1_9

WCKA0_0

WCKA0B_0

WCKA0_1

WCKA0B_1

WCKA1_0

WCKA1B_0

WCKA1_1

MEMORY INTERFACE

WCKA1B_1

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

ADBIAO

ADBIA1

CLKA0B

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

WEA0B
WEA1B

EV_SP@Meso/Exo_S3

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

Rd

CLKTESTB

C67
*EV@0.1u/16V_4

R37

*EV@51.1/F_4

4

CLKA0

CLKA1

CKEA0
CKEA1

K17
J20
H23
G23
G24
H24
J19
K19
G20
L17

J14
K14
J11
J13
H11
G11
J16
L15
G14
L16

E32
E30
A21
C21
E13
D12
E3
F4

H28
C27
A23
E19
E15
D10
D6
G5

H27
A27
C23
C19
C15
E9
C5
H4

L18
K16

H26
H25

G9
H9

G22
G17

G19
G16

H22
J22

G13
K13

K20
J17

G25
H10

3

3

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA13
VMA_MA15

VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1
VMA_MA14

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

VMA_ODT0
VMA_ODT1

VMA_CLK0
VMA_CLK0#

VMA_CLK1
VMA_CLK1#

VMA_RAS0#
VMA_RAS1#

VMA_CAS0#
VMA_CAS1#

VMA_CS0#

VMA_CS1#

VMA_CKE0
VMA_CKE1

VMA_WE0#
VMA_WE1#

2

25mm (max) 25mm (max)5mm (max)

From GPU

DRAM_RST

Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2

This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.

R28 EV@10/F_4

R27
EV@4.99K/F_4

2

R26 EV@51_4

C43
EV@120P/50V_4N

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

Meso/Exo_S3_MEM(5/6)

Meso/Exo_S3_MEM(5/6)

Meso/Exo_S3_MEM(5/6)

1

DRAM_RST_M [16]

ZRZ

ZRZ

ZRZ

15 41Friday, March 06, 2015

15 41Friday, March 06, 2015

15 41Friday, March 06, 2015

1

1A

1A

1A

5

4

3

2

1

(VGA)

VMA_DQ[63..0][15]

VMA_WDQS[7..0][15]

VMA_RDQS[7..0][15]

VMA_MA[15..0][15]

VMA_DM[7..0][15]

D D

C C

DRAM_RST_M[15]

VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_MA[15..0]
VMA_DM[7..0]

VMA_BA0[15]
VMA_BA1[15]
VMA_BA2[15]

VMA_CLK0[15]

VMA_CLK0#[15]

VMA_CKE0[15]

VMA_ODT0[15]

VMA_CS0#[15]
VMA_RAS0#[15]
VMA_CAS0#[15]
VMA_WE0#[15]

Should be 240
Ohms +- 1%

U1

VREFC_VMA1
VREFD_VMA1

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15 VMA_MA15

VMA_RDQS1

VMA_WDQS1

VMA_DM1
VMA_DM2

VMA_RDQS2
VMA_WDQS2

DRAM_RST_M

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

VMA_BA0 VMA_BA0
VMA_BA1
VMA_BA2

VMA_CLK0
VMA_CLK0#
VMA_CKE0

VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#

VMA_ZQ1

R10
EV@243/F_4

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV_SP@K4W4G1646D-BC1A

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9

VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMA_DQ12

F7

VMA_DQ9

F2

VMA_DQ14

F8

VMA_DQ8

H3

VMA_DQ15

H8

VMA_DQ13

G2

VMA_DQ10

H7

VMA_DQ11

D7

VMA_DQ19

C3

VMA_DQ21

C8

VMA_DQ18

C2

VMA_DQ23

A7

VMA_DQ17

A2

VMA_DQ22

B8

VMA_DQ16

A3

VMA_DQ20

+1.5V_GFX

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Should be 240
Ohms +- 1%

VREFC_VMA2
VREFD_VMA2

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

VMA_BA1
VMA_BA2

VMA_CLK0
VMA_CLK0#
VMA_CKE0

VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#

VMA_RDQS0
VMA_WDQS0

VMA_DM0
VMA_DM3

VMA_RDQS3
VMA_WDQS3

DRAM_RST_M

VMA_ZQ2

R347
EV@243/F_4

EV_SP@K4W4G1646D-BC1A

Channel A : 2Gb/4Gb gDDR3L

Should be 240
Ohms +- 1%

VREFC_VMA3
VREFD_VMA3

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_MA15 VMA_MA15

VMA_BA0
VMA_BA1
VMA_BA2

VMA_CLK1
VMA_CLK1#
VMA_CKE1

VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#

VMA_RDQS7
VMA_WDQS7

VMA_DM7
VMA_DM5

VMA_RDQS5
VMA_WDQS5

DRAM_RST_M

VMA_ZQ4

R336
EV@243/F_4

U22

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMA_DQ2

F7

VMA_DQ4

F2

VMA_DQ0

F8

VMA_DQ7

H3

VMA_DQ3

H8

VMA_DQ6

G2

VMA_DQ1

H7

VMA_DQ5

D7

VMA_DQ30

C3

VMA_DQ27

C8

VMA_DQ31

C2

VMA_DQ25

A7

VMA_DQ28

A2

VMA_DQ24

B8

VMA_DQ29

A3

VMA_DQ26

+1.5V_GFX

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

U21

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV_SP@K4W4G1646D-BC1A

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9

VDD#G7

VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

U2

VMA_ZQ3

R25
EV@243/F_4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV_SP@K4W4G1646D-BC1A

E3

VMA_DQ63

F7

VMA_DQ57

F2

VMA_DQ58

F8

VMA_DQ60

H3

VMA_DQ56

H8

VMA_DQ62

G2

VMA_DQ59

H7

VMA_DQ61

D7

VMA_DQ44

C3

VMA_DQ43

C8

VMA_DQ47

C2

VMA_DQ42

A7

VMA_DQ45

A2

VMA_DQ41

B8

VMA_DQ46

A3

VMA_DQ40

+1.5V_GFX

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VMA_CLK1[15]
VMA_CLK1#[15]
VMA_CKE1[15]

VMA_ODT1[15]

VMA_CS1#[15]
VMA_RAS1#[15]
VMA_CAS1#[15]
VMA_WE1#[15]

Should be 240
Ohms +- 1%

VREFC_VMA4
VREFD_VMA4

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

VMA_BA0
VMA_BA1
VMA_BA2

VMA_CLK1
VMA_CLK1#
VMA_CKE1

VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#

VMA_RDQS4
VMA_WDQS4

VMA_DM4
VMA_DM6

VMA_RDQS6
VMA_WDQS6

DRAM_RST_M

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2

VDD#D9

VDD#G7

VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9
VSSQ#D1
VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMA_DQ34

F7

VMA_DQ38

F2

VMA_DQ35

F8

VMA_DQ37

H3

VMA_DQ36

H8

VMA_DQ39

G2

VMA_DQ33

H7

VMA_DQ32

D7

VMA_DQ51

C3

VMA_DQ54

C8

VMA_DQ49

C2

VMA_DQ55

A7

VMA_DQ52

A2

VMA_DQ53

B8

VMA_DQ50

A3

VMA_DQ48

+1.5V_GFX

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MEM Reference Voltage 1 MEM Reference Voltage 2 MEM Reference Voltage 3 MEM Reference Voltage 4

+1.5V_GFX

B B

VRAM De-Coupling VRAM De-Coupling

+1.5V_GFX

C33
EV@1U/6.3V_4X

+1.5V_GFX

C489
EV@1U/6.3V_4X

A A

+1.5V_GFX

C15
EV@4.7U/6.3V_6X

R12
EV@4.99K/F_4

R11
EV@4.99K/F_4

C34
EV@1U/6.3V_4X

EV@1U/6.3V_4X

C17
EV@4.7U/6.3V_6X

VREFC_VMA1

C36
EV@1U/6.3V_4X

C514
EV@1U/6.3V_4X

C21
EV@4.7U/6.3V_6X

5

C7
EV@0.1u/16V_4

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

R23
EV@4.99K/F_4

VREFC_VMA4 VREFD_VMA4

R24
EV@4.99K/F_4

C13
EV@1U/6.3V_4X

C9
EV@1U/6.3V_4X

C32
*EV@22U/6.3V_6

C39
EV@0.1u/16V_4

C10
EV@1U/6.3V_4X

C497
EV@1U/6.3V_4XC493

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Meso/Exo_S3 _VRAM_DDR3 BGA(6/6 )

Meso/Exo_S3 _VRAM_DDR3 BGA(6/6 )

Meso/Exo_S3 _VRAM_DDR3 BGA(6/6 )

Date: Sheet of

Date: Sheet of

Date: Sheet of

C37
EV@1U/6.3V_4X

C513
EV@1U/6.3V_4X

C2
EV@4.7U/6.3V_6X

R21
EV@4.99K/F_4

VREFD_VMA1

R22
EV@4.99K/F_4

C4
EV@1U/6.3V_4X

C511
EV@1U/6.3V_4X

C1
*EV@4.7U/6.3V_6X

C35
EV@0.1u/16V_4

C5
EV@1U/6.3V_4X

C494
EV@1U/6.3V_4X

C491
EV@1U/6.3V_4X

C8
EV@1U/6.3V_4X

EV@1U/6.3V_4X

C490
EV@1U/6.3V_4X

4

R350
EV@4.99K/F_4

VREFC_VMA2

R351
EV@4.99K/F_4

C512
EV@0.1u/16V_4

CLK-A0 Termaination

Dual Rank :80.6R
Single Rank :40.2R

CLK-A1 Termaination

Dual Rank :80.6R
Single Rank :40.2R

R332
EV@4.99K/F_4

VREFD_VMA2

R331
EV@4.99K/F_4

VMA_CLK0

VMA_CLK0#

VMA_CLK1

VMA_CLK1#

C492
EV@0.1u/16V_4

R8

EV@40.2/F_4

VMA_CLK0_COMM

R9

EV@40.2/F_4

R334

EV@40.2/F_4

VMA_CLK1_COMM

R333

EV@40.2/F_4

3

C6

EV@0.01u/50V_4

C486

EV@0.01u/50V_4

R337
EV@4.99K/F_4

VREFC_VMA3

R326
EV@4.99K/F_4

+1.5V_GFX

C38
EV@1U/6.3V_4X

+1.5V_GFX

C510
EV@1U/6.3V_4X

+1.5V_GFX

C18
EV@4.7U/6.3V_6X

C488
EV@0.1u/16V_4

C40
EV@1U/6.3V_4X

C509
EV@1U/6.3V_4XC515

C23
EV@4.7U/6.3V_6X

R348
EV@4.99K/F_4

VREFD_VMA3

R349
EV@4.99K/F_4

C42
EV@1U/6.3V_4X

EV@1U/6.3V_4X

C29
EV@4.7U/6.3V_6X

C507

C508
EV@0.1u/16V_4

C41
EV@1U/6.3V_4X

C506
EV@1U/6.3V_4X

C31
EV@4.7U/6.3V_6X

2

C16
EV@1U/6.3V_4X

C12
EV@1U/6.3V_4X

C673
*EV@22U/6.3V_6

R14
EV@4.99K/F_4

R15
EV@4.99K/F_4

C11
EV@1U/6.3V_4X

C496
EV@1U/6.3V_4X

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

C495
EV@4.7U/6.3V_6X

C3
EV@4.7U/6.3V_6X

ZRZ

ZRZ

ZRZ

16 41Friday, March 06, 2015

16 41Friday, March 06, 2015

16 41Friday, March 06, 2015

C14
EV@0.1u/16V_4

1A

1A

1A

1

EDP_HPD[4]

A A

R339 *100K_4
R338 *100K_4

Front Camera (FCM)

CCD

USBP5+[6]
USBP5-[6]

EDP_AUX_C
EDP_AUX#_C

R335 *short_4
R327 *short_4

TOUCH (TSN)

Touch panel

B B

C C

USBP2+[6]

USBP2-[6]

I2C_SCL_TS[5]

I2C_SDA_TS[5]

1.8V_S0

APU_TP_INT#[5]

R325 *shortUBT@0_4

R323 *shortUBT@0_4

VDD_18

Q31

4 3

1

I2CT@PJT138K

3

R2 I2CT@0_4

+3V

R651
*1K_4

EDP_HPD

R13

100K_4

R329
I2CT@2.2K_4

5

2

6

+3V

2

Q2

*I2CT@2N7002K

2

R341 *100K_4
R340 *100K_4

USBP5+_R
USBP5-_R

USBP2+_R
USBP2-_R

R328 *I2CT@0_4
R330 I2CT@0_4

R324
I2CT@2.2K_4

I2C_SCL_TS_R

I2C_SDA_TS_R

R3
*I2CT@10K_4

1

TP_INT#

3

4

5

6

7

8

LCD Power (LDS)LCD (LDS)

+3V

VIN

C505

C503

4.7u/25V_8

1000p/50V_4

+3V

VIN

LCDVCC

CCD

+3V
+3V

Touch panel

+5V

PCIERST#[5,11,20,21]

APU_DISP_PWM[4]

+5V
+3V

TOUCHPANEL_ON[29]

EDP_HPD

EDP_AUX[4]
EDP_AUX#[4]

EDP_TX1[4]
EDP_TX1#[4]

EDP_TX0[4]
EDP_TX0#[4]

BOARD_ID4[5]

For Touch or None-Touch

C680 180P/50V_4

USBP2+_R
USBP2-_R
I2C_SCL_TS_R
I2C_SDA_TS_R

+3V +5V

C504

C27

0.1u/16V_4
1000p/50V_4

R346 *short_8

R345 *short_6

R344 *short_6
R18 *0_4
R343 0_6
R321 I2CT@0_4

R342 *short_4

R627 33_4

C502 0.1u/16V_4
C501 0.1u/16V_4

C500 0.1u/16V_4
C499 0.1u/16V_4

C498 0.1u/16V_4
C487 0.1u/16V_4

R654 UBT@0_4
R655 UBT@0_4
R656 I2CT@0_4
R657 I2CT@0_4

R626 33_4

C677
180P/50V_4

V_BLIGHT

LCDVCC_R

CCD_PWR

TPA_PWR
TP_RST#

BRIGHT
BL_ON
EDP_HPD_R

EDP_AUX_C
EDP_AUX#_C

EDP_TX1_C
EDP_TX1#_C

EDP_TX0_C
EDP_TX0#_C

USBP5+_R
USBP5-_R

USBP2+_R/TP_CLK
USBP2-_R/TP_DATA

TP_INT#

C19

0.1u/16V_4

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CN2

G_5

G_4

G_1

G_0

C20

1000p/50V_4

LVDS CONN

1u/6.3V_4
C30

APU_DISP_ON[4]

R20

100K_4

U3

5

IN

4

EN

G524B1T11U

Enable:High Active /2.5A
GMT: AL000524004
BCD : AL022802000

Backlight Control (LDS)

APU_DISP_BLEN[4,29]

R16 2.2K_4

R17
100K_4

OUT

GND

/OC

APU_BLEN_R

1

2

3

+3V

+3VPCU

R19

10K_4

2

C22
*0.1u/16V_4

R6

*10K_4

BL#

Q3
2N7002K

Q4

1 3

MMBT3904-7-F

C26

C25

*2.2u/16V_6

0.1u/16V_4

+3VPCU

+3V

R7

10K_4

BL_ON

3

2

1

Q1
DTC144EUA

1 3

LCDVCC

C28

C24

22U/6.3V_6

0.01u/50V_4

R1
*100K_4

LID591#

LID591#,HALL intrnal PU

D1
1N4148WS

2

LID591# [29]

EC_FPBACK# [29]

Lid Switch (HSR)

+3VPCU

AL009247000 -- BCD

C485 1U/6.3V_4

D D

1

2

AL009132001 -- ANC
AL008251000 -- YBT

1

2

MR1
APX9132H AI-TRG

3

LID591#

12

D28*TVS/6pF_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

4

5

6

Date: Sheet of

7

PROJECT :

EDP/LID/CCD

EDP/LID/CCD

EDP/LID/CCD

ZYV

ZYV

ZYV

8

D3B

D3B

17 41Friday, March 06, 2015

17 41Friday, March 06, 2015

17 41Friday, March 06, 2015

D3B

5

4

3

2

1

De-Mux (HDM)

3 Levels Input:
L: Low
H: High
M: VDD33/2, connect both pull-up and pull-down resistors

MUX_3V

R185 4.7K/J_4

R194 *4.7K/J_4

D D

R180 *4.7K/J_4
R179 *4.7K/J_4
R190 4.7K/J_4

MODE
TMDS_PRE
TMDS_RT
TMDS_DDC BUF
PEQ
SW

R184 4.7K/J_4
R192 *4.7K/J_4R191 *4.7K/J_4
R195 *4.7K/J_4
R182 *4.7K/J_4
R178 *4.7K/J_4
R636 *4.7K/J_4

HDMI switching to VGA need 100-400ms

MODE = L: Control Switching Mode, HDMI ID disable
= H: Automatic Switching Mode, HDMI ID disable
= M: Automatic Switching Mode, HDMI ID enable

TMDS_PRE = L: no pre-emphasis
= H: 1.5dB pre-emphasis
= M: 3.0dB pre-emphasis

TMDS_RT = L: Standard open drain driver
= H: Open drain driver with termination resistors

TMDS_DDCBUF = L: DDC pass through
= H: DDC active buffer
= M: DDC pass through with 40 kohm pull up resistor

PEQ = L: default, LEQ, compensate channel loss up to 12dB @ HBR2
= H: HEQ, compensate channel loss up to 15dB @ HBR2
= M: LLEQ, compensate channel loss up to 5dB @ HBR2

C336 0.01u/50V_4

DP_CFG1 = L: default, auto test disable & input offset cancellation enable
= H: auto test enable & input offset cancellation enable
= M: auto test disable & input offset cancellation disable

DP_CFG0 = L: default, automatic EQ enable & AUX interception enable
= H: automatic EQ disable & AUX interception enable
= M: automatic EQ disable & AUX interception disable, no pre-emphasis, 800mVpp swing

MUX_3V

R200 *4.7K/J_4
R196 *4.7K/J_4

DP_AUXP_SCL [19]

DP_AUXN_SDA [19]

DP_CFG1
DP_CFG0

R201 *4.7K/J_4
R193 *4.7K/J_4

DP_AUXP_SCL
DP_AUXN_SDA

R638 CZL@100K_4
R639 CZL@100K_4

MUX_3V

For Control Switching:
SW = L: DP output is selected
SW = H: TMDS output is selected

MUX_3V+3V

R203 *short_6

+3V

R648

C C

MUX_HPD[4]

B B

MUX_AUX[4]

MUX_AUX#[4]

*10K_4

R649

*100K_4

C338 0.1u/16V_4
C340 0.1u/16V_4

HDMI(HDM)

EMI

TMDS_D2+

R576 *120/F_4

TMDS_D1+

A A

TMDS_D0+

TMDS_CLK +

5

TMDS_D2-

R567 *120/F_4

TMDS_D1-

R564 *120/F_4

TMDS_D0-

R560 *120/F_4

TMDS_CLK -

For Automatic Switching:
SW = L: DP output has higher priority.
SW = H:TMDS output has higher priority.

MUX_TX0[4]
MUX_TX0#[4]

MUX_TX1[4]
MUX_TX1#[4]

MUX_TX2[4]
MUX_TX2#[4]

MUX_TX3[4]
MUX_TX3#[4]

IN_AUXP
IN_AUXN

C331 0.1U/ 16V/X7R_4
C330 0.1U/ 16V/X7R_4

C329 0.1U/ 16V/X7R_4
C328 0.1U/ 16V/X7R_4

C327 0.1U/ 16V/X7R_4
C326 0.1U/ 16V/X7R_4

C325 0.1U/ 16V/X7R_4
C324 0.1U/ 16V/X7R_4

R183

2.2K_4

1

2

BSS84
Q19

3

+5V

3

BCD : AL002802002
DDS : AL002331000

C334 2.2u/6.3V_4

C323 0.1u/16V_4

R186

2.2K_4

1

2

BSS84
Q20

3

TMDS_D2+
TMDS_D2-

TMDS_D1+
TMDS_D1-

TMDS_D0+
TMDS_D0-

TMDS_CLK +
TMDS_CLK -

Q46

OUT

IN

GND

AP2802N TR-G1-01

MUX_3V

3

2N7002K

1

1
2

4

TMDS_DDC BUF
IN_D0P
IN_D0N

IN_D1P
IN_D1N
PEQ
IN_D2P
IN_D2N
IN_CA_DET
IN_D3P
IN_D3N

MUX_3V

R181

4.7K/F_4

2

IN_CA_DET

Q18

*CM1225-04DE

5
4
3
2
1

ESD4
*CM1225-04DE

5
4
3
2
1

ESD3

C638
*220p/50V_4

5
4
GND_3/8
2
1

5
4
GND_3/8
2
1

1

CEXT

2

TMDS_DDCBUF

3

IN_D 0p

4

IN_D 0n

5

IN_H PD

6

IN_D 1p

7

IN_D 1n

8

PEQ

9

IN_D 2p

10

IN_D 2n

11

IN_C A_DET

12

IN_D 3p

13

IN_D 3n

14

VDD33

U13

GND58GND59GND60GND

6
7

9

10

6
7

9

10

D38
*EGA_4

MUX_3V

DP_AUXP_SCL

MODE

DP_AUXN_SDA

53

54

55

56

57

EPAD

VDD33

DP_AUXp_SCL

DP_AUXn_SDA

TMDS_CLKn15TMDS_CLKp16TMDS_HPD17TMDS_CH0n18TMDS_CH0p19TMDS_PRE20TMDS_CH1n21TMDS_CH1p22TMDS_RT23TMDS_CH2n24TMDS_CH2p25GND26REXT27VDD33

61

TMDS_CLK-

TMDS_CLK+

TMDS_HPD

TMDS_D0-

6

TMDS_D2+

7

TMDS_D2-

9

TMDS_D1+

10

TMDS_D1-

6

TMDS_D0+

7

TMDS_D0-

9

TMDS_CLK +

10

TMDS_CLK -

TMDS_SCL

IN_AUXP

IN_AUXN

MUX_AUX

MUX_AUX#

48

49

50

52

MODE

IN_AUXn51IN_AUXp

IN_DDC_SCL

IN_DDC_SDA

PS8339B

TMDS_D0+

TMDS_PRE

TMDS_D1-

TMDS_D1+

TMDS_RT

TMDS_HPD

TMDS_SDA

SW

DP_CFG0

43

44

45PD46

47

GND

TMDS_SCL

TMDS_SDA

SW/SDA_CTL

DP_CA_DET

DP_CFG0/SCL_CTL

I2C_ CTL_E N

DP_CFG1

28

MUX_3V

TMDS_D2-

TMDS_D2+

C351

0.01u/50V_4

R198

4.99K/F_4

R172 *short_4

3

66

GND69GND68GND67GND

42

DP_CA_DET
MUX_3V

DP_CFG1

R637 1M_4
C350 0.1u/16V_4

R174

2.2K_4

D5

D7

*EGA_4

*EGA_4

41

VDD33

40

DP_D0p

39

DP_D0n

38
37

DP_D1p

36

DP_D1n

35

GND

34

DP_D2p

33

DP_D2n

32

DP_HPD

31

DP_D3p

30

DP_D3n

29

GND62GND63GND64GND

PS8339BQFN56GTR2-A1

65

PS8339B - Pin Control Mode

HDMI_5V

R173

2.2K_4

D6
*EGA_4

TMDS_D2+

TMDS_D2­TMDS_D1+

TMDS_D1­TMDS_D0+

TMDS_D0­TMDS_CLK +

TMDS_CLK -

TMDS_SCL
TMDS_SDA

HDMI_5V
TMDS_HPD _R

CN10

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

DP_D0P [19]
DP_D0N [19]

DP_D1P [19]
DP_D1N [19]

DP_HPD [19]

SHELL1
D2+
D2 Shield
D2­D1+
D1 Shield
D1­D0+
D0 Shield
D0­CK+
CK Shield
CK­CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

SHELL2

HDMI connector

2

GND

GND

20

23

22

21

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

De-Mux (PS8339B )/HDMI

De-Mux (PS8339B )/HDMI

De-Mux (PS8339B )/HDMI

ZRZ

ZRZ

ZRZ

1

1A

1A

18 41Friday, March 06, 2015

18 41Friday, March 06, 2015

18 41Friday, March 06, 2015

1A

5

23

4

3

2

1

DP TO VGA (CRT)

+3V

L5 80ohm@100MHz

DP2_TX0[4]
DP2_TX0#[4]

DP2_TX1[4]

D D

C C

B B

DP2_TX1#[4]

DP2_AUX[4]
DP2_AUX#[4]

C254 CZ@0.1u/16V_4
C250 CZ@0.1u/16V_4

C248 CZ@0.1u/16V_4
C243 CZ@0.1u/16V_4

C265 CZ@0.1u/16V_4

DP2_HPD[4]
DP_HPD[18]

DP_AUXP_SCL[18]
DP_AUXN_SDA[18]

IVDDO

L6 80ohm@100MHz

C231
10u/6.3V_6

DP_D0P[18]
DP_D0N[18]

DP_D1P[18]
DP_D1N[18]

MCUVDDH

R122 CZ@0_4
R202 CZL@0_4

DP_D0P_C
DP_D0N_C

DP_D1P_C
DP_D1N_C

DP_AUXP_SCL_C
DP_AUXN_SDA_C

for DP2 Path only
(8339B Internal PD 150K)

C255 CZL@0.1u/16V_4
C251 CZL@0.1u/16V_4

C249 CZL@0.1u/16V_4
C244 CZL@0.1u/16V_4

C269 CZL@0.1u/16V_4
C268 CZL@0.1u/16V_4 R135 22/J_4

AVCC_18

20 mils30 mils

R205 CZ@4.7K_4

C241

0.1u/16V_4

R126 SP@2.2K_4
R127 SP@2.2K_4

IT6515 Stuf
IT6516 DNI

DP_D0P_C
DP_D0N_C

DP_D1P_C
DP_D1N_C

DP_AUXP_SCL_C
DP_AUXN_SDA_C

+3V

10 mils

C260

0.1u/16V_4

10 mils

C242

0.1u/16V_4

30 mils

R514 *short_4 R128 *short_4

C263
10u/6.3V_6

+3V

R652
*1K_4

U8

33

HPD

22

RX0P

23

RX0N

25

RX1P

26

RX1N

19

RXAUXP

18

RXAUXN

15

DCAUXP

14

DCAUXN

21

AVCC

27

AVCC

28

ASPVCC

36

PCSDA

35

PCSCL

IVVDD_3 3

C230

0.1u/16V_4

OVDD_33

10

40

OVDD

OVDD

IT6515FN

PWD

31

IT6515 Stuff
IT6516 DNI

R125 SP@0_4

TP41

R136 22/J_4

VSYNC
HSYNC

20 mils

C239

0.1u/16V_4

TP11

C240

0.1u/16V_4

IVDDO

CRT_RED

CRT_GRE

CRT_BLU

20 mils

DDCCLK
DDCDAT

C238

4.7U/6.3V_6

CRT_R1

CRTVDD5

IVDDO

L780ohm@100MHz

HSYNC CRTHSYNC_R

CRT_G1

CRT_B1
CRTVDD5

DDCDAT
CRTHSYNC

CRTVSYNC
DDCCLK

U7

1

OE#

VCC

2

A

3

GND

M74VHC1GT125DF2G

Y

DDCCLK
DDCDAT

CRTVDD5

CRTVSYNC

CRTHSYNC

DDCCLK

DDCDAT

5

4

*CM1225-0 4DE

5

5

4

4

3

GND_3/8

2

2

1

1

ESD2
*CM1225-0 4DE

5

5

4

4

3

GND_3/8

2

2

1

1

ESD1

+5V

6
7

9

10

6
7

9

10

R1402.2K_4
R1412.2K_4

C22310p/50V_4

C611*10p/50V_4

C610*10p/50V_4

C597

0.1u/16V_4

R123 33_4

6
7

9
10

6
7

9
10

C2700.22u/6.3V_4

C273*220p/50V_4

C2710.1u/16V_4

C22910p/50V_4

CRT_R1
CRT_G1

CRT_B1
CRTVDD5

DDCDAT
CRTHSYNC

CRTVSYNC
DDCCLK

CRTVDD5

CRTHSYNC

20 mils

IVVDD_18

IVDDO

11

39

30

IVDD3329IVDD33

37

32

IVDD

IVDD20IVDD

IVDD

IVDDO

MCUVDDH

VGADDCCLK

VGADDCSDA

GND

SP@IT6515FN/BX-005 0

41

all stage need confirm 6515 or 6516

C266

0.1u/16V_4

URDBG

ISPSCL
ISPSDA

VSYNC
HSYNC

VDDC

IORP

IOGP

IOBP

RSVD

RSET

VDDA

COMP

38

24

12
13

17
16

1
2

6

9

8

7

34

3

5

4

C267

0.1u/16V_4C264 CZ@0.1u/16V_4

MCUVDDH

URDBG

DDCCLK_R
DDCDAT_R

VDDC_18

R130 200/F_4

VDDC_18

10 mils

Q13

buffer selection need check with vender check.

OUT

IN

GND

AP2802NTR-G1-01

4

1
2

C246

10p/50V_4

CRTVDD5

C272 *0.1u/16V_4

CRT_R1

CRT_G1

CRT_B1 CRTHSYNC

C258

C252

10p/50V_4

10p/50V_4

6

7
2
8
3
9
4

10

5

CN4

1617

CRT CONN

111

12

13

14

15

DDCDATCRT_GRE

CRTVSYNC

DDCCLK

3

TP42

2

U6

1

OE#

VCC

2

VSYNC CRTVSYNC_R

A

Y

3

GND

M74VHC1GT125DF2G

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

3

+5V

CRT_RED CRT_11

CRT_BLU

C259
R133
75/F_4

R132
75/F_4

10p/50V_4

R134

A A

75/F_4

5

L10 BLM15BB470SN1D(47,300MA)_4

L9 BLM15BB470SN1D(47,300MA)_4

L8 BLM15BB470SN1D(47,300MA)_4

C253

C247

10p/50V_4

10p/50V_4

+5V

C585

5

4

CRT/DP2VGA(IT6516)

CRT/DP2VGA(IT6516)

CRT/DP2VGA(IT6516)

0.1u/16V_4

R121 33_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

CRTVSYNC

ZRZ

ZRZ

ZRZ

1A

1A

19 41Wednesday, March 18, 2015

19 41Wednesday, March 18, 2015

19 41Wednesday, March 18, 2015

1A

5

4

3

2

1

Giga LAN (LAN)

LANVCC

XTAL2

C288 12p/50V_4

1

2

Y1

D D

VDD10

R547 2.49 K/F_4

LANVCC

33

LANVCC

1
2
3
4
5
6
7
8

MDI_0+
MDI_0-

VDD10

MDI_1+
MDI_1­MDI_2+
MDI_2-

VDD10

C C

U12

GND

MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10

MDI_3+
MDI_3-

10 mils

RSET

32

31

30

RSET

AVDD33

AVDD10

RTL8111H-CG

AVDD3311MDIP3(NC)9MDIN3(NC)

12

10

XTAL1

28

CKXTAL229CKXTAL1

CLKREQB

27

LED0

HSIP13HSIN14REFCLK_P15REFCLK_N

25MHZ +30PPM

4

3

C289 12p/50V_4

26

LED225LED1

REGOUT
VDDREG

DVDD10

LANWAKEB

ISOL ATEB

PERSTB

HSON
HSOP

16

PCIE_REQ_LAN#_R

TP13
TP15
TP14

24
23
22
21

PCIE_LAN_WAKE#_R

20

ISOLATEB

19

PERSTB

18

PCIE_RXN0_C

17

PCIE_RXP0_C

CLK_PCIE_LANN [6]
CLK_PCIE_LANP [6]
PCIE_TXN0 [2]

PCIE_TXP0 [2]

REGOUT
LANVCC
VDD10

R166 NIOAC@0_4

C303 0.1U/16V/X7R_4
C305 0.1U/16V/X7R_4

R164 IOAC@0_4

+3V

PCIERST# [5,11,17,21]
IOAC_RST# [21,29]

PCIE_RXN0 [2]

PCIE_RXP0 [2]

Consider VCC33 may be connected to Main
Power or chipset/b ios's GPO, the pull-low
resistor R14 can be NC only when Main Power
or chipset/bi os's GPO can ensure to driv e the
ISOLATEB pin to a voltage level < 0.8V at the
system state S3~S5.
If the ISOLATEB pin can not be well-controlled to
a voltage lev el < 0.8V at S3~S5, the pull -low
resistor R14 is needed to make sure the LAN
chip is well isolated.

For RTL8111H
Place 0.1uF,4.7uF CAP close to each VDD33 pin-- 11, 32

RTL8111H (LDO mode)

REGOUT

R551
1K_4

R163
*15K_4

40 mils (Iout=1A)

C286

0.1u/16V_4

C285

0.1u/16V_4

C293

*4.7U/6.3V_6

C295

*4.7U/6.3V_6

close to each VDD10 pin-- 3, 8, 22, 30

40 mils (Iout=1A) 40 mils (Iout=1A)

R156 *short_8

C294

0.1u/16V_4

C629

0.1u/16V_4

C631

0.1u/16V_4

C627

0.1u/16V_4

C287

0.1u/16V_4

close to each VDD10 pin-- 22
(reserve)

VDD10

C630

C628

*0.1u/16V_4

*1U/6.3V_4

Leakage circuit

+3V+3V

CZL Internal PU 40K
CZ NO

B B

PCIE_REQ_LAN#[5]

3V_S0

EC_PCU LANVCC

IOAC_LAN_W AKE#[29]

PCIE_LAN_WAKE#[5,12,21]

R631 *shortIOAC@0/J_4

APU 3V_S5(Ext PU)

IOAC

A A

+3VPCU

C302

*IOAC@0.1U/16V_4

IOAC_LANPW R#[29]

5

1

R162
*IOAC@100K/J_4

R161
IOAC@10K _4

Q16
IOAC@AO34 13

2

C299

*IOAC@1000p/50V_4

3

+3V_LAN

R158 IOAC@0_8

+3V

R552
CZ@10K/F_4

2

1

*2N7002K

R557 *short_4

2

3

Q44
IOAC@2N7 002K

R550 NIOAC@0/J_4

C298
10u/6.3V_6

3

Q45

LANVCC

1

R553
*10K/F_4

MAIN POWER(3V_S0)

PCIE_REQ_LAN#_R

R538
IOAC@10K /F_4

PCIE_LAN_WAKE#_R

C297

C300

*0.1u/16V_4

0.1u/16V_4

4

LANVCC

R157

NIOAC@0_8

C301
*0.1u/16V_4

Tramsformer

C296

0.01U/50V/X7R_4

+3V_S5

MDI_0+
MDI_0-

MDI_1+
MDI_1-

MDI_2+
MDI_2-

MDI_3+
MDI_3-

RJ45 Connector

U31

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

3

MCT1

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

MX4-

GND

TRANSFOR MER

25

24
23

LAN_MX0+

22

LAN_MX0-

21
20

LAN_MX1+

19

LAN_MX1-

18
17

LAN_MX2+

16

LAN_MX2-

15
14

LAN_MX3+

13

LAN_MX3-

Layout:All termination
signal should have 30
mil trace

TERM0

R529
75/F_8

TERM9

R527

C617

*1M_8

1000P/3KV_1808

2

LAN_MX0+
LAN_MX0­LAN_MX1+
LAN_MX2+
LAN_MX2­LAN_MX1­LAN_MX3+
LAN_MX3-

D31
*BS4200N-C_1812

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

LAN(RTL8111H)

LAN(RTL8111H)

LAN(RTL8111H)

Friday, March 06, 2015

Friday, March 06, 2015

Friday, March 06, 2015

CN9

1
2
3
4
5
6
7
8

LAN_RJ45

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZRZ

ZRZ

ZRZ

9
10

4120

4120

4120

1A

1A

1A

5

4

3

2

1

NGFF_M2 WiFi & BT (NGF)

CN7

1

USBP4+[6]

USBP4-[6]

D D

PCIE_TXP1[2]
PCIE_TXN1[2]

PCIE_RXP1[2]
PCIE_RXN1[2 ]

CLK_PCIE_WLANP[6]
CLK_PCIE_WLANN[6]

C C

CLK_LPC_DEBUG[6]

LPC_LFRAME#[6,23,29]

WAKE_WLAN#

R536 *0_4
R537 *0_4

CLK_LPC_DEBUG_C
LPC_LFRAME#_C

FOR Debug

+3VPCU

B B

IOAC_ WLANPW R#[29]

C282

*IOAC@0.1U/16V_4

R149

IOAC@ 10K_4

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75

1

R151
*IOAC@100K/J_4

NGFF

GND
USB_D+
USB_D­GND
SDIO CLK(O)
SDIO CMDIO)
SDIO DAT0(IO)
SDIO DAT1(IO)
SDIO DAT2(IO)
SDIO DAT3(IO)
SDIO Wake(I)
SDIO Reset
KEY1
KEY2
KEY3
KEY4
GND
PETp0
PETn0
GND
PERp0
PERn0
GND
REFCLKP0
REFCLKN0
GND
CLKREQ0#
PEWake0#
GND
PETp1
PETn1
GND
PERp1
PERn1
GND
Reserved1
Reserved2
GND

WLAN_NGFF CONN

Q15 IOAC@AO3413

2

SUSCLK(32KHz)

NFC I2C SM DATA

NFC I2C SM CLK

3

+3V_WLAN

C277

*IOAC@1000p/50V_4

PCM_CLK

PCM_SYNC

PCM_OUT

UART Wake

UART Rx

UART Tx
UART CTS
UART RTS

Clink RESET

CLink DATA

CLink CLK

PERST0#
W_DISABLE#2
W_DISABLE#1

NFC I2C IRQ

NFC Reset#
RESERVED3
RESERVED4
RESERVED5

+WL_VDD +WL_VDD

2

3.3Vaux

4

3.3Vaux

6

LED#1

8
10
12

PCM_IN

14
16

LED#2

18

GND

20
22
24

Key 5

26

Key 6

28

Key 7

30

Key 8

32
34
36
38
40
42
44

COEX3

46

COEX2

48

COEX1

50
52
54
56
58
60
62
64
66
68
70
72

3.3Vaux

74

3.3Vaux

R138 IOAC@0_8

SUSCLK
WLAN_RST#
BT_ENCLKREQ_WLAN#
RF_EN

A_LAD0_R
A_LAD1_R
A_LAD2_R
A_LAD3_R

+WL_VDD

C261
*10u/6.3V_6

10u/6.3V_6C602

0.1u/16V_4C599

0.1u/16V_4C601

0.1u/16V_4C619

0.1u/16V_4C622

R524 NIOAC@0_4
R525 IOAC@0_4
R526 *0_4

R528 *short_4
R530 *short_4
R534 *short_4
R535 *short_4

C256
*0.1u/16V_4

C257
*0.1u/16V_4

PCIERST# [5,11 ,17,20]
IOAC_ RST# [ 20,29]
PLTRST# [5,23,29 ]

BT_EN [29]
RF_EN [29]

LPC_LAD0 [6,23,29]
LPC_LAD1 [6,23,29]
LPC_LAD2 [6,23,29]
LPC_LAD3 [6,23,29]

+WL_VDD

R139 NIOAC@0_8

C262
*0.1u/16V_4

WIFI card reset (non-IOAC)
WIFI card reset (IOAC)
Debug card reset

+3V

Leakage circuit

PCIE_CLKREQ_WLAN #[5]

IOAC_ WLAN_ WAKE#[29]

PCIE_LAN_WAKE#[5,12,20]

SUS_CLK[5]

APU 3V_S5(Ext PU) +WL_VDD

EC PCU

R144 IOAC@0/J_4

R632 *0/J_4

APU 3V_S5(Ext PU)

+3V

R143

2

*4.7K/J_4

1

Q53

IOAC@ 2N7002 K

R142 NIOAC@0/J_4

+WL_VDD

2

3

Q54
IOAC@ 2N7002 K

+WL_VDD

2

3

Q57

*2N7002K

R667 *0/J_4

+WL_VDD

R137
IOAC@ 4.7K/J_ 4

3

CLKREQ_WLAN#

IOAC 3V_S0APU 3V_S0(Int PU)

R148
IOAC@ 4.7K/J_ 4

1

IOAC 3V_S0

1

WAKE_WLAN#

R668
*10K_4

SUSCLK

C684
*22P/50V_4

Low

High

+1.5VSUS

A A

5

C290

*IOAC@0.1U/16V_4

IOAC_ WLANPW R#

M2 card power enable

M2 card power disable

Q17 *IOAC@AO3413

1

R150
*IOAC@100K/J_4

R159

*IOAC@10K_4

3

+3V_WLAN

2

C291

*IOAC@1000p/50V_4

4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Friday, March 06, 2015

Date: Sheet of

Friday, March 06, 2015

Date: Sheet of

3

2

Friday, March 06, 2015

PROJECT :

NGFF(WiFi&BT combo)

NGFF(WiFi&BT combo)

NGFF(WiFi&BT combo)

1

ZRZ

ZRZ

ZRZ

21 41

21 41

21 41

1A

1A

1A

5

4

3

2

1

Codec(ADO)

HP-R2

HP-L2

LINE1-VREFO-L

LINE1-VREFO-R

MIC2-VREFO

D D

+1.5VA

C440

10u/6.3V_4

ADOGND

Place next to pin 40

Analog

Digital

C C

B B

L17

PVDD

PBY1608 08T-600 Y-N_60_ 3A

Tied at one point only under
the codec or near the codec

R311 *0_4
R268 *0_4
R273 *0_4
R310 *0_4
R247 *0_4
R614 *SHORT_4
C430 *1000p/50V_4

C460 *0.1u/16V_4

ADOGND

Cap need near AVDD1 and AVDD2
power source input

C446

0.1u/16V_4

C432

10u/6.3V_4

C423

10u/6.3V_4

+3V

ADOGND

C448 10u/6.3V_4

+5V_PVDD

C431

0.1u/16V_4

Low is power down
amplifier output

C422

TP19

0.1u/16V_4

R240 *short_6

DMIC_DAT_L

DMIC_CLK_L

L_SPK+

L_SPK-

R_SPK-

R_SPK+

PD#

C413

0.1u/16V_4

C44910u/6.3V_4

C4542.2u/6.3V_4

C4502.2u/6.3V_4

+AZA_VDD

33

34

35

36

CBN

CPVEE

CPVDD

37

CBP

38

AVSS2

39

LDO2-CAP

40

AVDD2

41

PVDD1

42

SPK-L+

43

SPK-L-

44

SPK-R-

45

SPK-R+

46

PVDD2

47

PDB

48

SPDIF-OUT

49

DGND

+AZA_VDD

C406
10u/6.3V_4

R243 *short_4

R242 22_4

C404
10p/50V_4

HP-OUT-R

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

R224 *short_4

DMIC_DAT

DMIC_CLK

DC-DET

32

ALC255-CG

CODEC_VREF

27

28

29

30

31

VREF

HP-OUT-L

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

C403 10u/6.3V_4

ACZ_SDIN

C459 2.2U/6.3V_4

INT_AMIC-VREFO

C458 10u/6.3V_4

R266 100K_4

25

26

U17

AVSS1

AVDD1

LDO1-CAP

MIC2-R/SLEEVE

SPDIFO/FRONT JD

R232 33_4

C412 *22p/50V_4

24

LINE2-L

23

LINE2-R

22

LINE1-L

21

LINE1-R

20

NC

19

MIC-CAP

18

17

MIC2-L/RING2

16

MONO-OUT

15

14

MIC2/LIN2 JD

13

HP/LINE1 JD

12

1.6Vrms

PCBEEP BEEP_1

C399 0.1u/16V_4

ADOGND

ADOGND

C453

0.1u/16V_4

Place next to pin 26

LINE1-L

LINE1-R

R246 *short_6

analog digital

C434 10u/6.3V_4

SLEEVE

RING2

Placement near Audio Codec

R252 200K_4

R248 100K_4

C400
100p/50V_4

PCH_AZ_ CODEC _RST# [5]

PCH_AZ_ CODEC _SYNC [5]

PCH_AZ_ CODEC _SDIN 0 [5]

PCH_AZ_ CODEC _BITC LK [5]

PCH_AZ_ CODEC _SDOUT [ 5]

+5VA

C457

10u/6.3V_4

ADOGND

+3VPCU

R226 22K_4

R228

4.7K_4

DVDD_IO

HP_JD#SENSEA

ADOGND

+3V

D11 1N4148WS

D12 1N4148WS

C409

0.1u/16V_4

R237 *0_4

R238 *short_4

trace width of SLEEVE & RING2
are required at least 40mil and
its length should be asshort as possible

Place next to pin 9

Analog

Digital

C408

10u/6.3V_4

SPKR [5]

PCBEEP_E C [29]

+3V +1.5V

APU 1.5V

DC-DET circuit(ADO)

DC-DET

D-Mic (MIC)

+3V

DMIC_DAT_L

DMIC_CLK_L

R171 *short_4

R170 0_4

DMIC_DAT_L2 DMIC_CS

DMIC_CLK_L2

12

D32*TVS/6pF_4

C620*10p/50V_4

C621*10p/50V_4

R221 *0_4

C281 10u/6.3V_4
C283 0.1u/16V_4
C279 10p/50V_4

U11

6

VDD

5

DATA

4

CLK

KMM47237626-06DT

12

D33*TVS/6pF_4

Single DMIC

DUAL MAIN

+5V

R220
*100K_4

2

DUAL_EN:PU
Single_GND:PD

1

GND/EN

2

CS

3

GND

+15V

1 3

R155
SP@0_4

R154
SP@0_4

R222
*1M_6

Q23
*DTC144EU

+5V

C372
*10u/6.3V_4

+3V

R153
*0_4

R169 *0_4

R152
SP@0_4

CO-LAYOUT

R167 *0_4

1.Single DMIC
NSM0407DT (AL472376000)



SPM0437HD4H (AL000437000)



2.Dual DMIC
NSM0410DT (W/ Fortemedia algorithm)



KMM47237622-10DT(AL472376001)

Main MIC CS need connect to second MIC DATA



DMIC_DAT_L1

HEADPHONE/MIC/LINE combo (ADO)

MIC2-VREFO

LINE1-L

LINE1-VREFO-L

LINE1-VREFO-R

LINE1-R

R283 2.2K/J_4

R309 2.2K/J_4

SLEEVE

RING2

HP-L2

HP-R2 HP-R3

C476 4.7U/6.3V_6

R303 4.7K_4

R289 4.7K_4

C474 4.7U/6.3V_6

R302
*10K/J_4

R282 *short_4

R308 *short_4

R301 62_4

R288 62_4

R287
*10K/J_4

ADOGND

C468

100p/50V_4

C478

100p/50V_4

C477

100p/50V_4

R215 *short_6

3

1

PVDD

Q24
*AO3404

2

Single
PU: only SPM0437HD4H
PD: SPM0437HD4H & NSM0407DT Shared
Dual
PU & PD : NC

+3V

C633 *10u/6.3V_4
C634 *0.1u/16V_4
C632 *10p/50V_4

U10

6

VDD

5

DATA

4

DMIC_CLK_L1

CLK

*NSM0410DT

D4*TVS/6pF_4

12

12

D35*TVS/6pF_4

C310*10p/50V_4

C309*10p/50V_4

DUAL SECOND

SLEEVE_R

RING2_R

HP-L3

HP_JD#

C473

100p/50V_4

12

12

D22

AZ5725-01F.R7G

AZ5725-01F.R7G

D23

12

D41
*AZ5725-01F.R7G

GND/EN

ADOGND

CS

GND

1

+3V

2

3

Combo Jack

CN20

4
3
1

2
5
6 7

2SJ3080-077111F

ADOGND

Mute(ADO)Codec PWR 5V(ADO)

+AZA_VDD +1.5V

R244

R_SPK+
R_SPK­L_SPK­L_SPK+

1K_4

R245
*10K/J_4

R307 *short_6
R306 *short_6
R305 *short_6
R304 *short_6

D19 *RB500V-40

C416
*1u/10V_4

D21 RB500V-40

4 ohm : 40mil for each signal

C483

C484

1000P/50V_4

1000P/50V_4

Place these EMI components next to codec

U18

3

IN

2

GND

1

SHDN

*G923-330T1UF

ANALOG DIGITAL

C435

*10u/6.3V_6

+5VA

ADOGND

C443

*0.1u/16V_4

Internal Speaker

4

4

OUT

5

SET

R259 *29.4K/F_4

R261
*10K/F_4

ADOGND

+5V

A A

C451

*0.1u/16V_4

close pin3

L19 HCB2012KF220T60/6A/22ohm_8

C436

*10u/6.3V_6

R264 *0_4

5

3

C482

1000P/50V_4

3

2

Q25

*PJA138K

1

PCH_AZ_ CODEC _RST#PD#

AMP_MUTE# [29]

R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1

C481

1000P/50V_4

CN21

6
345
2
1

SPK_CONN_4P

Codec PWR 1.5V(ADO)

+1.5V

1U/6.3V_4

2

L22 BLM15AG121SN1D(120,500MA)

C463

ANALOG DIGITAL

+1.5VA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Audio Codec(AL255) / HP / SPK / DMIC

Audio Codec(AL255) / HP / SPK / DMIC

Audio Codec(AL255) / HP / SPK / DMIC

Date: Sheet

Friday, March 06, 2015

Date: Sheet of

Friday, March 06, 2015

Date: Sheet of

Friday, March 06, 2015

PROJECT :

1

ZRZ

ZRZ

ZRZ

1A

1A

1A

of

4122

4122

4122

5

G-sensor (H3D)

4

3

2

1

R160 *shortGS@0_6

D D

ACCEL_INTA[5]

ACCEL_INTA

C278
GS@22P/50V_4

C C

ACCEL_INT2[24]

CLK_SDATA[5,9,10]
CLK_SCLK[5,9,10]

+G_SEN_PW

+G_SEN_PW

CLK_SDATA

CLK_SCLK

R548 *GS@4.7K_4
R545 *GS@4.7K_4

+G_SEN_PW

C292
GS@0.1U/16V_4

R165 *shortGS@0_4
R549 *shortGS@0_4
R546 *shortGS@0_4

+G_SEN_PW

C284
GS@10u/6.3V_6

D3GS@RB500V-40
D43GS@RB500V-40

C626 GS@33P/50V_4

C625 GS@33P/50V_4

G_MBDATA_R
G_MBCLK_R

+3V

ACCEL_INTA_R
ACCEL_INT2_R

G_MBDATA_R
G_MBCLK_R

U9

1

Vdd_IO

14

VDD

11

INT1

9

INT2

7

SA0

6

SDA

4

SCL

8

CS

GS@LIS3DHTR

RESERVED
RESERVED

GND
GND
GND
GND

2

NC

3

NC

10
15

5
12
13
16

TPM (TPM)

TPM_VDD

B B

24

R561

*TPM_N@10K_4

LPC_LAD3[6,21,29]
LPC_LAD2[6,21,29]
LPC_LAD1[6,21,29]
LPC_LAD0[6,21,29]

LPC_LFRAME#[6,21,29]

+3V

R653

*10K/F_4

A A

LPCPD#[6]

SP@10K/F_4

mount : no TPM
DNI : mount TPM

R558

5

SERIRQ[6,29]
PCLK_TPM[6]

LPC_CLKRUN#[6,29]

PLTRST#[5,21,29]

R555 *shortTPM@0_4
R556 *shortTPM@0_4

C637 *T PM_I@10p/50V_4

R559 *shortTPM_N@0_4

D37 TPM@RB500V-40

D36 TPM_N@RB500V-40

SERIRQ_R PLTRST#_R
PCLK_TPM_R

LPC_CLKRUN#_D

PLTRST#_R

LPCPD#_R

4

U32

17

LAD3

20

LAD2/SPI_IRQ

23

LAD1/MOSI

26

LAD0/MISO

22

LFRAME/SCS

27

SERIRQ

21

LCLK/SCLK

15

CLKRUN/GPIO04

16

LRESET/SPI_RST

28

LPCPD

VDD3

R568 TPM_I@0_4
R575 *shortTPM_N@0_4

5

10

19

VSB

VDD1

VDD2

GPX/GPIO2

GPIO1

GPIO0/XOR_OUT

GPIO3/BADD

TEST

NC1
NC2
NC3
NC4

GND2

GND14GND318GND4

TPM@NPCT620/650_TSSOP28

11

25

AL000650K01 :NPCT650AAAWX
AL009655K01 : SNI SLB9655TT1.2

TPM_VDD
TPM_VSB

7

PP

6
2

1
9
8

3
12
13
14

R571 TPM_I@4.7K_4
R570 *TPM_I@4.7K_4
R569 *TPM_I@20K_4

TP45

TP44
R573 TPM_I@0_4
R572 *TPM_N@10K_4

SLB9665 PIN9 NC

3

TPM_VDD

R574 TPM@2.2_6

+3V

C642
TPM@10u/6.3V_6

R577 *TPM_N@0_4

+3VSUS

R578 *shortTPM_N@0_4

+3V_S5

2

C640
TPM@0.1U/16V_4

C645

TPM_N@10u/6.3V_6

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C643
TPM@0.1U/16V_4

TPM_VSB

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

TPM (NPCT650)

TPM (NPCT650)

TPM (NPCT650)

C311
TPM@0.1U/16V_4

C644

TPM_N@0.1U/16V_4

TPM_VDD

C312
TPM@0.1U/16V_4

ZRZ

ZRZ

ZRZ

1A

1A

1A

23 41Wednesday, March 18, 2015

23 41Wednesday, March 18, 2015

23 41Wednesday, March 18, 2015

1

5

4

3

2

1

SATA HDD (HDD)

CN13

23

D D

+5V

R218 *short_8

*100u/6.3V_3528

C C

C365

SATA_TXP0[6]

SATA_TXN0[6 ]

SATA_RXN0[6]

SATA_RXP0[6]

+5V_HDD

ACCEL_INT2[2 3]

R630 *0_4

C377
*0.1u/16V_4

DEVSLP_HDD[6]

+

C381
10u/6.3V_6

C378
*0.1u/16V_4

C4450.01u/50V_4
C4390.01u/50V_4

C4260.01u/50V_4
C4150.01u/50V_4

60mil

C354

0.01u/50V_4

R207 *0_4

SATA_TXP0_C
SATA_TXN0_C

SATA_RXN0_C

SATA_RXP0_C

C355

0.01u/50V_4

GND23

1

GND1

2

RXP

3

RXN

4

GND2

5

TXN

6

TXP

7

GND3

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

RSVD

19

GND

20

12V

21

12V

22

12V

24

GND24

HDD_CONN(on board)

SATA ODD (ODD)

IOAC power

CN6

B B

C185Q2-11311-L

GND14

GND1

RXP
RXN

GND2

TXN

TXP

GND3

+5V
+5V

RSVD

GND
GND

GND15

14

1
2
3
4
5
6
7

8

DP

9
10
11
12
13

15

SATA_TXP1_C
SATA_TXN1_C

SATA_RXN1_C
SATA_RXP1_C
SSD_ID

SATA_DP
+5V_ODD_R

C592

0.01u/50V_4

R129 10K_4

C616 0.01u/50V_4
C615 0.01u/50V_4

C612 0.01u/50V_4
C609 0.01u/50V_4

R628 33_4

R131 10K_4

C604

0.01u/50V_4

C593

*0.1u/16V_4

EC_ODD_EJ [29]

+3V

C245 180P/50V_4

+3V

C603

*0.1u/16V_4

SATA_TXP1 [6]
SATA_TXN1 [6]

SATA_RXN1 [6]
SATA_RXP1 [6]

ODD_PLUGIN# [5]

+3V

C605

10u/6.3V_6

R509

+

C591

*100u/6.3V_3528

*short_8

+5V_ODD

ODD_POWER[29 ]

PCH_ODD_EN[5]

R120 IOAC@0_4

R119 *IOAC@0_4

12

R118
*IOAC@100K_4

ODD_EN

+3VPCU

5

12

R495
IOAC@ 100K_4

ODD_EN_Q

2

4 3

+15V

R481

IOAC@ 100K

6

Q39

IOAC@ 2N7002 DW

1

+5V

+5V_ODD

6
5
2
1

12

4

Q43
IOAC@ AO6402 A

MOD_EN_5V

3

12

C584
IOAC@ 0.1u/25 V_6

ODD_EN_Q

3

2

1

R513 NIOAC@0_8

R510
IOAC@ 22_8

Q41

IOAC@ 2N7002 K

+5V

R662

A A

SSD_ID

R661 10K_4

R665
*0_4

100K_4

if PIN7 not use GPIO function for H:SSD L:ODD need short to GND

5

H:SSD
L:ODD

DEVSLP_ODD [6]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

SATA HDD / ODD

SATA HDD / ODD

SATA HDD / ODD

ZRZ

ZRZ

ZRZ

1A

1A

1A

24 41Friday, March 06, 2015

24 41Friday, March 06, 2015

24 41Friday, March 06, 2015

1

5

USB Charger to 3.0 (UBC)

+5VPCU

80 mils (Iout=2A)

C405

1U/10V_4

USB_OC1#[5]

USB_CHG_MODE[29]

D D

GMT:AL003703000(G3703)_X
TI:AL002544001(TPS2544)
Silergy:AL055544000(SLGC55544VTR)

USB_CHG_EN[29]

USB_CTL1[29]

+5VPCU

R236 100K_4

R233 10K_4
R231 10K_4

CTL2
CTL3

U16

1

IN

9

STATUS

13

FAULT

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2
CTL38DP_OUT

SLGC55544VTR

OUT

ILIM_LO

ILIM_HI

GND_PAD

GND

DM_IN
DP_IN

DM_OUT

12

USB3PWR

15

ILIM_LO

16

ILIM_HI

17

14

11

USBP6-_C

10

USBP6+_C

2
3

4

(RILIM_LO 1.2A)

(RILIM_HI 2.3A)

iPAD charging current is about 2.1A so set on 2.3A

1.2A current limit of USB 3.0 SDP mode

USBP6- [6]
USBP6+ [6]

80 mils (Iout=2A)

R251
20K/F_4

R250
39K/F_4

USBPWR0

+

C407
100u/6.3V_1206

C419
470P/50V_4

3

C418

0.1u/16V_4

2

1

CTL1 CTL2 CTL3 ILIM_SEL

SDP 1 1 1 0

CDP 1 1 1 1

DCP 0 1 1 X

RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:

1. ILIM_SEL is always set high

2. Load Detection - Port Power Management is not used

3. Mouse / Keyboard wake function is not used
If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
RILIM_LO < 80.6 kΩ.
The following equation programs the typical current limit:
(1)
RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.

IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}

USB 3.0 Connector (UB3)

C C

USB30_TX2-[6]
USB30_TX2+[6]

USBP7-[6]

+5V_S5

C369

USBPWR2

R624 *0_4

C368

0.1u/16V_4

C668

0.1u/16V_4

USBPWR1

4

C370
100U/6.3V_1206

USBPWR2

C665
10U/6.3V_6

CN17

1
2
3
4
5
6
7
8
91011

51619-0100N-001

C662

100U/6.3V_1206

12

+3V

R262 *short_6

C352

1u/6.3V_4

USBON#[29]

B B

USB_OC2#[5]

USBON#

USB2.0 DB (UB2) Card Reader (CRD)

1u/6.3V_4
C659

USBON#

USB_OC3#[5]

A A

5

U14

5

IN

OUT

GND

4

/EN

/OC

G524B2T11U

Enable: Low Active /2.5A
BCD:AL002822000
GMT:AL000524007

+5V_S5

U36

5

4

Enable: Low Active /2.5A
BCD:AL002822000
GMT:AL000524007

IN

/EN

G524B2T11U

1

OUT

2

GND

3

/OC

Close USB3.0

1

2

3

470P/50V_4

C670
470P/50V_4

USBP0-[6]

USBP0+[6]

USBP7+[6]

USB30_TX3-[6]
USB30_TX3+[6]

+3V_CR SD_CLK

C455

4.7U/6.3V_6

USBP6-_C

C442 *1.6P/50V_4

USB30_RX2-[6]
USB30_RX2+[6]

C441 *1.6P/50V_4

C421 0.1U/16V/X7R_4
C420 0.1U/16V/X7R_4

C395 *1.6P/50V_4

USB30_RX3-[6]
USB30_RX3+[6]

C385 *1.6P/50V_4

C380 0.1U/16V/X7R_4
C376 0.1U/16V/X7R_4

C461

0.1u/16V_4

3

R267 6.2K/F_4

USBP3-[6]

USBP3+[6]

C456

R265

0.1u/16V_4

*0_4

USB30_TX2-_C
USB30_TX2+_C

USB30_TX3-_C
USB30_TX3+_C

VCC_XD
SDREG

C462
1u/10V_4

C466 1u/10V_4

U20

1

RREF

2

DM

3

DP

4

3V3_IN

5

CARD_3V3

6

SDREG

GND

25

R257 *short_4
R258 *short_4

R263 *short_4
R260 *short_4

R255 *short_4
R254 *short_4

R219 *short_4
R223 *short_4

R229 *short_4
R227 *short_4

R217 *short_4
R216 *short_4

TP23

TP21

TP25

V18XD_CD#

XD_D7

SP14

SD_D2/MS_D5

SD_D3/MS_D4

SP11

24

22

23

V18

SP1119SP1220SP1321SP14

XD_D7

SP10

GPIO0

RTS5170-GRT

SP9
SP8
SP7
SP6

XD_CD#7SP18SP29SP310SP411SP5

12

SD_WP/MS_D1

SP2

SD_D1/MS_D7

SD_D0/MS_D6

SP5

TP22

TP24

TP20

18
17
16
15
14
13

USBP6-_R
USBP6+_RUSBP6+_C

USB30_RX2-_R
USB30_RX2+_R

USB30_TX2-_R
USB30_TX2+_R

C433

*1.6P/50V_4

USBP7-_R
USBP7+_R

USB30_RX3-_R
USB30_RX3+_R

USB30_TX3-_R
USB30_TX3+_R

C379

*1.6P/50V_4

SD_CMDRREF
GPIO0
SP9

SP7
SD_CDZ

USBPWR0

CN15
USB3.0 CONN

1

VBUS

1

2

D-

2

3

D+

3

4

4

GND

5

SSRX-

5

6

6

SSRX+

7

7

GND

8

8

SSTX-

9

SSTX+

9

12

C429

*1.6P/50V_4

USBPWR1

CN12
USB3.0 CONN

1

VBUS

1

2

D-

2

3

D+

3

4

4

GND

5

SSRX-

5

6

6

SSRX+

7

7

GND

8

8

SSTX-

9

SSTX+

9

12

C375

*1.6P/50V_4

SD_WP/MS_D1
SD_CDZ
SD_D2/MS_D5
SD_D1/MS_D7
SD_D0/MS_D6

SD_CLK
VCC_XD

SD_CMD
SD_D3/MS_D4

TP27
TP28

TP26

2

11111010131312

11111010131312

USBPWR0

USB30_TX2-_R

C427

0.1u/16V_4

USBP6-_R

USB30_RX2-_R

USB protection diodes for ESD.

USB protection diodes for ESD.

USB protection diodes for ESD.USB protection diodes for ESD.
as close as possible to USB connector pins.

as close as possible to USB connector pins.

as close as possible to USB connector pins.as close as possible to USB connector pins.

USBPWR1

USB30_TX3-_R

C382

0.1u/16V_4

USBP7-_R

USB30_RX3-_R

reserve for EMI

R286 *short_4

reserve for EMI

C465

4.7u/6.3V_6

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

U19

1

I/O 1

10

USB30_TX2+_R

I/O 6

2

VDD

9

GND_2

3

NC_1

8

NC_2

4

I/O 2

7

USBP6+_R

I/O 5

5

I/O 3

6

USB30_RX2+_R

I/O 4
GND_1

11

USB30_ESD_AZ1065-06F.R7G

U15

1

I/O 1

10

USB30_TX3+_R

I/O 6

2

VDD

9

GND_2

3

NC_1

8

NC_2

4

I/O 2

7

USBP7+_R

I/O 5

5

I/O 3

6

USB30_RX3+_R

I/O 4

GND_1

11

USB30_ESD_AZ1065-06F.R7G

USB protection diodes for ESD.

USB protection diodes for ESD.

USB protection diodes for ESD.USB protection diodes for ESD.
as close as possible to USB connector pins.

as close as possible to USB connector pins.

as close as possible to USB connector pins.as close as possible to USB connector pins.

CN1

11

WP

10

CD

9

DATA2

8

DATA1

7

DATA0

6

VSS2

SD_CLK_R

C464

0.1u/16V_4

USB3/Charger/CR/USB2 DB

USB3/Charger/CR/USB2 DB

USB3/Charger/CR/USB2 DB

5

CLK

4

VDD

3

VSS1

2

CMD

1

CD/DATA3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZRZ

ZRZ

ZRZ

25 41Friday, March 06, 2015

25 41Friday, March 06, 2015

25 41Friday, March 06, 2015

GND

GND12GND

14

13

GND

15

of

NC
NC

SD-CARD

16
17

1A

1A

1A

5

4

3

2

1

LED(UIF)

R313 *1M_4

D D

R314 *1M_4

R312 *1M_4

Power LED

PWRLED#[29 ]

SUSLED#[29]

C C

R318 71.5/F_4

R317 130/F_4

*MLVS0402K11

R316 *1M_4

R315 *1M_4

Battery

BATLED0#[2 9]

BATLED1#[2 9]

R320 71.5/F_4

R319 130/F_4

*MLVS0402K11

D25

D27

12

+3VPCU

12

+3VPCU

+3V

+3VPCU

12

D24
*MLVS0402K11

12

D26
*MLVS0402K11

Blue

2 3

1

Amber

Blue

2 3

1

Amber

LED1

LED2

+3VPCU

+3VPCU

+3VPCU

for ESD

C479

39P/50V_4

Stich cap

+5V

C307

0.1u/25V_4

VIN

C308

0.1u/25V_4

+5V

C373

0.1u/25V_4

C366

0.1u/25V_4

C664

0.1u/25V_4

+3VPCU

C447

0.1u/25V_4

+5V

C469

0.1u/25V_4

C663

0.1u/25V_4

C276

0.1u/25V_4

C452

0.1u/25V_4

+3VPCU +1.5VSUS

C417

0.1u/25V_4

C641

0.1u/25V_4

C658

0.1u/25V_4

VIN

C402

0.1u/25V_4

C608

0.1u/25V_4

C410

0.1u/25V_4

B B

HOLE(OTH)

HOLE2

*HG-TC315BC354D134P2

8
9

A A

67
5
4

123

HOLE1
EV@h-c236I180d1 40p2

1

SPAD1
*spad-zrz-1np

1

HOLE13

*HG-TC315BC354D134P2

8
9

HOLE4
EV@H-C236D1 40P2

SPAD2
*spad-zrz-1np

1

5

123

1

SPAD3
*spad-zrz-1np

1

67
5
4

*HG-ZRZ-8B

8

SPAD4
*spad-zrz-1np

1

HOLE18

123

HOLE3
*CPU

1

SPAD5
*spad-zrz-1np

1

67
5
4

HOLE19

*HG-TC315BC354D134P2

8
9

HOLE8
*CPU

SPAD6
*spad-zrz-1np

1

67
5
4

123

1

SPAD7
*spad-zrz-1np

1

SPAD8
*spad-zrz-1np

1

4

HOLE20

*HG-TC315BC354D134P2

8
9

123

HOLE7
*CPU

1

SPAD9
*spad-zrz-1np

1

67
5
4

HOLE17
*H-C118D118N

HOLE10
*O-ZRZ-10

SPAD10
*spad-zrz-1np

1

1

1

SPAD11
*spad-zrz-1np

1

HOLE15
*h-o138x114d138x114n

1

HOLE9
NGFF_H-C236D142P2

1

SPAD12
*spad-zrz-1np

1

3

HOLE6
*H-ZRZ-1A

1

HOLE21
*H-TC315BC354D217P2

1

HOLE11

*HG-ZRZ-2A

8
9

123

HOLE22
*h-o152x93d152x93n

1

67
5
4

2

HOLE12

*HG-ZRZ-3A

8
9

123

HOLE23

*HG-C256D134P2

8
9

123

HOLE5

*HG-ZRZ-4A

67

8

5

9

4

123

67
5
4

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

HOLE16

67

*O-ZRZ-6

5
4

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

LED/HOLE/EMI

LED/HOLE/EMI

LED/HOLE/EMI

HOLE14
*O-ZRZ-7

1

ZRZ

ZRZ

ZRZ

26 41Friday, March 06, 2015

26 41Friday, March 06, 2015

26 41Friday, March 06, 2015

1

1A

1A

1A

5

4

3

2

1

I2C translator (TPD)

U34 CZL@MCU_65211-24LTXI

C646 CZL@1U/10V_4

I2C_P WR

D D

C C

+3V_S5
+3V

R586 *CZL@0_4
R585 CZL@0_4

I2C_P WR

C651

CZL@4.7U/6.3V_6

I2C_IN T#

R582 CZL@2.2K_4
R583 CZL@2.2K_4

I2C_S CL
I2C_S DA

12

24

C650

CZL@0.1u/16V_4

18

20
21
22
23

VCCD

VDDD

GPIO_0

4

GPIO_8

5

GPIO_9

6

GPIO_10

1

SCB_0_GPIO_6
SCB_0_GPIO_2
SCB_0_GPIO_3
SCB_0_GPIO_4
SCB_0_GPIO_5

2

SCB_0_GPIO_7

CY7C65211-24TXI

SUSPEND

TOUCH PAD(TPD)

VDD_18

I2C_P WR+3V

I2C_P WR

+3V

R269
CZ@10K_4

APU_I2C_INT#[5]

B B

A A

I2C_IN T#

5

R270
CZL@10K_4

R271 CZ@0_4

R272 CZL@0_4

R285
CZ@0_4

1

TPCLK[29]

TPDATA[29]

R279
CZL@0_4

2

2N7002K

R278*0_4

Q30

TP_PWR

R284
10K_4

3

I2C_IN T#_TP

TP_PWR

R299

10K_4

4

+3V_S5
+3VSUS

R296

10K_4

R292 *short_4
R293 *short_4

*10p/50V_4

R616 *short_4
R617 *0_4

C470

I2C_S CL_TP[5]

1.8V_S0 +3V_S5

I2C_S DA_TP[5]

PTP_PWR_EN #[29]

C472

*10p/50V_4

C661

*0.1u/16V_4

TPD_INT#[29]

TPD_EN[29]

4 3

1

CZ@PJT138K

R622 *0_4

Q52

1

2

R621

10K/J_4

I2C_D A
I2C_C L

I2C_S DA_TP_ R
I2C_S CL_TP_ R
I2C_IN T#_TP

3

3

VSSD1

13

VSSD2

16

VSSD3

17

VSSA

25

EPAD

15

VBUS

10

USBDP

11

USBDM

7

GPIO_11

19

GPIO_1

8
9

WAKEUP

14

XRES

Q29

5

2

6

3

AO3413

+

C667
*1000p/50V_4

R298 CZL@0_4
R291 CZL@0_4

R297 CZ@0_4
R290 CZ@0_4
R294 *short_4

R280
CZ@2.2K_4

C666

0.22u/25V_6

TP_PWR

R281
CZ@2.2K_4

I2C_S CL_TP_ R

I2C_S DA_TP_ R

C669

0.1u/16V_4

C648

CZL@4.7U/6.3V_6

USBP1+ [6]
USBP1- [6]

TP_PWR

TPCLK_CN
TPDATA_CN

CLK_SDATA_R
CLK_SCLK_R

TP_PWR I2C_ PWR

R579
*CZL@0_4

C647
CZL@0.1u/16V_4

PTP_PWR_EN #

TP CONN

8
7
6
5
4
3
219

10

CN16

2

R580
CZL@0_4

R277
CZL@2.2K_4

I2C_D A

VIN

R619
*1M_6

R623
*1M_6

1

TP_PWR

R276
CZL@2.2K_4

C467
CZL@150P/50V_4

2

ZRZ

ZRZ

ZRZ

27 41Wednesday, March 18, 2015

27 41Wednesday, March 18, 2015

27 41Wednesday, March 18, 2015

TP_PWR

3

1

R618
*22_8

I2C_P WR

Q28

5

Q49

4 3

1

CZL@2N7002KDW

R275 *CZL@0_4
R274 *CZL@0_4

+3V

R620
*10K_4

2

1 3

Q50

*DTC144EU

I2C translator/TP

I2C translator/TP

I2C translator/TP

2

6

1 3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

I2C_S CL I2C_CL

I2C_S DA

2

*DTC144EU

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Q51
*2N7002K

1A

1A

1A

5

4

3

2

1

KEYBOARD (KBC)

CN18

1
2
3
4
5
6

KB CONN

7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

29
30

D D

C C

MX0
MX1
MX2
MX3
MX4
MX5
MX6

MX7
MY17
MY16
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0

R663 33_4

12

D42
*AZ5725

C683
180P/50V_4

NBSWON#

MX0 [29]
MX1 [29]
MX2 [29]
MX3 [29]
MX4 [29]
MX5 [29]
MX6 [29]

MX7 [29]
MY17 [2 9]
MY16 [2 9]
MY15 [2 9]
MY14 [2 9]
MY13 [2 9]
MY12 [2 9]
MY11 [2 9]
MY10 [2 9]
MY9 [29 ]
MY8 [29 ]
MY7 [29 ]
MY6 [29 ]
MY5 [29 ]
MY4 [29 ]
MY3 [29 ]
MY2 [29 ]
MY1 [29 ]
MY0 [29 ]
NBSWON# [29]

+3VPCU

R295
10K_4

C475

0.1u/16V_4

<EMI>

1

MX4
MX5
MX6
MX7
MY3
MY2
MY1
MY0
MY7
MY6
MY5
MY4
MY11
MY10
MY9
MY8
MX0
MX1
MX2
MX3
MY15
MY14
MY13
MY12

SW2

1

POWER_SW

5

6

2

3

4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8

CP1
*220P_8P4R

CP6
*220P_8P4R

CP5
*220P_8P4R

CP4
*220P_8P4R

CP2
*220P_8P4R

CP3
*220P_8P4R

5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7

3
42

+3VPCU

MX7
MX6
MX5
MX4

10

RP1

9
8
7 4

*10K_10P8R

1

MX0

2

MX1

3

MX2
MX3

56

CPU FAN CTRL(THM)

+5V

C618

2.2u/6.3V_4

1 2

THERM_ALERT#[4]

CPUFAN#[29 ]

R669 0_4

FANPWR = 1.6*VSET

U30

VIN2VO

GND

1

/FON

GND
GND

4

VSET

GND

APL5606AKI-TRG

+3V

R501

10K_4

FANSIG[29]

3
5
6
7
8

TH_FAN_POWERTH_FAN_POWER

C600

2.2u/6.3V_4

1 2

C598

0.01u/50V_4

30mils

C594

0.01u/50V_4

CN5

1
2
345

FAN_3P

B B

KB_BL LED (KBL)

+5V +5V

C523 *KBL@2.2u/16V_6

R381
KBL@10K/J_4

A A

KB_BL_LED[29]

2

Q35

KBL@DTC144 EUA

5

1 3

1

Q36

2

KBL@AO3413

3

C532

KBL@4.7u/6.3V_6

R393 *shortKBL@0_4

C536

KBL@0.01u/50V_4

4

20mil20mil

CN3

+5V_KB_R+5V_KB

1
2

5

346

KBL@KB_backl ight

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

KB/FAN

KB/FAN

KB/FAN

PROJECT :

ZRZ

ZRZ

ZRZ

1A

1A

1A

28 41Wednesday, March 18, 2015

28 41Wednesday, March 18, 2015

28 41Wednesday, March 18, 2015

1

5

EC(KBC)

R591 2.2_6

1 2

+3VPCU

D D

Layout put in device side

R600 *10K_4
R599 *10K_4

+3VPCU

D40

R606

RB500V-40

100K_4

1 2

WRST#

C655
1u/6.3V_4

Layout put in device side

R322 33_4

C678
180P/50V_4

R625 33_4

C676 180P/50V_4

R598 CZL@0_4
R601 CZL@0_4
R213 CZL@0_4
R214 CZL@0_4

EC_SPI_SCK

R587 CZ@0_4

EC_SPI_CS0#

R590 CZ@0_4

EC_SPI_SDI

R589 CZ@0_4

EC_SPI_SDO

R588 CZ@0_4

SPI_SDI_UR
SPI_SDO_UR

CLK_PCI_775

R611

*22_4

C656
*10p/50V_4

TOUCHPANEL_ON[17]

C C

EC_ODD_EJ[24]

SPI_SCK[6]
SPI_CS[6]

SPI_SDI[6]

SPI_SDO[6]

Please do not place any
pull-up resistor
on GPG0, GPG2, and GPG6
(Reserved
hardware strapping).

B B

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

PCH/VGA

N/A

SM Bus 3

SM Bus 4

N/A

Power sequence

NBSWON#

DNBSWON#

SUSON

SUSB#

PWROK_EC

A A

PLTRST#

HWPG

MAINON

PCH_RSMRST#

S5_ON

TP51

TP47

TP55

TP54

TP67

TP66

TP18

TP58

TP50

TP56

5

L16 BLM15AG121SN1D(120,500MA)_4

12 mils

C654

C652

0.1u/16V_4

0.1u/16V_4

LPC_LAD0[6,21,23]
LPC_LAD1[6,21,23]
LPC_LAD2[6,21,23]
LPC_LAD3[6,21,23]

PLTRST#[5,21,23]

CLK_PCI_775[6]

LPC_LFRAME#[6,21,23]

SIO_A20GATE[5]

SERIRQ[6,23]

SIO_EXT_SMI#[5]

SIO_EXT_SCI#[5]

KBRST#[5]

IOAC_WLAN_WAKE#[21]

KB_BL_LED[28]

DNBSWON#[5]

SUSB#[5]

PWROK_EC[5]

APU_DISP_BLEN[4,17]

IOAC_LAN_WAKE#[20]

AMP_MUTE#[22]

ODD_POWER[24]

ACIN[30]

TEMP_MBAT[30]

IOAC_WLANPWR#[21]

PCBEEP_EC[22]

AC_PROTECT[30]

MY16[28]
MY17[28]

S5_ON[31,32,36]

PTP_PWR_EN#[27]

MY0[28]
MY1[28]
MY2[28]
MY3[28]
MY4[28]
MY5[28]
MY6[28]
MY7[28]
MY8[28]

MY9[28]
MY10[28]
MY11[28]
MY12[28]
MY13[28]
MY14[28]
MY15[28]

Battery B/I SW (SYP)

C371

0.1u/16V_4

R239 2.2_6

+3V

PROCHOT_EC

R604 *short_4

R612 0_4

C396

0.1u/16V_4

1 2

TP60

TP48

TP53

SPI_SCK_UR_R
SPI_CS0#_UR
SPI_SDI_UR
SPI_SDO_UR

CPU_ID

C411

0.1u/16V_4

ECAGND

4

+A3VPCU +3VPCU_ECPLL

D/C#[30]

+3VPCU_EC

C424

C660

0.1u/16V_4

0.1u/16V_4

+3V_EC

C657

0.1u/16V_4

10

9
8

7
22
13

6

17

126

5
15
23
14

4
16

113
123

80

119

33
88
81
87

109
108

71
72
73
35
34

122

95
94

105
101
102
103

56
57
32

100
125

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

MX0[28]
MX1[28]
MX2[28]
MX3[28]
MX4[28]
MX5[28]
MX6[28]
MX7[28]

11

114

121

3

74

U35

LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)

LPCPD#/WUI6/GPE6(Dn)

GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up)
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO /SMCLK2ALT/GPC7(Up)/SMCLK2ALT

CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)

DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/ GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/G PF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)

ADC5/DCD1#/W UI29/GPI5(X)
ADC6/DSR1#/W UI30/GPI6(X)
ADC7/CTS1#/W UI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7( Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5

KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(U p)

SSCE0#/GPG2(X)
SSCE1#/GPG0(X)

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15

4

106

VCC

GPH7

VSTBY26VSTBY50VSTBY92VSTBY

AVCC

VSTBY

VCC

VSTBY

VSTBY_FSPI

VCC
VSTBY

VSTBY
VCC

VSTBY

LPC

VSTBY
VSTBY
VSTBY

IT8987E/BX

CIR

VSTBY

VSTBY

UART port

EXTERNAL SERIAL FLASH

SPI ENABLE

VSTBY

KBMX

KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7

65

BI[30]

3

Vgs = 1.5V

2

PJA138K
Q55

1

L11 BLM15AG121SN1D(120,500MA)_4

C653

0.1u/16V_4

127

84

82

19

VSTBY

EGAD/WUI25/GPE1(Dn)

EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)

VSTBY

VSTBY

(For PLL Power)

TP59

TP64
TP65

20

97

93

WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)

L80LLAT/WUI7/GPE7(Up)

VSTBY VSTBY

L80HLAT/BAO/WUI24/GP E0(Dn)

GPIO

WAKE UP

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

VSS

VSS27VSS

VSS

1

49

91

L15 BLM15AG121SN1D(120,500MA)_4

12

C672
*0.1u/25V_6

VCORE

VSS

AVSS

12

75

104

C401

0.1u/16V_4

ECAGND

+3VRTC

12

R640
100K_4

BI_GATE

SW1

42

3

BI_SW

6

5

1

R613 *8.2K

SMCLK0/GPB3(X)

SMDAT0/GPB4(X)

SMCLK1/GPC1(X)

VSTBY

SMDAT1/GPC2(X)

PECI/SMCLK2/WUI22/GPF 6(Up)

SMDAT2/WUI23/G PF7(Up)

PS2CLK0/TMB0/CEC/GPF 0(Up)

PS2DAT0/TMB1/GPF 1(Up)

SM BUS

PS2CLK2/WUI20/G PF4(Up)

PS2DAT2/W UI21/GPF5(Up)

CLKRUN#/WUI16/GPH0/ID0(Dn)

PS/2

PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)

PWM

TACH0A/GPD6(Dn)

TACH1A/TMA1/GPD7(Dn)

TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)

PWRSW /GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)

ADC4/WUI28/G PI4(X)

A/D D/A

AVCC

TACH2/GPJ0(X)

DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)

+3VRTC +3VPCU

R641
*0_4

R643
*10K_4

C671
*0.1u/16V_4

5

Q56

*PJ4N3KDW

3

+3VPCU_EC

SB_ACDC [30]

BT_EN [21]

USBON# [25]

USB_CHG_MODE [25]
USB_CHG_EN [25]
LPC_CLKRUN# [6,23]

+3V

ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)

GPJ1(X)

GPJ7
GPJ6

IT8987E/BX

R642
*0_4

2

4 3

3

Layout put in device side

R658 33_4

110
111
115
116
117

TP49

118

R660 33_4

C682 180P/50V_4

85
86
89
90

24
25
28
29
30
31

47
48

TP68

120
124

TP52

107
18
21

HWPG

112

Layout put in device side

R635 33_4

C675 180P/50V_4

66
67

C428 10u/6.3V_6

68
69
70

76

TP63

77

TP62

78

TP61

79

2

TP57

128

R300 33_4

C471
180P/50V_4

Layout put in device side

WRST#

Vgs = 1.5V

6

1

C674
180P/50V_4

TPD_EN [27]

2ND_MBCLK [4,12]

2ND_MBDATA [4,12]

LID591# [17]

IOAC_RST# [20,21]
EC_FPBACK# [17]
TPCLK [27]
TPDATA [27]

Layout put in device side

MAINON [33,36]
USB_CTL1 [25]

NBSWON# [28]

ECAGND

MBCLK [30]
MBDATA [30]

PWRLED# [26]
BATLED1# [26]
SUSLED# [26]
BATLED0# [26]

FANSIG [28]

SUSON [31,33]

SUSC# [5]

PCH_RSMRST# [ 5]

RF_EN [21]

ICMNT [30]

DGPU_AC_DC# [12]
VRON [5,34]
IOAC_LANPWR# [20]

CPUFAN# [28]

TPD_INT# [27]

2

S5_ON

SIO_EXT_SMI#
SIO_EXT_SCI#

SIO_A20GATE
KBRST#
SERIRQ

SUSON
MAINON
VRON
PLTRST#
PCH_RSMRST#
CPU_ID

R602 10K_4

R610 *10K_4
R607 *10K_4

R592 *10K_4
R603 10K_4
R605 *10K_4

R593 100K_4
R253 100K_4
R249 100K_4
R608 100K_4
R584 *10K_4
R615 *SP@0_4

SM BUS PU(KBC)

MBCLK
MBDATA

2ND_MBCLK
2ND_MBDATA

3

Q48

PROCHOT_EC

SPI NOR FLASH(128KB) (KBC)

+3VPCU

R565
CZ@10K_4

R581
CZ@10K_4

2

R609

100K_4

+3VPCU

25mA

EC_SPI_WP#

EC_SPI_HOLD#

2N7002K

1

U33

8

VCC

3

WP#

SPI_HOLD7GND

CZ@W25X10CLSNIG

HWPG(KBC)

HWPG_0.775VS5[36]

HWPG_1.8VS5[36]

VRM_PWRGD[34]

HWPG_VDDR[33]

HWPG_0.95VS5[32]

SYS_HWPG[31]

GFX_PWRGD[35]

R256 CZ@100K/F_4

+3V

VDDGFX_PD[5]

2

1

2

3

2

Q26

CZ@2N7002K

1

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R597 4.7K_4
R596 4.7K_4

R595 4.7K_4
R594 4.7K_4

SPI_SI

SPI_SO

CS#

SPI_SCK

D14 *1N4148WS

D16 *1N4148WS

D17 1N4148WS

D13 *1N4148WS

D15 *1N4148WS

D18 *1N4148WS

3

D20 *CZ@1N4148WS

Q27
CZ@2N7002K

C437
CZ@0.22U/10V_4

1

+3VPCU

+3V_S5

+3V

ITE suggest PCH_RSMRST#
PD

CPU_ID:CZ Internal PU, CZL External
PD

+3VPCU

Change EC SMBus PU voltage from
+3V_GFX to +3V_S5 due to it also

+3V_S5

connect to CPU(SIC/SID) and GPU.

EC need read CPU temperature even
in UMA mode or GPU off mode

CORE_PWM_PROCHOT# [4,30,34,35]

+3VPCU

5

EC_SPI_SDI

2

EC_SPI_SDO

1

EC_SPI_CS0#

6

EC_SPI_SCK

4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

EC (ITE8987E/BX)

EC (ITE8987E/BX)

EC (ITE8987E/BX)

C649
*CZ@10P/50V_4

+3V

R241

10K_4

HWPG

ZRZ

ZRZ

ZRZ

1

R566
CZ@10K_4

29 41Friday, March 06, 2015

29 41Friday, March 06, 2015

29 41Friday, March 06, 2015

HWPG [5]

1A

1A

1A

5

4

3

2

1

VA2

PD1

SV1040

1

52

2

4

PR151
*SHORT_4

24737_REGN

PR9
*SHORT_6

24737_BST

24737_DH

24737_LX

24737_DL

PR3
10_6

PR4

7.5_6

24737_SRP

PC105

0.1u/25V_4

24737_SRN

Check with HW side

+3V

PR156

*100K_4

3

2

PQ27
2N7002K

1

PC1
1u/16V_4

PD2
RB500V-40

PC8
47n/50V_6

PC106

0.1u/25V_4

VA1

PC12

0.1u/50V_6

PD7
1N4148WS

recommend 200mA at least.

+3VPCU

PR1 10K_4

PR26 10K_4

PR6 316K/F_4

PR152

*100K_4 PR15 9

3

24737_BM#

2

PQ24
*2N7002K

1

UMA-45W

DIS-65W

PR158
10K/F_4

PR155
20_1206

MBDATA

PR8 *SHORT_4

MBCLK

PR7 *SHORT_4

PR153

100K/F_4

0.01u/50V_4

ICMNT[29]

PD8
P4SMAFJ20A

2 1

PR13

63.4K/F_4

24737_ACDET

24737_VCC

PC117

0.47u/25V_6

24737_BM#

24737_CMPOUT

24737_ILIM

24737_CMPIN

100K/F_4

R2

PC107

R1

R1 R2

CS35102FB04

115K 100K

CS41152FB08

PC2

0.1u/50V_6

0.1u/50V_6

6

20

5

8

9

11

3

10

4

100K51K

PC115

ACDET

VCC

ACOK#

SDA

SCL

BM#

CMPOUT

ILIM

CMPIN

PR160
SP@51K/F_4

IOUT

7

PC112
100p/50V_4

2

PR5
220K_4

PR2
220K_4

PC118

0.1u/50V_6

ACP

PU1

BQ24737RGRR

GND

GND22GND24GND23GND

21

24737_CMPOUT

AC_Protect[29]

1 6

2

3

1

ACN

25

PJ2

1
2
3
4

D D

C C

ACIN[29]

ACPRESENT[5]

SB_ACDC[29]

B B

PJ1

89
7
6
5
4
3
2
1

10

50458-00801-v02-8p-l

*47p/50V_4

A A

Power conn

PC10

0.1u/50V_6

+3VPCU

PR22
*10K_4

PR23

PR27
*SHORT_4

PC5

0.1u/50V_6

PC3

*100p/50V_4

PR18
100_4

PC7

2 1

PD4

PDZ5.6B

*0_4

BAT-V

BI [29]

if no external switch control=> stuff
if has external switch control=> DNI

PR20
*0_4

TEMP_MBAT

PC9

*47p/50V_4

MBCLK [29]

MBDATA [29]

PR25
1M_4

2 1

PD3
PDZ5.6B

PR24
100_4

PR19
100_4

6

1

PR15
100K_4

2

PC119

2200p/50V_6

5

4 3

TEMP_MBAT [29]

+3VPCU

PR21
100K_4

PQ5
2N7002DW

PQ2

IMD2AT108

24737_ACP

24737_ACN

PC116

0.1u/50V_6

REGN

BTST

HIDRV

PHASE

LCDRV

PGND

SRP

SRN

PR161

*0_4

1

3

PR157

*SHORT_4

PQ3
AOL1413

5

4

16

17

18

19

15

14

13

12

For BATT Only

5

4

3

PR16

0.02/F_0612

3

1 2

D/C# [29]

52

PQ26

AON7410

4

3

1

52

PQ25

AON7410

PC110

0.1u/25V_4

PC111

0.1u/25V_4

CORE_PWM_PROCHOT# [4,29,34,35]

4

3

1

PU to +3V_GFX in GPU side

3

24737_CMPOUT

2

PQ69
*EV@2N7002K

1

2

PR17
*SHORT_4

24737_ACN

24737_ACP

PR14
*SHORT_4

PR12
*4.7_6

PC6
*680p/50V_6

GPU_THROTTING# [12]

PC113

2200p/50V_6

PL1

6.8uH_7X7X3

1

3

PR10
33K/F_4

PQ1
2N7002K

PC4

2200p/50V_6

PQ4
AOL1413

2

4

PR11
10K_4

3

1

PC108

10U/25V_8

52

BAT-V

PC109

10U/25V_8

PC11

0.1u/50V_6

VIN

24737_SRP

24737_SRN

VIN

PC114

10u/25V_8

PR149
*SHORT_4

PC13

2200p/50V_6

PR154

0.01/F_0612

1 2

PR150
*SHORT_4

SRP／／／／SRN

4-Cells Others

bq24707A

bq24737

0／／／／010／／／／7.5

10／／／／7.5 10／／／／7.5

REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit

Pin10 ILIM=0.793V
Rsr = 0.01ohm

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Charger (BQ24737RGRR)

Charger (BQ24737RGRR)

Charger (BQ24737RGRR)

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

1

30 41Friday, March 06, 2015

30 41Friday, March 06, 2015

30 41Friday, March 06, 2015

34

1A

1A

1A

5

4

3

2

1

MAIND

VIN

D D

+5VPCU

PC229

C C

B B

220u/6.3V_6X4.2

OCP:12A

L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
Iocp=12-(3.3 67/2)=10.316A
Vth=(10.316A*14.5mOhm)+1mV=150.589mV
R(Ilim)=(150.589mV*8)/10uA
~120.47K

12

+

PC214

33u/25V_6x4.5

+5VPCU
5 Volt +/- 5%
TDC : 7.9A
PEAK : 10.5A
OCP : 12A
Width : 320mil

+

PC228

0.1u/50V_6

MAIND [32,33,36]

PR282

15.8K/F_4

PR121
10K/F_4

PC222

10u/25V_8

2.2uH_7X7X3

+15V

PL14

PR289
*4.7_6

PC98

0.1u/50V_6

SYS_SHDN#

PC220

2200p/50V_4

PC223

*680p/50V_6

PR276
22_8

1

1

+15V_ALWP

52

52

PD5
1PS302

PD9
1PS302

3

3

2

1

2

1

SYS_SHDN# [12,36]

SYS_HWPG[2 9]

SYS_SHDN#

PQ55

AON7410

4

4

PQ54

AON7752

3

3

PC211

0.1u/50V_6

PC217

0.1u/50V_6

0.1u/50V_6

PC100

PR279
*SHORT_4

PR288

1/F_6

PC213

0.1u/50V_6

PR284
*SHORT_4

51225_EN1

51225_DH1

51225_VBST1

51225_SW1

51225_DL1

51225_FB1

+3VPCU

PR285
*100K/F_4

7

20

16

17

18

15

2

14

PR286
*SHORT_6

PGOOD

EN1

DRVH1

VBST1

SW1

DRVL1

VFB1

VO1

VL

PC221 10u/6.3V_6

13

TPS51225RUKR

VCLK

19

51225_CS1

51225_VCLK

PR125 120K/F_4

VREG5

CS11CS2

PU11

5

51225_CS2

PR123 100K/F_4

PR131
*SHORT_6

3V_LDO

51225_VIN

12

VIN

26

PR281
10K/F_4

PC101 0.1u/25V_4

PC99 4.7u/6.3V_6

3

6

SYS_SHDN#

EN2

VREG3

10

SW2

VFB2

GND

GND

9

8

11

4

21

22

51225_DH2

51225_VBST2

51225_SW2

51225_DL2

51225_FB2

DRVH2

VBST2

DRVL2

GND23GND24GND25GND

PR126
*SHORT_6

OCP:9A

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.355M*9)
~2.676A
Iocp=9-(2.67 6/2)=7.661A
Vth=(7.661A*14.5mOhm)+1mV=112.098mV
R(Ilim)=(112.098mV*8)/10uA
=89.68K

PR287

1/F_6

AON7410

PC215

0.1u/50V_6

AON7752

PQ53

PQ52

2200p/50V_4

52

4

3

1

52

PC224

+3VPCU

4

3

PR290
*4.7_6

52

1

TDC : 1.9A
PEAK : 2.5A
Width : 80mil

4

3

1

*680p/50V_6

MAIND S5D

+3VSUS

PC216

PL13

2.2uH_7X7X3

PQ58

MDV1528Q

+15VVIN

PC218

10u/25V_8

+3VPCU

3.3 Volt +/- 5%
TDC : 5.2A
PEAK : 6.9A
OCP : 9A
Width : 220mil

PR280

6.49K/F_4

PC227

0.1u/50V_6

PR122
10K/F_4

+3VPCU

2

+3V +3V_S5

VIN +3VPCU

VIN

+3VPCU

PC226

220u/6.3V_6X4.2

3

PQ57
AO3404

1

TDC : 0.31A
PEAK : 0.42A
Width : 20mil

+

PR142
22_8

PQ21
2N7002K

VDD_18_S5

3

2

1

+5V_S5+3V_S5

PR145
1M_6

S5_ON[29,32,36]

A A

2

PQ18

DTC144EU

1 3

5

PR146
1M_6

PR141
22_8

PQ20
2N7002K

3

2

1

3

2

1

PR147
22_8

PQ22
2N7002K

4

+15VVIN

2

3

1

PR144
1M_6

PQ19

2N7002K

VIN

*2200p/50V_4

PR143
*1M_6

S5D

PC104

+5VPCU

52

4

3

PQ60

MDV1528Q

1

+5V_S5

TDC : 3A
PEAK : 4A
Width : 120mil

MAIND

4

3

+5VPCU

52

PQ65

MDV1528Q

3

1

TDC : 3.5A
PEAK : 4.6A
Width : 150mil

2

PR298
*TP@1M_6

3

PQ68

*TP@2N7002K

1

PR299
*TP@1M_6

SUSD

PC231

*TP@2.2n/50V_4

3

2

PQ56
*TP@AO3404

1

TDC : 0.038A
PEAK : 0.05A
Width : 20mil

+3VSUS

PR297
*TP@1M_6

SUSON[29,33]

+5V

2

PQ66

*TP@DTC144EU

PR296

1 3

*TP@1M_6

PR295
*TP@22_8

3

2

PQ67
*TP@2N7002K

1

+3VSUS power for touch pad (By acer request)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SYSTEM 5V/3V (TPS51225)

SYSTEM 5V/3V (TPS51225)

SYSTEM 5V/3V (TPS51225)

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

1

1A

1A

31 41Friday, March 06, 2015

31 41Friday, March 06, 2015

31 41Friday, March 06, 2015

1A

5

D D

+3V

PR268

100K/F_4

HWPG_0.95VS5[29]

S5_ON[29,31,36]

C C

PR119
*SHORT_4

PR118

*100K/F_4

PR117

120K/F_4

PR116
470K/F_4

OCP=11A
L ripple current
=(19-0.95)*0.95/(1u*290k*19)

B B

=3.112A
Vtrip=[11-(3.112/2)]*14.5mohm
=136.937mV
Rlimit=136.937mV/10uA*8=109.55Kohm

1

3

2

5

12

4

PGOOD

EN

TRIP

RT8237CZQW(2)

TST

GND

GND13GND14GND15GND

7

PU6

+5VPCU

V5IN

16

PC201
1u/10V_4

9

DRVH

10

VBST

8

SW

6

DRVL

11

GND

FB

4

VFB=0.7V

VDDP_0.95V_S5

5

51211V_DRVH

51211V_VBST

51211V_SW

51211V_DRVL

51211V_FB

PR114
*SHORT_6

3

PQ45

AON7410

4

PC92

0.1u/50V_6

4

PQ47

AON7752

RDSon=14.5mohm

2

VIN

PC198

2200p/50V_4

52

3

1

52

AMD requirements
FOR CZ: set to 1.05V (PR265_1k ohm:CS21002FB24)
FOR CZL: set to 0.95V (PR265_0 ohm :CS00002JB38)

DDR-2133:+1.05V
DDR-1866:+0.95V

PL11

1uH_7X7X3

PR115
*4.7_6

PR265

SP@1K/F_4

PC199

10u/25V_8

*0.1u/50V_6

PC202

PC203

0.1u/50V_6

+

PC200

330u/2.5V_6X4.2

1

VDDP_0.95V_S5

VDDP_0.95V_S5

3

1

PC91

*680p/50V_6

PR267

3.65K/F_4

10K/F_4

PR269

PR266
0_4

PR270
*100_4

PR272
*0_4

0.95 Volt +/- 5%
TDC : 7.125A
PEAK : 9.5A
OCP : 11A
Width : 280mil

APU_VDDP_RUN_FB_H [4]

APU_VDDP_RUN_FB_L [4]

4

MAIND[3 1,33,36]

A A

5

MAIND

4

213

PQ10
AON6752

VDDP_0.95V

+0.95V
TDC : 6.38A
PEAK : 8.5A
Width : 260mil

3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

VDDP_0.95V_S5 (RT8237CZQW)

VDDP_0.95V_S5 (RT8237CZQW)

VDDP_0.95V_S5 (RT8237CZQW)

PROJECT :

32 41Friday, March 06, 2015

32 41Friday, March 06, 2015

32 41Friday, March 06, 2015

1

1A

1A

1A

5

4

3

2

1

TDC : 0.68A
PEAK : 1A

+SMDDR_VTT

Width : 40mil

PC94

D D

TDC : 0.34A
PEAK : 0.5A

+SMDDR_VREF

10u/6.3V_6

PC93

10u/6.3V_6

Width : 20mil

PC206

0.22u/10V_4

+3V

PC96

12

14

15

13

11

10

10u/6.3V_6

51216_DRVH

51216_VBST

51216_SW

51216_DRVL

2

3

1

4

5

21

20

PGOOD

17

S3

16

S5

19

MODE

18

TRIP

26

PAD

51216_REF

PR273

8.45K/F_4

22

PAD

PAD

6

VTTREF

VTTGND

PU7

G5316RZ1D

VDDQSNS

REFIN8REF

51216_REFIN

PAD

9

25

VTT

VTTSNS

PAD

24

VLDOIN

V5IN

DRVH

VBST

SW

DRVL

PGND

GND

PAD

7

23

PR275
*SHORT_6

PR127

100K/F_4

C C

HWPG_VDDR[2 9]

MAINON[29,36]

SUSON[29 ,31]

PR130 *SHORT_4

PR129 *SHORT_4

PR277 200K/F_4

PR278 130K/F_4

51216_S3

51216_S5

51216_MODE

51216_TRIP

VREF=1.8V

B B

PR124

*0_4

51216_S551216_S3

PC207

0.1u/16V_4

PR128
1/F_6

+5V_S5

Greater than or equal 40mil

PC209
1u/10V_4

PQ51

AON7410

4

PC97

0.1u/50V_6

PQ50

AON7752

3

4

3

RDSon=14.5mohm

VIN

52

1

52

1

PC210

2200p/50V_4

1uH_7X7X3

PR120
*4.7_6

PC95
*680p/50V_6

*0.1u/50V_6

PL12

PC212

PC205

10u/25V_8

PR283
*SHORT_4

PC219

0.1u/50V_6

+

PC225

330u/2.5V_6X4.2

+1.5VSUS

+1.5VSUS

1.5 Volt +/- 5%
TDC : 8.5125A
PEAK : 11.35A
OCP : 13A
Width : 340mil

+1.5VSUS

3

PR274

51K/F_4

PC208

0.01u/50V_4

Mode Frequency Discharge mode

MAIND[3 1,32,36]

200K 400K Tracking Discharge

OCP=13A
L ripple current
=(19-1.5)*1.5/(1u*400k*19)
=3.453A

A A

Vtrip=13-(3.453/2)*14.5mohm
=0.16346V
Rlimit=0.16346V/10uA*8~130.77Kohm

5

4

100K 300K Tracking Discharge

S3 S5

S0

S3 (mainon off)

S4/S5

1

0

1

1

3

ON

ON ON

OFF

VTTREF+1.5VSUS

ON ON

OFF

OFF OFF00

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

DDR3 1.5V (G5316RZ1D)

DDR3 1.5V (G5316RZ1D)

DDR3 1.5V (G5316RZ1D)

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

2

1

TDC : 0.79A
PEAK : 1.05A
Width : 40mil

33 41Friday, March 06, 2015

33 41Friday, March 06, 2015

33 41Friday, March 06, 2015

1

PQ59
AO3404

+1.5V

1A

1A

1A

5

VDDCR_NB

PC14
PR52
10_4

PR53

APU_VDDNB_RUN_FB_H[4]

D D

C C

62771_EN

PR168
*100K/F_4

B B

A A

Place NTC close to the
VDDNB Hot-Spot.
OCP=100' C

APU_VDD_RUN_FB_H[4]

APU_VDD_RUN_FB_L[4]

Parallel

*SHORT_4

Close to the
CPU side.

VRM_PWRGD[29]

APU_SVC[4]

CORE_PWM_PROCHOT#[4,29,30,35]

APU_SVD[4]

VDD_18

APU_SVT[4]

VRON[5,29]

APU_PWRGD_SVID_REG[4,35]

PR193

PR197

27.4K/F_4

470K_4_4700NTC

PR200

10K/F_4

Place NTC close to the
VDDCORE Hot-Spot.
OCP=100' C

PR204

10_4
PR209
*SHORT_4

PR210
*SHORT_4

PR205

10_4

PR196

27.4K/F_4

PR201

10K/F_4

VDDCR_CPU

PR194

470K_4_4700NTC

5

330p/50V_4

PR174

41.2K/F_4

+3V

PR177
10K/F_4

VRM_PWRGD

PR30 *SHORT_4

PR164 *SHORT_4

PR31 *SHORT_4

PR162 *SHORT_4

PR28 *SHORT_4

PR163 *SHORT_4

PR29 *SHORT_4

PR166

133K/F_4

PR180

*0_4

PC127

330p/50V_4

PC131

0.01u/50V_4

Close to the
GPU side.

PC123

1000p/50V_4

PR44
*SHORT_4

1000p/50V_4

PC128

680p/50V_4

PC132
390p/50V_4

62771_SVC

62771_VRHOT

62771_SVD

62771_VDDIO

62771_SVT

62771_EN

62771_PWROK

NTC_NB

NTC

IMON_NB

IMON

PR167

133K/F_4

PC134

680p/50V_4

Load line setting

PC15

PC16

220p/50V_4

35

20

11

10

PC124

62771_COMP

PC17
220p/50V_4

PC138
390p/50V_4

PR179

2K/F_4

PC130
1000p/50V_4

Load line setting

62771_FB_NB

62771_COMP_NB

3

4

5

6

7

8

9

1

2

1000p/50V_4

4

PR39

1.54K/F_4

PR41
300_4

PR171
2K/F_4

PR173
133K/F_4

36

COMP_NB

PGOOD_NB

PGOOD

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

NTC_NB

NTC

IMON_NB

IMON

19

PR181
133K/F_4

PR176
300_4

PR175

2.49K/F_4

+VDDCR_NB
TDC : 12A
PEAK : 17A
OCP : 22A
Width : mil
Load Line = -4mV/A

4

37

FB_NB

FB18COMP

62771_FB

PR183
1/F_6

62771_VSEN_NB

PC136 1u/ 10V_4

38

VSEN_NB

ISL62771HRTZ-TS2775

VSEN16RTN

17

62771_VSEN

62771_RTN

+5V_S5

25

PU2

PC137 1u/ 10V_4

40

26

VDD

VDDP

15

ISUMN

PR42

576/F_4

OCP

AMD CZ 35W

+VDDCR_CPU
TDC : 39A
PEAK : 55A
OCP : 68A
Width : mil
Load Line = -2.1mV/A

3

PR47

BOOT_NB

RC time
constant

PC125

PC122

47n/16V_4

PR34

422/F_4

0.1u/16V_4

PR169

OCP

ISUMN_NB

39

ISUMP_NB

ISUMN_NB

34

EP

RC time
constant

33

32

31

30

29

28

27

24

23

22

21

41

PC18

47n/16V_4

PC121

0.22u/25V_6

PC126

0.22u/25V_6

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

BOOT_2

UGATE_2

PHASE_2

LGATE_2

LGATE_1

PHASE_1

UGATE_1

BOOT_1

Add 9 GND VIAs
for thermal pad

PR40

2.61K/F_4

PR43

11K/F_4

PR191
10K/F_4_3435NTC

PC133

0.1u/16V_4

+VDDCR_GFX
TDC : 30A
PEAK : 45A
OCP : 56A
Width : mil
Load Line = -2.1mV/A

3

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

ISEN212ISEN113ISUMP14ISUMN

PC19

0.15u/10V_4

11K/F_4

ISEN2

VSUM-

ISEN1

VSUM+

VSUM-

VSUMG+

PR35

2.61K/F_4

Close with
PHASE_NB inductor

PR199
10K/F_4_3435NTC

VSUMG-

PC129

0.1u/16V_4

Close with
phase1 inductor

UGATE_NB

PHASE_NB

LGATE_NB

BOOT_2

UGATE_2

PHASE_2

LGATE_2

BOOT_1

UGATE_1

PHASE_1

LGATE_1

2.2/F_6

PC20

0.22u/25V_6

PR48

2.2/F_6

PC22

0.22u/25V_6

PR45

2.2/F_6

PC21

0.22u/25V_6

1

8

VSUMG+

VSUMG-

1

8

VSUM+

ISEN2

VSUM-

1

8

VSUM+

ISEN1

VSUM-

2

2

D1D1D1

G1

S1/D2

9

G2

S2S2S2

PQ33

AON6970

567

PR165 3.65K/F_4

PR170 1/F_4

2

D1D1D1

G1

S1/D2

9

G2

PQ31

AON6970

S2S2S2

567

PR37 3.65K/F_6

PR33 10K/F_4

PR46 1/F_4

2

D1D1D1

G1

S1/D2

9

G2

S2S2S2

PQ29

AON6970

567

PR38 3.65K/F_6

PR172 10K/F_4

PR178 1/F_4

2

PHASE_NB

PHASE_2

VIN

PHASE_1

1

VIN

PC28

PC143

PC145

10u/25V_8

0.1u/50V_6

PL5

0.36uH_7X7X4

1 2

3

PR51

2.2_6

PC31

1000p/50V_6

PC24

10u/25V_8

0.1u/50V_6

PC140

PL4

0.36uH_10X10X4

1 2

3

PR195

2.2_6

PC146

1000p/50V_6

PC142

10u/25V_8

0.1u/50V_6

PC141

PL3

0.36uH_10X10X4

1 2

3

PR187

2.2_6

PC144

1000p/50V_6

PC25

10u/25V_8

2200p/50V_4

DCR=1.4mOhm

4

PC40

0.1u/16V_4

PC29

PC23

10u/25V_8

2200p/50V_4

+

PC41

10u/6.3V_6

+

PC37

PC151

330u/2V_7343

*330u/2V_7343

VDDCR_NB
TDC : 12.75A
PEAK : 17A
OCP : 22A
Width : 500mil
Load Line = -4mV/A

VIN

12

+

PC120

33u/25V_6x4.5

DCR=1.1mOhm

4

0.1u/16V_4

PC150

PR36
*10K/F_4

PC27

10u/25V_8

+

+

PC39

PC38

330u/2V_7343

PC32

10u/6.3V_6

ISEN1

PC26

2200p/50V_4

*330u/2V_7343

VDDCR_CPU
TDC : 39A
PEAK : 55A
OCP : 68A
Width : 1560mil
Load Line = -2.1mV/A

DCR=1.1mOhm

4

PC33

0.1u/16V_4

10u/6.3V_6

PC153

PR32
*10K/F_4

ISEN2

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

VDD / VDDNB CORE (SL62771HRTZ) 1A

VDD / VDDNB CORE (SL62771HRTZ) 1A

VDD / VDDNB CORE (SL62771HRTZ) 1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

+

PC152

330u/2V_7343

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

VDDCR_NB

VDDCR_CPU

34 41Friday, March 06, 2015

34 41Friday, March 06, 2015

34 41Friday, March 06, 2015

VDDCR_CPU

5

4

3

2

1

CZ@

+5V_S5

D D

PC58

CZ@1u/10V_4

+3V

PR228
CZ@10K/F_4

35

PGOOD_NB

NTC_NB_GFX

NTC_GFX

IMON_ NB_G FX

IMON_ GFX

PR226

CZ@133K/F_4

PC177

20

PGOOD

3

SVC

4

VR_HOT_L

5

SVD

6

VDDIO

7

SVT

8

ENABLE

9

PWROK

1

NTC_NB

11

NTC

2

IMON_NB

10

IMON

PC172

CZ@1000p/50V_4

62771_COMP_GFX

PC69
CZ@220p/50V_4

PC68
CZ@390p/50V_4

PR229

CZ@2K/F_4

PC180

CZ@1000p/50V_4

Load line setting

PR78
CZ@133K/F_4

PR234
CZ@300_4

PR232
CZ@2.1K/F_4

PR255

CZ@27.4K/F_4

CZ@470K_4_4700NTC

PR256

CZ@10K/F_4

VDDCR _GFX

PR85
CZ@10_4

PR90
CZ@10_4

Close to the
GPU side.

GFX_PWRGD

PR64 *SHORT_4

PR65 *SHORT_4

PR66 *SHORT_4

PR68 *SHORT_4

PR72 *SHORT_4

PR74 *SHORT_4

PR75 *SHORT_4

PR224

CZ@100K/F_4

PR227

*CZ@0_4

PC169
CZ@330p/50V_4

PC168

CZ@0.01u/50V_4

62771_SVC_GFX

62771_VRHOT_GFX

62771_SVD_GFX

62771_VDDIO_GFX

62771_SVT_GFX

62771_EN_GFX

62771_PWROK_GFX

PC166

*CZ@0.1u/16V_4

CZ@680p/50V_4

GFX_PWRGD[29]

GFX_SVC[4]

C C

62771_EN_GFX

PR225
*CZ@100K/F_4

B B

APU_VDD GFX_RUN _FB_H[4]

APU_VDD GFX_RUN _FB_L[4]

A A

CORE_PWM_PROCHOT#[4,2 9,30,34]

APU_PW RGD_S VID_REG[4,34]

PR220

CZ@100K/F_4

Place NTC close to the
VDDNB Hot-Spot.
OCP=100'C

GFX_SVD[4]

VDD_18

GFX_SVT[4]

VDDGFX_E N[5]

PR218

PR247

CZ@100K/F_4

PR223

CZ@100K/F_4

Place NTC close to the
VDDCORE Hot-Spot.
OCP=100'C

PR86
*SHORT_4

PR89
*SHORT_4

Parallel

5

38

37

36

FB_NB

VSEN_NB

COMP_NB

CZ@ISL62771HRTZ-TS2775

VSEN16RTN

FB18COMP

19

17

62771_VSEN_GFX

62771_RTN_GFX

62771_FB_GFX

4

PR67

PR73

*SHORT_6

CZ@1/F_6

PC50

CZ@1u/10V_4

40

PR77

CZ@487/F_4

OCP

39

PR63

ISUMP_NB

ISUMN_NB

34

33

32

31

30

29

28

27

24

23

22

21

41

PC178

CZ@0.22u/25V_6

PC179

CZ@0.22u/25V_6

PC75

CZ@47n/16V_4

PR222 CZ@10K/F_4

PR221 CZ@10K/F_4

PR219 *SHORT_4

BOOT_GFX2

UGATE_GFX2

PHASE_GFX2

LGATE_GFX2

LGATE_GFX1

PHASE_GFX1

UGATE_GFX1

BOOT_GFX1

Add 9 GND VIAs
for thermal pad

PR84

CZ@2.61K/F_4

PR79

PR248

CZ@11K/F_4

CZ@10K/F_4_3435NTC

PC74
CZ@0.1u/16V_4

3

ISEN2 _GFX

VSUM-_ GFX

ISEN1 _GFX

VSUM+_ GFX

VSUM-_ GFX

+5V_S5

Close with
phase1 inductor

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

ISEN212ISEN113ISUMP14ISUMN

PC76

CZ@0.15u/10V_4

EP

RC time
constant

BOOT_GFX2

UGATE_GFX2

PHASE_GFX2

LGATE_GFX2

BOOT_GFX1

UGATE_GFX1

PHASE_GFX1

LGATE_GFX1

CZ@2.2/F_6

PC48

CZ@0.22u/25V_6

VSUM+_ GFX

ISEN2 _GFX

VSUM-_ GFX

PR76
CZ@2.2/F_6

PC59

CZ@0.22u/25V_6

VSUM+_ GFX

ISEN1 _GFX

VSUM-_ GFX

2

D1D1D1

G1

1

S1/D2

9

8

G2

S2S2S2

567

PR88 CZ@3.65K/F_6

PR93 CZ@10K/F_4

PR237 CZ@1/F_4

2

D1D1D1

G1

1

S1/D2

9

8

G2

CZ@AON6970

S2S2S2

567

PR238 CZ@3.65K/F_6

PR235 CZ@10K/F_4

PR236 CZ@1/F_4

2

PC185

PHASE_GFX2

PQ43

CZ@AON6970

VIN

PC60

PHASE_GFX1

PQ44

PC83

PC82

CZ@10u/25V_8

CZ@0.1u/50V_6

CZ@0.1u/50V_6

CZ@0.24uH_7X7X4

1 2

PR71

CZ@2.2_6

PC54

CZ@1000p/50V_6

PC61

CZ@10u/25V_8

CZ@0.24uH_7X7X4

1 2

PR97

CZ@2.2_6

PC85

CZ@1000p/50V_6

PL8

3

PL9

3

PC183

CZ@10u/25V_8

CZ@2200p/50V_4

DCR=1.1mOhm

4

+

PC66

PC55

PC187

CZ@10u/6.3V_6

CZ@0.1u/16V_4

PR231
*CZ@10K/F_4

ISEN1 _GFX

PC62

PC170

CZ@10u/25V_8

CZ@2200p/50V_4

DCR=1.1mOhm

4

+

PC164

PC81

PC163

CZ@10u/6.3V_6

CZ@0.1u/16V_4

PR230
*CZ@10K/F_4

ISEN2 _GFX

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

VDD / VDDNB CORE (SL62771HRTZ) 1A

VDD / VDDNB CORE (SL62771HRTZ) 1A

VDD / VDDNB CORE (SL62771HRTZ) 1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

VIN

VDDCR _GFX

+

PC174

CZ@330u/2V_7343

VDDCR_GFX
TDC : 30A
PEAK : 45A
OCP : 56A
Width : 1200mil
Load Line = -2.1mV/A

+

PC77

CZ@330u/2V_7343

*CZ@330u/2V_7343

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

35 41Friday, March 06, 2015

35 41Friday, March 06, 2015

35 41Friday, March 06, 2015

*CZ@330u/2.5V_6X4.2

VDDCR _GFX

26

25

VDD

VDDP

PU4

15

ISUMN_GFX

5

4

3

2

VIN

PD6
DA2J10100L

1

D D

PL10

1

PR58
CZ@56/F_4

PR59
CZ@100/F_4

*2200P/50V_4

1uH_7X7X3

PC190

PR262

*22P/50V_4

*2.2_6

PC197

PC56
CZ@10u/6.3V_8

Rg

Vout = (1+Rg/Rh )*0.5

Rh

PR259

R1

20K/F_4

R2

PR260
10K/F_4

PC52
CZ@10u/6.3V_8

9

PVIN

10

PC90

0.01U/50V_4

+3V

PR111
100K/F_4

HWPG_1.8VS 5[29]

S5_ON[29,31,32]

C C

B B

A A

HWPG_0.775 VS5[29]

S5_ON 554EN_1.8V

PR69

CZ@100K_4

S5_ON

PC196

10U/6.3V_6

PR112
*SHORT_4

PR113
*SHORT_4

PC49

CZ@0.1u/16V_4

PR61
*SHORT_4

PR261
10_6

PC194

1U/6.3V_4

+5VPCU+3V

*CZ@0.1u/16V_4

PU3
CZ@G9336TB1U

1

VCC

3

PGD

EN4FB

PC46

PVIN

8

SVIN

RT8068AZQW

4

PG

5

EN

GND

11

PC192

*0.1u/16V_4

VDDP_0.95V_S5 VDDCR_FCH_S5

DRV

GND

2

JP6
*SHORT_8

6

5

*68P/50V_4

PC64
CZ@10u/6.3V_8

PU10

PC191

NC

LX

LX

FB

NC

7

3

PC63
CZ@0.1u/16V_4

PR70
CZ@47/F_4

PC53

CZ@33n/25V_4

1

2

3

6

554LX_1.8V

554FB_1.8V554PG_1.8V

Vo=0.6*(R1+R2)/ R2

PQ9
CZ@AO3404

2

VDD_18_S5+3VPCU

PC193

0.1u/16V_4

22U/6.3V_6

VDD_18_S5

1.8 Volt +/- 5%
TDC : 2.055A
PEAK : 2.74A
Width : 80mil

JP4
*SHORT_8

VDDCR_FCH_S5

0.775 Volt +/- 5%
TDC : 0.15A
PEAK : 0.2A
Width : 20mil

PC195

MAIND

VDD_18_S5

3

2

1

TDC : 1.13A
PEAK : 1.5A
Width : 60mil

PQ62
AO3404

VDD_18

PR134
1M_6

1

PQ12
AO3409

2

1 3

PU8A
AS393MTR-E1

PU8B
AS393MTR-E1

1

7

3

PC102

0.1u/50V_6

PR132
*SHORT_6

PR139
200K_6

PC103

0.1u/50V_6

SYS_SHDN# [12,31]

3

2

PQ13
2N7002K

1

S5_ON

2

10K/F_4_3435NTC

3

PQ15
2N7002K

1

PR233

PR136

1.54K/F_4

VLVL

S5_ON

PR137
200K/F_4

2.469V

PR138
200K/F_4

2

PQ14

DTC144EU

84

3

+

2

-

5

+

6

-

For EC control thermal protection (output 3.3V)

VIN

PR133
1M_4

PQ64
DTC144EU

PR294
1M_4

MAINON[29,33]

2

PR291
*100K/F_6

1 3

PR135
22_8

3

2

1

PQ17
2N7002K

3

2

1

PR148
220_8

PQ23
2N7002K

VDD_18

PR140
22_8

3

2

2

PQ16
2N7002K

1

VDDP_0.95V+1.5V

PR293
22_8

3

2

PQ61
2N7002K

1

+15V+5V+3V

PR292

PR110

1M_4

22_8

MAINDMAINON_ON_G

PQ11
2N7002K

3

2

PQ63
2N7002K

1

3

1

PC230
*2200p/50V_4

MAIND [31,32,33]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+1.8V/Thermal

+1.8V/Thermal

+1.8V/Thermal

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

1A

1A

36 41Wednesday, March 18, 2015

36 41Wednesday, March 18, 2015

36 41Wednesday, March 18, 2015

1A

5

4

3

2

1

Interface SVI2

+5V_S5

PR80
*SHORT_6

PC71

EV@1u/10V_4

PR82

40

PR98

EV@634/F_4

OCP

39

ISUMP_NB

ISUMN_NB

34

33

32

31

30

BOOT_GPU2

29

UGATE_GPU2

28

PHASE_GPU2

27

LGATE_GPU2

24

LGATE_GPU1

23

PHASE_GPU1

22

UGATE_GPU1

21

BOOT_GPU1

41

PC88

EV@0.22u/25V_6

PC87

EV@0.22u/25V_6

PC181

EV@47n/16V_4

PR242 EV@10K/F _4

PR241 EV@10K/F _4

PR91 *SHO RT_4

Add 9 GND VIAs
for thermal pad

ISEN2_GPU

VSUM-_GPU

ISEN1_GPU

VSUM+_GPU

PR239

EV@2.61K/F_4

PR243

EV@11K/F_4

PR211
EV@10K/F_4_3435NTC

VSUM-_GPU

PC86
EV@0.1u/16V_4

3

+5V_S5

Close with
phase1 inductor

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

ISEN212ISEN113ISUMP14ISUMN

PC182

EV@0.1u/16V_4

EP

RC time
constant

26

25

VDD

VDDP

PU5

15

17

ISUMN_GPU

62771_RTN_GPU

BOOT_GPU2

EV@0.22u/25V_6

UGATE_GPU2

PHASE_GPU2

LGATE_GPU2

BOOT_GPU1

UGATE_GPU1

PHASE_GPU1

LGATE_GPU1

EV@2.2/F_6

PC72

PR83

EV@2.2/F_6

PC73

EV@0.22u/25V_6

EV@1u/10V_4

COMP_NB

4

PC70

38

37

FB_NB

VSEN_NB

VSEN16RTN

FB18COMP

62771_VSEN_GPU

62771_FB_GPU

PR81

EV@1/F_6

EV@ISL62771HRTZ-T S2775

D D

35

PGOOD_NB

20

PGOOD

3

SVC

4

VR_HOT _L

5

SVD

6

VDDIO

7

SVT

8

ENABLE

9

PWROK

1

NTC_NB

11

NTC

2

IMON_ NB

10

IMON

EV@1000p/50V_4

Load line setting

36

19

PR96

EV@47.5K/F_4

PR95

EV@2K/F_4

PR92

EV@300_4

+3V_GFX

PR87
EV@10K/F_4

GPU_PG_EN[38]

PR254

EV@100K/F_4

PC186

EV@330p/50V_4

PC184

EV@0.01u/50V_4

62771_SVC_GPU

62771_VRHOT_GPU

62771_SVD_GPU

62771_VDDIO_GPU

62771_VDDIO_GPU

62771_SVT_GPU

62771_EN_GPU

62771_PWROK_GPU

NTC_NB_GPU

NTC_GPU

IMON_NB_G PU

IMON_GPU

PR251

PC189

*EV@0.1u/16V_4

PR240
*EV@0_4

EV@680p/50V_4

EV@1000p/50V_4

PC188

EV@133K/F_4

62771_COMP_GPU

PC80 EV@220p/ 50V_4

PC79

EV@390p/50V_4

PC78

PC84

PR94 EV@1. 2K/F_4

GPU_SVC_R[12]

C C

Meso/Exo Option

62771_EN_GPU

PR250
EV@100K/F_4

B B

A A

GPUVDDC_SENSE[14]

GPUVSS_SENSE[14]

GPU_PWM_PROCHOT#[12]

0.95_GFX_EN[38]

PR253

EV@100K/F_4

Place NTC close to the
VDDNB Hot-Spot.
OCP=100'C

GPU_SVD_R[12]

+1.8V_GFX

+3V_GFX[11,12,14,38]

GPU_SVT_R[12]

GPU_PG_EN

PR252

PR245

EV@100K/F_4

EV@100K/F_4

PR57
*SHORT_4

PR56
*SHORT_4

Parallel

5

PR109 *SHO RT_4

PR107 *SHO RT_4

PR108 *SHO RT_4

PR106 EV@0_4
PR105 *EV@0_4

PR104 *SHO RT_4

PR103 *SHO RT_4

PR102 *SHO RT_4
PC89 EV@0.1u/ 16V_4

PR216

PR215

EV@27.4K/F_4

EV@470K_4_4700NTC

PR214

EV@10K/F_4

Place NTC close to the
VDDCORE Hot-Spot.
OCP=100'C

+VGPU_CORE

PR207

EV@10_4

PR208

EV@10_4

Close to the
GPU side.

Meso XT - 25W Exo XT - 25W

TDC : 36A
PEAK : 54A
OCP : 67A
Width : 1440mil
Load Line = -1mV/A

5

4

213

5

4

213

VSUM+_GPU

PR249 EV@3.65K/ F_6

ISEN2_GPU

PR258 EV@10K/F _4

VSUM-_GPU

PR99 EV@1/F _4

5

4

213

5

4

213

VSUM+_GPU

PR246 EV@3.65K/ F_6

ISEN1_GPU

PR244 EV@10K/F _4

VSUM-_GPU

PR100 EV@1/F_ 4

PQ42

EV@AON6414AL

PQ41

EV@AON6752

VIN

PQ40

EV@AON6414AL

PQ39

EV@AON6752

2

PC171

PC167

EV@0.1u/50V_6

PC173

PC176

EV@0.1u/50V_6

TDC : 30A
PEAK : 45A
OCP : 67A
Width : 1200mil
Load Line = -1mV/A

PC57

EV@10u/25V_8

EV@10u/25V_8

PL7

EV@0.24uH_7X7X4

1 2

3

4

PR60

EV@2.2_6

PC47

EV@1000p/50V_6

PC65

EV@10u/25V_8

EV@10u/25V_8

PL6

EV@0.24uH_7X7X4

1 2

3

4

PR62

EV@2.2_6

PC51

EV@1000p/50V_6

DCR=1mOhm

PC154

PR257
*EV@10K/F_4

DCR=1.1mOhm

PC155

PR101
*EV@10K/F_4

VIN

12

+

PC175

EV@2200p/50V_4

PC157

EV@10u/6.3V_6

EV@0.1u/16V_4

ISEN1_GPU

PC67

EV@2200p/50V_4

PC156

EV@0.1u/16V_4

EV@10u/6.3V_6

ISEN2_GPU

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PC165

EV@33U/25V_6x4.5

+

+

PC45

PC160

EV@330u/2V_7343

*EV@330u/2.5V_6X4.2

+

+

PC44

PC159

EV@330u/2V_7343

*EV@330u/2V_7343

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+VGPU CORE (SL62771HRTZ)

+VGPU CORE (SL62771HRTZ)

+VGPU CORE (SL62771HRTZ)

1

+VGPU_CORE

+VGPU_CORE

37 41Friday, March 06, 2015

37 41Friday, March 06, 2015

37 41Friday, March 06, 2015

1A

1A

1A

5

4

3

2

1

+3VPCU +PCIE_VDDC_GFX

VDDP_0.95V_S5

+0.95V

PU9 EV@RT8068AZQW

9

D D

PC36

EV@0.01U/50V_4

+3V_GFX

EV@10U/6.3V_6
PR198
EV@100K/F_4

0.95_GFX_EN[37]

+3V_GFX

C C

+3V +3V_GFX

+3V

CZ : DNI
CZL: mount

DGPU_PWREN[5]

PR212

EV_SP@10K/F_4

PR213

EV_SP@100K/F_6

PR217 EV_SP@20K/F_4

PR192
*SHORT_4

PR49
*SHORT_4

PC161

*EV@0.1u/16V_4

R428 EV@100K_4

PC162
EV_SP@0.22U/10V_4

EV@10_6

PC149

EV@1U/6.3V_4

554EN_0.95V

PQ37

EV@AO3413

1

2

PR203

PC34

PC30

*EV@0.1u/16V_4

2

3

PQ38

EV@2N7002K

1

PVIN

10

PVIN

8

SVIN

4

PG

5

EN

GND

11

TDC : 0.02A
PEAK : 0.025A
Width : 20mil

3

PC158

EV@0.1u/16V_4

1

NC

2

LX

3

LX

6

FB

NC

7

PC35

*EV@68P/50V_4

GPU_PG_EN[37]

554LX_0.95V

PR190

*EV@2.2_6

PC147

*EV@2200P/50V_4

554FB_0.95V554PG_0.95V

V0=0.6*(R1+R2)/R2

EV@1uH_7X7X3

3

2

1

PL2

PC148

*EV@22P/50V_4

PQ46

EV@2N7002K

R1

R2

VIN

PR202
EV@6.49K/F_4

PR50
EV@11K/F_4

PR263
EV@1M_4

PR264
EV@1M_4

PC139
EV@0.1u/16V_4

+15V

3

2

1

PR271
EV@1M_4

EV@2N7002K

0.95 Volt +/- 5%
TDC : 1.5A
PEAK : 2A
Width : 60mil

PC135
EV@22U/6.3V_6

1.5GFXD

PQ48

+1.5VSUS

4

PC204

*EV@2200p/50V_4

TDC : 2.58A
PEAK : 3.44A

52

3

1.8GFXD

EV@MDV1528Q

1

PQ49

+1.5V_GFX

52

4

3

1

+0.95V

0.95 Volt +/- 5%
TDC : 1.5A
PEAK : 2A
Width : 60mil

+3V +3V_GFX

PQ6

*EV@MDV1528Q

+PCIE_VDDC_GFX

Width : 80mil

B B

A A

CZ : 20K (CS32002FB29)
CZL: 10K (CS31002FB26)

0.95_GFX_EN

2

3

PQ35

EV@2N7002K

1

CZ : 0.22uF(CH4222K9B04)
CZL: 0.1uF (CH4103K1B08)

PR184

EV@1M_4

PR185

EV@1M_4

2

PR189
EV@22_8

3

PQ34

EV@2N7002K

1

2

+1.8V_GFX+3V_GFX

PR206
EV@22_8

3

PQ36

EV@2N7002K

1

2

+1.5V_GFXVIN

3

1

PR182
EV@22_8

PQ28

EV@2N7002K

2

+15V

PR54
EV@1M_4

3

EV@2N7002K

1

PQ7

1.8GFXD

PC43

EV@2200p/50V_4

VDD_18_S5

3

2

PQ8

EV@AO3404

1

+1.8V_GFX

TDC : 0.38A
PEAK : 0.5A
Width : 20mil

+1.5V_GFX

PR186
EV@10K/F_4

2

PQ30
EV@DTC144EU

1 3

2

PR188
EV@10K/F_4

3

PQ32

EV@2N7002K

1

PE_PWRGD [5]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

GPU_POWER/VDDC_GFX

GPU_POWER/VDDC_GFX

GPU_POWER/VDDC_GFX

1

1A

1A

38 41Friday, March 06, 2015

38 41Friday, March 06, 2015

38 41Friday, March 06, 2015

1A

5

4

3

2

1

+5V_S5

VDDCR_FCH_S5VDD_18_S5

R672

D D

APU_S5_MUX_CTRL[5]

C C

+3V_S5 VIN

R366
*SHORT_4

CZ@100K_4

2

Q7

CZ@2N7002K

*CZ@0_4

R42

CZ@1M_6

3

1

R670

R671
CZ@0_4

3

2

Q10

CZ@2N7002K

1

R62
CZ@100K_4

VDDCR_NB

FCH_PC

C125
*CZ@0.1u/16V_4

COMP_OUT1

R361
*SHORT_4R360

R363
*SHORT_4

R61
*SHORT_4

R380
*SHORT_4

CZ@0_4 Q6

R367

*CZ@0_4

R379

*CZ@0_4

VIN

R673

*CZ@0_4 Q33

84

3

+

2

-

5

+

6

-

+5V_S5

1

U26A
CZ@AS393MTR-E1

+5V_S5 VDDCR_FCH_ S5

7

U26B
CZ@AS393MTR-E1

VDDCR_NB

3

R41
CZ@1K_4

COMP_OUT1

3

R60
CZ@1K_4 C685

CZ@AO3416

C83

2

*CZ@0.1u/16V_4

Q34
CZ@AO3416

C124

2

*CZ@0.1u/16V_4

CZ@AO3416

2

2

3

Q9
CZ@AO3416

3

1

1

1

1

0.775~1.2 Volt +/- 5%
TDC : 0.15A
PEAK : 0.2A
Width : 20mil

C128

CZ@22u/6.3V_6

CZ@22u/6.3V_6

VDDCR_FCH_ALW

PR55
*SHORT_6

C122

CZ@0.1u/16V_4

VDDCR_FCH_ALW

B B

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

VDDCR_FCH_ALW

VDDCR_FCH_ALW

VDDCR_FCH_ALW

PROJECT :

1A

1A

1A

39 41Friday, March 06, 2015

39 41Friday, March 06, 2015

39 41Friday, March 06, 2015

1

5

D D

C C

4

3

2

1

B B

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Power tree

Power tree

Power tree

PROJECT :

1A

1A

1A

40 41Friday, March 06, 2015

40 41Friday, March 06, 2015

40 41Friday, March 06, 2015

1