5
4
3
2
1
BOM
ZRQ_GDDR3 SHB ULT SYSTEM BLOCK DIAGRAM
Dual Channel DDR III
P13
P27
P26
1066/1333/1600 MHZ
SATA0
SATA1
USB2-4
USB2-2
USB2-5
USB2-6
P8
BATTERY
Azalia
Haswell ULT 15W
MCP 1168pins
IMC
DC+GT3
40 mm X 24 mm
SATA
Integrated PCH
USB2.0
RTC
IHDA
LPC
P2~P13
PCI-E x4
TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x1
CLK
SPI
DP
PCIE-5
EDP
DDI2-Lane0~1
DDI2-Lane2~3
USB3-2/USB2-1
DDI1
USB3-1
USB2-0
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM
Memory Down
D D
Max. 4G
C C
2Rx16
P14
DDR3L-SODIMM
SATA - HDD
MINI CARD
mSATA SSD
USB2 IO
CCD(Camera)
Touch Screen(option)
P31
P23
P23
I/O board
I/O Board Conn.USB2 IO
P31
GPU
N14P-GV2
N14P-GE2
N14P-GT2
Display
P15~P19
DP Switch
HD3SS2521
USB Charger USB3 Port
SLG55584A
P8
P23
P31
X'TAL 27MHz
PCIE-3
USB2-3
PCIE-4
VRAM
GV2-DDR3
eDP Conn.
Mini DP Conn.
HDMI Conn.
MB side
RTL8411AAR
/RTL8411BAR
P20,P21
P24
P25
MINI CARD
WLAN+BT
10/100/1G
P23
P31
P26
P28
X'TAL 25MHz
IV@ : iGPU
EV@ : Optimus
SW@ : With DP switch
NSW@ : W/O DP switch
TPL@ : Touch screen
KBL@ : Keyboard backlight
TPM@ : TPM
RJ45
P27
Cardreader
CONN. 2in 1
P29
01
P24
EC
IT8587
Image Sensor
P32
TPM(option)
P33
Fan Driver
(PWM Type)
P32
3
P27
2
BQ24737A
Batery Charger
TPS51225
+3V/+5V
TPS51622
+VCCIN
TPS51211
+1.05V_S5/+1.05V
TPS51216
+1.35V_SUS
P34
TPS54318
+1.5V
P35
UP1642
+VGPU_CORE
P38
TPS51211
+1.5V_GFX/1.05V_GFX/3V_GFX
P36
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thermal Protection
P37
Discharger
P39
P40
P41
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
ZRQ
ZRQ
ZRQ
1 47Friday, April 12, 2013
1 47Friday, April 12, 2013
1 47Friday, April 12, 2013
P39
3A
3A
3A
B B
DMIC Array
Int. MIC
P30
Combo HP
A A
5
ALC3225
AUDIO CODEC
ALC1001
P30
AMP
P30 P30 P30
P30
Speaker*2Speaker*2
K/B Con.
P32
4
OCH1691WAD
HALL SENSOR
5
4
3
2
1
Haswell ULT (DISPLAY,eDP)
U42A
HSW_ULT_DDR3L
02
D D
HDMI
Mini DP
C C
B B
INT_HDMITX2N25
INT_HDMITX2P25
INT_HDMITX1N25
INT_HDMITX1P25
INT_HDMITX0N25
INT_HDMITX0P25
INT_HDMICLK-25
INT_HDMICLK+25
DP2_TXN023
DP2_TXP023
DP2_TXN123
DP2_TXP123
DP2_TXN223
DP2_TXP223
DP2_TXN323
DP2_TXP323
PCH_BRIGHT24
PCH_BLON24
PCH_VDDEN24
TP46
TP_INT_PCH24
BOARD_ID410
BOARD_ID110
BOARD_ID210,32
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
AD4
B8
A9
C6
U6
P4
N4
N2
U7
L1
L3
R5
L4
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
U42I
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
+3V
GPIO55
+3V
GPIO52
+3V
GPIO54
+3V
GPIO51
+3V
GPIO53
eDP SIDEBAND
+3V
+3V
+3V
+3V
+3V_S5
PCIE
1 OF 19
HSW_ULT_DDR3L
9 OF 19
EDPDDI
DISPLAY
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
R806
100K_4
EDP_TXN0 24
EDP_TXP0 24
EDP_TXN1 24
EDP_TXP1 24
EDP_TXN2 24
EDP_TXP2 24
EDP_TXN3 24
EDP_TXP3 24
EDP_AUXN 24
EDP_AUXP 24
R149 24.9/F_4
R561 *0_4
R562 *0_4
HDMI_DDCCLK_SW 25
HDMI_DDCDATA_SW 25
DDPC_CTRLCLK 23
DDPC_CTRLDAT 23
INT_DP_AUXDN 23
INT_DP_AUXDP 23
INT_HDMI_HPD 25
DP_HPD_Q 23
EDP_HPD 24
PCH_BRIGHTDP_UTIL
eDP Panel
+VCCIOA_OUT
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
TP_INT_PCH
DDPC_CTRLCLK
DDPC_CTRLDAT
DDPB/C_CTRLDATA has an iPD 20K,
When PU at rising edge of
PCH_PWROK, the DDI port will
be detected
R160 10K_4
R635 10K_4
R623 10K_4
R617 10K_4
R601 10K_4
R175 TPL@100K_4
R576 2.2K_4
R575 2.2K_4
+3V
+3V
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
5
4
3
Friday, April 12, 2013
2
PROJECT :
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
ZRQ
ZRQ
ZRQ
2 47
2 47
2 47
1
3A
3A
3A
5
4
3
Haswell ULT (DDR3L) Haswell Processor (DDR3)
U42C
M_A_DQ[63:0]14
D D
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HSW_ULT_DDR3L
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
M_A_CLK0# 14
M_A_CLK0 14
M_A_CLK1# 14
M_A_CLK1 14
M_A_CKE0 14
M_A_CKE1 14
M_A_CS#0 14
M_A_CS#1 14
TP60
M_A_RAS# 14
M_A_WE# 14
M_A_CAS# 14
M_A_BS#0 14
M_A_BS#1 14
M_A_BS#2 14
M_A_A[15:0] 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
U42D
M_B_DQ[63:0]15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HSW_ULT_DDR3L
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
M_B_ODT0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_CLK0# 15
M_B_CLK0 15
M_B_CLK1# 15
M_B_CLK1 15
M_B_CKE0 15
M_B_CKE1 15
M_B_CS#0 15
M_B_CS#1 15
TP57
M_B_RAS# 15
M_B_WE# 15
M_B_CAS# 15
M_B_BS#0 15
M_B_BS#1 15
M_B_BS#2 15
M_B_A[15:0] 15
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
03
B B
3 OF 19
A A
5
4
3 2 1
4 OF 19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
PROJECT :
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
ZRQ
ZRQ
ZRQ
3 47
3 47
3 47
3A
3A
3A
5
4
3
2
1
04
H_PECI (50ohm)
Route on microstrip only
D D
C C
Spacing >18 mils
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
H_PECI33 XDP_PRDY# 13
H_PROCHOT#33,34,38
TP79
TP25
R605 56_4
SM_RCOMP[0:2]
Trace length < 500 mils
Trace width = 12~15 mils
Trace spacing = 20 mils
PROC_DETECT
CATERR#
H_PECI
H_PROCHOT#_RH_PROCHOT#
H_PWRGOOD_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
DDR_PG_CTRL
Haswell ULT (SIDEBAND)
THERMAL
DDR3L
DSW
HSW_ULT_DDR3L
MISC
JTAG
PWR
2 OF 19
D61
K61
N62
K63
C61
AU60
AV60
AU61
AV15
AV61
U42B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
J62
XDP_PRDY#
K62
XDP_PREQ#
E60
XDP_TCK0
E61
XDP_TMS_CPU
E59
XDP_TRST#
F63
XDP_TDI_CPU
F62
XDP_TDO_CPU
J60
XDP_BPM#0
H60
XDP_BPM#1
H61
XDP_BPM#2
H62
XDP_BPM#3
K59
XDP_BPM#4
H63
XDP_BPM#5
K60
XDP_BPM#6
J61
XDP_BPM#7CPU_DRAMRST#
XDP_PREQ# 13
XDP_TCK0 8,13
XDP_TMS_CPU 13
XDP_TRST# 8,13
XDP_TDI_CPU 13
XDP_TDO_CPU 13
XDP_BPM#0 13
XDP_BPM#1 13
TP82
TP80
TP23
TP81
TP27
TP24
TCK,TMS
Trace Length < 9000mils
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
B B
DRAM COMP
R683 200/F_4
R691 120/F_4
R686 100/F_4
PU/PD of CPU
H_PROCHOT#
A A
H_PWRGOOD_R
R613 *62_4
R614 62_4
R569 10K_4
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
5
+VCCIO_OUT
+1.05V_VCCST
DRAMRST
CPU DRAM
CPU_DRAMRST#
+1.35V_SUS
12
4
XDP_TDO_CPU
XDP_TCK0
XDP_TRST#
470_4
R141 51_4
R202 51_4
R690 *51_4
R404 *SHORT_4
+1.05V_VCCST
12
C459
*0.1u/10V_4
DDR3_DRAMRST# 14,15
3
DDR3L ODT GENERATIONXDP PU/PD
+5V_S5
12
R306
220K/F_4
DDR_VTTT_PG_CTRL37
2
0.1u/10V_4
+1.35V_SUS
3
2
1
+1.35V_SUS
U20
5
VCC
12
C271
4
Y
74AUP1G07GW
Q37
2N7002K
R738 66.5/F_4R403
R739 66.5/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
1
NC
2
A
GND
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
R695 *SHORT_4
3
M_B_ODT0_DIMM 15
M_B_ODT1_DIMM 15
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZRQ
ZRQ
ZRQ
DDR_PG_CTRL
4 47
4 47
4 47
3A
3A
3A
5
VDDQ Output Decoupling Recommendations
330uFx2 7343
22uFx11
10uFx10
D D
+1.35V_SUS
+
C C
+1.05V_VCCST
VRON_CPU IMVP_PWRGD
B B
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
0805
5 onTOP, 5 on BOT inside socket cavity
0805
C258
C259
10u/6.3V_6
10u/6.3V_6
C269
*470u/2V_7343
R190 *SHORT_8
C257
2.2u/6.3V_6
VCC_SENSE38
R566 *10K_4
R567 10K_4
PWR_DEBUG13
+1.05V_VCCST+1.05V
+VCCIN
+1.05V_VCCST
C223
*4.7u/6.3V_6
C261
10u/6.3V_6
C224
2.2u/6.3V_6
+1.35V_CPU 1.4A
+1.35V_CPU
C260
10u/6.3V_6
C256
2.2u/6.3V_6
R583 100/F_4
R587 *SHORT_4
300mA
+VCCIO_OUT
300mA
+VCCIOA_OUT
VCCST_PWRGD13
VRON_CPU38
IMVP_PWRGD10,38
R173 *SHORT_4
R151 150_6
C225
10u/6.3V_6
C227
2.2u/6.3V_6
+VCCIN
C226
10u/6.3V_6
TP28
TP41
TP42
TP43
TP47
TP50
TP30
TP31
TP26
TP85
TP32
TP49
TP51
TP36
TP39
TP37
TP54
TP35
TP34
TP29
TP20
ULT_RVSD_61
ULT_RVSD_62
ULT_RVSD_63
ULT_RVSD_64
VCC_SENSE_R
ULT_RVSD_65
ULT_RVSD_66
ULT_RVSD_67
ULT_RVSD_68
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
PWR_DEBUG_R
ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72
ULT_RVSD_73
ULT_RVSD_74
ULT_RVSD_75
ULT_RVSD_76
ULT_RVSD_77
ULT_RVSD_78
ULT_RVSD_79
ULT_RVSD_80
ULT_RVSD_81
+1.05V_VCCST
+VCCIN
4
Haswell ULT (POWER)
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U42L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
3
+
C537
*470u/2V_7343
C46
C190
22u/6.3V_8
22u/6.3V_8
C210
C567
22u/6.3V_8
22u/6.3V_8
C562
C167
22u/6.3V_8
22u/6.3V_8
C204
C173
22u/6.3V_8
22u/6.3V_8
C548
C168
*22u/6.3V_8
*22u/6.3V_8
VCC Output Decoupling Recommendations
470uFx4 7343
22uFx8
22uFx11
10uFx11
0805
0805
0805
+VCCIN 32A
C73
C561
22u/6.3V_8
C201
22u/6.3V_8
C169
22u/6.3V_8
C170
22u/6.3V_8
C542
*22u/6.3V_8
C228
22u/6.3V_8
C206
22u/6.3V_8
C165
22u/6.3V_8
C203
22u/6.3V_8
C74
*22u/6.3V_8
22u/6.3V_8
C557
22u/6.3V_8
C45
22u/6.3V_8
C172
22u/6.3V_8
C71
*22u/6.3V_8
TOP socket side
4 on TOP, 4 on BOT near socket edge
TOP, inside socket cavity
BOT, inside socket cavity
2
C75
22u/6.3V_8
C202
22u/6.3V_8
C171
22u/6.3V_8
C205
22u/6.3V_8
C560
*22u/6.3V_8
VCCST PWRGD
VCCST_PWRGD
C582
*0.1u/10V_4
+VCCIN
SVID
H_CPU_SVIDDAT
H_CPU_SVIDART#
+1.05V_VCCST
R551
10K_4
R545 0_4
R582 *0_4
VCCST_PWRGD_EN
Layout note: need routing together
and ALERT need between CLK and DATA.
+VCCIO_OUT
R621
*130/F_4
Place PU resistor
close to CPU
Place PU resistor
close to CPU
CRB is via +1.05V PG
+3V_S5
VCCST_PWRGD_R
HWPG_1.05V_EC
B-stage DNP
+1.05V_VCCST
R618
130/F_4
R625 *SHORT_4
R630 43_4
C584
0.1u/10V_4
R536 *0_8
Q60
2N7002K
R579 *0_4
R544 *0_4
R580 0_4
+VCCIO_OUT+1.05V
+1.05V_VCCST
5
4
1
U38
VCC
Y
74AUP1G07GW
3
1
R640
75_4
1
NC
2
A
3
GND
Reserve from EC
2
HWPG_1.05V_S5 13,33,36
EC_PWROK 7,33
APWORK 7,33
C580
*4.7u/6.3V_6
+VCCIO_OUT
R633
*75_4
05
VCCST_PWRGD_EN
HWPG_1.05V_EC# 33
VR_SVID_DATA 38
VR_SVID_ALERT# 38
HWPG_1.05V for DDR=1.5V
+3V
A A
C487
*1000p/50V_4
2
Q45
1 3
*MMBT3904-7-F
+1.05V
R454 *4.7K_4
5
R451
*4.7K_4
C485
*1000p/50V_4
+3V
R463
*4.7K_4
HWPG_1.05V 33
2
Q46
1 3
*DTC144EU
R453
*100K/F_4
10/30 reserve
DDR=1.5V ,This block POP
4
3
2
H_CPU_SVIDCLK
R641 *SHORT_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
PROJECT :
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
1
VR_SVID_CLK 38
ZRQ
ZRQ
ZRQ
5 47
5 47
5 47
3A
3A
3A
5
4
3
Haswell ULT (CFG,RSVD)
U42S
HSW_ULT_DDR3L
06
D D
NOA_STBN_013
NOA_STBN_113
NOA_STBP_013
NOA_STBP_113
C C
CFG013
CFG113
CFG213
CFG313
CFG48,13
CFG513
CFG613
CFG713
CFG813
CFG913
CFG1013
CFG1113
CFG1213
CFG1313
CFG1413
CFG1513
R177 49.9/F_4
R572 8.2K_4
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
CFG_RCOMP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
TD_IREF
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
AA62
U63
AA61
U62
V63
J20
H18
B12
A5
E1
D1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RESERVED
PROC_OPI_RCOMP
19 OF 19
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
OPI_COMP1
R700 49.9/F_4
Processor Strapping
1 0
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
B B
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
CFG 8
ALLOW THE USE OF NOA ON LOCKED UNITS
(DEFAULT) NORMAL OPERATION; NO STALL
(DEFAULT) NORMAL OPERATION
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT
DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS
STALL
PCH-LESS MODE
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT
CFG0
CFG1
CFG3
CFG8
R203 *1K_4
R184 *1K_4
R192 *1K_4
R171 *1K_4
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
A A
CFG10
SAFE MODE BOOT
5
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
POWER FEATURES ACTIVATED
DURING RESET
4
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
3 2 1
CFG9
CFG10
R172 *1K_4
R183 *1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
PROJECT :
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
ZRQ
ZRQ
ZRQ
6 47
6 47
6 47
3A
3A
3A
5
4
3
Haswell ULT PCH (PM)
PCH_SUSACK#33
D D
SYS_PWROK
EC_PWROK
PCH_SUSPWARN#33
DNBSWON#33
ACPRESENT34
PCH_SLP_S0#13,33
RSMRST#33
PCH_SUSPWRACK
SYS_RESET#13
R656 0_4
R555 *0_4
R542 *0_4
PCI_PLTRST#33
R662 *0_4
R658 0_4
C617 *1u/6.3V_4
R705 *0_4
R547 *0_4
R719 *SHORT_4
R659 *0_4
R274 *SHORT_4
R277 *SHORT_4
R653 *SHORT_4
TP55
SUSACK#_R
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PCI_PLTRST#
PCH_RSMRST#
PCH_SUSPWRACK
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_SLP_S0#_R
PCH_SLP_WLAN#
U42H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
AW6
AV4
AL7
AJ8
AN4
AF3
AM5
+3V_S5
PLTRST
RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
PWRBTN
ACPRESENT/GPIO31
BATLOW/GPIO72
SLP_S0
SLP_WLAN/GPIO29
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
+3V
+3V_S5
+3V_S5
DSW
DSW
DSW
DSW
+3V_S5
DSW
+3V_S5
8 OF 19
DSWVRMEN
DPWROK
DSW
CLKRUN/GPIO32
SUS_STAT/GPIO61
DSW
DSW
DSW
DSW
DSW
WAKE
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
AW7
DSWVREN
AV5
DPWROK_R
AJ5
PCIE_LAN_WAKE#
V5
CLKRUN#
AG4
AE6
PCH_SUSCLK
AP5
PCH_SLP_S5#
AJ6
SUSC#
AT4
SUSB#
AL5
PCH_SLP_A#
AP4
PCH_SLP_SUS#
AJ7
PCH_SLP_LAN#
Deep Sx
R722 *SHORT_4
TP44
TP58
DSWVREN 8
DPWROK 33
PCIE_LAN_WAKE# 26,28
CLKRUN# 27,33
LPCPD# 27
PCH_SLP_S5# 13
SUSC# 13,33
SUSB# 13,33
PCH_SLP_A# 13
PCH_SLP_SUS# 33
07
C C
PCH PM PU/PD
+3V
CLKRUN#
SYS_RESET#
B B
A A
PCH_RSMRST#
SYS_PWROK
DPWROK_R
PCH_SUSPWRACK
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#
R176 8.2K_4
R644 10K_4
R707 10K_4
R565 *10K_4
R721 100K/F_4
+3V_S5
R696 10K_4
+3V_S5
R259 *10K_4
R262 *8.2K_4
R264 *10K_4
R261 *10K_4
+3VPCU
R272 10K_4
R275 8.2K_4
R276 1K_4
R273 *10K_4
5
DSW PU
Power Sequence
PCH_PWROK33
R354
100K_4
EC_PWROK SYS_PWROK_R
R353 *SHORT_4
R543 *0_4
R720 *0_4
Non Deep Sx
EC_PWROK_R
DPWROK_RRSMRST#
PLTRST# Buffer Deep Sx Circuit
+3V
PCI_PLTRST#
2
1
3 5
C255 0.1u/10V_4
4
U19
TC7SH08FU
R242
100K_4
PLTRST# 13,16,26,27,28,33
+3V_S5 +3VCC_S5
*0.33u/10V_6
SYSPWOK
+3V_S5
C583 *0.1u/10V_4
2
SYS_PWROK13
4
SYS_PWROK
4
U37
TC7SH08FU
3 5
R556 *0_4
EC_PWROK
1
3 2 1
EC_PWROK 5,33
IMVP_PWRGD_3V 10
R550
10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
APWORK5,33
R413 0_4
Speed up 250ms to boot up
for EC power on 250 ms
Non Deep Sx
R300 *0_6
1
R302
C282
PCH_SLP_SUS#
100K_4
2
Q35
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
2
3
1
Q34
AO3413
R303
*SHORT_6
ZRQ
ZRQ
ZRQ
R414
10K_4
3
7 47
7 47
7 47
APWROK_R
3A
3A
3A
RTC Clock 32.768KHz (RTC)
C624 18p/50V_4
C625 18p/50V_4
RTC Circuitry (RTC)
D D
R373 *S HORT_6
+3VPCU
R363 1K _4
+3V_RTC_0
+3V_RTC_[0:2]
Trace width = 20 mils
12
CN14
BAT_CONN
HDA
PCH_AZ_CODEC_RST#30
PCH_AZ_CODEC_SDOUT30
PCH_AZ_CODEC_BITCLK30
C C
PCH_AZ_CODEC_SYNC30
PCH JTAG
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
XDP_TMS
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
XDP_TCK1
B B
ULT Strapping Table
Pin Name Strap description
GPIO81(SPKR)
HDA_SDO
INTVRMEN
GPIO66
GPIO86
GPIO15
A A
CFG4
DSWVREN
5
Y7
32.768KHZ
D21
BAT54C
RTC_X1
R699
10M_4
RTC_X2
+3V_RTC
Trace width = 30 mils
+3V_RTC
R754
20K/F_4
R750
20K/F_4
C676
1u/6.3V_4
R703 33_ 4
R701 33_ 4
R698 33_ 4
C639
*10p/50V_4
R726 33_ 4
C638 *10p/50V_4
C671
1u/6.3V_4
C670
1u/6.3V_4
23
+3V_RTC_2
+3V_RTC_1
4 1
MP remove(Intel)
R200 51_4
R201 51_4
R216 51_4
R650 *1K_4
R657 *51_4
No reboot on TCO Timer
expiration
Flash Descriptor Security
Override / Intel ME Debug Mode
+1.05V_S5
Integrated 1.05V VRM enable ALWAYS
Top-Block Swap override
Boot BIOS Strap Bit
TLS(Transport layer security)
DP presence strap
Deep Sx well on die VR enable
5
RTC_RST#
12
J6
*JUMP
SRTC_RST#
12
J5
*JUMP
HDA_RST#_R
HDA_SDO_R
HDA_BCLK_R
HDA_SYNC_R
Sampled
PWROK
PWROK
R708 1M_4
+3V_RTC
RTC_RST#13
PCH_AZ_CODEC_SDIN030
XDP_TRST#4,13
XDP_TCK113
XDP_TDI13
XDP_TDO13
XDP_TMS13
XDP_TCK04,13
R215 *S HORT_4
R652 *S HORT_4
Configuration note
0 = Default enable (iPD 20K)
1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K)
1 =can't program ME
1=Should be always pull-up
0 = Default disable (iPD 20K)
1 = Enable TBS function
0 = Default SPI (iPD 20K)
1 =LPC
0 = Default enable w/o
confidentiality(iPD 20K)
1 =Default enable with
confidentiality
0 = Enable an external display
port is connected to the eDP
1 =disable
1=Should be always pull-up
4
Haswell ULT PCH (RTC/HDA/SATA/SPI)
HSW_ULT_DDR3L
SATA_RN0/PERN6_L3
+3V
+3V
+3V
+3V
SPKR 10,30
ME_WR# 33
R704 *3 30K_4
R577 *1 K_4
R129 *1 K_4
R189 *1 K_4
R193 1K _4
R706 *3 30K_4
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
RTC
AUDIO SATA
JTAG
5 OF 19
SPKR
R702 *S HORT_4 R97 33_4
PCH_INTVRMEN
GPIO66
GPIO86
GPIO15
CFG4
CFG46,13
DSWVREN
RTC_X1
RTC_X2
SM_INTRUDER#
PCH_INTVRMEN
SRTC_RST#
RTC_RST#
HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R
HDA_SDO_R
XDP_TCK1
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
4
U42E
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
+3V
+3V_RTC
+3V
+3V
+3V_S5
DSWVREN7
+3V_RTC
R642 *1 K_4
HDA_SDO_R
R717 330 K_4
GPIO6610
R578 *1 K_4
GPIO8610
R136 *1K_4
GPIO1510
R195 8.2K _4
R718 330 K_4
3
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED
3
J5
H5
B15
A15
J8
H8
A17
B17
J6
TP19
H6
TP17
B14
TP15
C15
TP13
F5
E5
C17
D17
V1
U1
VGPU_EN
V6
GPIO36
AC1
GPIO37
A12
SATA_IREF
L11
K10
C12
U3
R573 *S HORT_4
SATA_RCOMP
R574 3.01 K/F_4
SATA_LED#
R636 10K _4
SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
PCH Quad SPI ROM
(Default for WIN8)
3.3K is original and for no
support fast read function
PCH_SPI_CS1#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C565 *22p/50V_4
SATA_RXN0 27
SATA_RXP0 27
SATA_TXN0 27
SATA_TXP0 27
SATA_RXN1_SSD 26
SATA_RXP1_SSD 2 6
SATA_TXN1_SSD 26
SATA_TXP1_SSD 26
SYS_COM_REQ 23
VGPU_EN 2 0,40
TP33
TP88
+V1.05S_ASATA3PLL
+V1.05S_ASATA3PLL
+3V
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
+3V_PCH_ME
R529 33_4
R521 33_4
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
+3V_PCH_ME
PCH_SPI_CLK_EC33
PCH_SPI_SI_EC33
PCH_SPI_SO_EC33
SPI_CS0#_UR_ME33
+3V_PCH_ME
HDD
mSATA
R145 33_4
R153 33_4
R103 33_4
R106 *1 K_4
R94 *1K _4
PCH_SPI_IO2
PCH_SPI_IO3
R109 10K_4
2
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
LPC_LAD026,27,33
LPC_LAD126,27,33
LPC_LAD226,27,33
LPC_LAD326,27,33
LPC_LFRAME#26,27,33
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
SYS_COM_REQ
VGPU_EN
GPIO36
GPIO37
W25Q32BVSSIG / AKE391P0N00----->4MB
MX25L3206EM2I / AKE39FP0Z02----->4MB
MX25L1606EM2I / AKE38FP0Z01----->2MB
W25Q16BVSSIG / AKE38FP0N01----->2MB
R540 *S HORT_6
C162
*22p/50V_4
R91 33_4
R95 33_4
R146 33_4
R533 33_4
R525 33_4
R520 33_4
R98 33_4
R112 *0_4
R104 0_4
U14
1
CE#
6
SCK
5
SI
2
SO
3
WP#
ROM-2M_ME
SPI_WP_IO2_ME
U34
1
CE#
6
SCK
5
SI
2
SO
3
WP#
ROM-4M_EC
SPI_WP_IO2_EC
SPI_CS0#_UR_ME
+3V_PCH_ME+3V_S5
8
VDD
7
SPI_HOLD_IO3_ME
HOLD#
4
VSS
8
VDD
7
SPI_HOLD_IO3_EC
HOLD#
4
VSS
SPI_WP_IO2_ME
SPI_WP_IO2_EC
SPI_HOLD_IO3_ME
SPI_HOLD_IO3_EC
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_CS0#
PCH_SPI_CS1#
2
R147 *1 K_4
C147
0.1u/10V_4
R534 *1 K_4
C95
0.1u/10V_4
HSW_ULT_DDR3L
LPC
+3V
+3V_PCH_ME
+3V_PCH_ME
+3V_S5
SMBALERT/GPIO11
+3V_S5
+3V_S5
SMBUS
+3V_S5
SML0ALERT/GPIO60
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
C-LINKSPI
SMBus
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
7 OF 19
+3V_S5
SMBus(PCH)
SMB_PCH_DAT26
SMB_PCH_CLK26
PCH_XDP_WLAN/S5 DDR_TP/S0
SMBus(EC)
2ND_MBCLK19,33
2ND_MBDATA19,33
U42G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
R182 *10K_4
R629 IV@10K_4 R689 10K_4
R168 10K_4
R655 10K_4
reserve for SPI fast read
EC/S5 PCH/S5
1
08
AN2
SMBALERT#
AP2
SMB_PCH_CLK
SMBCLK
AH1
SMB_PCH_DAT
SMBDATA
AL2
SMB0ALERT#
AN1
SMB_ME0_CLK
SML0CLK
AK1
SMB_ME0_DAT
AU4
SMB1ALERT#
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
AF2
CL_CLKPCH_SPI_CS0#
CL_CLK
AD2
CL_DAT
CL_DATA
AF4
CL_RST#
CL_RST
R680 10K_4
R697 10K_4
R285 2.2K_4
R284 2.2K_4
R663 2.2K_4
R661 2.2K_4
+3V_S5
2ND_MBCLK
2ND_MBDATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB0ALERT#
SMB1ALERT#
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
+3V
R289
4.7K_4
Q33
5
2
6
2N7002DW
*2.2K_4
Q32
5
2
6
*2N7002DW
R280 0_4
R282 0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
Friday, April 12, 2013
Friday, April 12, 2013
Friday, April 12, 2013
1
43
1
R290
43
1
SMB_ME1_CLK
SMB_ME1_DAT
SMBALERT# 32
TP87
TP86
TP89
R279
4.7K_4
CLK_SDATA 13, 14,15,23,32
CLK_SCLK 13,14,15,23,32
R278
*2.2K_4
SMB_ME1_CLK
SMB_ME1_DAT
ZRQ
ZRQ
ZRQ
8 47
8 47
8 47
3A
3A
3A
5
Haswell ULT PCH (PCIE,USB3.0,USB2.0)
U42K
PEG_RX#016
D D
PEG x4
C C
LAN WLAN
B B
PEG_RX01 6
PEG_TX#016
PEG_TX016
PEG_RX#116
PEG_RX11 6
PEG_TX#116
PEG_TX116
PEG_RX#216
PEG_RX21 6
PEG_TX#216
PEG_TX216
PEG_RX#316
PEG_RX31 6
PEG_TX#316
PEG_TX316
PCIE_RX3-_WLAN26
PCIE_RX3+_WLAN26
PCIE_TX3-_WLAN26
PCIE_TX3+_WLAN26
PCIE_RX4-_LAN28
PCIE_RX4+_LAN28
PCIE_TX4-_LAN28
PCIE_TX4+_LAN28
+V1.05S_ AUSB3PLL
C592 EV@0 .22u/10V_ 4
C593 EV@0 .22u/10V_ 4
C572 EV@0 .22u/10V_ 4
C573 EV@0 .22u/10V_ 4
C597 EV@0 .22u/10V_ 4
C598 EV@0 .22u/10V_ 4
C574 EV@0 .22u/10V_ 4
C575 EV@0 .22u/10V_ 4
C587 0.1u /10V_4
C586 0.1u /10V_4
C589 0.1u /10V_4
C588 0.1u /10V_4
TP22
TP21
TP11
TP9
R571 3.01 K/F_4
R570 *SHORT_4
PCIE_RCOMP
PCIE_IREF
F10
PERN5_L0
E10
PERP5_L0
C23
R_PEG_TX# 0
R_PEG_TX0
R_PEG_TX# 1
R_PEG_TX1
R_PEG_TX# 2
R_PEG_TX2
R_PEG_TX# 3
R_PEG_TX3
PCIE_TX3PCIE_TX3+
PCIE_TX4PCIE_TX4+
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1 USBCOMP
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
PCIE USB
+3V_S5
+3V_S5
+3V_S5
+3V_S5
HSW_ULT_DDR3L
4
11 OF 19
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
DSW
USB2N0
DSW
USB2P0
DSW
USB2N1
DSW
USB2P1
DSW
USB2N2
DSW
USB2P2
DSW
USB2N3
DSW
USB2P3
DSW
USB2N4
DSW
USB2P4
DSW
USB2N5
DSW
USB2P5
DSW
USB2N6
DSW
USB2P6
DSW
USB2N7
DSW
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
RSVD
RSVD
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBP7+
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBP0- 2 3
USBP0+ 2 3
USBP1- 3 1
USBP1+ 3 1
USBP2- 2 4
USBP2+ 2 4
USBP3- 2 6
USBP3+ 2 6
USBP4- 3 1
USBP4+ 3 1
USBP5- 2 4
USBP5+ 2 4
USBP6- 3 1
USBP6+ 3 1
TP63
TP62
USB3_RXN0 31
USB3_RXP 0 31
USB3_TXN0 31
USB3_TXP0 31
USB3_RXN1 23
USB3_RXP 1 23
USB3_TXN1 23
USB3_TXP1 23
R245 22.6 /F_4
USB_OC0# 31
USB_OC2# 31
USB_OC3# 31
mDP Dongle
MB USB2.0
CCD
BT
MB USB3.0
Touch screen
DB USB2.0
CR
MB USB3.0
mDP Dongle
USBCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
MB U3
MB U2
DB U2
3
Haswell ULT PCH (CLOCK)
CLK_PCIE_N0
TP75
CLK_PCIE_P0
TP73
CLK_PCIE_REQ0#
TP84
CLK_PCIE_REQ1#
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
TP106
R639 *SHORT_4
R638 *SHORT_4
R651 *SHORT_4
+3V_S5
RP6
10
9
8
7 4
10K_10P 8R
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
1
2
3
56
CLK_PCIE_WLANN26
CLK_PCIE_WLANP26
PCIE_CLKREQ_WLAN#26
CLK_PCIE_LANN28
LAN WLANVGA
CLK_PCIE_LANP28
CLK_PCIE_LAN_REQ#28
CLK_PCIE_VGA#16
CLK_PCIE_VGA16
CLK_PEGA_REQ#16
USB Overcurrent
U42F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
2
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ5#
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCIE_REQ4#
CLOCK
SIGNALS
6 OF 19
R637 10K_ 4
R645 10K_ 4
R654 10K_ 4
R612 10K_ 4
R634 10K_ 4
R563 10K_ 4
R564 10K_ 4
R258 10K_ 4
R271 10K_ 4
R608 10K_4
R619 *1K_4
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
+3V
+3V
XTAL24_IN
XTAL24_OUT
A25
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
R558
1M_4
XTAL24_IN
XTAL24_OUT
ICLK_BIAS
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCH_PCI3USBP7CLK_PCH_PCI4
C266
*18p/50V _4
1
C590 12 p/50V_4
Y6
24MHz
2 4
1 3
C591 12 p/50V_4
R557 3.01 K/F_4
*18p/50V _4
R257TPM@22_4
R25622_4
R25522_4
C267
09
+V1.05S_ AXCK_LCPLL
PCLK_TPM 2 7
CLK_PCI_LPC 26
CLK_PCI_EC 33
CLK_PCIE_XDPN 13
CLK_PCIE_XDPP 13
PCLK_TPMCLK_PCI_LPCCLK_PCI_EC
C268
*18p/50V _4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
5
4
3
2
Friday, April 12, 2013
PROJECT :
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
ZRQ
ZRQ
ZRQ
9 47
9 47
1
9 47
3A
3A
3A
5
4
3
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
High Low
GPIO8
D D
C C
DEVSLP0 for HDD
DEVSLP1 for mSATA
No touch panel Touch panel
GPIO824
GPIO158
DGPU_PWROK20
DGPU_HOLD_RST#16
DGPU_PWR_EN41
MODPHY_EN11
DEVSLP027
DEVSLP126
TP40
TP48
TP53
TP93
TP59
TP61
TP56
TP38
TP91
TP45
TP52
SPKR8,30
BOARD_ID0
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
ODD_PRSNT#
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PW_CTRL#
MODPHY_EN
RAM_ID0
RAM_ID3
GPIO25
GPIO45
GPIO46
RAM_ID1
RAM_ID2
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR
Board ID
+3V
R624 10K_4
BOARD_ID12
R606 10K_4
B B
BOARD_ID22,32
R603 *10K_4
R124 10K_4
BOARD_ID42
R600 10K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
Low
BOARD_ID0
BOARD_ID1
A A
BOARD_ID2
BOARD_ID3
BOARD_ID4
Enable on
board memory
Pin8 of SYNAPTICS and ELAN are NC
pin. BIOS maybe will use EEPROM
detection. Default is pull high.
Reserved
(Default)
Reserved
(Default)
5
R626 *10K_4
R607 *10K_4
R602 10K_4
R121 *10K_4
R599 *10K_4
High
GDDR5DDR3
Disable on
board memory
Reserved
Reserved
U42J
P1
BMBUSY/GPIO76
AU2
AM7
AD6
AD5
AN5
AD7
AN3
AG6
AP1
AL4
AT5
AK4
AB6
AT3
AH4
AM4
AG5
AG3
AM3
AM2
Y1
T3
U4
Y3
P3
Y2
P2
C4
L2
N5
V2
+3V_S5
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
+3V_S5
GPIO15
+3V
GPIO16
+3V
GPIO17
+3V_S5
GPIO24
DSW
GPIO27
+3V_S5
GPIO28
+3V_S5
GPIO26
+3V_S5
GPIO56
+3V_S5
GPIO57
+3V_S5
GPIO58
+3V_S5
GPIO59
+3V_S5
GPIO44
+3V_S5
GPIO47
+3V
GPIO48
+3V
GPIO49
+3V
GPIO50
HSIOPC/GPIO71
+3V_S5
GPIO13
+3V_S5
GPIO14
DSW
GPIO25
+3V_S5
GPIO45
+3V_S5
GPIO46
+3V_S5
GPIO9
+3V_S5
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81
RAM ID
R693 10K_4
R247 *10K_4
R682 10K_4
R688 10K_4
RAM_IDVender Freq.
Hynix
Elpida
0000
0001
Elpida 0010 AKD5JGST404 EDJ4216EFBG-GN-F 1600MHz
SKU ID
R647 IV@10K_4
R139 IV@10K_4
SKU_ID1 SKU_ID0 VGA H/W
UMA Only
dGPU Only
Switchable
(Mux)
Optimize
(Muxless)
0
0
1
1
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
Q PN
GPIO
+3V
RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
DSW
10 OF 19
R692 *10K_4
R263 10K_4
R681 *10K_4
R687 *10K_4
Mfr. PN
CPU/
MISC
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SERIAL IO
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
THRMTRIP
+3V
RCIN/GPIO82
PCH_OPI_RCOMP
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
+3V_S5
AKD5JGETW04 H5TC4G63AFR-PRBA 1600MHz
AKD5JGST400
SKU_ID0
SKU_ID1
0
1
0
1
4
EDJ4216EBBG-DJ-F
R646 EV@10K_4
R143 EV@10K_4
Setup
Signal
Menu
UMA
Hidden
GPU
Hidden
UMA+GPU dGPU/SG UMA boot
UMA
UMA/SG
1333MHz
+3V
UMA boot
GPU boot
UMA boot
D60
THRMTRIP#
V4
SIO_RCIN#
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
IRQ_SERIRQ
OPI_COMP2
SERIRQ
RSVD
RSVD
CPU thermal trip
THRMTRIP#
IMVP_PWRGD5,38
IRQ_SERIRQ
DEVSLP0
DEVSLP1
SIO_RCIN# 33
R132
1K_4
Q18
FDV301N
IRQ_SERIRQ 27,33
GPIO86 8
SIO_EXT_SMI# 33
SIO_EXT_SCI# 33
GPIO66 8
SYS_SHDN# 27,35,39
+1.05V_VCCST
5
12
C767
0.1u/10V_4
4
+3V
R807
10K_4
R648 *100K_4
high UMA Only
low
R628 EV@100K_4
R162 *10K_4
IMVP_PWRGD_3V 7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
R709 49.9/F_4
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
+1.05V_VCCST
3
IMVP_PWRGD_3V
+1.05V_VCCST
3 2 1
2
1
R133
2
1K_4
1 3
Q19 MMBT3904-7-F
U55
NC1VCC
2
A
GND3Y
74AUP1G07GW
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO83
GPIO84
GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO64
GPIO65
GPIO67
GPIO68
GPIO69
DGPU_PWR_EN
DGPU_HOLD_RST#
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
DGPU_PW_CTRL#
DGPU_PWROK
LAN_DISABLE#
ODD_PRSNT#
GPIO8
WK_GPIO27
GPIO27 : If not used then use
8.2-kΩ to 10-kΩ pull-down to GND.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
R159 10K_4
R169 *10K_4
R611 *10K_4
R187 10K_4
R135 10K_4
R131 10K_4
R206 10K_4
R150 10K_4
R207 10K_4
R152 10K_4
R208 10K_4
R205 10K_4
R597 10K_4
R594 10K_4
R209 10K_4
R590 10K_4
R588 10K_4
R210 10K_4
R589 10K_4
R595 10K_4
R592 10K_4
R585 10K_4
R586 10K_4
R584 10K_4
R134 10K_4
R130 10K_4
R128 10K_4
R581 10K_4
R649 10K_4
R643 10K_4
R627 IV@1K_4
R260 10K_4
R679 10K_4
R250 *10K_4
R727 10K_4
R728 *10K_4
ZRQ
ZRQ
ZRQ
10
+3V
+3V
+3V_S5
+3VPCU
10 47
10 47
10 47
3A
3A
3A
5
4
3
2
1
Haswell ULT PCH (Power)
C577 *1u/6.3V_4
C163 1u/6.3V_4
C175 1u/6.3V_4
+1.05V
25mA
C235
1u/6.3V_4
R179 *SHORT_8
Deep Sx
+3VPCU
+3V_S5
D D
R292 *0_6
+1.05V_S5
Non Deep Sx
+3V
C C
+1.05V
WW15 4/10 Intel VCCDSW3
G3 can't boot issue.
C245
+PCH_VCCDSW+VCCPDSW
0.47u/25V_6
+V1.05DX_MODPHY
R294 *0_6
+1.05V_S5
+1.05V_DCPSUS2
R254*SHORT_6
R253 *0_6
1u/6.3V_4
C164 1u/6.3V_4
+3VCC_S5
1.741A
C181
*1u/6.3V_4
C177
10u/6.3V_6
C238
R165*SHORT_8
+V1.05S_AIDLE
10mA
C166
1u/6.3V_4
+V3.3DX_1.5DX_1.8DX_AUDIO
0.114A
41mA
C174
22u/6.3V_8
+1.05V
63mA
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+3VCC_S5
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
C209 1u/6.3V_4
1.838A
+V1.05S_APLLOPI
+1.05V_DCPSUS3
C270 22u/6.3V_8
+VCCPDSW
+V3.3S_VCCPCORE
B18
B11
Y20
AA21
W21
AH14
AH13
AC9
AA9
AH10
K19
A20
R21
T21
K18
M20
V21
AE20
AE21
K9
L10
M9
N8
P9
J13
V8
W9
J18
J17
U42M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
PCH VCCHSIO Power
+1.05V_S5
+3V_S5
R604
100K_4
+3V
R188
*100K_4
R185
*100K_4
+5V_S5
B B
MODPHY_EN10
C607
0.1u/10V_4
12
C601
1u/6.3V_4
R596
*SHORT_4
1 2
12
12
C608
0.047u/25V_4
U40
TPS22965DSGR
1
VIN_01
VIN_022VOUT_01
3
ON
4
VBIAS
VOUT_02
PAD
9
GND
+V1.05DX_MODPHY
8
7
6
CT
5
12
C604
330p/50V_4
R560 *SHORT_8
R559 *SHORT_8
12
C602
0.1u/10V_4
HSIO
USB3
HDA
VRM
GPIO/LPC
LPT LP POWER
HSW_ULT_DDR3L
OPI
13 OF 19
VCCAPLL power
RTC
SPI
CORE
THERMAL SENSOR
SERIAL IO
SUS OSCILLATOR
USB2
VCCSUS3_3
DCPSUSBYP
DCPSUSBYP
L21 2.2uH/210mA_8
*47u/6.3V_8
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
C248
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
+VCCRTCEXT
+V3.3M_PSPI
PCH_VCC_1_1_21
+V1.05S_CORE_PCH
+1.05V_DCPSUS1
+V1.05S_APLLOPI+1.05V
57mA
C619
*47u/6.3V_8
18mA
+PCH_VCCDSW
+V1.05M_VCCASW
0.109A
R293 *0_6
C212
1u/6.3V_4
+V3.3S_VCCSDIO
+1.05V_DCPSUS4
+V1.05S_VCCUSBCORE
C218
1u/6.3V_4
R194 *SHORT_6
+V1.05M_VCCASW
+1.05V_S5
3mA
1mA
17mA
R291 *0_6
C197
1u/6.3V_4
1u/6.3V_4
+3V_RTC
C231
C643
0.1u/10V_4
C208
0.1u/10V_4
+1.05V
+1.05V
C237
C213
1u/6.3V_4
1u/6.3V_4
0.658A
R217 *SHORT_8
C221
C217
1u/6.3V_4
22u/6.3V_8
+V1.5S_VCCATS
+V3.3S_VCCPTS
+1.05V_S5
R270 *SHORT_8
C236
1u/6.3V_4
+1.05V +V1.05S_AXCK_DCB
L33 2.2uH/210mA_8
C642
0.1u/10V_4
1u/6.3V_4
R220 *SHORT_6
R204 *0_6
C216
0.1u/10V_4
C192
10u/6.3V_6
C233
1u/6.3V_4
R111 *SHORT_6
R107 *SHORT_6
C183
1u/6.3V_4
C194
1u/6.3V_4
+1.05V
C579
47u/6.3V_8
+3V_S5
+3V
R174 *SHORT_8
+1.05V
+1.5V
+3V
R158 *SHORT_6
0.2A
C578
47u/6.3V_8
+1.05V
+3V
C158
1u/6.3V_4
11
+1.05V +V1.05S_AXCK_LCPLL
+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL
A A
L18 2.2uH/210mA_8
C88
47u/6.3V_8
C77
47u/6.3V_8
C595
1u/6.3V_4
L17 2.2uH/210mA_8
C89
47u/6.3V_8
42mA41mA
C79
47u/6.3V_8
C596
1u/6.3V_4
PCH HDA Power
+3V_S5
R252 *SHORT_6
11mA
+V3.3DX_1.5DX_1.8DX_AUDIO
C234
0.1u/10V_4
Place close to ball
5
4
3
2
L14 2.2uH/210mA_8
C68
47u/6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
31mA
C76
47u/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 5/6 (POWER)
LPT 5/6 (POWER)
LPT 5/6 (POWER)
C594
1u/6.3V_4
1
ZRQ
ZRQ
ZRQ
11 47
11 47
11 47
3A
3A
3A
5
4
3
2
1
Haswell ULT (GND)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U42O
HSW_ULT_DDR3L
15 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D50
D51
D53
D54
D55
D57
D59
D62
G18
G22
H13
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
HSW_ULT_DDR3L
U42P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
VSS
16 OF 19
VSS_SENSE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
VSS_SENSE_R
U42R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
R591 *SHORT_4
R593 100/F_4
HSW_ULT_DDR3L
D D
C C
B B
A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U42N
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
AP3
AR5
AU1
HSW_ULT_DDR3L
18 OF 19
VSS_SENSE 38
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
12
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
U42Q
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60
TP97
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_B2
A A
5
TP77
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
4
HSW_ULT_DDR3L
17 OF 19
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
3
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
TP_DC_TEST_A62
AV1
TP_DC_TEST_AV1
AW1
TP_DC_TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TP_DC_TEST_AW63
TP76
TP74
TP78
TP95
TP94
TP96
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
2
Friday, April 12, 2013
PROJECT :
LPT 6/6 (GND)
LPT 6/6 (GND)
LPT 6/6 (GND)
1
ZRQ
ZRQ
ZRQ
12 47
12 47
12 47
3A
3A
3A
5
H_SYS_PWROK_XDP
R287 *1K_4
+3V_S5
4
3
2
1
13
+3V
D D
C C
B B
XDP_DBRESET_N
R240 *1K_4
HWPG_1.05V_S55,33,36
SYS_PWROK7
R766 *SHORT_6
R286 1K_4
R288 *SHORT_4
APS3
XDP_PREQ#4
XDP_PRDY#4
CFG06
CFG16
CFG26
CFG36
XDP_BPM#04
XDP_BPM#14
CFG46,8
CFG56
CFG66
CFG76
PWR_DEBUG5
CLK_SDATA8,14,15,23,32
CLK_SCLK8,14,15,23,32
XDP_TCK18
XDP_TCK04,8
R745 *SHORT_6
APS
CN19
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
5
R767 *SHORT_6
R765 *SHORT_4
R742 *0_6
R764 *SHORT_4
R763 *SHORT_4
R762 *SHORT_4
R744 *0_6
R761 *SHORT_4
R760 *SHORT_4
R759 *SHORT_4
R758 *SHORT_4
+3VCC_S5
SYS_RESET#
SUSB# 7,33
PCH_SLP_S5# 7
SUSC# 7,33
PCH_SLP_A# 7
RTC_RST# 8
NBSWON# 31,33
SYS_RESET# 7
PCH_SLP_S0# 7,33
4
+3VPCU
+3VPCU
APS7APS1
VCCST_PWRGD5
XDP_PREQ_N
XDP_PRDY_N
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
VCCST_PWRGD_XDP
NBSWON#
H_SYS_PWROK_XDP
U56
NC1VCC
2
A
3
GND
74AUP1G07GW
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST_N
R489
10K_4
NOA_STBP_0
NOA_STBN_0
CFG8
CFG9
CFG10
CFG11
NOA_STBP_1
NOA_STBN_1
CFG12
CFG13
CFG14
CFG15
CK_XDP_P_R
CK_XDP_N_R
XDP_RST_R_N
XDP_DBRESET_N
XDP_TDO
XDP_TRST_N
XDP_TDI
XDP_TMS
+3V
NOA_STBP_0 6
NOA_STBN_0 6
CFG8 6
CFG9 6
CFG10 6
CFG11 6
NOA_STBP_1 6
NOA_STBN_1 6
CFG12 6
CFG13 6
CFG14 6
CFG15 6
R236 *SHORT_4
R237 *SHORT_4
R238 1K_4
R239 *SHORT_4
R219 *51_4
C176
0.1u/10V_4
U15
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*74CBTLV3126
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SYS_RESET#
1B
2B
3B
4B
DPAD
GND
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
Friday, April 12, 2013
Friday, April 12, 2013
Friday, April 12, 2013
CLK_PCIE_XDPP 9
CLK_PCIE_XDPN 9
PLTRST# 7,16,26,27,28,33
+1.05V_S5
3
6
8
11
15
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
XDP_TDO_CPU 4
XDP_TDI_CPU 4
XDP_TMS_CPU 4
XDP_TRST# 4,8
ZRQ
ZRQ
ZRQ
13 47
13 47
13 47
1
3A
3A
3A
TP123
TP107
TP124
TP108
TP125
TP109
TP126
TP110
TP111
TP127
TP112
TP128
TP129
TP113
TP130
TP114
TP131
TP115
TP132
TP116
TP133
TP117
TP134
TP118
TP135
TP144
TP143
TP136
TP146
TP138
TP145
TP137
TP139
TP119
TP120
TP140
TP121
TP141
TP122
TP142
XDP_TDO8
XDP_TDI8
XDP_TMS8
+1.05V
+3V
5
0.1u/10V_4
4
Y
3
C768
12
1
<DDR>
A A
Hynix
Elpida
B B
C C
+1.35V_SUS
D D
+DDR_VTT_RUN
M_A_DQS#[7:0]3
M_A_DQS[7:0]3
M_A_DQ[63:0]3
M_A_A[15:0]3
SO-DIMMB SPD A ddress is 0XA4
SO-DIMMB TS Ad dress is 0X34
M_A_BS#[2:0]3
M_A_CLK03
M_A_CLK0#3
M_A_CKE03
M_A_CS#03
M_A_RAS#3
M_A_CAS#3
M_A_WE#3
DDR3_DRAMRST#4,15
P/NVendo r
AKD5JGST400
DDR3L 1333Mhz 4Gb
DDR3L 1600Mhz 4GbAKD5JG ST404
SO-DIMMB SPD A ddress is 0XA4
SO-DIMMB TS Ad dress is 0X34
M_A_CLK13
M_A_CLK1#3
M_A_CKE13
M_A_CS#13
Place these Caps near Memory Down
C461
C421
10u/6.3V_6
C695
*1u/6.3V_4
C379
1u/6.3V_4
C361
1u/6.3V_4
C373
1u/6.3V_4
C725
*0.1u/10V_4
C697
*0.1u/10V_4
C403
1u/6.3V_4
C690
1u/6.3V_4
C411
10u/6.3V_6
*10u/6.3V_6
C696
C673
*1u/6.3V_4
1u/6.3V_4
C433
C440
*1u/6.3V_4
*1u/6.3V_4
C360
C455
*1u/6.3V_4
*1u/6.3V_4
C715
C688
*1u/6.3V_4
1u/6.3V_4
C716
C717
*0.1u/10V_4
*0.1u/10V_4
C701
C677
*0.1u/10V_4
*0.1u/10V_4
C692
C686
1u/6.3V_4
1u/6.3V_4
C687
C377
1u/6.3V_4
1u/6.3V_4
1
2
U23
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
H1
+SMDDR_VREF_DQ0
N3
M_A_A0
P7
M_A_A1
P3
M_A_A2
N2
M_A_A3
P8
M_A_A4
P2
M_A_A5
R8
M_A_A6
R2
M_A_A7
T8
M_A_A8
R3
M_A_A9
L7
M_A_A10
R7
M_A_A11
N7
M_A_A12
T3
M_A_A13
T7
M_A_A14
M7
M_A_A15
M2
M_A_BS#0
N8
M_A_BS#1
M3
M_A_BS#2
J7
K7
K9
K1
M_A_ODT0
L2
J3
K3
L3
F3
M_A_DQS1
C7
M_A_DQS3
E7
D3
G3
M_A_DQS#1
B7
M_A_DQS#3
T2
L8
R402
240/F_4
J1
1 2
L1
J9
L9
3
M_A_DQ12
M_A_DQ11
M_A_DQ13
M_A_DQ15
M_A_DQ9
M_A_DQ10
M_A_DQ8
M_A_DQ14
M_A_DQ30
M_A_DQ25
M_A_DQ31
M_A_DQ28
M_A_DQ27
M_A_DQ29
M_A_DQ26
M_A_DQ24
+1.35V_SUS +1.35V_SUS +1.35V_SUS +1.35V_SUS
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST#
M_A_ZQ2M_A_ZQ1
R367
240/F_4
1 2
BYTE1_8-15 BYTE0_0-7
U46
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
2
C460
*10u/6.3V_6
C414
1u/6.3V_4
C375
*1u/6.3V_4
C444
*1u/6.3V_4
C714
*1u/6.3V_4
C708
*0.1u/10V_4
C420
*0.1u/10V_4
100-BALL
SDRAM DDR3
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C666
*10u/6.3V_6
C318
*1u/6.3V_4
C352
*1u/6.3V_4
C445
*1u/6.3V_4
C672
*1u/6.3V_4
C659
*0.1u/10V_4
C450
*0.1u/10V_4
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M_A_DQ11
M_A_DQ12
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ8
M_A_DQ10
M_A_DQ9
M_A_DQ25
M_A_DQ30
M_A_DQ28
M_A_DQ31
M_A_DQ29
M_A_DQ26
M_A_DQ24
M_A_DQ27
C718
10u/6.3V_6
C340
1u/6.3V_4
C363
*1u/6.3V_4
C453
*1u/6.3V_4
C711
1u/6.3V_4
C662
*0.1u/10V_4
C700
*0.1u/10V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST# DDR3_DRAMRST#
M_A_ZQ6
R792
240/F_4
1 2
C699
C462
12
10u/6.3V_6
C362
*1u/6.3V_4
C710
*1u/6.3V_4
C713
*1u/6.3V_4
C674
1u/6.3V_4
C661
*0.1u/10V_4
C663
*0.1u/10V_4
C436
0.047u/25V_4
12
C357
*10u/6.3V_6
C338
*1u/6.3V_4
C657
*1u/6.3V_4
C427
*1u/6.3V_4
C667
*1u/6.3V_4
C446
*0.1u/10V_4
C658
*0.1u/10V_4
C434
0.047u/25V_4
12
*10u/6.3V_6
C448
*1u/6.3V_4
C689
1u/6.3V_4
C684
*1u/6.3V_4
C712
*1u/6.3V_4
C669
*0.1u/10V_4
C409
*0.1u/10V_4
C437
0.047u/25V_4
Place these Caps near Memory Down CA & DQ pin
12
12
12
C388
C720
0.047u/25V_4
3
C719
0.047u/25V_4
0.047u/25V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_ODT0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS1
M_A_DQS3
M_A_DQS#1
M_A_DQS#3
DDR3_DRAMRST#
M_A_ZQ5
R775
240/F_4
1 2
C463
10u/6.3V_6
C416
1u/6.3V_4
C413
1u/6.3V_4
C442
*1u/6.3V_4
C664
*1u/6.3V_4
C698
*0.1u/10V_4
C682
*0.1u/10V_4
C691
1u/6.3V_4
C417
1u/6.3V_4
C350
10u/6.3V_6
C378
1u/6.3V_4
C358
1u/6.3V_4
C447
*1u/6.3V_4
C429
*1u/6.3V_4
C706
*0.1u/10V_4
C678
*0.1u/10V_4
C722
10u/6.3V_6
C309
10u/6.3V_6
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
SP : ELPIDA DRAM P/N : AKD5JGST 400
HYNIX DRAM P/N : AKD5JGQTW 01
12
12
C296
*10u/6.3V_6
C452
*1u/6.3V_4
C707
1u/6.3V_4
C372
*1u/6.3V_4
C468
*1u/6.3V_4
C349
*0.1u/10V_4
C457
*0.1u/10V_4
C398
0.047u/25V_4
C385
0.047u/25V_4
4
BYTE6_48-55 BYTE7_56-63
U24
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
M_A_DQ41
DQL0
F7
M_A_DQ42
DQL1
F2
M_A_DQ40
DQL2
F8
M_A_DQ46
DQL3
H3
M_A_DQ44
DQL4
H8
M_A_DQ43
DQL5
G2
M_A_DQ45
DQL6
H7
M_A_DQ47
DQL7
D7
M_A_DQ55
DQU0
C3
M_A_DQ52
DQU1
C8
M_A_DQ49
DQU2
C2
M_A_DQ51
DQU3
A7
M_A_DQ48
DQU4
A2
M_A_DQ53
DQU5
B8
M_A_DQ54
DQU6
A3
M_A_DQ50
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
BYTE5_40-47 BYTE4_32-39
U47
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
12
12
100-BALL
SDRAM DDR3
C464
10u/6.3V_6
C458
*1u/6.3V_4
C660
1u/6.3V_4
C705
*1u/6.3V_4
C704
1u/6.3V_4
C351
*0.1u/10V_4
C402
*0.1u/10V_4
C394
0.047u/25V_4
C387
0.047u/25V_4
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
12
12
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
C321
*10u/6.3V_6
C439
*1u/6.3V_4
C709
*1u/6.3V_4
C342
1u/6.3V_4
C432
1u/6.3V_4
C407
*0.1u/10V_4
C456
*0.1u/10V_4
C703
0.047u/25V_4
C726
0.047u/25V_4
E3
M_A_DQ42
F7
M_A_DQ41
F2
M_A_DQ46
F8
M_A_DQ40
H3
M_A_DQ47
H8
M_A_DQ45
G2
M_A_DQ43
H7
M_A_DQ44
D7
M_A_DQ52
C3
M_A_DQ55
C8
M_A_DQ51
C2
M_A_DQ49
A7
M_A_DQ53
A2
M_A_DQ54
B8
M_A_DQ50
A3
M_A_DQ48
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C343
C426
10u/6.3V_6
*10u/6.3V_6
C441
C449
*1u/6.3V_4
1u/6.3V_4
C694
C656
1u/6.3V_4
1u/6.3V_4
C443
C356
1u/6.3V_4
*1u/6.3V_4
C702
C451
1u/6.3V_4
*1u/6.3V_4
C425
C382
*0.1u/10V_4
*0.1u/10V_4
C454
C376
*0.1u/10V_4
*0.1u/10V_4
12
12
C467
C400
0.047u/25V_4
0.047u/25V_4
12
12
C384
C724
0.047u/25V_4
0.047u/25V_4
4
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
5
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS0
M_A_DQS2
M_A_DQS#0
M_A_DQS#2
DDR3_DRAMRST#
M_A_ZQ3
R405
240/F_4
1 2
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS0
M_A_DQS2
M_A_DQS#0
M_A_DQS#2
DDR3_DRAMRST#
M_A_ZQ7
R787
240/F_4
1 2
+VREF_CA_CPU
+VREFDQ_SA_M3
5
U25
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
RAM _DDR3L
U48
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
RAM _DDR3
R382 *SHORT_6
M3 solution
R337 *SHORT_6
M3 solution
6
BYTE0_0-7BYTE1_8-15
BYTE2_16-23BYTE3_24-31
E3
M_A_DQ4
DQL0
F7
M_A_DQ2
DQL1
F2
M_A_DQ5
DQL2
F8
M_A_DQ6
DQL3
H3
M_A_DQ1
DQL4
H8
M_A_DQ3
DQL5
G2
M_A_DQ0
DQL6
H7
M_A_DQ7
DQL7
D7
M_A_DQ16
DQU0
C3
M_A_DQ19
DQU1
C8
M_A_DQ17
DQU2
C2
M_A_DQ18
DQU3
A7
M_A_DQ23
DQU4
A2
M_A_DQ20
DQU5
B8
M_A_DQ22
DQU6
A3
M_A_DQ21
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
100-BALL
SDRAM DDR3
BYTE2_16-23BYTE3_24-31 BYTE6_48-55 BYTE7_56-63
E3
M_A_DQ2
DQL0
F7
M_A_DQ4
DQL1
F2
M_A_DQ6
DQL2
F8
M_A_DQ5
DQL3
H3
M_A_DQ7
DQL4
H8
M_A_DQ0
DQL5
G2
M_A_DQ3
DQL6
H7
M_A_DQ1
DQL7
D7
M_A_DQ19
DQU0
C3
M_A_DQ16
DQU1
C8
M_A_DQ18
DQU2
C2
M_A_DQ17
DQU3
A7
M_A_DQ20
DQU4
A2
M_A_DQ22
DQU5
B8
M_A_DQ21
DQU6
A3
M_A_DQ23
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
100-BALL
SDRAM DDR3
M1 solution
+1.35V_SUS
Vref_CA
R391
1.8K/F_4
R392
1.8K/F_4
M1 solution
+1.35V_SUS
R347
1.8K/F_4
R349
1.8K/F_4
+DDR_VTT_RUN
6
+SMDDR_VREF_DIMM
Vref_DQ
+SMDDR_VREF_DQ0
R387 2/F_6
C412
0.022u/16V_4
1 2
R381
24.9/F_4
R345 5.1/F_6
C347
0.022u/16V_4
1 2
R335
24.9/F_4
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CKE0
M_A_CS#0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CKE1
M_A_CS#1
R374 34.8/F_4
R768 34.8/F_4
R364 34.8/F_4
R776 34.8/F_4
R779 34.8/F_4
R375 34.8/F_4
R361 34.8/F_4
R370 34.8/F_4
R780 34.8/F_4
R784 34.8/F_4
R383 34.8/F_4
R379 34.8/F_4
R388 34.8/F_4
R397 34.8/F_4
R401 34.8/F_4
R399 34.8/F_4
R400 34.8/F_4
R783 34.8/F_4
R772 34.8/F_4
R384 34.8/F_4
R378 34.8/F_4
R398 34.8/F_4
R396 34.8/F_4
R371 34.8/F_4
R773 34.8/F_4
R365 34.8/F_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
DDR3_DRAMRST#
1 2
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
1 2
C438
470p/50V_4
C374
470p/50V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
M_A_ZQ4
R369
240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
M_A_ZQ8
R793
240/F_4
CLK_SCLK8,13,15,23,32
CLK_SDATA8,13,15,23,32
WP =1 : WRITE DISABLE
7
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M_A_ODT0
M_A_CLK1
M_A_CLK1#
M_A_CLK0
M_A_CLK0#
7
U26
BYTE4_32-39BYTE5_40-47
E3
M_A_DQ33
DQL0
VREFCA
F7
M_A_DQ35
DQL1
VREFDQ
F2
M_A_DQ32
DQL2
F8
M_A_DQ39
DQL3
A0
H3
M_A_DQ36
DQL4
A1
H8
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
U49
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
100-BALL
SDRAM DDR3
R802 *0_4
R804 *0_4
+3V
R360 30/F_4
R746 26.1/F_4
R753 26.1/F_4
R755 26.1/F_4
R769 26.1/F_4
M_A_DQ34
DQL5
G2
M_A_DQ38
DQL6
H7
M_A_DQ37
DQL7
D7
M_A_DQ60
DQU0
C3
M_A_DQ62
DQU1
C8
M_A_DQ61
DQU2
C2
M_A_DQ63
DQU3
A7
M_A_DQ56
DQU4
A2
M_A_DQ59
DQU5
B8
M_A_DQ57
DQU6
A3
M_A_DQ58
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
E3
M_A_DQ35
DQL0
F7
M_A_DQ33
DQL1
F2
M_A_DQ39
DQL2
F8
M_A_DQ32
DQL3
H3
M_A_DQ37
DQL4
H8
M_A_DQ38
DQL5
G2
M_A_DQ34
DQL6
H7
M_A_DQ36
DQL7
D7
M_A_DQ62
DQU0
C3
M_A_DQ60
DQU1
C8
M_A_DQ63
DQU2
C2
M_A_DQ61
DQU3
A7
M_A_DQ59
DQU4
A2
M_A_DQ57
DQU5
B8
M_A_DQ58
DQU6
A3
M_A_DQ56
DQU7
+1.35V_SUS+1.35V_SUS+1.35V_SUS +1.35V_SUS
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
SPD_A0
R796 *1K_4
SPD_A1
R799 *1K_4
SPD_A2
R803 *1K_4
U50
6
SPD_CLK_SCLK
SCL
5
SPD_CLK_SDATA
SDA
7
R798 *1K_4
WP
*M24C02-WMN6TP
R800
*1K_4
SPD address:A2
+1.35V_SUS
+DDR_VTT_RUN
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Shee t of
Date: Shee t of
Date: Shee t of
PROJECT :
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
Friday, April 12, 2013
Friday, April 12, 2013
Friday, April 12, 2013
R797 *1K_4
R801 *1K_4
R805 *1K_4
A0
A1
A2
VCC
GND
8
+3V
1
SPD_A0
2
SPD_A1
+3V
3
SPD_A2
8
4
C728
*0.1u/10V_4
ZRQ
ZRQ
ZRQ
14 47
14 47
14 47
8
3A
3A
3A
5
4
3
2
1
M_B_A[15:0]3
D D
M_B_BS#03
M_B_BS#13
M_B_BS#23
M_B_CS#03
M_B_CS#13
M_B_CLK03
M_B_CLK0#3
M_B_CLK13
M_B_CLK1#3
M_B_CKE03
M_B_CKE13
M_B_CAS#3
M_B_RAS#3
R312 10K_4
R319 10K_4
+3V
C C
B B
M_B_WE#3
CLK_SCLK8,13,14,23,32
CLK_SDATA8,13,14,23,32
M_B_ODT0_DIMM4
M_B_ODT1_DIMM4
M_B_DQS[7:0]3
M_B_DQS#[7:0]3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQS1
M_B_DQS3
M_B_DQS5
M_B_DQS7
M_B_DQS0
M_B_DQS2
M_B_DQS4
M_B_DQS6
M_B_DQS#1
M_B_DQS#3
M_B_DQS#5
M_B_DQS#7
M_B_DQS#0
M_B_DQS#2
M_B_DQS#4
M_B_DQS#6
JDIM5A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_B_DQ12
M_B_DQ14
M_B_DQ10
M_B_DQ13
M_B_DQ9
M_B_DQ8
M_B_DQ11
M_B_DQ15
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
M_B_DQ44
M_B_DQ41
M_B_DQ43
M_B_DQ45
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ42
M_B_DQ61
M_B_DQ60
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ59
M_B_DQ62
M_B_DQ63
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ2
M_B_DQ4
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ20
M_B_DQ23
M_B_DQ19
M_B_DQ36
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ32
M_B_DQ37
M_B_DQ35
M_B_DQ39
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ[63:0] 3
DDR3_DRAMRST#4,14
R327 *10K_4
+3V
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
2.48A
+3V
PM_EXTTS#1
C337 *0.1u/10V_4
+SMDDR_VREF_DQ1
M1 solution
+1.35V_SUS
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
15
+DDR_VTT_RUN
R308
+1.35V_SUS
C319
10u/6.3V_6
+3V
A A
Place these Caps near SO-DIMM
C293
10u/6.3V_6
C290
2.2u/6.3V_6
C298
10u/6.3V_6
C325
10u/6.3V_6
C316
0.1u/10V_4
C320
10u/6.3V_6
+DDR_VTT_RUN
5
C295
10u/6.3V_6
C303
1u/6.3V_4
C294
0.1u/10V_4
C292
0.1u/10V_4
C327
0.1u/10V_4
C304
1u/6.3V_4
0.1u/10V_4
C323
0.1u/10V_4
C314
1u/6.3V_4
+SMDDR_VREF_DIMM
+
C277
330u/2V_7343
C322
1u/6.3V_4
C326
0.1u/10V_4
C331
4.7u/6.3V_6
4
C313
0.1u/10V_4
2.2u/6.3V_6
C289
4.7u/6.3V_6
+SMDDR_VREF_DQ1
C302
C297
2.2u/6.3V_6
C299
4.7u/6.3V_6
+VREFDQ_SB_M3
M3 solution
3
R297 *SHORT_6
R305 2/F_6C324
C276
0.022u/16V_4
1 2
R299
24.9/F_4
1.8K/F_4
R309
1.8K/F_4
2
Vref_DQ
+SMDDR_VREF_DQ1
C288
470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ZRQ
ZRQ
ZRQ
15 47Friday, April 12, 2013
15 47Friday, April 12, 2013
15 47Friday, April 12, 2013
1
3A
3A
3A
1
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
place under BGA
A A
+1.05V_GFX
To be placed no further from the GPU
than bewteen BGA and Power supply
place near balls
place under BGA
1000mA
C564 EV@22u/6.3V_8
C563 EV@22u/6.3V_8
C153 EV@10u/6.3V_6
C109 EV@10u/6.3V_6
C118 EV@4.7u/6.3V_6
C143 EV@1u/6.3V_4
C123 EV@1u/6.3V_4
C570 EV@22u/6.3V_8
C569 EV@22u/6.3V_8
C98 EV@10u/6.3V_6
C70 EV@10u/6.3V_6
C133 EV@4.7u/6.3V_6
C80 EV@1u/6.3V_4
C78 EV@1u/6.3V_4
2500mA
B B
C C
J8/K8 0.4MM = 16mils
+3V_GFX
L8/M8 0.4MM = 16mils
PLACE CLOSE TO BGA
L8/M8
+3V_GFX
C243 EV@1u/6.3V_4
C240 EV@0.1u/10V_4
D D
C241 EV@0.1u/10V_4
PLACE CLOSE TO GPU BALLS L8/M8
1
2
2
AG19
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AC6
AJ28
AL11
C15
D19
D20
D23
D26
H31
AJ4
AJ5
V32
T8
J8
K8
L8
M8
U39A
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
VDD33_1
VDD33_2
VDD33_3
VDD33_4
EV@N14P
N14P
3
[PEG Interface]
3
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
PEX_REFCLK
PEX_REFCLK_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_WAKE
PEX_RST_N
PEX_CLKREQ_N
PEX_TERMP
TESTMODE
PEX_PLLVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
3.3V_AUX_NC
VDD_SENSE
GND_SENSE
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AL13
AK13
AJ26
AK26
AJ11
AJ12
AK12
AP29
AK11
AG26
AH12
AG12
P8
L4
L5
PEG_TX0PEG_TX0
PEG_TX#0PEG_TX#0
PEG_TX1
PEG_TX#1PEG_TX#1
PEG_TX2PEG_TX2
PEG_TX#2
PEG_TX3PEG_TX3
PEG_TX#3PEG_TX#3
R_PEG_RX0
R_PEG_RX#0
R_PEG_RX1
R_PEG_RX#1
R_PEG_RX2
R_PEG_RX#2
R_PEG_RX3
R_PEG_RX#3
PEX_TSTCLK
PEX_TSTCLK#
PEGX_RST#
PEX_CLKREQ#
PEX_TERMP
TESTMODE
4
PEG_TX0 9
PEG_TX#0 9
PEG_TX1 9
PEG_TX#1 9
PEG_TX2 9
PEG_TX#2 9
PEG_TX3 9
PEG_TX#3 9
C142 EV@0.22u/10V_4
C135 EV@0.22u/10V_4
C131 EV@0.22u/10V_4
C121 EV@0.22u/10V_4
C112 EV@0.22u/10V_4
C104 EV@0.22u/10V_4
C120 EV@0.22u/10V_4
C115 EV@0.22u/10V_4
R114 *EV@200/F_4
5
CLK_PCIE_VGA 9
CLK_PCIE_VGA# 9
0815 change R53 to 1% tolerance
R523 EV@2.49K/F_4
EV@10K/F_4
R157
PEX_PLLVDD
C96 EV@4.7u/6.3V_6
C87 EV@1u/6.3V_4 C72
C84 EV@0.1u/10V_4C242 EV@0.1u/10V_4
C182 EV@0.1u/10V_4
C185 EV@4.7u/6.3V_6
C184 EV@4.7u/6.3V_6
GPU_VCCP_SENSE 40
GPU_VSSP_SENSE 40
4
R110 EV@0_6C244 EV@4.7u/6.3V_6
place near BGA
place near ball
+3V_GFX
PLACE NEAR BGA
R1
5
6
R148
EV@10K/F_4
PEX_CLKREQ#
PEG_RX0 9
PEG_RX#0 9
PEG_RX1 9
PEG_RX#1 9
PEG_RX2 9
PEG_RX#2 9
PEG_RX3 9
PEG_RX#3 9
PLTRST#7,13,26,27,28,33
DGPU_HOLD_RST#10
PCH control PEGX_RST#
RSVD R1 and C1 for GV2 co-layout sDDR3
PEX_PLLVDD : 0.3MM = 12mils (150mA)
+1.05V_GFX
C1
*EV@GV2@1u/6.3V_4
AH12/AG12 need 210mA of +3V_GFX
8mils width
(0.2MM)
6
+3V_GFX+3V_GFX
Follow Z09 to isolate CLK_REQ#
2
1
Q23
EV@2N7002K
R154 *EV@0_4
3
7
8
N14P-GT
CLK_PEGA_REQ# 9
PU at page 9
+3V
C622
EV@0.1u/10V_4
2
1
R710 *EV@0_4
U45
3 5
EV@TC7SH08FU
4
PEGX_RST#
R694
EV@100K_4
PEGX_RST# 19
PEX_RST timing
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
DGPU 1/5 (PEG)
ZRQ
ZRQ
ZRQ
16 47Friday, April 12, 2013
16 47Friday, April 12, 2013
16 47Friday, April 12, 2013
8
16
3A
3A
3A
1
2
3
4
5
6
7
8
U39B
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FB_VREF_NC
FBA_WCK01
FBA_WCK23
FBA_WCK45
FBA_WCK67
RSVD
GND_PROBE
L28
VMA_DQ0
M29
VMA_DQ1
L29
VMA_DQ2
M28
VMA_DQ3
N31
VMA_DQ4
P29
VMA_DQ5
R29
VMA_DQ6
P28
VMA_DQ7
J28
VMA_DQ8
H29
VMA_DQ9
J29
VMA_DQ10
H28
VMA_DQ11
G29
VMA_DQ12
E31
VMA_DQ13
E32
VMA_DQ14
F30
VMA_DQ15
C34
VMA_DQ16
D32
VMA_DQ17
B33
VMA_DQ18
C33
VMA_DQ19
F33
VMA_DQ20
F32
VMA_DQ21
H33
VMA_DQ22
H32
VMA_DQ23
P34
VMA_DQ24
P32
VMA_DQ25
P31
VMA_DQ26
P33
VMA_DQ27
L31
VMA_DQ28
L34
VMA_DQ29
L32
VMA_DQ30
L33
VMA_DQ31
AG28
VMA_DQ32
AF29
VMA_DQ33
AG29
VMA_DQ34
AF28
VMA_DQ35
AD30
VMA_DQ36
AD29
VMA_DQ37
AC29
VMA_DQ38
AD28
VMA_DQ39
AJ29
VMA_DQ40
AK29
VMA_DQ41
AJ30
VMA_DQ42
AK28
VMA_DQ43
AM29
VMA_DQ44
AM31
VMA_DQ45
AN29
VMA_DQ46
AM30
VMA_DQ47
AN31
VMA_DQ48
AN32
VMA_DQ49
AP30
VMA_DQ50
AP32
VMA_DQ51
AM33
VMA_DQ52
AL31
VMA_DQ53
AK33
VMA_DQ54
AK32
VMA_DQ55
AD34
VMA_DQ56
AD32
VMA_DQ57
AC30
VMA_DQ58
AD33
VMA_DQ59
AF31
VMA_DQ60
AG34
VMA_DQ61
AG32
VMA_DQ62
AG33
VMA_DQ63
R30
VMA_CLK0
R31
VMA_CLK0#
AB31
VMA_CLK1
AC31
VMA_CLK1#
15mils width
R28
FBA_DEBUG
AC28
FBA_DEBUG1
H26
R32
AC32
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
E1
FB_CLAMP
K27
+FB_PLLAVDD
U27
+FB_PLLAVDD
F1
FBVDDQ_SENSE_NC
F2
FB_GND_SENSE_NC
J27
FB_CAL_PD_VDDQ
H27
FB_CAL_PU_GND
H25
FB_CAL_TERM_GND
GDDR5
R118 change to 40.2/F
R141 change to 60.4/F
sDDR3
R118=42.2/F
R141=51.1/F
TP12
PLACE CLOSE TO GPU BALLS
+1.5V_GFX
U30
FBA_CMD0 (FBA_CMD25)
T31
FBA_CMD1 (FBA_CMD23)
U29
FBA_CMD2
R34
FBA_CMD3 (FBA_CMD0)
R33
FBA_CMD4 (FBA_CMD10)
U32
FBA_CMD5 (FBA_CMD26)
U33
FBA_CMD6 (FBA_CMD14)
U28
FBA_CMD7
V28
FBA_CMD8 (FBA_CMD1)
V29
FBA_CMD9 (FBA_CMD22)
V30
FBA_CMD10 (FBA_CMD20)
U34
FBA_CMD11 (FBA_CMD24)
U31
FBA_CMD12 (FBA_CMD18)
V34
FBA_CMD13 (FBA_CMD9)
V33
FBA_CMD14 (FBA_CMD29)
Y32
FBA_CMD15 (FBA_CMD8)
AA31
FBA_CMD16 (FBA_CMD27)
AA29
FBA_CMD17 (FBA_CMD15)
AA28
FBA_CMD18 (FBA_CMD11)
AC34
FBA_CMD19 (FBA_CMD16)
AC33
FBA_CMD20 (FBA_CMD28)
AA32
FBA_CMD21 (FBA_CMD3)
AA33
FBA_CMD22 (FBA_CMD17)
Y28
FBA_CMD23 (FBA_CMD5)
Y29
FBA_CMD24 (FBA_CMD4)
W31
FBA_CMD25 (FBA_CMD21)
Y30
FBA_CMD26 (FBA_CMD6)
AA34
FBA_CMD27 (FBA_CMD13)
Y31
FBA_CMD28 (FBA_CMD19)
Y34
FBA_CMD29 (FBA_CMD12)
Y33
FBA_CMD30
V31
FBA_CMD31 (NC)
P30
FBA_DQM0
F31
FBA_DQM1
F34
FBA_DQM2
M32
FBA_DQM3
AD31
FBA_DQM4
AL29
FBA_DQM5
AM32
FBA_DQM6
AF34
FBA_DQM7
M31
FBA_DQS_WP0
G31
FBA_DQS_WP1
E33
FBA_DQS_WP2
M33
FBA_DQS_WP3
AE31
FBA_DQS_WP4
AK30
FBA_DQS_WP5
AN33
FBA_DQS_WP6
AF33
FBA_DQS_WP7
M30
FBA_DQS_RN0
H30
FBA_DQS_RN1
E34
FBA_DQS_RN2
M34
FBA_DQS_RN3
AF30
FBA_DQS_RN4
AK31
FBA_DQS_RN5
AM34
FBA_DQS_RN6
AF32
FBA_DQS_RN7
AA27
FBVDDQ_1
AA30
FBVDDQ_2
AB27
FBVDDQ_3
AB33
FBVDDQ_4
AC27
FBVDDQ_5
AD27
FBVDDQ_6
AE27
FBVDDQ_7
AF27
FBVDDQ_8
AG27
FBVDDQ_9
B13
FBVDDQ_10
B16
FBVDDQ_11
B19
FBVDDQ_12
E13
FBVDDQ_13
E16
FBVDDQ_14
E19
FBVDDQ_15
H10
FBVDDQ_16
H11
FBVDDQ_17
H12
FBVDDQ_18
H13
FBVDDQ_19
H14
FBVDDQ_20
H15
FBVDDQ_21
H16
FBVDDQ_22
H18
FBVDDQ_23
H19
FBVDDQ_24
H20
FBVDDQ_25
H21
FBVDDQ_26
H22
FBVDDQ_27
H23
FBVDDQ_28
H24
FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31
L27
FBVDDQ_32
M27
FBVDDQ_33
N27
FBVDDQ_34
P27
FBVDDQ_35
R27
FBVDDQ_36
T27
FBVDDQ_37
T30
FBVDDQ_38
T33
FBVDDQ_39
V27
FBVDDQ_40
W27
FBVDDQ_41
W30
FBVDDQ_42
W33
FBVDDQ_43
Y27
FBVDDQ_44
EV@N14P
[MEMORY I/F A]
(FBA_DEBUG) FBA_DEBUG0
+
C39 *EV@330u/2V_7343
+
C546 EV@330u/2V_7343
(NC) FBA_DEBUG1
FBA_CMD_RFU0
FBA_CMD_RFU1
FBA_WCK01_N
FBA_WCK23_N
FBA_WCK45_N
FBA_WCK67_N
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
FB_DLL_AVDD
FBA_PLL_AVDD
FBVDDQ_PROBE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
+1.5V_GFX
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
TP10
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
FBA_CMD[30:0]21
A A
VMA_DM[7..0]21
DBI
B B
VMA_WDQS[7..0]21
EDC
VMA_RDQS[7..0]21
Follow DG to place caps
+1.5V_GFX
C C
0.1u x 6
stuff x4
1u x 6
stuff x4
4.7u x 6
stuff x4
10u x 4
stuff x2
D D
22u x 4
stuff x2
PLACE CLOSE TO GPU BALLS
C132 EV@0.1u/10V_4
C83 EV@0.1u/10V_4
C161 EV@0.1u/10V_4
C148 EV@0.1u/10V_4
C108 *EV@0.1u/10V_4
C99 *EV@0.1u/10V_4
C155 EV@1u/6.3V_4
C110 EV@1u/6.3V_4
C63 EV@1u/6.3V_4
C86 EV@1u/6.3V_4
C141 *EV@1u/6.3V_4
C145 *EV@1u/6.3V_4
C107 EV@4.7u/6.3V_6
C55 EV@4.7u/6.3V_6
C130 EV@4.7u/6.3V_6
C62 EV@4.7u/6.3V_6
C57 *EV@4.7u/6.3V_6
C85 *EV@4.7u/6.3V_6
C53 EV@10u/6.3V_6
C49 EV@10u/6.3V_6
C52 *EV@10u/6.3V_6
C56 *EV@10u/6.3V_6
C100 EV@22u/6.3V_8
C47 EV@22u/6.3V_8
C90 *EV@22u/6.3V_8
C50 *EV@22u/6.3V_8
PLACE CLOSE TO BGA
FBC_CMD[30:0]22
VMC_DM[7..0]22
DBI
VMC_WDQS[7..0]22
EDC
VMC_RDQS[7..0]22
VMA_CLK0 21
VMA_CLK0# 21
VMA_CLK1 21
VMA_CLK1# 21
R81 *EV@60.4/F_4
R101 *EV@60.4/F_4
No stuff follow CRB
GC6 connect to EC
R678 *EV@SHORT_4
R677 EV@10K_4
C70 close ball K27 35mA
C81 EV@0.1u/10V_4
TP92
TP90
R102 EV@40.2/F_4
R100 EV@42.2/F_4
R115 EV@51.1/F_4
L15 EV@PBY160808T-30Y-N/2A/300ohm_6
C58 EV@22u/6.3V_8
C82 EV@0.1u/10V_4
C69 *EV@0.1u/10V_4
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
TP16
VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7
VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7
VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7
+1.5V_GFX
EC_FB_CLAMP 19,20,33
+1.5V_GFX
RSVD 330u, ZQS have one
1
2
3
4
U39C
D13
FBB_CMD0 (FBC_CMD25)
E14
FBB_CMD1 (FBC_CMD23)
F14
FBC_CMD2
A12
FBB_CMD3 (FBC_CMD0)
B12
FBB_CMD4 (FBC_CMD10)
C14
FBB_CMD5 (FBC_CMD26)
B14
FBB_CMD6 (FBC_CMD14)
G15
FBC_CMD7
F15
FBB_CMD8 (FBC_CMD1)
E15
FBB_CMD9 (FBC_CMD22)
D15
FBB_CMD10 (FBC_CMD20)
A14
FBB_CMD11 (FBC_CMD24)
D14
FBB_CMD12 (FBC_CMD18)
A15
FBB_CMD13 (FBC_CMD9)
B15
FBB_CMD14 (FBC_CMD29)
C17
FBB_CMD15 (FBC_CMD8)
D18
FBB_CMD16 (FBC_CMD27)
E18
FBB_CMD17 (FBC_CMD15)
F18
FBB_CMD18 (FBC_CMD11)
A20
FBB_CMD19 (FBC_CMD16)
B20
FBB_CMD20 (FBC_CMD28)
C18
FBB_CMD21 (FBC_CMD3)
B18
FBB_CMD22 (FBC_CMD17)
G18
FBB_CMD23 (FBC_CMD5)
G17
FBB_CMD24(FBC_CMD4)
F17
FBB_CMD25 (FBC_CMD21)
D16
FBB_CMD26 (FBC_CMD6)
A18
FBB_CMD27 (FBC_CMD13)
D17
FBB_CMD28 (FBC_CMD19)
A17
FBB_CMD29 (FBC_CMD12)
B17
FBC_CMD30
E17
FBC_CMD31 (NC)
E11
FBC_DQM0
E3
FBC_DQM1
A3
FBC_DQM2
C9
FBC_DQM3
F23
FBC_DQM4
F27
FBC_DQM5
C30
FBC_DQM6
A24
FBC_DQM7
D10
FBC_DQS_WP0
D5
FBC_DQS_WP1
C3
FBC_DQS_WP2
B9
FBC_DQS_WP3
E23
FBC_DQS_WP4
E28
FBC_DQS_WP5
B30
FBC_DQS_WP6
A23
FBC_DQS_WP7
D9
FBC_DQS_RN0
E4
FBC_DQS_RN1
B2
FBC_DQS_RN2
A9
FBC_DQS_RN3
D22
FBC_DQS_RN4
D28
FBC_DQS_RN5
A30
FBC_DQS_RN6
B23
FBC_DQS_RN7
EV@N14P
C66/C67 close to ball U27
C45 close to BGA
+FB_PLLAVDD = 0.3mm 12mils
U27+H17 62mA
5
+1.05V_GFX
MEMORY I/F C
(FBC_DEBUG) FBB_DEBUG0
FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
(NC) FBB_DEBUG1
FBB_CMD_RFU0
FBB_CMD_RFU1
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
FBB_PLL_AVDD
6
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26
D12
E12
E20
F20
G14
G20
C12
C20
F8
E8
A5
A6
D24
D25
B27
C27
D6
D7
C6
B6
F26
E26
A26
A27
H17
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63
VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#
FBC_DEBUG
FBC_DEBUG1
+FB_PLLAVDD
17
VMA_DQ[63:0]
VMC_DQ[63:0]
For Fermi
FBA_CMD2
FBA_CMD3
FBA_CMD5
FBA_CMD18
FBA_CMD19
FBC_CMD2
FBC_CMD3
FBC_CMD5
FBC_CMD18
FBC_CMD19
0815 confirm with ZQS (sDDR3)
VMC_CLK0 22
VMC_CLK0# 22
VMC_CLK1 22
VMC_CLK1# 22
R138 *EV@60.4/F_4
R125 *EV@60.4/F_4
No stuff follow CRB
C128 EV@0.1u/10V_4
C107 close to ball H17
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
DGPU 2/5 (Memory)
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
VMA_DQ[63:0] 21
VMC_DQ[63:0] 22
R7 EV@10K/F_4
R8 EV@10K/F_4
R15 EV@10K/F_4
R466 EV@10K/F_4
R464 EV@10K/F_4
R161 EV@10K/F_4
R167 EV@10K/F_4
R137 EV@10K/F_4
R535 EV@10K/F_4
R541 EV@10K/F_4
+1.5V_GFX
N14P-GV2
N14P-GT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRQ
ZRQ
ZRQ
17 47Friday, April 12, 2013
17 47Friday, April 12, 2013
17 47Friday, April 12, 2013
8
3A
3A
3A
1
2
3
4
5
6
7
8
U39D
AH8
N14P-GV2
N14P-GT
A A
B B
C C
NV_PLLVDD 0.3MM=12mils 78mA
+1.05V_GFX
D D
L19 EV@160808-30Y/1A/30ohm_6
GPU_SP_PLLVDD 0.3MM=12mils
+1.05V_GFX
L20 EV@160808-0180P/1.5A/180ohm_6
C178
C196
EV@22u/6.3V_8
EV@4.7u/6.3V_6
C135 close to ball AD8
C191
EV@22u/6.3V_8
C193
C198
EV@0.1u/10V_4
EV@0.1u/10V_4
NV_PLLVDD
C187
EV@0.1u/10V_4
AE8 : 71mA
AD7 : 41mA
SP_VID_PLLVDD
AG8
AG9
AJ8
AF7
AG7
AF6
AG6
AF8
AN2
AB8
AC7
AC8
AD6
AG10
AP9
AP8
AD8
AE8
AD7
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPAB_RSET
IFPC_PLLVDD
IFPD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
IFPC_RSET
IFPD_RSET
IFPEF_PLLVDD
IFPE_IOVDD
IFPF_IOVDD
IFPEF_RSET
DACA_VDD
DACA_VREF
DACA_RSET
PLLVDD
SP_PLLVDD
VID_PLLVDD
EV@N14P
[IFPA/B_LVDS]
[IFPC/D_TMDS]
[IFPE/F_DP]
[DACA/B_CRT]
[XTAL IN]
IFPA_TXC_N
IFPA_TXD0_N
IFPA_TXD1_N
IFPA_TXD2_N
IFPA_TXD3_N
IFPB_TXC_N
IFPB_TXD4_N
IFPB_TXD5_N
IFPB_TXD6_N
IFPB_TXD7_N
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
XTAL_OUTBUFF
close to balls one by one ball
1
2
3
4
IFPA_TXC
IFPA_TXD0
IFPA_TXD1
IFPA_TXD2
IFPA_TXD3
IFPB_TXC
IFPB_TXD4
IFPB_TXD5
IFPB_TXD6
IFPB_TXD7
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
I2CA_SCL
I2CA_SDA
XTAL_IN
XTAL_OUT
XTAL_SSIN
AN6
AM6
AN3
AP3
AM5
AN5
AK6
AL6
AH6
AJ6
AH9
AJ9
AP5
AP6
AL7
AM7
AM8
AN8
AL8
AK8
AG3
AG2
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4
AK3
AK2
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5
AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
AK9
AL10
AL9
AM9
AN9
R4
EV_CRTDCLK
R5
EV_CRTDDAT
H3
CLK_27M_VGA_2
H2
XTALOUT
J4
R675 EV@10K/F_4
H1
R676 EV@10K/F_4
5
R191 EV@2.2K_4
R196 EV@2.2K_4
C229
EV@10p/50V_4
Y5
1 3
2 4
EV@27MHZ
6
C230
EV@10p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
DGPU 3/5 (Display)
DGPU 3/5 (Display)
DGPU 3/5 (Display)
7
PROJECT :
ZRQ
ZRQ
ZRQ
18 47Friday, April 12, 2013
18 47Friday, April 12, 2013
18 47Friday, April 12, 2013
8
3A
3A
3A
18
1
N14P-GV2
N14P-GT
U39E
A A
A.ROM_SI - MEMORY STRAP
B.ROM_SO - 5K pull high
D.STRAP 0 - 45k pull high
E.STRAP 1 - 5K pull down
F.STRAP 3 - 5k pull down
C1.For N14P-GT sku
N14P-GT device ID=0x0FE4
1.ROM_SCLK =15K pull down
2.STRAP2 =25K pull down
3.STRAP4 = 45k Pull down
C.For N14P-GV2 sku
N14P-GV2 QS device ID=0x1292
1.ROM_SCLK =5K pull high
2.STRAP2= 15k pull down
3.STRAP4=45 pull down
//For N14P-GV2 QS
B B
N14P-GV2 ES device ID=0x12AD
1.ROM_SCLK =15K pull down
2.STRAP2= 30k pull high
3.STRAP4=10K pull down
//For N14P-GV2 ES
AM10
JTAG_TCK
JTAG_TMS
JTAG_TDIJTAG_TDI
JTAG_TDO
TP83
JTAG_TRST#
R180 EV@2.2K_4
C C
R181 EV@2.2K_4
R685 EV@2.2K_4
R665 EV@2.2K_4
N13P_SCL
N13P_SDA
DGPU_EDIDCLK
DGPU_EDIDDATA
GFx_SCL
GFx_SDA
AP11
AM11
AP12
AN11
R7
R6
R2
R3
T4
T3
K4
K3
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
THERMDP
THERMDN
R3
J2
N14x others
N14M-GE/GL
D D
GPIO8 VGA thrmtrip# => inform EC
over temperature protect
GPIO8_OVERT#
+3V_GFX
R249 *EV@0_4
40.2K
NC
1
Q29 EV@2N7002K
2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R3
R674 EV@40.2K/F_4
3
dGPU_OTP# = EC control dGPU_ALT# = EC control
R248 EV@0_4
1
J7
J6
J5
J3
J1
EV@N14P
dGPU_OTP# 33
PEGX_RST# 16
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
MULTISTRAP_RE F_GND
2
[MIOA]
[MIOB]
1
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO
BUFRST_N
CEC
3
Q25
EV@2N7002K
2
R231 EV@0_4
[MISC_GPIO/I2C/JTAG/THER]
[MISC2_ROM]
GPIO9 for ADPS circuit to infrom EC
NV dGPU VPS Alert
GPIO9_ALERT#
+3V_GFX
R232 *EV@0_4
2
Logical Strap Bit Mapping
PU-VDD PD
4.99K
10K
15K
20K
24.9K
30.1K
34.8K
45.3K
STRAP3
Optimus ---> 4.99k PD
Discrete only ---> 15K PD
Resistor P/N
4.99K---> CS24992FB26
10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29
24.9K---> CS32492FB16
30.1K---> CS33012FB18
34.8K---> CS33482FB22
45.3K---> CS34532FB18
VGPU_PSI
GPIO8_OVERT#
JTAG_TMS
JTAG_TDI
GPIO12_ACIN
GPIO9_ALERT#
JTAG_TCK
JTAG_TRST#
R228 EV@0_4
FB_CLAMP_MON
P6
M3
MEM_VDD_CTL
L6
LCD_BL_PWM
P5
LCD_VCC
P7
LCD_BLEN
L7
RSVD
M7
3DVision
N8
M1
GPIO8_OVERT#
M2
GPIO9_ALERT#
L1
M5
N3
GPIO12_ACIN
M4
VGPU_PSI
HPD_A
N4
HPD_C
P2
FRM_LCK
R8
HPD_D
M6
HPD_E
R1
HPD_B OR HPD_F
P3
RSVD
P4
RSVD
P1
H4
H6
H5
H7
L2
R670 *EV@10K_4
L3
1
PSI stuff 10k at GPU side ready, remove power page of pu 10k
GPIO20/21 available on N14P-GV2
ROM_SCLK
R178 EV@10K_4
ROM_SI
ROM_SO
CEC is NC for GK107
dGPU_ALT# 33
PEGX_RST#
3
1000 0000
1001 0001
00101010
1011 0011
1100
0100
1101
0101
1110 0110
1111
0111
R669 EV@10K/F_4
R668 EV@10K/F_4
R616 *EV@10K/F_4
R609 *EV@10K/F_4
R666 EV@10K/F_4
R667 EV@10K/F_4
R631 *EV@10K/F_4
R622 EV@10K/F_4
3
R225 *EV@SHORT_4
Q24
*EV@2N7002K
2
+3V_GFX
FB_CLAMP_REQ#_R
VGPU_PWMVID 40
VGPU_PSI 40
+3V_GFX
3
+3V_GFX
R227
EV@10K/F_4
GPIO12 HW throttle
over power protect
GPIO12_ACIN
*EV@MC74VHC1G08DFT2G
ROM_SO
ROM_SCLK
ROM_SI
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R214
*EV@4.99K/F_4
ROM_SI
ROM_SO
ROM_SCLK
R213
EV@10K/F_4
EC_FB_CLAMP 17,20,33
R226 *EV@0_4
1
Q26
EV@2N7002K
2
+3V_GFX
1
+3V_GFX
U43
4
4
Logical
Strapping Bit3
FB_1
PCI_DEVIDE[4]
RAMCFG[3]
3GIO_PADCFG[3]
PCI_DEVID[3] PCI_DEVID[1]
SOR3_EXPOSED
RESERVED PCIE_MAX SPEED DP_PLL_VDD33
+3V_GFX +3V_GFX
3
dGPU_OPP# = EC control
3
Q63
EV@2N7002K
2
2
1
3 5
RSVD VGPU TALERT#
to throttle GPU power
4
Strapping Bit2
FB_0
SUB_VENDOR
RAMCFG[2]
3GIO_PADCFG[2]
PCI_DEVID[2]
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
PCIE_SPEED_CHANGE_GEN3
R164
R198
EV@4.99K/F_4
EV@4.99K/F_4
R199
R163
*EV@15K/F_4
*EV@10K/F_4
+3V
EV@10K/F_4
R795
GPIO12 AC detect
AC high
DC low
FB_CLAMP_REQ# 33
dGPU_OPP# 33
GPU_THAL# 40
5
LogicalLogical
Strapping Bit1
SMB_ALT_ADDR
PCI_DEVID[5]
RAMCFG[1]
USER[1]
3GIO_PADCFG[1] 3GIO_PADCFG[0]
R672
EV@45.3K/F_4
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R673
*EV@10K/F_4
Hynix
AKG5MWUTW13 H5GQ2H24AFR-T2C
Samsung
SMBus(VGA)
2ND_MBCLK8,33
2ND_MBDATA8,33
5
Strapping Bit0
VGA_DEVICE
PEX_PLL_EN_TERM
RAMCFG[0]
USER[0]USER[3] USER[2]
PCI_DEVID[0]
R218
*EV@4.99K/F_4
R211
EV@45.3K/F_4
K4G20325FD-FC04
+3V_GFX
EC/S5 VGA/VGA
Logical
R223
*EV@34.8K/F_4
R224
EV@15K/F_4
5
2
6
Q31
EV@2N7002DW
6
1000
0010
XXXX
1111
0000
0100
0000
0111
R221
*EV@34.8K/F_4
R222
EV@4.99K/F_4
ROM_SIMfr. P/NP/NVendor
0100
0101
R265
EV@10K/F_4
43
1
6
+3V_GFX
7
ROM_SI ROM_SO ROM_SCLK STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
N14P_GV
L_10K
H_4.99K H_4.99K H_45.3K L_45.3K L_15K L_4.99K L_45.3K
N14P_GE
N14P_GT
R684
*EV@10K/F_4
R671
EV@45.3K/F_4
R266
EV@10K/F_4
GFx_SCL
GFx_SDA
L_10K L_10KL_10K H_10K H_10K L_10K L_10K L_10K
L_10K H_4.99K L_15K H_45.3K L_4.99K L_24.9K L_4.99K L_45.3K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
DGPU 4/5 (MIO/GPIO)
8
19
ZRQ
ZRQ
ZRQ
19 47Friday, April 12, 2013
19 47Friday, April 12, 2013
19 47Friday, April 12, 2013
8
3A
3A
3A
1
2
3
4
5
6
7
8
U39G
A2
GND_1
AA17
GND_2
AA18
+VGACORE
A A
B B
C C
for meet Power down sequence
for +3V_GFX
+VGACORE
+1.5V_GFX
U39F
AA12
VDD_001
AA14
VDD_002
AA16
VDD_003
AA19
VDD_004
AA21
VDD_005
AA23
VDD_006
AB13
VDD_007
AB15
VDD_008
AB17
VDD_009
AB18
VDD_010
AB20
VDD_011
AB22
VDD_012
AC12
VDD_013
AC14
VDD_014
AC16
VDD_015
AC19
VDD_016
AC21
VDD_017
AC23
VDD_018
M12
VDD_019
M14
VDD_020
M16
VDD_021
M19
VDD_022
M21
VDD_023
M23
VDD_024
N13
VDD_025
N15
VDD_026
N17
VDD_027
N18
VDD_028
N20
VDD_029
N22
VDD_030
P12
VDD_031
P14
VDD_032
P16
VDD_033
P19
VDD_034
P21
VDD_035
P23
VDD_036
R13
VDD_037
R15
VDD_038
R17
VDD_039
R18
VDD_040
R20
VDD_041
R22
VDD_042
T12
VDD_043
T14
VDD_044
T16
VDD_045
T19
VDD_046
T21
VDD_047
T23
VDD_048
U13
VDD_049
U15
VDD_050
U17
VDD_051
U18
VDD_052
U20
VDD_053
U22
VDD_054
V13
VDD_055
V15
VDD_056
V17
VDD_057
V18
VDD_058
V20
VDD_059
V22
VDD_060
W12
VDD_061
W14
VDD_062
W16
VDD_063
W19
VDD_064
W21
VDD_065
W23
VDD_066
Y13
VDD_067
Y15
VDD_068
Y18
VDD_069
Y17
VDD_070
Y20
VDD_071
Y22
VDD_072
EV@N14P
D14 EV@RB500V-40
D13 *EV@RB500V-40
[GPU VDD]
XVDD_001
XVDD_002
XVDD_003
XVDD_004
XVDD_005
XVDD_006
XVDD_007
XVDD_008
XVDD_009
XVDD_010
XVDD_011
XVDD_012
XVDD_013
XVDD_014
XVDD_015
XVDD_016
XVDD_017
XVDD_018
XVDD_019
XVDD_020
XVDD_021
XVDD_022
XVDD_023
XVDD_024
XVDD_025
XVDD_026
XVDD_027
XVDD_028
XVDD_029
XVDD_030
XVDD_031
XVDD_032
XVDD_033
XVDD_034
XVDD_035
XVDD_036
XVDD_037
XVDD_038
+3V_GFX
U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA20
AA22
AB12
AB14
AB16
AB19
AB21
AB23
AB28
AB30
AB32
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE28
AE30
AE32
AE33
AH10
AA15
AH13
AH16
AH19
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AK10
AL12
AL14
AL15
AL17
AL18
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AM13
AM16
AM19
AM22
AM25
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AP33
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
AB2
GND_10
GND_11
A33
GND_12
GND_13
GND_14
GND_15
GND_16
AB5
GND_17
AB7
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
AE2
GND_26
GND_27
GND_28
GND_29
GND_30
AE5
GND_31
AE7
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
AH2
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
AH5
GND_46
AH7
GND_47
AJ7
GND_48
GND_49
AK7
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
AL2
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
AL5
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
AN1
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
AN4
GND_81
AN7
GND_82
AP2
GND_83
GND_84
B1
GND_85
B10
GND_86
B22
GND_87
B25
GND_88
B28
GND_89
B31
GND_90
B34
GND_91
B4
GND_92
B7
GND_93
C10
GND_94
C13
GND_95
C19
GND_96
C22
GND_97
C25
GND_98
C28
GND_99
C7
GND_100
[GPU GND]
No stuff when GC6 support.
EV@N14P
+3V
D D
PU at VR
HWPG_1.5VGFX41
PU at VR
1
2
1
U36 EV@MC74VHC1G08DFT2G
3 5
R548 *EV@0_4
4
C568
*EV@0.1u/10V_4
+1.05V_GFX enable, PD at VR
2
1.05V_GFX_EN 41
3
GC6 need system 3V to control FBVDDQ
FBVDDQ_EN41
4
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_OPT_1
GND_OPT_2
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32
R527
EV@100K_4
+VGACORE
+VGACORE
+1.05V_GFX
+1.5V_GFX
+3V
C559
EV@0.1u/10V_4
5
4
U35 EV@SN74AHC1G32DCKR
2
1
VGPU_PWRGD_RVGPU_PWRGD
3
5
C127
EV@4.7u/6.3V_6
C125
EV@4.7u/6.3V_6
+
C637
EV@330u/2V_7343
C186
*EV@22u/6.3V_8
R85 EV@4.7K_4
R86 EV@4.7K_4
PD at GPU
EC_FB_CLAMP 17,19,33
R552 EV@0_4
R554 *EV@0_4
C571 *EV@0.1u/10V_4
C150
EV@4.7u/6.3V_6
4.7uF x 15 population x10
C138
EV@4.7u/6.3V_6
C154
EV@47u/6.3V_8
C219
*EV@22u/6.3V_8
DGPU_POK4
C64
*EV@1000p/50V_4
DGPU_POK2
C65
*EV@1000p/50V_4
C122
EV@4.7u/6.3V_6
C180
*EV@4.7u/6.3V_6
C139
EV@22u/6.3V_8
C91
*EV@22u/6.3V_8
2
2
6
C116 EV@0.1u/10V_4
C117 EV@0.1u/10V_4
C140 EV@0.1u/10V_4
C102 EV@0.1u/10V_4
C136 *EV@0.1u/10V_4
C137 *EV@0.1u/10V_4
C126 *EV@0.1u/10V_4
C114 *EV@0.1u/10V_4
PLACE UNDER GPU BALLS
C105
EV@4.7u/6.3V_6
C200
*EV@4.7u/6.3V_6
47u x1 22u x7
C156
EV@4.7u/25V_8
0817 RSVD more NVVDD caps by NV DG
C179
*EV@22u/6.3V_8
DGPU_PGOK-1
Q12
1 3
EV@MMBT3904-7-F
DGPU_POK_Q
Q13
1 3
EV@MMBT3904-7-F
PU at VR
VGPU_PWRGD 40
VGPU_EN 8,40
PU at VR
C151
EV@4.7u/6.3V_6
C160
*EV@4.7u/6.3V_6
4.7u x6
stuff x 1
stuff x 5
C97
EV@4.7u/25V_8
C214
*EV@22u/6.3V_8
+3V
R82
EV@4.7K_4
R72
*EV@0_4
C51
EV@1000p/50V_4
HWPG_1.5VGFX for DDR=1.5V
+3V
R142
EV@10K_4
DGPU_POK_Q
C157
EV@1000p/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
N14P-GT
C152
EV@4.7u/6.3V_6
C101
*EV@4.7u/6.3V_6
C93
EV@4.7u/6.3V_6
C124
*EV@4.7u/6.3V_6
PLACE NEAR GPU
330u x1
RSVD by DG
C144
EV@4.7u/25V_8
C199
*EV@22u/6.3V_8
2
2
7
C106
EV@4.7u/25V_8
C113
*EV@4.7u/25V_8
+3V_GFX
R84
EV@4.7K_4
Q11
1 3
EV@DTC144EU
+3V_GFX
R156
EV@4.7K_4
Q22
1 3
EV@DTC144EUA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
DGPU 5/5 (Power/Ground)
LAYOUT NOTES:
UNDAER: WITHIN 150MILS
NEAR: WITHIN 1378MILS
C111
EV@4.7u/6.3V_6
C92
EV@4.7u/25V_8
DGPU_PWROK 10
R83
EV@100K/F_4
PWRGD connect to PCH
HWPG_1.5VGFX
R155
EV@100K/F_4
10/15 reserve
DDR=1.5V ,This block POP
ZRQ
ZRQ
ZRQ
20 47Friday, April 12, 2013
20 47Friday, April 12, 2013
20 47Friday, April 12, 2013
8
3A
3A
3A
5
4
3
VMA_DQ[63..0]17
VMA_DM[7..0]17
VMA_WDQS[7..0]17
VRAM6
VREFC_VMA1
VREFD_VMA1
FBA_CMD917
D D
FBA_CMD1117
FBA_CMD817
FBA_CMD2517
FBA_CMD1017
FBA_CMD2417
FBA_CMD2217
FBA_CMD717
FBA_CMD2117
FBA_CMD617
FBA_CMD2917
FBA_CMD2317
FBA_CMD2817
FBA_CMD2017
FBA_CMD417
FBA_CMD1417
FBA_CMD1217
FBA_CMD2717
FBA_CMD2617
VMA_CLK017
VMA_CLK0#17
FBA_CMD317
FBA_CMD217
C C
FBA_CMD017
FBA_CMD3017
FBA_CMD1517
FBA_CMD1317
FBA_CMD517
Should be 240
Ohms +-1%
B B
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS0
VMA_RDQS0
VMA_DM0
VMA_DM1
VMA_WDQS1
VMA_RDQS1
FBA_CMD5
VMA_ZQ1
R67
EV@243/F_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_RDQS[7..0]17
VMA_DQ2
VMA_DQ7
VMA_DQ1
VMA_DQ4
VMA_DQ3
VMA_DQ6
VMA_DQ0
VMA_DQ5
VMA_DQ8
VMA_DQ12
VMA_DQ11
VMA_DQ14
VMA_DQ9
VMA_DQ13
VMA_DQ10
VMA_DQ15
+1.5V_GFX
Should be 240
Ohms +-1%
VREFC_VMA1
VREFD_VMA1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS2
VMA_RDQS2
VMA_DM2
VMA_DM3
VMA_WDQS3
VMA_RDQS3
FBA_CMD5
CHANNEL A: 1024MB DDR3X16
VRAM10
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
VMA_ZQ2 VMA_ZQ3
R469
EV@243/F_4
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMA_DQ20
F7
VMA_DQ16
F2
VMA_DQ21
F8
VMA_DQ18
H3
VMA_DQ23
H8
VMA_DQ17
G2
VMA_DQ22
H7
VMA_DQ19
D7
VMA_DQ30
C3
VMA_DQ24
C8
VMA_DQ28
C2
VMA_DQ25
A7
VMA_DQ29
A2
VMA_DQ27
B8
VMA_DQ31
A3
VMA_DQ26
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK117
VMA_CLK1#17
FBA_CMD1917
FBA_CMD1817
FBA_CMD1617
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS4
VMA_RDQS4
VMA_DM4
VMA_DM5
VMA_WDQS5
VMA_RDQS5
FBA_CMD5 FBA_CMD5
R465
EV@243/F_4
VRAM5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VRAM9
VMA_ZQ4
R505
EV@243/F_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMA_DQ36
F7
VMA_DQ34
F2
VMA_DQ38
F8
VMA_DQ35
H3
VMA_DQ39
H8
VMA_DQ32
G2
VMA_DQ37
H7
VMA_DQ33
D7
VMA_DQ47
C3
VMA_DQ40
C8
VMA_DQ46
C2
VMA_DQ43
A7
VMA_DQ45
A2
VMA_DQ42
B8
VMA_DQ44
A3
VMA_DQ41
B2
+1.5V_GFX
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
VMA_WDQS7
VMA_RDQS7
VMA_DM7
VMA_DM6
VMA_WDQS6
VMA_RDQS6
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
21
VMA_DQ61
VMA_DQ59
VMA_DQ63
VMA_DQ58
VMA_DQ60
VMA_DQ57
VMA_DQ62
VMA_DQ56
VMA_DQ55
VMA_DQ49
VMA_DQ54
VMA_DQ48
VMA_DQ52
VMA_DQ50
VMA_DQ53
VMA_DQ51
+1.5V_GFX
+1.5V_GFX
VMA_CLK0
R468
EV@162/F_4
VMA_CLK0#
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
A A
+1.5V_GFX
C520 EV@1u/10V_4
C513 EV@1u/10V_4
C508 EV@1u/10V_4
C512 EV@1u/10V_4 C22 EV@1u/10V_4
5
+1.5V_GFX
C16 EV@10u/6.3V_6
C515 EV@1u/10V_4
C516 EV@1u/10V_4
C14 EV@1u/10V_4
C23 EV@1u/10V_4
C10 EV@1u/10V_4
R6
EV@1.33K/F_4
4
R5
EV@1.33K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
C19
EV@0.1u/10V_4
+1.5V_GFX
C18 EV@10u/6.3V_6
C11 EV@1u/10V_4
C510 EV@1u/10V_4
C505 EV@1u/10V_4
C13 EV@1u/10V_4
C504 EV@1u/10V_4
C6 EV@1u/10V_4
R14
EV@1.33K/F_4
R13
EV@1.33K/F_4
C9
EV@0.1u/10V_4
+1.5V_GFX
FBA_CMD1717
FBA_CMD117
C503 EV@10u/6.3V_6
C502 EV@10u/6.3V_6
C15 EV@0.1u/10V_4
C17 EV@0.1u/10V_4
C511 EV@0.1u/10V_4
C12 EV@0.1u/10V_4
C506 EV@0.1u/10V_4
3 2 1
FBA_CMD17
FBA_CMD1
10/14 modify
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
TP8
TP7
VMA_CLK1
R467
EV@162/F_4
VMA_CLK1#
+1.5V_GFX
C5 EV@10u/6.3V_6
C501 EV@10u/6.3V_6
C514 EV@0.1u/10V_4
C509 EV@0.1u/10V_4
C507 EV@0.1u/10V_4
+1.5V_GFX+1.5V_GFX
R12
EV@1.33K/F_4
C8
R11
EV@1.33K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
EV@0.1u/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
NN13P-LP DDR3 VRAM 1/2
NN13P-LP DDR3 VRAM 1/2
NN13P-LP DDR3 VRAM 1/2
Friday, April 12, 2013
Friday, April 12, 2013
Friday, April 12, 2013
+1.5V_GFX
R9
EV@1.33K/F_4
R10
EV@1.33K/F_4
C7
EV@0.1u/10V_4
ZRQ
ZRQ
ZRQ
3A
3A
3A
4721
4721
4721
5
VRAM8
VREFC_VMC1
VREFD_VMC1
FBC_CMD917
D D
FBC_CMD1117
FBC_CMD817
FBC_CMD2517
FBC_CMD1017
FBC_CMD2417
FBC_CMD2217
FBC_CMD717
FBC_CMD2117
FBC_CMD617
FBC_CMD2917
FBC_CMD2317
FBC_CMD2817
FBC_CMD2017
FBC_CMD417
FBC_CMD1417
FBC_CMD1217
FBC_CMD2717
FBC_CMD2617
VMC_CLK017
VMC_CLK0#17
FBC_CMD317
FBC_CMD217
C C
FBC_CMD017
FBC_CMD3017
FBC_CMD1517
FBC_CMD1317
FBC_CMD517
Should be 240
Ohms +-1%
B B
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
FBC_CMD12
FBC_CMD27
FBC_CMD26
VMC_CLK0
VMC_CLK0#
FBC_CMD3
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
VMC_WDQS0
VMC_RDQS0
VMC_DM0
VMC_DM1
VMC_WDQS1
VMC_RDQS1
FBC_CMD5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
VMC_ZQ1 VMC_ZQ2
R166
EV@243/F_4
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMC_DQ3
F7
VMC_DQ4
F2
VMC_DQ0
F8
VMC_DQ6
H3
VMC_DQ1
H8
VMC_DQ7
G2
VMC_DQ2
H7
VMC_DQ5
D7
VMC_DQ8
C3
VMC_DQ12
C8
VMC_DQ9
C2
VMC_DQ14
A7
VMC_DQ10
A2
VMC_DQ13
B8
VMC_DQ11
A3
VMC_DQ15
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
Should be 240
Ohms +-1%
4
VMC_DQ[63..0]17
VMC_DM[7..0]17
VMC_WDQS[7..0]17
VMC_RDQS[7..0]17
VREFC_VMC1
VREFD_VMC1
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
FBC_CMD12
FBC_CMD27
FBC_CMD26
VMC_CLK0
VMC_CLK0#
FBC_CMD3
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
VMC_WDQS3
VMC_RDQS3
VMC_DM3
VMC_DM2
VMC_WDQS2
VMC_RDQS2
FBC_CMD5
R620
EV@243/F_4
CHANNEL B: 1024MB DDR3X16
VRAM12
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
+1.5V_GFX
E3
VMC_DQ27
F7
VMC_DQ31
F2
VMC_DQ25
F8
VMC_DQ28
H3
VMC_DQ24
H8
VMC_DQ30
G2
VMC_DQ26
H7
VMC_DQ29
D7
VMC_DQ17
C3
VMC_DQ22
C8
VMC_DQ18
C2
VMC_DQ23
A7
VMC_DQ19
A2
VMC_DQ21
B8
VMC_DQ16
A3
VMC_DQ20
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
3
22
VMC_CLK117
VMC_CLK1#17
FBC_CMD1917
FBC_CMD1817
FBC_CMD1617
Should be 240
Ohms +-1%
VRAM7
VREFC_VMC3
VREFD_VMC3
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
FBC_CMD12
FBC_CMD27
FBC_CMD26
VMC_CLK1
VMC_CLK1#
FBC_CMD19
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
VMC_WDQS4
VMC_RDQS4
VMC_DM4
VMC_DM5
VMC_WDQS5
VMC_RDQS5
FBC_CMD5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
VMC_ZQ3 VMC_ZQ4
R546
EV@243/F_4
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
VMC_DQ38
F7
VMC_DQ32
F2
VMC_DQ36
F8
VMC_DQ35
H3
VMC_DQ39
H8
VMC_DQ34
G2
VMC_DQ37
H7
VMC_DQ33
D7
VMC_DQ44
C3
VMC_DQ40
C8
VMC_DQ46
C2
VMC_DQ42
A7
VMC_DQ45
A2
VMC_DQ43
B8
VMC_DQ47
A3
VMC_DQ41
B2
+1.5V_GFX
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_VMC3
VREFD_VMC3
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
FBC_CMD12
FBC_CMD27
FBC_CMD26
VMC_CLK1
VMC_CLK1#
FBC_CMD19
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
VMC_WDQS7
VMC_RDQS7
VMC_DM7
VMC_DM6
VMC_WDQS6
VMC_RDQS6
FBC_CMD5
+1.5V_GFX
R539
EV@243/F_4
VRAM11
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
+1.5V_GFX+1.5V_GFX
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
VMC_DQ60
F7
VMC_DQ57
F2
VMC_DQ63
F8
VMC_DQ58
H3
VMC_DQ61
H8
VMC_DQ59
G2
VMC_DQ62
H7
VMC_DQ56
D7
VMC_DQ52
C3
VMC_DQ49
C8
VMC_DQ55
C2
VMC_DQ51
A7
VMC_DQ54
A2
VMC_DQ50
B8
VMC_DQ53
A3
VMC_DQ48
B2
D9
G7
K2
K8
N1
N9
R1
+1.5V_GFX
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMC_CLK1VMC_CLK0
R96
EV@162/F_4
VMC_CLK1#
FBC_CMD17
FBC_CMD1
TP14
TP18
R530
EV@1.33K/F_4
R526
EV@1.33K/F_4
C566
EV@0.1u/10V_4
ZRQ
ZRQ
ZRQ
R568
EV@1.33K/F_4
VREFC_VMC3 VREFD_VMC3
C585
R553
EV@1.33K/F_4
EV@0.1u/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
PROJECT :
N13P-LP DDR3 VRAM 2/2
N13P-LP DDR3 VRAM 2/2
N13P-LP DDR3 VRAM 2/2
3A
3A
3A
4722
4722
4722
R170
EV@1.33K/F_4
+1.5V_GFX
R186
EV@1.33K/F_4
C195
EV@0.1u/10V_4
C611 EV@1u/10V_4
C616 EV@1u/10V_4
C211 EV@1u/10V_4
C44 EV@1u/10V_4
C146 EV@1u/10V_4
C215 EV@1u/10V_4
C222 EV@1u/10V_4
C134 EV@1u/10V_4
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
FBC_CMD1717
FBC_CMD117
3 2 1
R598
R632
EV@162/F_4
VMC_CLK0#
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
A A
+1.5V_GFX
C43 EV@1u/10V_4
C606 EV@1u/10V_4
C556 EV@1u/10V_4
C550 EV@1u/10V_4
5
+1.5V_GFX
C103 EV@10u/6.3V_6
C620 EV@10u/6.3V_6
C119 EV@1u/10V_4
C618 EV@1u/10V_4
C129 EV@1u/10V_4
C600 EV@1u/10V_4
+1.5V_GFX
EV@1.33K/F_4
VREFC_VMC1 VREFD_VMC1
R615
EV@1.33K/F_4
C613 EV@0.1u/10V_4
C159 EV@0.1u/10V_4
C149 EV@0.1u/10V_4
C603 EV@0.1u/10V_4
C42 EV@0.1u/10V_4
C232 EV@0.1u/10V_4
C614 EV@0.1u/10V_4
C605 EV@0.1u/10V_4
4
C610
EV@0.1u/10V_4
5
4
3
2
1
Mini DP ML (DPP)
Layout Notes:
DP2_TXP02
DP2_TXN02
DP2_TXP12
DP2_TXN12
D D
C29 0.1u/10V_4
C30 0.1u/10V_4
C31 0.1u/10V_4
C32 0.1u/10V_4
INT_DPTX0P_R
INT_DPTX0N_R
INT_DPTX1P_R
INT_DPTX1N_R
R26 *SHORT_4
R27 *SHORT_4
R28 *SHORT_4
R29 *SHORT_4
SEL/OE# polarity Control
+3V
R510 *SW@10K_4
R503 SW@10K_4
+3V
R509 *SW@10K_4
R502 SW@10K_4
+3V
R76 *S W@10K_4
R77 SW @10K_4
+3V
C C
R78 *S W@10K_4
R79 SW @10K_4
USB2_SEL
USB3_SEL
USB2_MUX_DIS
USB3_MUX_DIS
+5V
INT_DPTX0P
INT_DPTX0N
INT_DPTX1P
INT_DPTX1N
USBP0-9
C555 0.1u/10V_4
C554 0.1u/10V_4
C67 SW @0.1u/10V_4
C66 SW @0.1u/10V_4
C553 0.1u/10V_4
C552 0.1u/10V_4
R87 SW @0_4
R88 SW @0_4
R65 SW @0_4
TP5
R504 SW@0_4
DP2_TXN22
DP2_TXP22
USB3_TXN19
USB3_TXP19
DP2_TXN32
DP2_TXP32
USB3_RXN19
USB3_RXP19
USBP0+9
DP_HPD_Q2
Place near Pin13 and Pin14
C34
SW@10u/6.3V_6
48
DP_TXN2_C
47
DP_TXP2_C
44
USB3_TXN1_C
43
USB3_TXP1_C
46
DP_TXN3_C
45
DP_TXP3_C
42
41
USB3_SEL
CONFIG_1P
CONFIG_2P
USBP0+_R
USBP0-_R
USB2_SEL
USB2_MUX_DIS
USB3_MUX_DIS
LB_CHARGE_OFF
LB_CHG_DELAY1#
DP_HPD_OUT
7
35
36
37
38
12
9
8
32
34
21
22
23
17
57
C33
SW@0.1u/10V_4
B0P
B0N
C0P
C0N
B1P
B1N
C1P
C1N
SS_SEL_IN
BDP
BDM
CDP
CDM
HS_SEL_IN
HS_OE#_IN
SS_OE#_IN/NC
HS_OE#_OUT
SS_OE#_OUT
CHRG_OFF
CHRG_DELAY
SLEEP
HPD_OUT
PAD
SS_SEL
HS_SEL
56
+3V_DPSWITCH
C545
SW@0.1u/10V_4
R33 *SHORT_4
INT_DPTX2N
INT_DPTX2P
R32 *SHORT_4
R484 *SHORT_4
INT_DPTX3N
INT_DPTX3P
R483 *SHORT_4
+3V
DP_AUXNDP_AUXN_R
Connect to HS_ SEL_IN(pin12)
Connect to SS_ SEL_IN(pin7)
CONFIG_PU
SYS_COM_REQ 8
+3V
TP6
C61
SW@0.1u/10V_4
R496 SW @10K_4
R52 SW @100K_4
R512 SW @3.3K_4
R519 SW @3.3K_4
R71 SW @0_4
R75 SW @47K_4
C60
SW@2200p/50V_4
U13
HPD_IN
AUX_N
TEST
C540
SW@0.1u/10V_4
2
INT_DPTX2N_R
A0P
3
INT_DPTX2P_R
A0N
5
INT_DPTX3N_R
A1P
6
INT_DPTX3P_R
A1N
10
CONFIG_2CNN
ADM
11
CONFIG_1CNN
ADP
15
16
DP_HPD_C
18
19
USB2_SEL
20
USB3_SEL
28
CONFIG_2P
29
CONFIG_1P
26
CONFIG_PU
27
Dongle_POWEREN#
25
SYS_LB_REQ
30
RST
31
C551
SW@0.1u/10V_4
4
52
1
VCC13VCC14VCC40VCC
VCC/NC
VCC/NC
MODE_LED
HS_SEL_OUT
SS_SEL_OUT
CONFIG_2
CONFIG_1
CONFIG_1_PU
CONFIG_2_PU
SYS_COM_REQ
NC0
GND33GND
NC149NC250NC3
GND
NC454NC555NC6
51
24
SW@(X)HD3SS2521_NB
39
53
C535
SW@0.1u/10V_4
2
R80 SW @0_6
C536
SW@0.1u/10V_4
+3V
1
Q52
SW@AO3409
CONFIG_PU
3
+3V
+5V
For leakage from connector
2
Q54
BSS138P
31
R522
100K_4
1 2
DP_HPD_C DP_HPD
+3V
1
Q53
SW@AO3409
2
3
23
R528 SW @0_4
Q69
3
IN
SW@AP2331SA-7
30mil
500mA (Max.)
DP_TXP2_CR
R499 NSW @0_4
DP_TXN2_CR
R500 NSW @0_4
DP_TXP3_CR
DP_TXN3_CR
R498 NSW @0_4
USBP0-_CUS BP0-_R CONFIG_2CNN
C539 SW@2200p/50V_4
USBP0+_CUSB P0+_R CONFIG_1CNN
C538 SW@2200p/50V_4
1
2
R494 NSW @0_4
R491 NSW @5.1M/J_4
R511 NSW @0_4
R46 NSW @1M_4
C738
0.1u/10V_4
CONFIG_2CNN
LB_PWR_RTN
OUT
GND
DP_TXP2_C
R516 NSW@0_4
R92
SW@1M_4
SYS_COM_REQ
R117
SW@10K_4
B B
R118
SW@100K/F_4
DP AUX
DDPC_CTRLDAT2
A A
+3V
INT_DP_AUXDN2
INT_DP_AUXDP2
R120
SW@1M_4
6
215
4 3
DP_CAD
Low
DP signal (AC couple)
High
TMDS signal (DC couple)
R855 0/J_4
R854 *0/J_4
R532 *1 00K_4
C558 0.1u/10V_4
Reserve by CRB
C549 0.1u/10V_4
R518 *1 00K_4
Q15
R119 SW @10K_4 R497 NSW @0_4
R116 SW @0_4
CLK_SDATA8,13 ,14,15,32
C94
SW@1u/6.3V_4
R113 SW @10K_4
R835 SW @5.1M/J_4
R108 SW @0_4
CLK_SCLK8,13,14,15,32
Q16
SW@2N7002DW
Behavior
Q14
5
4 3
2
6
1
2N7002DW
Q56
2N7002K
3
1
DP_AUXN_C
2
2
Q55
2N7002K
3
1
DP_AUXP_C
5
CONFIG_1P
CONFIG_2P
R859 0/J _4
R857 *0 /J_4
5
2
6
SW@2N7002DW
Q17
5
2
6
SW@2N7002DW
+3V
DP_AUXN
DP_DDI_EN
DDPC_CTRLCLK 2
DP_AUXP
R524
100K_4
DP_AUX_EN
43
1
R99
SW@100K/F_4
43
1
R93
SW@100K/F_4
R531
NSW@100K_4
+5V
CONFIG_1P
R549
10K_4
+5V
R538
10K_4
5
2
6
R537
1M_4
DP_TXN2_C INT_DPTX2N_R
R517 NSW@0_4
DP_TXP3_C
R514 NSW@0_4
DP_TXN3_C
R515 NSW@0_4
C544 SW@2200p/50V_4
C543 SW@2200p/50V_4
mDP connector
+3V LB_PWR_CNN
Q57
43
1
2N7002DW
4
R816
NSW@0_4
LB_PWR_RTN
LB_PWR_CNN
C822
10u/6.3V_6
INT_DPTX2P_R
INT_DPTX3P_R
INT_DPTX3N_R
CONFIG_1CNNCONFIG_1P
DP_HPD_CDP_HPD_Q
C823
0.1u/10V_4
3
DP_HPD
INT_DPTX0P
CONFIG_1CNN
INT_DPTX0N
CONFIG_2CNN
INT_DPTX1P
INT_DPTX3P
INT_DPTX1N
INT_DPTX3N
INT_DPTX2P
DP_AUXP
INT_DPTX2N
DP_AUXN
C824
10u/6.3V_6
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
CN9
GND
HPD
LANE0_P
CONFIG1
LANE0_N
CONFIG2
GND
GND
LANE1_P
LANE3_P
LANE1_N
LANE3_N
GND
GND
LANE2_P
AUX_CH_P
LANE2_N
AUX_CH_N
GND
DP_PWR
mDP
SHELL1
SHELL2
SHELL3
SHELL4
LB_PWR_RTN
R105
SW@100K_4
1 2
2
Q58
LB_PWR_CNN
Q59
2
52
1
52
3
1
R127
3
Q21
SW@ME2N7002K
1
3
LB_PWR_RTN_M
4
LB_PWR_CNN_M
D35
SW@SMAJ20A
2 1
SW@FDMC4435BZ
D36
SW@SMAJ20A
2 1
SW@FDMC4435BZ
LB_CHARGE_OFF
+3V
R144
SW@10K/F_4
21
22
23
24
4
Q20
SW@ME2N7002K
R123
SW@20K_4
SW@2K/F_4
4
+5V
52
4
3
1
R122
SW@20K_4
R126 SW @2K/F_4
3
1
+3V
52
Q62
SW@FDMC4435BZ
3
1
Q61
SW@FDMC4435BZ
2
R140
SW@100K/F_4
+3V
+3V
C189
SW@0.1u/10V_4
2
4
1
LB_CHARGE_OFF
U16
3 5
SW@TC7SH08FU
Dongle_POWEREN#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C609
SW@0.1u/10V_4
U41
1
5
2
Dongle_POWEREN#
4 3
SW@NL17SZ04DFT2G
Q6
5
43
2
6
1
SW@2N7002DW
R60 *SW @100K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mini DP/HD3SS2521
Mini DP/HD3SS2521
Mini DP/HD3SS2521
1
SW@100K/F_4
LB_PWR_RTN
ZRQ
ZRQ
ZRQ
R610
3A
3A
23 47Friday, April 12, 2013
23 47Friday, April 12, 2013
23 47Friday, April 12, 2013
3A
1
eDP Power
C621
A A
PCH_VDDEN2
1u/6.3V_4
R251 0_4
+3V
R241
100K_4
Backlight Control
B B
PCH_BLON2
C C
Lid Switch (HSR)(move to USB/B)
R246
100K_4
U44
6
IN
4
IN
3
ON/OFF
G5243AT11U
Q30
2N7002DW
2
1
OUT
2
GND
5
GND
+3V
R267
R244
10K_4
10K_4
BL#
2
5
4 3
BL_ON
6
1
3
LCDVCC_1
C264
*0.1u/10V_4
LID#,EC intrnal PU
2 1
D16 RB500V-40
2
Q27
DTC144EU
1 3
R268 *SHORT_8
*2.2u/6.3V_6
C636
0.1u/10V_4
LID# 31,33
EC_FPBACK# 33
C635
0.01u/16V_4
4
LCDVCC
C265
22u/6.3V_8
5
eDP
MP confirm 2 or 4 Lane
Touch Panel
eDP
CCD
6
R233 *SHORT_6
VIN
R234 *SHORT_6
LCDVCC
R229 *SHORT_6C623
+3V
R269 *TPL@SHORT_6
+5V
EDP_HPD2
+3V
R723 *0_4
R714 100K_4
R715 100K_4
COLOR_ENG33
PCH_BRIGHT2
USBP2+9
USBP2-9
USBP5+9
USBP5-9
EDP_TXP32
EDP_TXN32
EDP_TXP22
EDP_TXN22
EDP_TXP12
EDP_TXN12
EDP_TXP02
EDP_TXN02
EDP_AUXP2
EDP_AUXN2
R712 *SHORT_4
C626 0.1u/10V_4
R713 *100K_4
C627 0.1u/10V_4
C628 0.1u/10V_4
C629 0.1u/10V_4
C630 0.1u/10V_4
C631 0.1u/10V_4
C632 0.1u/10V_4
C633 0.1u/10V_4
C634 0.1u/10V_4
C640 0.1u/10V_4
C641 0.1u/10V_4
R725 *SHORT_4
R724 *SHORT_4
R716 *SHORT_4
R711 *SHORT_4
7
LCD_VIN
LCDVCC
CCD_PWR
TP_PWR
LVDS_BRIGHT
BL_ON
EDP_TXP3_C
EDP_TXN3_C
EDP_TXP2_C
EDP_TXN2_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXP0_C
EDP_TXN0_C
EDP_AUXP_C
EDP_AUXN_C
GPIO810
EDP_HPD
USBP2+_R
USBP2-_R
USBP5+_R
USBP5-_R
TP_GND
R235
*TPL@SHORT_6
Reserve for GND noise
TP_INT
Inform BIOS that it is touch panel or not
CCD_PWRVIN TP_PWR
50398-04071-001
CN13
8
G_5
40
39
38
37
36
35
34
33
32
G_4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
G_1
9
8
7
6
5
4
3
2
1
G_0
24
C246
C247
4.7u/25V_8
+3V
D D
1
2
3
4
Touch Panel interrupt
TP_INT_PCH2
5
3
Q28
TPL@2N7002K
2
R243
*TPL@10K_4
1
TP_INT
6
1000p/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
C251
*10p/50V_4
C250
1000p/50V_4
C262
*TPL@10p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
ZRQ
ZRQ
ZRQ
C263
TPL@1000p/50V_4
24 47Friday, April 12, 2013
24 47Friday, April 12, 2013
24 47Friday, April 12, 2013
8
3A
3A
3A
5
4
3
2
1
HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)
CN7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C27
*1000p/50V_4
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
ABA-HDM-022-P05
12
R43
470_4
INT_HDMITX2N_C
INT_HDMITX2P_C
INT_HDMITX1N_C
INT_HDMITX1P_C
12
12
R37
R38
470_4
470_4
12
12
R41
R42
470_4
470_4
12
12
R40
R39
470_4
470_4
+5V
Q49
3
IN
AP2331SA-7
OUT
GND
1
2
C521
*220p/50V_4
D30
*14V/100p_4
INT_HDMITX2N2
INT_HDMITX2P2
INT_HDMITX1N2
INT_HDMITX1P2
D D
INT_HDMITX0N2
INT_HDMITX0P2
INT_HDMICLK+2
INT_HDMICLK-2
Layout Notes:
Place decoupling CAPs close to Connector
C C
C525 0.1u/10V_4
C524 0.1u/10V_4
C527 0.1u/10V_4
C526 0.1u/10V_4
C523 0.1u/10V_4
C522 0.1u/10V_4
C528 0.1u/10V_4
C529 0.1u/10V_4
*100K/F_4
+3V
R62
INT_HDMITX0N_C
INT_HDMITX0P_C
INT_HDMICLK+_C
INT_HDMICLK-_C
12
R44
470_4
3
2
1
Q8
2N7002K
12
RV5
*5V/0.2p_4
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
INT_HDMICLK-_C
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
HDMI_5V
R45 *SHORT_4
C28
*1000p/50V_4
HP_DET_CNHDMI_MB_HP
SHELL1
SHELL3
SHELL4
SHELL2
20
22
23
21
25
HDMI DDC (HDM)
+3V
+3V
R70
2.2K_4
R508
2.2K_4
B B
HDMI_DDCCLK_SW2
A A
HDMI_DDCDATA_SW2
R69 *SHORT_4
R513 *SHORT_4
5
HDMI_DDCCLK_COM HDMI_DDCCLK_MB
+3V
Q10
2
BSN20
1
+3V
Q51
2
BSN20
1
4
+5V
D9
RB500V-40
R64
3
RB500V-40
3
2.2K_4
Follow CRB 1.0 change to 2.2K
+5V
D34
R501
2.2K_4
Follow CRB 1.0 change to 2.2K
HDMI_DDCDATA_MBHDMI_DDCDATA_COM
EMI (EMC) HDMI-detect (HDM)
INT_HDMITX2P_C
R478 *100/F_4
INT_HDMITX2N_C
INT_HDMITX1P_C
R479 *100/F_4
INT_HDMITX1N_C
INT_HDMITX0P_C
R477 *100/F_4
INT_HDMITX0N_C
INT_HDMICLK+_C
R480 *100/F_4
INT_HDMICLK-_C
3
INT_HDMI_HPD2
2
+3V+3V
R63
1M_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
1
3
HDMI_MB_HP
12
Q7
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI (PS8101)
HDMI (PS8101)
HDMI (PS8101)
1
R53
20K_4
ZRQ
ZRQ
ZRQ
25 47Friday, April 12, 2013
25 47Friday, April 12, 2013
25 47Friday, April 12, 2013
3A
3A
3A
1
MINI-CARD WLAN(MPC)
+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
BT_POWERON33
A A
PCIE_TX3+_WLAN9
PCIE_TX3-_WLAN9
PCIE_RX3+_WLAN9
PCIE_RX3-_WLAN9
CLK_PCIE_WLANP9
CLK_PCIE_WLANN9
B B
R786 0_4
TP101
TP100
TP99
CLK_PCIE_WLAN_REQ#_R
PCIE_WAKE#_R
mSATA(MNC)
C C
Debug
PLTRST#7,13,16,27,28,33
CLK_PCI_LPC9
Layout Notes:
Place decoupling CAPs close to Connector
SATA_TXP1_SSD8
SATA_TXN1_SSD8
SATA_RXN1_SSD8
SATA_RXP1_SSD8
D D
1
R461 *0_4
R460 *0_4
C730 0.01u/16V_4
C734 0.01u/16V_4
C731 0.01u/16V_4
C732 0.01u/16V_4
2
3
Check LED signal. (active high or low)
H=5.2mm
CN18
CL_RST1#_WLAN
CL_DATA1_WLAN
CL_CLK1_WLAN
+WL_VDD
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
UIM_C4
17
UIM_C8
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
LTS_AAA-PCI-092-P05
53
LED_WPAN#
LED_WLAN#
LED_WWAN#
SMB_DATA
W_DISABLE#
UIM_RESET
UIM_DATA
GND54GND
+3.3V
GND
+1.5V
GND
USB_D+
USB_D-
GND
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
GND
UIM_VPP
UIM_CLK
UIM_PWR
+1.5V
GND
+3.3V
52
50
48
46
44
WLAN#
42
WWAN#
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
2011017 : stuff Q81 to enable wake function on WLAN for IOAC
check IOAC power rail can reduce Q81
LAYOUT NOTE:
CLOSE TO CONNECTOR
+3V
R452 *SHORT_8
rating = 1000mA @ 128G
+3V_SATA
H=4.95mm
CN27
CLK_PCI_LPC_R
SATA_TXP1_SSD_C
SATA_TXN1_SSD_C
SATA_RXN1_SSD_C
SATA_RXP1_SSD_C
2
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
SATA_Tp0
31
SATA_Tn0
29
GND
27
GND
25
SATA_Rn0
23
SATA_Rp0
21
GND
19
UIM_C4
17
UIM_C8
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
LTS_AAA-PCI-092-P05
modify 20111102
53
LED_WPAN#
LED_WLAN#
LED_WWAN#
SMB_DATA
W_DISABLE#
UIM_RESET
GND54GND
+3.3V
GND
+1.5V
GND
USB_D+
USB_D-
GND
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
GND
UIM_VPP
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
3
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R
4
+WL_VDD
+1.5V_MINI1_VDD
WLAN_CLK_SDATA
WLAN_CLK_SCLK
+1.5V_MINI1_VDD
+WL_VDD
RF_EN 33
+1.5V_MINI1_VDD
+WL_VDD
10u/6.3V_6
R462 0_4
4
+WL_VDD
R774
*4.7K_4
TP98
USBP3+ 9
USBP3- 9
R771 *0_4
R752 0_4
R757 *0_4
+3V_SATA
C496
0.1u/10V_4
DEVSLP1 10
Debug
R459 *SHORT_4
R458 *SHORT_4
R457 *SHORT_4
R456 *SHORT_4
R455 *SHORT_4
IOAC_WLANPWR#33
WLAN_OFF 33
R1
PLTRST#
R2
R3
C500
0.1u/10V_4
5
+3VPCU
1
R740
*100K_4
Q65 AO3413
2
20120217 reserve R648 PU 100k.
20120221 add R1 for PLTRST#.
20120216 add R2/R3 un-stuff for iRST reserve.
IOAC_RST# 28,33
PCIERST# 28,33
20111122 change to PMOS
3
Low
High
+3V_WLAN
R749 *SHORT_8
Mini card +3V power enable
Mini card +3V power disable
500mA for +1.5V
LAYOUT NOTE:
CLOSE TO CONNECTOR
Leakage circuit (MPC)
C499
SMB_PCH_DAT8
SMB_PCH_CLK8
20111117 change mose footprint to dual type.
PCIE_CLKREQ_WLAN#9
WLAN_WAKE#33
LPC_LFRAME# 8,27,33
LPC_LAD3 8,27,33
LPC_LAD2 8,27,33
LPC_LAD1 8,27,33
LPC_LAD0 8,27,33
5 6 7
PCIE_LAN_WAKE#7,28
R813 0_4
R812 *0_4
20111118 change mose footprint to dual type.
8
+WL_VDD
+WL_VDD
C675
10u/6.3V_6
C680
*1000p/50V_4
C665
0.1u/10V_4
C668
*0.1u/10V_4
20120105 Change power plant for leakage issue.
S5
4 3
1
S0
S5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Q38
4 3
1
Friday, April 12, 2013
Friday, April 12, 2013
Friday, April 12, 2013
C683
*0.1u/10V_4
+1.5V_MINI1_VDD
R323 *0_8
C653
*10u/6.3V_6
Q66
2N7002DW
20120105 Change power plant for leakage issue.
5
2
6
2N7002DW
R316 *0_4
R314 *0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mini Card/mSATA
Mini Card/mSATA
Mini Card/mSATA
5
2
6
+3V_S5
+3V_S5
R313
4.7K_4
C650
*0.1u/10V_4
+1.5V
R743
R748
4.7K_4
4.7K_4
+WL_VDD
R317
4.7K_4
CLK_PCIE_WLAN_REQ#_R
ZRQ
ZRQ
ZRQ
+WL_VDD
WLAN_CLK_SDATA
WLAN_CLK_SCLK
PCIE_WAKE#_R
8
26
IOAC
IOAC
4726
4726
4726
3A
3A
3A
1
2
MAIN SATA HDD (HDD) TPM (TPM)
27
CN16
A A
B B
SATA_HDD
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
19
SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
+5V_HDD
Layout Notes:
Place decoupling CAPs close to Connector
C647 0.01u/16V_4
C646 0.01u/16V_4
C645 0.01u/16V_4
C644 0.01u/16V_4
R318 *0_4
C315
C333
0.01u/16V_4
SATA_TXP0 8
SATA_TXN0 8
SATA_RXN0 8
SATA_RXP0 8
DEVSLP0 10
C329
*0.1u/10V_4
C308 C311
*0.1u/10V_4
10u/6.3V_6
R737 *SHORT_8
C651
+
*100u/6.3V_35280.01u/16V_4
+5V
CN23
CLKRUN#7,33
PLTRST#7,13,16,26,28,33
+3V_S5
IRQ_SERIRQ10,33
LPCPD#7
LPC_LAD08,26,33
LPC_LAD18,26,33
LPC_LFRAME#8,26,33
PCLK_TPM9
LPC_LAD28,26,33
LPC_LAD38,26,33
R409 *TPM@SHORT_4
+3V
C435 TPM@0.1u/10V_4
R450 *TPM@SHORT_4
R449 *TPM@SHORT_4
R448 *TPM@SHORT_4
C486 TPM@10p/50V_4
SERIRQ_R
LPCPD#_R
PCLK_TPM_C
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
TPM@TPM_CONN
LED(UIF)
R20 *1M_4
R21 *1M_4
C C
Power LED
PWRLED#33
SUSLED#33
R16 300_4
R17 680_4
R23 *1M_4
R30 *1M_4
Battery
D D
BATLED0#33
BATLED1#33
1
R24 300_4
R31 680_4
+3V_S5
+3VPCU
Blue
3
4
LED5 POWER LED
2
1
Amber
+3VPCU
Blue
3
4
LED6 BATTERY LED
2
1
Amber
2 3 4
+3V_S5
+3VPCU
+3VPCU
3/5VPCU reset switch (CLG)
SW8 SWITCH_1.5
TP104
2
5
3
14
TP105
6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C729
0.1u/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SATA-HDD/ TPM
SATA-HDD/ TPM
SATA-HDD/ TPM
12
D38
*14V/100p_4
SYS_SHDN# 10,35,39
ZRQ
ZRQ
ZRQ
27 47Friday, April 12, 2013
27 47Friday, April 12, 2013
27 47Friday, April 12, 2013
3A
3A
3A
5
VDD33
VDD10
VDD33
U21
65
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+3V_S5
+3VPCU
C740
1u/6.3V_4
R815 10K_4
LAN_XTALI
LAN_XTAL2
LAN_RESET
GND
MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MIDP2
MDIN2
AVDD10
MDIP3
MDIN3
AVDD33
DVDD33
Card_3V3
SD_D7/xD_RDY
SD_D6/MS_INS#/xD_RE#
SD_D5/xD_CE#
LAN/Card reader (LAN)
C278 12p/50_4
LAN_XTALI
LAN_XTAL2
CARD_3V329
VDD10
VDD10
VDD33
VDD33
SP529
SP629
SP729
SP829
SP929
SP1029
SP1229
SP1329
X'tal 25MHz
R301
*1M_4
D D
C C
Y8
25MHz_XTAL
C284 12p/50_4
2 4
1 3
(1.5A) 60 mils
IOAC_LANPWR#33
R307 2.49K/F_4
MDI0+
MDI0-
MDI1+
MDI1MDI2+
MDI2-
MDI3+
MDI3-
R326 *SHORT_6
CARD_3V3
C735
0.1u/10V_4
SP5
SP6
SP7
SP8
SP9
SP10
SP12
SP13
4
R296 *0_8
Q36 AO3413
1
R310
100K_4
2
58
57
63
61
59
64
62
RSET
AVDD33
AVDD33
AVDD10
AVDD33
XD_CD#
CKXTAL260CKXTAL1
MS_D0/xD_D156MS_D4/xD_D0
RTL8411BA-CG
SD_CMD/MS_D6/xD_D321SD_D3/MS_D2/xD_D222SD_D2/xD_D723GND24HSIP25HSIN26REFCLK_P27REFCLK_N28EVDD1029HSOP30HSON
SD_D4/xD_WE#17SD_D1/MS_CLK/xD_D618SD_D0/MS_D7/xD_D519SD_CLK/MS_D3/xD_D4
20
3
VDD33_18
54
55
52
53
VDD33/18
SD_CD#/MS_D5/xD_ALE
R298 *SHORT_6
R304 *SHORT_6
R295 *0_4
R1
51
50
49
GPO
DVDD10
LED0/SPICSB
LED1/SPISCK
ENSWREG_H
SD_WP/MS_D1/xD_WP#
MS_BS/xD_CLE
GND
31
32
40 mils
50 mils
SP13
VDD33/18
LED0/SPICSB
GPO_NC
LED1/SPICLK/EESK
REGOUT
VDDREG
VDDREG
SDA/SPIDI
LED3/SPIDO
SCL/LED_CR
DVDD10
LANWAKEB
DVDD33
ISOLATEB
PERSTB
CLKREQB
VDD33/18
PCIE_RXN4_C
PCIE_RXP4_C
EVDD10
3
VDD33
Mfr PN RTL8411AAR
VDDREG
R295
VDD10
10/31 modify
TP64
R281 10K_4
TP65
Power source mode:
Pin45 :Pull-up VDD33 for SWR mode
Pull-down for LDO mde
(1.5A) 70 mils
48
REGOUT
47
46
45
ENSWREG
44
SDA/SPIDI
43
LED3/SPIDO/EEDO
42
SCL/LED_CR_NC
41
40
LANWAKE#
39
38
37
36
35
34
33
R322 *SHORT_6
ISOLATEB
PCIE_REQ_LAN#
SP12
VDD33/18
R770 *0_4
R751 0_4
R756 *0_4 C36 *6.8p/50V_4
C336 0.1u/10V_4
C335 0.1u/10V_4
Layout Notes:
Place decoupling CAPs close to LAN Chip
POP
VDDREG
R311 *SHORT_4
TP67
TP66
TP68
VDD10
VDD33
PLTRST# 7,13,16,26,27,33
IOAC_RST# 26,33
PCIERST# 26,33
PCIE_RX4-_LAN 9
PCIE_RX4+_LAN 9
CLK_PCIE_LANN 9
CLK_PCIE_LANP 9
PCIE_TX4-_LAN 9
PCIE_TX4+_LAN 9
RTL8411BA-CG
+3V
VDD33
DEPOP
R325
1K_4
R324
15K/F_4
2
Transformer (LAN)
High
GDDR5
MDI0+
MDI0-
MDI1+
MDI1-
MDI3-
MDI3+
MDI2- TX2N_R
MDI2+ TX2P_R
R18 0_4
L5
443
1
1
*HCMC0805-371MFS/0.1A/370ohm
R19 0_4
R48 0_4
L10
443
1
1
*HCMC0805-371MFS/0.1A/370ohm
R50 0_4
R488 0_4
L30
443
1
1
*HCMC0805-371MFS/0.1A/370ohm
R486 0_4
R472 0_4
L27
443
1
1
*HCMC0805-371MFS/0.1A/370ohm
R471 0_4
C530 *6.8p/50V_4
C533 *6.8p/50V_4
C518 *6.8p/50V_4
C517 *6.8p/50V_4
C35 *6.8p/50V_4
C25 *6.8p/50V_4
C24 *6.8p/50V_4
3
TX0P_R
2
TX0N_R
2
3
TX1P_R
2
TX1N_R
2
3
TX3N_R
2
TX3P_R
2
3
2
2
C20
0.01u/16V_4
MDI3+
MDI3-
MDI2+
MDI2-
MDI1+
MDI1-
MDI0+
MDI0-
Reserver for EMI
RJ45 CONNECTOR (LAN)
U6
1
TD+
2
TD-
8
TCT
7
TCT
TRANSFORMER
U7
6
TCT
5
TCT
3
TD+
TD-4MX-
TRANSFORMER
U32
1
TD+
2
TD-
8
TCT
7
TCT
TRANSFORMER
U31
6
TCT
5
TCT
3
TD+
TD-4MX-
TRANSFORMER
MX+
MCT
MCT
MCT
MCT
MX+
MX+
MCT
MCT
MCT
MCT
MX+
MX-
MX-
6
5
3
4
MCT1
1
MCT2
2
8
7
6
5
3
4
MCT3
1
MCT4
2
8
7
*B88069X9231T203
R476
75_4
1
L9
X-TX0P
X-TX0N
X-TX1P
X-TX1N
X-TX3N
X-TX3P
X-TX2N
X-TX2P
R482
75_4
D29
1 2
CN6
R35
75_4
R22
75_4
TERM0
C21
220p/3KV_1808
HCMC0805-371MFS/0.1A/370ohm
HCMC0805-371MFS/0.1A/370ohm
HCMC0805-371MFS/0.1A/370ohm
HCMC0805-371MFS/0.1A/370ohm
1
1
1
1
443
1
L11
443
1
L31
443
1
L28
443
1
3
RJ45-TX0+
2
RJ45-TX0-
2
3
RJ45-TX1+
2
RJ45-TX1-
2
3
RJ45-TX3-
2
RJ45-TX3+
2
3
RJ45-TX2-
2
RJ45-TX2+
2
RJ45-TX0+
RJ45-TX0RJ45-TX1+
RJ45-TX2+
B B
PCIE_LAN_WAKE#7,26
LAN_WAKE#33
R333 0_4
R336 *0_4
VDD33
2
R321 0_4
Q39
*DTC144EU
13
R320
*1K_4
LANWAKE# PCIE_REQ_LAN#
CLK_PCIE_LAN_REQ#9
S0 IOACS5 IOAC
201201009: CLKREQ use S0 power domain by FAE
Power-on Strapping
SDA/SPIDI
VDD33
R315 1.5K/F_4
10 mils 10 mils
C317
4.7u/6.3V_6
VDD33/18
C312
0.1u/10V_4
C1 C2
C273
*4.7u/6.3V_6
VDD33_18
C280
0.1u/10V_4
+3V
2
1
R344 0_4
REGOUT
(1.5A) 60 mils
Q41
*2N7002K
3
L22 4.7uH/680mA
R348
*10K_4
C275
4.7u/6.3V_6
VDD10
C274
0.1u/10V_4
SURGE (LAN)
MDI1MDI1+
MDI3MDI3+
1
1
2
2
3
3
445
*UCLAMP2512T.TCT
Place close to pin 53Place close to pin 33
C1 and C2 only for RTL8411AAR,
RTL8411BAR remove.
VDDREG
A A
VDD33
C279
0.1u/10V_4
40 mils
C287
0.1u/10V_4
C310
0.1u/10V_4
5
C285
4.7u/6.3V_6
C307
0.1u/10V_4
C306
0.1u/10V_4
40 mils
C286
C291
4.7u/6.3V_6
0.1u/10V_4
Place connect to Pin46/47Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64
(1.5A) 60 mils
Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61 Close to Pin29
4
VDD10
C648
0.1u/10V_4
C305
0.1u/10V_4
C283
0.1u/10V_4
Place Close pins-- 48
R338
C281
C649
0.1u/10V_4
0.1u/10V_4
*SHORT_6
3
EVDD10
30 mils
C332
1u/6.3V_4
C339
0.1u/10V_4
MDI2+
MDI2MDI0MDI0+
2
1
1
2
2
3
3
445
*UCLAMP2512T.TCT
RJ45-TX2-
RJ45-TX1RJ45-TX3+
RJ45-TX3-
U8
8
8
7
7
6
6
5
U5
8
8
7
7
6
6
5
1
0+
2
0-
3
1+
4
2+
5
2-
6
1-
7
3+
8
3-
RJ45
RJ45-TX1RJ45-TX1+
RJ45-TX0RJ45-TX0+
RJ45-TX3RJ45-TX3+
RJ45-TX2RJ45-TX2+
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
9
GND
10
GND
11
GND
12
GND
U9
1
2
3
*UCLAMP2512T.TCT
1
2
3
*UCLAMP2512T.TCT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LAN-RTL8411/CARD READER
LAN-RTL8411/CARD READER
LAN-RTL8411/CARD READER
1
2
3
445
1
2
3
445
1
8
8
7
7
6
6
5
U33
8
8
7
7
6
6
5
ZRQ
ZRQ
ZRQ
28 47Friday, April 12, 2013
28 47Friday, April 12, 2013
28 47Friday, April 12, 2013
3A
3A
3A
A
SD/MMC CARD READER CONNECTOR (MMC)
B
C
D
E
Stitching cap (EMC)
29
SP528
SP628
SP728
SP828
SP928
4 4
SP1028
SP1228
SP1328
CARD_3V328
R736 *SHORT_4
R735 *SHORT_4
R734 *SHORT_4
R733 *SHORT_4
R328 *SHORT_4
R334 *SHORT_4
R741 *SHORT_4
R283 *SHORT_4
CARD_3V3
SD_DAT1
SD_DAT0
SD_CLK
SD_CMD
SD_DAT3
SD_DAT2
SD_WP
SD_CD#
SD_CD#
SD_WP
SD_DAT2
SD_DAT1
SD_DAT0
SD_CLK
CARD_3V3
SD_CMD
SD_DAT3
11
10
9
8
7
6
5
4
3
2
1
CN17
CARD/DET
W/P
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3
+1.05V_S5 +1.5V_GFX
C300
*0.1u/10V_4
GND
GND
SD-CARD
13
12
+VCCIN +V1.05M_VCCASW
C301
*1000p/50V_4
C547
*0.1u/10V_4
C541
*1000p/50V_4
+3V
C532
*1000p/50V_4
+3V_S5
C59
*0.1u/10V_4
EMI
SD_DAT0
Share Pin
3 3
SD_D7 xD_RDY
SP1
SP2
SD_D6
SP3
SD_D5
SP4
SD_D4
SP5
SD_D1
SP6
SD_D0
SP7
SD_CLK
SP8
SD_CMD
SP9
SD_D3
SP10
SD_D2
SP11
SP12
SD_WP
SP13
SD_CD#
SP14
SP15
SP16
MS_INS# xD_RE#
MS_CLK
MS_D7
MS_D3
MS_D6
MS_D2
MS_BS
MS_D1
MS_D5
MS_D4
MS_D0
xD_CE#
xD_WE#
xD_D6
xD_D5
xD_D4
xD_D3
xD_D2
xD_D7
xD_CLE
xD_WP#
xD_ALE
xD_D0
xD_D1
xD_CD#
C655
10p/50V_4
SD_CLK
C654
10p/50V_4
HOLE(OTH)
HOLE8
2 2
HOLE20
*hg-c236d118p2
8
9
123
67
5
4
*hg-c236d118p2
8
9
123
HOLE11
*hg-c236d118p2
8
9
123
67
5
4
67
5
4
HOLE17
*hg-c236d118p2
8
9
123
HOLE12
*O-ZRQ-1
8
9
123
HOLE24
67
5
4
67
5
4
*hg-c236d118p2
8
9
123
HOLE15
*hg-c236d118p2
8
9
123
67
5
4
67
5
4
HOLE25
*HG-ZRQ-1
8
9
HOLE14
*HG-C236D118P2
8
9
10 mils
C652
10u/6.3V_6
Place close to connector
67
5
4
123
67
5
4
123
C736
0.1u/10V_4
HOLE10
*HG-ZRQ-2
8
9
123
CARD_3V3
C737
*4.7u/6.3V_6
67
5
4
+1.35V_SUS +3VPCU +WL_VDD
C359
*0.1u/10V_4
BATT Enable short pad
HOLE19
*H-TE236X236BC236D165P2
23
1
C48
*1000p/50V_4
C330
*1000p/50V_4
HOLE22
*h-te236x236bc236d158p2
1
C615
*0.1u/10V_4
C334
*0.1u/10V_4
23
C612
*1000p/50V_4
C328
*1000p/50V_4
SW6
3
Lid Switch
PAD5
*spad-e858x1268
C252
*0.1u/10V_4
C341
*0.1u/10V_4
2
14
C254
*1000p/50V_4
C348
*1000p/50V_4
BATT_EN# 34
HOLE9
*hg-c276d118p2
1 1
8
9
123
67
5
4
HOLE18
*hg-c276d118p2
8
9
A
123
67
5
4
HOLE13
*h-c217d138p2
1
HOLE16
*h-c197d138p2
1
CPU BKTGPU BKT
HOLE5
*h-c150d150n
1
B
HOLE6
*h-c150d150n
1
HOLE7
*h-c150d150n
1
C
HOLE21
*h-tc197bc142d142p2
1
HOLE26
*H-TC197BC142D142P2
1
D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
12345
6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CARD READER CONNECTOR
CARD READER CONNECTOR
CARD READER CONNECTOR
E
ZRQ
ZRQ
ZRQ
3A
3A
3A
29 47Friday, April 12, 2013
29 47Friday, April 12, 2013
29 47Friday, April 12, 2013
5
Codec (ADO)
D D
+1.5V
R352
*SHORT_6
+1.5VAVDD2
C367
C371
10u/6.3V_6
0.1u/10V_4
Place next to pin 40
ADOGND
C355
10u/6.3V_6
C364
10u/6.3V_6
R351 *S HORT_6
C354
0.1u/10V_4
R350 *S HORT_6
C353
0.1u/10V_4
+5V
C C
+5V
+5VPVDD1
C366
10u/6.3V_6
Place next to pin 41
+5VPVDD2
C365
C369
10u/6.3V_6
0.1u/10V_4
Place next to pin 46
+5VA
ADOGND
Layout Note:
Place close to Codec
C381
10u/6.3V_6
C370
0.1u/10V_4
SPK-1
R781
*10K_4
R777
*10K_4
ADOGNDADOGND
Spilt by DGND
R358 *S HORT_6
+3V
HP
ANALOG
L_SPK+
L_SPKR_SPKR_SPK+
PD#
COMBO MIC JD
DIGITAL
0.1u/10V_4
+3V
C392
+
2.2u/6.3V_6
C393
EAPD#
HP-L
HP-R
R356 *S HORT_6
C386
0.1u/10V_4
U28
DIGITAL
37
CBP
38
AVSS2
39
LDO2-CAP
40
AVDD2
41
PVDD1
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
46
PVDD2
47
PDB
48
SPDIFO/GPIO2
49
GND
+3VDVDD
C390
10u/6.3V_6
2.2u/6.3V_6
+3VCPVDD
36
CPVDD
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP
Place next to pin 1
DMIC_DATA
DMIC
B B
DMIC_CLK
4
3
2
1
HEADPHONE/Mic combo (AMP)
30
MIC2-VREFO
C404
0.1u/10V_4
ADOGND
C406
*10u/6.3V_6
ADOGND
MIC2-R MIC2_MIC
MIC2-L
+5VA
C405
2.2u/6.3V_6
C397
R809 *0_4
+
R811 0_4
Place next to pin 28
C418 10u /6.3V_6
close to pin 2 7
ANALOG
C428
ADOGND
R389 47K_4
R390
4.7K_4
C424 *1 00p/50V_4
PCH_AZ_CODEC_RST# 8
PCH_AZ_CODEC_SYNC 8
+3V
PCH_AZ_CODEC_SDIN0 8
PCH_AZ_CODEC_BITCLK 8
PCH_AZ_CODEC_SDOUT 8
C423
10u/6.3V_6
0.1u/10V_4
ADOGND
SPK-2
Combo MIC
HPOUT_JDSENSEA
BEEP_2
D20 RB500 V-40
D19 RB500 V-40
Internal Speaker (AMP)
Pin1 - Pin6: DGND
Pin7 - Pin12: AGND
Thermal Pad: DGND
SPKR 8,10
PCBEEP_EC 33
L_SPK2+
L_SPK2-
R_SPK2R_SPK2+
25
26
28
31
35
33
32
HP-OUT-L
HP-OUT-R
MIC1-VREFO-L
close to pin 7
29
27
30
VREF
LDO1-CAP
MIC2-VREFO
MIC1-VREFO-R
10u/6.3V_6
ACZ_SDIN0_R
C399 22p/50V_4
ADOGND
AVSS1
AVDD1
24
LINE2-L
23
LINE2-R
22
LINE1-L
21
LINE1-R
20
MIC1-R
19
MIC1-L
18
MIC2-R
17
MIC2-L
16
MONO-OUT
15
JDREF
14
Sense B
13
Sense A
ANALOG
ALC3225
12
DIGITAL
1.6Vrms
PCBEEP B EEP_1
C430 1u/16V_6
+3VDVDDIO
R380 33_ 4
Place next to pin 26
L_SPK2
R_SPK2
MIC2-R
MIC2-L
R395 20K/F_4
close to pin 1 5
R394 39.2 K/F_4
close to pin 1 3
PCBEEP dont co upling any signals if possible
8/17 separate PCBEEP to Digital f rom Realtek sugges tion
C431
100p/50V_4
R385 *S HORT_6
C410
C415
0.1u/10V_4
10u/6.3V_6
Place next to pin 9
34
CBN
CPVEE
20120910: ALC3225 has a internal MOSFET
C693 2.2u/6.3V_6
C721 2.2u/6.3V_6
HP-L
R408 56_ 4
HP-R HP-R-1
R420 56_ 4
R_SPK2
C476 1u/16V_6
L_SPK2
C465 1u/16V_6
+5VA
R439 *2 0K/F_4
Layout Note:
Place very close to U5001
R440 *SHORT_6
R441 *SHORT_6
R444 *SHORT_6
R445 *SHORT_6
C493
C492
*68p/50V_4
*68p/50V_4
MIC2-VREFO
R794 1K_4
R415 *SHORT_6
R433 *SHORT_6
close to U5001
R422 1K/F_6
R411 1K/F_6C401
C489
*68p/50V_4
R791
22K/F_4
ADOGND
+5V
R431 *SHORT_6
C466
0.1u/10V_4
C475 1u/1 6V_6
C471 1u/1 6V_6
R421
1.62K/F_6
ADOGND
R436 *22K/F_4
C488
*68p/50V_4
COMBO MIC JD
R788
2.2K_4
12
D37
*14V/100p_4
ADOGND
12
D24
*14V/100p_4
+5V_AMP
C472
10u/6.3V_6
U29
ANALOG
9
INPUT-R
7
EAPD#
PD#
10
R410
1.62K/F_6
INPUT-L
8
BYP
ALC1001-CGT
C480
2.2u/6.3V_6
Layout Note:
Place very close to U5001
ADOGND
40mil for each signal
L_SPK+ L_ SPK+_1
R442 *SHORT_6
R443 *SHORT_6
R_SPK-
R446 *SHORT_6
R447 *SHORT_6
R789 22K/F_4
C681
10u/6.3V_6
ADOGND
COMBO_MIC
HPL_SYSHP-L-1
HPR_SYS
HPOUT_JD
DIGITAL
OUT-RP
OUT-RN
OUT-LN
OUT-LP
ANALOG
GND
13
C495
*68p/50V_4
6
5
2
1
11
G1
12
G2
DIGITAL
C494
*68p/50V_4
12
12
D26
*14V/100p_4
ADOGNDADOGND ADOGND
4
PVDD13PVDD2
D28
*14V/100p_4
Output Gain Table
R1
NC
0
NC
0
R_SPK2+
R_SPK2-
L_SPK2L_SPK2+
G1
G2
C491
*68p/50V_4
R2
NC
NC
0
0
L_SPK+_2
L_SPK-_2
L_SPK-_1L_SPKR_SPK-_2
R_SPK+_2
R_SPK-_1
R_SPK+_1R_SPK+
C490
*68p/50V_4
Combo Jack
CN20
4
3
1
2
5
6 7
SIT_2SJ3052-005111F
R3
R4
0
0
NC
0
0
NC
NC
NC
G1
G2
CN26
1
2
3
4
5
6
789
10
SPK CN
ADOGND
Gain (Differential)
11dB
14dB
19dB
25dB
+5VA
R407
*0_4
R1 R2
R412
0_4
R3 R4
ADOGND
R416
*0_4
R417
0_4
INT DMIC(AMP)
R810 *0_4
Power(ADO) Mute(ADO)
+5V
A A
C497
C498
*0.1u/10V_4
*10u/6.3V_6
U30
3
IN
2
GND
1
SHDN
*G923-330T1UF
R782 *0_4
ANALOG DIGITAL
C482
*10u/6.3V_6
+5VA
ADOGND
C685
*0.1u/10V_4
4
OUT
5
R435 *29.4K/F_4
SET
R438
*10K/F_4
ADOGND
R808 *0_4
R785 *SHORT_4
R355 *SHORT_4
R346 *SHORT_4
R778 *SHORT_4
R790 *SHORT_4
C679 * 1000p/50V_4
C733 * 1000p/50V_4
ADOGND
Tied at one point only under
the codec or near the codec
+3V
0V : Power down Class D SPK amplifer
R357
3.3V : Power up Class D SPK amplifer
*10K_4
D17 RB500V-40
D18 RB500V-40
AMP_MUTE# 33
PCH_AZ_CODEC_RST#
+3V_DMIC
CN22
DMIC_DATA_R
4
3
2
6
1
5
AMIC
DMIC_CLK_RPD# AMP_MUTE#
C730, C787 close U37 pin3 and L65
5
4
3
2
R418 *SHORT_6
12
D27
*14V/100p_4
12
D25
*14V/100p_4
+3V
DMIC_DATA
DMIC_CLK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
REALTEK ALC3225
REALTEK ALC3225
REALTEK ALC3225
1
ZRQ
ZRQ
ZRQ
3A
3A
30 47Friday, April 12, 2013
30 47Friday, April 12, 2013
30 47Friday, April 12, 2013
3A
C483
*22p/50V_4
C474
*22p/50V_4
R434 *S HORT_4L26 HCB2012KF220T60/6A/22ohm_8
R432 *S HORT_4
5
USB3.0
Active High:
1st: AL007534001 (Promate)
2nd: AL000547006 (GMT)
3rd: AL002511002 (DDS)
D D
USB3_RXN09
USB3_RXP09
USB3_TXN09
USB3_TXP09
C C
C40 0.1u/10V_4
C41 0.1u/10V_4
USB_OC0#9
USBP1-_C
USBP1+_C
USB3_RXN0
USB3_RXP0
USB_BC_EN
USB3_TXN0_C
USB3_TXP0_C
+5VPCU
C26 1u/6.3V_4
U10
2
IN1
IN23OUT2
4
EN#
1
GND
UP7534ARA8-15
R493 *SHORT_4
R492 *SHORT_4
R56 *SHORT_4
R57 *SHORT_4
R58 *SHORT_4
R59 *SHORT_4
OUT3
OUT1
OC#
8
7
6
5
USBPWR1
12
C534
100u/6.3V_1206
USBP1-_R
USBP1+_R
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0_R
USB3_TXP0_R
4
C37
1000p/50V_4
D33 *5V/0.2p_4
D32 *5V/0.2p_4
D5 *5V/0.2p_4
D6 *5V/0.2p_4
D7 *5V/0.2p_4
D8 *5V/0.2p_4
USBP1-_R
USBP1+_R
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0_R
USB3_TXP0_R
1 2
1 2
1 2
1 2
1 2
1 2
USB 3.0 Connector
CN8
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
11111010131312
USB3.0 CONN
12
3
USB Charger to 3.0
CB SELCDP
0
1
1 1
BC_CEN
USBP1-_C
USBP1+_C
CEN:SLG55584A----pull up
SLG55584----pull low
USB_BC_ON33
2
Funcion
DCP autodetect with mouse/keyboard wakeup
X
S0 charging with SDP only
0
S0 charging with CDP or SDP only (depending on external device)
R73 *SHORT_4
R74 *0_4
C54 0.1u/10V_4
+3VPCU
C38 *0.1u/10V_4
2
1
U11
3 5
TC7SH08FU
R36 *0_4
+5VPCU
4
BC_CEN
U12
1
CEN
CB1
2
TDM
DM
3
DP
TDP
4
SELCDP
VDD
Thermal Pad
SLG55584A
R68 10K_4
R507 *0_4
R506 *0_4
R54 47K_4
USB_BC_ON
8
7
6
5
9
USB_BC_EN
1
USB_CHARGE_ON 33
MAINON 33,36,37,39
USBP1- 9
USBP1+ 9
31
USB2.0
+5V_S5
B B
USBON#33
C207
1u/6.3V_4
USB_OC2#9
USBP4-9
USBP4+9
A A
5
U17
2
IN1
IN23OUT2
4
EN#
1
GND
UP7534BRA8-15
8
OUT3
7
6
OUT1
5
OC#
R90 *SHORT_4
R89 *SHORT_4
C576
470p/50V_4
USBP4-_CN
USBP4+_CN
C581
0.1u/10V_4
USBPWR2
12
C599
100u/6.3V_1206
12
D10
*5V/0.2p_4
4
12
D11
*5V/0.2p_4
CN11
1
VDD
2
D-
3
D+
4
GND1
USB2.0 CONN
GND6
GND5
GND7
GND8
6
5
7
8
I/O board
3
1st source: AL007534000
2ns source: AL082025000
+5V_S5
USBON#
C188
1u/6.3V_4
USB_OC3#9
USBP6-9
USBP6+9
U18
2
IN1
IN23OUT2
4
EN#
1
GND
UP7534BRA8-15
R660 *SHORT_4
R664 *SHORT_4
2
OUT3
OUT1
OC#
USBP6-_R
USBP6+_R
8
7
6
5
USBPWR3
C239
0.1u/10V_4
USBP6-_R
USBP6+_R
NBSWON#13,33
LID#24,33
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VPCU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
INT&EXT USB
INT&EXT USB
INT&EXT USB
CN12
1
1
13
2
2
14
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
USB/B CONN
1
13
14
ZRQ
ZRQ
ZRQ
3A
3A
31 47Friday, April 12, 2013
31 47Friday, April 12, 2013
31 47Friday, April 12, 2013
3A
5
K/B (KBC) TOUCHPAD BOARD CONN (TPD)
CN24
26
MY033
MY133
MY233
MY333
MY433
MY533
D D
C C
MY633
MY733
MY833
MY933
MY1033
MY1133
MY1233
MY1333
MY1433
MY1533
MY1633
MY1733
MX733
MX633
MX533
MX433
MX333
MX233
MX133
MX033
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KB_CONN
28
27
4
7 8
5
6
3
4
1
2
CP8 *100p/50Vx4
7 8
5
6
3
4
1
2
CP9 *100p/50Vx4
7 8
5
6
3
4
1
2
CP5 *100p/50Vx4
7 8
5
6
3
4
1
2
CP10 *100p/50Vx4
7 8
5
6
3
4
1
2
CP6 *100p/50Vx4
7 8
5
6
3
4
1
2
CP7 *100p/50Vx4
C481 *100p/50V_4
C479 *100p/50V_4
+3VPCU
RP5 10K_10P8R
10
9
MX6
8
MX7
7 4
MX5
MX4
3
MY17
MY16
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX1
MX0
1
MX3
2
MX2
3
MX1
MX0
56
*0.1u/10V_4
+3V
+5V
C478
TPCLK33
TPDATA33
R430 *SHORT_4
R429 *0_4
R428
10K_4
C477
*0.1u/10V_4
SMBALERT#8
R427
10K_4
R426 *SHORT_4
R425 *SHORT_4
+3V
+5V
3
Q42
*2N7002K
L38 *SHORT_6
L37 *0_6
CLK_SDATA8,13,14,15,23
CLK_SCLK8,13,14,15,23
+3V
2
1
C727
0.1u/10V_4
50mil
R423 *SHORT_4
R424 *SHORT_4
BOARD_ID22,10
LOW=ELAN
HIGH=SYNAPTICS
+TPVDD
TPCLK_R
TPDATA_R
CLK_SDATA_R
CLK_SCLK_R
TP_INT#_D
CN21
1
2
3
4
5
6
789
TP CN
10
32
KB_BL LED (KBC)
B B
+5V
KB_BL_LED33
A A
2
Q43
KBL@DTC144EU
1 3
5
R437
KBL@10K_4
+5V
1
2
3
C484 *KBL@2.2u/6.3V_6
Q44
KBL@AO3413
C469
KBL@4.7u/6.3V_6
R419 *KBL@SHORT_4
C470
KBL@0.01u/16V_4
+5V_KB_R+5V_KB
CN25
346
2
5
1
KBL@KB_backlight
4
CPU FAN1 (THM)
FAN1_PWM33
CPU FAN2 (THM)
FAN2_PWM33
+3V
R730
1K_4
2
1 3
Q64
MMBT3904-7-F
+3V
R475
EV@1K_4
2
1 3
Q48
EV@MMBT3904-7-F
3 2 1
+5V
+5V
+3V
R729
10K_4
FANSIG33
FAN_PWM_CN1
30mil
+3V
R474
EV@10K_4
FAN2SIG33
FAN_PWM_CN2
30mil
R731
10K_4
R473
EV@10K_4
+5V
R732
*SHORT_8
+5V_FAN1
+5V
R470
*EV@SHORT_8
+5V_FAN2
CN15
345
2
1
FAN1
CN10
345
2
1
EV@FAN2
6
6
CPU
GPU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
ZRQ
ZRQ
ZRQ
3A
3A
32 47Friday, April 12, 2013
32 47Friday, April 12, 2013
32 47Friday, April 12, 2013
3A
5
EC(KBC)
R368 2.2_6
1 2
+3VPCU
+3VPCU_EC and +3V_RTC
minimum trace width 12mils.
D D
+3VPCU
D22
R377
SDMK0340L-7-F
100K_4
1 2
2 1
WRST#
C408
1u/6.3V_4
C C
B B
CLK_PCI_EC
R372
*22_4
C395
*10p/50V_4
Please do not place any
pull-up resistor
on GPG0, GPG2, and GPG6
(Reserved
hardware strapping).
L25
BLM11A05S/0.2A/120ohm_6
C389
0.1u/10V_4
LPC_LAD08,26,27
LPC_LAD18,26,27
LPC_LAD28,26,27
LPC_LAD38,26,27
PLTRST#7,13,16,26,27,28
CLK_PCI_EC9
LPC_LFRAME#8,26,27
IRQ_SERIRQ10,27
SIO_EXT_SMI#10
SIO_EXT_SCI#10
SIO_RCIN#10
HWPG_1.05V_EC#5
BT_POWERON26
EC_PWROK5,7
KB_BL_LED32
AMP_MUTE#30
COLOR_ENG24
DPWROK7
PCH_SLP_SUS#7
LAN_WAKE#28
FB_CLAMP_REQ#19
PCBEEP_EC30
PCH_PWROK7
PCH_SPI_CLK_EC8
SPI_CS0#_UR_ME8
PCH_SPI_SI_EC8
PCH_SPI_SO_EC8
BATLED1#27
12 mils
C383
0.1u/10V_4
LID#24,31
SUSON37
MAINON31,36,37,39
D/C#34
TP71
TP69
TP72
MY1632
MY1732
TP70
MY1032
MY1132
MY1232
MY1332
MY1432
MY1532
C419
0.1u/10V_4
ECAGND
C723
C346
0.1u/10V_4
C422
0.1u/10V_4
C391
0.1u/10V_4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
119
123
80
104
33
88
81
87
109
108
71
72
73
35
34
107
95
94
105
101
102
103
56
57
32
100
106
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
MX032
MX132
MX232
MX332
MX432
MX532
MX632
MX732
0.1u/10V_4
R359 *SHORT_6
+3V
PLTRST#
SIO_A20GATE
PROCHOT_EC
BT_POWERON
E51_TXD
R406 *SHORT_4
HWPG
FB_CLAMP_REQ#
SLP_A#
SSCE0#
EC_DRAMRST_CTRL
MY032
MY132
MY232
MY332
MY432
MY532
MY632
MY732
MY832
MY932
For test only
A A
5
TP103
4
+A3VPCU
12 mils
+3V_RTC
+3VPCU_EC
C345
0.1u/10V_4
+3V_EC
U27
LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)
LPCPD#/WUI6/GPE6(Dn)
GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up)
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)
DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/GPF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)
ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X)
ADC7/CTS1#/WUI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7(Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5
KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(Up)
SSCE0#/GPG2(X)
SSCE1#/GPG0(X)
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
3
5
6
C380
0.1u/10V_4
114
11
VCC
VSTBY26VSTBY50VSTBY92VSTBY
LPC
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
SW5
2
14
*Power Switch
4
121
VSTBY
UART port
65
NBSWON#
TP102
3
74
VBAT
+3VPCU_ECPLL
127
AVCC
IT8587
1
L24
BLM11A05S/0.2A/120ohm_6
VSTBY
VSS
C344
0.1u/10V_4
84
82
EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)
VSS27VSS49VSS
91
EGAD/WUI25/GPE1(Dn)
VSS
VSS
113
L23
BLM11A05S/0.2A/120ohm_6
dGPU_OPP#
R343 *SHORT_4
19
20
97
WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)
L80LLAT/WUI7/GPE7(Up)
L80HLAT/BAO/WUI24/GPE0(Dn)
GPIO
+3VPCU_EC
(For PLL Power)
S5_ON
93
PECI/SMCLK2/WUI22/GPF6(Up)
SMDAT2/WUI23/GPF7(Up)
PS2CLK0/TMB0/CEC/GPF0(Up)
PS2DAT0/TMB1/GPF1(Up)
SM BUS
PS2CLK2/WUI20/GPF4(Up)
PS2DAT2/WUI21/GPF5(Up)
CLKRUN#/WUI16/GPH0/ID0(Dn)
PS/2
PWM
TACH1A/TMA1/GPD7(Dn)
TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)
RI1#/WUI0/GPD0(Up)
A/D D/A
DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)
CLOCK
RI2#/WUI1/GPD1(Up)
ADC4/WUI28/GPI4(X)
WAKE UP
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)
VCORE
AVSS
12
75
122
C396
0.1u/10V_4
ECAGND
3
DNBSWON# 7
SB_ACDC 34
dGPU_OPP# 19
S5_ON 35,36,39
IOAC_WLANPWR# 26
WLAN_WAKE# 26
IOAC_LANPWR# 28
USB_CHARGE_ON 31
USB_BC_ON 31
CLKRUN# 7,27
110
SMCLK0/GPB3(X)
SMDAT0/GPB4(X)
SMCLK1/GPC1(X)
SMDAT1/GPC2(X)
PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)
TACH0A/GPD6(Dn)
PWRSW/GPE4(Up)
ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
TACH2/GPJ0(X)
GPJ1(X)
CK32KE/GPJ7
CK32K/GPJ6
IT8587E/FX
MBCLK
111
MBDATA
115
2ND_MBCLK
116
2ND_MBDATA
117
EC_PECR_R
118
85
86
89
90
24
25
28
SUSLED#
29
30
31
47
48
120
124
125
NBSWON#
18
21
112
ICMNT
66
67
C473 10u/6.3V_6
68
69
70
76
77
EC_FB_CLAMP
78
79
2
128
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
SM Bus 3
MBCLK 34
MBDATA 34
R339 43_4
EC_FPBACK# 24
ECAGND
PCH_SUSPWARN# 7
Battery
PCH/VGA
N/A
2ND_MBCLK 8,19
2ND_MBDATA 8,19
H_PECI 4
WLAN_OFF 26
USBON# 31
TPCLK 32
TPDATA 32
PWRLED# 27
ME_WR# 8
SUSLED# 27
BATLED0# 27
FAN1_PWM 32
FAN2_PWM 32
FANSIG 32
FAN2SIG 32
ACIN 34
TEMP_MBAT 34
NBSWON# 13,31
SUSB# 7,13
SUSC# 7,13
RSMRST# 7
RF_EN 26
ICMNT 34
APWORK 5,7
dGPU_ALT# 19
dGPU_OTP# 19
EC_FB_CLAMP 17,19,20
PCH_SLP_S0# 7,13
PCH_SUSACK# 7
IOAC_RST# 26,28
VRON 38
SM BUS PU(KBC)
HWPG(KBC)
SM Bus 4
R362
*100K_4
+3V
C368
*0.1u/10V_4
2
1
U22
3 5
*TC7SH08FU
4
PCIERST#
PCIERST# 26,28
iRST
IOAC_RST#
PCI_PLTRST#7
R366
*100K_4
3 2 1
SSCE0#
dGPU_OPP#
MAINON
SUSON
VRON
PCH_SPI_SI_EC
PCH_SPI_SO_EC
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
PROCHOT_EC
R329
100K_4
DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP
HWPG_1.5V39
HWPG_1.05V5
HWPG_VDDR37
HWPG_1.05V_S55,13,36
SYS_HWPG35
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VPCU
+3VPCU_EC
R342 10K_4
+3V_GFX
R376 *10K_4
R828 100K_4
R827 100K_4
R826 100K_4
R341 *10K_4
R747 *10K_4
R332 4.7K_4
R340 4.7K_4
R331 4.7K_4
R330 4.7K_4
3
2
1
D1
D2
+3VPCU
+3V_S5
Q40
2N7002K
D42 RB500V-40
D23 *RB500V-40
D40 *RB500V-40
D39 RB500V-40
D41 RB500V-40
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
33
H_PROCHOT# 4,34,38
+3V
R393
10K_4
HWPG
ZRQ
ZRQ
ZRQ
33 47Friday, April 12, 2013
33 47Friday, April 12, 2013
33 47Friday, April 12, 2013
3A
3A
3A
5
PJ5
1
2
3
4
Power conn
D D
C C
ACIN33
ACPRESENT7
SB_ACDC33
BATT_EN#29
B B
PJ6
89
7
BATT_EN#
6
5
4
3
50458-00801-V01
2
1
10
PR117
*0_4
B-stage DNP
A A
PU10
IP4223-CZ6
1
CH1
2
VN
CH23CH3
Add ESD diode base on EC FAE suggestion
BATT_EN#
*100p/50V_4
CH4
VP
PC26
0.1u/50V_6
PR61
*SHORT_4
PC82
0.1u/50V_6
PC83
6
5
4
5
PR112 100_4
PC73
*47p/50V_4
PR97
100_4
MBDATA
+3VPCU
MBCLKTEMP_MBAT
PR69
*0_4
PC27
2200p/50V_6
PR70
*10K_4
PC74
*47p/50V_4
PR108
100_4
+3VPCU
DEL
PL7,PL8
12/7
PR56
100K_4
6
2
1
TEMP_MBAT
MBCLK 33
MBDATA 33
DEL
PL5,PL6
12/7
PR60
100K_4
5
PQ18
2N7002DW
4 3
PR114 1M_4
BAT-V
PC39
0.1u/25V_4
4
VA1
PD5
1N4148WS
PR54
*SHORT_6
+3VPCU
TEMP_MBAT 33
+3VPCU
24737_BM#
4
PC113
0.1u/50V_6
recommend 200mA at least.
PR199
10K/F_4
PR82
20_1206
MBDATA
MBCLK
PR104
10K_4
PR197
*10K_4
PR110
316K/F_4
PR116
*100K_4
PR206
100K/F_4
3
2
PQ27
*2N7002K
1
2 1
PR200
*SHORT_4
PR204
*SHORT_4
24737_CMPOUT
24737_ILIM
PC133
0.01u/25V_4
ICMNT33
PD11
SMAJ20A
PR195
63.4K/F_4
24737_ACDET
24737_VCC
PC72
0.47u/25V_6
24737_BM#
24737_CMPIN
PR198
*100K_4
PC35
0.1u/50V_6
PC65
0.1u/50V_6
6
20
5
8
9
11
3
10
4
PR98
*1.62K/F_4
3
VA2
PD6
SBR1045SP5-13
1
52
2
4
PR44
*SHORT_4
PC132
PR203
*SHORT_6
24737_SRP
24737_SRN
+1.05V
10/29
3
1
PQ24
*2N7002K
1u/16V_6
24737_REGN
24737_BST
24737_DH
24707_LX
PR208
10/F_6
PR207
7.5_6
For battery reverse
PR92
*100K_4
2
PD9
RB500V-40
PC128
47n/50V_6
ACDET
VCC
ACOK#
SDA
SCL
BM#
CMPOUT
ILIM
CMPIN
PR51
220K_4
PR52
220K_4
0.1u/50V_6
2
BQ24737RGRR
IOUT
7
PC127
100p/50V_4
PC126
ACP
PU14
21
1
ACN
GND
GND22GND24GND23GND
25
24737_CMPOUT
1
3
1 6
2
3
PQ16
IMD2AT108
24737_ACP
24737_ACN
PC69
0.1u/50V_6
REGN
BTST
HIDRV
PHASE
LCDRV
PGND
SRP
SRN
PR96
*0_4
PQ14
AOL1413
5
4
16
17
18
19
15
14
13
12
Limit set on 60W/3.16A
3 2 1
PR78
0.01/F_0612
1 2
3
D/C# 33
4
4
PC134
0.1u/25V_4
PC136
0.1u/25V_4
PC135
0.1u/25V_4
H_PROCHOT# 4,33,38
PR196
*SHORT_4
24737_ACN
24737_ACP
PR194
*SHORT_4
52
3
52
3
2200p/50V_6
PQ23
MDV1528
1
PQ55
MDV1528
1
PC59
PR100
*4.7_6
PC75
*680p/50V_6
PC52
0.1u/50V_6
PL16
6.8uH_7X7X3
24737_SRP
24737_SRN
VIN
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
Pin10 ILIM=0.793V
Rsr = 0.01ohm
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Date: Sheet of
Date: Sheet of
Date: Sheet of
VIN
PC62
4.7u/25V_8
PR209
*SHORT_4
PQ29
AOL1413
1
3
PR107
PC67
33K/F_4
2200p/50V_6
2
PQ26
2N7002K
PR210
0.01/F_0612
1 2
PR211
*SHORT_4
PC140
2200p/50V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRQ
ZRQ
ZRQ
52
4
PR109
10K_4
3
1
PC139
10u/25V_1206
34 47Friday, April 12, 2013
34 47Friday, April 12, 2013
34 47Friday, April 12, 2013
34
BAT-V24737_DL
PC137
10u/25V_1206
2A
2A
2A
5
4
3
2
1
PC64
0.1u/50V_6
PR105
22_8
SYS_SHDN#
PC130
2200p/50V_6
PQ57
MDV1528
PQ54
MDV1595S
+15V_ALWP
1
1
52
3
52
3
PD7
1PS302
PD8
1PS302
SYS_SHDN# 10,27,39
SYS_HWPG33
SYS_SHDN#
4
4
2
3
1
2
3
1
PC76
0.1u/50V_6
*SHORT_4
PC58
0.1u/50V_6
PR191
PC57
0.1u/50V_6
PR192
1/F_6
+3VPCU
PR170
*SHORT_4
51225_EN1
51225_DH1
51225_VBST1
51225_SW1
51225_DL1
51225_FB1
PC51
0.1u/50V_6
PR67
*100K/F_4
20
16
17
18
15
14
PR90
*SHORT_6
VL 3V_LDO
PC50 10u/6.3V_6
7
PGOOD
EN1
DRVH1
VBST1
SW1
DRVL1
2
VFB1
VO1
VCLK
19
51225_VCLK
13
VREG5
PU9
TPS51225RUKR
CS11CS2
5
51225_CS1
51225_CS2
PR68 69.8K/F_4
PR84 84.5K/F_4
35
PR77
*SHORT_6
PR176
10K/F_4
PC46
PC49 0.1u/25V_4
51225_VIN
12
VIN
26
PC48 4.7u/6.3V_6
3
6
SYS_SHDN#
EN2
VREG3
DRVH2
VBST2
SW2
DRVL2
VFB2
GND
GND
GND23GND24GND25GND
10
9
8
11
4
21
22
51225_DH2
51225_VBST2
51225_SW2
51225_DL2
51225_FB2
PR64
1/F_6
PC47
0.1u/50V_6
52
PQ48
4
4
MDV1528
3
1
52
PQ52
MDV1595S
3
1
2200p/50V_6
PL14
2.2uH_7X7X3
PR65
*4.7_6
PC42
*680p/50V_6
PC37
4.7u/25V_8
+3VPCU
3.3 Volt +/- 5%
TDC : 4.7A
PEAK : 6.2A
OCP : 7.5A
Width : 200mil
PR173
6.81K/F_4
PR174
10K/F_4
OCP:7.5A
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.355M*9)
~2.676A
Iocp=7.5-(2.676/2)=6.16A
PR181
*SHORT_6
Vth=6.16A*14mOhm+1mV=87.27mV
R(Ilim)=(87.27mV*8)/10uA
~69.81K
PC121
0.1u/50V_6
VIN
+3VPCU
+
PC119
220u/6.3V_6X4.2
MAIND
D D
+5VPCU
VIN
+
+5VPCU
5 Volt +/- 5%
12
PC144
47u/25V_6X4.5
MAIND 36,37,39
PC129
4.7u/25V_8
TDC : 5.4A
PEAK : 7.2A
OCP : 9A
Width : 220mil
PL15
2.2uH_7X7X3
C C
+
PC131
220u/6.3V_6X4.2
OCP:9A
L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
B B
Iocp=9-(3.367/2)=7.32A
Vth=7.32A*14mOhm+1mV=103.43mV
R(Ilim)=(103.43mV*8)/10uA
=82.774K
PC125
0.1u/50V_6
PR80
15.4K/F_4
PR81
10K/F_4
+15V
PR93
*4.7_6
PC68
*680p/50V_6
+15VVIN
+5V_S5+3V_S5
PR118
1M_6
A A
S5_ON
2
PQ30
DTC144EU
1 3
5
PR120
1M_6
PR55
22_8
3
2
PQ17
2N7002K
1
PR85
22_8
3
2
2
PQ22
2N7002K
1
VIN +5VPCU
3
1
PR115
1M_6
2N7002K
4
PR113
*1M_6
S5D MAIND MAIND S5D
PQ28
PC81
*2.2n/50V_4
+5VPCU
52
4
3
TDC : 1.5A
PEAK : 2A
Width : 80mil
1
PQ53
MDV1528Q
+5V_S5
52
4
3
1
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
3
PQ56
MDV1528Q
+3VPCU
3
2
PQ51
AO3404
1
+5V
+3V +3V_S5
TDC : 1.4A
PEAK : 1.8A
Width : 110mil
+3VPCU
3
2
1
TDC : 1.2A
PEAK : 1.6A
Width : 60mil
2
PQ47
AO3404
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ZRQ
ZRQ
ZRQ
35 47Friday, April 12, 2013
35 47Friday, April 12, 2013
35 47Friday, April 12, 2013
1
2A
2A
2A
5
4
3
36
D D
+3V
PR48
*100K/F_4
HWPG_1.05V_S55,13,33
MAINON31,33,37,39
S5_ON33,35,39
C C
B B
PR164 *0_4
PR165 *SHORT_4
PR166
*100K/F_4
OCP=10A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=10-(1.555/2)*14mohm
=0.129V
Rlimit=0.129/10uA*8=103.293Kohm
PR47 105K/F_4
PR42 464K/F_4
51211V_EN 51211V_VBST
51211V_TRIP
51211V_TST
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
7
V5IN
PU7
TPS51211DSCR
GND13GND14GND15GND
16
DRVH
VBST
SW
DRVL
GND
4
+5VPCU
PC28
1u/10V_4
51211V_DRVH
9
10
8
51211V_SW
6
51211V_DRVL
11
FB
51211V_FB
PR46
*SHORT_6
PC29
0.1u/50V_6
PQ40
MDV1595S
52
PQ43
4
4
MDV1528
3
1
52
3
1
PC109
2200p/50V_6
PL11
2.2uH_7X7X3
PR162
*4.7_6
PC25
*680p/50V_6
PC110
4.7u/25V_8
PR43
5.1K/F_4
PR45
10K/F_4
PC107
0.1u/50V_6
VIN
+
PC108
330u/2.5V_6X4.2
+1.05V_S5
+1.05V
1.05 Volt +/- 5%
TDC : 6.7A
PEAK : 8A
OCP : 10A
Width : 280mil
+1.05V_S5
52
MAIND35,37,39
MAIND
4
3
1
PQ37
MDV1528Q
+1.05V
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZRQ
ZRQ
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3 2 1
Date: Sheet of
PROJECT :
+1.05V(TPS51211)
+1.05V(TPS51211)
+1.05V(TPS51211)
ZRQ
2A
2A
2A
36 47Friday, April 12, 2013
36 47Friday, April 12, 2013
36 47Friday, April 12, 2013
5
4
3
TDC : 0.75A
PEAK : 1A
Width : 40mil
D D
TDC : 0.38A
PEAK : 0.5A
DDR_VTTREF
Width : 20mil
PC70
0.22u/10V_4
+3V
PR94
*100K/F_4
10/29
PC71
20
17
16
19
18
26
51216_REF
PR102
10K/F_4
C C
HWPG_VDDR33
MAINON31,33,36,39
SUSON33
PR103
*0_4
PR106
*SHORT_4
PR95
200K/F_4
PR99
15.4K/F_4
51216_S3
51216_S5
51216_MODE
51216_TRIP
VREF=1.8V
PR202
*0_4
0.1u/10V_4
51216_S551216_S3
B B
PGOOD
S3
S5
MODE
TRIP
PAD
+DDR_VTT_RUN
PC61
10u/6.3V_6
21
22
PAD
REF
8
6
51216_REFIN
5
PAD
TPS51216RUKR
REFIN
9
37
PC66
10u/6.3V_6
Close to IC
Greater than or equal 40mil
+5VPCU
PC63
12
14
15
13
11
10
PR201
*SHORT_6
10u/6.3V_6
51216_DRVH
51216_VBST
51216_SW
51216_DRVL
PR111
2/F_6
4
VTTREF
PU11
VDDQSNS
25
3
1
VTTGND
2
VTT
VTTSNS
PAD24PAD
VLDOIN
V5IN
DRVH
VBST
SW
DRVL
PGND
GND
PAD
7
23
PC78
1u/10V_4
PC79
0.1u/50V_6
1
8
PQ58
FDMS3660S
RDSon=3.2mohm
G1
S1/D2
G2
VIN
+1.35V_SUS
1.35 Volt +/- 5%
2
D1D1D1
PC141
2200p/50V_4
9
51216_SW
PR119
S2S2S2
567
*4.7_6
PC80
*680p/50V_6
PC142
4.7u/25V_8
PL17
0.68uH_7X7X3
10/12 change
PC138
0.1u/50V_6
Close to output cap
+
PC143
330u/2.5V_6X4.2
+
PC84
*330u/2V_7343
+1.35V_SUS
TDC : 12.6A
PEAK : 16.8A
OCP : 20A
Width : 520mil
+1.35V_SUS
+1.35V_SUS 4,5,14,15,29,41
stuff for C8 ODT power off
DDR_VTTT_PG_CTRL4
OCP=10A
L ripple current
=(19-1.35)*1.35/(0.68u*400k*19)
=4.611A
Vtrip=10-(4.611/2)*2.5mohm
A A
=0.01923V
Rlimit=0.01923/10uA*8=15.389Kohm
OCP=20A
L ripple current
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=20-(5.079/2)*2.5mohm
=0.04365V
Rlimit=0.04365/10uA*8=34.92Kohm
PR205 *SHORT_4
5
51216_S3
PR101
30.1K/F_4
PC77
0.01u/25V_4
DDR=1.35V
OCP=10A
PR95=15.4K/F_4
PR97=30.1K/F_4
DDR=1.5V
OCP=20A
PR95=35.7K/F_4
PR97=51K/F_4
4
Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge
S3 S5
S0
S3 (mainon off)
S4/S5
1
0
1
1
3 2 1
ON
ON ON
OFF
VTTREF+1.35VSUS
ON ON
OFF
OFF OFF0 0
MAIND35,36,39
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MAIND
10/12 reserve
DDR=1.5V,PC9032 & PQ9016 POP
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
3
TDC : 0.56A
1
PQ59
*AO3404
PEAK : 0.75A
Width : 20mil
+1.5V
ZRQ
ZRQ
ZRQ
37 47Friday, April 12, 2013
37 47Friday, April 12, 2013
37 47Friday, April 12, 2013
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
2A
2A
2A
5
4
3
2
1
Place NTC close to the
+3V_S5 51622_VREF +5V_S5
1_6
Close to VR
PR7
56_4
PC90
*330p/50V_4
PC91
*0.01u/50V_4
PR134
PC10
*56_4
PR130
1u/6.3V_4
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
PR9 *SHORT_4
+1.05V_VCCST
PC94
0.1u/10V_4
PR10
PR137
+VCCIN
51622_VRON
130/F_4
*100K/F_4
PR142
100K/F_4
PR6
*75/F_4
+3V_S5+3V
PR22
*100K/F_4
PR127
*10_4
PR128
*10_4
Close to the
CPU side.
D D
H_PROCHOT#4,33,34
VR_SVID_CLK5
VR_SVID_ALERT#5
VR_SVID_DATA5
C C
IMVP_PWRGD5,10
VRON33
VRON_CPU5
VCC_SENSE5
VSS_SENSE12
PR131 *SHORT_4
PR14 *0_4
PR16 *SHORT_4
Parallel
B B
PC6
0.33u/6V_4
51622_SKIP#
51622_VRON
51622_VFB
51622_GFB
51622_VREF
PR8 *SHORT_4
PR145
9.31K/F_4
150K/F_4
PR20
30
VR_HOT
31
VCLK
32
ALERT
1
VDIO
3
PGOOD
7
SKIP
8
VR_ON
24
VFB
23
GFB
51622_COMP
PC8
PR133
10K/F_4
100p/50V_4
PR129 2.7K/F_4
PR5
5.76K/F_4
PR19
PR143
499K/F_4
PR21
75K/F_4
PR144
51622_O-USR
51622_F-IMAX
51622_VREF
51622_VDD
9
10
27
2
VDD
VREF
O-USR
F-IMAX
PU5
TPS51622RSM
OCP-I12IMON
DROOP25COMP
13
26
51622_DROOP
51622_IMON
51622_OCP-I
PC5
1500p/50V_4
VCORE Hot-Spot.
51622_PWM1
51622_PWM2
51622_NC
51622_CSP1
51622_CSN1
51622_CSN2
51622_CSP2
51622_PU3
PR132
PR23
10K/F_4
10/F_6
PC7
1u/10V_4
PR138
*0_4
+3V_S5
PR149
PR148
*39.2K/F_4
*90.9K/F_4
150K/F_4
51622_B-RAMP
51622_SLEWA
14
15
11
SLEWA
B-RAMP
GND
29
42
PR140
430K/F_4
PR146
75K/F_4
PR150
THERM
PC14
39K/F_4
51622_THERM
51622_V5A
51622_VBAT
16
28
V5A
33
4700p/25V_4
VBAT
PWM1
PWM2
CSP1
CSN1
CSN2
CSP2
PAD
PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD
+3V_S5
N/C
PU3
N/C
100K/F_4_4250NTC
PR147
9.09K/F_4
6
5
4
17
18
19
20
21
22
PR136
*SHORT_8
PC15
1000p/50V_4
PR135
2.2/F_6
+5V_S5
51622_SKIP#
51622_PWM1
CS_BSTR1
PC99
1u/10V_4
1
SKIP#
8
PWM
6
BOOT_R
7
CS_BST1
BOOT
PC96
PU12
CSD97374CQ4M
0.22u/25V_6
Add 11 GND VIAs
for thermal pad
51622_CSP1
51622_CSN1
2
VDD
VSW
PGND
PC13
*0.1u/25V_4
PC11
*0.1u/25V_4
VIN
PAD
5
4
3
9
Close to the
VR side.
PC9
0.1u/50V_6
CS_SW1
PR152
PC98
0.12u/10V_4
PR151
Close with
phase1 inductor
12
+
PC118
PC92
PC93
4.7u/25V_8
PL9
0.24uH_7X7X4
1 2
3
PR15
2.2_6
PC12
1000p/50V_6
2.94K/F_4
PR141
22.6K/F_4
10K/F_4_3435KNTC
PC95
2200p/50V_4
4.7u/25V_8
DCR= 1mOhm
4
PC97
PC89
0.1u/10V_4
22u/6.3V_8
PR18 *SHORT_4
PR17 2.21K/F_4
47u/25V_6X4.5
+VCCIN
+
PC101
PC100
22u/6.3V_8
*330u/2V_7343
+VCCIN
TDC : 13A
PEAK : 32A
OCP : 40A
VCORE Load Line :
-2mV/A
38
51622_CSP2
51622_PWM2
51622_CSN2
PR13
*SHORT_4
PR139
*SHORT_4
PR12
*0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
3
2
Friday, April 12, 2013
PROJECT :
+VCCIN(TPS51622)
+VCCIN(TPS51622)
+VCCIN(TPS51622)
ZRQ
ZRQ
ZRQ
38 47
38 47
1
38 47
2A
2A
2A
PR11
*SHORT_4
51622_PU3
A A
5
4
1
2
3
+3VPCU
+1.5V
R1
R2
1.5Volt +/- 5%
TDC : 0.6A
PEAK : 0.8A
Width : 40mil
PR213
100K/F_4
PR212
113K/F_4
PC148
0.1u/10V_4
+3V
PR216
MAINON
*100K/F_4
10/29
PR217
*SHORT_4
1000p/50V_4
PC88
*100p/50V_4
A A
HWPG_1.5V33
PC145
PC147
10u/6.3V_6
PR122
8.06K/F_4
PC85
1500p/50V_4
PC87
0.1u/25V_6
PR214
121K/F_4
PU15 TPS54318RTER
16
VIN
1
VIN
2
VIN
14
PWRGD
15
EN
7
COMP
8
RT/CLK
9
SS
PC146
0.01u/25V_4
10
PH
11
PH
12
PH
13
BOOT
6
VSNS
3
GND
4
GND
5
AGND
PAD17PAD18PAD19PAD20PAD21PAD
22
*SHORT_6
PR215
PC151
0.1u/50V_6
1.5V_VSNS
V0=0.8*(R1+R2)/R2
PL18
1uH_7X7X3
PC149
10u/6.3V_6
+1.5V
PC150
10u/6.3V_6
39
DDR=1.5V ,This block DNP
B B
Thermal protection
PR160
887/F_4
VLVL
S5_ON
PR161
200K/F_4
2.469V
PR157
200K/F_4
S5_ON33,35,36
C C
Need fine tune
for thermal protect point
Note placement position
PR159
S5_ON
10K_6_NTC
3
2
PQ39
2N7002K
1
LM393_PIN2
2
PQ41
DTC144EU
VIN
PD10
DA2J10100L
VIN
PR163
1M_6
1
PQ42
AO3409
2
2
PR121
*100K/F_6
PQ31
DTC144EU
1 3
3
1
PC105
0.1u/50V_6
PR158
*SHORT_6
PR153
200K_6
PC106
0.1u/50V_6
SYS_SHDN# 10,27,35
3
2
PQ38
2N7002K
1
1 3
84
3
+
2
-
PU13A
BA10393F
MAINON31,33,36,37
PR123
1M_4
MAINON_ON_G
PR125
1M_4
PR62
22_8
3
2
PQ20
2N7002K
1
3
2
1
PR91
22_8
PQ25
2N7002K
+1.05V +1.5V
PR155
22_8
3
2
PQ36
2N7002K
1
10/12 reserve
DDR=1.5V POP
3
2
1
PR126
*22_8
PQ33
*2N7002K
+15V+5V+3V
PR124
1M_4
MAIND
3
2
PQ32
2N7002K
1
PC86
*2200p/50V_4
MAIND 35,36,37
D D
For EC control thermal protection (output 3.3V)
1
5
+
7
6
-
PU13B
BA10393F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
3 4 5
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+1.5V/+1.8V/Thermal protect
+1.5V/+1.8V/Thermal protect
+1.5V/+1.8V/Thermal protect
ZRQ
ZRQ
ZRQ
39 47Friday, April 12, 2013
39 47Friday, April 12, 2013
39 47Friday, April 12, 2013
2A
2A
2A
5
4
3
+3V
+5V_S5
PQ46
EV@AON6414AL
D D
VGPU_EN8,20
0815 PSI PU 10K at GPU side arealdy
VGPU_PSI19
C C
VGPU_PWRGD20
VGPU_PWMVID19
0816 remove GPU_STDBY from NV reply
3
PQ21
GPU_VCCP_SENSE16
GPU_VSSP_SENSE16
EV@2N7002K
2
PR73
EV@10K_4
1
B B
A A
PR178
*EV@SHORT_4
+3V_S5
PR180 *EV@SHORT_4
PR66 *EV@SHORT_4
PR83 *EV@SHORT_4
PR184
R2
PR190
EV@5.1K/F_4
R3
R6
R4
C1
R5
PC54
EV@2700p/50V_4
PR193
*EV@SHORT_4
PR185
*EV@SHORT_4
+VGACORE
+3V
*EV@1K/F_4
PR88
EV@20K/F_4
PR188
EV@2K/F_4
PR187
EV@18K/F_4
PR186
*EV@SHORT_4
PR189
EV@100_4
PR182
EV@100_4
PR75
*EV@10K_4
PR79
EV@100K_4
PR172
EV@10K_4
PC56
EV@1u/6.3V_4
R1
PR87
EV@20K/F_4
1642_FBRTN
PR171
EV@2.2_6
PC43
EV@0.1u/25V_4
PC55
EV@33p/50V_4
PR89
EV@1K/F_4
1642_FBRTN
PC53
PR183
EV@66.5K/F_4
PC124
*EV@0.1u/25V_4
*EV@0.1u/25V_4
1642_TON
1642_PVCC
1642_EN
1642_PSI
1642_PGOOD
1642_VID
1642_VREF
1642_REFADJ
1642_REFIN
1642_COMP
1642_FB
PR86
EV@16.2K/F_4
PC60
EV@4700p/25V_4
9
21
3
4
16
5
8
6
7
12
11
10
TON
PVCC
EN
PSI
PGOOD
VID
VREF
REFADJ
REFIN
COMP
FB
FBRTN
PU8
EV@ UP1642RQAG
DSBL/ISEN1
TALERT#/ISEN2
GND/PWM3
TSNS/ISEN3
PAD
25
Add 3 GND VIAs
for thermal pad
UGATE1
BOOT1
PHASE1
LGATE1
UGATE2
BOOT2
PHASE2
LGATE2
2
1
24
15
23
17
18
19
14
20
22
13
1642_UGATE1
1642_BOOT1
1642_PHASE1
1642_ISEN1
1642_LGATE1
1642_UGATE2
1642_BOOT2
1642_PHASE2
GPU_THAL#
1642_LGATE2
1642_TSNS
+3V
1642_PVCC 1642_ISEN1
1642_VREF 1642_TSNS
Place NTC close to the
VGPU Hot-Spot.
PR63
EV@2.2/F_6
PR59
EV@2.2/F_6
PR74
EV@10K/F_4
PR72
EV@10K/F_4
PR179
EV@15.8K/F_4
PC45
EV@0.22u/25V_6
RDSon 2.2mohm
PC40
EV@0.22u/25V_6
RDSon 2.2mohm
GPU_THAL#
PR177
EV@100K/F_4_4250NTC
PQ45
EV@AON6752
PQ15
EV@AON6414AL
PQ44
EV@AON6752
4
PR53
EV@10K/F_4
4
4
PR167
EV@10K/F_4
4
GPU_THAL# 19
5
213
5
213
5
213
5
213
PR175
*EV@1.33K/F_4
PC116
EV@0.1u/50V_6
PL13
EV@0.36uh_LDCR
12/7
change to
PR49
10x10
EV@2.2_6
PC32
EV@1000p/50V_6
PC38
EV@0.1u/50V_6
PL12
EV@0.36uh_LDCR
12/7
change to
PR50
10x10
EV@2.2_6
PC33
EV@1000p/50V_6
PC36
EV@4.7u/25V_8
PC41
EV@4.7u/25V_8
PC117
EV@4.7u/25V_8
DRC=0.76mohm
PC111
PC114
EV@0.1u/10V_4
12
+
PC34
EV@4.7u/25V_8
DRC=0.76mohm
PC112
PC115
EV@0.1u/10V_4
+VGACORE20
PC123
EV@10u/25V_8
+
PC31
EV@10u/6.3V_6
PC122
EV@47u/25V_6X4.5
+
PC30
EV@10u/6.3V_6
12/7
PC152
47/25V
change to
EV@10u/25V_8
10U/25V_8*2
+VGACORE
+VGPU_CORE
1 Volt +/- 5%
TDC : 40A
PEAK : 58A
OCP : 70A
Width : 1800mil
EV@330u/2V_7343
PC153
EV@10u/25V_8
+VGACORE
EV@330u/2V_7343
40
VIN
12/7 add
10U/25V_8*2
PC154
EV@10u/25V_8
VIN
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
5
4
3 2 1
Friday, April 12, 2013
PROJECT :
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
ZRQ
ZRQ
ZRQ
40 47
40 47
40 47
2A
2A
2A
5
4
3
2
1
VIN
+5V_S5
PR33
EV@100K/F_4
PC104
*EV@1u/10V_4
PR30
*EV@SHORT_4
*EV@1u/10V_4
+3V
PR36 EV@100K/F_4
PR32 EV@464K/F_4
PC18
HWPG_1.5VGFX
1.5GFX_EN
1.5GFX_TRIP
1.5GFX_TST
2
12
PR29
EV@100K_4
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
PQ8
1 3
EV@PDTC143TT
7
V5IN
PU6
EV@TPS51211DSCR
GND13GND14GND15GND
16
VIN
PR27
EV@1M_4
PR26
EV@1M_4
DRVH
VBST
SW
DRVL
GND
4
PC22
EV@1u/10V_4
1.5GFX_DRVH
9
10
8
6
11
FB
1.5GFX_VBST
1.5GFX_SW
1.5GFX_DRVL
1.5GFX_FB
*EV@SHORT_6
PR31
PC21
EV@0.1u/50V_6
EV@MDV1595S
PQ34
52
4
3
1
52
4
3
1
PQ35
EV@MDV1528
PR28
*EV@4.7_6
PC17
*EV@680p/50V_6
PC19
EV@2200p/50V_6
PL10
EV@2.2uH_7X7X3
PC20
EV@4.7u/25V_8
PR156
EV@11.5K/F_4
PR154
EV@10K/F_4
PC103
EV@0.1u/50V_6
+
PC102
EV@330u/2V_7343
+1.05V_GFX16,17,18,20
+1.5V_GFX17,20,21,22,29
+3V_GFX16,19,20,33
+1.5V_GFX
+1.5V_GFX
1.5 Volt +/- 5%
TDC : 6.3A
PEAK : 8.4A
OCP : 10A
Width : 250mil
DDR=1.5V ,This block DNP
+15V+1.05V_GFX
PR25
EV@22_8
3
2
PQ7
EV@2N7002K
1
PR24
EV@1M_4
dGPU_D1
3
2
PQ5
EV@2N7002K
1
+1.05V_S5
4
PC16
*EV@2.2n/50V_4
3
52
1
PQ6
EV@MDV1528Q
+1.05V_GFX
+1.05V_GFX
TDC : 2.3A
PEAK : 3A
Width : 100mil
0815 stuff PR177 to enable
+1.05V_GFX
D D
HWPG_1.5VGFX20
FBVDDQ_EN20
PR35 *EV@SHORT_4
modify +1.5V_GPU enable pin 0814
OCP=10A
L ripple current
=(19-1.5)*1.5/(2.2u*290k*19)
=2.165A
Vtrip=10-(2.165/2)*14mohm
=0.1248V
C C
Rlimit=0.1248/10uA*8=99.87Kohm
modify +1.05V_GFX enable pin 0814
1.05V_GFX_EN20
41
4
2
3
+3VPCU
3
PQ9
EV@AO3404
1
+1.35V_SUS
5
213
+3V_GFX
PQ13
*EV@RJK03K5DPA
+1.5V_GFX
10/12 reserve
DDR=1.5V ,This block POP
+3V_GFX
TDC : 0.76A
PEAK : 1A
Width : 40mil
+1.5V_GFX
TDC : 6.3A
PEAK : 8.4A
OCP : 10A
Width : 250mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
Friday, April 12, 2013
Date: Sheet of
2
Friday, April 12, 2013
PROJECT :
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
1
ZRQ
ZRQ
ZRQ
41 47
41 47
41 47
2A
2A
2A
VIN
B B
PR38
DGPU_PWR_EN10
A A
FBVDDQ_EN
5
*EV@SHORT_4
PC24
*EV@1u/10V_4
PR71
*EV@0_4
PC44
*EV@1u/10V_4
12
PR37
EV@100K_4
12
PR76
*EV@100K_4
2
PQ11
1 3
EV@PDTC143TT
2
PQ19
1 3
*EV@PDTC143TT
VIN
PR40
EV@1M_4
PR39
EV@1M_4
PR58
*EV@1M_4
PR57
*EV@1M_4
4
PR41
EV@22_8
3
2
PQ12
EV@2N7002K
1
PR168
*EV@22_8
3
2
PQ50
*EV@2N7002K
1
+15V+3V_GFX
PR34
EV@1M_4
dGPU_D
3
2
PQ10
EV@2N7002K
1
+15V+1.5V_GFX
PR169
*EV@1M_4
3
2
PQ49
*EV@2N7002K
1
dGPU_D2
PC23
*EV@2.2n/50V_4
PC120
*EV@2.2n/50V_4
1
2
3
4
5
8
VGA power up sequence
42
+3VPCU
A A
PCH +3V_GFX
dGPU_PWR_EN
MOSFET
VGA_VID
VIN
VGPU_EN
PWM
VGPU_PWRGD
EC_FB_CLAMP
+VGPU_CORE
VIN
OR
Gate
FBVDDQ_EN
PWM
+1.5V_GFX
HWPG_1.5VGFX
VGPU_PWRGD
+1.05V_S5
1.05V_GFX_EN
MOSFET +1.05V_GFX
DGPU_PWROK
EC
B B
VGA Reset
PCH
PLTRST#
DGPU_HOLD_RST#
PEX_RST timing
I/O 3.3V
PEX_RST
C C
D D
Trise >= 1uS Tfail <=500nS
PEGX_RST#
Power States
POWER PLANE
VIN
+3V_RTC
+3VPCU
+5VPCU
+15V
+5V_S5
+5V
+1.35VSUS
+DDR_VTT_RUN
LCDVCC
+1.5V
+1.05V
+VCCIN
+VGPU_CORE S0VGPU_ENExternal GPU POWER
+3V_GFX External GPU POWER dGPU_PWR_EN S0
+1.5V_GFX
+1.05V_GFX
VOLTAGE
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.35V
+0.675V
+3.3V
+1.5V
+1.05V
variation
variation
+3.3V
+1.5V
+1.05V
DESCRIPTION
RTC POWER
EC POWER
USB CHARGE POWER
CHARGE PUMP POWER
LAN/BT POWER
USB POWER
HDD/SPK/HDMI POWER
PCH/GPU/Peripheral component POWER+3V
CPU/SODIMM/MD POWER
SODIMM/MD Termination POWER
LCD POWER
MINI CARD/NEW CARD POWER
PCH CORE VCCST POWER MAINON
CPU CORE POWER
External GPU POWER
External GPU POWER
CONTROL
SIGNAL
ALWAYSMAIN POWER
ALWAYS
ALWAYS
ALWAYS
S5_ON+3V_S5
S5_ON
MAINON
MAINON
SUSON
MAINON
LVDS_VDDEN
MAINON
VRON
FBVDDQ_EN
1.05V_GFX_ENS0S0
ACTIVE IN
ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
Thermal Follow Chart
CPU
CORE PWR
GPU NTC
Thermal
Protection
GPU
CORE PWR
H_PROCHOT#
dGPU_OPP#
GPU_THAL#
H/W Throttling
GPIO12_ACIN
CPU NTC
Thermal
Protection
HSW ULT
SM-Bus1
EC
dGPU_ALT#
dGPU_OTP#
dGPU
PM_THRMTRIP# SYS_SHDN#
SM-Bus1
FAN1_PWM
FAN2_PWM
WIRE-AND
GPIO12 HW throttle
over power protect
CPU FAN
GPU FAN
3V/5 V
SYS PWR
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
dGPU_OPP# EC notify HW throttle over power protect
dGPU_ALT# for ADPS circuit to infrom EC NV dGPU VPS Alert
dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect
1
2
3
4
5 6 7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ZRQ
ZRQ
ZRQ
42 47Friday, April 12, 2013
42 47Friday, April 12, 2013
42 47Friday, April 12, 2013
8
3A
3A
3A
5
Battery Mode
Support Deep Sx
MAINON
+5V
+3V
+1.05V
MAINON
9
8
21
22
21
?
17
21
11
10
12
21
8
18
19
23
24
28
27
25
24
12
2929
HWPG_VDDR
HWPG_1.05V
HWPG_1.5V
+5VPCU
3
+3VPCU
D D
3
S5 PWR
VIN
1
DDR VDDQ
VR
S3
S5
C C
+3VPCU
3
1.5V
VR
EN
+5V_S5
+3V_S5
S5_ON
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
HWPG_VDDR
PG
DDR_PG_CTRL
MAINON
+0.75V_ON
SUSON
26
+1.5V
HWPG_1.5V
PG
RUN PWR
B B
A A
3
3
9
+5VPCU
+3VPCU
+1.05V_S5
PCH
MOS1
MOS2
MOS3
G
VIN
1
+1.05V_S5
VR
EN
S5_ON
MAINON
5
PG
+1.05V_S5
HWPG_1.05V
4
VIN
3V/5V
VR
EN2
1
VL
+15V
EN1
NBSWON#
3 3
+3VPCU +5VPCU
3V_LDO
2
PWR
BTN
7
30
HWPG
+0.75V_ON
EC_PWROK
HWPG_1.05V_EC#
?
+1.05V
VIN
1
IMVP
0 ohm
+1.05V_VCCST
+VCCIN
33
VR
34
32a
32b
SVID
37
IMVP_PWRGD
PG
EN
VRON_CPU
VRON
CPU
4
3
+3VPCU
3
2
depend on A measure
+3.3V_DSW
result to implement
EC
VRON
MAINON
for B test
5a
13
14
15
S5_ON
SUSON
DSW_ON
6
DPWROK
RSMRST#
SB_ACDC
DNBSWON#
SUSC#
SUSB#
PCH_SUSACK#
PCH_SUSPWARN#
PCH_SLP_SUS#
34
16
20
31
35
38
IMVP_PWRGD
4
2
+3.3V_DSW
EN
Delay DSW power well 10ms
EC_PWROK
PCH_CLK
PLTRST#
5b
SYS_PWROK
CHARGER
DPWROK
RSMRST#
ACPRESENT
PWRBTN#
SLP_S4#
SLP_S3#
SUSACK
SUSWRAN
SLP_SUS#
APWROK
PCH_PWROK
PLTRST#
SYS_PWROK
1
BAT-VVIN
Battery
DSW PWR
PCH
3
SUS PWR
ASW PWR
SPI PWR
HSIO PWR
PLL PWR
CORE PWR
SDIO PWR
HDA PWR
+3VPCU or +3.3V_DSW
43
+3VCC_S5
+1.05V
+3V_S5
+V1.05DX_MODPHY
+1.05V
+1.05V
+3V
+3V_S5
36
31
12
31
36
HWPG_1.05V_EC#
30a
HWPG+1ms
EC_PWROK
HWPG_1.05V
EC_PWROK
SYS_PWROK
10K ohm
VCCST_PWRGD_EN
2
32b30a
8172131
3
38
PLTRST#
CORE PWR
CPU
RESET#
PROCPWRGD
SVID
SVID
22
37
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VDDQ PWR
VCCST PWR
VR_ENVRON_CPU
SM_PG_CNTL1
DDR_PG_CTRL
VR_READY
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
32a
34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
1
+VCCIN
+1.35V_SUS
+1.05V_VCCST
ZRQ
ZRQ
ZRQ
43 47Friday, April 12, 2013
43 47Friday, April 12, 2013
43 47Friday, April 12, 2013
3A
3A
3A
1
2
3
4
5
6
7
8
+3V_S5
+3V
SDRAM
2.2K2.2K
AP2
A A
SMB_PCH_CLK
AH1
SMB_PCH_DAT
+3.3V_RUN
2N7002DW
Level shift
CLK_SCLK
CLK_SDATA
4.7K4.7K
Touch PAD
+WL_VDD
XDP
WLAN
Haswell
ULT
+3V_S5
2N7002DW
Level shift
WLAN_CLK_SCLK
WLAN_CLK_SDATA
4.7K
4.7K
+3V_S5
B B
AN1
SMB_ME0_CLK
AK1
SMB_ME0_DAT
2.2K2.2K
+3V_S5
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
*2.2K*2.2K
+3V_S5
+3V_S5
*2N7002DW
Level shift
3V3MISC
C C
SIO
2ND_MBDATA
116
2ND_MBCLK
115
10K10K
+3V_GFX
2N7002DW
Level shift
+3VPCU
4.7K4.7K
dGPU
100
ITE8587
10K10K
D D
1
110
MBCLK
111 MBDATA
2
3
4
100
5
Battery
Charger
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
6
Date: Sheet of
7
PROJECT :
Block Diagram
Block Diagram
Block Diagram
ZRQ
ZRQ
ZRQ
3A
3A
44 47Friday, April 12, 2013
44 47Friday, April 12, 2013
44 47Friday, April 12, 2013
8
3A
5
4
3
MDV1528Q
SYS_HWPG
1
D D
PWR
3V_LDO
1
EN!
EN2
PWRGD3V_LDO
3V/5V
TPS51225
Vin
S5_Vout
S3_Vout
+5VPCU
+3VPCU
VIN
C C
PCH
HWPG_1.05V
PWRGD
S5_ON
MAINON
Vin
+1.05V_S5
TPS51211
EN
Vout
HWPG_1.5VGFX
10
VGPU_PWRGD
9
+1.05V_S5
AND Gate
VIN
2
EC
B B
4
EC
MAIND
4
1.05V_GFX_EN
S5D
2
MAIND
4
S5D
2
MAIND
4
dGPU_PWR_EN
MDV1528Q
MDV1528Q
MDV1528Q
AO3404
AO3404
AO3404
+1.05V
+1.05V_GFX
+5V_S5
+5V
+3V_S5
+3V
+3V_GFX
EC
9
7
VIN
7
EC_FB_CLAMP
VGPU_PWRGD
VGPU_EN
VRON_CPU
VRON
VIN
PCH
Vin
VGPU_EN
VIN
OR Gate
PWRGD
CPU VCCIN
TPS51622
EN
Vin
FBVDDQ_EN
IMVP_PWRGD
Vout
PWRGD
VGPU Core
uP1642
EN
PWRGD
+1.5V_GFX
Vin
TPS51211
VGPU_PWRGD
Vout
HWPG_1.5VGFX
EN
+VCCIN
Vout
45
9
+VGPU_CORE
10
+1.5V_GFX
HWPG_VDDR
3
EC
DDR_VTTT_PG_CTRL
PCH
A A
EC
MAINON
4
+0.75V_ON
S5 EN
S3 EN
PWRGDSUSON
+1.35V_SUS
TPS51216
Vin
S5_Vout
S3_Vout
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
+3VPCU
Vin
MAINON
VIN
5
4
3 2 1
PWRGD
+1.5V
TPS54318
EN
HWPG_1.5V
Vout
+1.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ULT PWR CONTROL
ULT PWR CONTROL
ULT PWR CONTROL
ZRQ
ZRQ
ZRQ
45 47Friday, April 12, 2013
45 47Friday, April 12, 2013
45 47Friday, April 12, 2013
3A
3A
3A
5
Version
Model
ZRQ
D D
C C
B B
A A
DOC NO.
1A
Add R806 Pull down for EDP_HPD(Intel check List).(Page 02)1
2A
2 Add R811 and reserve R809 for Codec Vendor request.(Page 30)
3 Change R345 footprint from 0402 to 0603.(Page 14)
4 Change U10 to correct PN AL007534001.(Page 31)
Improve IMVP_PWRGD voltage to low , so del R66,Q9 , R61,Q50 ,R495 and add U55 , C767 , R807. (Page 10)5
6 Change CN12 to 12 PIN connect_DFFC12FR034 (Page 31)
7 Change SW6 from DHP0BTEPV00 to DHPATE2CK03.(Page 29)
8 Move Hall sensor funtion to USB/B.(Page 24)
9 Add R828 100K PD for MAINON. Upgrade U27 from AJ08587 0F02 to AJ085870F03. (Page33)
10 Collect netname +V1.05S_VCCPCPU to +V3.3S_VCCSDIO. (Page11)
11 Q7 change from PMF780SN to BAM70020002. (Page25)
12 Correct U41 footprint to ssop5-p-a-toshiba-b. (Page23)
13 Change LED5,LED6 P/N from BEB00024ZA0 to BEB00028ZA0. (Page27)
14 Del Q5, Q47,R51,R25 , add U56,C768 . (Page13)
15 DEL PL5,PL6,PL7,PL8 . (Page34_power)
16 Change PR145 from CS28872FB08 to CS29312FB13 . (Page38_Power)
17 Change PR143 from CS45362FB00 to CS44992FB11 . (Page38_Power)
18 Change PR129 from CS22672FB12 to CS22702FB14 . (Page38_power)
19 Change PR5 from CS31002FB26 to CS25762FB 01 . (Page38_Power)
Change PR141 from CS32432FB19 to CS32262FB15 . (Page38 _Power)20
21 Change PC123 from CC64704MZ10 to CH6104KEA00 . (Page40_Power)
Add PC152,PC153,PC154 to CH6104KEA00 . (Page40_Power)22
Change PL12,PL13 from CV+24P0MZ00 to CV+36T0MZ01 10X10 size . (Page40_Power)23
24 SWAP USB0 and USB1 . (Page09)
25 Change CN27 to DFHS52FR044 ,same as CN18 (Page 26)
26 add CN12 PIN4 for USBPWR3. (Page 31)
27 CN9 change frootprint to dp-adis0022-p001a-20p-smt. (Page 23)
28 Depop R728 and Pop R727 to sove Deep S3 can't wakep issue. (Page 10)
29 Del C429. (Page20)
30 Add R826(VRON) ,R827SON) 100k to Gnd. (Page33)
31 Change CN9 PN to DFTD20FR001 . (Page23)
Add C735_0.1u for Vendor request . (Page28)32
33 Add C736_0.1u and reserve C727_4.7u for Vendor request . (Page29)
34 Change R348 Pu hign to +3V . (Page28)
35 TEMP_MBAT from battery connect pin 5 to pin 6 (BATT_EN#) . (Page34)
36 Change R354(PCH_PWROK) from 10 k to 100K . (Page07)
37 Reserve R808 ,R810_0 Ohm . (Page30)
38 Change JP18 Packing and PN same as JP19 . (Page37)
39 Add R835 for Vendor request. (Page23)
40 Change R491 from 1M to 5.1M . (Page23)
41 Change R691 from 121 to 120ohm(Intel Check list) . (Page04)
42 Change SUSLED# power from +3V_S5 to +3V_PCU . (Page27)
43 Change CN13 to DFHS40FS047 (H=4) ,due to PE request. Footprint is “gs12401-101 1-40p-r-nh-smt. (Page24)
44 VGPU_PSI Pull high from +3V to +3V_S5. (Page40)
45 B-SMT USE RTL8411BA-CG need Depop R295 and change U21 PN to AL008411004. (Page28)
C590,C591 change from 18P to 12P(Y6). (Page09)46
47 C278,C284 change from 27P to 12P(Y8). (Page28)
48 Depop R147,R106,R94,R534 and Pop R91,R95,R146,R533 to support Qual Mode. (Page10)
49 Pop PR184. (Page40_Power)_
50 Change PU8 from AL001642000 to AL001642001. (Page40_Power)_
51 PC6 EOD Part change to CH4331K9B06. (Page38_Power)
52 PC5,PC85 EOD Part change to CH21506KB14. (Page38,39_Power)
Change U27 from AJ085870F03 to AJ085870 F04. (Page33)_53
54 Add level Shift funtion. (Page25)
Depop PR75. (Page40_Power)_55
56 Change PC15 to 1000p_50V(CH21006JB10). (Page38_Power)_
57 Depop PR75. (Page40_Power)_
1 Depop R226, Pop Q26(BAM700 20002) ,R795 (CS31002FB26) for CG6 funtion.(Page19)
3A
2 Swap Pin 25 and Pin 32.(Page33)
3 Del D31,C519 , and Add Q69,C738,C822,C823,C824 for SDA request.(Page23)
4 Add Test Pad on SW5 ,SW8 for SMT request.(Page27,33)
5 Add C317_4.7u for Vendor request.(Page28)
6 SWAP CLKOUT_PCIE.(Page09)
7 Pop R477, R478, R479, R48 0 _100ohm(CS11002FB22)for HDMI EMI Issue.(Page25 )
8 Pop C655,C654_10p(CH01006JB08 ) for SD CLK EMI issue .(Page29)
Pop Bitclk C399_22p(CH02206JB08) for EMI issue .(Page30 )9
10 DePop PR117 .(Page34)
11 C285 change from 0402 to 0603 size .(Page28)
12 Del CN5,C272,C253 footprint .(Page13)
13 Depop R336 ,Pop R333 for Lan can't link to exlorer .(Page28)
14 Depop R348 .(Page28)
15 Reserve R812 for PCIE_LAN_WAKE# .(Page26)
16 Add R815,C740 and pop R310 for softstart of Lan VCC.(Page28)
17 R608 connect to CLK_PCIE_REQ4# .(Page09)
18 Depop SW5 .(Page33)
19 Del JP Resistor 0.001/F_3720 (CS+0018FL00 ): JP5,JP6,JP10,JP11,JP1 2,JP13,JP14,JP15,JP1 7,JP18,JP19,JP20,JP 21,JP16.
20 Del 0_4 (CS00002JB38) to SHORT PAD_4 : PR8,PR9,PR11,PR13,PR16,PR18,PR30 ,PR35,PR38,PR44,PR61,PR66,P R83,PR106,
PR131,PR139,PR165 ,PR170,PR178,PR180,PR18 5,PR191,PR193,PR194,PR19 6,PR200,PR204,PR205,PR2 09,PR211,PR217,PR186
21 Del 0_6 (CS00003J951) to SHORT PAD_6 : PR31,PR46,PR54,PR77,PR90,PR181 ,PR201,PR203,PR215,PR158
22 Del 0_8 (CS00004JA40) to SHORT PAD_8 : PR136
23 Add R813_0 OHM.(Page26)
24 Change C740 from 0603 ot 0402 size.(Page28)
25 Depop Q39 , R276,Pop R321 and change R320 to 1K to meet Lanwake signal spec.(Page28)
Depop L9,L11,L31,L28 , and Pop R34,R47,R49,R55,R49 0,R487,R485,R481.(Page28)
26 Del JP7, JP8, JP9(CS+001AGM13).(Page05)
27 Change to 0402 shortpad:R45,R69,R173,R215 ,R236,R237,R239,R274,R277,R283,R28 8,R311,R328,R334,R353,R404,R40 9,R419,R423,R424,R425,R426,R430 ,R432,R434,R448,R449,R450,
R513,R570,R573,R587,R59 1,R596,R625,R641,R652,R653,R678 ,R695,R712,R719,R722,R733,R734 ,R735,R736,R741,R758,R759,R760,R7 61,R762,R763,R764,R765,
28 Change to 0603 shortpad:R107,R111,R158,R1 94,R197,R212,R229,R233,R234,R25 2,R269,R298,R303,R304,R338,R350 ,R351,R352,R356,R358,RR411,415 ,R418,R422,R431,R433,R440,R441,
R442,R443,R444,R445,R44 6,R447,R540,R745,R766,R767
29 Change to 0805 shortpad:R165,R174,R179,R1 90,R217,R268,R270,R452,R470,R55 9,R560,R732,R737,R749
30 Change R408,R420 from 47 ohm to 56 ohm.(Page30)
31 Change R411, R422 from shortpad to 0603 footprint.(Page30)
PROJECT MODEL
:
PART NUMBER: DRAWING BY: REVISON:
5
ZRQ APPROVED BY:
4
4
CHANGE LIST
DATE:
3
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZRQ
PROJECT :
ZRQ
PROJECT :
ZRQ
Change li st-1
Change li st-1
Change li st-1
46 47Friday, April 12, 2 013
46 47Friday, April 12, 2 013
46 47Friday, April 12, 2 013
1
3A
3A
3A
5
Version
Model
ZRQ
D D
C C
3B
R276 change fro m 10K to 1K , Depop R320. (PCIE_LAN_WAKE#)_1
2 Change C24 KB Conn PN to DFFC26FR063 .(Page 32)_
3
Change U27 EC to E version AJ085870F05 .(Page 33)_ .
Fine tune Amp Gain =>R422,R411 change from 0 ohm to 1k , and pop R421,R410 to 1.62K .(Page 30) 4
5 Change TEMP_MBAT from Pin 6 to Pin 5 of PJ1 .(Page 34)
Depop Q24 , and Add R228 to solve level abnormal issue for CG6 .(Page 19) 6
7 Add R816 and net "LB_PWR_CNN_Q" to stuff Q69 always for safety issue .(Page 19)
8 Reserve R855,R859 and add R854,R857 .(Page 23)
For WHQL Change USB Port1 and Port49
10 Add new on Board RAM HYNIX H5TC4G63AFR-PRBA RAM ID:0000
11 Del L35,L36,L6,L7,L8,L29,L12,L13 ,L32,L16,L34
3C
1 Change to 0402 shortpad: R725,R724,R711,R716,R26,R27,R28,R29,R32,R33 ,R483,R484,R493,R492,R56,R57,R58,R5 9,
R90,R89,R660,R664,R702,R63 8,R639,R651,R225,R346,R355,R77 8,R785,R790,R73 , R455,R456,R457,R458 ,R459,R343,R406,R596
2 For HDMI 7-2 issue change R37,R38,R39,R40,R41,R42,R43,R4 4 To 470 ohm and remove R478,R479,R477,R480 (Page 25)
3 For TI HD3SS2521 issue R77,R79,R502,R503 need mount 10K, change R528 from 100 ohm to 0 ohm and remove R854,R857 , add R855,R859. (Page 23)
4 Change to 0603 shortpad: R373,R337,R382,R297,R235,R326,R32 2,L38,R385,R220,R254,R359
3F
1. Add C245 for intel request for G3 can't boot issue
4
CHANGE LIST
3
2
1
B B
A A
PROJECT MODEL
DOC NO.
:
PART NUMBER: DRAWING BY: REVISON:
5
ZRQ APPROVED BY:
4
DATE:
3
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZRQ
PROJECT :
ZRQ
PROJECT :
Change li st-2
Change li st-2
Change li st-2
ZRQ
47 47Friday, April 12, 2 013
47 47Friday, April 12, 2 013
47 47Friday, April 12, 2 013
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
3A
3A
3A
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