QUANTA ZRA Schematics

1

2

3

4

5

6

7

8

PCB STACK UP

LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1

A A

LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : IN3 LAYER 7 : GND LAYER 8 : BOT

B B

Lan_PCIE1 Lan_PCIE2

Docking

AMD CPU CORE (ISL6265)

PAGE 39

NB_CORE (UP6111AQDD)

C C

+VGPU_CORE (MAX8792ETD)

PAGE 41

PAGE 43

1.1V (UP6111AQDD)

PAGE 40

1.8V/GPU_Power/+2.5V

PAGE 44

DDR 1.5V(RT8207)

PAGE 42

DDR3-SODIMM1

DDR3-SODIMM2

X1

LAN

BCM 57760 PCIE-LAN

(10/100/1000)

PAGE 27

1 to 2 Switch

SATA - HDD1

SATA - CD-ROM

TPM

ZRA SYSTEM DIAGRAM

DDR3 channel A

PAGE 7

DDR3 channel B

PAGE 8

AMD Champlain

35mm X 35mm S1G4 Processor

638P (PGA)45W/35W

PAGE 4,5,6

HT3

PCI-E

Port 0 Port 2

X1

Mini PCI-E Card

(Wireless LAN)

NORTH BRIDGE

RS880 A12

21mm X 21mm, 528pin BGA

PAGE 28

PAGE 9,10,11,12

ALINK X4

RJ45

PAGE 27

SATA0 150MB

PAGE 29

SATA1 150MB

SOUTH BRIDGE

SB820

21mm X 21mm, 528pin BGA

4.5W(Ext)

4.3W(Int)

PAGE 29 PAGE 13,14,15,16,17

LPC

PAGE 28

Azalia

Winbond KBC

NPCE781L

PAGE 35

Codec CX20672-11Z

PAGE 30

CPU THERMAL SENSOR

PCI-Express 16X

LVDS

CRT

DVI

USB2.0

USB2.0 Ports

X1

MIC to Docking

Line out to Docking

Line in from Docking

PAGE 6

CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK

DVI

USB2.0 x 1

Lan_PCIE1

Finger print

PAGE 32

BT

PAGE 32

ATI Madison LP 128-bit M2 Pkg

29mm X 29mm

PAGE 18,19,20,21,22,23

LVDS CRT

MUXs

CRT

(S.G)

MIC to Docking

Line out to Docking

Line in from Docking

Webcam

PAGE 26

PAGE 30

From SB

Option

1 to 2 Switch

Docking

PAGE 36

CardReader AU6437

PAGE 31

MDC

14.318MHz

CLOCK GEN

ICS9LPRS476AKLFT-->HP SLG8SP628VTR-->HP RTM880N-796 -->HP

800MHz

VRAM

DDR3 64MX16X8,128bit 128MX16X8,128 bit

PAGE 24,25

LVDS CRT

WLAN conn

PAGE 28

PAGE 3

VGA

On board LVDS

On board CRT

CRT connector

DVI connector

USB connector x 3

RJ45 connector

MIC

Line out

Line in

USB BOARD

USB2.0 Ports x3

PAGE 32

Power BOARD

PAGE 33

/ParkMadison

SYSTEM 5V/3V (RT8206)

D D

1V/CPU_VDDR/Discharage

Charger (ISL88731)

1

PAGE 38

PAGE 45

PAGE 37

Keyboard Touch Pad

2

PAGE 34 PAGE 32 PAGE 34

3

CPU FAN

SPI

PAGE 35

4

Digital MIC AUDIO CONN

(Phone/ MIC)

PAGE 30 PAGE 30

5

Speaker

PAGE 30

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

6

Date: Sheet of

7

PROJECT :

Block Diagram

ZRA

1A

1 48Monday, March 29, 2010

8

1A

5

4

3

2

1

Danube Power On Sequence

From VBAT

From AC,BATT

D D

From EC UP6111A

From EC SUSON

From EC MAINON

C C

GROUP A

Actv' by +3V

GROUP B

B B

Notice:

1.CPU_LDT_RST# msut be asserted a minimum of 1ms prior to the assertion of CPU_PWRGD

2.CPU_CLKP/N must be within specification a minimum of 1ms prior to the assertion of CPU_PWRGD

3.CPU_PWRGD remains deasserted at least 1ms after both CPU_CLKP/N and all voltages to the processor are within specification for operation

4.all NB power rails(1.8V/1.2V/1.1V) valid before NB_PWRGD at least 1ms

5.stable input clocks from CLKGEN(HT_REFCLKP/N) to NB before NB_PWRGD at least 1ms

VCCRTC

VIN_SRC +5VPCU,+3VPCU

NBSWON#From Button

VIN

S5_ON

+5V_S5,+3V_S5,+1.1V_S5

HWPG_1.1VUP6111A

EC_RSMRST#From EC to SB DNBSWON#From EC to SB SUSB#, SUSC#From SB to EC

+0.75V_DDR_VTT, +SMDDR_VREF +1.5VSUS

HWPG_1.5V

+5V, +3V, +1.8V, +1.5V

HWPG_1.8V

+1.1V

VRON

+2.5V

HWPG_2.5V

+VCORE CPU_VDDNB_CORE

CPU_COREPG

CPU_VDDR

HWPG_0.9V

+NB_CORE_ON

NB_CORE

HWPG_0.95V

SB_PWRGD_IN NB_PWRGD_IN

EC setting: 5ms

EC setting: 30ms EC setting: 100ms

EC setting: 10ms

VTERM only will be shut down in S3 mode, and VTERM for DDR3 SODIMM only

EC setting: 10ms

RC=~22ms, NB_CORE should not ramp before 1.1V

EC setting: 10ms

SB_PWRGD_IN rise time<50ms SB_PWRGD to NB_PWRGD:40~42ms

Danube GPU Power Sequence

dGPU_VRONFrom SB

MXM_PWR_EN

2ms

Power on sequence required:

SB800:

1.+3.3V_S5 ramp before +1.1_S5

2.+3.3V ramp before +1.8V

3.+1.8V ramp before +1.1V

4.+3.3V ramp before +1.1V

5.+3.3V_S5 ramping down time>300us

6.All power rails rise time >= 50us, except +3.3V_S5<=40ms

7.100us<=+3.3V_S5 rise time<=40ms

9.VBAT (VCCRTC) must ramp at least 5 seconds before the S5 rails to allow start time for the internal RTC

(only in SB820M NB_PWRGD signal) 40ms <= SB PWRGOOD to NB_PWRGD delay <= 42ms

RS880:

1.0<(+3.3V)-(+1.8V)<2.1

2.+1.8V ramp before +1.1V

3.+1.1V ramp before CPU_VDDNB_CORE

BOM naming rule

Items Function Name Description

Internal CLK GEN

1

External CLK GEN

2

iGPU IV@

3 4

dGPU

5

iGPU & dGPU notice

SGN@ GN@

SW@ SP@

SB SMBUS Table

CLK GEN RAM Mini Card (WLAN)

(SB_DA0)/(SB_CL0) (+3V)

Power Plane

MOS CKT (Level shift)

V

+3V +3V

X X X*

VV

+3V

*Reserve: There is not SMBUS function in AVL

EC SMBUS Table

CPU thermal SensorBattery EC775 SDA1 / SCL1 (+3VPCU) EC775 SDA2 / SCL2 (+3V) EC775 SDA3 / SCL3 ()

Power Plane +3VPCU MOS CKT (Level shift)

V

+3V

X

+3V_D +VGPU_CORE

A A

PG_GPIO_EN

+1V

PG_1.5V_EN

+1.5V_GPU +1.8V_GPU

5

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

Power Sequence

1

ZRA

2 48Monday, March 29, 2010

1A

5

S1G4

+1.1V +1.1V_VLDT

1.1V@1.5A

R486 0_6R486 0_6 R483 0_6R483 0_6

P/N: DG0^8000005 DG0^8000009 DG0^80000013

D D

DG0^80000014

C450 10u/6.3V_8C450 10u/6.3V_8 C746 10u/6.3V_8C746 10u/6.3V_8 C453 0.22u/6.3V_4C453 0.22u/6.3V_4 C314 180P/50V_4C314 180P/50V_4

SI Change from AMD request

HT_CADINP[15..0]8 HT_CADINN[15..0]8 HT_CLKINP[1..0]8 HT_CLKINN[1..0]8 HT_CTLINP[1..0]8 HT_CTLINN[1..0]8 HT_CADOUTP[15..0]8 HT_CADOUTN[15..0]8 HT_CLKOUTP[1..0]8 HT_CLKOUTN[1..0]8 HT_CTLOUTP[1..0]8

C C

HT_CTLOUTN[1..0]8

FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

HT_CADINP[15..0] HT_CADINN[15..0]

HT_CLKINP[1..0]

HT_CLKINN[1..0]

HT_CTLINP[1..0]

HT_CTLINN[1..0] HT_CADOUTP[15..0] HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

HT_CLKOUTN[1..0]

HT_CTLOUTP[1..0]

HT_CTLOUTN[1..0]

2.5V@250mA

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

BLM21PG221SN1D(220 100M2A)_8

+2.5V

C781

4.7u/6.3V_6

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

L44

D1 D2 D3 D4

E3 E2 E1 F1 G3 G2 G1 H1

J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5

J3

J2

J5 K5

N1 P1 P3 P4

SOCKET_638_PIN

LS0805-100M-N

U30A

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

4

HT LINK

C483

4.7u/6.3V_6

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

+CPUVDDA

C459

0.22u/6.3V_4

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

W/S= 15 mil/20mil

C463

C463 3300P/50V_4

3300P/50V_4

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7 HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

C469

C469 *10u/6.3V_8

*10u/6.3V_8

C44910u/6.3V_8 C44910u/6.3V_8 C3180.22u/6.3V_4 C3180.22u/6.3V_4 C448180P/50V_4 C448180P/50V_4

+1.5VSUS

B-TEST 0205

SIC5 SID5

ALERT_L5

SideBand Temp sense I2C

3

CPU CLK

CLK_CPU_BCLKP_PR12 CLK_CPU_BCLKN_PR12

Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

R490

R490 1K_4

1K_4

+1.5VSUS4,5,6,7,15,29,38,41,43,44

+1.5V27,29,41,44 +1.1V8,9,10,11,15,39 +2.5V43

R488

R488 1K_4

1K_4

S1G4

+1.5VSUS

R516 169/F_4R516 169/F_4

R487

R487 1K_4

1K_4

+1.1V_VLDT

+1.5VSUS

C780 3900P/25V_4C780 3900P/25V_4 C779 3900P/25V_4C779 3900P/25V_4

R477 1K_4R477 1K_4 R478 *300_4R478 *300_4

+1.5VSUS +1.5V +1.1V +2.5V

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

CPU_LDT_RST#12

CPU_PWRGD12

CPU_LDT_STOP#10,12

R220 44.2/F_4R220 44.2/F_4 R218 44.2/F_4R218 44.2/F_4

CPU_VDD0_FB_H38 CPU_VDD0_FB_L38

CPU_VDD1_FB_H38 CPU_VDD1_FB_L38

R519 510_4R519 510_4 R518 510_4R518 510_4

2

+CPUVDDA

W/S= 15 mil/20mil

+CPUVDDA +CPUVDDA

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU

CPU_HTREF0 CPU_HTREF1

place them to CPU within 1.5"

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPUTEST23 CPUTEST18

CPUTEST19 CPUTEST25H

CPUTEST25L

place them to CPU within 1.5"

CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27

R503 *short_4R503 *short_4

SB check list tide to CPUVDDIO (+1.5VSUS)

CPU_PWRGD CPU_LDT_RST# CPU_LDT_STOP# CPU_LDT_REQ#_CPU

250mA

F8 F9

A9 A8

B7 A7

F10

C6

SIC

AF4

SID

AF5

ALERT_L

AE6

R6 P6

F6 E6

Y6

AB6 G10

AA9 AC9 AD9 AF9

AD7 H10

G9

E9 E8

AB8 AF7 AE7 AE8 AC8 AF8

TEST9

C2

AA6

A3 A5

B3

B5

C1

U30D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SOCKET_638_PIN

VSS

RSVD11

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

R514300_4 R514300_4 R509300_4 R509300_4 R243300_4 R243300_4 R505*300_4 R505*300_4

M11 W18

A6 A4

AF6 AC7 AA8

W7 W8

W9 Y9

H6 G6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

+1.5V

CPU_SVC_R CPU_SVD_R

CPU_THERMTRIP_L# CPU_PROCHOT_L# CPU_MEMHOT_L#

VDDIO_FB_H VDDIO_FB_L

CPU_DBREQ# CPU_TDO

CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14

CPUTEST29H

CPUTEST29L

1

S1G4

R520 300_4R520 300_4

S1G4

H_THRMDC 5 H_THRMDA 5

VDDIO_FB_H 41 VDDIO_FB_L 41

CPU_VDDNB_FB_H 38 CPU_VDDNB_FB_L 38

T30T30 T29T29 T28T28 T33T33

T72T72

R511

80.6/F_4

T73T73

+1.5VSUS

CPU_LDT_REQ# 10

CPU_LDT_RST#

R459

R459 *10K_4

*10K_4

R455 0_4R455 0_4

B-TEST 0205

CNTR_VREF

D25

D25 *BAS316

*BAS316

R460 100K_6R460 100K_6

SYS_SHDN# 18,37,44

CPU_THERMTRIP# 13

+1.5VSUS

CPU_MEMHOT_L#

+3V

R532

4.7K_4

CPU_LDT_RST_HTPA#

3

Q36

Q36 BSS138_NL/SOT23

BSS138_NL/SOT23

12

G2

G2 *SHORT_PAD1

*SHORT_PAD1

2

1

for debug only

R457 *10K_4R457 *10K_4

S1G4

2

Q32

R464 *1K_4R464 *1K_4

Q32 *MMBT3904

*MMBT3904

13

CPU_MEMHOT# 6,7,12

S1g4 does not support MEMHOT#

4

S1G4

Serial VID

SI Change from AMD request

+1.5VSUS +1.5V

CPU_SVC_R CPU_SVD_R CPU_PWRGD

R530 1K_4R530 1K_4 R526 *1K_4R526 *1K_4

R531 1K_4R531 1K_4 R527 *1K_4R527 *1K_4

R513 *short_4R513 *short_4 R512 *short_4R512 *short_4 R515 *short_4R515 *short_4

R523 *220_4R523 *220_4 R522 *220_4R522 *220_4 R525 *220_4R525 *220_4

HDT Connector

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST#

+1.5VSUS

CPU_TDO

C484 *0.1u/10V_4C484 *0.1u/10V_4

3

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

KEY

*HDT_CONN

CN7

VFIX MODE

VID Override Circuit

SVC SVD Voltage Output

CPU_SVC 38 CPU_SVD 38 CPU_PWRGD_SVID_REG 38

0 0 0 1 1

CPUTEST24 CPUTEST23 CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18 CPUTEST21

1 0 1

R475 1K_4R475 1K_4 R473 *1K_4R473 *1K_4 R474 1K_4R474 1K_4 R476 1K_4R476 1K_4 R184 1K_4R184 1K_4 R229 1K_4R229 1K_4 R534 1K_4R534 1K_4 R533 1K_4R533 1K_4 R236 1K_4R236 1K_4 R159 1K_4R159 1K_4

1.1V

1.0V

0.9V

0.8V

S1G4

Quanta Computer Inc.

25

CPU_LDT_RST_HTPA#

2

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

PROJECT :

S1G4 HT,CTL I/F 1/3

ZRA

3 48Monday, March 29, 2010

1

1A

+1.5VSUS

3

1

2

1 3

Q31

Q31 MMBT3904

MMBT3904

CNTR_VREF 5

Q33

Q33 FDV301N

FDV301N

R461

R461 10K_4

10K_4

R456 *0_4R456 *0_4

CPU_PROCHOT# 12,14

R524 20K/F_4R524 20K/F_4

+3V

B B

CPU_LDT_REQ#_CPU

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

A A

+1.5VSUS

R472 300_4R472 300_4

+1.5VSUS

CPU_PROCHOT_L#

Q35 *BSS138_NL/SOT23Q35 *BSS138_NL/SOT23

1

R508 *0_4R508 *0_4

CPU_COREPG16,38,39

CPU_THERMTRIP_L#

R466 *10K_4R466 *10K_4

C778 0.1u/10V_4C778 0.1u/10V_4

R529 34.8K/F_4R529 34.8K/F_4

2

3

+1.5VSUS

R467

1K_4

2

Q30

1 3

*MMBT3904

R458 0_4R458 0_4

5

2

A

+1.5VSUS CPU_VDDR

PLACE THEM CLOSE TO CPU WITHIN 1"

R465

R465 0_4

0_4

4 4

C739

C739 10u/6.3V_8

10u/6.3V_8

S1G4

3 3

2 2

CPU_VDDR

C465

C465 1000P/50V_4

1000P/50V_4

1 1

R480 39.2/F_4R480 39.2/F_4 R479 39.2/F_4R479 39.2/F_4 R182 *0_4R182 *0_4

M_A_RST#6 M_A_ODT06

M_A_ODT16

M_A_CS#06 M_A_CS#16

M_A_CKE06 M_A_CKE16

M_A_CLKP16 M_A_CLKN16

M_A_CLKP26 M_A_CLKN26

M_A_A[0..15]6 M_B_A[0..15] 7

M_A_BANK06 M_A_BANK16 M_A_BANK26

M_A_RAS#6 M_A_CAS#6 M_A_WE#6

CPU_VDDR

C464

C464 1000P/50V_4

1000P/50V_4

+1.5VSUS

R462

R462 1K/F_4

1K/F_4

R469

R469 1K/F_4

1K/F_4

A

C472

4.7u/6.3V_6

C371

C371 1000P/50V_4

1000P/50V_4

C741

C741 *0.47u/10V_4

*0.47u/10V_4

1 2

M_ZP M_ZN

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

U30B

D10

VDDR1

MEM:CMD/CTRL/CLK

C10 B10

AD10 AF10

AE10

H16

V22 U21 V19

U19 U20 V20

N19 N20 E16

AA16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19

T19

T20

J22 J20

F16 Y16

L20 L21

L19

L22

J21

T22 T24

MEM:CMD/CTRL/CLK

VDDR2 VDDR3 VDDR4

MEMZP MEMZN

MA_RESET_L MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SOCKET_638_PIN

Place close to socket

C309

4.7u/6.3V_6

C299

C299 1000P/50V_4

1000P/50V_4

C461

180P/50V_4

+3VPCU

52

U27

3

+

4

-

*OPA343NA/3K

R468 *0_4R468 *0_4 R463 *0_4R463 *0_4

C471

4.7u/6.3V_6

R470 0_4R470 0_4

C734

C734 *0.1u/10V_4

*0.1u/10V_4

1

VDDR_SENSE

MEMVREF

MB_RESET_L

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C305

4.7u/6.3V_6

C470

180P/50V_4

R471 *10_4R471 *10_4

VDDR5 VDDR6 VDDR7 VDDR8 VDDR9

B

VDDR=> 0.9V support 1066 / 800 DDR VDDR= >1.05V support 1333 / 1066 / 800 DDR

CPU_VDDR

VDDR=>1.75A

W10 AC10 AB10 AA10 A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

C306

0.22u/6.3V_4

C468

180P/50V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

C308

0.22u/6.3V_4

C460

180P/50V_4

M_B_RST# 7 M_B_ODT0 7

M_B_ODT1 7

M_B_CS#0 7 M_B_CS#1 7

M_B_CKE0 7 M_B_CKE1 7

M_B_CLKP1 7 M_B_CLKN1 7

M_B_CLKP2 7 M_B_CLKN2 7

M_B_BANK0 7 M_B_BANK1 7 M_B_BANK2 7

M_B_RAS# 7 M_B_CAS# 7 M_B_WE# 7

C302

0.22u/6.3V_4

Reserved for AMD suggest

MEMVREF_CPU

R481

R481 *10K_4

*10K_4

B

+0.75V_DDR_VTT

C303

0.22u/6.3V_4

+SMDDR_VREF

C369

0.1u/10V_4

C

+0.75V_DDR_VTT6,7,41 +SMDDR_VREF6,7,41

C

R482

R482 *0_4

*0_4

C367

1000P/50V_4

CPU_VDDR44 +1.5VSUS3,5,6,7,15,29,38,41,43,44

M_B_DQ[0..63]7

+0.75V_DDR_VTT +SMDDR_VREF CPU_VDDR +1.5VSUS

M_B_DM[0..7]7

M_B_DQSP07 M_B_DQSN07 M_B_DQSP17 M_B_DQSN17 M_B_DQSP27 M_B_DQSN27 M_B_DQSP37 M_B_DQSN37 M_B_DQSP47 M_B_DQSN47 M_B_DQSP57 M_B_DQSN57 M_B_DQSP67 M_B_DQSN67 M_B_DQSP77 M_B_DQSN77

D

Processor Memory Interface

U30C

MEM:DATA

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

Y11

F26

D

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MEM:DATA

SOCKET_638_PIN

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

Size Document Number Rev

Date: Sheet of

E

M_A_DM[0..7] 6

M_A_DQSP0 6 M_A_DQSN0 6 M_A_DQSP1 6 M_A_DQSN1 6 M_A_DQSP2 6 M_A_DQSN2 6 M_A_DQSP3 6 M_A_DQSN3 6 M_A_DQSP4 6 M_A_DQSN4 6 M_A_DQSP5 6 M_A_DQSN5 6 M_A_DQSP6 6 M_A_DQSN6 6 M_A_DQSP7 6 M_A_DQSN7 6

E

M_A_DQ[0..63] 6

ZRA

M_A_DQ0

G12

M_A_DQ1

F12

M_A_DQ2

H14

M_A_DQ3

G14

M_A_DQ4

H11

M_A_DQ5

H12

M_A_DQ6

C13

M_A_DQ7

E13

M_A_DQ8

H15

M_A_DQ9

E15

M_A_DQ10

E17

M_A_DQ11

H17

M_A_DQ12

E14

M_A_DQ13

F14

M_A_DQ14

C17

M_A_DQ15

G17

M_A_DQ16

G18

M_A_DQ17

C19

M_A_DQ18

D22

M_A_DQ19

E20

M_A_DQ20

E18

M_A_DQ21

F18

M_A_DQ22

B22

M_A_DQ23

C23

M_A_DQ24

F20

M_A_DQ25

F22

M_A_DQ26

H24

M_A_DQ27

J19

M_A_DQ28

E21

M_A_DQ29

E22

M_A_DQ30

H20

M_A_DQ31

H22

M_A_DQ32

Y24

M_A_DQ33

AB24

M_A_DQ34

AB22

M_A_DQ35

AA21

M_A_DQ36

W22

M_A_DQ37

W21

M_A_DQ38

Y22

M_A_DQ39

AA22

M_A_DQ40

Y20

M_A_DQ41

AA20

M_A_DQ42

AA18

M_A_DQ43

AB18

M_A_DQ44

AB21

M_A_DQ45

AD21

M_A_DQ46

AD19

M_A_DQ47

Y18

M_A_DQ48

AD17

M_A_DQ49

W16

M_A_DQ50

W14

M_A_DQ51

Y14

M_A_DQ52

Y17

M_A_DQ53

AB17

M_A_DQ54

AB15

M_A_DQ55

AD15

M_A_DQ56

AB13

M_A_DQ57

AD13

M_A_DQ58

Y12

M_A_DQ59

W11

M_A_DQ60

AB14

M_A_DQ61

AA14

M_A_DQ62

AB12

M_A_DQ63

AA12

M_A_DM0

E12

M_A_DM1

C15

M_A_DM2

E19

M_A_DM3

F24

M_A_DM4

AC24

M_A_DM5

Y19

M_A_DM6

AB16

M_A_DM7

Y13 G13

H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

Quanta Computer Inc.

PROJECT :

S1G4 DDRIII MEMORY I/F 2/3

1A

4 48Monday, March 29, 2010

1A

5

U30E

G4

VDD_1

H2

VDD_2

J9

VDD_3

J11

VDD_4

J13

VDD_5

D D

CPU_VDDNB_CORE

3A

+1.5VSUS

C C

CNTR_VREF3

CPU_SMBCLK

BSS138_NL/SOT23

CPU_SMBDATA

B B

OVT#

J15

K6 K10 K12 K14

L4

L7

L9 L11 L13 L15

M2 M6 M8

M10

N7 N9

N11 K16

M16

P16 T16 V16

H25

J17 K18 K21 K23 K25 L17

M18 M21 M23 M25

N17

2

3

BSS138_NL/SOT23

VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

SOCKET_638_PIN

Q43

1

3

VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

2

Q42

1

2

3

+VCORE+VCORE +VCORE

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

Place under CPU bracket side.

+1.5VSUS

B-TEST 0205

Q44

1

PV modify for design

+3V

PC55

+

330u/2V_7343

+

330u/2V_7343

1.5V@2A

SIC 3

SID 3

ALERT_L 3

4

U30F

AA4 AA11 AA13 AA15 AA17 AA19

AB23 AB25

AC11 AC13 AC15 AC17 AC19 AC21

AD25

AE11 AE13 AE15 AE17 AE19 AE21 AE23

AB2

AB7

AB9

AD6

AD8

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

B4 B6 B8 B9

D6 D8 D9

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7 H9

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

SOCKET_638_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3

2

1

BOTTOM SIDE DECOUPLING

C389

10u/6.3V_8

+VCORE

C381

10u/6.3V_8

CPU_VDDNB_CORE

C382

10u/6.3V_8

C378

10u/6.3V_8

C407

C399

10u/6.3V_8

C404

C416

10u/6.3V_8

+1.5VSUS

C390

10u/6.3V_8

C426

10u/6.3V_8

C427

C427 10u/6.3V_8

10u/6.3V_8

C420

C434

0.22u/6.3V_4

C388

10u/6.3V_8

C425

C379

0.01u/16V_4

C435

0.01u/16V_4

C393

0.22u/6.3V_4

C380

180P/50V_4

C417

0.22u/6.3V_4

C436

C395

0.01u/16V_4

C396

180P/50V_4

C413

180P/50V_4

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.5VSUS

C437

4.7u/6.3V_6

+1.5VSUS

0.22u/6.3V_4

C437

C400

C421

4.7u/6.3V_6

C387

0.22u/6.3V_4

4.7u/6.3V_6

C423

0.01u/16V_4

C406

4.7u/6.3V_6

C397

0.01u/16V_4

C414

0.22u/6.3V_4

C431

180P/50V_4

C401

C375

0.22u/6.3V_4

PROCESSOR POWER AND GROUND

R536

MSOP

VCC DXP DXN

GND

R536

*200/F_6

1 2 3 5

C782

C782 *0.1U/10V_4

*0.1U/10V_4

C474

C474 *2200P/50V_4

*2200P/50V_4

4

B-TEST 0221

H_THRMDA 3

H_THRMDC 3

+1.5VSUS3,4,6,7,15,29,38,41,43,44

CPU_VDDNB_CORE38

+VCORE38 +3V_S512,13,15,16,26,27,29,32,35,37 +3V3,6,7,10,11,12,13,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet of

S1G4 PWR & GND 3/3

+1.5VSUS

CPU_VDDNB_CORE

+VCORE +3V_S5 +3V

Quanta Computer Inc.

PROJECT :

ZRA

5 48Monday, March 29, 2010

1

1A

+3V

R540

*10K_4

U31

CPU_SMBCLK34 CPU_SMBDATA34

OVT#33

A A

PM_THERM#13

CPU_SMBCLK CPU_SMBDATA

OVT#

+3V

R535

R535 *8.2K_4

*8.2K_4

5

2

3

Q37*2N7002E-LF Q37*2N7002E-LF

U31

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

*G786P8

1

5

4

3

2

1

2.48A

+3V

+1.5VSUS

MEMHOT_MA#

2

1 3

CN18B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3_SO-DIMM_SOCKET_1.5V_Standard H=8

Q26

Q26 *MMBT3904

*MMBT3904

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VTT1 VTT2

GND GND

CPU_MEMHOT# 3,7,12

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

M_A_A[15:0]4

D D

M_A_BANK[0..2]4

M_A_CS#04 M_A_CS#14 M_A_CLKP14 M_A_CLKN14 M_A_CLKP24 M_A_CLKN24 M_A_CKE04 M_A_CKE14 M_A_CAS#4 M_A_RAS#4

R152 10K_4R152 10K_4 R149 10K_4R149 10K_4

C C

B B

M_A_WE#4

PCLK_SMB7,13,27

PDAT_SMB7,13,27

M_A_ODT04 M_A_ODT14

M_A_DM[7:0]4

M_A_DQSP[7:0]4

M_A_DQSN[7:0]4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BANK0 M_A_BANK1 M_A_BANK2

DIMM0_SA0 DIMM0_SA1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

CN18A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3_SO-DIMM_SOCKET_1.5V_Standard H=8

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ1 M_A_DQ0 M_A_DQ3 M_A_DQ2 M_A_DQ5 M_A_DQ4 M_A_DQ7 M_A_DQ6 M_A_DQ9 M_A_DQ8 M_A_DQ15 M_A_DQ14 M_A_DQ12 M_A_DQ13 M_A_DQ11 M_A_DQ10 M_A_DQ21 M_A_DQ17 M_A_DQ23 M_A_DQ18 M_A_DQ20 M_A_DQ16 M_A_DQ19 M_A_DQ22 M_A_DQ24 M_A_DQ25 M_A_DQ30 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ26 M_A_DQ31 M_A_DQ36 M_A_DQ32 M_A_DQ33 M_A_DQ35 M_A_DQ38 M_A_DQ37 M_A_DQ39 M_A_DQ34 M_A_DQ40 M_A_DQ44 M_A_DQ42 M_A_DQ46 M_A_DQ45 M_A_DQ41 M_A_DQ43 M_A_DQ47 M_A_DQ53 M_A_DQ49 M_A_DQ55 M_A_DQ54 M_A_DQ48 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ61 M_A_DQ60 M_A_DQ63 M_A_DQ62 M_A_DQ56 M_A_DQ57 M_A_DQ59 M_A_DQ58

M_A_DQ[63:0] 4

+0.75VSMVREF_SUSA

+SMDDR_VREF

+1.5VSUS

R252

R252 1K/F_4

1K/F_4

R254

R254 1K/F_4

1K/F_4

R199 0_4R199 0_4

+1.5VSUS

+0.75VSMVREF_SUSA

+VREF_CA_A

*2K/F_4

R124 *2.2K_4R124 *2.2K_4 R123 2.2K_4R123 2.2K_4

MEMHOT_MA#

M_A_RST#4

+VREF_CA_A

+1.5VSUS

R198

R195

Place these Caps near So-Dimm0.

+1.5VSUS

C442

C391

C422

C438

10u/6.3V_6

C432

10u/6.3V_6

A A

5

C444

C444 10u/6.3V_6

10u/6.3V_6

C411

C411 10u/6.3V_6

10u/6.3V_6

C402

C402 *0.1u/10V_4

*0.1u/10V_4

+0.75V_DDR_VTT

C287

C287 1u/6.3V_4

1u/6.3V_4

C422

0.1u/10V_4

C418

0.1u/10V_4

C403

C403 *0.1u/10V_4

*0.1u/10V_4

C288

C288 1u/6.3V_4

1u/6.3V_4

C394

C394 *0.1u/10V_4

*0.1u/10V_4

C861

C861 10u/6.3V_6

10u/6.3V_6

+VREF_CA_A

C385

0.1u/10V_4

4

C384

2.2u/6.3V_6

+0.75VSMVREF_SUSA

C492

0.1u/10V_4

C490

2.2u/6.3V_6

+1.5VSUS3,4,5,7,15,29,38,41,43,44

+3V3,5,7,10,11,12,13,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

+0.75V_DDR_VTT4,7,41

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet of

+1.5VSUS +3V +0.75V_DDR_VTT

Quanta Computer Inc.

PROJECT :

DDR3 DIMMA-STD

ZRA

6 48Monday, March 29, 2010

1

1A

5

4

3

2

1

+1.5VSUS

M_B_DQ[63:0] 4

+0.75VSMVREF_SUSB

+SMDDR_VREF

MEMHOT_MB#

+1.5VSUS

+VREF_CA_B

R197 0_4R197 0_4

R126 *2.2K_4R126 *2.2K_4 R125 2.2K_4R125 2.2K_4

R253

R253 1K/F_4

1K/F_4

R255

R255 1K/F_4

1K/F_4

R193

*2K/F_4

R192

*2K/F_4

1 3

M_B_RST#4

+0.75VSMVREF_SUSB

+VREF_CA_B

+1.5VSUS

2

Q27

Q27 *MMBT3904

*MMBT3904

2.48A

+3V

MEMHOT_MB#

CPU_MEMHOT# 3,6,12

+1.5VSUS

CN19B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

PC2100 DDR3 SDRAM SO-DIMM

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

PC2100 DDR3 SDRAM SO-DIMM

25 26 31 32 37 38 43

DDR3_SO-DIMM_SOCKET_1.5V_Standard H=4

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

M_B_A[15:0]4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4

D D

M_B_BANK[0..2]4

M_B_CS#04 M_B_CS#14 M_B_CLKP14 M_B_CLKN14 M_B_CLKP24 M_B_CLKN24 M_B_CKE04 M_B_CKE14 M_B_CAS#4 M_B_RAS#4

R151 10K_4R151 10K_4

+3V

R150 10K_4R150 10K_4

C C

B B

M_B_WE#4

PCLK_SMB6,13,27

PDAT_SMB6,13,27

M_B_ODT04 M_B_ODT14

M_B_DM[7:0]4

M_B_DQSP[7:0]4

M_B_DQSN[7:0]4

M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BANK0 M_B_BANK1 M_B_BANK2

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

CN19A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3_SO-DIMM_SOCKET_1.5V_Standard H=4

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ1 M_B_DQ0 M_B_DQ3 M_B_DQ2 M_B_DQ4 M_B_DQ5 M_B_DQ7 M_B_DQ6 M_B_DQ9 M_B_DQ13 M_B_DQ11 M_B_DQ10 M_B_DQ12 M_B_DQ8 M_B_DQ14 M_B_DQ15 M_B_DQ17 M_B_DQ16 M_B_DQ19 M_B_DQ18 M_B_DQ21 M_B_DQ20 M_B_DQ22 M_B_DQ23 M_B_DQ29 M_B_DQ25 M_B_DQ27 M_B_DQ26 M_B_DQ28 M_B_DQ24 M_B_DQ31 M_B_DQ30 M_B_DQ33 M_B_DQ32 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ39 M_B_DQ38 M_B_DQ44 M_B_DQ40 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ41 M_B_DQ43 M_B_DQ42 M_B_DQ53 M_B_DQ52 M_B_DQ55 M_B_DQ54 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ60 M_B_DQ61 M_B_DQ58 M_B_DQ59 M_B_DQ57 M_B_DQ56 M_B_DQ62 M_B_DQ63

+1.5VSUS

C443

10u/6.3V_6

A A

Place these Caps near So-Dimm1.

C405

C405 10u/6.3V_6

10u/6.3V_6

5

C430

C430 10u/6.3V_6

10u/6.3V_6

C445

C445 10u/6.3V_6

10u/6.3V_6

C412

C412 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

C433

C433 10u/6.3V_6

10u/6.3V_6

C295

C295 1u/6.3V_4

1u/6.3V_4

C398

0.1u/10V_4

C440

C440 *0.1u/10V_4

*0.1u/10V_4

C424

C424 *0.1u/10V_4

*0.1u/10V_4

C294

C294 1u/6.3V_4

1u/6.3V_4

C419

0.1u/10V_4

C415

C415 *0.1u/10V_4

*0.1u/10V_4

C292

C292 10u/6.3V_6

10u/6.3V_6

+VREF_CA_B

4

C386

0.1u/10V_4

+0.75VSMVREF_SUSB

C383

2.2u/6.3V_6

C491

0.1u/10V_4

C493

2.2u/6.3V_6

+1.5VSUS3,4,5,6,15,29,38,41,43,44

+3V3,5,6,10,11,12,13,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

+0.75V_DDR_VTT4,6,41

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet of

+1.5VSUS +3V +0.75V_DDR_VTT

Quanta Computer Inc.

PROJECT :

DDR3 DIMMB-STD

ZRA

7 48Monday, March 29, 2010

1

1A

5

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5

D D

C C

R186 301/F_4R186 301/F_4 R190 301/F_4R190 301/F_4

HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7

HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

HT_RXCALP HT_TXCALP HT_RXCALN

AC24 AC25

AB25 AB24 AA24 AA25

W21 W20

AB23 AA22

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

Y22 Y23

V21 V20 U20 U21 U19 U18

T22 T23

M22 M23 R21 R20

C23 A24

4

U28A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS880/RX881

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7

HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

HT_TXCALN

3

HT_CADOUTP[15..0] HT_CADOUTN[15..0] HT_CLKOUTP[1..0] HT_CLKOUTN[1..0] HT_CTLOUTP[1..0] HT_CTLOUTN[1..0] HT_CADINP[15..0] HT_CADINN[15..0] HT_CLKINP[1..0] HT_CLKINN[1..0] HT_CTLINP[1..0] HT_CTLINN[1..0]

2

HT_CADOUTP[15..0] 3

HT_CADOUTN[15..0] 3

HT_CLKOUTP[1..0] 3

HT_CLKOUTN[1..0] 3

HT_CTLOUTP[1..0] 3

HT_CTLOUTN[1..0] 3

HT_CADINP[15..0] 3

HT_CADINN[15..0] 3

HT_CLKINP[1..0] 3

HT_CLKINN[1..0] 3

HT_CTLINP[1..0] 3

HT_CTLINN[1..0] 3

1

signals RS880 RX880

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

Ra 301 ohm 1%

Rb 301 ohm 1%

Ra

1.21k ohm 1%

Rb

1.21k ohm 1%

RbRa

RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18

This block is for UMA only , Discrete can remove all component

U28D

AB12

MEM_A0(NC)

AE16

MEM_A1(NC)

V11

MEM_A2(NC)

AE15

MEM_A3(NC)

AA12

+1.8V10,11,16,25,38,43,44

B B

A A

5

+1.1V3,9,10,11,15,39

+1.8V +1.1V

4

AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14

AD16 AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS880/RX881

3

MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC) IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

IOPLLVDD18 - memory PLL not applicable to RX881

15mA

+1.8V

26mA

+1.1V

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

RS880M-HT LINK I/F 1/4

ZRA

8 48Monday, March 29, 2010

1

1A

5

4

3

2

1

U28B

PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13

D D

PCIE_RX1+26

C C

PCIE_RX1-26

PCIE_RXP227 PCIE_RXN227

A_RXP012 A_RXN012 A_RXP112 A_RXN112 A_RXP212 A_RXN212 A_RXP312 A_RXN312

PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

U28B

D4 C4

A3

B3 C2 C1

E5

F5 G5 G6 H5 H6

J6 J5 J7

J8 L5 L6

M8

L8 P7

M7

P5

M5 R8

P8

R6 R5

P4 P3 T4 T3

AE3 AD4 AE2 AD3 AD1 AD2

V5

W6

U5 U6 U8 U7

AA8

Y8

AA7

Y7

AA5 AA6

W5

Y5

RS880/RX881

GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N

PCIE I/F GFX

GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C PEG_TXP11_C PEG_TXN11_C PEG_TXP10_C PEG_TXN10_C PEG_TXP9_C PEG_TXN9_C PEG_TXP8_C PEG_TXN8_C PEG_TXP7_C PEG_TXN7_C PEG_TXP6_C PEG_TXN6_C PEG_TXP5_C PEG_TXN5_C PEG_TXP4_C PEG_TXN4_C PEG_TXP3_C PEG_TXN3_C PEG_TXP2_C PEG_TXN2_C PEG_TXP1_C PEG_TXN1_C PEG_TXP0_C PEG_TXN0_C

PCIE_TXP0_C PCIE_TXN0_C

PCIE_TXP2_C PCIE_TXN2_C

A_TXP0_C A_TXN0_C A_TXP1_C A_TXN1_C A_TXP2_C A_TXN2_C A_TXP3_C A_TXN3_C

NB_PCIECALRP NB_PCIECALRN

C743 SW@0.1u/10V_4C743 SW@0.1u/10V_4 C745 SW@0.1u/10V_4C745 SW@0.1u/10V_4 C737 SW@0.1u/10V_4C737 SW@0.1u/10V_4 C740 SW@0.1u/10V_4C740 SW@0.1u/10V_4 C732 SW@0.1u/10V_4C732 SW@0.1u/10V_4 C735 SW@0.1u/10V_4C735 SW@0.1u/10V_4 C714 SW@0.1u/10V_4C714 SW@0.1u/10V_4 C713 SW@0.1u/10V_4C713 SW@0.1u/10V_4 C716 SW@0.1u/10V_4C716 SW@0.1u/10V_4 C715 SW@0.1u/10V_4C715 SW@0.1u/10V_4 C718 SW@0.1u/10V_4C718 SW@0.1u/10V_4 C717 SW@0.1u/10V_4C717 SW@0.1u/10V_4 C720 SW@0.1u/10V_4C720 SW@0.1u/10V_4 C719 SW@0.1u/10V_4C719 SW@0.1u/10V_4 C722 SW@0.1u/10V_4C722 SW@0.1u/10V_4 C721 SW@0.1u/10V_4C721 SW@0.1u/10V_4 C724 SW@0.1u/10V_4C724 SW@0.1u/10V_4 C723 SW@0.1u/10V_4C723 SW@0.1u/10V_4 C705 SW@0.1u/10V_4C705 SW@0.1u/10V_4 C704 SW@0.1u/10V_4C704 SW@0.1u/10V_4 C726 SW@0.1u/10V_4C726 SW@0.1u/10V_4 C725 SW@0.1u/10V_4C725 SW@0.1u/10V_4 C703 SW@0.1u/10V_4C703 SW@0.1u/10V_4 C700 SW@0.1u/10V_4C700 SW@0.1u/10V_4 C702 SW@0.1u/10V_4C702 SW@0.1u/10V_4 C701 SW@0.1u/10V_4C701 SW@0.1u/10V_4 C710 SW@0.1u/10V_4C710 SW@0.1u/10V_4 C709 SW@0.1u/10V_4C709 SW@0.1u/10V_4 C708 SW@0.1u/10V_4C708 SW@0.1u/10V_4 C699 SW@0.1u/10V_4C699 SW@0.1u/10V_4 C730 SW@0.1u/10V_4C730 SW@0.1u/10V_4 C712 SW@0.1u/10V_4C712 SW@0.1u/10V_4

C736 0.1u/10V_4C736 0.1u/10V_4 C733 0.1u/10V_4C733 0.1u/10V_4

C729 0.1u/10V_4C729 0.1u/10V_4 C731 0.1u/10V_4C731 0.1u/10V_4

C752 0.1u/10V_4C752 0.1u/10V_4 C751 0.1u/10V_4C751 0.1u/10V_4 C749 0.1u/10V_4C749 0.1u/10V_4 C750 0.1u/10V_4C750 0.1u/10V_4 C744 0.1u/10V_4C744 0.1u/10V_4 C747 0.1u/10V_4C747 0.1u/10V_4 C738 0.1u/10V_4C738 0.1u/10V_4 C742 0.1u/10V_4C742 0.1u/10V_4

R164 1.27K/F_4R164 1.27K/F_4 R161 2K/F_4R161 2K/F_4

+1.1V

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCIE_TX1+ 26 PCIE_TX1- 26

PCIE_TXP2 27 PCIE_TXN2 27

A_TXP0 12 A_TXN0 12 A_TXP1 12 A_TXN1 12 A_TXP2 12 A_TXN2 12 A_TXP3 12 A_TXN3 12

PEG_RXN[15:0]17 PEG_RXP[15:0]17

PEG_RXN[15:0] PEG_RXP[15:0]

INT. DVI

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C

To LAN

TO WLAN-2

Close to North Bridge

C307 *IV@0.1u/10V_4C307 *IV@0.1u/10V_4 C310 *IV@0.1u/10V_4C310 *IV@0.1u/10V_4 C300 *IV@0.1u/10V_4C300 *IV@0.1u/10V_4 C304 *IV@0.1u/10V_4C304 *IV@0.1u/10V_4 C291 *IV@0.1u/10V_4C291 *IV@0.1u/10V_4 C296 *IV@0.1u/10V_4C296 *IV@0.1u/10V_4 C284 *IV@0.1u/10V_4C284 *IV@0.1u/10V_4 C283 *IV@0.1u/10V_4C283 *IV@0.1u/10V_4

PEG_TXN[15:0] PEG_TXP[15:0]

PEG_TXN[15:0] 17 PEG_TXP[15:0] 17

TX2_HDMI+L 35 TX2_HDMI-L 35 TX1_HDMI+L 35 TX1_HDMI-L 35 TX0_HDMI+L 35 TX0_HDMI-L 35 TXC_HDMI+L 35 TXC_HDMI-L 35

B B

+1.1V

+1.1V 3,8,10,11,15,39

RS880 Display Port Support (muxed on GFX)

DP0

DP1

A A

5

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

RS880M-PCIE I/F 2/4

ZRA

1A

9 48Monday, March 29, 2010

1

1A

5

D D

All RS880 variants do not support analog TV-out functionality. As such, Y, C_Pr, and COMP_Pb

INT_CRT_RED25 INT_CRT_GRE25 INT_CRT_BLU25

Only for UMA

VGA (Not applicable to RX881)

For Check list JTAG

+3V

R489 *4.7K_4R489 *4.7K_4 R485 *4.7K_4R485 *4.7K_4 R484 *4.7K_4R484 *4.7K_4

NB_PWRGD_IN INT_EDIDDATA INT_EDIDCLK

For A11 version

R148 *SP@A11_49.9/F_4R148 *SP@A11_49.9/F_4 R144 *SP@A11_49.9/F_4R144 *SP@A11_49.9/F_4

Reference clock input for the RS880M.

C C

+1.1V +1.8V +3V

+1.1V 3,8,9,11,15,39 +1.8V 8,11,16,25,38,43,44 +3V 3,5,6,7,11,12,13,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

CLK_SBLINKP CLK_SBLINKN

B-TEST 0128

HDMI_DDC_DATA35

HDMI_DDC_CLK35

4

RP22 *IV@0_4P2R_4RP22 *IV@0_4P2R_4

4

3

2

1

R177 133/F_4R177 133/F_4 R178 150/F_4R178 150/F_4 R179 150/F_4R179 150/F_4

INT_CRT_HSYNC25 INT_CRT_VSYNC25

INT_DDCDATA25 INT_DDCCLK25

R168 715/F_6R168 715/F_6

A_RST#12,27,34

NB_PWRGD_IN16

CLK_NB_HTREFP_PR12 CLK_NB_HTREFN_PR12

CLK_NB_REF_CLKP12 CLK_NB_REF_CLKN12

R153 4.7K_4R153 4.7K_4 R154 4.7K_4R154 4.7K_4

CLK_SBLINKP12 CLK_SBLINKN12

INT_EDIDDATA25

INT_EDIDCLK25

+NB_CORE_ON40

110mA 20mA

20mA 20mA

4mA

T71T71 T70T70

T20T20 T21T21

+3V_AVDD_NB +1.8V_AVDDDI_NB +1.8V_AVDDQ_NB

INT_CRT_HSYNC INT_CRT_VSYNC

DAC_RSET_NB +1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL

NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP

NBGFX_CLKP NBGFX_CLKN

GPP_REFCLKP GPP_REFCLKN

CLK_SBLINKP CLK_SBLINKN

INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA_R HDMI_DDC_CLK_R

+NB_CORE_ON

RS880_AUX_CAL

3

U28C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

A9

I2C_DATA

B9

I2C_CLK

B8

DDC_DATA/AUX0N(NC)

A8

DDC_CLK/AUX0P(NC)

B7

AUX1P(NC)

A7

AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS880/RX881

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

2

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

SUS_STAT#_NB

TEST_EN

R174

1.8K/F_4

LA_DATAP0 25 LA_DATAN0 25 LA_DATAP1 25 LA_DATAN1 25 LA_DATAP2 25 LA_DATAN2 25

LA_CLK 25 LA_CLK# 25

15mA

300mA

INT_LVDS_DIGON 25 INT_DPST_PWM 25 INT_LVDS_BLON 25

R185

R185 *3K_4

*3K_4

1

INT_HDMI_HPD 35

SUS_STAT# 13

RS880M --- ADD

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. RS880M

1 Disable

B B

A A

0 Enable

RS880M: Enables Side port memory

RS880M:INT_CRT_HSYNC Selects if Memory SIDE PORT is available or not

1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

For extrnal EEPROM Debug only

Display Port interface from PCIeGraphics (RS880/rs880M only)

INT_CRT_VSYNC

INT_CRT_HSYNC

+NB_CORE_ON

RS880_AUX_CAL

5

R167 3K_4R167 3K_4

R170 3K_4R170 3K_4 R169 *3K_4R169 *3K_4

RS780/RX780/RS880

R491 2K/F_4R491 2K/F_4

R160 150/F_4R160 150/F_4

+3V

4

L28

+3V

PBY160808T-221Y-N

2.2u/6.3V_6

change R175 0ohm to bead(CX8PG221003) and

+1.8V

C339 from 0.1uF to 2.2uF(CH52201K991), for monitor noise issue.

R175 1.4A/220ohm_6R175 1.4A/220ohm_6

C339

2.2U/6.3V_6

L36

PBY160808T-221Y-N

+1.8V

PBY160808T-221Y-N

C358

2.2u/6.3V_6

L26

L33

AVDD-DAC Analog

C330

not applicable to RX780

+1.8V_AVDDDI_NB

AVDDI-DAC Digital not applicable to RX780

+1.8V_AVDDQ_NB

AVDDQ-DAC Bandgap Reference not applicable to RX780

20mils width

+1.8V_VDDA18PCIEPLL

VDDA18PCIEPLL -PCIE PLL

C311

2.2u/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

VDDA18HTPLL -HT LINK PLL

C353

2.2u/6.3V_6

+1.1V

C-TEST 0322

+1.8V

3

L75

PBY160808T-221Y-N

2.2u/6.3V_6

L30

PBY160808T-221Y-N

C348

C348 10u/6.3V_8

10u/6.3V_8

CPU_LDT_STOP#3,12

CPU_LDT_REQ#3

ALLOW_LDTSTOP12

4.7u/6.3V_6

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

+1.1V_PLLVDD+3V_AVDD_NB

PLLVDD - Graphics PLL

C755

not applicable to RX780

+1.8V_PLLVDD18

PLLVDD18 - Graphics PLL not applicable to RX780

C352

R188 *0_4R188 *0_4

R189 0_4R189 0_4

+1.8V

L31

PBY160808T-221Y-N

L76

PBY160808T-221Y-N

+1.8V

+

U12

Open

4

2

Drain

-

74LVC07+-

74LVC07

3 5

R191 1K_4R191 1K_4

DDR3 based CPU : Level shifted to 1.8 V on the Northbridge side using an open-drain buffer and

R130

pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor

300_4

on the Northbridge side.

NB_LDT_STOP#

NB_ALLOW_LDTSTOP

B-TEST 0225

2.2K => 300R

+1.8V

2

C344

2.2u/6.3V_6

C760

4.7u/6.3V_6



Accord with LDT riss time SPEC

Size Document Number Rev

Date: Sheet of

+1.8V_VDDLTP18_NB

VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780

+1.8V_VDDLT_18_NB

C758

VDDLT18 - LVDS or DVI/HDMI digital

0.1u/10V_4

not applicable to RX780

Quanta Computer Inc.

PROJECT :

RS880M-SYSTEM I/F 3/4

1

ZRA

1A

10 48Monday, March 29, 2010

1A

5

4

3

2

1

D11

E14

E15

J12

K14

M11

U28F

D D

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

VSSAHT1

VSSAHT2

A25

D23

H7

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

J22

L17

E22

H19

G22

G24

G25

VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15

VSSAHT9

VSSAHT10

VSSAHT11

L22

L24

L25

L7

VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT20

P20

N22

M20

V19

R19

R22

R24

R25

U22

H20

W22

AA4

AB5

AB1

AB7

AC3

AC4

AE1

AE4

AB2

AE14

VSS2

VSS3G8VSS4

VSS1

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSSAPCIE36

VSSAPCIE37

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

GROUND

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT26

VSSAHT27

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

L12

Y21

W24

W25

AD25

T12

P12

P15

N13

M14

V12

R11

R14

U14

U11

Y18

U15

W11

W15

AA14

AB11

AC12

L15

J15

VSS5

VSS7

VSS8

VSS9

VSS6

VSS10

VSS28

VSS29

VSS30

VSS31

VSS32

VSS34

VSS33

K11

AB15

AB17

AB19

AE20

AB21

RX881/RS880 POWER DIFFERENCE TABLE

PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE

VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18

RX881

+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 GND +1.1V +1.1V +1.8V +1.1V GND +3.3V

RS880

+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V

+1.1V

+1.8V/1.5V

+3.3V +1.8V+1.8V

PIN NAME IOPLLVDD

AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33

RX881 RS880

+1.1V

GND

+3.3VAVDD

GND +1.8V GND +1.8V

+1.1V

GND GND

+1.8V

GND

+1.8V

GND NC

NC

+1.1V 2A for RS880M +1.1V 1.3A for RX881

+1.1V

C C

+1.1V 2A for RS880M

0.6A

0.7A

L29

L29 0_8

0_8

L42

L42 0_8

0_8

C343

4.7u/6.3V_6

C392

4.7u/6.3V_6

C345

0.1u/10V_4

C359

0.1u/10V_4

C346

0.1u/10V_4

C366

0.1u/10V_4

+1.1V_VDDHT

C347

0.1u/10V_4

+1.1V_VDDHTRX

C357

0.1u/10V_4

+1.2V 0.4A for Rx881

C355

0.1u/10V_4

+1.1V_VDDHTTX

C364

0.1u/10V_4

+1.1V

L34

0_6

0.4A

C356

4.7u/6.3V_6

C354

0.1u/10V_4

C360

0.1u/10V_4

+1.8V 1A for RS780M+SB700

B B

+1.8V 1A for RX881

+1.8V

BLM21PG221SN1D(220 100M2A)_8

L27

0.7A

C325

4.7u/6.3V_6

+1.8V

C324

4.7u/6.3V_6

R157 0_6R157 0_6

C320

0.1u/10V_4

C323

0.1u/10V_4

25mA

VDD18-RS880 I/O Transform

+1.8V_VDDA18PCIE

C316

0.1u/10V_4

+1.8V_VDDG18_NB

C315

C315 1u/6.3V_4

1u/6.3V_4

C326

0.1u/10V_4

U28E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDDG18_1(VDD18_1)

G9

VDDG18_2(VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS880/RX881

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11

POWER

VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDDG33_1(NC) VDDG33_2(NC)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+1.1V_VDD_PCIE

C297

C319

0.1u/10V_4

C338

C341

0.1u/10V_4

C342

0.1u/10V_4

VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform

+3V_VDDG33

C327

0.1u/10V_4

C334

0.1u/10V_4

R172 0_4R172 0_4

C328

0.1u/10V_4

2.5A

C322

C321

1u/6.3V_4

C333

C337

0.1u/10V_4

C332

10u/6.3V_8

0.1u/10V_4

60mA

VDD33 - 3.3V I/O Not applicable to RX780

VDDPCIE - PCIE-E Main power

R143 0_8R143 0_8

C317

4.7u/6.3V_6

0.95~1.1V 10A

VDDC - Core Logic power

C340

10u/6.3V_8

C329

+3V

+1.1V

NB_CORE

A A

5

+1.1V +1.8V NB_CORE

+1.1V 3,8,9,10,15,39 +1.8V 8,10,16,25,38,43,44 NB_CORE 33,40

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

RS880M-POWER 4/4

ZRA

1A

11 48Monday, March 29, 2010

1

1A

5

2

A_RST#

1

B-TEST 0128

R586

R586 33_4

33_4

R162 *SW@0_4R162 *SW@0_4

21

C613 150P/50V_4C613 150P/50V_4

R37533_4 R37533_4

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C

PCIE_CALRP_SB

PCIE_CALRN_SB

SB_GPIO_PCIE_RST# 13

B-TEST 0128

VDDR_OPT 44

B-TEST 0201

R542

R542 1M_4

1M_4

SLT_GFX_CLKP SLT_GFX_CLKN

MINI-PCIE,Card reader

D D

C C

CLK_NB_REF_CLKP10 CLK_NB_REF_CLKN10

CLK_NB_HTREFP_PR10 CLK_NB_HTREFN_PR10

CLK_CPU_BCLKP_PR3 CLK_CPU_BCLKN_PR3

CLK_PCIE_VGAP17 CLK_PCIE_VGAN17

B B

CLK_PCIE_WLANP_227 CLK_PCIE_WLANN_227

MEM_1V514

A A

R609

R609 *20M_6

*20M_6

NB & EC

PLACE THESE PCIE AC COUPLING CAPS CLOSE TO SB820

PLTRST#17,26,27,30

CLK_SBLINKP10 CLK_SBLINKN10

CLK_PCIE_LOM26 CLK_PCIE_LOM#26

C840 0.1u/10V_4C840 0.1u/10V_4

VDDR_1.05_EN

VDDR_1.05_EN: 1 : VDDR =1.05V 0 : VDDR = 0.9V (Default)

4

R610 20M_6R610 20M_6

C855

C855 18P/50V_4

18P/50V_4

A_RST#10,27,34

A_RXP09 A_RXN09 A_RXP19 A_RXN19 A_RXP29 A_RXN29 A_RXP39 A_RXN39

A_TXP09 A_TXN09 A_TXP19 A_TXN19 A_TXP29 A_TXN29 A_TXP39 A_TXN39

+1.1V_PCIE_VDDR

C608 0.1u/10V_4C608 0.1u/10V_4

4

C612

*10p/50V_4

4

RP15 SP@0_4P2R_4RP15 SP@0_4P2R_4

2

+3V

5

2 1

3

TC7SH08FU

R588 *0_4R588 *0_4

SB_CLK_VGA17

RTC_X1

B-TEST 0129

23

Y9

32.768KHZ

RTC_X2

1

C854

C854 18P/50V_4

18P/50V_4

5

C805 0.1u/10V_4C805 0.1u/10V_4 C806 0.1u/10V_4C806 0.1u/10V_4 C807 0.1u/10V_4C807 0.1u/10V_4 C808 0.1u/10V_4C808 0.1u/10V_4 C793 0.1u/10V_4C793 0.1u/10V_4 C791 0.1u/10V_4C791 0.1u/10V_4 C809 0.1u/10V_4C809 0.1u/10V_4 C810 0.1u/10V_4C810 0.1u/10V_4

R548 590/F_4R548 590/F_4 R268 2K/F_4R268 2K/F_4

+3V_S5

5

U39

3

TC7SH08FU

R371 *0_4R371 *0_4

3 1

For VDDR 1.05 control

4

U37

27P/50V_4

27P/50V_4 C797

C797

Y5

25MHZY525MHZ

C798

C798 27P/50V_4

27P/50V_4

B-TEST 0129

4

SB_CLK_VGA_R

25M_X1

25M_X2

4

U36A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M_A12

Part 1 of 5

SB800

PCICLK4/14M_OSC/GPO39

PCI CLKS

PCI EXPRESS INTERFACES

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

CLOCK GENERATOR

ALLOW_LDTSTP/DMA_ACTIVE#

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

PCI INTERFACELPC

REQ1#/GPIO40

GNT1#/GPO44 GNT2#/GPO45

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

SERIRQ/GPIO48

CPU

RTC

INTRUDER_ALERT#

VDDBT_RTC_G

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

PROCHOT#

LDT_PG LDT_STP# LDT_RST#

32K_X1 32K_X2

RTCCLK

3

+1.1V_PCIE_VDDR15

+3V3,5,6,7,10,11,13,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

PCI_CLK0

W2

PCI_CLK1_L

W1

PCI_CLK2

W3

PCI_CLK3

W4

PCI_CLK4

Y1

R323 33_4R323 33_4

V2

AA1

*SW@0_4

AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

B2 B1

3

R638

D35

SW@RB501V-40

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4

R304 *short_4R304 *short_4

SB820_MEMHOT#

D34 *SW@RB501V-40D34 *SW@RB501V-40

SB_ODD_EN

R302 20K/F_4R302 20K/F_4

LPC_CLK0_R LPC_CLK1_R

LDRQ0#_SB LDRQ1#_SB

RTC_X1 RTC_X2

INTRUDER_ALERT#

C589

C589 1u/10V_4

1u/10V_4

+1.1V_PCIE_VDDR +3V

R319 22_4R319 22_4 R321 22_4R321 22_4

+3V

R602

R602 SW@10K_4

SW@10K_4

21

T48T48 T54T54

+3V

R581 22_4R581 22_4 R567 22_4R567 22_4

LPC_LAD0 27,34 LPC_LAD1 27,34 LPC_LAD2 27,34 LPC_LAD3 27,34 LPC_LFRAME# 27,34

T39T39 T46T46

IRQ_SERIRQ 27,34

ALLOW_LDTSTOP 10

CPU_PWRGD 3

CPU_LDT_STOP# 3,10

CPU_LDT_RST# 3

C598

C598 150P/50V_4

150P/50V_4

C-TEST 0323

add R638 for CRT

AD23 16

VDDR_1.05_EN

AD24 16 AD25 16 AD26 16 AD27 16

RTC_CLK 34

VCCRTC

C856

0.1u/10V_4

2

RTC(RTC)

R387 510_4R387 510_4

PCLK_DEBUG 27 PCI_CLK1 16,27 PCI_CLK2 16 PCI_CLK3 16 PCI_CLK4 16

PCI_RST# 27

PE_GPIO2 25

+3V +3V

T49T49

INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).

+3VPCU

󰇤

R608

R608 *2.2K_4

*2.2K_4

1 3

PE_GPIO2

SB_ODD_EN 28 dGPU_VRON 13,42,43

CLKRUN# 27,34

dGPU_PWROK 20

dGPU_RST_GPIO 17

C826

C826 *5.6p/50V_4

*5.6p/50V_4

R273*10K_4 R273*10K_4

R611

R611 *2.2K_4

*2.2K_4

2

Q41

*MMBT3904

C833

C833 *22p/50V_4

*22p/50V_4

+3V_S5 CPU_PROCHOT# 3,14

R624 *1M_4R624 *1M_4

2

R366

R366 1K_6

1K_6

VCCRTC_2 VCCRTC_1

12

CPU_MEMHOT# 3,6,7

0 1

LPC_CLK0 16,34 LPC_CLK1 16,27

for EMI suggestion

D24 CH500H-40D24 CH500H-40

D23

Q24

MMBT3904

CN24

CN24 RTC_CONN

RTC_CONN

BOARD_ID4 GPIO14

1

VCCRTC

12

G1

R354

8.06K/F_4

R344 *10K_4R344 *10K_4

R345 SW@10K_4R345 SW@10K_4

R346 *10K_4R346 *10K_4

R343 *SP@10K_4R343 *SP@10K_4

R342 *10K_4R342 *10K_4

Board ID

BAP50N/A

G1 *SHORT_PAD

*SHORT_PAD

R363

8.06K/F_4

BOARD_ID2 GPIO12

WO/Sideport

C767

C767 1u/10V_4

1u/10V_4

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

C768

0.1u/10V_4

R368

68.1K/F_4

R369 150K_4R369 150K_4

BOARD_ID1 GPIO11

UMA

+5VPCU

B-TEST 0226

R332 *10K_4R332 *10K_4

R333 *IV@10K_4R333 *IV@10K_4

R334 *10K_4R334 *10K_4

R331 *SP@10K_4R331 *SP@10K_4

R330 10K_4R330 10K_4

B-TEST 0226



BAP/BXP

BOARD_ID0 GPIO10

1 3

2

B-TEST 0226

CH500H-40

+3V

BOARD_ID3 GPIO13

DiscreteW/SideportN/A BXP50

SB_ODD_EN

VCCRTC

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

SB820-PCIE/PCI/CPU/LPC 1/4

R599*10K_4 R599*10K_4

+3V

ZRA

12 48Monday, March 29, 2010

1

14"

15.6"

1A

5

+3V_S5

NC only ,Can't be install

R376 *2.2K_4R376 *2.2K_4 R373 *2.2K_4R373 *2.2K_4 R358 *2.2K_4R358 *2.2K_4

D D

C C

+3V

SCL0/SDATA0 is 3V tolerance AMD datasheet define it

R276 2.2K_4R276 2.2K_4 R275 2.2K_4R275 2.2K_4

+3V_S5

SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it

R278 2.2K_4R278 2.2K_4 R270 2.2K_4R270 2.2K_4

+3V

R329 4.7K_4R329 4.7K_4

SB_TEST0 SB_TEST1 SB_TEST2

PCLK_SMB PDAT_SMB

SB_SCLK2 SB_SDATA2

SUS_STAT#

Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer

+3V

SIO_EXT_SMI#34 SIO_EXT_SCI#34

B-TEST 0128

dGPU_VRON

2ms

MXM_PWR_EN

MXM_PWREN20

MXM_PWR_EN

dGPU_VRON12,42,43

>1mS delay is required between all MXM power rail stable and MXM_PWREN(enables the module internal power)

B B

A A

Azalia to AUDIO and MDC

BLM15AG121SS1_4

5

C875 *10p/50V_4C875 *10p/50V_4

C611 *10p/50V_4C611 *10p/50V_4

C874 *10p/50V_4C874 *10p/50V_4

C857 *10p/50V_4C857 *10p/50V_4

L43

C614 *10p/50V_4C614 *10p/50V_4

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST#

ACZ_SDIN0 ACZ_SDIN1

If the VDDIO_AZ_S power rail is configured for 1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

R341 33_4R341 33_4 R629 33_4R629 33_4

R631 33_4R631 33_4 R618 33_4R618 33_4

R627 33_4R627 33_4 R628 33_4R628 33_4

R621 33_4R621 33_4 R620 33_4R620 33_4

R289

SW@10K_4

D13

SW@RB501V-40

21 21

D14

D14 *SW@RB501V-40

*SW@RB501V-40

ADD C873 C874 C875,L43 for EMI

ACZ_SDOUT_MDC 29 ACZ_SDOUT_AUDIO 29

ACZ_SYNC_MDC 29 ACZ_SYNC_AUDIO 29

C873 *10p/50V_4C873 *10p/50V_4

ACZ_BITCLK_AUDIO 29

ACZ_RST#_MDC 29 ACZ_RST#_AUDIO 29

ACZ_SDIN0 29 ACZ_SDIN1 29

C564

SW@0.1u/10V_4

ACZ_SDOUT16

C-TEST 0324

ACZ_BITCLK_MDC 29

AUDIO CODE MDC

CPU_THERMTRIP#3

SB_GPIO_PCIE_RST#12

CLK_PCIE_LAN_REQ#26

CLK_PCIE_2_REQ#27

SB_CLKREQG#18

4

SUSB#34 SUSC#34

DNBSWON#34

SB_PWRGD_IN16,27

SUS_STAT#10

PCIE_WAKE#26

NB_PWRGD_SB16 ICH_RSMRST#34

SPKR29 PCLK_SMB6,7,27 PDAT_SMB6,7,27

SB_SMBCLK126 SB_SMBDATA126

OC_7#31 OC_6#31

PM_THERM#5

OC_4#31

+3V_S5

CN12

1 2 3 4 5 6 7 8

*S/W_JTAG_DEBUG

4

SB_TEST0 SB_TEST1

T99T99

T98T98 T59T59

T45T45

T47T47

SB_TEST2

LANLINK_STATE# SIO_EXT_SMI#_R SIO_EXT_SCI#_R SYS_RST# PCIE_WAKE# IR_RX1

MXM_PWR_EN SB_GPIO59

PCLK_SMB PDAT_SMB SB_SMBCLK1 SB_SMBDATA1

CRD_CLKREQ#

CLKREQG#

SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#

SIO_A20GATE34

SIO_RCIN#34

R551 0_4R551 0_4 R378 0_4R378 0_4

R272 *SW@0_4R272 *SW@0_4

R377 0_4R377 0_4

R315 0_4R315 0_4

HD audio interface is +3VS5 voltage

R622 *10K_4R622 *10K_4 R328 *10K_4R328 *10K_4

R327 *10K_4R327 *10K_4 R630 *10K_4R630 *10K_4 R317 *10K_4R317 *10K_4

R619 10K_4R619 10K_4 R314 10K_4R314 10K_4

R614 10K_4R614 10K_4

ACZ_BCLK ACZ_SDOUT ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3 ACZ_SYNC ACZ_RST#

GBE_COL GBE_CRS

GBE_MDIO

ZR8

R350 10K_4R350 10K_4

R351 10K_4R351 10K_4

+3V_S5

SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1

SB_JTAG_RST#

GBE_RXERR

GBE_PHY_INTR ADP_PRES0

T40T40

C615

C615 *10p/50V_4

*10p/50V_4

SB JTAG

3

+3V_S512,15,16,26,27,29,32,35,37 +3V3,5,6,7,10,11,12,14,15,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44

U36D

J2

PCI_PME#/GEVENT4#

K1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0#

AE21

KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3#

J29

LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2#

AC19

NB_PWRGD

G1

RSMRST#

AD19

CLK_REQ4#/SATA_IS0#/GPIO64

AA16

CLK_REQ3#/SATA_IS1#/GPIO63

AB21

SMARTVOLT1/SATA_IS2#/GPIO50

AC18

CLK_REQ0#/SATA_IS3#/GPIO60

AF20

SATA_IS4#/FANOUT3/GPIO55

AE19

SATA_IS5#/FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228

AH21

CLK_REQ2#/FANIN4/GPIO62

AB18

CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11#

AA20

CLK_REQG#/GPIO65/OSCIN

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2#/GBE_STAT2/GPIO166

G29

FC_RST#/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

SB820M_A12

3

+3V_S5 +3V

SB800

Part 4 of 5

GBE LAN

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199

HD AUDIO

EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB 1.1 USB MISCEMBEDDED CTRL

USB 2.0

GPIO

USB OC

SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218

2

USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode. It is output CLK source when INT CLKGEN mode.

A10 G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

CLK_48M_USB USB_RCOMP_SB

USB_FDS12P USB_FSD12N

SB_SCLK2 SB_SDATA2 SB_GPIO195 SB_GPIO196

2

R301 SBK160808T-600Y-N_6R301 SBK160808T-600Y-N_6

R283 11.8K/F_6R283 11.8K/F_6

T51T51

USBP5+ 30 USBP5- 30

USBP12+ 31 USBP12- 31

USBP11+ 31 USBP11- 31

USBP10+ 31 USBP10- 31

USBP9+ 32 USBP9- 32

USBP8+ 25 USBP8- 25

USBP7+ 31 USBP7- 31

USBP4+ 27 USBP4- 27

USBP1+ 35 USBP1- 35

USBP0+ 31 USBP0- 31

T53T53

USB card reader

USB board

BLUETOOTH

USB CAMERA

Finger Print

WLAN MINI CARD

DOCKING On board USB connect

Only USB Port0 can be configured as debug port.

GPIO199 16 GPIO200 16

Check list

SB_GPIO195 SB_GPIO196

Size Document Number Rev

Date: Sheet of

R563 10K_4R563 10K_4 R549 10K_4R549 10K_4

1

change R301 footprint from 0402 to 0603 P/N from CS00002JB38 to CX08T600102

C-TEST 0324

CR_CLK 30

B-TEST 0223 CLK source change from exterior to SB

EMI

CLK_48M_USB

C-TEST 0324

del R300, stuff C581 for EMI

C581

C581 10p/50V_4

10p/50V_4

Quanta Computer Inc.

PROJECT :

SB820-ACPI/GPIO/USB 2/4

ZRA

13 48Monday, March 29, 2010

1

1A

5

SATA PORT 0,1,2,3 can support AHCI mode

SATA_TX0+28

SATA HDD

D D

SATA ODD

C C

B B

+1.1V_AVDD_SATA

PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB820

SATA_TX0-28

SATA_RX0-28 SATA_RX0+28

SATA_TX1+28 SATA_TX1-28

SATA_RX1-28 SATA_RX1+28

C850 0.01u/16V_4C850 0.01u/16V_4 C849 0.01u/16V_4C849 0.01u/16V_4

C848 0.01u/16V_4C848 0.01u/16V_4 C847 0.01u/16V_4C847 0.01u/16V_4

R295 1K/F_4R295 1K/F_4 R290 931/F_4R290 931/F_4

SATA_ACT#32

*22P/50V_4

C845

C841

21

Y7 *25MHZY7*25MHZ

T56T56 T61T61 T58T58 T50T50 T60T60

+1.1V_AVDD_SATA15

SATA_TX0+_C SATA_TX0-_C

SATA_TX1+_C SATA_TX1-_C

SATA_CALRP SATA_CALRN

SB_GPIO164 SB_GPIO163 SB_GPIO162 SB_GPIO165 SB_GPIO161

+3V_S512,13,15,16,26,27,29,32,35,37

4

SATA_X1

R587

R587 *1M_4

*1M_4

SATA_X2

U36B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT#/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1#/GPIO165

G2

ROM_RST#/GPIO161

SB820M_A12

+1.1V_AVDD_SATA +3V_S5

SB800

Part 2 of 5

SERIAL ATA

TEMPIN3/TALERT#/GPIO174

HW MONITOR

SPI ROM

3

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140

FLASH

FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMP_COMM VIN0/GPIO175

VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC1 NC2

CPU_PROCHOT#3,12

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

SB_PROCHOT#_C

WWAN_DET# CPPE_NC1# CRD_REQ1#

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174 TEMP_COMM

SB_GPIO175 SB_GPIO176 SIDE_PORT_ID0 SIDE_PORT_ID1

SB_GPIO180 SB_GPIO181 SB_GPIO182

T80T80 T78T78 T86T86

T77T77 T76T76 T87T87 T81T81 T74T74 T75T75

IF THERE IS NO IDE, TEST

T83T83

POINTS FOR DEBUG BUS

T82T82

IS MANDATORY

T37T37 T85T85 T91T91 T90T90 T93T93 T95T95 T96T96 T97T97 T94T94 T89T89 T42T42 T92T92 T88T88 T84T84 T79T79

T55T55 T52T52 T57T57

MEM_1V5 12

+3V

R316

R316 *10K_4

*10K_4

2

Q23

13

*MMBT3904

R306

R306 *10K_4

*10K_4

SB_PROCHOT#_C

2

1

Check list

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174 SB_GPIO175 SB_GPIO176 SIDE_PORT_ID0 SIDE_PORT_ID1 SB_GPIO180 SB_GPIO181 SB_GPIO182

R597 10K_4R597 10K_4 R598 10K_4R598 10K_4 R601 10K_4R601 10K_4 R600 10K_4R600 10K_4 R606 10K_4R606 10K_4 R605 10K_4R605 10K_4 R603 10K_4R603 10K_4 R604 10K_4R604 10K_4 R596 10K_4R596 10K_4 R594 *10K_4R594 *10K_4 R592 10K_4R592 10K_4

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

SB820-SATA/IDE/HWM/SPI 3/4

ZRA

1A

14 48Monday, March 29, 2010

1

1A

5

4

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

3

2

1

VDD-- S/B CORE power

U36C

AH1

V6

Y19

AE5

AC21

AA2 AB4 AC8 AA7 AA9 AF7

AA19

AF22 AE25 AF24 AC22

AE28

U26

V22 V26 V27 V28

V29 W22 W26

AD14

AJ20 AF18 AH20 AG19 AE18 AD18 AE16

A18 A19 A20 B18 B19

B20 C18 C20 D18 D19 D20

E19

C11 D11

C842

0.1u/10V_4

U36C

VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12

VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4

VDDPL_33_PCIE

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDPL_33_SATA VDDAN_11_SATA_1

VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12

VDDAN_11_USB_S_1 VDDAN_11_USB_S_2

SB820M_A12

POWER

+1.1V_USB_PHY_R+1.1V_S5

C551

0.1u/10V_4

+1.1V_VDDPL+1.1V_S5

C822

C822 *0.1u/10V_4

*0.1u/10V_4

SB800

PCI/GPIO I/O

FLASH I/O

PCI EXPRESSSERIAL ATA

C562

10u/6.3V_8

C820

2.2u/6.3V_6

Part 3 of 5

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7

CORE S03.3V_S5 I/O

VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

VDDCR_11_GBE_S_1

GBE LAN

VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDCR_11_S_1 VDDCR_11_S_2

CORE S5

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

USB I/O

VDDPL_11_SYS_S

PLL CLKGEN I/O

VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

VDDIO_AZ_S

+3V

BLM18PG221SN1D(220_1.4A)_6

3

510mA131mA

N13 R15 N17 U13 U17 V12 V18 W12 W18

K28 K29 J28 K26 J21 J20 K21 J22

V1 M10

L7 L9

M6 P8

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

M8 A11

B11

M21 L22 F19 D6 L20

L85

+1.1V_VDDCR+3V_VDDIO_PCIGP

C566

C567

C552

0.1u/10V_4

C552 1u/6.3V_4

1u/6.3V_4

C518

C518 1u/6.3V_4

1u/6.3V_4

C510

C510 1u/6.3V_4

1u/6.3V_4

xx mA

0.1u/10V_4

+1.1V_VDDAN_CLK

C517

C526

0.1u/10V_4

SB820 without GBE: Connected to GND plane.

32mA

+3V_VDDIO

C528

C527

C527 *0.1u/10V_4

*0.1u/10V_4

2.2u/6.3V_6

113mA

+1.1V_VDDCR_11

xx mA

197mA

+3V_VDDPL +1.1V_VDDPL +3.3V_VDDAN_USB +3V_HWM_VDDAN

VDDXL_33

C535

C535 *0.1u/10V_4

*0.1u/10V_4

+VDDIO_AZ

+1.1V_USB_PHY_R

47mA 62mA 17mA 5mA

C547

2.2u/6.3V_6

C531

C531 *0.1u/10V_4

*0.1u/10V_4

C515

C515 1u/6.3V_4

1u/6.3V_4

L54

L54 BLM18PG221SN1D(220_1.4A)_6

BLM18PG221SN1D(220_1.4A)_6

+3V_VDDPL

C795

2.2u/6.3V_6

+3V3,5,6,7,10,11,12,13,14,16,18,20,25,26,27,29,30,32,33,34,35,37,38,39,40,41,42,43,44 +1.1V3,8,9,10,11,39 +3V_S512,13,16,26,27,29,32,35,37

+1.1V_S539

C565

C565 1u/6.3V_4

1u/6.3V_4

C512

C512 1u/6.3V_4

1u/6.3V_4

C802

C802 10u/6.3V_8

10u/6.3V_8

R282 0_6R282 0_6

C529

2.2u/6.3V_6

R285 0_6R285 0_6

C549

C549 10u/6.3V_8

10u/6.3V_8

L51

C801

C801 *10u/6.3V_8

*10u/6.3V_8

+3V_S5

+3V +1.1V +3V_S5 +1.1V_S5

2

800A50T_8

+1.1V

+3V_S5

+1.1V_S5

U36E

SB800

Y14 Y16

AB16

AC14

AE12 AE14

AF9 AF11 AF13 AF16

AG8

AH7 AH11 AH13 AH16

AJ7 AJ11 AJ13 AJ16

A9 B10 K11

B9 D10 D12 D14 D17

E9

F9 F12 F14 F16

C9 G11 F18

D9 H12 H14 H16 H18

J11

J19 K12 K14 K16 K18 H19

Y4

D8

M19

P21 P20

M22 M24 M26

P22 P24 P26 T20 T22 T24 V20

J23

Size Document Number Rev

Date: Sheet of

SB800

VSSIO_SATA_1 VSSIO_SATA_2 VSSIO_SATA_3 VSSIO_SATA_4 VSSIO_SATA_5 VSSIO_SATA_6 VSSIO_SATA_7 VSSIO_SATA_8 VSSIO_SATA_9 VSSIO_SATA_10 VSSIO_SATA_11 VSSIO_SATA_12 VSSIO_SATA_13 VSSIO_SATA_14 VSSIO_SATA_15 VSSIO_SATA_16 VSSIO_SATA_17 VSSIO_SATA_18 VSSIO_SATA_19

VSSIO_USB_1 VSSIO_USB_2 VSSIO_USB_3 VSSIO_USB_4 VSSIO_USB_5 VSSIO_USB_6 VSSIO_USB_7 VSSIO_USB_8 VSSIO_USB_9 VSSIO_USB_10 VSSIO_USB_11 VSSIO_USB_12 VSSIO_USB_13 VSSIO_USB_14 VSSIO_USB_15 VSSIO_USB_16 VSSIO_USB_17 VSSIO_USB_18 VSSIO_USB_19 VSSIO_USB_20 VSSIO_USB_21 VSSIO_USB_22 VSSIO_USB_23 VSSIO_USB_24 VSSIO_USB_25 VSSIO_USB_26 VSSIO_USB_27 VSSIO_USB_28

EFUSE VSSAN_HWM VSSXL

VSSIO_PCIECLK_1 VSSIO_PCIECLK_2 VSSIO_PCIECLK_3 VSSIO_PCIECLK_4 VSSIO_PCIECLK_5 VSSIO_PCIECLK_6 VSSIO_PCIECLK_7 VSSIO_PCIECLK_8 VSSIO_PCIECLK_9 VSSIO_PCIECLK_10 VSSIO_PCIECLK_11 VSSIO_PCIECLK_12 VSSIO_PCIECLK_13

Part 5 of 5

SB820M_A12

Quanta Computer Inc.

PROJECT :

SB820-PWR/DECOUPLING 4/4

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43

GROUND

VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

1

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

ZRA

1A

15 48Monday, March 29, 2010

1A

VDDQ--3.3V I/O power

R607 0_6R607 0_6

+3V

C575

C584

0.1u/10V_4

VDDPL_33_PCIE

C513

0.1u/10V_4

+3V_VDDPL_SATA

2.2u/6.3V_6

C548

0.1u/10V_4

+1.1V_VDDAN_USB

C574

2.2u/6.3V_6

C575

C585

0.1u/10V_4

R277

R277 *short_4

*short_4

43mA

C511

C509

2.2u/6.3V_6

*0.1u/10V_4

600mA

C534

C507

0.1u/10V_4

93mA

C554

C553

*0.1u/10V_4

567mA

C545

C546

1u/6.3V_4

658mA

C542

C550

1u/6.3V_4

xx mA

C563

0.1u/10V_4

L56 0_6L56 0_6

L86

BLM18PG221SN1D(220_1.4A)_6

4

C852

C851

10u/6.3V_8

L89

*10u/6.3V_8

10u/6.3V_8

+3V

C514

+3V

+1.1V_AVDD_SATA

10u/6.3V_8

10u/6.3V_8 R267 0_6R267 0_6

+3.3V_VDDAN_USB

+1.1V_S5

R303 0_6R303 0_6

R384 *0_6R384 *0_6

D D

L49

+1.1V

FBM2125 HM330-T(4A 0.015)_8

C C

L52

+1.1V

FBM2125 HM330-T(4A 0.015)_8

+3V_S5

BLM18PG221SN1D(220_1.4A)_6

For support USB wakeup-->3V_S5

B B

If the VDDIO_AZ_S power rail is configured for

1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

+3V_S5

+1.5VSUS

B-TEST 0202

A A

+3V_S5 +3V_HWM_VDDAN

L90

BLM18PG221SN1D(220_1.4A)_6

5

C852

10u/6.3V_8

L50

BLM18PG221SN1D(220_1.4A)_6

+1.1V_PCIE_VDDR

C524

C520

10u/6.3V_8

C543

C860

0.1u/10V_4

C520

1u/6.3V_4

L57

BLM18PG221SN1D(220_1.4A)_6

C544

0.1u/10V_4

C839

C839 10u/6.3V_8

10u/6.3V_8

L55

BLM18PG221SN1D(220_1.4A)_6

+VDDIO_AZ

C580

2.2u/6.3V_6

C859

2.2u/6.3V_6

C532

C532 10u/6.3V_8

10u/6.3V_8