QUANTA ZR7U Schematics

VER : 1A

5

4

3

2

1

ZR7U SYSTEM BLOCK DIAGRAM

CLK

SATA

Arrandale

rPGA 989

P4, 5, 6, 7

FDI

FDI

DMI

DMI(x4)

DMI

Dual Channel DDR III

IMC

800/1066 MHZ

Display

INT_CRT
INT_LVDS
INT_HDMI

DDRIII-SODIMM1
DDRIII-SODIMM2

P14,15

PS8101

LS

P17

USB-8

Int. MIC

CRT Con.

P16

LVDS/CCD/MIC
Con.

P16

HDMI Con.

P17

X'TAL

14.318MHz

Description

SLG8LV595

CLOCK
GENERATOR

SATA - HDD

SATA - ODD

P3

P21

P21

SATA 0

SATA 1

BOM P/N

D D

C C

Ibex Peak-M

USB Port

USB/B Con.
(USB Port x3)

Bluetooth Con.

Cardreader

B B

P24

Int. MIC

AU6437-GBL

Cardreader control

ALC271X-GRR

AUDIO CODEC

P26

P26

P26

P24

USB-1

USB-3/9/11

USB-4

USB-12

Azalia

P8

P22

BATTERY

USB

RTC

IHDA

PCH

P8, 9, 10, 11, 12, 13

LPC

LPC

NPCE781

EC

P37

PCI-E

SPI

X'TAL

32.768KHz

X'TAL 25MHz

W25Q32BVSSIG

SPI FLASH

PCIE-6

X'TAL

32.768KHz

MINI CARD
WLAN

MINI CARD
3G

AR8151

GIGA LAN

ISL88731A

Batery Charger

RT8206B

3V/5V

ISL62882

CPU core

P20

SIM Card FFC
Conn

P20 P20

P18

X'TAL
25MHz

UP6111AQDD

+1.05V/+1.1V_VTT

P30

RT8207A

+1.5V_SUS

P31

ISL62881HRZ-T

+VGFX_AXG

P32

RJ45

P18

P33

P34

P35

USB-13

PCIE-2
USB-10

PCIE-1

P8

RT9025-25PSP

+1.8V

Discharger

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

P27

Power
Board Con.

P25

W25X40B

SPI FLASH

MIC JACK

A A

BOM Option Table

Reference

3G@

*

Description

for 3G function
do not stuff

5

P23

HP/SPDIF

Speaker

P23

P23

K/B Con.

4

SW/B Touch Pad

P25

EM-6781-T3

P29

HALL SENSOR

3

Board Con.

P26

P27

Fan Driver

(PWM Type) P27

2

Thermal Protection

P36

P36

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Block Diagram

Block Diagram

Block Diagram

ZR7U

ZR7U

ZR7U

1

P36

1A

1A

1 38Tuesday, April 20, 2010

1 38Tuesday, April 20, 2010

1 38Tuesday, April 20, 2010

1A

1

2

3

4

5

6

7

8

Power States

POWER PLANE

VIN

A A

+VCCRTC
+3VPCU
+5VPCU
+15V

VOLTAGE

+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V

+3.3V
+5V_S5
+5V
+3V

B B

+1.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG
+1.8V
+1.5V
+1.05V
+VCC_CORE

C C

LCDVCC

+5V

+5V

+3.3V

+1.5V

+0.75V

variation

+1.8V

+1.5V

+1.05V

variation

+3.3V

DESCRIPTION

RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
PCH/GPU/Peripheral component POWER
CPU/SODIMM CORE POWER
SODIMM Termination POWER

CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER
PCH CORE POWER
CPU CORE POWER
LCD POWER

CONTROL
SIGNAL

ALWAYSMAIN POWER
ALWAYS
ALWAYS
ALWAYS

S5_ON+3V_S5
S5_ON
MAINON
MAINON
SUSON
MAINON
GFX_ONInternal GPU POWER
MAINON
MAINON
MAINON
VRON
LVDS_VDDEN

ACTIVE IN

ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
S0
S0

CPU
CORE PWR

H_PROCHOT#

H/W Throttling

NTC
Thermal
Protection

CPU

PCH

SM-Bus

EC

PM_THRMTRIP#

SML1ALERT#

CPUFAN#

WIRE-AND

SYS_SHDN#

3V/5 V
SYS PWR

FANFAN Driver

D D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

PROJECT :

7

ZR7U

ZR7U

ZR7U

2 38Tuesday, April 20, 2010

2 38Tuesday, April 20, 2010

2 38Tuesday, April 20, 2010

1A

1A

1A

8

5

4

3

2

1

D D

L29 595@PBY160808T-181Y-N/2A_6L29 595@PBY160808T-181Y-N/2A_6

+1.5V

C406

C406
.1u/16V_4

.1u/16V_4

L30 BLM18AG601SN1D/200mA_6L30 BLM18AG601SN1D/200mA_6

+3V

C423

C423

4.7u/10V_8

4.7u/10V_8

C C

C407

C407
.1u/16V_4

.1u/16V_4

20mil

C417

C417
.1u/16V_4

.1u/16V_4

150mA(30mil)

+1.5V_CLK

C418

C418
.1u/16V_4

.1u/16V_4

+3V_CLK

C419

C419
.1u/16V_4

.1u/16V_4

CLK_ICH_14M(10)

C414 33p/50V_4C414 33p/50V_4

C409 33p/50V_4C409 33p/50V_4

R361

R361

*585@0_6

*585@0_6

R357 33_4R357 33_4

IDT: AL003197002 (ICS9LVS3197BKLFT)

altek: AL000890000 (RTM890N-632-GRT)

Re

Y4

Y4

14.318MHz

14.318MHz

CLK_SDATA
CLK_SCLK

CPU_SEL

XTAL_IN
XTAL_OUT

U18

U18

1

VDD_DOT

17

VDD_SRC

24

VDD_CPU

5

VDD_27

29

VDD_REF

31

SDA

32

SCL

30

REF_0/CPU_SEL

28

XTAL_IN

27

XTAL_OUT

2

VSS_DOT

8

VSS_27

9

VSS_SATA

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

33

GND

SLG8LV595V

SLG8LV595V

VDD_SRC_I/O
VDD_CPU_I/O

DOT_96

DOT_96#

27M

27M_SS

SRC_1/SATA

SRC_1#/SATA#

SRC_2

SRC_2#

*CPU_STOP#

CPU_1

CPU_1#

CPU_0

CPU_0#

CKPWRGD/PD#

15
18

3
4

6
7

10
11
13
14

16
20

19
23
22

25

+VDDIO_CLK

C405

C405
.1u/16V_4

.1u/16V_4

TP58TP58
TP59TP59

R348 *10K_4R348 *10K_4

TP54TP54
TP56TP56

CK_PWRGD_R

80mA(20mil)

C412

C412

C404

C404

.1u/16V_4

.1u/16V_4

10u/Y5V_8

10u/Y5V_8

CLK_BUF_DREFCLK (10)
CLK_BUF_DREFCLK# (10)

CLK_BUF_PCIE_3GPLL (10)
CLK_BUF_PCIE_3GPLL# (10)
CLK_BUF_DREFSSCLK (10)
CLK_BUF_DREFSSCLK# (10)

+3V

CLK_BUF_BCLK (10)
CLK_BUF_BCLK# (10)

L27 PBY160808T-181Y-N/2A_6L27 PBY160808T-181Y-N/2A_6

C408

C408
10u/Y5V_8

10u/Y5V_8

Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.

+1.05V

Silego: AL000595000 (SLG8LV595VTR)

B B

+1.05V

R356

R356
*10K_4

*10K_4

R359

R359
10K_4

10K_4

CPU_SEL

C421

C421
*10p/50V_4

*10p/50V_4

SMBusCPU_CLK select

ICH_SMBDATA(10)

+3V

CLK Enable

R364

2

3

Q25

Q25
2N7002K

2N7002K

+3V

R364

4.7K_4

4.7K_4

CLK_SDATA

1

CLK_SDATA (14,15,20)

VR_PWRGD_CK505#(32)

+3V

R346

R346
1K_4

1K_4

CK_PWRGD_R

3

Q23

Q23
2N7002K

2N7002K

R347

2

R347
100K_4

100K_4

R365

0 1

A A

CPU_SEL

CPU0/1=133MHz
(default)

5

CPU0/1=100MHz

ICH_SMBCLK(10)

4

2

3

Q24

Q24
2N7002K

2N7002K

R365

4.7K_4

4.7K_4

CLK_SCLK

1

3

CLK_SCLK (14,15,20)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Clock Generator

Clock Generator

Clock Generator

Date: Sheet of

Date: Sheet of

2

Date: Sheet

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZR7U

ZR7U

ZR7U

3 38Tuesday, April 20, 2010

3 38Tuesday, April 20, 2010

3 38Tuesday, April 20, 2010

1A

1A

1A

of

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U16B

R166

R166
750/F_4

750/F_4

AT23
AT24

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

G16

U16B

COMP3
COMP2
COMP1
COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

Arrandale_rPGA

Arrandale_rPGA

MISC THERMAL

MISC THERMAL

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TCK
TMS

TDI

TDO

A16
B16

AR30
AT30

E16
D16

A18
A17

F6
AL1

AM1
AN1

AN15
AP15

AT28
AP27

AN28
AP28
AT27

AT29
AR27
AR29
AP29

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

T28T28
T31T31

SM_RCOMP_ 0
SM_RCOMP_ 1
SM_RCOMP_ 2

XDP_PRDY#
XDP_PREQ #

XDP_TCLK
XDP_TRST#
XDP_TDI_R

XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

CLK_CPU_BCLK (11)
CLK_CPU_BCLK# (11)

CLK_PCIE_3GPLL (10)
CLK_PCIE_3GPLL# (10)

DPLL_REF_SSCLK (10)
DPLL_REF_SSCLK# (10)

CPU_DDR3_DRAMRST# (28)

R147 100/F_4R147 10 0/F_4
R149 24.9/F_4R149 24.9 /F_4
R157 130/F_4R1 57 130/F_4
R174 10K_4R174 10K_4

R165 10K_4R165 10K_4

T25T25

XDP_DBRST# (8)

T24T24
T27T27
T23T23
T29T29
T34T34
T30T30
T33T33
T35T35

+1.05V

PM_EXTTS#0 (14)
PM_EXTTS#1 (15)

+1.05V

U16A

U16A

DMI_TXN0(8)
DMI_TXN1(8)
DMI_TXN2(8)
DMI_TXN3(8)

D D

DMI_TXP0(8)
DMI_TXP1(8)
DMI_TXP2(8)
DMI_TXP3(8)

DMI_RXN0(8)
DMI_RXN1(8)
DMI_RXN2(8)
DMI_RXN3(8)

DMI_RXP0(8)
DMI_RXP1(8)
DMI_RXP2(8)
DMI_RXP3(8)

FDI_TXN0(8)
FDI_TXN1(8)
FDI_TXN2(8)
FDI_TXN3(8)
FDI_TXN4(8)
FDI_TXN5(8)
FDI_TXN6(8)
FDI_TXN7(8)

FDI_TXP0(8)
FDI_TXP1(8)
FDI_TXP2(8)
FDI_TXP3(8)
FDI_TXP4(8)

C C

FDI_TXP5(8)
FDI_TXP6(8)
FDI_TXP7(8)

FDI_FSYNC0(8)
FDI_FSYNC1(8)

FDI_INT(8)

FDI_LSYNC0(8)
FDI_LSYNC1(8)

B B

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17
F18

D17

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT
FDI_LSYNC[0]

FDI_LSYNC[1]

Arrandale_rPGA

Arrandale_rPGA

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS
PEG_RX#[0]

PEG_RX#[1]
PEG_RX#[2]

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PEG_ICOMP

PEG_BIAS

R309 49.9/F_4R309 49.9/F_4

R308 750/F_4R308 750/F_4

H_PROCHOT#(32)

PM_THRMTRIP#(11)

PM_SYNC(8)

H_PWRGOOD(11)

PM_DRAM_P WRGD(8,28)

PLTRST#(10,18,20,24,29)

B26
A26
B27
A25

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

H_PECI(11)

R319 20/F_4R319 20/F_4
R320 20/F_4R320 20/F_4
R102 49.9/F_4R102 49.9/F_4
R323 49.9/F_4R323 49.9/F_4

R171 1.5K/F_4R171 1.5K/F_4

H_COMP3
H_COMP2
H_COMP1
H_COMP0

T32T32

H_CATERR#

H_PROCHOT#

PM_THRMTRIP#

H_CPURST# XDP_TMS

PM_DRAM_P WRGD

H_VTTPWRGD

T26T26

CPU_PLTRST#

VTT PWR_GoodThermaltrip protect

XDP_TDO

+1.05V

3

Q12

Q12

PM_THRMTRIP#

2

1

2

1 3

R185

R185
1K_4

1K_4

FDV301N

FDV301N

Q10

Q10
MMBT3904

MMBT3904

MPWROK(29)

SYS_SHDN# (31,36)

DELAY_VR_ PWRGOO D(8,3 2)

A A

PM_THRMTRIP#(11)

pull-up 56ohm close to PCH

5

4

+3V

C214

C214
.1u/10V_ 4

.1u/10V_ 4

R173

3 5

4

U5
TC7SH08FUU5TC7SH08FU

R173

2K/F_4

2K/F_4

3

H_VTTPWRGD

R164

R164
1K_4

1K_4

2
1

+1.5V_CPU VDDQ

R168

R168

1.1K/F_4

1.1K/F_4

PM_DRAM_P WRGD

R167

R167

3.01K/F_4

3.01K/F_4

H_CATERR#
H_PROCHOT#
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ #

XDP_TCLK
XDP_TRST#

R329 51/F_4R329 51/F_4
R143 49.9/F_4R143 49.9/F_4
R322 68_4R322 68_4

R175 *68_4R175 *68_4
R177 *5 1_4R177 *5 1_4
R342 *5 1_4R342 *5 1_4
R331 *5 1_4R331 *5 1_4

R169 *5 1_4R169 *5 1_4
R326 51/F_4R326 51/F_4

Use a voltage divider with VDDQ

1.5V) rail (ON in S3) and

(
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.

+1.05V

2

JTAG MAPPINGProcessor pull-up

XDP_TDI_R XDP_TDI
XDP_TDO_M

XDP_TDI_M
XDP_TDO_R

R339 0_4R339 0_4

Ra

R334 *0_4R334 *0_4

Rb

R335

R335

Rc

0_4

0_4

R336 *0_4R336 *0_4

Rd

R330 0_4R330 0_4

Re

Scan Chain
(Default)

CPU Only

GMCH Only

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

AUBURNDA 1/4

AUBURNDA 1/4

AUBURNDA 1/4

Date: Sheet of

Date: Sheet of

Date: Sheet of

XDP_TDO

STUFF -> Ra, Rc, Re
NO STUFF -> Rb, Rd

STUFF -> Ra, Rb
NO STUFF -> Rc, Rd, Re

STUFF -> Rd, Re
NO STUFF -> Ra, Rb, Rc

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZR7U

ZR7U

ZR7U

1A

1A

4 38Tuesday, April 20, 2010

4 38Tuesday, April 20, 2010

4 38Tuesday, April 20, 2010

1A

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U16C

U16C

M_A_DQ[63:0](14)

D D

C C

B B

M_A_BS#0(14)
M_A_BS#1(14)
M_A_BS#2(14)

M_A_CAS#(14)
M_A_RAS#(14)
M_A_WE#(14)

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

C10

D10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AJ10
AL10

AK12

AK8

AK11

AN8
AM10
AR11

AL11

AM9

AN9

AT11

AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14

AP14

AC3
AB2

AE1
AB3
AE9

A10

SA_DQ[0]
SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]
SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]
SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]
SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39]
SA_DQ[40]

AJ9

SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]

AL7

SA_DQ[45]
SA_DQ[46]

AL8

SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]

U7

SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4

SA_CK[0]

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLK0 (14)
M_A_CLK0# (14)
M_A_CKE0 (14)

M_A_CLK1 (14)
M_A_CLK1# (14)
M_A_CKE1 (14)

M_A_CS#0 (14)
M_A_CS#1 (14)

M_A_ODT0 (14)
M_A_ODT1 (14)

M_A_DM[7:0] (14)

M_A_DQS#[7:0] (14)

M_A_DQS[7:0] (14)

M_A_A[15:0] (14)

3

M_B_DQ[63:0](15)

M_B_BS#0(15)
M_B_BS#1(15)
M_B_BS#2(15)

M_B_CAS#(15)
M_B_RAS#(15)
M_B_WE#(15)

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AG1

AG4
AG3

AH4

AM6
AN2

AM4
AM3

AN5
AN6

AN4
AN3

AN7

AR10
AT10

AC5
AC6

AF3

AJ3

AK1

AJ4

AK3
AK4

AK5
AK2

AP3
AT4

AT5
AT6

AP6
AP8
AT9
AT7
AP9

AB1

B5
A5

C3

B3
E4
A6

A4
C4
D1
D2

F2

F1
C2

F5

F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5

K2

L3
M1

K5

K4
M4
N5

W5
R7

Y7

U16D

U16D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

2

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

1

M_B_CLK0 (15)
M_B_CLK0# (15)
M_B_CKE0 (15)

M_B_CLK1 (15)
M_B_CLK1# (15)
M_B_CKE1 (15)

M_B_CS#0 (15)
M_B_CS#1 (15)

M_B_ODT0 (15)
M_B_ODT1 (15)

M_B_DQS#[7:0] (15)

M_B_DQS[7:0] (15)

M_B_DM[7:0] (15)

M_B_A[15:0] (15)

Arrandale_rPGA

Arrandale_rPGA

Arrandale_rPGA

Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.

A A

5

4

3

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.

Arrandale_rPGA

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AUBURNDA 2/4

AUBURNDA 2/4

AUBURNDA 2/4

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

ZR7U

ZR7U

ZR7U

5 38Tuesday, April 20, 2010

5 38Tuesday, April 20, 2010

5 38Tuesday, April 20, 2010

1

1A

1A

1A

5

U16F

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

U16F

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

Arrandale_rPGA

Arrandale_rPGA

CPU Core Power

ARD:48A
CFD:52A

C162 22U/6.3V_8C162 22U/6.3V_8
C383 22U/6.3V_8C383 22U/6.3V_8
C150 22U/6.3V_8C150 22U/6.3V_8

D D

C C

B B

A A

C116 22U/6.3V_8C116 22U/6.3V_8
C371 22U/6.3V_8C371 22U/6.3V_8
C375 22U/6.3V_8C375 22U/6.3V_8
C372 22U/6.3V_8C372 22U/6.3V_8
C136 22U/6.3V_8C136 22U/6.3V_8
C168 22U/6.3V_8C168 22U/6.3V_8
C366 22U/6.3V_8C366 22U/6.3V_8
C117 22U/6.3V_8C117 22U/6.3V_8
C183 22U/6.3V_8C183 22U/6.3V_8
C160 10U/6.3V_8C160 10U/6.3V_8
C154 10U/6.3V_8C154 10U/6.3V_8
C141 10U/6.3V_8C141 10U/6.3V_8
C374 10U/6.3V_8C374 10U/6.3V_8
C365 10U/6.3V_8C365 10U/6.3V_8
C380 10U/6.3V_8C380 10U/6.3V_8
C377 10U/6.3V_8C377 10U/6.3V_8
C159 10U/6.3V_8C159 10U/6.3V_8
C368 10U/6.3V_8C368 10U/6.3V_8
C171 10U/6.3V_8C171 10U/6.3V_8
C172 10U/6.3V_8C172 10U/6.3V_8
C134 10U/6.3V_8C134 10U/6.3V_8
C369 10U/6.3V_8C369 10U/6.3V_8
C142 10U/6.3V_8C142 10U/6.3V_8
C137 10U/6.3V_8C137 10U/6.3V_8
C381 10U/6.3V_8C381 10U/6.3V_8
C166 .1u/10V_4C166 .1u/10V_4
C125 .1u/10V_4C125 .1u/10V_4

C130 330u/2V_7343

C130 330u/2V_7343
C155 330u/2V_7343

C155 330u/2V_7343

+VCC_CORE

+

+

+

+

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

4

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VTT_SELECT

VSS_SENSE_VTT

SENSE LINES

SENSE LINES

4

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

H_PSI#

AN33

PSI#

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35

H_DPRSLPVR

AM34

H_VTTVID1

G15

H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V

AN35

AJ34
AJ35

VTT_SENSE

B15

VSS_SENSE_VTT

A15

C376 10U/6.3V_8C376 10U/6.3V_8
C373 10U/6.3V_8C373 10U/6.3V_8
C361 10U/6.3V_8C361 10U/6.3V_8
C177 10U/6.3V_8C177 10U/6.3V_8
C379 10U/6.3V_8C379 10U/6.3V_8
C359 10U/6.3V_8C359 10U/6.3V_8
C360 10U/6.3V_8C360 10U/6.3V_8
C382 22U/6.3V_8C382 22U/6.3V_8
C344 22U/6.3V_8C344 22U/6.3V_8
C145 22U/6.3V_8C145 22U/6.3V_8

C123

C123

+

+

330u/2V_7343

330u/2V_7343

C107 22U/6.3V_8C107 22U/6.3V_8
C108 22U/6.3V_8C108 22U/6.3V_8

R145 100/F_4R145 100/F_4

R146 100/F_4R146 100/F_4

Intel was suggests Add Test
Point Recommendations for
Arrandale BGA Processors.

VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V

18A

+1.05V

+1.05V

H_PSI# (32)

H_VID0 (32)
H_VID1 (32)
H_VID2 (32)
H_VID3 (32)
H_VID4 (32)
H_VID5 (32)
H_VID6 (32)
H_DPRSLPVR (32)

T41T41

I_MON (32)

+VCC_CORE

VCCSENSE (32)
VSSSENSE (32)

T39T39
T40T40

3

22A

+VGFX_AXG

+

+

C390

C390
*330u/2V_7343

*330u/2V_7343

+

+

C389

C389
330u/2V_7343

330u/2V_7343

+1.05V

C161

C161
22u/6.3V_8

22u/6.3V_8

3

C174

C174

C173

C173

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

C176

C367

C367
22u/6.3V_8

22u/6.3V_8

C109

C109
22u/6.3V_8

22u/6.3V_8

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR
H_PSI#

C176
10u/6.3V_8

10u/6.3V_8

C152

C152
22u/6.3V_8

22u/6.3V_8

R340 1K_4R340 1K_4
R341 *1K_4R341 *1K_4
R343 1K_4R343 1K_4
R344 *1K_4R344 *1K_4
R181 1K_4R181 1K_4
R180 *1K_4R180 *1K_4
R337 *1K_4R337 *1K_4
R338 1K_4R338 1K_4
R179 *1K_4R179 *1K_4
R178 1K_4R178 1K_4
R327 1K_4R327 1K_4
R324 *1K_4R324 *1K_4
R332 *1K_4R332 *1K_4
R333 1K_4R333 1K_4
R184 1K_4R184 1K_4
R183 *1K_4R183 *1K_4
R328 *1K_4R328 *1K_4
R325 1K_4R325 1K_4

C175

C175
10u/6.3V_8

10u/6.3V_8

C110

C110
22u/6.3V_8

22u/6.3V_8

C370

C370
22u/6.3V_8

22u/6.3V_8

1

1

1

0

0

1

0

1

0

Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF

U16G

U16G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Arrandale_rPGA

Arrandale_rPGA

HFM_VID : Max 1.4V
LFM_VID : Min 0.65V

2

2

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

+1.05V

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

GRAPHICS VIDs

VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17

POWER

POWER

VDDQ18

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65

1.1V1.8V

1.1V1.8V

VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

1

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

R321 4.7K_4R321 4.7K_4

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10

C358 10U/6.3V_8C358 10U/6.3V_8

L10

C364 10U/6.3V_8C364 10U/6.3V_8

K10

J22

C363 22U/6.3V_8C363 22U/6.3V_8

J20

C362 22U/6.3V_8C362 22U/6.3V_8

J18
H21
H20
H19

L26
L27

C111 22U/6.3V_8C111 22U/6.3V_8

M26

C112 4.7U/6.3V_6C112 4.7U/6.3V_6
C83 2.2U/6.3V_6C83 2.2U/6.3V_6
C85 1U/6.3V_4C85 1U/6.3V_4
C84 1U/6.3V_4C84 1U/6.3V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AUBURNDA 3/4 (PWR)

AUBURNDA 3/4 (PWR)

AUBURNDA 3/4 (PWR)

Date: Sheet of

Date: Sheet of

Date: Sheet

C186

C186
1U/6.3V_4

1U/6.3V_4

C187

C187
1U/6.3V_4

1U/6.3V_4

VCC_AXG_SENSE (35)
VSS_AXG_SENSE (35)

GFX_VID0 (35)
GFX_VID1 (35)
GFX_VID2 (35)
GFX_VID3 (35)
GFX_VID4 (35)
GFX_VID5 (35)
GFX_VID6 (35)

GFX_ON (35)
GFX_DPRSLPVR (35)
GFX_IMON (35)

ARD:3A

FD:6A

C

C188

C124

C124
1U/6.3V_4

1U/6.3V_4

C129

C129
22U/6.3V_8

22U/6.3V_8

C188
1U/6.3V_4

1U/6.3V_4

ZR7U

ZR7U

ZR7U

C113

C113
1U/6.3V_4

1U/6.3V_4

C179

C179
22U/6.3V_8

22U/6.3V_8

+1.05V

0.6A

+1.8V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

+

+

C128

C128
330u/2V_7343

330u/2V_7343

6 38Tuesday, April 20, 2010

6 38Tuesday, April 20, 2010

6 38Tuesday, April 20, 2010

+1.5V_CPUVDDQ

of

1A

1A

1A

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U16E

U16H

U16H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

D D

C C

B B

AR12

AR9
AR6

AR3
AP20
AP17
AP13
AP10

AP7

AP4

AP2
AN34
AN31
AN23
AN20
AN17

AM29
AM27
AM25
AM20
AM17
AM14
AM11

AM8

AM5

AM2
AL34
AL31
AL23
AL20
AL17
AL12

AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AH9

AH6

AH3

AG10

AF8

AF4

AF2
AE35

AL9
AL6
AL3

AJ8
AJ5
AJ2

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

Arrandale_rPGA

Arrandale_rPGA

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

U16I

U16I

K27

K9
K6

K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11

H8

H5

H2
G34
G31
G20

G9

G6

G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11

E8

E5

E2
D33
D30
D26

D9

D6

D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11

B8

B6

B4
A29
A27
A23

A9

Arrandale_rPGA

Arrandale_rPGA

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

TP25TP25
TP23TP23
TP24TP24

TP21TP21
TP22TP22

TP40TP40
TP41TP41

CFG0

CFG3
CFG4

CFG7

Processor Strapping

CFG0

1 0

(PCI-Epress
Configuration Select)

CFG3
(PCI-Epress Static
Lane Reversal)

A A

5

CFG4
(Embended
Display Port Presence)

The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter
specifications.
Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA
and BGA components. This pull down resistor should be removed when this issue is fixed.

Single PEG

Bifurcation enabled

Normal Operation Lane Numbers Reversed

Disabled; No Physical Display Port
attached to Embedded Diplay Port

4

Enabled; An external Display port
device is connected to the Embedded
Display port

3

DEFAULT

No use

No use

No use

U16E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Arrandale_rPGA

Arrandale_rPGA

CFG0

R172 *3.01K/F_4R172 *3.01K/F_4

CFG3

R156 *3.01K/F_4R156 *3.01K/F_4

CFG4

R148 *3.01K/F_4R148 *3.01K/F_4

CFG7

R158 *3.01K/F_4R158 *3.01K/F_4

AJ13

RSVD32

AJ12

RSVD33

AH25

RSVD34

AK26

RSVD35

AL26

RSVD36

RSVD_NCTF_37

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD_TP_59
RSVD_TP_60

RESERVED

RESERVED

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

2

AR2
AJ26

RSVD38

AJ27

RSVD39

AP1
AT2

AT3
AR1

AL28

RSVD45

AL29

RSVD46

AP30

RSVD47

AP32

RSVD48

AL27

RSVD49

AT31

RSVD50

AT32

RSVD51

AP33

RSVD52

AR33

RSVD53

AT33
AT34
AP35
AR35
AR32

RSVD58

E15
F15
A2

KEY

D15

RSVD62

C15

RSVD63

AJ15

RSVD64
RSVD65

VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

TP27TP27

AH15

TP28TP28

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

TP26TP26

AP34 can be NC on CRB; EDS/DG suggestion to GND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

AUBURNDA 4/4

AUBURNDA 4/4

AUBURNDA 4/4

1

ZR7U

ZR7U

ZR7U

7 38Tuesday, April 20, 2010

7 38Tuesday, April 20, 2010

7 38Tuesday, April 20, 2010

1A

1A

1A

PCH1(CLG)

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

U10C

U10C

ACIN_R

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_R1P0

IbexPeak-M_R1P0

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

DMI_RXN0(4)

+1.05V

XDP_DBRST#(4)

ICH_RSMRST#(29)

DNBSWON#(29)

PCH_ACIN(29)

DMI_RXN1(4)
DMI_RXN2(4)
DMI_RXN3(4)

DMI_RXP0(4)
DMI_RXP1(4)
DMI_RXP2(4)
DMI_RXP3(4)

DMI_TXN0(4)
DMI_TXN1(4)
DMI_TXN2(4)
DMI_TXN3(4)

DMI_TXP0(4)
DMI_TXP1(4)
DMI_TXP2(4)
DMI_TXP3(4)

R44 49.9/F_4R44 49.9/F_4

R276 *0_4R276 *0_4

DMI_COMP

XDP_DBRST#

SYS_PWROK

RSV_ICH_LAN_RST#

ICH_RSMRST#

SUS_PWR_ACK_R

PM_BATLOW#

PM_RI#

D D

C C

PM_DRAM_PWRGD(4,28)

B B

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14
BF13
BH13
BJ12
BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCIE_WAKE#

CLKRUN#

SUS_STAT#

SLP_S5#_R

SLP_M#

PM_SLP_LAN#

FDI_TXN0 (4)
FDI_TXN1 (4)
FDI_TXN2 (4)
FDI_TXN3 (4)
FDI_TXN4 (4)
FDI_TXN5 (4)
FDI_TXN6 (4)
FDI_TXN7 (4)

FDI_TXP0 (4)
FDI_TXP1 (4)
FDI_TXP2 (4)
FDI_TXP3 (4)
FDI_TXP4 (4)
FDI_TXP5 (4)
FDI_TXP6 (4)
FDI_TXP7 (4)

FDI_INT (4)
FDI_FSYNC0 (4)
FDI_FSYNC1 (4)
FDI_LSYNC0 (4)
FDI_LSYNC1 (4)

R85 *0_4R85 *0_4

TP11TP11

TP18TP18

TP36TP36

PCIE_WAKE# (18,20)

CLKRUN# (29)

ICH_SUSCLK (29)

SUSC# (29)

SUSB# (29)

PM_SYNC (4)

INT_CRT_BLU(16)
INT_CRT_GRN(16)
INT_CRT_RED(16)

INT_CRT_DDCCLK(16)
INT_CRT_DDCDAT(16)

INT_LVDS_EDIDCLK(16)
INT_LVDS_EDIDDATA(16)

R14 150/F_4R14 150/F_4
R13 150/F_4R13 150/F_4
R12 150/F_4R12 150/F_4

INT_HSYNC(16)

INT_VSYNC(16)

INT_LVDS_BLON(16)

INT_LVDS_DIGON(16)

INT_LVDS_BRIGHT(16)

+3V

R32 2.37K/F_4R32 2.37K/F_4

INT_TXLCLKOUT-(16)

INT_TXLCLKOUT+(16)

INT_TXLOUT0-(16)

INT_TXLOUT1-(16)

INT_TXLOUT2-(16)

INT_TXLOUT0+(16)
INT_TXLOUT1+(16)
INT_TXLOUT2+(16)

R place close to PCH

R235 33_4R235 33_4
R234 33_4R234 33_4

R27 10K_4R27 10K_4
R25 10K_4R25 10K_4

INT_TXLCLKOUT­INT_TXLCLKOUT+

INT_TXLOUT0­INT_TXLOUT1­INT_TXLOUT2-

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

CRT_HSYNC
CRT_VSYNC

DAC_IREF

R18

R18
1K/F_4

1K/F_4

IBEX PEAK-M (LVDS,DDI)

U10D

U10D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49

AU52

AT53
AY51

AT48

AU50

AT51

AA52
AB53

AD53

AD48

AB51

V51
V53

Y53
Y51

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

IbexPeak-M_R1P0

IbexPeak-M_R1P0

LVDS

LVDS

Digital Display Interface

Digital Display Interface

CRT

CRT

LVDS_IBG

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R

SDVO_CTRLCLK (17)
SDVO_CTRLDAT (17)

C182 .1u/10V_4C182 .1u/10V_4
C169 .1u/10V_4C169 .1u/10V_4
C157 .1u/10V_4C157 .1u/10V_4
C158 .1u/10V_4C158 .1u/10V_4
C189 .1u/10V_4C189 .1u/10V_4
C185 .1u/10V_4C185 .1u/10V_4
C148 .1u/10V_4C148 .1u/10V_4
C149 .1u/10V_4C149 .1u/10V_4

INT_HDMI_HPD (17)

INT_HDMITX2N (17)
INT_HDMITX2P (17)
INT_HDMITX1N (17)
INT_HDMITX1P (17)
INT_HDMITX0N (17)
INT_HDMITX0P (17)
INT_HDMICLK- (17)
INT_HDMICLK+ (17)

PCH Pull-high/low(CLG)

+3V

CLKRUN#

A A

XDP_DBRST#

ICH_RSMRST#
RSV_ICH_LAN_RST#
SYS_PWROK ACIN_R

R286 8.2K_4R286 8.2K_4
R77 1K_4R77 1K_4

R252 10K_4R252 10K_4
R262 10K_4R262 10K_4
R80 10K_4R80 10K_4

5

PM_RI#
PM_BATLOW#
PCIE_WAKE#
PM_SLP_LAN#
SUS_PWR_ACK_R

R51 10K_4R51 10K_4
R270 10K_4R270 10K_4
R81 10K_4R81 10K_4
R63 *10K_4R63 *10K_4
R300 10K_4R300 10K_4
R277 10K_4R277 10K_4

+3V_S5

4

System PWR_OK(CLG)

C323 *.1u/10V_4C323 *.1u/10V_4

SYS_PWROK

3

U2

U2

TC7SH08FU

TC7SH08FU

+3V_S5

DELAY_VR_PWRGOOD need PU 2K to +3V.
PU at power side

53

1

4

2

R65

R65
100K_4

100K_4

DELAY_VR_PWRGOOD (4,32)

PWROK_EC (29)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZR7U

ZR7U

ZR7U

1A

1A

8 38Tuesday, April 20, 2010

8 38Tuesday, April 20, 2010

1

8 38Tuesday, April 20, 2010

1A

5

RTC Circuitry(RTC)

+VCCRTC

D15

+3VPCU

VCCRTC_1

20MIL

D D

R251

R251
1K_4

1K_4

VCCRTC_2

20MIL

CN11

CN11

1

1

2

2

RTC_CONN

RTC_CONN

D15

20mils

BAT54C

BAT54C C314

20MIL

1 3

Q15

Q15

*MMBT3904

*MMBT3904

2

R253 20K/F_4R253 20K/F_4

30mils

R249 20K/F_4R249 20K/F_4

C313

C313
1u/6.3V_4

1u/6.3V_4

RTC_N01

RTC_N03

R237 *20K_6R237 *20K_6

C314
1u/6.3V_4

1u/6.3V_4

C312

C312
1u/6.3V_4

1u/6.3V_4

R230

R230
*68.1K/F_4

*68.1K/F_4

R228

R228
*150K/F_6

*150K/F_6

RTC_RST#

12

J2

J2

*SHORT_PAD

*SHORT_PAD

SRTC_RST#

12

J1

J1

*SHORT_PAD

*SHORT_PAD

+5V_S5

HDA Bus(CLG)

VDD

VSS

8

R289 4.7K_4R289 4.7K_4

7
4

ACZ_SYNCACZ_SYNC

ACZ_RST#

ACZ_SDOUTACZ_SDOUT

ACZ_BIT_CLKACZ_BIT_CLK

+3V

C326

C326
.1u/10V_4

.1u/10V_4

C C

B B

PCH SPI(CLG)

A A

PCH_AZ_CODEC_SYNC(22)

PCH_AZ_CODEC_RST#(22)

PCH_AZ_CODEC_SDOUT(22)

PCH_AZ_CODEC_BITCLK(22)

Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of
R should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.

SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R

C329

C329
*22p/50V_4

*22p/50V_4

R299 4.7K_4R299 4.7K_4

+3V

5

R245 33_4R245 33_4

R244 33_4R244 33_4

R246 33_4R246 33_4

R243 33_4R243 33_4

C310

C310
*27p/50V_4

*27p/50V_4

U11

U11

1

CE#

6

SCK

5

SI

2

SO

HOLD#

3

WP#

W25Q32BVSSIG

W25Q32BVSSIG

4

PCH2(CLG)

PCH Strap Table

4

HDA_SYNC (PCH strap pin)

Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

Pin Name S

SPKR

INIT3_3V

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GNT0#

GNT2# / GPIO53

NV_ALE

NV_CLE

HDA_DOCK_EN#/GPIO33

SPI_MOSI

HDA_SDO
GPIO8
GPIO27
HDA_SYNC

GPIO15

No reboot mode setting PWROK

Reserved

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

ESI strap (Server only)

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm)

DMI Termination voltage

Flash Descriptor Security

iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K)

Reserved
Reserved
On-die PLL Voltage Regulator

On-die PLL PWR supply select RSMRST#

Reserved RSMRST#

C315 15p/50V_4C315 15p/50V_4

C317 15p/50V_4C317 15p/50V_4

R250 1M_4R250 1M_4

+VCCRTC

PCH_AZ_CODEC_SDIN0(22)

R42 *10K_4R42 *10K_4

+3V_S5

R273 *10K_4R273 *10K_4

+3VPCU

trap description

3

23

Y3

32.768KHZY332.768KHZ

4 1

SPKR(22)

TP35TP35
TP34TP34
TP37TP37
TP38TP38
TP39TP39

Sampled

PWROK

PWROKTop-Block Swap Override

PWROK

PWROK

PWROK

PWROK

PWROK

RSMRST#
RSMRST#
RSMRST# 0 = Disable

3

IBEX PEAK-M (HDA,JTAG,SATA)

R255

R255
10M_4

10M_4

RTC_X1

B13

RTC_X2

D13

RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN

ACZ_BIT_CLK
ACZ_SYNC
SPKR
ACZ_RST#

ACZ_SDOUT

HDA_DOCK_EN#
PCH_GPIO13PCH_GPIO13

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#

SPI_CLK_R
SPI_CS0#_R
SPI_CS1#

SPI_SI_R
SPI_SO_R

C14
D17
A16
A14

A30
D29

P1

C30

G30
F30
E32
F32

B29

H32

J30

M3

K3
K1
J2
J4

BA2
AV3
AY3

AY1
AV1

0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode

1 = Default (weak pull-up 20K)

Should not be pull-down

0 = "top-block swap" mode
1 = Default (weak pull-up 20K)

Should not be pull-down
(weak pull-up 20K)

weak pull-down 32ohm
Set to Vcc when LOW

0 = Override
1 = Default (weak pull-up 20K)

1 = Enable

Should not be pull-up
(weak pull-down 20K)
Should not be pull-down
(weak pull-up 20K)

1 = Enable (weak pull-up 20K)
0 = 1.8V supply (weak pull-down 20K)

1 = 1.5V supply
0 = TLS no Confidentiality

(weak pull-down 20K)
1 = TLS Confidentiality

U10A

U10A

RTCX1
RTCX2

RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
TRST#

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

IbexPeak-M_R1P0

IbexPeak-M_R1P0

Configuration

Boot Location

GNT0#GNT1#

11

SPI

PCI

01

LPC

00

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

LPC

LPC

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP
SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21
SATA1GP / GPIO19

SPI JTAG

SPI JTAG

+3V

+VCCRTC

+3V

+1.8V

+1.8V

+3V

+3V

+3V_S5

On-die PLL voltage enable

use default (0=1.8V supply)

+3V_S5

2

D33
B33
C32
A32

C34

PCH_DRQ#0

A34

PCH_DRQ#1

F34
AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

SATA_RX4N_C

AD9

SATA_RX4P_C

AD8

SATA_TXN4_C

AD6

SATA_TXP4_C

AD5
AD3

AD1
AB3
AB1

AF16
AF15

T3

Y9
V1

ZR7U note

R282 *10K_4R282 *10K_4

o use

N

R231 *10K_4R231 *10K_4

R254 330K_4R254 330K_4

R22 1K_4R22 1K_4
R6 1K_4R6 1K_4

R21 *1K_4R21 *1K_4
R10 *1K_4R10 *1K_4

o use

N

R265 *1K_4R265 *1K_4

R261 *1K_4R261 *1K_4

R36 *1K_4R36 *1K_4
R37 *10K_4R37 *10K_4

R301 *1K_4R301 *1K_4

R274 10K_4R274 10K_4

R92 1K_4R92 1K_4

2

LPC_LAD0 (20,29)
LPC_LAD1 (20,29)
LPC_LAD2 (20,29)
LPC_LAD3 (20,29)

LPC_LFRAME# (20,29)

TP31TP31
TP3TP3

R88 10K_4R88 10K_4

N

ote:

TA port2/3 may not be available on all PCH sku

SA
(HM55 support 4port only)

SATA_COMP

R91 *10K_4R91 *10K_4
R294 10K_4R294 10K_4

NV_ALE

NV_CLE

SPI_SI_R

+3V
IRQ_SERIRQ (29)

SATA_RXN0_C (21)
SATA_RXP0_C (21)
SATA_TXN0 (21)
SATA_TXP0 (21)

SATA_RXN1_C (21)
SATA_RXP1_C (21)
SATA_TXN1 (21)
SATA_TXP1 (21)

TP12TP12
TP13TP13
TP20TP20
TP16TP16

R47 37.4/F_4R47 37.4/F_4

+3V

SPKR

PCI_GNT3# (10)

PCH_INVRMEN

PCI_GNT0# (10)
PCI_GNT1# (10)

NV_ALE (10)

NV_CLE (10)

HDA_DOCK_EN#

RSV_GPIO8 (11)

CR_WAKE# (11)

+1.05V

SATA_ACT# (25)
PCH_ODD_EN (21)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

Date: Sheet of

Date: Sheet of

Date: Sheet of

SATA HDD

SATA ODD

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZR7U

ZR7U

ZR7U

9 38Tuesday, April 20, 2010

9 38Tuesday, April 20, 2010

1

9 38Tuesday, April 20, 2010

1A

1A

1A

5

PCH3(CLG)

D D

C C

PCI_GNT0#(9)
PCI_GNT1#(9)

PCI_GNT3#(9)

PCI_RST#(20)

CLK_LPC_DEBUG(20)

B B

CLK_PCI_775(29)

CLK_PCI_FB CLK_PCI_FB_C

IBEX PEAK-M (PCI,USB,NVRAM)

U10E

U10E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_R1P0

IbexPeak-M_R1P0

TP2TP2

TP1TP1

TP17TP17

R233 22_4R233 22_4

T37T37
R34 22_4R34 22_4
R20 22_4R20 22_4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#

PCI_GNT0#
PCI_GNT1#
PWM_SELECT#
PCI_GNT3#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_RST#
PCI_SERR#

PCI_PERR#

PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#

PCI_PLOCK#
PCI_STOP#

PCI_TRDY#
ICH_PME#
PCI_PLTRST#

CLK_PCI_PCCARD
CLK_PCI_775_CCLK_PCI_775_C

PCI

PCI

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USB

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2
AV7
AY8

AY5
AV11

BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25
D25

N16
J16
F16
L16
E14
G16
F12
T15

NV_ALE (9)
NV_CLE (9)

Port1 and port9 can be used on debug mode

USBP0-

TP6TP6

USBP0+

TP9TP9

USBP1- (26)
USBP1+ (26)

USBP2-

TP5TP5

USBP2+

TP4TP4

USBP3- (26)
USBP3+ (26)
USBP4- (26)
USBP4+ (26)
USBP5- (20)
USBP5+ (20)

USB port6/7 may not be available on all PCH sku
(HM55 support 12port only)

USBP8- (16)
USBP8+ (16)
USBP9- (26)
USBP9+ (26)
USBP10- (20)
USBP10+ (20)
USBP11- (26)
USBP11+ (26)
USBP12- (24)
USBP12+ (24)
USBP13- (20)
USBP13+ (20)

USB_BIAS

R248 22.6/F_4R248 22.6/F_4

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#CLK_LPC_DEBUG_C
USB_OC4_5#

USB_OC6#
USB_OC7#

MB USB

USB/B-USB-3
BLUETOOTH
Reserved SIM USB

Camera
USB/B-USB-2
Mini Card (3G)
USB/B-USB-1
Card Reader
Mini Card (WLAN)

USB_OC0# (26)
USB_OC1# (26)

USB_OC4_5# (26)

EHCI1

EHCI2

Mini 3G

WLAN

3

PCIE_RX1-(18)
PCIE_RX1+(18)

LAN

PCIE_TX1-(18)
PCIE_TX1+(18)

PCIE_RX2-(20)
PCIE_RX2+(20)
PCIE_TX2-(20)
PCIE_TX2+(20)

PCIE_RX6-(20)
PCIE_RX6+(20)
PCIE_TX6-(20)
PCIE_TX6+(20)

Note:
PCIE port7/8 may not be available on all PCH sku
(HM55 support 6port only)

CLK_PCH_SRC1#(20)

3G

CLK_PCH_SRC1(20)

CLK_PCIE_REQ1#(20)

LAN

CLK_PCH_SRC2#(20)
CLK_PCH_SRC2(20)

CLK_PCIE_REQ2#(20)

CLK_PCIE_LOM#(18)
CLK_PCIE_LOM(18)

CLK_PCIE_LAN_REQ#(18)

WLAN

C37 .1u/10V_4C37 .1u/10V_4
C43 .1u/10V_4C43 .1u/10V_4

C33 .1u/10V_4C33 .1u/10V_4
C38 .1u/10V_4C38 .1u/10V_4

C26 .1u/10V_4C26 .1u/10V_4
C28 .1u/10V_4C28 .1u/10V_4

T3T3
T4T4

2

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U10B

U10B

BG30

PERN1

BJ30

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

T7T7
T8T8
T6T6
T5T5

PCIE_TXN6_C
PCIE_TXP6_C

CLK_PCIE_REQ0#

CLK_PCIE_REQ1#

CLK_PCIE_REQ2#

CLK_PCH_SRC3N
CLK_PCH_SRC3P

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

CLK_PCIE_LAN_REQ#

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_R1P0

IbexPeak-M_R1P0

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

Clock Flex

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1
CL_DATA1
CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

B9
H14
C8

J14
C6
G8

M14
E10
G12

T13
T11
T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

RSV_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA

RSV_SML0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0

RSV_SML1ALERT#
SMB_CLK_ME1
SMB_DATA_ME1

PEG_CLKREQ#

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_PCI_FB

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

BOARD_ID1

BOARD_ID2

BOARD_ID3

R232 10K_4R232 10K_4

ICH_SMBCLK (3)
ICH_SMBDATA (3)

SMB_CLK_ME0 (18)
SMB_DATA_ME0 (18)

R79 *0_4R79 *0_4

For EC

CL_CLK1 (20)
CL_DATA1 (20)
CL_RST1# (20)

T1T1
T2T2

CLK_PCIE_3GPLL# (4)
CLK_PCIE_3GPLL (4)

DPLL_REF_SSCLK# (4)
DPLL_REF_SSCLK (4)

CLK_BUF_PCIE_3GPLL# (3)
CLK_BUF_PCIE_3GPLL (3)

CLK_BUF_BCLK# (3)
CLK_BUF_BCLK (3)

CLK_BUF_DREFCLK# (3)
CLK_BUF_DREFCLK (3)

CLK_BUF_DREFSSCLK# (3)
CLK_BUF_DREFSSCLK (3)

CLK_ICH_14M (3)

R5 90.9/F_4R5 90.9/F_4

+3V

1

For LAN

SML1ALERT# (11,27,29)

C295 27P/50V_4C295 27P/50V_4

12

Y2

R236

R236

25MHzY225MHz

1M_4

1M_4

+1.05V

INTEL FAE: If having UMA digital display
(eDP/DP/DVI/HDMI), then 25MHz is required.

C296 33P/50V_4C296 33P/50V_4

PLTRST#(CLG)

+3V_S5

C322

C322
.1u/10V_4

.1u/10V_4

PCI_PLTRST#

2

4

A A

1

U1

3 5

TC7SH08FUU1TC7SH08FU

R56

R56
100K_4

100K_4

5

PLTRST# (4,18,20,24,29)

PCI/USBOC# Pull-up(CLG) CLK_REQ/Strap Pin(CLG)

USB_OC7#
USB_OC4_5#
USB_OC6#

+3V_S5

PCI_REQ0#
PCI_PIRQB#
PCI_REQ3#
PCI_PIRQD#

+3V

PCI_PLOCK#
PCI_SERR#
PCI_DEVSEL#
PCI_STOP#

+3V

RP2

RP2

6

5

7

4

8

3

9

10

10

10

2
1

8.2KX8

8.2KX8

RP3

RP3

6

5

7

4

8

3

9

2
1

8.2KX8

8.2KX8

RP1

RP1

6

5

7

4

8

3

9

2
1

8.2KX8

8.2KX8

4

USB_OC2#
USB_OC1#
USB_OC0#
USB_OC3#

PCI_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#

PCI_PERR#
PCI_PIRQC#
PCI_IRDY#
PCI_PIRQA#

+3V_S5

+3V

+3V

+3V_S5

+3V

R84 10K_4R84 10K_4
R266 10K_4R266 10K_4
R275 10K_4R275 10K_4
R82 10K_4R82 10K_4
R278 10K_4R278 10K_4
R280 10K_4R280 10K_4

R284 10K_4R284 10K_4
R281 10K_4R281 10K_4

R238 8.2K_4R238 8.2K_4
R239 8.2K_4R239 8.2K_4
R229 8.2K_4R229 8.2K_4
R242 8.2K_4R242 8.2K_4

CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_LAN_REQ#
PEG_CLKREQ#

CLK_PCIE_REQ1#
CLK_PCIE_REQ2#

dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#

3

SMBus/Pull-UP and Board ID

+3V

BOARD_ID1
BOARD_ID2
BOARD_ID3

R16 *10K_4R 16 *10K_4
R17 *10K_4R 17 *10K_4
R15 *10K_4R 15 *10K_4

RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#

ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0

+3V_S5

R8 *10K_4R8 *10K_4
R9 *10K_4R9 *10K_4
R7 *10K_4R7 *10K_4

R264 10K_4R264 10K_4
R83 10K_4R83 10K_4
R78 10K_4R78 10K_4

R57 2.2K_4R57 2.2K_4
R55 2.2K_4R55 2.2K_4
R68 2.2K_4R68 2.2K_4
R71 2.2K_4R71 2.2K_4

2

+3V_S5

R70

R70

2

2.2K_4

2.2K_4

SMB_CLK_ME1

3

2ND_MBCLK(29)

2ND_MBDATA(29)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

+3V_S5

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

1

Q5
2N7002KQ52N7002K

R64

R64

2

2.2K_4

2.2K_4

SMB_DATA_ME1

3

Q6
2N7002KQ62N7002K

ZR7U

ZR7U

ZR7U

10 38Tuesday, April 20, 2010

10 38Tuesday, April 20, 2010

10 38Tuesday, April 20, 2010

1A

1A

1A

5

4

3

2

1

GPIO Pull-up/Pull-down(CLG)

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

R39 10K_4R39 10K_4

ZR7U

ZR7U

ZR7U

11 38Tuesday, April 20, 2010

11 38Tuesday, April 20, 2010

11 38Tuesday, April 20, 2010

+3V_S5

+3V

of

1A

1A

1A

U10F

U10F

BMBUSY#

SIO_EXT_SMI#(29)

D D

Intel suggest to NC (GPIO24)

C C

SML1ALERT#(10,27,29)

SIO_EXT_SCI#(29)

RSV_GPIO8(9)

TP15TP15

CR_WAKE#(9)

TP14TP14
TP10TP10 R287 10K_4R287 10K_4

RST_GATE#(28)

R288 *SHORT_4R288 *SHORT_4

EC suggestion use GPIO49 for FAN control

B B

SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose

A A

5

SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID0 LAN_DISABLE#

LAN_DISABLE#

dGPU_HOLD_RST#
dGPU_PWROK
GPIO22
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
STP_PCI#
dGPU_VRON
dGPU_PWR_EN#
dGPU_PRSNT#
GPIO38
SAVE_LED#
GPIO45
RST_GATE#
SV_SET_UP
SATA5GP
GPIO57

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_R1P0

IbexPeak-M_R1P0

4

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

PROCPWRGD

THRMTRIP#

A20GATE

PECI

RCIN#

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8

TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19

NC_1
NC_2
NC_3
NC_4
NC_5

INIT3_3V#

TP24

3

AH45
AH46

AF48
AF47

SIO_A20GATE

U2

AM3
AM1
BG10
T1
BE10

PCH_THRMTRIP#_R

BD10

BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39

P6
C10

TP1_PCH
TP2_PCH

TP_INT3_3V

SIO_A20GATE (29)

CLK_CPU_BCLK# (4)
CLK_CPU_BCLK (4)
H_PECI (4)
SIO_RCIN# (29)
H_PWRGOOD (4)

R53 56/F_4R53 56/F_4

R58 56/F_4R58 56/F_4

TP8TP8
TP7TP7

TP19TP19

2

PM_THRMTRIP# (4)

+1.05V

PCH_GPIO28
GPIO45
RST_GATE#

SIO_EXT_SMI#
SIO_EXT_SCI#

dGPU_PWR_EN#
dGPU_HOLD_RST#
dGPU_VRON
dGPU_PWROK

SIO_RCIN#
SIO_A20GATE

SATA5GP
GPIO22

SAVE_LED#
STP_PCI#

GPIO38
BMBUSY#
SV_SET_UP

R90 10K_4R90 10K_4
R291 10K_4R291 10K_4
R279 10K_4R279 10K_4

R52 10K_4R52 10K_4

R240 10K_4R240 10K_4
R241 10K_4R241 10K_4

R74 10K_4R74 10K_4
R296 10K_4R296 10K_4
R75 10K_4R75 10K_4
R31 10K_4R31 10K_4

R283 10K_4R283 10K_4
R293 10K_4R293 10K_4

R76 10K_4R76 10K_4
R292 10K_4R292 10K_4

R93 10K_4R93 10K_4
R285 10K_4R285 10K_4
R295 10K_4R295 10K_4
R89 10K_4R89 10K_4

SV_SET_UP 1-X High = Strong (Default)

GPIO57 stuff PD and not stuff PU for Intel suggestion

GPIO57

+3V

R40 *10K_4R40 *10K_4
R73 10K_4R73 10K_4

BOARD_ID0

RSV_GPIO8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

Date: Sheet of

Date: Sheet of

Date: Sheet

PROJECT :

R60 10K_4R60 10K_4

BOARD_ID0
dGPU_PRSNT#

High = JV41/JM41
Low = JM51
High = Disable
Low = Enable

1

5

U10G

PCH5(CLG)

VCCCORE(+1.05V) = 1.432A(80mils) VCCADAC= 69mA(15mils)

+1.05V

C40 1u/6.3V_4C40 1u/6.3V_4
C308 10u/6.3V_6C308 10u/6.3V_6

IBEX PEAK-M (POWER)

D D

R45 *short_6R45 *short_6

+1.05V

40mA(15mils)

C C

VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

37mA(15mils)

B B

+1.05V

+1.05V

L25 *1uH/25mA_6L25 *1uH/25mA_6

+1.05V

L3 *1uH/25mA_6L3 *1uH/25mA_6

C52 *10u/6.3V_6C52 *10u/6.3V_6

VCCIO = 3.062A(150mils)

C45 1u/6.3V_4C45 1u/6.3V_4
C51 1u/6.3V_4C51 1u/6.3V_4
C36 1u/6.3V_4C36 1u/6.3V_4
C48 1u/6.3V_4C48 1u/6.3V_4
C46 10u/6.3V_6C46 10u/6.3V_6

VCCVRM=196mA(15mils)

+1.8V

+1.05V

A A

+1.05V_PCH_VCCDPLL_EXP

+V1.1LAN_VCCAPLL_EXP

+V1.1LAN_VCCAPLL_FDI

+1.05V

C316

C316
*10u/6.3V_6

*10u/6.3V_6

R48 *short_6R48 *short_6

L23 10uH/100mA_8L23 10uH/100mA_8

L24 10uH/100mA_8L24 10uH/100mA_8

+V1.5S_1.8S

C54

C54
*.1u/10V_4

*.1u/10V_4

+3V

U10G

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31

AJ30
AJ31

AK24

BJ24

AN20
AN22
AN23
AN24
AN26
AN28

BJ26

BJ28
AT26
AT28
AU26
AU28
AV26
AV28

AW26
AW28

BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

AN30
AN31

AN35

AT22

BJ18
AM23

IbexPeak-M_R1P0

IbexPeak-M_R1P0

+V1.5S_1.8S

C56

C56
*.1u/10V_4

*.1u/10V_4

+V1.1LAN_VCCA_A_DPL

+

+

C297

C297

220u/2.5V_3528

220u/2.5V_3528

+V1.1LAN_VCCA_B_DPL

+

+

C303

C303

*220u/2.5V_3528

*220u/2.5V_3528

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

VCCIO[54]
VCCIO[55]

VCC3_3[1]

VCCVRM[1]
VCCFDIPLL
VCCIO[1]

C300

C300
1u/6.3V_4

1u/6.3V_4

C305

C305
1u/6.3V_4

1u/6.3V_4

4

POWER

POWER

VCC CORE

VCC CORE

PCI E*

PCI E*

FDI

FDI

HDA_SYNC (PCH strap pin)

Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

VCCADAC[1]
VCCADAC[2]

VSSA_DAC[1]

CRTLVDS

CRTLVDS

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]
VCC3_3[3]
VCC3_3[4]

HVCMOS

HVCMOS

VCCVRM[2]

VCCDMI[1]

DMI

DMI

VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]

NAND / SPI

NAND / SPI

VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AE50
AE52
AF53
AF51

AH38
AH39

AP43
AP45
AT46
AT45

AB34
AB35

+3V_VCC_GIO

AD35

VCCVRM= 196mA(15mils)

AT24

+VCCDM

AT16
AU16

AM16
AK16
AK20

VCCPNAND

AK19
AK15
AK13
AM12
AM13
AM15

AM8

+3V_VCCME_SPI

AM9
AP11
AP9

+VCCA_DAC_1_2

C301

C301

C292

C292

.01u/25V_4

.01u/25V_4

22u/6.3V_8

22u/6.3V_8

VCCALVDS= 1mA

VCCALVDS

R11 *Short_4R11 *Short_4

C11

C11
.1u/10V_4

.1u/10V_4

VCCTX_LVDS

C20

C20

C22

C22

.01u/25V_4

.01u/25V_4

.1u/10V_4

.1u/10V_4

VCC3_3 = 357mA(30mils)

R33

R33
PBY160808T-121Y-N/2.5A_6

PBY160808T-121Y-N/2.5A_6

C27

C27
.1u/10V_4

.1u/10V_4

+V1.5S_1.8S

R59 *Short_4R59 *Short_4

C65

C65
1u/6.3V_4

1u/6.3V_4

VCCPNAND= 156mA(15mils)

R61 *SHORT0805R61 *SHORT0805

C64

C64
.1u/10V_4

.1u/10V_4

VCCME3_3= 85mA(15mils)

R54 *short_6R54 *short_6

C68

C68
.1u/10V_4

.1u/10V_4

L21

L21
PBY160808T-181Y-N/2A_6

PBY160808T-181Y-N/2A_6

C294

C294

C475

C475

.1u/10V_4

.1u/10V_4

22u/6.3V_8

22u/6.3V_8

+3V

VCCTX_LVDS= 59mA(15mils)

L1 .1uH/250mA_8L1 .1uH/250mA_8
C13

C13
10u/6.3V_6

10u/6.3V_6

VCCDMI= 61mA(15mils)

+1.05V

+1.8V

+3V

3

+3V

VCCACLK= 52mA(15mils)

VCCLAN = 320mA(30mils)

+1.8V

VCCME(+1.05V) = 1.849A(100mils)

+3V

+1.05V

VCCSUS3_3 = 163mA(20mils)

VCC3_3 = 0.357A(30mils)

V_CPU_IO >1mA(15mils)

VCCRTC= 2mA(15mils)

L22 *10uH/100mA_8L22 *10uH/100mA_8

+1.05V

R46 *0_6R46 *0_6

+1.05V

R2 *SHORT0805R2 *SHORT0805
R1 *SHORT0805R1 *SHORT0805

68mA(15mils)

69mA(15mils)

+3V_S5

+3V

+1.05V

+VCCRTC

C293 *10u/6.3V_6C293 *10u/6.3V_6
C299 *1u/6.3V_4C299 *1u/6.3V_4

C47

C47
1u/6.3V_4

1u/6.3V_4

+1.05V_VCCEPW

C6 22u/6.3V_8C6 22u/6.3V_8
C7 22u/6.3V_8C7 22u/6.3V_8
C34 1u/6.3V_4C34 1u/6.3V_4
C29 1u/6.3V_4C29 1u/6.3V_4

C70 .1u/10V_4C70 .1u/10V_4

+V1.5S_1.8S

+V1.1LAN_VCCA_A_DPL

+V1.1LAN_VCCA_B_DPL

+1.05V

C30 1u/6.3V_4C30 1u/6.3V_4
C35 1u/6.3V_4C35 1u/6.3V_4
C61 1u/6.3V_4C61 1u/6.3V_4

C67 .1u/10V_4C67 .1u/10V_4

C55 .1u/10V_4C55 .1u/10V_4

R87 *short_6R87 *short_6

R86 *short_6R86 *short_6

R257 *short_6R257 *short_6

C319 4.7u/6.3V_6C319 4.7u/6.3V_6

1 2

C60 .1u/10V_4C60 .1u/10V_4
C63 .1u/10V_4C63 .1u/10V_4

+V1.1LAN_VCCA_CLK

TP_PCH_VCCDSW

C57

C57
.1u/10V_4

.1u/10V_4

+VCCRTCEXT

+VCCSST

+V1.1LAN_INT_VCCSUS

+3V_S5_VCCPSUS

.1u/10V_4C59 .1u/10V_4C59

+3V_VCCPCORE

C62

C62
.1u/10V_4

.1u/10V_4

+VTT_VCCPCPU

C318

C318
.1u/10V_4

.1u/10V_4

2

AP51
AP53

AF23
AF24

Y20

AD38
AD39
AD41
AF43
AF41
AF42

V39
V41
V42
Y39
Y41
Y42

AU24

BB51
BB53

BD51
BD53

AH23

AJ35

AH35
AF34
AH34
AF32

V12

Y22

P18
U19
U20
U22

V15
V16
Y16

AT18

AU18

A12

C321

C321
.1u/10V_4

.1u/10V_4

U10J

U10J

VCCACLK[1]
VCCACLK[2]

VCCLAN[1]
VCCLAN[2]

DCPSUSBYP

VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]

V9

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST

DCPSUS

VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]

VCC3_3[5]
VCC3_3[6]
VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_R1P0

IbexPeak-M_R1P0

POWER

POWER

VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]

USB

USB

VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

Clock and Miscellaneous

PCI/GPIO/LPC

PCI/GPIO/LPC

VCCSATAPLL[1]
VCCSATAPLL[2]

SATA

SATA

CPU

CPU

RTC PCI/GPIO/LPC

RTC PCI/GPIO/LPC

HDA

HDA

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]

VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23
V23
F24

K49

J38
L38
M36
N36
P36
U35

AD13

AK3
AK1

AH22

AT20

AH19
AD20
AF22
AD19

AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

C49 1u/6.3V_4C49 1u/6.3V_4

+3V_S5_VCCPUSB+1.05V_VCCAUX

C311

C311
.022u_4

.022u_4

V5REF_SUS

V5REF

+3V_VCCPPCI

C32

C32
.1u/10V_4

.1u/10V_4

+V1.1LAN_VCCAPLL

C327

C327
*1u/6.3V_4

*1u/6.3V_4

+V1.5S_1.8S

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C39

C39
1u/6.3V_4

1u/6.3V_4

1

+1.05V

VCCSUS3_3 = 0.163A(20mils)

R247 *short_6R247 *short_6

C50

C50

C44

C44

.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

R26 100/F_4R26 100/F_4

D4 RB500V-40D4 RB500V-40

+1.05V

C24 1u/10V_6C24 1u/10V_6

R19 100/F_4R19 100/F_4

D2 RB500V-40D2 RB500V-40

C12 1u/10V_6C12 1u/10V_6

VCC3_3 = 0.357A(30mils)

R35 *short_6R35 *short_6

C25

C25
.1u/10V_4

.1u/10V_4

31mA(15mils)

L26 *10uH/100mA_8L26 *10uH/100mA_8

C328

C328
*10u/6.3V_6

*10u/6.3V_6

C58

C58
1u/6.3V_4

1u/6.3V_4

VCCME = 1.849A(100mils)

VCCSUSHDA= 6mA(15mils)

R43 *Short_4R43 *Short_4

+3V_S5

V5REF_SUS< 1mA

+5V_S5
+3V_S5

V5REF< 1mA

+5V
+3V

+3V

+1.05V

+1.05V

+3V_S5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet

PROJECT :

1

ZR7U

ZR7U

ZR7U

12 38Tuesday, April 20, 2010

12 38Tuesday, April 20, 2010

12 38Tuesday, April 20, 2010

1A

1A

1A

of