Quanta NL6D Schematic

8

7

6

5

4

3

2

1

1. Schematic Page Description :

01

Origins Schematic Ver :

D D

SoC I2C table

Function NA PMIC

Channel

I2C0 I2C1

Read

Write 0x? 0x? 0x?

I2C4Audio codec Track Pad I2C5 EC

I2C6

EC SMBus/I2C table

C C

Function Battery/charger NA PCH NA I2C2 Thermal I2C3

Channel SMB0 SMB1 I2C1

Address

Current sensor address

USB3/2 port mapping

B B

USB3 Port No# USB3P0 USB3P1 USB3P2 USB3P3

Usage

NA I/O I/O NA

USB2 Port No# Usage USB2P0 USB2P1 USB2P2 USB2P3 USB2P4

NA I/O(3.0) I/O(3.0) CCD BT

Function

+VBATA 0x47 +V5A 0x43 +V3P3A

+V1P8A 0x49

Channel

0x4B 0x46+V1P05A

Function Channel +VCC_OUT 0x40 +VGG 0x44

0x45+VNN

+VDDQ_OUT 0x41

PCIe port mapping

PCIe port No# PCIe_0

A A

PCIe_1 PCIe_2 PCIe_3

8

Usage NA NA WLAN

NA

PCIe CLK# Usage PCIe_CLK0 PCIe_CLK1 PCIe_CLK2 PCIe_CLK3

7

NA NA WLAN NA

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

6

5

4

3

Date: Sheet of

2

Quanta Computer Inc.

Sch Page description

Tuesday, April 12, 2016 411

1A

1

5

www.schematic-x.blogspot.com

4

3

2

1

NL6D Chromebook

Intel Braswell Platform Block Diagram

D D

LPDDR3 Memory down 4Pcs 2 Channel

eMMC 5.0

C C

16G/32G

MMC

LPDDR3

Intel Braswell

Power : TDP 6 Watt

Package : FCBGA 1170

Size : 25 x 27 (mm)

DDI 1

32.768KHz PAGE 6

19.2 Mhz PAGE 6

DDI 2

I2C Interface

USB 3.0 Interface

SD Card

1.8V BIOS+TXE SPI ROM(64Mb)

W25Q64FWSSIG

SD Card 3.0

SPI Interface

Int

I2S+I2C(PORT1)

Port0/3

USB 2.0 Interface

Port0

X2 LANES

Port4

Port2

USB3.0 Port x 1

Charger

SN1408009RTER

Port2

Port3

CCD

Port1

Charger

SN1408009RTER

Port1

LCD Conn

HDMI Conn

Port1

PMIC

Port4 Port5

Audio Codec

ALC5650

Track Pad

Port6

KBC

MEC1322

PCIE Gen 2 x 1 LaneLPC Interface

B B

TPM

SLB9655TT1.2 FW4.32GOOG

KBC

MEC1322-LZY

Audio Codec

REALTEK ALC5650

Port2

NGFF M.2 2230-E

USB port3

WLAN / BT Combo

Package : DQFN132

Size : 11 x 11 (mm)

SMB0

Battery

SMB3

Thermal IC

Keyboard

Package : QFN-48

Size : 6 x 6 (mm)

Speaker

PCIE CLK PORT 2

TMP432

Combo Jack Headphone + MIC

A A

DMIC

5

4

3

USB3.0 Port x 1

Daughter Board

BQ24770

NVDC Battery Charger

PMIC RT5067

+VNN +V1P05A +V1P8A +V1P8U +V1P8S +V3P3A_PRIM +V1P15S +V1P24A +VDDQ_VTT

Thermal Protection Discharger

2

RT7291

+V5A

RT9610/CSD87381P

RT7290

+V3P3A

+VCC

+VGG

+VDDQ

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

Block Diagram

1

1A

2 41Tuesday, April 12, 2016

1A

5

4

3

2

1

03

D D

C C

B B

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Num ber Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Power Sequence

1

3 41Tuesday, April 12, 2016

1A

1

2

3

4

5

6

7

8

04

A A

B B

C C

D D

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

SMBUS_I2C

8

1A

4 41Tuesday, April 12, 2016

5

4

3

2

1

05

1

+VDC_IN

Adapter

D D

PWR_BTN_L

13

BATT_ENABLE

BC_ACOK

2

EC_RST#

EC_IN_RW

EC_ENTERING_RW

RKB

R

EC_ACIN

3

BC_ACOK2

LID_OPEN_OUT1_L

STARTUP_LATCH_SET(EC)

SMC_SHUTDOWN(EC)

EC_HIB_L

PWR_BTN_SELECT(EC)

13

KB_PWR_BTN_L

DEBUG_PWR_BTN_L

C C

B B

MOSFET

Battery Pack

2a

+VRTC

HOLELESS RESET

SLG4K4350

EC HIB Logic

1a

+VCHGR_VIN

1a

+VCHGR_VIN

1

+VBATT

KB_ROW02_SW

KB_COL02_SW

KB_ROW02

KB_COL02KBEC

V5A_EN4

SMC_ONOFF_N

14

Charger

MOSFET

6a

5

V5A_EN

4

+VBATA

2

V3P3A_PWRGD

PMIC_EN

+V5A

+VNN_VIN

+V1P05A_VIN

+V1P8A_VIN

+V1P8A

9

+V3P3A +V3P3A_PRIME

6

+V1P8A

9

16a

+VDDQ +VDDQ_VTT

SLP_S0IX#

17

SLP_S4

15

SLP_S3

16

+V5A VR +V5A

RT7291B V5A_PWRGD

2a

+V3P3A_LDO/+VRTC

+V3P3A VR +V3P3A

RT7290A V3P3A_PWRGD

+VBATA

2

+VCC PWM RT9610

+VGG PWM RT9610

+VDDQ PWM RT9610

PWM1

PWM2

PWM6

PMIC

DRV_EN1

DRV_EN2

DRV_EN6

VSYS

PMIC_EN

VCC

VIN3

VIN4

VIN5

V3P3_VIN

VIN_LDO

VDDQ_LDO_IN

RT5067

1. +VCC

2. +VGG

3. +VNN

4. +V1P05A

5. +V1P8A

6. +VDDQ

MOSFET CSD87381P

6

6a

16

16a

16b

2a

5

5a

16 16

+V5A_LDO

19

18

16a

+V1P8U

+VDDQ

+VDDQ_VTT

7

8

9

+V1P8U +V1P8SVIN_1P8_SW

11

16

10

17

20

21

+VCC

+VGG

+VDDQ

LPDDR3

+VNN

+V1P05A

+V1P8A

+V1P15S

+V1P24A

DDR3_DRAM_PWROK

DDR3_VCCA_PWROK

COREPWROK

+V5A5

16

SLP_S3D

6

+V3P3A +V3P3S

16

SLP_S3D

MOSFET

17

SoC

Intel Braswell

eDP Switch IC

?

6 +V3P3A

PLTRST

22

PCH_DISP_ON

+V1P8A9

?

VSDIO_EN

LVT

SD Switch IC

6 +V3P3A (+V3P3A-WIFI)

17

11

6 +V3P3A

+V5S +V5A5

PMU_SLP_S0IX#

17

PMU_SLP_S4

15

PMU_SLP_S3

16

+VBATA2

+V3P3DX_EDP?6 +V3P3A

+VSDIO?

?

VSDIO_SEL

+V3P3S

+V3P3A_PRIME

SLP_S0IX#

17

SLP_S4

15

SLP_S3

16

EDP LCD

USB Port

KB LIGHT

SD Card

WIFI/BT

TPM

Track Pad

Thermal

RSMRST_N_PWRGD

12

EC

A A

5

4

3

17

15

16

RSMRST#13

SLP_S0IX#

SLP_S4

SLP_S3

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

BSW PWR TREE

1

5 41Tuesday, April 12, 2016

1A

5

4

3

2

1

SoC (CPU)

BRASWELL SOC - MEMORY LPDDR3 CHANNEL A

06

BSW_MCP_EDS

D D

C C

DDR3_DRAM_PWROK[39]

CA

B B

PLACE CA CAP NEAR SOC

A A

5

C234

0.1U/16V_4

R403 182/F_4

M0_B_A9[17] M0_B_A8[17] M0_B_A7[17] M0_B_A6[17] M0_B_A5[17] M0_B_A4[17] M0_B_A3[17] M0_B_A2[17] M0_B_A1[17] M0_B_A0[17]

M0_A_A9[17] M0_A_A8[17] M0_A_A7[17] M0_A_A6[17] M0_A_A5[17] M0_A_A4[17] M0_A_A3[17] M0_A_A2[17] M0_A_A1[17] M0_A_A0[17]

M0_CS1_N[17] M0_CS0_N[17]

M0_CKE1[17] M0_CKE0[17]

M0_B_CLKP0[17] M0_B_CLKN0[17]

M0_A_CLKP0[17] M0_A_CLKN0[17]

M0_B_ODT[17] M0_A_ODT[17]

+VREFCA0_R +VREFDQ0_R

M0_B_DM3[17] M0_B_DM2[17] M0_B_DM1[17] M0_B_DM0[17]

M0_A_DM3[17] M0_A_DM2[17] M0_A_DM1[17] M0_A_DM0[17]

M0_B_DQSP3[17] M0_B_DQSN3[17] M0_B_DQSP2[17] M0_B_DQSN2[17] M0_B_DQSP1[17] M0_B_DQSN1[17] M0_B_DQSP0[17] M0_B_DQSN0[17]

M0_A_DQSP3[17] M0_A_DQSN3[17] M0_A_DQSP2[17] M0_A_DQSN2[17] M0_A_DQSP1[17] M0_A_DQSN1[17] M0_A_DQSP0[17] M0_A_DQSN0[17]

4

M0_B_A9 M0_B_A8 M0_B_A7 M0_B_A6 M0_B_A5 M0_B_A4 M0_B_A3 M0_B_A2 M0_B_A1 M0_B_A0

M0_A_A9 M0_A_A8 M0_A_A7 M0_A_A6 M0_A_A5 M0_A_A4 M0_A_A3 M0_A_A2 M0_A_A1 M0_A_A0

M0_CS1_N M0_CS0_N

M0_CKE1 M0_CKE0

M0_B_CLKP0 M0_B_CLKN0

M0_A_CLKP0 M0_A_CLKN0

M0_B_ODT M0_A_ODT

DDR3_DRAM_PWROK DDR3_M0_RCOMPPD

M0_B_DM3 M0_B_DM2 M0_B_DM1 M0_B_DM0

M0_A_DM3 M0_A_DM2 M0_A_DM1 M0_A_DM0

M0_B_DQSP3 M0_B_DQSN3 M0_B_DQSP2 M0_B_DQSN2 M0_B_DQSP1 M0_B_DQSN1 M0_B_DQSP0 M0_B_DQSN0

M0_A_DQSP3 M0_A_DQSN3 M0_A_DQSP2 M0_A_DQSN2 M0_A_DQSP1 M0_A_DQSN1 M0_A_DQSP0 M0_A_DQSN0

U17A

BG45

LPDDR3_M0_CA9_B

BH46

LPDDR3_M0_CA8_B

BA40

LPDDR3_M0_CA7_B

BD47

LPDDR3_M0_CA6_B

BD49

LPDDR3_M0_CA5_B

BJ45

LPDDR3_M0_CA4_B

BB49

LPDDR3_M0_CA3_B

BE46

LPDDR3_M0_CA2_B

BF48

LPDDR3_M0_CA1_B

BE52

LPDDR3_M0_CA0_B

BF44

LPDDR3_M0_CA9_A

BD44

LPDDR3_M0_CA8_A

AY40

LPDDR3_M0_CA7_A

BB46

LPDDR3_M0_CA6_A

BH48

LPDDR3_M0_CA5_A

BD42

LPDDR3_M0_CA4_A

BH47

LPDDR3_M0_CA3_A

BJ48

LPDDR3_M0_CA2_A

BC42

LPDDR3_M0_CA1_A

BB47

LPDDR3_M0_CA0_A

AU38

LPDDR3_M0_CSB1

AY38

LPDDR3_M0_CSB0

AY42

LPDDR3_M0_CKE1_A

BB44

LPDDR3_M0_CKE0_A

BD38

LPDDR3_M0_CK_P_B

BF38

LPDDR3_M0_CK_N_B

BD40

LPDDR3_M0_CK_P_A

BF40

LPDDR3_M0_CK_N_A

BA38

LPDDR3_M0_ODT_B

AV36

LPDDR3_M0_ODT_A

AT28

DDR3_M0_OCAVREF

AU28

DDR3_M0_ODQVREF

AV28

DDR3_DRAM_PWROK

BA28

DDR3_M0_RCOMP

BH30

LPDDR3_M0_DM3_B

BG41

LPDDR3_M0_DM2_B

BD32

LPDDR3_M0_DM1_B

AY36

LPDDR3_M0_DM0_B

AP44

LPDDR3_M0_DM3_A

AT48

LPDDR3_M0_DM2_A

BA53

LPDDR3_M0_DM1_A

AP52

LPDDR3_M0_DM0_A

BH32

LPDDR3_M0_DQS3_B

BG31

LPDDR3_M0_DQSB3_B

BH40

LPDDR3_M0_DQS2_B

BG39

LPDDR3_M0_DQSB2_B

BC30

LPDDR3_M0_DQS1_B

BC32

LPDDR3_M0_DQSB1_B

AT32

LPDDR3_M0_DQS0_B

AT34

LPDDR3_M0_DQSB0_B

AT42

LPDDR3_M0_DQS3_A

AT41

LPDDR3_M0_DQSB3_A

AV47

LPDDR3_M0_DQS2_A

AV48

LPDDR3_M0_DQSB2_A

AY52

LPDDR3_M0_DQS1_A

BA51

LPDDR3_M0_DQSB1_A

AM52

LPDDR3_M0_DQS0_A

AM51

LPDDR3_M0_DQSB0_A

BSW_MCP_EDS

?

DDR0

3

LPDDR3_M0_DQ31_B LPDDR3_M0_DQ30_B LPDDR3_M0_DQ29_B LPDDR3_M0_DQ28_B LPDDR3_M0_DQ27_B LPDDR3_M0_DQ26_B LPDDR3_M0_DQ25_B LPDDR3_M0_DQ24_B LPDDR3_M0_DQ23_B LPDDR3_M0_DQ22_B LPDDR3_M0_DQ21_B LPDDR3_M0_DQ20_B LPDDR3_M0_DQ19_B LPDDR3_M0_DQ18_B LPDDR3_M0_DQ17_B LPDDR3_M0_DQ16_B LPDDR3_M0_DQ15_B LPDDR3_M0_DQ14_B LPDDR3_M0_DQ13_B LPDDR3_M0_DQ12_B LPDDR3_M0_DQ11_B LPDDR3_M0_DQ10_B

LPDDR3_M0_DQ9_B LPDDR3_M0_DQ8_B LPDDR3_M0_DQ7_B LPDDR3_M0_DQ6_B LPDDR3_M0_DQ5_B LPDDR3_M0_DQ4_B LPDDR3_M0_DQ3_B LPDDR3_M0_DQ2_B LPDDR3_M0_DQ1_B LPDDR3_M0_DQ0_B

LPDDR3_M0_DQ31_A LPDDR3_M0_DQ30_A LPDDR3_M0_DQ29_A LPDDR3_M0_DQ28_A LPDDR3_M0_DQ27_A LPDDR3_M0_DQ26_A LPDDR3_M0_DQ25_A LPDDR3_M0_DQ24_A LPDDR3_M0_DQ23_A LPDDR3_M0_DQ22_A LPDDR3_M0_DQ21_A LPDDR3_M0_DQ20_A LPDDR3_M0_DQ19_A LPDDR3_M0_DQ18_A LPDDR3_M0_DQ17_A LPDDR3_M0_DQ16_A LPDDR3_M0_DQ15_A LPDDR3_M0_DQ14_A LPDDR3_M0_DQ13_A LPDDR3_M0_DQ12_A LPDDR3_M0_DQ11_A LPDDR3_M0_DQ10_A

LPDDR3_M0_DQ9_A LPDDR3_M0_DQ8_A LPDDR3_M0_DQ7_A LPDDR3_M0_DQ6_A LPDDR3_M0_DQ5_A LPDDR3_M0_DQ4_A LPDDR3_M0_DQ3_A LPDDR3_M0_DQ2_A LPDDR3_M0_DQ1_A LPDDR3_M0_DQ0_A

RSVD1 RSVD2

NC1 NC2 NC3

BG29 BG33 BG28 BH34 BJ33 BG32 BH28 BJ29 BH38 BJ37 BG43 BH36 BG37 BH42 BJ41 BG42 BD28 BD30 BC34 BD34 BA34 BF30 BA32 BF34 BD36 AV34 AV32 AU32 BF36 AU34 BA36 BC36

AP40 AT40 AV41 AP42 AT38 AP41 AV42 AT44 AT47 AT50 AV50 AP47 AV45 AP48 AY50 AY48 BC53 AW51 BB51 BC52 BD52 AW53 AV52 AV51 AT52 AR51 AP51 AL51 AK52 AK51 AR53 AL53

AT30 AU30 BA42 BF52 BH44

?1 OF 13REV = 1

M0_B_DQ31 M0_B_DQ30 M0_B_DQ29 M0_B_DQ28 M0_B_DQ27 M0_B_DQ26 M0_B_DQ25 M0_B_DQ24 M0_B_DQ23 M0_B_DQ22 M0_B_DQ21 M0_B_DQ20 M0_B_DQ19 M0_B_DQ18 M0_B_DQ17 M0_B_DQ16 M0_B_DQ15 M0_B_DQ14 M0_B_DQ13 M0_B_DQ12 M0_B_DQ11 M0_B_DQ10 M0_B_DQ9 M0_B_DQ8 M0_B_DQ7 M0_B_DQ6 M0_B_DQ5 M0_B_DQ4 M0_B_DQ3 M0_B_DQ2 M0_B_DQ1 M0_B_DQ0

M0_A_DQ31 M0_A_DQ30 M0_A_DQ29 M0_A_DQ28 M0_A_DQ27 M0_A_DQ26 M0_A_DQ25 M0_A_DQ24 M0_A_DQ23 M0_A_DQ22 M0_A_DQ21 M0_A_DQ20 M0_A_DQ19 M0_A_DQ18 M0_A_DQ17 M0_A_DQ16 M0_A_DQ15 M0_A_DQ14 M0_A_DQ13 M0_A_DQ12 M0_A_DQ11 M0_A_DQ10 M0_A_DQ9 M0_A_DQ8 M0_A_DQ7 M0_A_DQ6 M0_A_DQ5 M0_A_DQ4 M0_A_DQ3 M0_A_DQ2 M0_A_DQ1 M0_A_DQ0

2

M0_B_DQ31 [17] M0_B_DQ30 [17] M0_B_DQ29 [17] M0_B_DQ28 [17] M0_B_DQ27 [17] M0_B_DQ26 [17] M0_B_DQ25 [17] M0_B_DQ24 [17] M0_B_DQ23 [17] M0_B_DQ22 [17] M0_B_DQ21 [17] M0_B_DQ20 [17] M0_B_DQ19 [17] M0_B_DQ18 [17] M0_B_DQ17 [17] M0_B_DQ16 [17] M0_B_DQ15 [17] M0_B_DQ14 [17] M0_B_DQ13 [17] M0_B_DQ12 [17] M0_B_DQ11 [17] M0_B_DQ10 [17] M0_B_DQ9 [17] M0_B_DQ8 [17] M0_B_DQ7 [17] M0_B_DQ6 [17] M0_B_DQ5 [17] M0_B_DQ4 [17] M0_B_DQ3 [17] M0_B_DQ2 [17] M0_B_DQ1 [17] M0_B_DQ0 [17]

M0_A_DQ31 [17] M0_A_DQ30 [17] M0_A_DQ29 [17] M0_A_DQ28 [17] M0_A_DQ27 [17] M0_A_DQ26 [17] M0_A_DQ25 [17] M0_A_DQ24 [17] M0_A_DQ23 [17] M0_A_DQ22 [17] M0_A_DQ21 [17] M0_A_DQ20 [17] M0_A_DQ19 [17] M0_A_DQ18 [17] M0_A_DQ17 [17] M0_A_DQ16 [17] M0_A_DQ15 [17] M0_A_DQ14 [17] M0_A_DQ13 [17] M0_A_DQ12 [17] M0_A_DQ11 [17] M0_A_DQ10 [17] M0_A_DQ9 [17] M0_A_DQ8 [17] M0_A_DQ7 [17] M0_A_DQ6 [17] M0_A_DQ5 [17] M0_A_DQ4 [17] M0_A_DQ3 [17] M0_A_DQ2 [17] M0_A_DQ1 [17] M0_A_DQ0 [17]

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

BSW 1/10 (DDRA)

Tuesday, April 12, 2016 416

1

1A

5

4

3

2

1

BRASWELL - MEMORY LPDDR3 CHANNEL B

SoC (CPU)

D D

C C

R399

B B

A A

182/F_4

5

DDR3_VCCA_PWROK[39]

M1_B_A9[18] M1_B_A8[18] M1_B_A7[18] M1_B_A6[18] M1_B_A5[18] M1_B_A4[18] M1_B_A3[18] M1_B_A2[18] M1_B_A1[18] M1_B_A0[18]

M1_A_A9[18] M1_A_A8[18] M1_A_A7[18] M1_A_A6[18] M1_A_A5[18] M1_A_A4[18] M1_A_A3[18] M1_A_A2[18] M1_A_A1[18] M1_A_A0[18]

M1_CS1_N[18] M1_CS0_N[18]

M1_CKE1[18] M1_CKE0[18]

M1_B_CLKP0[18] M1_B_CLKN0[18]

M1_A_CLKP0[18] M1_A_CLKN0[18]

M1_B_ODT[18] M1_A_ODT[18]

+VREFCA1_R +VREFDQ1_R

M1_B_DM3[18] M1_B_DM2[18] M1_B_DM1[18] M1_B_DM0[18]

M1_A_DM3[18] M1_A_DM2[18] M1_A_DM1[18] M1_A_DM0[18]

M1_B_DQSP3[18] M1_B_DQSN3[18] M1_B_DQSP2[18] M1_B_DQSN2[18] M1_B_DQSP1[18] M1_B_DQSN1[18] M1_B_DQSP0[18] M1_B_DQSN0[18]

M1_A_DQSP3[18] M1_A_DQSN3[18] M1_A_DQSP2[18] M1_A_DQSN2[18] M1_A_DQSP1[18] M1_A_DQSN1[18] M1_A_DQSP0[18] M1_A_DQSN0[18]

M1_B_A9 M1_B_A8 M1_B_A7 M1_B_A6 M1_B_A5 M1_B_A4 M1_B_A3 M1_B_A2 M1_B_A1 M1_B_A0

M1_A_A9 M1_A_A8 M1_A_A7 M1_A_A6 M1_A_A5 M1_A_A4 M1_A_A3 M1_A_A2 M1_A_A1 M1_A_A0

M1_CS1_N M1_CS0_N

M1_CKE1 M1_CKE0

M1_B_CLKP0 M1_B_CLKN0

M1_A_CLKP0 M1_A_CLKN0

M1_B_ODT M1_A_ODT

DDR3_VCCA_PWROK DDR3_M1_RCOMPPD

M1_B_DM3 M1_B_DM2 M1_B_DM1 M1_B_DM0

M1_A_DM3 M1_A_DM2 M1_A_DM1 M1_A_DM0

M1_B_DQSP3 M1_B_DQSN3 M1_B_DQSP2 M1_B_DQSN2 M1_B_DQSP1 M1_B_DQSN1 M1_B_DQSP0 M1_B_DQSN0

M1_A_DQSP3 M1_A_DQSN3 M1_A_DQSP2 M1_A_DQSN2 M1_A_DQSP1 M1_A_DQSN1 M1_A_DQSP0 M1_A_DQSN0

U17B

BF10

LPDDR3_M1_CA9_B

BD10

LPDDR3_M1_CA8_B

AY14

LPDDR3_M1_CA7_B

BB8

LPDDR3_M1_CA6_B

BH6

LPDDR3_M1_CA5_B

BD12

LPDDR3_M1_CA4_B

BH7

LPDDR3_M1_CA3_B

BJ6

LPDDR3_M1_CA2_B

BC12

LPDDR3_M1_CA1_B

BB7

LPDDR3_M1_CA0_B

BG9

LPDDR3_M1_CA9_A

BH8

LPDDR3_M1_CA8_A

BA14

LPDDR3_M1_CA7_A

BD7

LPDDR3_M1_CA6_A

BD5

LPDDR3_M1_CA5_A

BJ9

LPDDR3_M1_CA4_A

BB5

LPDDR3_M1_CA3_A

BE8

LPDDR3_M1_CA2_A

BF6

LPDDR3_M1_CA1_A

BE2

LPDDR3_M1_CA0_A

AU16

LPDDR3_M1_CSB1

AY16

LPDDR3_M1_CSB0

AY12

LPDDR3_M1_CKE1_B

BB10

LPDDR3_M1_CKE0_B

BD14

LPDDR3_M1_CK_P_B

BF14

LPDDR3_M1_CK_N_B

BD16

LPDDR3_M1_CK_P_A

BF16

LPDDR3_M1_CK_N_A

AV18

LPDDR3_M1_ODT_B

BA16

LPDDR3_M1_ODT_A

AT26

DDR3_M1_OCAVREF

AU26

DDR3_M1_ODQVREF

AV26

DDR3_VCCA_PW ROK

BA26

DDR3_M1_RCOMP

AT6

LPDDR3_M1_DM3_B

AP10

LPDDR3_M1_DM2_B

AP2

LPDDR3_M1_DM1_B

BA1

LPDDR3_M1_DM0_B

BG13

LPDDR3_M1_DM3_A

BH24

LPDDR3_M1_DM2_A

AY18

LPDDR3_M1_DM1_A

BD22

LPDDR3_M1_DM0_A

AV7

LPDDR3_M1_DQS3_B

AV6

LPDDR3_M1_DQSB3_B

AT12

LPDDR3_M1_DQS2_B

AT13

LPDDR3_M1_DQSB2_B

AM2

LPDDR3_M1_DQS1_B

AM3

LPDDR3_M1_DQSB1_B

AY2

LPDDR3_M1_DQS0_B

BA3

LPDDR3_M1_DQSB0_B

BH14

LPDDR3_M1_DQS3_A

BG15

LPDDR3_M1_DQSB3_A

BH22

LPDDR3_M1_DQS2_A

BG23

LPDDR3_M1_DQSB2_A

AT22

LPDDR3_M1_DQS1_A

AT20

LPDDR3_M1_DQSB1_A

BC24

LPDDR3_M1_DQS0_A

BC22

LPDDR3_M1_DQSB0_A

BSW_MCP_EDS

REV = 1

4

BSW_MCP_EDS

?

LPDDR3_M1_DQ31_B LPDDR3_M1_DQ30_B

DDR1

LPDDR3_M1_DQ29_B LPDDR3_M1_DQ28_B LPDDR3_M1_DQ27_B LPDDR3_M1_DQ26_B LPDDR3_M1_DQ25_B LPDDR3_M1_DQ24_B LPDDR3_M1_DQ23_B LPDDR3_M1_DQ22_B LPDDR3_M1_DQ21_B LPDDR3_M1_DQ20_B LPDDR3_M1_DQ19_B LPDDR3_M1_DQ18_B LPDDR3_M1_DQ17_B LPDDR3_M1_DQ16_B LPDDR3_M1_DQ15_B LPDDR3_M1_DQ14_B LPDDR3_M1_DQ13_B LPDDR3_M1_DQ12_B LPDDR3_M1_DQ11_B LPDDR3_M1_DQ10_B

LPDDR3_M1_DQ9_B LPDDR3_M1_DQ8_B LPDDR3_M1_DQ7_B LPDDR3_M1_DQ6_B LPDDR3_M1_DQ5_B LPDDR3_M1_DQ4_B LPDDR3_M1_DQ3_B LPDDR3_M1_DQ2_B LPDDR3_M1_DQ1_B LPDDR3_M1_DQ0_B

LPDDR3_M1_DQ31_A LPDDR3_M1_DQ30_A LPDDR3_M1_DQ29_A LPDDR3_M1_DQ28_A LPDDR3_M1_DQ27_A LPDDR3_M1_DQ26_A LPDDR3_M1_DQ25_A LPDDR3_M1_DQ24_A LPDDR3_M1_DQ23_A LPDDR3_M1_DQ22_A LPDDR3_M1_DQ21_A LPDDR3_M1_DQ20_A LPDDR3_M1_DQ19_A LPDDR3_M1_DQ18_A LPDDR3_M1_DQ17_A LPDDR3_M1_DQ16_A LPDDR3_M1_DQ15_A LPDDR3_M1_DQ14_A LPDDR3_M1_DQ13_A LPDDR3_M1_DQ12_A LPDDR3_M1_DQ11_A LPDDR3_M1_DQ10_A

LPDDR3_M1_DQ9_A LPDDR3_M1_DQ8_A LPDDR3_M1_DQ7_A LPDDR3_M1_DQ6_A LPDDR3_M1_DQ5_A LPDDR3_M1_DQ4_A LPDDR3_M1_DQ3_A LPDDR3_M1_DQ2_A LPDDR3_M1_DQ1_A LPDDR3_M1_DQ0_A

2 OF 13

RSVD3 RSVD4

NC4 NC5 NC6

07

AY6 AY4 AP6 AV9 AP7 AV4 AT4 AT7 AT10 AV12 AP13 AT16 AP12 AV13 AT14 AP14 AL1 AR1 AK3 AK2 AL3 AP3 AR3 AT2 AV3 AV2 AW1 BD2 BC2 BB3 AW3 BC1

BG12 BJ13 BH12 BG17 BH18 BG11 BJ17 BH16 BJ25 BH26 BG22 BJ21 BH20 BG26 BG21 BG25 BC18 BA18 AU20 BF18 AU22 AV22 AV20 BD18 BF20 BA22 BF24 BA20 BD20 BC20 BD24 BD26

AT24 AU24 BA12 BF2 BH10

?

3

M1_B_DQ31 M1_B_DQ30 M1_B_DQ29 M1_B_DQ28 M1_B_DQ27 M1_B_DQ26 M1_B_DQ25 M1_B_DQ24 M1_B_DQ23 M1_B_DQ22 M1_B_DQ21 M1_B_DQ20 M1_B_DQ19 M1_B_DQ18 M1_B_DQ17 M1_B_DQ16 M1_B_DQ15 M1_B_DQ14 M1_B_DQ13 M1_B_DQ12 M1_B_DQ11 M1_B_DQ10 M1_B_DQ9 M1_B_DQ8 M1_B_DQ7 M1_B_DQ6 M1_B_DQ5 M1_B_DQ4 M1_B_DQ3 M1_B_DQ2 M1_B_DQ1 M1_B_DQ0

M1_A_DQ31 M1_A_DQ30 M1_A_DQ29 M1_A_DQ28 M1_A_DQ27 M1_A_DQ26 M1_A_DQ25 M1_A_DQ24 M1_A_DQ23 M1_A_DQ22 M1_A_DQ21 M1_A_DQ20 M1_A_DQ19 M1_A_DQ18 M1_A_DQ17 M1_A_DQ16 M1_A_DQ15 M1_A_DQ14 M1_A_DQ13 M1_A_DQ12 M1_A_DQ11 M1_A_DQ10 M1_A_DQ9 M1_A_DQ8 M1_A_DQ7 M1_A_DQ6 M1_A_DQ5 M1_A_DQ4 M1_A_DQ3 M1_A_DQ2 M1_A_DQ1 M1_A_DQ0

M1_B_DQ31 [18] M1_B_DQ30 [18] M1_B_DQ29 [18] M1_B_DQ28 [18] M1_B_DQ27 [18] M1_B_DQ26 [18] M1_B_DQ25 [18] M1_B_DQ24 [18] M1_B_DQ23 [18] M1_B_DQ22 [18] M1_B_DQ21 [18] M1_B_DQ20 [18] M1_B_DQ19 [18] M1_B_DQ18 [18] M1_B_DQ17 [18] M1_B_DQ16 [18] M1_B_DQ15 [18] M1_B_DQ14 [18] M1_B_DQ13 [18] M1_B_DQ12 [18] M1_B_DQ11 [18] M1_B_DQ10 [18] M1_B_DQ9 [18] M1_B_DQ8 [18] M1_B_DQ7 [18] M1_B_DQ6 [18] M1_B_DQ5 [18] M1_B_DQ4 [18] M1_B_DQ3 [18] M1_B_DQ2 [18] M1_B_DQ1 [18] M1_B_DQ0 [18]

M1_A_DQ31 [18] M1_A_DQ30 [18] M1_A_DQ29 [18] M1_A_DQ28 [18] M1_A_DQ27 [18] M1_A_DQ26 [18] M1_A_DQ25 [18] M1_A_DQ24 [18] M1_A_DQ23 [18] M1_A_DQ22 [18] M1_A_DQ21 [18] M1_A_DQ20 [18] M1_A_DQ19 [18] M1_A_DQ18 [18] M1_A_DQ17 [18] M1_A_DQ16 [18] M1_A_DQ15 [18] M1_A_DQ14 [18] M1_A_DQ13 [18] M1_A_DQ12 [18] M1_A_DQ11 [18] M1_A_DQ10 [18] M1_A_DQ9 [18] M1_A_DQ8 [18] M1_A_DQ7 [18] M1_A_DQ6 [18] M1_A_DQ5 [18] M1_A_DQ4 [18] M1_A_DQ3 [18] M1_A_DQ2 [18] M1_A_DQ1 [18] M1_A_DQ0 [18]

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

BSW 2/10 (DDRB)

Tuesday, April 12, 2016 417

1

1A

5

4

3

2

1

BRASWELL SOC - DISPLAY, XDP, EMMC, SD

SoC (CPU)

?

DDI0

DDI1

DDI2

BSW_MCP_EDS

3 OF 13

SDMMC1

SDMMC2

SDMMC3

3

RSVD15 RSVD12

RSVD14 RSVD13

MCSI_1_CLKP MCSI_1_CLKN

MCSI_1_DP_0 MCSI_1_DN_0 MCSI_1_DP_1 MCSI_1_DN_1 MCSI_1_DP_2 MCSI_1_DN_2 MCSI_1_DP_3 MCSI_1_DN_3

MCSI and Camera interface

MCSI_2_CLKP MCSI_2_CLKN

MCSI_2_DP_0 MCSI_2_DN_0 MCSI_2_DP_1 MCSI_2_DN_1

RSVD17 RSVD16

MCSI_COMP

GP_CAMERASB00 GP_CAMERASB01 GP_CAMERASB02 GP_CAMERASB03 GP_CAMERASB04 GP_CAMERASB05 GP_CAMERASB06 GP_CAMERASB07 GP_CAMERASB08

GP_CAMERASB09 GP_CAMERASB10 GP_CAMERASB11

SDMMC1_CLK

SDMMC1_CMD

SDMMC1_D0 SDMMC1_D1 SDMMC1_D2

SDMMC1_D3_CD_B

MMC1_D4_SD_WE

MMC1_D5 MMC1_D6 MMC1_D7

MMC1_RCLK

SDMMC1_RCOMP

SDMMC2_CLK

SDMMC2_CMD

SDMMC2_D0 SDMMC2_D1 SDMMC2_D2

SDMMC2_D3_CD_B

SDMMC3_CLK

SDMMC3_CMD

SDMMC3_CD_B

SDMMC3_D0 SDMMC3_D1 SDMMC3_D2 SDMMC3_D3

SDMMC3_1P8_EN

SDMMC3_PWR_EN_B

SDMMC3_RCOMP

M44 K44

K48 K47

T44 T45

Y47 Y48 V45 V47 V50 V48 T41 T42

P50 P48

P47 P45 M48 M47

T50 T48

P44 AB41

AB45 AB44 AC53 AB51 AB52 AA51 AB40 Y44

Y42 Y41 V40

M7 P6 M6

M4 P9 P7 T6 T7 T10 T12 T13 P13

K10 K9

M12 M10 K7 K6

F2 D2 K3

J1 J3 H3 G2

K2 L3 P12

?

R637 150/F_4

TP_RSVD_STRAP2

EMMC_CLK EMMC_CMD EMMC_D0

EMMC_D1 EMMC_D2 EMMC_D3 EMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7

EMMC_RCOMP

SD3_CLK

SDIO3_RCOMP

SD3_CLK

Q

R453 100/F_4

R452 80.6/F_4

C106 *33P/50V_4

2

SD MAPPING

SDMMC1

SDMMC2

SDMMC3

OBSDATA_C0 [16] OBSDATA_C1 [16] OBSDATA_C2 [16] OBSDATA_C3 [16] OBSDATA_D0 [16] OBSDATA_D1 [16] OBSDATA_D2 [16] OBSDATA_D3 [16] OBSFN_C0 [16,23]

SDMMC3_1P8_EN [41] SDMMC3_PWR_EN_N [19,41]

EMMC

NC

SD card

TP_RSVD_STRAP1 [23] TP_RSVD_STRAP2 [23]

EMMC_CLK [19]

EMMC_CMD [19] EMMC_D0 [19]

EMMC_D1 [19] EMMC_D2 [19] EMMC_D3 [19] EMMC_D4 [19] EMMC_D5 [19] EMMC_D6 [19] EMMC_D7 [19]

EMMC_RCLK [19]

SD3_CLK [19] SD3_CMD [19] SD3_CD# [19,21]

SD3_D0 [19] SD3_D1 [19] SD3_D2 [19] SD3_D3 [19]

Size Document Number Rev

Date: Sheet of

Tuesday, April 12, 2016 418

Date: Sheet of

Tuesday, April 12, 2016 418

Date: Sheet of

Tuesday, April 12, 2016 418

EMMC_CLK

PROJECT : NL6D

Quanta Computer Inc.

BSW 3/10 (DDI,SD,EMMC)

DISPLAY MAPPING

D D

DDI0

DDI1

DDI2

C C

EDP_HPD[20]

B B

A A

NA

eDP

HDMI

EDP_HPD

R105 100K/F_4

5

2

Q14

2N7002K

+V1P8A

3

1

R124

10K_4

+V1P8A

R155 *10K_4

R459 402/F_4

R458 402/F_4

TP80 TP79

TP72 TP74

TP75 TP76

EDP_TXP0_DP[20] EDP_TXN0_DN[20] EDP_TXP1_DP[20] EDP_TXN1_DN[20]

EDP_AUXP_DP[20] EDP_AUXN_DN[20]

EDP_BKLTEN[35] EDP_BKLTCTL[35] EDP_VDDEN[41]

INT_HDMITX2P_DP[22] INT_HDMITX2N_DN[22]

INT_HDMITX1P_DP[22] INT_HDMITX1N_DN[22] INT_HDMITX0P_DP[22] INT_HDMITX0N_DN[22]

INT_HDMICLK_DP[22] INT_HDMICLK_DN[22]

INT_HDMI_HPD[22]

HDMI_DDCCLK_SW[22]

HDMI_DDCDATA_SW[22]

DP_USB_C_HPD

DDI0_PLLOBS_DP DDI0_PLLOBS_DN

EDP_HPD_L

EDP_BKLTEN EDP_BKLTCTL EDP_VDDEN DDI1_PLLOBS_DP DDI1_PLLOBS_DN

INT_HDMI_HPD HDMI_DDCCLK_SW

HDMI_DDCDATA_SW

4

U17C

D50

DDI0_TXP_0

C51

DDI0_TXN_0

H49

DDI0_TXP_1

H50

DDI0_TXN_1

F53

DDI0_TXP_2

F52

DDI0_TXN_2

G53

DDI0_TXP_3

G52

DDI0_TXN_3

H47

DDI0_AUXP

H46

DDI0_AUXN

W51

HV_DDI0_HPD

Y51

HV_DDI0_DDC_SCL

Y52

HV_DDI0_DDC_SDA

V52

PANEL0_BKLTEN

V51

PANEL0_BKLTCTL

W53

PANEL0_VDDEN

F38

DDI0_PLLOBS_P

G38

DDI0_PLLOBS

J51

DDI1_TXP_0

H51

DDI1_TXN_0

K51

DDI1_TXP_1

K52

DDI1_TXN_1

L53

DDI1_TXP_2

L51

DDI1_TXN_2

M52

DDI1_TXP_3

M51

DDI1_TXN_3

M42

DDI1_AUXP

K42

DDI1_AUXN

R51

HV_DDI1_HPD

P51

PANEL1_BKLTEN

P52

PANEL1_BKLTCTL

R53

PANEL1_VDDEN

F47

DDI1_PLLOBS_P

F49

DDI1_PLLOBS

F40

DDI2_TXP_0

G40

DDI2_TXN_0

J40

DDI2_TXP_1

K40

DDI2_TXN_1

F42

DDI2_TXP_2

G42

DDI2_TXN_2

D44

DDI2_TXP_3

F44

DDI2_TXN_3

D48

DDI2_AUXP

C49

DDI2_AUXN

U51

HV_DDI2_HPD

T51

HV_DDI2_DDC_SCL

T52

HV_DDI2_DDC_SDA

B53

RSVD6

A52

RSVD3

E52

RSVD9

D52

RSVD8

B50

RSVD5

B49

RSVD4

E53

RSVD10

C53

RSVD7

A51

RSVD2

A49

RSVD1

G44

RSVD11

BSW_MCP_EDS

REV = 1

NC's

1

08

C293 *22p/50V_4

1A

5

4

3

2

1

PCIe MAPPING

BSW SOC - SATA, PCIe, SPI, I2S

SoC (CPU)

D D

EC_IN_RW_Q[35]

WIFI_DISABLE#[35]

TOUCH_INT#[35]

R451 402/F_4

TP68

C C

TP70 TP69

C315 *22p/50V_4

I2S_LRCLK_R I2S_BCLK_R

C323 *22p/50V_4

RAMID0[10]

MIC_PRESENT_L_SOC AUDIO_SWITCH_INT_N

I2S_BCLK_R[26]

I2S_LRCLK_R[26]

I2S_DOUT_R[26] I2S_DIN_R[26]

EC_IN_RW_Q TOUCH_INT#

RAMID0

SATA_RCOMP_DP SATA_RCOMP_DN

FAST_SPI_CLK FAST_SPI_CS0 LTE_DISABLE#

FAST_SPI_D0 FAST_SPI_D1

U17D

C31

SATA_TXP0

B30

SATA_TXN0

N28

SATA_RXP0

M28

SATA_RXN0

C29

SATA_TXP1

A29

SATA_TXN1

J28

SATA_RXP1

K28

SATA_RXN1

AH3

SATA_LEDN

AH2

SATA_GP0

AG3

SATA_GP1

AG1

SATA_GP2

AF3

SATA_GP3/SATA_DEVSLP1

N30

SATA_RCOMP_P

M30

SATA_RCOMP_N

W3

FST_SPI_CLK

V4

FST_SPI_CS0_B

V6

FST_SPI_CS1_B

V7

FST_SPI_CS2_B

V2

FST_SPI_D0

V3

FST_SPI_D1

U1

FST_SPI_D2

U3

FST_SPI_D3

AF13

MF_HDA_RSTB

AD6

MF_HDA_SDI1

AD9

MF_HDA_CLK

AD7

MF_HDA_SDI0

AF12

MF_HDA_SYNC

AF14

MF_HDA_SDO

AB9

MF_HDA_DOCKENB

AB7

MF_HDA_DOCKRSTB

H4

SPKR

AK9

GP_SSP_2_CLK

AK10

GP_SSP_2_FS

AK12

GP_SSP_2_TXD

AK13

GP_SSP_2_RXD

BSW_MCP_EDS

REV = 1

BSW_MCP_EDS

SATA

FAST SPI

AUDIO

?

4 OF 13

PCIE_TXP0

PCIE_TXN0 PCIE_RXP0 PCIE_RXN0

PCIE_TXP1

PCIE_TXN1

PCIE_RXP1 PCIE_RXN1

PCIE_TXP2

PCIe

PCIE_TXN2

PCIE_RXP2 PCIE_RXN2

PCIE_TXP3

PCIE_TXN3 PCIE_RXP3 PCIE_RXN3

PCIE_CLKREQ0B PCIE_CLKREQ1B PCIE_CLKREQ2B PCIE_CLKREQ3B

CLK_DIFF_P_0 CLK_DIFF_N_0 CLK_DIFF_P_1 CLK_DIFF_N_1 CLK_DIFF_P_2 CLK_DIFF_N_2 CLK_DIFF_P_3 CLK_DIFF_N_3

RSVD_C16 RSVD_B16

PCIE_RCOMP_P

SATA_RCOMP

SPI1_CLK

SPI1_CS0_B

SPI

SPI1_CS1_B

SPI1_MISO SPI1_MOSI

C24 B24 G20 J20

A25 C25 D20 F20

B26 C26 D22 F22

A27 C27 G24 J24

AM10 AM12 AK14 AM14

A21 C21 C19 B20 C18 B18 C17 A17 C16 B16

D26 F26

V14 Y13 Y12 V13 V12

?

PCIE_TX2_WLAN_C_DP PCIE_TX2_WLAN_C_DN PCIE_RX2_WLAN_DP PCIE_RX2_WLAN_DN

PCIE_CLKREQ_IMAGE# LTE_WAKE# PCIE_CLKREQ_WLAN# AUDIO_CODEC_IRQ

SOC_PCIE_COMP_DP SOC_PCIE_COMN_DN

PMIC_IRQ_N

PCIE0

PCIE1

PCIE2

NC

WIFI (StP)

PCIE3 NC

C108 0.1U/16V_4 C107 0.1U/16V_4

R460 402/F_4

PMIC_IRQ_N [39]

PCIE_TX2_WLAN_DP [24] PCIE_TX2_WLAN_DN [24] PCIE_RX2_WLAN_DP [24] PCIE_RX2_WLAN_DN [24]

PCIE_CLKREQ_WLAN# [24]

AUDIO_CODEC_IRQ [26]

CLK_PCIE_WLANP_DP [24] CLK_PCIE_WLANN_DN [24]

Q

WLAN

TP55

WLAN

PCIE_CLKREQ_IMAGE# PCIE_CLKREQ_WLAN# EC_IN_RW_Q

AUDIO_CODEC_IRQ LTE_WAKE#

R406 *10K_4 R261 *10K_4 R374 10K_4

R416 10K_4 R409 10K_4

09

+V1P8A

B B

BIOS ROM(CPU)

+V1P8A_ME +V3P3A_EC

+V1P8A_ME

R16

R4

100K_4

*100K_4

SPI_WP_ME

GPIO_SPI_WP[21]

R2 *0_4S

R3 *0_4S

3.3V

SPI_WP_ME_ROM_Q

From debug header

SPI_WP_ME_ROM_Q [30]

Q1

A A

SPI_WP_ME[27]

PJA138K

1

3

PCH_SPI_WP_D

2

R17 1K_4

+V1P8A

PCH_SPI_WP_D [10]

to SoC

From Screw

5

4

C1 0.1U/16V_4

2 1

U1

3 5

NL17SZ08DFT2G

SPI_HOLD#_BIOS[21]

4

From debug header

+V1P8A +V1P8A_ME

1

+V3P3A

SOC_SPI_WP#

R18 100K_4

R299 *0_4

3

Q8 PJA138K

2

SOC_SPI_WP# [34]

SOC_SPI_HOLD#

FAST_SPI_CS0

3

C13

0.1U/16V_4

SOC_SPI_WP# SOC_SPI_HOLD# SOC_SPI_MOSI_R SOC_SPI_MISO_R SOC_SPI_CLK_R

R19 3.3K/F_4 R272 *3.3K/F_4 R315 3.3K/F_4 R301 *3.3K/F_4 R279 *3.3K/F_4 R314 *3.3K/F_4

SPI NOR FLASH

U7

8

VCC

3

WP#

SOC_SPI_HOLD#

SOC_SPI_MOSI_R SOC_SPI_MISO_R SOC_SPI_CS#_R SOC_SPI_CLK_R

SPI_HOLD7GND

SPI_FLASH_W25Q64FWSSIG

For ICT, place on TOP side

SPI_SI

SPI_SO

CS#

SPI_SCK

TP6 TP1 TP2 TP7

2

5

SOC_SPI_MOSI_R

2

SOC_SPI_MISO_R

1

SOC_SPI_CS#_R

6

SOC_SPI_CLK_RSOC_SPI_WP#

4

R292 10_4 R270 10_4 R258 10_4 R298 10_4

R284 0_4 R287 0_4 R273 0_4 R290 0_4

GD_SPI_SI_R [21] GD_SPI_SO_R [21] GD_SPI_CS0#_R [21]

GD_SPI_CLK_R [21]

CAD note: Place near to SPI flash

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

BSW 4/10 (PCIE/SATA/SPI)

Tuesday, April 12, 2016 419

1

FAST_SPI_D0 FAST_SPI_D1 FAST_SPI_CS0 FAST_SPI_CLK

+V1P8A_ME

1A

5

4

3

2

1

SoC (CPU)

D D

C C

TP28

19.2MHz X'tal

B B

C116 22p/50V_4

A A

BRASWELL - I2C, XDP, SM BUS

AJACK_PRESENT_SOC[35]

SOC_KBC_SMI[23]

C111 22p/50V_4

19.2MHz crystal

I2S_MCLK_R[26]

XDP_GPIO_DFX0[16] XDP_GPIO_DFX1[16] XDP_GPIO_DFX2[16] XDP_GPIO_DFX3[16] XDP_GPIO_DFX4[16] XDP_GPIO_DFX5[16] XDP_GPIO_DFX6[16] XDP_GPIO_DFX7[16] XDP_GPIO_DFX8[16]

SOC_WAKE_SCI_N[23,34]

MUX_AUD_INT1#[23,35] EC_SMI_L[23,34] KBD_IRQ#[23,34]

EC_KBD_ALERT_SOC[23]

SOC_RUNTIME_SCI[16,23]

TRACKPAD_INT#[23,29] NFC_FW_RESET#[23]

TP_RSVD_STRAP3[23]

NFC_PWR_MANAGE[23]

R100 *0_4S

1

2

Y1

19.2MHZ +-30PPM

4

3

5

XTAL19_2_IN XTAL19_2_OUT

R444 2.49K/F_4 R448 49.9/F_4

I2S_MCLK_R RAMID2

DFX_SUS_DBG_STRAP EC_KBD_ALERT_SOC

SIM_DET_C

R139 100/F_4

SOC_GPIO_RCOMP

AJACK_PRESENT_SOC

pullup at level shifter side

DFX_SUS_DBG_STRAP

XTAL19_2_OUT

R168 200K/F_4

XTAL19_2_IN

U17E

P24

OSCIN

M22

OSCOUT

J26

RSVD13

N26

RSVD17

ICLK_ICOMP ICLK_RCOMP

P20

ICLKICOMP

N20

ICLKRCOMP

P26

RSVD18

K26

RSVD14

M26

RSVD16

AH45

RSVD1

A9

MF_PLT_CLK0

C9

MF_PLT_CLK1

B8

MF_PLT_CLK2

B7

MF_PLT_CLK3

B5

MF_PLT_CLK4

B4

MF_PLT_CLK5

AM40

GPIO_DFX0

AM41

GPIO_DFX1

AM44

GPIO_DFX2

AM45

GPIO_DFX3

AM47

GPIO_DFX4

AK48

GPIO_DFX5

AM48

GPIO_DFX6

AK41

GPIO_DFX7

AK42

GPIO_DFX8

AD51

GPIO_SUS0

AD52

GPIO_SUS1

AH50

GPIO_SUS2

AH48

GPIO_SUS3

AH51

GPIO_SUS4

AH52

GPIO_SUS5

AG51

GPIO_SUS6

AG53

GPIO_SUS7

AF52

SEC_GPIO_SUS9

AF51

SEC_GPIO_SUS8

AE51

SEC_GPIO_SUS10

AC51

SEC_GPIO_SUS11

AH40

GPIO0_RCOMP

Y3

GPIO_ALERT

BSW_MCP_EDS

REV = 1

0312 added KBD_ALERT pin to notify SoC to lock ME FW Keep reserving this feature in DVT build

EC_KBD_ALERT[30]

Vender RAM_ID[2..0]

RAM_ID3

0 (1-CH) Hynix Micron Samsung Micron Samsung AKD5QWST508 K4E8E304EE-EGCF 1866MHz

0 (1-CH) 2GB

0 (1-CH)

1 (2-CH) 000 Hynix Micron Samsung Micron

1 (2-CH)

4

BSW_MCP_EDS

iCLK

PLTFM CLK's

GPIO_DFX

GPIO_SUS

EC_KBD_ALERT_SOC

3

2

Q13 PJA138K

1

000 1866MHzSamsung K4E8E304EE-EGCF 001 010 011 100

001 010 011 100

?

RESERVED ISH GPIOs - RSVD for type C GPIOs

C11 B10 F12 F10

D12 E8 C7 D6

J12 F7 J14 L13

AK6 AH7

AF6 AH6

AF9 AF7

AE4 AD2

AC1 AD3

AB2 AC3

AA1 AB3

AA3 Y2

AM6 AM7 AM9

3

TP_HOST_DETECT TP_DEVICE_DETECT TP_POL_DETECT TP_WAKE_ALERT#

I2C_1_SCL I2C_1_SDA

I2C_NFC_SCL I2C_NFC_SDA

RAMID1 RAMID3

I2C_6_SCL SDCARD_WP

SMB_SOC_CLK SMB_SOC_DATA TP_GPIO_2_SOC

Freq.Mfr. PNQ PN Size

1866MHz 1866MHz 1866MHz 1866MHz

RSVD3 RSVD2 RSVD9

RESERVED

I2C

SMBUS

5 OF 13

RSVD8 RSVD5

RSVD7 RSVD4 RSVD6

RSVD11 RSVD10 RSVD12 RSVD15

I2C0_SCL

I2C0_SDA

I2C1_SCL

I2C1_SDA

I2C2_SCL

I2C2_SDA

I2C3_SCL

I2C3_SDA

I2C4_SCL

I2C4_SDA

I2C5_SCL

I2C5_SDA

I2C6_SCL

I2C6_SDA

RSVD_AA3

RSVD_Y2

MF_SMB_CLK

MF_SMB_DATA

MF_SMB_ALERTB

?

AKD5QWST508 AKD5RW0TW53 AKD5QWSTL01 4Gb AKD5QWST521 K4E8E324EB-EGCF

H9CCNNN8GTMLAR-NUD MT52L256M32D1PF-107

WT:B

AKD5QWWT401 EDF8132A3MA-JD-F-R

AKD5RW0TW53 AKD5QWSTL01 AKD5QWST521 K4E8E324EB-EGCF

H9CCNNN8GTMLAR-NUD MT52L256M32D1PF-107

WT:B

AKD5QWWT401 EDF8132A3MA-JD-F-R

TP40 TP35 TP77 TP78

I2C_1_SCL [39] I2C_1_SDA [39]

I2C_4_SCL [35] I2C_4_SDA [35]

I2C_5_SCL [35] I2C_5_SDA [35]

TP30

SDCARD_WP [19]

SMB_SOC_CLK [35] SMB_SOC_DATA [35]

RAMID

Total Size

4Gb

2GB

4Gb0 (1-CH)

2GB

4Gb

2GB

4Gb

2GB

4Gb

4GB 4GB

4Gb1 (2-CH)

4GB

4Gb1 (2-CH) 4Gb

4GB

4Gb

4GB

PCH_SPI_WP_D [9]

I2C_0_SCL_R [35] I2C_0_SDA_R [35]

TP64 TP65

R400 10K_4 R441 10K_4 R162 10K_4 R445 10K_4

Samsung Hynix

R527 *10K_4 R534 *10K_4

Micron

2

+V1P8A

R115 4.7K_4 R68 *10K_4 R61 *10K_4 R489 2.2K_4 R486 2.2K_4 R156 4.7K_4

SOC_WAKE_SCI_N KBD_IRQ# EC_SMI_L I2C_1_SCL I2C_1_SDA SDCARD_WP

Touch panel PMIC

Audio

Level shifter is stuffed for Audio codec and MIC switch

Track pad

Level shifter is stuffed Level shifter of Track Pad INT is stuffed

TP60

RAMID0 [9]

RAMID0 RAMID1 RAMID2 RAMID3

R526 *10K_4 R533 *10K_4

Size Document Number Rev

Date: Sheet of

R401 *10K_4 R447 *10K_4 R166 *10K_4 R446 *10K_4

Quanta Computer Inc.

BSW 5/10 (I2C/DFX/GPIO)

Tuesday, April 12, 2016 4110

+V1P8A

For BOM, place BOT side

PROJECT : NL6D

1

10

1A

5

4

3

2

1

BRASWELL - USB INTERFACE

SoC (CPU)

D D

BSW_MCP_EDS

U17F

TP36 TP37 TP73 TP81

USB3_TXP1_DP[27]

USB3_TXN1_DN[27] USB3_RXP1_DP[27] USB3_RXN1_DN[27]

USB3_TXP2_DP[28]

USB3_TXN2_DN[28] USB3_RXP2_DP[28] USBP4_DP [24]

C C

SOC_UART_TX SOC_UART_RX

B B

R1 *0_4

Un-Stuff for Test Only

USB3_RXN2_DN[28]

USB3_OBSP_DP

R461

402/F_4

USB3_OBSN_DN

B32 C32 F28 D28

A33 C33 F30 D30

C34 B34

G32

C35 A35

G34

D34 F34

C37 A37 F36

D36 M34 M32

C38

B38

G36

N34

P34

J32

J34

J36

REV = 1

USB3_TXP0 USB3_TXN0 USB3_RXP0 USB3_RXN0

USB3_TXP1 USB3_TXN1 USB3_RXP1 USB3_RXN1

USB3_TXP2 USB3_TXN2 USB3_RXP2 USB3_RXN2

USB3_TXP3 USB3_TXN3 USB3_RXP3 USB3_RXN3

USB3_RCOMP_P USB3_OBSN

RSVD4 RSVD1 RSVD7 RSVD6 RSVD11 RSVD10

RSVD5 RSVD2 RSVD8 RSVD9

RSVD12 RSVD13

BSW_MCP_EDS

?

USB3.0

USB_HSIC_0_STROBE

USB_HSIC_0_DATA

HSICUART

USB_HSIC_1_STROBE

USB_HSIC_1_DATA

USB_HSIC_RCOMP

RESERVED

6 OF 13

USB_OTG_ID

USB_DP0 USB_DN0

USB_DP1 USB_DN1

USB_DP2 USB_DN2

USB_DP3 USB_DN3

USB_DP4 USB_DN4

USB_OC1_B

USB2.0

USB_OC0_B

USB_RCOMP1

USB_VBUSSNS

USB_RCOMP

UART1_TXD

UART1_RXD UART1_CTS_B UART1_RTS_B

UART2_TXD

UART2_RXD UART2_CTS_B UART2_RTS_B

B48 C42 B42

C43 B44

C41 A41

C45 A45

B40 C40

P16 P14

B46 B47 A48

M36 N36

K38 M38 N38

AD10 AD12 AD13 AD14

Y6 Y7 V9 V10

?

TP_USB_OTG_ID USBP0_DP USBP0_DN

USB_OC1# USB_OC0#

USB_VBUSSNS

USB_RCOMP

USB_HSIC_RCOMP

SOC_UART_TX SOC_UART_RX

TP33 TP39 TP38

USBP1_DP [28]

USBP1_DN [28]

USBP2_DP [28]

USBP2_DN [28]

USBP3_DP [20]

USBP3_DN [20]

R316 10K_4 R428 10K_4

USBP4_DN [24]

R158 10K_4 R157 113/F_4

R450 *49.9/F_4

11

USB3.0_2 USB3.0_1 CCD BT

USB_OC1# [28,34]

+V1P8A

USB_OC0# [28,34]

SOC_UART_TX [21]

SOC_UART_RX [21]

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BSW 6/10 (USB)

Tuesday, April 12, 2016 4111

1

1A

5

4

3

2

1

C115

0.1U/16V_4

12

+V1P8S

+V1P8A

BRASWELL - JTAG, LPC, THERMAL, PMU

SoC (CPU)

D D

XDP_H_TCK[16] XDP_H_TDI[16] XDP_H_TDO[16] XDP_H_TMS[16]

XDP_H_TRST#[16]

XDP_H_PRDY_N[16]

R455 10K_4

CLK_PCI_EC[27,30]

R449 100/F_4 R500 *0_4S

C C

CLK_PCI_EC

C297 *22p/50V_4

XDP_H_PREQ_N[16]

CLK_PCI_EC

TP32

LPC_CLKRUN_L[30] LPC_LFRAME#[27,30]

ILB_SERIRQ[34]

R457 10_4

LPC_LAD0[27,30] LPC_LAD1[27,30] LPC_LAD2[27,30] LPC_LAD3[27,30]

PROCHOT#[21,30]

PLACE 'CC' CAP NEAR SOC

RSVD_M13 CLK_PCI_EC_SOC

TP_L_CLKOUT1

RCOMP_LPC_HVT ILB_SERIRQ

+V1P8A

PROCHOT#

CC

R48 20K_4

C49

0.1U/16V_4

AF42 AD47 AF40 AD48 AB48

AD45 AF41

M13

P28 P30

AF50

AF48 AF44 AF45

AD50

P2

R3

T3 P3

M3 M2 N3 N1

T4 T2

H5 H7

REV = 1

U17G

TCK TDI TDO TMS TRST_B

CX_PRDY_B CX_PREQ_B RSVD5

MF_LPC_CLKOUT0 MF_LPC_CLKOUT1 LPC_CLKRUNB LPC_FRAMEB

MF_LPC_AD0 MF_LPC_AD1 MF_LPC_AD2 MF_LPC_AD3

LPC_HVT_RCOMP ILB_SERIRQ

RSVD_H5 RSVD_H7

RSVD6 RSVD7 RSVD4 RSVD3 RSVD1 RSVD2 PROCHOT_B

BSW_MCP_EDS

JTAG/ITP

Reserved

?

BRTCX1_PAD RTC_EXTPAD

RTC

COREPW ROK

SUSPWRDNACK

SUS_STAT_B

PMU_SUSCLK PMU_SLP_S4_B PMU_SLP_S3_B

PMU_RESETBUTTON_B

PMU

LPC

PMU_PLTRST_B

PMU_BATLOW_B

PMU_AC_PRESENT

PMU_SLP_S0IX_B PMU_SLP_LAN_B

PMU_WAKE_B

PMU_PW RBTN_B

PMU_WAKE_LAN_B

PWM

SVID

SVID0_ALERT_B

CORE_VCC0_SENSE CORE_VSS0_SENSE CORE_VCC1_SENSE CORE_VSS1_SENSE

Voltage sense

DDI_VGG_SENSE UNCORE_VSS_SENSE2 UNCORE_VSS_SENSE1

7 OF 13

RTCX2_PAD

SRTCRST_B

RSMRST_B

RTC_TEST

RSVD_VSS

SVID0_CLK

SVID0_DATA

M18 K18 F16

D18 G16 F18 J16 G18

AE3 D14 C15 C12 B14 AF2 F14 C14 C13 A13 B12 N16 M16 P18

AD42 AD41 AD40

AG32 AJ32 AD29 AF27 AD24 AD22 AC27

?

RTC_X1 RTC_X2 BRTC_EXTPAD

SRTCRST# CORE_PWROK_R SOC_RSMRST# SOC_RTEST# RSVD_VSS_G18

PMC_SUSPWRDNACK PMC_SUS_STAT# PMC_SUSCLK0 SLP_S4# SLP_S3# SOC_REST_BTN# SOC_PLTRST# PMC_BATLOW# ACPRESENT SLP_S0IX# TP_SOC_SLP_LAN# SOC_PMC_WAKE# SOC_PWRBTN# TP_PMU_WAKE_LAN_B

SVID_ALERT#

+VCORE_VCC0_SENSEP_DP +VCORE_VCC1_SENSEP_DP

R56 100K_4

C302 0.1U/16V_4

CORE_PWROK_R [16,30,39] SOC_RSMRST# [16,34]

PMC_SUSPWRDNACK [34] PMC_SUS_STAT# [34] PMC_SUSCLK0 [35] SLP_S4# [34,39] SLP_S3# [34,39,41] SOC_REST_BTN# [16,21,34] SOC_PLTRST# [16,19,34]

ACPRESENT [35]

SLP_S0IX# [34,39]

PCH_WAKE_L [34]

SOC_PWRBTN# [34]

+V1P05A_R_SOC

R96 0_4 R95 0_4

SENSEP and SENSEN differential routing

RTC 32.768KHz X'tal

Y2 32.768KHZ

1 2

R169 10M_4

C117 15P/50V_4

R160 10K/F_4

TP34

TP71

+VCC_SENSEP_DP [39]

+VGG_SENSEP_DP [39] +VNN_SENSEP [39]

RTC_X2

C114 15P/50V_4

PLACE 'CB' CAP NEAR SOC

CORE_PWROK_R

CB

O_1.8VA

SOC_PMC_WAKE# [35]

SOC_REST_BTN#

PMC_SUSPWRDNACK SOC_PMC_WAKE# ACPRESENT PMC_BATLOW#

R487 *10K_4

R443 10K_4 R499 10K_4 R163 2.2K_4 R466 10K_4

B B

VBATA_VR_HOT_N[37] TEMP_ALERT#[33]

TEMP_ALERT#

RTC Circuitry(RTC)

R60 *0_4S R53 *0_4S

+VRTC +VRTC

PROCHOT#VBATA_VR_HOT_N

RTC CIRCUIT

R476 20K_4

A A

EC_STRAP_GPIO1[30]

3

2

Q50 2N7002K

1

5

SRTCRST# SOC_RTEST#

C314 1u/6.3V_4

EC_STRAP_GPIO1

4

3

2

Q49 2N7002K

1

R482 20K_4

C313 1u/6.3V_4

R484 *0_6S

Imax support up to 100uA Estimate 1.5mW Ploss at Imax

3

+VRTC+V3P3A_LDO

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

BSW 7/10 (JTAG/LPC//PMU)

Tuesday, April 12, 2016 4112

1

1A

5

4

3

2

1

SoC (CPU)

D D

C C

PLACE THESE CAPS CLOSE TO AK30, AK35, AK38 AND AM29

PLACE THESE CAPS CLOSE TO AM19 AND AK21

B B

BRASWELL - POWER 1

+VCC

C241

1U/10V_4

C88 22uF/6.3V_6

C91 22uF/6.3V_6

C90 22uF/6.3V_6

C89 22uF/6.3V_6

C269 22uF/6.3V_6

C261 22uF/6.3V_6

C266

C272 22uF/6.3V_6

1U/10V_4

C251

1U/10V_4

C254 10u/6.3V_4

C246

1U/10V_4

C83

1U/10V_4

C244

4.7U/6.3V_4

+V1P15A

C257

4.7U/6.3V_4

C252 10u/6.3V_4

C247

1U/10V_4

C248

1U/10V_4

+VCC

+V1P15A

+VGG

C78

1U/10V_4

C82

C264

4.7U/6.3V_4

C256

4.7U/6.3V_4

1U/10V_4

C253 10u/6.3V_4

C77

1U/10V_4

+V1P15A

C265

4.7U/6.3V_4

C263

4.7U/6.3V_4

U17H

AF36

CORE_VCC1_S0IX3

AG33

CORE_VCC1_S0IX7

AG35

CORE_VCC1_S0IX8

AG36

CORE_VCC1_S0IX9

AG38

CORE_VCC1_S0IX10

AJ33

CORE_VCC1_S0IX14

AJ36

CORE_VCC1_S0IX15

AJ38

CORE_VCC1_S0IX16

AF30

CORE_VCC1_S0IX2

AG27

CORE_VCC1_S0IX4

AG29

CORE_VCC1_S0IX5

AG30

CORE_VCC1_S0IX6

AJ27

CORE_VCC1_S0IX11

AJ29

CORE_VCC1_S0IX12

AJ30

CORE_VCC1_S0IX13

AF29

CORE_VCC1_S0IX1

AD16

DDI_VGG_S0IX1

AD18

DDI_VGG_S0IX2

AD19

DDI_VGG_S0IX3

AF16

DDI_VGG_S0IX4

AF18

DDI_VGG_S0IX5

AF19

DDI_VGG_S0IX6

AF21

DDI_VGG_S0IX7

AF22

DDI_VGG_S0IX8

AJ19

DDI_VGG_S0IX15

AG16

DDI_VGG_S0IX9

AG18

DDI_VGG_S0IX10

AG19

DDI_VGG_S0IX11

AG21

DDI_VGG_S0IX12

AG22

DDI_VGG_S0IX13

AG24

DDI_VGG_S0IX14

AJ21

DDI_VGG_S0IX16

AJ22

DDI_VGG_S0IX17

AJ24

DDI_VGG_S0IX18

AK24

DDI_VGG_S0IX19

AK30

CORE_V1P15_S0IX1

AK35

CORE_V1P15_S0IX2

AK36

CORE_V1P15_S0IX3

AM29

CORE_V1P15_S0IX4

AK33

FUSE_V1P15_S0IX2

AJ35

FUSE_V1P15_S0IX1

AM19

VCCSRAMGEN_1P152

AK21

VCCSRAMGEN_1P151

BSW_MCP_EDS

REV = 1

?

BSW_MCP_EDS

UNCORE_VNN_S41 UNCORE_VNN_S42 UNCORE_VNN_S43 UNCORE_VNN_S44 UNCORE_VNN_S45 UNCORE_VNN_S46 UNCORE_VNN_S47 UNCORE_VNN_S48

UNCORE_VNN_S49 UNCORE_VNN_S410 UNCORE_VNN_S411 UNCORE_VNN_S412 UNCORE_VNN_S413 UNCORE_VNN_S414

VCCSRAMSOCIUN_1P056 VCCSRAMSOCIUN_1P051 VCCSRAMSOCIUN_1P052 VCCSRAMSOCIUN_1P053 VCCSRAMSOCIUN_1P054 VCCSRAMSOCIUN_1P055 VCCSRAMSOCIUN_1P057 VCCSRAMSOCIUN_1P058 VCCSRAMSOCIUN_1P059

VCCSRAMSOCIUN_1P0510

ICLK_GND_OFF2

iCLKDDRPCIeSATAUSBFUSE

ICLK_GND_OFF1

DDR_V1P05A_G31 DDR_V1P05A_G34 DDR_V1P05A_G32 DDR_V1P05A_G35 DDR_V1P05A_G36 DDR_V1P05A_G33

PCIE_V1P05A_G31 PCIE_V1P05A_G32

SATA_V1P05A_G32 SATA_V1P05A_G31

USB3_V1P05A_G32

USB3_V1P05A_G31

USBSSIC_V1P05A_G3

FUSE3_V1P05A_G5

FUSE_V1P05A_G3

8 OF 13

RSVD1

PLACE THESE CAPS CLOSE TO AA18, AA19, AA21, AA22, AA24, AA25, AC18, AC19, AC21, AC22, AC24, AC25, AD25 AND AD27

AA18 AA19 AA21 AA22 AA24 AA25 AC18 AC19 AC21 AC22 AC24 AC25 AD25 AD27

AA30 V33 AA32 AA33 AA35 AA36 AC32 Y30 Y32 Y33 Y35

V19 V18

AM21 AM33 AM22 AN22 AN32 AM32

V22 V24

U24 U22

V27 U27 V29

N18 U19

?

C280 1U/10V_4

+V1P05A_R_SOC

C312

1U/10V_4

+V1P05A_R_SOC

C233

1U/10V_4

+V1P05A_R_SOC

C306

1U/10V_4

+V1P05A_R_SOC

C120

1U/10V_4

C76 22uF/6.3V_6

C281

1U/10V_4

C278

C112

1U/10V_4

C273

1U/10V_4

C79 22uF/6.3V_6

PLACE THIS CAP CLOSE TO N18

C283 1U/10V_4

PLACE THESE CAPS CLOSE TO V33, AA32, AA33, AA35, AA36, AC32, Y30, Y32, Y33 AND Y35

1U/10V_4

+V1P05A_R_SOC

C286 1U/10V_4

C230

1U/10V_4

C295

1U/10V_4

+V1P05A_R_SOC

C289

1U/10V_4

C271

C288

1U/10V_4

C113

1U/10V_4

C101 22uF/6.3V_6

C100 22uF/6.3V_6

PLACE THIS CAP CLOSE TO V19 AND V18

PLACE THESE CAPS CLOSE TO AM21, AM33, AM22, AN22, AN32 AND AM32

C229

1U/10V_4

C225 22uF/6.3V_6

C226 22uF/6.3V_6

C232

1U/10V_4

C231

0305 added 4x1uF,4x22uF,1x10uF on DDR_V1P05A

PLACE THESE CAPS CLOSE TO V22, V24, U24, U22, V27 AND U27

C307

C308

1U/10V_4

PLACE THESE CAPS CLOSE TO U19

C294

1U/10V_4

+VNN

C102 22uF/6.3V_6

1U/10V_4

+V1P05A_R_SOC

13

C227 22uF/6.3V_6

C310 22uF/6.3V_6

C224 10u/6.3V_6

R173 *0.002_1206_S

5

+VCCSFRPLLDDR_1P24_1P35

+VCCCLKDDR_1P24_1P35

+V1P05A_R_SOC

C311 *22uF/6.3V_6

+V1P05A_R_SOC

C98 22uF/6.3V_6

CAD NOTE: PLACE CLOSE TO PIN AM21, AM33, AM22, AN22, AN32 AND AM32 POWER PLANE

4

3

C99 22uF/6.3V_6

C119 22uF/6.3V_6

DUMMY CAPS. TO BE DELETED IN NEXT REVISION

2

C309 *22uF/6.3V_6

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

BSW 8/10 (Power 1)

Tuesday, April 12, 2016 4113

1

1A

+VDDQ

R348 *0_6S

+VDDQ

R350 *0_6S

A A

+V1P05A +V1P05A_R_SOC

1 2

5

SoC (CPU)

PLACE THESE CAPS CLOSE TO AM25

+VCCCLKDDR_1P24_1P35

D D

PLACE THESE CAPS CLOSE TO THE DDR_VDDQ_G_ PINS

PLACE THESE CAPS CLOSE TO E1 AND E2

C C

C211 22uF/6.3V_6

C31 22uF/6.3V_6

PLACE THESE CAPS CLOSE TO G1

PLACE THESE CAPS CLOSE TO AH4 AND AF4

+V1P8A_R_SOC

C287 1U/10V_4

PLACE THESE CAPS CLOSE TO Y18

BRASWELL - POWER 2

PLACE THESE CAPS CLOSE TO AN27

+VCCSFRPLLDDR_1P24_1P35

C210 22uF/6.3V_6

C29 22uF/6.3V_6

+VCCPADCF3SI0_1P8_3P3

C103 1U/10V_4

C260 1U/10V_4

+V1P8A_R_SOC

C290 1U/10V_4

C239 1U/10V_4

C34 22uF/6.3V_6

C292 1U/10V_4

PLACE THESE CAPS CLOSE TO AD33, AK18, AF33 AND AK19

C301 1U/10V_4

C94 1U/10V_4

C35 22uF/6.3V_6

C240 1U/10V_4

+VDDQ

+VCCPADCF1SI0_1P8_3P3

+VCCCFIOAZA_1P80

4

U17I

AN27

DDRSFR_VDDQ_G_S4

AM25

DDR_VDDQ_G_S42

BE1

DDR_VDDQ_G_S416

BE53

DDR_VDDQ_G_S419

BJ2

DDR_VDDQ_G_S426

BJ3

DDR_VDDQ_G_S427

BJ49

DDR_VDDQ_G_S428

BJ5

DDR_VDDQ_G_S429

BH50

DDR_VDDQ_G_S425

BH5

DDR_VDDQ_G_S424

BH49

DDR_VDDQ_G_S423

BH4

DDR_VDDQ_G_S422

BE3

DDR_VDDQ_G_S417

BG51

DDR_VDDQ_G_S421

BG3

DDR_VDDQ_G_S420

BJ51

DDR_VDDQ_G_S430

BJ52

DDR_VDDQ_G_S431

AY10

DDR_VDDQ_G_S414

AY44

DDR_VDDQ_G_S415

AV44

DDR_VDDQ_G_S413

AV10

DDR_VDDQ_G_S410

BE51

DDR_VDDQ_G_S418

AV38

DDR_VDDQ_G_S412

AV16

DDR_VDDQ_G_S411

AU36

DDR_VDDQ_G_S49

AU18

DDR_VDDQ_G_S48

AN36

DDR_VDDQ_G_S47

AN35

DDR_VDDQ_G_S46

AN19

DDR_VDDQ_G_S45

AN18

DDR_VDDQ_G_S44

AM36

DDR_VDDQ_G_S43

AM18

DDR_VDDQ_G_S41

E1

SDIO_V3P3A_V1P8A_G31

E2

SDIO_V3P3A_V1P8A_G32

G1

SDIO_V3P3A_V1P8A_G33

AH4

VCCCFIOAZA_1P802

AF4

VCCCFIOAZA_1P801

Y18

GPIO_V1P8A_G35

AD33

GPIO_V1P8A_G31

AK18

GPIO_V1P8A_G33

AF33

GPIO_V1P8A_G32

AK19

GPIO_V1P8A_G34

BSW_MCP_EDS

REV = 1

?

BSW_MCP_EDS

DDR

9 OF 13

DDI_VDDQ_G31 DDI_VDDQ_G32

MIPI_V1P2A_G32 MIPI_V1P2A_G31

ICLK_VSFR_G32 ICLK_VSFR_G31

CORE_VSFR_G35 CORE_VSFR_G36 CORE_VSFR_G31

CORE_VSFR_G34 CORE_VSFR_G32 CORE_VSFR_G33

CORE_VSFR_G31_AC36

USBHSIC_V1P2A_G3

USB_VDDQ_G32 USB_VDDQ_G33 USB_VDDQ_G31

USBRTCFUSE

USBSSIC_V1P2A_G3

USB_V1P8A_G3

USB_V3P3A_G32 USB_V3P3A_G31

RTC_V3P3RTC_G52 RTC_V3P3RTC_G51

RTC_V3P3A_G51 RTC_V3P3A_G52

FUSE_V1P8A_G3 FUSE1_V1P05A_G4 FUSE0_V1P05A_G3

RSVD_VSS

RSVD1 RSVD2

3

+V1P24A_MIPI_SOC

+V1P24A_R_SOC

PLACE THESE CAPS CLOSE TO Y27 & Y25

C284

V36 Y36

T40 P40

Y27 Y25

P38 V30 AC30

AF35 AD35 AD38 AC36

M41 U35 V35 H44 P41

AA29 C23

B22 C5

B6 D4 E3

+V1P8A_R_SOC

U16 H10 G10 A3

RSVD_VSS_A3

K20 M20

?

1U/10V_4

+V1P24A_R_SOC

C285 1U/10V_4

+V1P24A_SSIC_HSIC_SOC

+VCCRTCSUS_3P3

+V1P05A_R_SOC

R159 10K_4

PLACE THESE CAPS CLOSE TO P38, V30 & AC30

C270 1U/10V_4

+V1P24A_R_SOC

C303 1U/10V_4

+VCCUSB2_3P3

+VCCRTC_3P3

C110 1U/10V_4

C304 1U/10V_4

C296 1U/10V_4

+V1P24A_R_SOC

C277 1U/10V_4

C105 1U/10V_4

2

C291 1U/10V_4

+V1P24A_R_SOC

C279

PLACE THESE CAPS

1U/10V_4

CLOSE TO V36 & Y36

R454 *0_6S

PLACE THESE CAPS CLOSE TO AF35, AD35, AD38 & AC36

C274 1U/10V_4

R463 *0_6S

C299

C300

1U/10V_4

+V1P8A_R_SOC

C96 1U/10V_4

+V1P24A_R_SOC

C282 1U/10V_4

1

14

+V1P24A_R_SOC

PLACE THESE CAPS CLOSE TO THEIR PINS

B B

+V3P3A_PRIME

R464 *0_6S

PLACE CAPS NEAR SOC

+VRTC

R167 *0_6S

A A

+V1P8A

R456 *0_6S

5

+VCCRTCSUS_3P3

+VCCRTC_3P3

+V1P8A_R_SOC

C305

0.1U/16V_4

C109

0.1U/16V_4

+V1P24A

PLACE THIS CAP CLOSE TO U16

+V1P24A_R_SOC

R164 *0_6S

+V1P8A_R_SOC +V1P05A_R_SOC

C298 1U/10V_4

4

PLACE THIS CAP CLOSE TO G10 & H10

C118

1U/10V_4

R465 *0_6S

SD3 IO SUPPLY

+V3P3A_PRIME

R462 *0_6S

LPC IO SUPPLY

+V1P8A +VCCCFIOAZA_1P80

R404 *0_6S

AUDIO IO SUPPLY

R161 *0_6S

3

+VCCPADCF3SI0_1P8_3P3+VSDIO

+VCCPADCF1SI0_1P8_3P3

+VCCUSB2_3P3+V3P3A_PRIME

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

BSW 9/10 (Power 2)

Tuesday, April 12, 2016 4114

1

1A

5

4

3

2

1

SoC (CPU)

BRASWELL - GND

15

BSW_MCP_EDS

VSS5 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS103 VSS84 VSS102 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS60 VSS59 VSS58 VSS56 VSS55 VSS54 VSS53 VSS6 VSS57

BSW_MCP_EDS

Power-VSS

?

11 OF 13

VSS61 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45

VSS4 VSS3

VSS2 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38

VSS1 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10

VSS9

VSS8

VSS7

U17L

AY9 AY28 AY26 AY24 AY22 AY20 AW35 AW27 AW19 AM13 AK29 AK22 AV40 AV35 AV30 AV27 AV24 AV19 AV14 AJ18 AU53 AU51 AU3 AU1 AT9 AT51 AT45 AT36 AT35 AT3 AT27 AT19 AT18 AP9 AP50 AP45 AP4 AN9 AN8 AN6 AN53 AN51 AN5 AN49 AN48 AN46 AN45 AN43 AN42 AN40 AN38

?

AN33

AF24

N53 N51 N32 N24 N22

M40 M35 M27

AW13

M19 M14

M45

M50

P32 P27 P22 P19

K45

L35 L27 L19

K50 T47

K36 K34 K32 K30 K24 K22 K16 K14 K12

E46 H35 H27 H19

V25

M9

L1

K4

J53 J38

J35 J30 J27 J22 J19 J18

H8

REV = 1

AN21 BG30 BG27 BG24 BG20 BG19 BG18 BG16 BG14 BF42 BF32 BF28 BF27 BF26 BF22 BF12 BE35 BE19

C20

BD53

BG7 BD35 BD27 BD19

BD1 BC44 BC40 BC38 BC28 BC26 BC16 BC14 BC10 BB35 BB27 BB19 BA35 BA30 BA27 BA24 BA19

B36

B28

AY7 AY51 AY47 AY34 AY32 AY30

AY3 AN30 AY45

U17K

REV = 1

D D

C C

B B

AN3 AN29 AN25 AN24 AN16 AN14 AN12 AN11

AN1 AM50 AM42

AM4 AM38 AM35 AH44 AM30 AM27

U25 P10

AM16

AD4

AK7

AK50 AK47 AK45 AK44 AK40

AK4

AK38 AK32 AK27 AK25

AM24

AK16 AJ53 AJ51

AJ25 AJ16

AH9 AH47 AH42 AH41 AH14 AH13 AH12 AH10 AG25

AF47

U17J

AJ3

AJ1

REV = 1

BSW_MCP_EDS

VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS60 VSS84 VSS83 VSS100 VSS99 VSS81 VSS31 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS82 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52

BSW_MCP_EDS

Power-VSS

?

10 OF 13

VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS30 VSS23 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10

VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1

AF38 AF32 AF25 AF10 AE9 AE8 AE6 AE53 AE50 AE48 AE46 AE45 AE43 AE42 AE40 AE14 AE12 AE11 AE1 AD44 AD36 AC29 AD32 AD30 AD21 AC38 AC35 AC33 AC16 AB6 AB50 AB47 AB42 AB4 AB14 AB13 AB12 AB10 AA53 AA38 AA27 AA16 A47 A43 A39 A31 A23 A19 A15 A11

?

BSW_MCP_EDS

VSS2 VSS99 VSS98 VSS97 VSS96 VSS1 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90

VSS77 VSS87 VSS86 VSS85 VSS3 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS100 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS88 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS40 VSS56 VSS55 VSS54 VSS89 VSS101

BSW_MCP_EDS

Power-VSS

?

12 OF 13

VSS102

VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS65 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23

VSS4 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

Y24 G30 G28 G26 G22 G14 G12 F5 F35 F32 F27 F24 F19 E51 E35 E19 D42 D40 D38 D32 D27 D24 D16 D10 J42 C47 C39 C36 C30 C3 C28 C22 AW41 BJ7 BJ47 BJ43 BJ39 BJ35 BJ31 BJ27 BJ23 BJ19 BJ15 BJ11 BG5 BG49 BG40 BG38 BG36 BG35 BG34

?

BH53 BH52

BH2 BH1

BG53

BG1

M24 BF50 BB50

BG47

B52

BF4

BB4

Y50 Y45 Y40

Y38 Y29 Y22 Y21 Y19 Y16 Y14 Y10

L41 P36

U17M

F1 C1

B2 A6

A5

A7

Y9

Y4

P4

REV = 1

BSW_MCP_EDS

Power-VSS

VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF10 VSS_NCTF5 VSS_NCTF4

VSS_NCTF2 VSS_NCTF1

VSSA VSS3 VSS9 VSS8 VSS7

VSS6 VSS11

VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58

VSS22 VSS19 VSS21

BSW_MCP_EDS

?

13 OF 13

VSS57 VSS56 VSS55 VSS54 VSS53

VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37

VSS35 VSS34 VSS33 VSS32

VSS31 VSS30 VSS36 VSS29 VSS28 VSS27 VSS26 VSS23 VSS25 VSS24

VSS20

W1 V44 V42 V41 V38

V32 V21 V16 U9 U8 U6 U53 U5 U49 U48 U46 U45 U43 U42 U40 U38

U33 U32 U30 U29

U21 U18 U36 U14 U12 U11 T9 P42 T14 R1

P35

?

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BSW 10/10 (GND)

Tuesday, April 12, 2016 4115

1

1A

5

4

3

2

1

60 PIN XDP

CN12

GND

1

31

OBSFN_A0

3

XDP (DBG)

D D

SOC_RSMRST#[12,34]

+VPP1800_XDP_AB +VPP1800_XDP_CD

C187

0.1U/16V_4

C C

+V1P8A +VPP1800_XDP_AB +V1P8A

R335 *0_6S R332 *0_4S

PCH_PWRBTN_L[30,34]

CORE_PWROK_R[12,30,39]

SOC_RUNTIME_SCI[10,23]

SMB_XDP_SDA[35]

SMB_XDP_SCL[35]

XDP_H_TCK[12]

+VPP1800_XDP_CD

XDP_H_PREQ_N[12]

XDP_H_PRDY_N[12]

XDP_GPIO_DFX0[10] XDP_GPIO_DFX1[10]

XDP_GPIO_DFX2[10] XDP_GPIO_DFX3[10]

XDP_GPIO_DFX8[10]

XDP_GPIO_DFX4[10] XDP_GPIO_DFX5[10]

XDP_GPIO_DFX6[10] XDP_GPIO_DFX7[10]

R317 1K_4 R333 *0_4S

R311 10K_4 R313 1K_4

XDP_RSMRST# XDP_PMU_PWRBTN#

XDP_COREPWROK XDP_RTEST#

SMB_XDP_SDA SMB_XDP_SCL

XDP_H_TCK

32

OBSFN_A1

5

33

GND

7

34

OBSDATA_A_0

9

35

OBSDATA_A_1

11

36

GND

13

37

OBSDATA_A_2

15

38

OBSDATA_A_3

17

39

GND

19

40

OBSFN_B0

21

41

OBSFN_B1

23

42

GND

25

43

OBSDATA_B_0

27

44

OBSDATA_B_1

29

45

GND

31

46

OBSDATA_B_2

33

47

OBSDATA_B_3

35

48

GND

37

49

HOOK0

39

50

HOOK1

41

51

VCC_OBS_AB VCC_OBS_CD

43

52

HOOK2

45

53

HOOK3

47

54

GND

49

55

SDA

51

56

SCL

53

57

TCK1

55

58

TCK0

57

59

GND

59

60

*SEC_BSH-030-01-L-D-A-TR

GND_XDP_PRESENT

OBSFN_C0 OBSFN_C1

OBSDATA_C_0 OBSDATA_C_1

OBSDATA_C_2 OBSDATA_C_3

OBSFN_D_0 OBSFN_D_1

OBSDATA_D_0 OBSDATA_D_1

OBSDATA_D_2 OBSDATA_D_3

ITPCLK/HOOK4

ITPCLK#/HOOK5

RESET#/HOOK6

DBR#/HOOK7

TRSTn

GND

2

30

4

29

6

28

GND

8

27

10

26

12

25

GND

14

24

16

23

18

22

GND

20

21

22

20

24

19

GND

26

18

28

17

30

16

GND

32

15

34

14

36

13

GND

38

12

40

11

42

10

44

9

46

8

48

7

GND

50

6

TDO

52

5

54

4

TDI

56

3

TMS

58

2

60

1

XDP_PMU_PLTRST# XDP_PMU_RSTBTN#

XDP_PRESENT_N

R312 1K_4 R329 *0_4S

R285 *0_4S

OBSFN_C0 [8,23]

OBSDATA_C0 [8] OBSDATA_C1 [8]

OBSDATA_C2 [8] OBSDATA_C3 [8]

OBSDATA_D0 [8] OBSDATA_D1 [8]

OBSDATA_D2 [8] OBSDATA_D3 [8]

SOC_PLTRST# [12,19,34] SOC_REST_BTN# [12,21,34]

XDP_H_TDO [12]

XDP_H_TRST# [12] XDP_H_TDI [12] XDP_H_TMS [12]

16

C185

0.1U/16V_4

APS

PULL-UPS AND DOWNS FOR XDP SIGNALS

+VPP1800_XDP_AB

B B

+V3P3A

RE

XDP_PMU_PWRBTN#

A A

PLACE 'RA' RESISTOR WITHIN 0.25" FROM XDP PIN

XDP_H_TDO

R334 2K/F_4

PLACE' RB','RC' RESISTORS WITHIN 1" FROM SoC PIN

XDP_H_TMS XDP_H_TDI

C188

0.1U/16V_4

PLACE 'RD' RESISTOR WITHIN 1" FROM SoC PIN

XDP_H_TCK XDP_H_TRST#

RA

R306 51/F_4

R291 51/F_4 R300 51/F_4

RB RC

+V1P8A

RD CA

R107 51/F_4

R323 51/F_4 R310 51/F_4

C268 0.1U/16V_4

PLACE THIS CAP CLOSE TO LAYER TRANSITION OF XDP_H_TCK SIGNAL TRANSITION

PLACE 'CA' capacitor closed to PIN 47

C180 0.1U/16V_4

XDP_RTEST#XDP_H_PREQ_N

XDP_PMU_RSTBTN#

In reference board,RE is 2K and RF is stuffed

5

4

3

R322 4.7K_4C184 0.1U/16V_4

+V1P8A

RF

R330 1K_4

+V1P8A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

XDP

Tuesday, April 12, 2016 4116

1

1A

1

CHANNEL A:8Gb*2 LPDDR3

U3A

L8

M0_A_DM0[6] M0_A_DM1[6] M0_A_DM2[6]

A A

B B

M0_A_DM3[6]

M0_A_A0[6] M0_A_A1[6] M0_A_A2[6] M0_A_A3[6] M0_A_A4[6] M0_A_A5[6] M0_A_A6[6] M0_A_A7[6] M0_A_A8[6] M0_A_A9[6]

M0_CKE0[6] M0_CKE1[6]

M0_A_CLKP0[6] M0_A_CLKN0[6]

M0_CS0_N[6] M0_CS1_N[6]

M0_A_ODT[6]

M0_A_DM0 M0_A_DM1 M0_A_DM2 M0_A_DM3

M0_A_A0 M0_A_A1 M0_A_A2 M0_A_A3 M0_A_A4 M0_A_A5 M0_A_A6 M0_A_A7 M0_A_A8 M0_A_A9

M0_CKE0 M0_CKE1

M0_A_CLKP0 M0_A_CLKN0 M0_B_ZQ0

M0_A_ZQ0 M0_A_ZQ1

R271

R277

240/F_4

*240/F_4

M0_CS0_N M0_CS1_N

M0_A_ODT

DM0

G8

DM1

P8

DM2

D8

DM3

R2

CA0

P2

CA1

N2

CA2

N3

CA3

M3

CA4

F3

CA5

E3

CA6

E2

CA7

D2

CA8

C2

CA9

K3

CKE0

K4

CKE1

J3

CK

J2

CK#

B3

ZQ0

B4

ZQ1

U12

DNU1

U1

DNU2

T1

DNU3

B1

DNU4

A12

DNU5

A1

DNU6

A2

DNU7

A13

DNU8

B13

DNU9

T13

DNU10

U2

DNU11

U13

DNU12

L3

CS0#

L4

CS1#

J8

ODT

C4

NC1

K9

NC2

R3

NC3

bit:0-31

LPDDR3

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

DQS0 DQS1 DQS2 DSQ3

DQS0# DQS1# DQS2# DQS3#

FBGA-178pin

LPDDR3_FPGA

2

P9 N9 N10 N11 M8 M9 M10 M11 F11 F10 F9 F8 E11 E10 E9 D9 T8 T9 T10 T11 R8 R9 R10 R11 C11 C10 C9 C8 B11 B10 B9 B8

L10 G10 P10 D10

L11 G11 P11 D11

M0_A_DQ0 M0_A_DQ1 M0_A_DQ2 M0_A_DQ3 M0_A_DQ4 M0_A_DQ5 M0_A_DQ6 M0_A_DQ7 M0_A_DQ8 M0_A_DQ9 M0_A_DQ10 M0_A_DQ11 M0_A_DQ12 M0_A_DQ13 M0_A_DQ14 M0_A_DQ15 M0_A_DQ16 M0_A_DQ17 M0_A_DQ18 M0_A_DQ19 M0_A_DQ20 M0_A_DQ21 M0_A_DQ22 M0_A_DQ23 M0_A_DQ24 M0_A_DQ25 M0_A_DQ26 M0_A_DQ30 M0_A_DQ28 M0_A_DQ29 M0_A_DQ27 M0_A_DQ31

M0_A_DQSP0 M0_A_DQSP1 M0_A_DQSP2 M0_A_DQSP3

M0_A_DQSN0 M0_A_DQSN1 M0_A_DQSN2 M0_A_DQSN3

M0_A_DQ0 [6] M0_A_DQ1 [6] M0_A_DQ2 [6] M0_A_DQ3 [6] M0_A_DQ4 [6] M0_A_DQ5 [6] M0_A_DQ6 [6] M0_A_DQ7 [6] M0_A_DQ8 [6] M0_A_DQ9 [6] M0_A_DQ10 [6] M0_A_DQ11 [6] M0_A_DQ12 [6] M0_A_DQ13 [6] M0_A_DQ14 [6] M0_A_DQ15 [6] M0_A_DQ16 [6] M0_A_DQ17 [6] M0_A_DQ18 [6] M0_A_DQ19 [6] M0_A_DQ20 [6] M0_A_DQ21 [6] M0_A_DQ22 [6] M0_A_DQ23 [6] M0_A_DQ24 [6] M0_A_DQ25 [6] M0_A_DQ26 [6] M0_A_DQ30 [6] M0_A_DQ28 [6] M0_A_DQ29 [6] M0_A_DQ27 [6] M0_A_DQ31 [6]

M0_A_DQSP0 [6] M0_A_DQSP1 [6] M0_A_DQSP2 [6] M0_A_DQSP3 [6]

M0_A_DQSN0 [6] M0_A_DQSN1 [6] M0_A_DQSN2 [6] M0_A_DQSN3 [6]

3

LPDDR3 MEMORY CHANNEL A

U3B

LPDDR3

B2

VSS1

B5

VSS2

C5

VSS3

E4

VSS4

E5

VSS5

F5

VSS6

H2

VSS7

J12

VSS8

K2

VSS9

L6

VSS10

M5

VSS11

N4

VSS12

N5

VSS13

R4

VSS14

R5

VSS15

T2

VSS16

T3

VSS17

T4

VSS18

T5

VSS19

B6

VSSQ1

B12

VSSQ2

C6

VSSQ3

D12

VSSQ4

E6

VSSQ5

F6

VSSQ6

F12

VSSQ7

G6

VSSQ8

G9

VSSQ9

H10

VSSQ10

K10

VSSQ11

L9

VSSQ12

M6

VSSQ13

M12

VSSQ14

N6

VSSQ15

P12

VSSQ16

R6

VSSQ17

T6

VSSQ18

T12

VSSQ19

C3

VSSCA1

D3

VSSCA2

F4

VSSCA3

G3

VSSCA4

G4

VSSCA5

J4

VSSCA6

M4

VSSCA7

P3

VSSCA8

FBGA-178pin

VDD1-1 VDD1-2 VDD1-3 VDD1-4 VDD1-5 VDD1-6 VDD1-7 VDD1-8 VDD1-9

VDD1-10

VDD2-1 VDD2-2 VDD2-3 VDD2-4 VDD2-5 VDD2-6 VDD2-7 VDD2-8

VDD2-9 VDD2-10 VDD2-11 VDD2-12 VDD2-13 VDD2-14 VDD2-15 VDD2-16 VDD2-17 VDD2-18 VDD2-19 VDD2-20

VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17

VREF_CA VREF_DQ

LPDDR3_FPGA

A3 A4 A5 A6 A10 U3 U5 U4 U6 U10

A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U9 U8

F2 G2 H3 L2 M2

A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11

H4 J11

+V1P8U_MEM

+VDDQ

+VREFCA0 +VREFDQ0

4

5

6

7

8

17

bit:32-63

U4A

L8

R278 240/F_4

M0_B_DM0 M0_B_DM1 M0_B_DM2 M0_B_DM3

M0_B_A0 M0_B_A1 M0_B_A2 M0_B_A3 M0_B_A4 M0_B_A5 M0_B_A6 M0_B_A7 M0_B_A8 M0_B_A9

M0_CKE0 M0_CKE1

M0_B_CLKP0 M0_B_CLKN0

M0_B_ZQ1

R286 *240/F_4

M0_CS0_N M0_CS1_N

M0_B_ODT

DM0

G8

DM1

P8

DM2

D8

DM3

R2

CA0

P2

CA1

N2

CA2

N3

CA3

M3

CA4

F3

CA5

E3

CA6

E2

CA7

D2

CA8

C2

CA9

K3

CKE0

K4

CKE1

J3

CK

J2

CK#

B3

ZQ0

B4

ZQ1

U12

DNU1

U1

DNU2

T1

DNU3

B1

DNU4

A12

DNU5

A1

DNU6

A2

DNU7

A13

DNU8

B13

DNU9

T13

DNU10

U2

DNU11

U13

DNU12

L3

CS0#

L4

CS1#

J8

ODT

C4

NC1

K9

NC2

R3

NC3

LPDDR3

FBGA-178pin

LPDDR3_FPGA

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

DQS0 DQS1 DQS2 DSQ3

DQS0# DQS1# DQS2# DQS3#

P9

M0_B_DQ0

DQ0

N9

M0_B_DQ1

DQ1

N10

M0_B_DQ2

DQ2

N11

M0_B_DQ3

DQ3

M8

M0_B_DQ4

DQ4

M9

M0_B_DQ5

DQ5

M10

M0_B_DQ6

DQ6

M11

M0_B_DQ7

DQ7

F11

M0_B_DQ8

DQ8

F10

M0_B_DQ9

DQ9

F9

M0_B_DQ10

F8

M0_B_DQ11

E11

M0_B_DQ12

E10

M0_B_DQ13

E9

M0_B_DQ14

D9

M0_B_DQ15

T8

M0_B_DQ16

T9

M0_B_DQ17

T10

M0_B_DQ18

T11

M0_B_DQ19

R8

M0_B_DQ20

R9

M0_B_DQ21

R10

M0_B_DQ22

R11

M0_B_DQ23

C11

M0_B_DQ24

C10

M0_B_DQ25

C9

M0_B_DQ26

C8

M0_B_DQ27

B11

M0_B_DQ28

B10

M0_B_DQ29

B9

M0_B_DQ30

B8

M0_B_DQ31

L10

M0_B_DQSP0

G10

M0_B_DQSP1

P10

M0_B_DQSP2

D10

M0_B_DQSP3

L11

M0_B_DQSN0

G11

M0_B_DQSN1

P11

M0_B_DQSN2

D11

M0_B_DQSN3

M0_B_DQ0 [6] M0_B_DQ1 [6] M0_B_DQ2 [6] M0_B_DQ3 [6] M0_B_DQ4 [6] M0_B_DQ5 [6] M0_B_DQ6 [6] M0_B_DQ7 [6] M0_B_DQ8 [6] M0_B_DQ9 [6] M0_B_DQ10 [6] M0_B_DQ11 [6] M0_B_DQ12 [6] M0_B_DQ13 [6] M0_B_DQ14 [6] M0_B_DQ15 [6] M0_B_DQ16 [6] M0_B_DQ17 [6] M0_B_DQ18 [6] M0_B_DQ19 [6] M0_B_DQ20 [6] M0_B_DQ21 [6] M0_B_DQ22 [6] M0_B_DQ23 [6] M0_B_DQ24 [6] M0_B_DQ25 [6] M0_B_DQ26 [6] M0_B_DQ27 [6] M0_B_DQ28 [6] M0_B_DQ29 [6] M0_B_DQ30 [6] M0_B_DQ31 [6]

M0_B_DQSP0 [6] M0_B_DQSP1 [6] M0_B_DQSP2 [6] M0_B_DQSP3 [6]

M0_B_DQSN0 [6] M0_B_DQSN1 [6] M0_B_DQSN2 [6] M0_B_DQSN3 [6]

M0_B_DM0[6] M0_B_DM1[6] M0_B_DM2[6] M0_B_DM3[6]

M0_B_A0[6] M0_B_A1[6] M0_B_A2[6] M0_B_A3[6] M0_B_A4[6] M0_B_A5[6] M0_B_A6[6] M0_B_A7[6] M0_B_A8[6] M0_B_A9[6]

M0_B_CLKP0[6] M0_B_CLKN0[6]

M0_B_ODT[6]

U4B

LPDDR3

B2

VSS1

B5

VSS2

C5

VSS3

E4

VSS4

E5

VSS5

F5

VSS6

H2

VSS7

J12

VSS8

K2

VSS9

L6

VSS10

M5

VSS11

N4

VSS12

N5

VSS13

R4

VSS14

R5

VSS15

T2

VSS16

T3

VSS17

T4

VSS18

T5

VSS19

B6

VSSQ1

B12

VSSQ2

C6

VSSQ3

D12

VSSQ4

E6

VSSQ5

F6

VSSQ6

F12

VSSQ7

G6

VSSQ8

G9

VSSQ9

H10

VSSQ10

K10

VSSQ11

L9

VSSQ12

M6

VSSQ13

M12

VSSQ14

N6

VSSQ15

P12

VSSQ16

R6

VSSQ17

T6

VSSQ18

T12

VSSQ19

C3

VSSCA1

D3

VSSCA2

F4

VSSCA3

G3

VSSCA4

G4

VSSCA5

J4

VSSCA6

M4

VSSCA7

P3

VSSCA8

FBGA-178pin

VDD1-1 VDD1-2 VDD1-3 VDD1-4 VDD1-5 VDD1-6 VDD1-7 VDD1-8 VDD1-9

VDD1-10

VDD2-1 VDD2-2 VDD2-3 VDD2-4 VDD2-5 VDD2-6 VDD2-7 VDD2-8

VDD2-9 VDD2-10 VDD2-11 VDD2-12 VDD2-13 VDD2-14 VDD2-15 VDD2-16 VDD2-17 VDD2-18 VDD2-19 VDD2-20

VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17

VREF_CA VREF_DQ

LPDDR3_FPGA

A3 A4 A5 A6 A10 U3 U5 U4 U6 U10

A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U9 U8

F2 G2 H3 L2 M2

A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11

H4 J11

+V1P8U_MEM

+VDDQ

+VREFCA0 +VREFDQ0

VTT TERMINATIONS

DE-CAPS FOR MEMORY CHANNEL A

+VDDQ

C C

D D

CAD note: Distributed around all LPDDR3 devices (CHA)

C11 10U/6.3V_6

C39 10U/6.3V_6

C12 10U/6.3V_6

C36 10U/6.3V_6

CAD NOTE: Place these Caps near each LPDDR3 Memory Down

C186 1U/6.3V_4

C170 1U/6.3V_4

C207 1U/6.3V_4

C148 1U/6.3V_4

C173 1U/6.3V_4

C177 1U/6.3V_4

C192 1U/6.3V_4

C162 1U/6.3V_4

C183 1U/6.3V_4

C137 1U/6.3V_4

C208

C178

1U/6.3V_4

C174 1U/6.3V_4

+VDDQ_VTT

C143 1U/6.3V_4

2

C161 1U/6.3V_4

C200 1U/6.3V_4

C136 1U/6.3V_4

C189

C175

1U/6.3V_4

C190 1U/6.3V_4

C199

C159

1U/6.3V_4

C147 1U/6.3V_4 C3

C142 1U/6.3V_4 C202

1

PLACE 1 CAPS NEAR EACH LPDDR3

+VREFCA0

C176

C172

*0.047U/10V_4

+V1P8U_MEM

C163 1U/6.3V_4

1U/6.3V_4

3

C201 1U/6.3V_4

+VREFDQ0

C171 1U/6.3V_4

C191 *0.047U/10V_4

C193 *0.047U/10V_4

10U/6.3V_6

C2 10U/6.3V_6

4

M0_A_CLKP0 M0_A_CLKN0

M0_B_CLKP0 M0_B_CLKN0

M0_CKE0 M0_CKE1 M0_CS0_N M0_CS1_N

M0_A_A0 M0_A_A1 M0_A_A2 M0_A_A3 M0_A_A4 M0_A_A5 M0_A_A6 M0_A_A7 M0_A_A8 M0_A_A9

M0_B_A0 M0_B_A1 M0_B_A2 M0_B_A3 M0_B_A4 M0_B_A5 M0_B_A6 M0_B_A7 M0_B_A8 M0_B_A9

R253 80.6/F_4 R254 80.6/F_4

R257 80.6/F_4 R256 80.6/F_4

R205 80.6/F_4 R209 80.6/F_4 R207 80.6/F_4 R214 80.6/F_4

R247 80.6/F_4 R250 80.6/F_4 R249 80.6/F_4 R248 80.6/F_4 R246 80.6/F_4 R237 80.6/F_4 R266 80.6/F_4 R238 80.6/F_4 R263 80.6/F_4 R218 80.6/F_4

R268 80.6/F_4 R216 80.6/F_4 R217 80.6/F_4 R234 80.6/F_4 R251 80.6/F_4 R233 80.6/F_4 R212 80.6/F_4 R235 80.6/F_4 R231 80.6/F_4 R232 80.6/F_4

5

+VDDQ_VTT

M0_A_CLKP0_N0_C

+VDDQ_VTT

M0_B_CLKP0_N0_C

C151

0.1U/16V_4

C153

0.1U/16V_4

VREF_CA AND DQ CIRCUITS

+VDDQ

6

VOLTAGE MERGE

+V1P8U +V1P8U_MEM

R165 *0_6S

+VREFDQ0 +VREFDQ0_R

R339 *0_4S

+VREFCA0 +VREFCA0_R

R320 *0_4S

R293 *4.7K/F_4

R302 *4.7K/F_4

C44

0.1U/16V_4

Vref_CA Vref_DQ

+VREFCA0

+VDDQ

C18

C47

0.1U/16V_4

7

+VDDQ

R342 *4.7K/F_4

R340 *4.7K/F_4

C22

0.1U/16V_4

Size Document Number Rev

Date: Sheet of

+VREFDQ0

PROJECT : NL6D

Quanta Computer Inc.

ON BOARD_LPDDR3_A

Tuesday, April 12, 2016 4117

1A

8

5

CHANNEL B:8Gb*2 LPDDR3

bit:0-31 bit:32-63

D D

C C

M1_A_DM0[7] M1_A_DM1[7] M1_A_DM2[7] M1_A_DM3[7]

M1_A_A0[7] M1_A_A1[7] M1_A_A2[7] M1_A_A3[7] M1_A_A4[7] M1_A_A5[7] M1_A_A6[7] M1_A_A7[7] M1_A_A8[7] M1_A_A9[7]

M1_CKE0[7] M1_CKE1[7]

M1_A_CLKP0[7] M1_A_CLKN0[7]

R274 CHB@240/F_4

M1_CS0_N[7] M1_CS1_N[7]

M1_A_ODT[7]

M1_A_DM0 M1_A_DM1 M1_A_DM2 M1_A_DM3

M1_A_A0 M1_A_A1 M1_A_A2 M1_A_A3 M1_A_A4 M1_A_A5 M1_A_A6 M1_A_A7 M1_A_A8 M1_A_A9

M1_CKE0 M1_CKE1

M1_A_CLKP0 M1_A_CLKN0

M1_A_ZQ0 M1_A_ZQ1

R267 *CHB@240/F_4

M1_CS0_N M1_CS1_N

M1_A_ODT

U5A

L8

DM0

G8

DM1

P8

DM2

D8

DM3

R2

CA0

P2

CA1

N2

CA2

N3

CA3

M3

CA4

F3

CA5

E3

CA6

E2

CA7

D2

CA8

C2

CA9

K3

CKE0

K4

CKE1

J3

CK

J2

CK#

B3

ZQ0

B4

ZQ1

U12

DNU1

U1

DNU2

T1

DNU3

B1

DNU4

A12

DNU5

A1

DNU6

A2

DNU7

A13

DNU8

B13

DNU9

T13

DNU10

U2

DNU11

U13

DNU12

L3

CS0#

L4

CS1#

J8

ODT

C4

NC1

K9

NC2

R3

NC3

LPDDR3

FBGA-178pin

LPDDR3_FPGA

DQS0 DQS1 DQS2 DSQ3

DQS0# DQS1# DQS2# DQS3#

P9

M1_A_DQ0

DQ0

N9

M1_A_DQ1

DQ1

N10

M1_A_DQ2

DQ2

N11

M1_A_DQ3

DQ3

M8

M1_A_DQ4

DQ4

M9

M1_A_DQ5

DQ5

M10

M1_A_DQ6

DQ6

M11

M1_A_DQ7

DQ7

F11

M1_A_DQ8

DQ8

F10

M1_A_DQ9

DQ9

F9

M1_A_DQ10

DQ10

F8

M1_A_DQ11

DQ11

E11

M1_A_DQ12

DQ12

E10

M1_A_DQ13

DQ13

E9

M1_A_DQ14

DQ14

D9

M1_A_DQ15

DQ15

T8

M1_A_DQ16

DQ16

T9

M1_A_DQ17

DQ17

T10

M1_A_DQ18

DQ18

T11

M1_A_DQ19

DQ19

R8

M1_A_DQ20

DQ20

R9

M1_A_DQ21

DQ21

R10

M1_A_DQ22

DQ22

R11

M1_A_DQ23

DQ23

C11

M1_A_DQ24

DQ24

C10

M1_A_DQ25

DQ25

C9

M1_A_DQ26

DQ26

C8

M1_A_DQ27

DQ27

B11

M1_A_DQ28

DQ28

B10

M1_A_DQ29

DQ29

B9

M1_A_DQ30

DQ30

B8

M1_A_DQ31

DQ31

L10

M1_A_DQSP0

G10

M1_A_DQSP1

P10

M1_A_DQSP2

D10

M1_A_DQSP3

L11

M1_A_DQSN0

G11

M1_A_DQSN1

P11

M1_A_DQSN2

D11

M1_A_DQSN3

4

M1_A_DQ0 [7] M1_A_DQ1 [7] M1_A_DQ2 [7] M1_A_DQ3 [7] M1_A_DQ4 [7] M1_A_DQ5 [7] M1_A_DQ6 [7] M1_A_DQ7 [7] M1_A_DQ8 [7] M1_A_DQ9 [7] M1_A_DQ10 [7] M1_A_DQ11 [7] M1_A_DQ12 [7] M1_A_DQ13 [7] M1_A_DQ14 [7] M1_A_DQ15 [7] M1_A_DQ16 [7] M1_A_DQ17 [7] M1_A_DQ18 [7] M1_A_DQ19 [7] M1_A_DQ20 [7] M1_A_DQ21 [7] M1_A_DQ22 [7] M1_A_DQ23 [7] M1_A_DQ24 [7] M1_A_DQ25 [7] M1_A_DQ26 [7] M1_A_DQ27 [7] M1_A_DQ28 [7] M1_A_DQ29 [7] M1_A_DQ30 [7] M1_A_DQ31 [7]

M1_A_DQSP0 [7] M1_A_DQSP1 [7] M1_A_DQSP2 [7] M1_A_DQSP3 [7]

M1_A_DQSN0 [7] M1_A_DQSN1 [7] M1_A_DQSN2 [7] M1_A_DQSN3 [7]

3

LPDDR3 MEMORY CHANNEL B

U5B

LPDDR3

B2

VSS1

B5

VSS2

C5

VSS3

E4

VSS4

E5

VSS5

F5

VSS6

H2

VSS7

J12

VSS8

K2

VSS9

L6

VSS10

M5

VSS11

N4

VSS12

N5

VSS13

R4

VSS14

R5

VSS15

T2

VSS16

T3

VSS17

T4

VSS18

T5

VSS19

B6

VSSQ1

B12

VSSQ2

C6

VSSQ3

D12

VSSQ4

E6

VSSQ5

F6

VSSQ6

F12

VSSQ7

G6

VSSQ8

G9

VSSQ9

H10

VSSQ10

K10

VSSQ11

L9

VSSQ12

M6

VSSQ13

M12

VSSQ14

N6

VSSQ15

P12

VSSQ16

R6

VSSQ17

T6

VSSQ18

T12

VSSQ19

C3

VSSCA1

D3

VSSCA2

F4

VSSCA3

G3

VSSCA4

G4

VSSCA5

J4

VSSCA6

M4

VSSCA7

P3

VSSCA8

FBGA-178pin

VDD1-1 VDD1-2 VDD1-3 VDD1-4 VDD1-5 VDD1-6 VDD1-7 VDD1-8 VDD1-9

VDD1-10

VDD2-1 VDD2-2 VDD2-3 VDD2-4 VDD2-5 VDD2-6 VDD2-7 VDD2-8

VDD2-9 VDD2-10 VDD2-11 VDD2-12 VDD2-13 VDD2-14 VDD2-15 VDD2-16 VDD2-17 VDD2-18 VDD2-19 VDD2-20

VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17

VREF_CA VREF_DQ

LPDDR3_FPGA

A3 A4 A5 A6 A10 U3 U5 U4 U6 U10

A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U9 U8

F2 G2 H3 L2 M2

A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11

H4 J11

+V1P8U_MEM

+VDDQ

+VREFCA1 +VREFDQ1

M1_B_DM0[7] M1_B_DM1[7] M1_B_DM2[7] M1_B_DM3[7]

M1_B_A0[7] M1_B_A1[7] M1_B_A2[7] M1_B_A3[7] M1_B_A4[7] M1_B_A5[7] M1_B_A6[7] M1_B_A7[7] M1_B_A8[7] M1_B_A9[7]

M1_B_CLKP0[7] M1_B_CLKN0[7]

R269 CHB@240/F_4

M1_B_ODT[7]

M1_B_DM0 M1_B_DM1 M1_B_DM2 M1_B_DM3

M1_B_A0 M1_B_A1 M1_B_A2 M1_B_A3 M1_B_A4 M1_B_A5 M1_B_A6 M1_B_A7 M1_B_A8 M1_B_A9

M1_CKE0 M1_CKE1

M1_B_CLKP0 M1_B_CLKN0

M1_B_ZQ0 M1_B_ZQ1

R275 *CHB@240/F_4

M1_CS0_N M1_CS1_N

M1_B_ODT

U6A

L8

DM0

LPDDR3

FBGA-178pin

LPDDR3_FPGA

DQS0 DQS1 DQS2 DSQ3

DQS0# DQS1# DQS2# DQS3#

P9

DQ0

N9

DQ1

N10

DQ2

N11

DQ3

M8

DQ4

M9

DQ5

M10

DQ6

M11

DQ7

F11

DQ8

F10

DQ9

F9

DQ10

F8

DQ11

E11

DQ12

E10

DQ13

E9

DQ14

D9

DQ15

T8

DQ16

T9

DQ17

T10

DQ18

T11

DQ19

R8

DQ20

R9

DQ21

R10

DQ22

R11

DQ23

C11

DQ24

C10

DQ25

C9

DQ26

C8

DQ27

B11

DQ28

B10

DQ29

B9

DQ30

B8

DQ31

L10 G10 P10 D10

L11 G11 P11 D11

G8

DM1

P8

DM2

D8

DM3

R2

CA0

P2

CA1

N2

CA2

N3

CA3

M3

CA4

F3

CA5

E3

CA6

E2

CA7

D2

CA8

C2

CA9

K3

CKE0

K4

CKE1

J3

CK

J2

CK#

B3

ZQ0

B4

ZQ1

U12

DNU1

U1

DNU2

T1

DNU3

B1

DNU4

A12

DNU5

A1

DNU6

A2

DNU7

A13

DNU8

B13

DNU9

T13

DNU10

U2

DNU11

U13

DNU12

L3

CS0#

L4

CS1#

J8

ODT

C4

NC1

K9

NC2

R3

NC3

M1_B_DQ0 M1_B_DQ1 M1_B_DQ2 M1_B_DQ3 M1_B_DQ4 M1_B_DQ5 M1_B_DQ6 M1_B_DQ7 M1_B_DQ8 M1_B_DQ9 M1_B_DQ10 M1_B_DQ11 M1_B_DQ12 M1_B_DQ13 M1_B_DQ14 M1_B_DQ15 M1_B_DQ20 M1_B_DQ17 M1_B_DQ18 M1_B_DQ19 M1_B_DQ16 M1_B_DQ21 M1_B_DQ22 M1_B_DQ23 M1_B_DQ24 M1_B_DQ25 M1_B_DQ26 M1_B_DQ27 M1_B_DQ28 M1_B_DQ29 M1_B_DQ30 M1_B_DQ31

M1_B_DQSP0 M1_B_DQSP1 M1_B_DQSP2 M1_B_DQSP3

M1_B_DQSN0 M1_B_DQSN1 M1_B_DQSN2 M1_B_DQSN3

2

M1_B_DQ0 [7] M1_B_DQ1 [7] M1_B_DQ2 [7] M1_B_DQ3 [7] M1_B_DQ4 [7] M1_B_DQ5 [7] M1_B_DQ6 [7] M1_B_DQ7 [7] M1_B_DQ8 [7] M1_B_DQ9 [7] M1_B_DQ10 [7] M1_B_DQ11 [7] M1_B_DQ12 [7] M1_B_DQ13 [7] M1_B_DQ14 [7] M1_B_DQ15 [7] M1_B_DQ20 [7] M1_B_DQ17 [7] M1_B_DQ18 [7] M1_B_DQ19 [7] M1_B_DQ16 [7] M1_B_DQ21 [7] M1_B_DQ22 [7] M1_B_DQ23 [7] M1_B_DQ24 [7] M1_B_DQ25 [7] M1_B_DQ26 [7] M1_B_DQ27 [7] M1_B_DQ28 [7] M1_B_DQ29 [7] M1_B_DQ30 [7] M1_B_DQ31 [7]

M1_B_DQSP0 [7] M1_B_DQSP1 [7] M1_B_DQSP2 [7] M1_B_DQSP3 [7]

M1_B_DQSN0 [7] M1_B_DQSN1 [7] M1_B_DQSN2 [7] M1_B_DQSN3 [7]

1

18

U6B

LPDDR3

B2

VSS1

B5

VSS2

C5

VSS3

E4

VSS4

E5

VSS5

F5

VSS6

H2

VSS7

J12

VSS8

K2

VSS9

L6

VSS10

M5

VSS11

N4

VSS12

N5

VSS13

R4

VSS14

R5

VSS15

T2

VSS16

T3

VSS17

T4

VSS18

T5

VSS19

B6

VSSQ1

B12

VSSQ2

C6

VSSQ3

D12

VSSQ4

E6

VSSQ5

F6

VSSQ6

F12

VSSQ7

G6

VSSQ8

G9

VSSQ9

H10

VSSQ10

K10

VSSQ11

L9

VSSQ12

M6

VSSQ13

M12

VSSQ14

N6

VSSQ15

P12

VSSQ16

R6

VSSQ17

T6

VSSQ18

T12

VSSQ19

C3

VSSCA1

D3

VSSCA2

F4

VSSCA3

G3

VSSCA4

G4

VSSCA5

J4

VSSCA6

M4

VSSCA7

P3

VSSCA8

FBGA-178pin

VDD1-1 VDD1-2 VDD1-3 VDD1-4 VDD1-5 VDD1-6 VDD1-7 VDD1-8 VDD1-9

VDD1-10

VDD2-1 VDD2-2 VDD2-3 VDD2-4 VDD2-5 VDD2-6 VDD2-7 VDD2-8

VDD2-9 VDD2-10 VDD2-11 VDD2-12 VDD2-13 VDD2-14 VDD2-15 VDD2-16 VDD2-17 VDD2-18 VDD2-19 VDD2-20

VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17

VREF_CA VREF_DQ

LPDDR3_FPGA

A3 A4 A5 A6 A10 U3 U5 U4 U6 U10

A8 A9 D4 D5 D6 G5 H5 H6 H12 J5 J6 K5 K6 K12 L5 P4 P5 P6 U9 U8

F2 G2 H3 L2 M2

A11 C12 E8 E12 G12 H8 H9 H11 J9 J10 K8 K11 L12 N8 N12 R12 U11

H4 J11

+V1P8U_MEM

+VDDQ

+VREFCA1 +VREFDQ1

+VDDQ

B B

A A

Distributed around all LPDDR3 devices (CHB)

C46 CHB@10U/6.3V_6

C28 CHB@10U/6.3V_6

C38 CHB@10U/6.3V_6 R252 CHB@80.6/F_4

C33 CHB@10U/6.3V_6

Place these Caps near each LPDDR3 Memory Down

C21 CHB@1U/6.3V_4

C20 CHB@1U/6.3V_4

C7 CHB@1U/6.3V_4

C30 CHB@1U/6.3V_4

C19 CHB@1U/6.3V_4

C25 CHB@1U/6.3V_4

C138 CHB@1U/6.3V_4

C168 CHB@1U/6.3V_4

5

C197 CHB@1U/6.3V_4

C8 CHB@1U/6.3V_4

C9 CHB@1U/6.3V_4

C139 CHB@1U/6.3V_4

C205 CHB@1U/6.3V_4

C32 CHB@1U/6.3V_4

C26 CHB@1U/6.3V_4

C37 CHB@1U/6.3V_4

C144 CHB@1U/6.3V_4

C169 CHB@1U/6.3V_4

C15 CHB@1U/6.3V_4

C204 CHB@1U/6.3V_4

C17 CHB@1U/6.3V_4

C146 CHB@1U/6.3V_4

C203 CHB@1U/6.3V_4

C179 CHB@1U/6.3V_4

C16 CHB@1U/6.3V_4

C23 CHB@1U/6.3V_4

+VDDQ_VTT

C145 CHB@1U/6.3V_4

C6 CHB@10U/6.3V_6

+V1P8U_MEM

4

PLACE 1 CAPS NEAR EACH LPDDR3

+VREFCA1

C160 *CHB@0.047U/10V_4

+VREFDQ1

C195 *CHB@0.047U/10V_4

C135 CHB@1U/6.3V_4

C5 CHB@10U/6.3V_6

C141 CHB@10U/6.3V_6

C140 CHB@10U/6.3V_6

C167 *CHB@0.047U/10V_4

C198 *CHB@0.047U/10V_4

3

DE-CAPS FOR MEMORY CHANNEL B

VTT TERMINATIONS

+VDDQ_VTT

M1_CS0_N

R203 CHB@80.6/F_4

M1_CS1_N

R215 CHB@80.6/F_4

M1_CKE0

R204 CHB@80.6/F_4

M1_CKE1

R208 CHB@80.6/F_4

M1_A_A0

R241 CHB@80.6/F_4

M1_A_A1 M1_A_A2

R243 CHB@80.6/F_4

M1_A_A3

R262 CHB@80.6/F_4

M1_A_A4

R242 CHB@80.6/F_4

M1_A_A5

R213 CHB@80.6/F_4

M1_A_A6

R226 CHB@80.6/F_4

M1_A_A7

R230 CHB@80.6/F_4

M1_A_A8

R227 CHB@80.6/F_4

M1_A_A9

R223 CHB@80.6/F_4

M1_B_A0

R236 CHB@80.6/F_4

M1_B_A1

R239 CHB@80.6/F_4

M1_B_A2

R211 CHB@80.6/F_4

M1_B_A3

R210 CHB@80.6/F_4

M1_B_A4

R240 CHB@80.6/F_4

M1_B_A5

R221 CHB@80.6/F_4

M1_B_A6

R244 CHB@80.6/F_4

M1_B_A7

R220 CHB@80.6/F_4

M1_B_A8

R222 CHB@80.6/F_4

M1_B_A9

R245 CHB@80.6/F_4

+VDDQ_VTT

M1_A_CLKN0

M1_B_CLKN0

R264 CHB@80.6/F_4 R265 CHB@80.6/F_4

R229 CHB@80.6/F_4 R228 CHB@80.6/F_4

M1_A_CLKP0_N0_CM1_A_CLKP0

+VDDQ_VTT

M1_B_CLKP0_N0_CM1_B_CLKP0

C155 CHB@0.1U/16V_4

C149 CHB@0.1U/16V_4

2

VREF_DQ CIRCUIT

+VREFDQ1 +VREFDQ1_R

R346 *0_4S

+VREFCA1 +VREFCA1_R

R297 *0_4S

+VDDQ

Vref_DQ

+VDDQ

R347 *CHB@4.7K/F_4

R345 *CHB@4.7K/F_4

R289 *CHB@4.7K/F_4

R303 *CHB@4.7K/F_4

+VREFDQ1

Vref_CA

+VREFCA1

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

ON BOARD_LPDDR3_B

Date: Sheet of

Tuesday, April 12, 2016 4118

Date: Sheet of

Tuesday, April 12, 2016 4118

Date: Sheet of

Tuesday, April 12, 2016 4118

1

1A

5

4

3

2

1

SD/MMC CARD READER CONNECTOR

Touch panel connector

+V3P3A_TS+V3P3A

TOUCHPANEL_PWREN

+V3P3S_PD_EN_CARD

+V3P3A_TS

C364 *0.1U/16V_4

CN14

1 2 3 4 5 6

*TS_CONN_6P

7 8

TOUCHPANEL_PWREN[30]

SD SLOT/EMI

30mils

C127 10U/6.3V_4

R185 *0_6S

C128

0.1U/16V_4

C367 *0.1U/16V_4

TOUCHPANEL_PWREN

R625 *0_4

This is full size SD card (push-push type)

CN7

SD_WP_R SD3_CD#_CONN SD3_D2_CONN SD3_D1_CONN SD3_D0_CONN

SD3_CLK_CONN +V3P3S_PD_EN_CARD_R

SD3_CMD_CONN SD3_D3_CONN

11 10

9 8 7 6 5 4 3 2 1

WP CD DATA2 DATA1 DATA0 VSS2 CLK VDD VSS1 CMD CD/DATA3

D D

TS_INT#[35] I2C_0_SCL_CONN[35] I2C_0_SDA_CONN[35]

C C

Card Reader(CRD)

R627 *0_6

U30

1

*SLG5NT1547V R626 *100K_4

16

NC

17

NC

SD3_CD#_CONN NORMAL OPEN

SD_WP_R NORMAL OPEN

GND

GND12GND

SDCARD_CONN_11P

14

13

15

D2S

ON

3

4

GND

PLACE RES CLOSE TO SD CARD CONNECTOR

B B

SD3_CD#_CONN

conn side : insert--> open, non-insert-->low chip side: insert--> low, non-insert --> high

A A

+V3P3S

R171 *4.7K_4

SD3_CLK[8] SD3_CMD[8] SD3_D0[8] SD3_D1[8] SD3_D2[8] SD3_D3[8]

R172 *0_4S

SD3_CD#_Q

3

2

1

5

+V1P8S

R175 *10K_4

R176 1K_4

Q20

*2N7002K

R181 BLM15BB470SN1D

R186 33_4 R179 33_4 R178 33_4 R190 33_4 R189 33_4

C125 *12p/50V_4

C129 *12p/50V_4

C123 *12p/50V_4

SD3_CD# [8,21]

SD_WP_R

conn side : WP -->low, non WP-->open chip side: WP -->high, non WP-->low

C122 *12p/50V_4

C131 *12p/50V_4

C130 *12p/50V_4

SD3_CLK_CONN SD3_CMD_CONN SD3_D0_CONN SD3_D1_CONN SD3_D2_CONN SD3_D3_CONN

4

+V3P3S_PD_EN_CARD

R467 *10K_4

R469 *0_4S

3

2

1

SD3_WP

Q18

*2N7002K

+V1P8S

R468 *10K_4

R470 *0_4S

SD3_CMD_CONN

+V3P3S_PD_EN_CARD

R638 *10K_4

SDCARD_WP [10]

3

SD SLOT POWER SUPPLY

Card Reader(CRD)

+V3P3S

+V1P8A

R170 *1M_4

3

Q19 PJA138K

SDMMC3_PWR_EN_N[8,41]

2

1

R174 10K_4

R177 1K_4

eMMC (MMC)

eMMC

EMMC_D0[8] EMMC_D1[8] EMMC_D2[8] EMMC_D3[8] EMMC_D4[8] EMMC_D5[8] EMMC_D6[8] EMMC_D7[8]

EMMC_CMD[8] EMMC_CLK[8]

SOC_PLTRST#[12,16,34]

0 OHM SERIES TERMINATIONS ARE PLACEHOLDERS. VALUE MAY CHANGE.

EMMC_RCLK[8]

TP59 TP62 TP66 TP51

EMMC_RCLK EMMC_CLK EMMC_CMD EMMC_D0

R423 *0_4S

EMMC_CMD EMMC_CLK

EMMC_RST#

EMMC_RCLK

16G Samsung-->KLMAG2WEMB-B031-AKE2RF-T505-- IC FLASH(153)KLMAG2WEMB-B031(FBGA)STNBSQ Hynix--> H26M52103FMR (0x03)--AR0ZHQR1000--PROG IC FLASH(153P)H26M52103FMR STNBSQ

32G Samsung-->KLMBG4WEBC-B031--AKE3SZ-T500--IC FLASH(153)KLMBG4WEBC-B031(FBGA)STNBSQ Hynix--> H26M64103EMR (0x03)--AR0ZHQR1001--PROG IC FLASH(153P)H26M64103EMR STNBSQ

2

U16

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M5

CMD

M6

CLK

K5

RST_n

E9

VSF1

E10

VSF2

F10

VSF3

K10

VSF4

H5

RCLK

H26M64103EMR

eMMC16G-S100-A06

+V3P3S +V3P3S_PD_EN_CARD

C121

0.1U/16V_4

SDMMC3_PWR_EN_RSDMMC3_PWR_EN

C6

VCCQ1

M4

VCCQ2

N4

VCCQ3

P3

VCCQ4

P5

VCCQ5

E6

VCC1

F5

VCC2

J10

VCC3

K9

VCC4

C2

VDDI

E7

VSS1

G5

VSS2

H10

VSS3

K8

VSS4

A6

VSS5

J5

VSS6

C4

VSSQ1

N2

VSSQ2

N5

VSSQ3

P4

VSSQ4

P6

VSSQ5

U19

3

D2S

1

4

ON

GND

SLG5NT1547V

for host interface

VCCQ_EMMCEMMC_D0

C275

C237

0.1U/16V_4

for internal flash memory, 250mA

VCC_EMMC

EMMC_VDDI

iNAND's internal power node

C238

0.1U/16V_4

C235

0.1U/16V_4

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

SDIO/eMMC/TS

Tuesday, April 12, 2016 4119

C276

4.7U/6.3V_4

C249

4.7U/6.3V_4

1

19

C126

4.7U/6.3V_4

R417 *0_4S

R429 *0_6S

+V1P8S

+V3P3S

1A

1

2

3

4

5

6

7

8

eDP PANEL CONTROL

eDP CONNECTOR

20

LCD(LDS)

A A

EDP_BKLTEN_CONN[35]

EC_BL_DISABLE_L[30]

B B

EDP_TXP0_DP[8] EDP_TXN0_DN[8]

EDP_TXP1_DP[8]

C C

EDP_TXN1_DN[8]

EDP_BKLTCTL_CONN[35]

RB500V-40

C215 0.1U/16V_4 C217 0.1U/16V_4

C219 0.1U/16V_4 C221 0.1U/16V_4

R367 *0_4S

D19

EDP_TXP0_C_DP EDP_TXN0_C_DN

EDP_TXP1_C_DP EDP_TXN1_C_DN

R371 *0_4S

R375 *0_4S

R380 *0_4S

R385 *0_4S

EDP_BKLTCTL_CONN

EDP_BL_EN_CONN

R356 *100K_4

R366 *100K_4

C228 *0.1U/16V_4

+VBATA_EDP_OUT

EDP_TXP0_DP_CONN EDP_TXN0_DN_CONN

EDP_TXP1_DP_CONN EDP_TXN1_DN_CONN

C70 10u/25V_8

C64 *10u/25V_8

C51 1000P/50V_4

eDP Power

LCD(LDS)

+VBATA +VBATA_EDP_F

F1

1 2

KMC5S150RY24

CH2 is reserved

+V3P3S

DMIC_DAT[26] DMIC_CLK[26]

R83 FUSE 2A

*150p/50V_4

+VBATA_EDP_F

150mA

C181

R93

1 2

*0.01/F_0805_S

EDP_HPD[8]

EDP_AUXN_DN[8] EDP_AUXP_DP[8]

C182 *150p/50V_4

R296 *620/F_4

C58 0.1u/50V_6

TP48

C213 0.1U/16V_4 C214 0.1U/16V_4

+V3P3S_CAMERA

C53 0.1U/16V_4

R325 600,0.3A R324 600,0.3A

+V1P8S

+VBATA_EDP_OUT

+V3P3DX_EDP

EDP_BKLTCTL_CONN EDP_BL_EN_CONN EDP_HPD

EDP_AUXN_C_DN EDP_AUXP_C_DP

EDP_TXP0_DP_CONN EDP_TXN0_DN_CONN

EDP_TXP1_DP_CONN EDP_TXN1_DN_CONN

USBP3_R_DN USBP3_R_DP

DMIC_DAT_R DMIC_CLK_R

R338 *0_4

Max 1.5A

LCD_Self_Test

CAMERA - POWER AND USB CMC

Front Camera(FCM)

C72 1U/6.3V_4

C71 10P/50V_4

C68 1000P/50V_4

+V3P3S

0.5A

USBP3_R_DP

USBP3_R_DN

CN3

ESD

U12

2

IO1

3

IO2

AZC002-02N.R7G

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

GND

VIN

3132

LVDS_CONN_30P

4

+V3P3S_CAMERA

1

+V3P3DX_EDP

D D

C52

0.1U/16V_4

Based on validation result to

stuff CA?

1

C54

0.01U/50V_4

C69 22U/6.3V_8

C61

CA

*22U/6.3V_8

2

3

4

USBP3_DN[11]

USBP3_DP[11]

5

L5

4

1

DLW21HN900SQ2L

3

USBP3_R_DN USBP3_R_DP

2

Size Document Number Rev

Date: Sheet of

6

Date: Sheet of

Layout note:Place close to CN9

PROJECT : NL6D

Quanta Computer Inc.

eDP/CCD/DMIC

Tuesday, April 12, 2016 4120

7

1A

8

5

4

3

2

1

Google debug(DBG)

GOOGLE DEBUG PORT

21

D D

CN1

1

+V3P3A_EC_GD

C C

SOC SPI TO FLASH

EC JTAG

EC UART

B B

GD_SPI_CS0#_R[9] GD_SPI_SI_R [9]

GD_SPI_SO_R[9]

SPI_HOLD#_BIOS[9]

EC_SPI_CLK[30] EC_SPI_MOSI[30]

SD3_CD#[8,19]

EC_JTAG_TMS[30] EC_JTAG_TDI [30]

EC_SERVO_JTAG_RST_N[30]

EC_UART0_TX[30]

HP_DET_CN[22] PROCHOT#[12,30]

+V3P3A

+V3P3_INA

TP4 TP3

R36 *0_4S

EC_JTAG_TCK_CONN EC_JTAG_TDO_CONN EC_JTAG_RTCK

R29 *0_4S R37 *0_4S R30 *0_4S R31 GD@10_4 R33 *GD@10_4

GD_SPI_CS0#_R GD_SPI_SO_R SPI_HOLD#_BIOS EC_SPI_CLK EC_SPI_MOSI

SOC_UART_TX_R

GPIO_SD_DECT

EC_UART_TXD PP3300_INA_R I2C_SDA_INA I2C_SCL_INAI2C_SDA_INA_R GPO_HPD GPIO_SPI_WP GPIO_PROC_HOT# TP_USB_MCU_BOOT USBPD_MCU_RST

3

5

7

9

9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950

GD@AXK750147G

2

4

6

8

10

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

GD_SPI_CLK_R GD_SPI_SI_R

GPIO_EC_RST# SOC_UART_RX_R SOC_UART_PWR

GPIO_PWR_BTN#

SYS_RESET# EC_UART_RXD

EC_SPI_CS# EC_SPI_MISO

R15 GD@200/F_4

SOC UART

R9 GD@10_4 R10 *0_4S

R11 *0_4S R12 *0_4S

R13 *0_4S

PIN7 OD PIN14 OD PIN19 OD PIN22 OD PIN28 OD PIN30 OD PIN37 OD PIN38 OD

BOARD_ID1

+V3P3A

I2C_SCL_INA_R

PIN39 OD PIN41 OD PIN43 OD PIN44 OD PIN45 OD PIN46 OD PIN47 OD PIN48 OD

GD_SPI_CLK_R [9] +V1P8A_ME

EC_SPI_CS# [30] EC_SPI_MISO [30]

SLG_EC_RST# [29]

PWR_BTN_L [29,31]

SOC_REST_BTN# [12,16,34]

EC_GPIO124 [30] EC_UART0_RX [30]

GPIO_SPI_WP [9] LID_OPEN_OUT1_L [27,30,31]

PIN49 OD PIN50 OD

SOC SPI TO FLASH

A130828

SOC_UART_TX[11]

EC_UART0_TX

SOC_UART_RX[11]

EC_UART0_RX

A A

BOARD_ID1[30]

BOARD_ID2[30]

5

R34 *0_4S

R5 *0_4S R6 *GD@0_4

R32 *0_4S

R28 *0_4S

SOC_UART_TX_R

SOC_UART_RX_R I2C_SDA_INA_R

EC_JTAG_TCK_CONN

EC_JTAG_TDO_CONN

4

+V3P3_INA

SOC_UART_PWR

3

R14 GD@4.7K_4R35 *GD@0_4 R38 GD@4.7K_4

R8 *GD@0_4 R7 *0_4S

I2C_SCL_INA_R

+V3P3A +V1P8A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Tuesday, April 12, 2016 4121

Date: Sheet of

Tuesday, April 12, 2016 4121

Date: Sheet of

2

Tuesday, April 12, 2016 4121

Google Debug

1

1A

5

4

3

2

1

HDMI(HDM)

HDMI INTERFACE

22

HDMI LEVEL SHIFTER

D D

INT_HDMITX2N_DN[8] INT_HDMITX2P_DP[8]

INT_HDMITX1N_DN[8] INT_HDMITX1P_DP[8]

INT_HDMITX0N_DN[8] INT_HDMITX0P_DP[8]

INT_HDMICLK_DP[8] INT_HDMICLK_DN[8]

C C

INT_HDMI_HPD[8]

C50 0.1U/16V_4 C55 0.1U/16V_4

C60 0.1U/16V_4 C62 0.1U/16V_4

C45 0.1U/16V_4 C48 0.1U/16V_4

C40 0.1U/16V_4 C27 0.1U/16V_4

Layout Notes: Place decoupling CAPs close to Connector

+V1P8A

R304 10K_4

3

2

HP_DET_CN

Q2 2N7002K

1

R326 100K/F_4

INT_HDMITX2N_C INT_HDMITX2P_C

INT_HDMITX1N_C INT_HDMITX1P_C

INT_HDMITX0N_C INT_HDMITX0P_C

INT_HDMICLK+_C INT_HDMICLK-_C

HP_DET_CN [21]

+V3P3S

R384 470_4 R379 470_4 R393 470_4 R389 470_4 R376 470_4 R370 470_4 R362 470_4 R357 470_4

3

Q37

PJA138K

2

1

INT_HDMITX2P_CONN INT_HDMITX2N_CONN INT_HDMITX1P_CONN INT_HDMITX1N_CONN INT_HDMITX0P_CONN INT_HDMITX0N_CONN INT_HDMICLK+_CONN INT_HDMICLK-_CONN

HDMI CONNECTOR

INT_HDMITX2P_C INT_HDMITX2N_C

INT_HDMITX1P_C INT_HDMITX1N_C

INT_HDMITX0P_C INT_HDMITX0N_C

INT_HDMICLK+_C INT_HDMICLK-_C

+V5S

R69 *0_4S

R64 *0_4S

R85 *0_4S

R82 *0_4S

R62 *0_4S

R57 *0_4S

R51 *0_4S

R47 *0_4S

F2 FUSE 1.5A

C206 *220P/50V_4

D18 *14V/38V/100P_4

HP_DET_CN

INT_HDMITX2P_CONN INT_HDMITX2N_CONN

INT_HDMITX1P_CONN INT_HDMITX1N_CONN

INT_HDMITX0P_CONN INT_HDMITX0N_CONN

INT_HDMICLK+_CONN INT_HDMICLK-_CONN

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

HDMI_5V HP_DET_CN_CONN

R336 *0_4S

12

RV3 *5V/0.2P_4

CN4

SHELL1

1

D2+

SHELL3

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

SHELL4 SHELL2

C128E5-K1909-L

C14 *1000P/50V_4 C24 *1000P/50V_4

20 22

23 21

󵚩󵚩󵚩󵚩󴼚

󴼚HDMI CONNECTOR(CN2)ESD

󴼚󴼚

U11

B B

LEVEL TRANSLATOR/ EMI

INT_HDMITX1P_CONN INT_HDMITX1P_CONN INT_HDMITX1N_CONN INT_HDMITX1N_CONN

INT_HDMITX2P_CONN INT_HDMITX2P_CONN INT_HDMITX2N_CONN INT_HDMITX2N_CONN

EMI

R321 *0_4

+V1P8A

R327 *0_4S

+V1P8S

PP1800_PCH_HDMI

HDMI_DDCCLK_SW[8]

A A

HDMI_DDCDATA_SW[8]

R344 *0_4S R386 150/F_4

PP1800_PCH_HDMI

R355 *0_4S

5

R343 *4.7K_4 R341

HDMI_DDCCLK_COM HDMI_DDCCLK_MB

R354 *4.7K_4

HDMI_DDCDATA_COM HDMI_DDCDATA_MB

1

Q31 DMG301NU-7

PP1800_PCH_HDMI

1

Q36 DMG301NU-7

2

PP1800_PCH_HDMI

D15 RB500V-40

2.2K_4

3

D16 RB500V-40

R351

2.2K_4

3

4

HDMI_5V

INT_HDMITX2P_CONN

R378 150/F_4

INT_HDMITX2N_CONN

INT_HDMITX1P_CONN

INT_HDMITX1N_CONN

INT_HDMITX0P_CONN

R372 150/F_4

INT_HDMITX0N_CONN

INT_HDMICLK+_CONN

R359 150/F_4

INT_HDMICLK-_CONN

3

INT_HDMITX0P_CONN INT_HDMITX0P_CONN INT_HDMITX0N_CONN INT_HDMITX0N_CONN

INT_HDMICLK+_CONN INT_HDMICLK+_CONN INT_HDMICLK-_CONN INT_HDMICLK-_CONN

HDMI_DDCDATA_MB HDMI_DDCDATA_MB HDMI_DDCCLK_MB HDMI_DDCCLK_MB

HDMI_5V HDMI_5V HP_DET_CN_CONN HP_DET_CN_CONN

For ESD Layout note:Place close to HDMI Conn

2

6

NC

7

NC

8

GND

9

NC

10

NC

U10

6

NC

7

NC

8

GND

9

NC

10

NC

U8

6

NC

7

NC

8

GND

9

NC

10

NC

Size Document Number Rev

Date: Sheet of

Tuesday, April 12, 2016 4122

Date: Sheet of

Tuesday, April 12, 2016 4122

Date: Sheet of

Tuesday, April 12, 2016 4122

5

CH4

4

CH3

3

GND

2

CH2

1

CH1

ESD8004MUTAG

5

CH4

4

CH3

3

GND

2

CH2

1

CH1

ESD8004MUTAG

5

CH4

4

CH3

3

GND

2

CH2

1

CH1

ESD8004MUTAG

PROJECT : NL6D

Quanta Computer Inc.

HDMI

1

1A

5

STRAPS SETTINGS

SoC (CPU)

4

3

+V1P8A

2

1

23

D D

BSW Strapping Table (based on EDS V1.0), sampled

R132

4.7K_4

R63

4.7K_4

R80 *10K_4

R126

4.7K_4

R119

4.7K_4

R108

2.7K/F_4

R99 100K_4

on the rising edge of PMU_RSMRST_N

Pin Name

GPIO_SUS0

GPIO_SUS1

GPIO_SUS2

C C

GPIO_SUS4

GPIO_SUS5

GPIO_SUS6

GPIO_SUS7 DFX SUS DEBUG strap

B B

GPIO_SUS8

GPIO_SUS9

GPIO_CAMERASB08

GPIO_CAMERASB09

GPIO_CAMERASB11

DDI0 Detect

DDI1 Detect

Top Swap (A16 Override)

DSI Display Detect

(Leave floating if GPIO functionality is not used, it is not POR)

BIOS Boot Selection

Security Flash Descriptors

Halt Boot strap

PLLs.ICLK.USB2,DDI ,SFR,supply select

ICLK.USB2,DDI,SFR Bypass

ICLK Xtal OSC Bypass

CCU SUS RO Bypass

RTC OSC Bypass

ConfigurationStrap description

0 = DDI0 not detected

1 = DDI0 detected

0 = DDI1 not detected

1 = DDI1 detected

0 = change boot loader address

1 = Normal operation

0 = DSI not detectedGPIO_SUS3

1 = DSI detected 0 = No SPI

1 = SPI

0 = Not support

1 = Normal operation 1 = Normal operation

(MUST be high at RSMRST# de-assert to ensure proper platform operation and use of GPIO_DFX[8:0]

0 = SUSDUG

1 = No SUSDUG 0 = Supply is 1.25V

1 = Supply is 1.35V

0 = No Bypass(Default)

1 = Bypass with 1.05V

0 = No Bypass(Default)

1 = Bypass

0 = No Bypass(Default)

1 = Bypass

0 = No Bypass(Default)

1 = Bypass

MUX_AUD_INT1#[10,35]

EC_SMI_L[10,34] KBD_IRQ#[10,34]

TRACKPAD_INT#[10,29]

EC_KBD_ALERT_SOC[10]

SOC_RUNTIME_SCI[10,16]

SOC_KBC_SMI[10]

R133 *100K_4

R134 *100K_4

R84 *100K_4

R54

R131

*100K_4

+V1P8A

R135 *100K_4

NFC_PWR_MANAGE[10] NFC_FW_RESET#[10] TP_RSVD_STRAP3[10] OBSFN_C0[8,16] TP_RSVD_STRAP1[8] TP_RSVD_STRAP2[8] SOC_WAKE_SCI_N[10,34]

NFC_PWR_MANAGE NFC_FW_RESET# TP_RSVD_STRAP3 OBSFN_C0 TP_RSVD_STRAP1 TP_RSVD_STRAP2 SOC_WAKE_SCI_N

R136 *100K_4

R128 *100K_4

R129 10K_4

R122 *100K_4

R331 *100K_4

R307 *100K_4

R46 *100K_4

R55 *100K_4

R109 *100K_4

R71 *100K_4

R72 *100K_4

R101 *100K_4

R117 *100K_4

R116 *100K_4

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

STRAPS

Tuesday, April 12, 2016 4123

1

1A

1

WIFI/BT COMBO NGFF E KEY(NGF)

A A

(Low Active) (Low Active)

B B

WLAN_OFF_L[30]

RF_EN[35] PLTRST#[30,34]

WIFI_SUSCLK[35]

D14

RB500V-40

2

R288 *0_4S

TP44

PDN#

R276 10K_4

TP45

TP46

TP47

3

WIFI/BT COMBO (NGFF E KEY)

+V3P3A_WIFI

PIN54: disable Antenna PIN52: power down CHIP

RF_EN PDN# PCIE_CLKREQ_WLAN#_Q WLAN_RST#

WIFI_UART_RX

+V3P3A_WIFI

WIFI_UART_TX

BT_LED

WLAN_LED1#

+V3P3A_WIFI

CN2

74 72 70 68 66 64 62 60 58 56

3.3V/I 3.3V/OD

54

3.3V/I

52

3.3V/I

50 48 46 44 42 40 38 36 34 32

30 28 26 24

22 20 18 16 14 12 10

8 6 4 2

NGFF

3.3Vaux

3.3Vaux NC NFC_ANT_N NFC_ANT_P NFC_VDDANT ALERT I2C_CLK I2C_DATA W_DISABLE PDN# PERST0# SUSCLK_32KHz LTE_SOUT LTE_SIN NC NFC_WI_IN NFC_SWP2_IO NC UART_CTS UART_RTS UART_Rx

SLOT A-SD

KEY KEY KEY KEY

UART_Tx UART_Wake GND LED#2 PCM_IN PCM_OUT PCM_SYNC PCM_CLK LED#1

3.3Vaux

3.3Vaux GND76GND

77

4

75

GND

GND PETn1 PETp1

GND PERn1 PERp1

GND

GND PETn0 PETp0

GND PERn0 PERp0

GND

KEY KEY KEY KEY

GND

USB_D-

USB_D+

GND

73 71 69 67 65 63 61 59 57

3.3V/OD3.3V/I

55 53 51 49 47 45 43 41 39 37 35 33

31 29 27 25

23 21 19 17 15 13 11 9 7 5 3 1

WAKE/REQ 53, 55 is OD

WLAN_WAKE_L

RESERVED RESERVED

PEWake0#

CLKREQ0# REFCLKN0

REFCLKP0

SDIO_RESET

SDIO_WAKE

SDIO_DAT3 SDIO_DAT2 SDIO_DAT1 SDIO_DAT0

SDIO_CMD

SDIO_CLK

WLAN_NGFF CONN(Type 2230)_80152-1721

5

WLAN_WAKE_L [35]

CLK_PCIE_WLANN_DN [9] CLK_PCIE_WLANP_DP [9]

PCIE_RX2_WLAN_DN [9] PCIE_RX2_WLAN_DP [9]

PCIE_TX2_WLAN_DN [9] PCIE_TX2_WLAN_DP [9]

USBP4_DN [11] USBP4_DP [11]

BT

6

R27 *0_4

+V1P8A

1

Q82 DMG301NU-7

24

PCIE_CLKREQ_WLAN# [9]

2

3

PCIE_CLKREQ_WLAN#_QPCIE_CLKREQ_WLAN#

7

+V3P3A_WIFI

R562 10K_4

R639 *100K_4

8

C C

R225

1 2

0_0805

D D

1

C157 10U/6.3V_6

C212

0.1U/16V_4

C156 *0.1U/16V_4

2

+V3P3A_WIFI+V3P3A

C209 *0.1U/16V_4

WLAN_PWR_EN[30]

R624 *0_4

3

40 mils (Iout=1A)

R621 *10K_4

3

2

1

4

1

R622 *10K_4

Q80 *SSM3K329R

3

Q78 *AOS3413

2

C366 *0.01U/16V/X7R_4

+3.3V_ NGFF_WLAN Max Current : 1000mA

5

R620

*100K/F_4

+V3P3A_WIFI+V3P3A

40 mils (Iout=1A)

C365 *0.1U/10V_4

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

6

Date: Sheet of

WIFI/BT(NGFF)

Tuesday, April 12, 2016 4124

7

8

1A

5

4

3

2

1

LTE NGFF Power(LTE)

25

D D

Removed (2015/03/27)

C C

LTE NGFF (LTE)

B B

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

Date: Sheet of

2

LTE(NGFF)

Tuesday, April 12, 2016 4125

1

1A

1

Codec (ADO)

R511 *0_6/S

+V1P8A

R514 *0_6

+V1P8S

C343

4.7U/6.3V_4

R508 22_4

AGND AGND

R512 10K_4

HP_JD_L[35]

AGND

DACREF

C348

4.7U/6.3V_4

AGND

C337 4.7U/6.3V_4 C347 4.7U/6.3V_4

I2S_MCLK_R I2S_LRCLK_R

I2S_BCLK_R I2S_DIN_R I2S_DOUT_R

+V1P8A

+V1P8S

R507 *0_4S R491 *0_4S R479 *0_4S

R490 *0_4S R478 *0_4S R477 *0_4S

HP_JD_L

AGND

DACREF

A A

+V1P8A

DMIC_DAT[20]

I2S_MCLK_R[10]

I2S_LRCLK_R[9]

I2S_BCLK_R[9] I2S_DIN_R[9] I2S_DOUT_R[9]

B B

C346

0.1U/16V_4

+5VA

C333 1U/10V_4

MICBIAS1 MICBIAS2

RING2_SENSE IN1P_RING2 IN1N_SLEEVE SLEEVE_SENSE

DMIC_DAT_LDMIC_DAT I2S_MCLK_R_1 I2S_LRCLK_R_1

I2S_BCLK_R_1 I2S_DIN_R_1 I2S_DOUT_R_1

R200 200K/F_4 R515 *200K/F_4

C336 10U/6.3V_4 C342 4.7U/6.3V_4

C326

0.1U/16V_4

R506 *0_4S R509 *0_4S

C324

4.7U/6.3V_4

C329

0.1U/16V_4

PP1800_CODEC_CPVDD

C335 10U/6.3V_4

U27

14

MICBIAS1

8

MICBIAS2

11

RING2_SENSE

10

IN1P_RING2

12

IN1N_SLEEVE

13

SLEEVE_SENSE

4

IN2P/INL/DMIC2_SDA

38

MCLK

36

LRCK1

37

BCLK1

35

ADCDAT1

34

DACDAT1

30

LRCK2/GPIO4/PDM1_SDA

31

BCLK2/GPIO3/PDM1_SCL

33

ADCDAT2/GPIO6/DMIC2_SDA

32

DACDAT2/GPIO5/DMIC1_SDA

17

JD1

15

MIC_CAP

7

VREF2

6

DACREF

47

43

SPKVDDL

SPKVDDR

16

5

22

AVDD

CPVDD

ALC5650

DGND49AGND9SPKGND

46

3

2

DBVDD

DCVDD

MICVDD

DCVDD

C344

2.2U/6.3V_4

SPO_RN

GPIO1/IRQ

GPIO2/DMIC_SCL

SPO_LP SPO_LN

SPO_RP

LOUT_L LOUT_R

HPO_L

HPO_R

CPVREF

CPVPP CPVEE

CPP1

CPN1 CPP2

CPN2

SDA

2

C338

0.1U/16V_4

SCL

MICVDD

1 48

45 44

28 29

19 20 18

21 27 23

24 25

26

39 40

41 42

AGND

C330

0.1U/16V_4

R510 *0_4/S R513 *0_4

C341

2.2U/6.3V_4

L_SPK+ L_SPK-

R_SPK+ R_SPK-

HPL HPR

C327 2.2U/6.3V_4 C316 2.2U/6.3V_4

C318

2.2U/6.3V_4

C317

2.2U/6.3V_4

CODEC_INT_OD_L DMIC_CLK_L

R473 *0_4/S R474 *0_4

Mount R841 (Use external 3.3V) No Mount R841 (Use internal LDO)

C334

2.2U/6.3V_4

+V1P8A +V1P8S

R494 *0_4S R497 *0_4S

+V3P3A +V3P3S

Internal Speaker (ADO)

R530 *0_6S R531 *0_6S

R529 *0_6S R528 *0_6S

40mil for each signal

AGND

I2C_4_SCL_AUDIO [35] I2C_4_SDA_AUDIO [35]

AUDIO_CODEC_IRQ [9]

DMIC_CLK [20]

R295 10K_4

Codec PWR 5V (ADO)

+V5S

L14 *HCB1005KF_1.5A_4

C345

C350

*0.1U/16V_4

*10U/6.3V_6

L_SPK+_1 L_SPK-_1

R_SPK+_1 R_SPK-_1

C358 680P/50V/X7R_4

C355 680P/50V/X7R_4

C357 680P/50V/X7R_4

C356 680P/50V/X7R_4

+V1P8A

3

C349 *0.1U/16V_4

+V5A

C351 *10U/6.3V_6

SC3 *AVLC 5S 02 100

C340

0.1U/16V_4

SC4 *AVLC 5S 02 100

SC1 *AVLC 5S 02 100

SC2 *AVLC 5S 02 100

+5VA

L15 HCB1005KF_1.5A_4

C339 10U/6.3V_4

CN8

1 2

5

3

6

4

SPK_CONN_4P_88266-04001-06

For ESD

4

26

AGND

I2S_MCLK_R_1 I2S_LRCLK_R_1

I2S_BCLK_R_1

R475 *0_4S R194 *0_4S

C C

D D

R472 *0_4S R192 *0_4S R480 *0_4S R518 *0_4S

C352 *1U/6.3V_4 C353 *0.1U/16V_4

AGND

1 2

I2S_DIN_R_1

I2S_DOUT_R_1

C325 *22p/50V_4

C320 *22p/50V_4

C322 *22p/50V_4

C321 *22p/50V_4

C319 *22p/50V_4

IN1N_SLEEVE/SLEEVE_R>40mil SLEEVE_SENSE>20mil

HPR

HPL

IN1P_Ring2/Ring2_R>40mil Ring2_SENSE>20mil

L9 *0_6S

L10 *0_6S

Combo Jack (ADO)

MICBIAS2

R517 2.2K_4

IN1N_SLEEVE

L16 80ohm@100MHz

SLEEVE_SENSE

R516 *0_4S

C363 10P/50V_4

AGND

R541 33_4

R193 33_4

C133 10P/50V_4

AGND

RING2_SENSE

R195 *0_4S

IN1P_RING2

L11 80ohm@100MHz

MICBIAS1

R196 2.2K_4

AGND

SLEEVE_R HPR_SYS HP_JD_L

HPL_SYS RING2_R

SLEEVE_R HPR_SYS HPL_SYS RING2_R HP_JD_L

C132 *100P/50V_4

C362 *100P/50V_4

4 2 6 5

1 3

Combo jack

R201 *0_4S

AGND

1 2

D23 RCLAMP0521PATCT_4

1 2

D24 RCLAMP0521PATCT_4

1 2

D10 RCLAMP0521PATCT_4

1 2

D9 RCLAMP0521PATCT_4

1 2

D12 RCLAMP0521PATCT_4

Normal open

P/N: DFTJ06FR795 Normal Open PIN1 --> L PIN2 --> R PIN3 --> GND/MIC PIN4 --> MIC/GND PIN5 --> JD PIN6 --> GND

CN11

COMBOJACK_2SJ3072-110111F

AGND

To be validated if ESD protections are un-stuffed

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

1

2

3

Date: Sheet of

Quanta Computer Inc.

Audio Codec/SPK

Tuesday, April 12, 2016 4126

4

1A

A

TPM/DAUGHTER BOARD CONNECTOR

TPM(TPM) DB(UIF)

BCRD says R38 is stuffed

TPM_VDD

4 4

PROG IC OTHER(28P)SLB9655TT1.2FW4.32GOOG

3 3

RF

R388

R381

*20K_4

*4.7K_4

TPM_GPIO

TPM_PP

R383 *0_4S

0411 FAE : install R43 value is 4K7, and PIN7 wo an internal PD

ST:Schmitt Trigger TS:Tri-State OD: Open Drain

Holes(OTH)

HOLE6 *h-c98d98n

U26

6

GPIO

2

NC2

7

PP

13

NC13

14

NC14

8

NC8

12

NC12

3

NC3

1

NC1

MOUNTING HOLES

HOLE8 *h-c197d98p2

1

HOLE4 *h-c197d98p2

1

HOLE2 *h-c98d98n

OD

ST

TPM

TPM SLB9655

GND[1]4GND[2]11GND[3]18GND[4]

25

HOLE5 *h-c197d98p2

1

HOLE3 *h-c197d98p2

1

+V3P3S TPM_VDD

+V3P3A_PRIME

CLK_PCI_EC_R2 CLK_PCI_EC

ST ST

TS TS TS TS

ST

LRESET#[1]

ST

LRESET#[2]

TS

RE

R434 *0_4S

HOLE1 *h-c197d98p2

1

HOLE9 *h-c98d98n

1

R70 *0_6

R90 *0_6/S

R438 22_4

10

VDD[4]

5

VDD[3]

24

VDD[2]

19

VDD[1]

21

LCLK

22

LFRAME#

17

LAD3

20

LAD2

23

LAD1

26

LAD0

28

NC28

16 9

27

SERIRQ

15

NC15

0309 unstuffed R254, stuff R255 for isolate SERIRQ from TPM

C267

0.1U/16V_4

R387 *0_4S R431 *0_4S

CLK_PCI_EC_R2

R636 *4.7K_4

TPM_RST_R

R382 *0_4S

SERIRQ_R

R432 *0_4

R437 10K_4

HOLE7 *HG-NL6C-1

PAD1

*spad-len22-1-top

4 x100nF (place close to device VDD/GND pins)

RA RB

RD

21

3

*spad-len22-1-bottom

B

C67

C258

0.1U/16V_4

TPM_VDD

near pin 21 as possible

C262 10P/50V_4

LPC_LFRAME# [12,30] LPC_LAD3 [12,30]

LPC_LAD2 [12,30] LPC_LAD1 [12,30] LPC_LAD0 [12,30]

TPM_VDD

R635 *10K_4

TPM_PLTRST# [34]

IRQ_SERIRQ [30,34]

TPM_VDD

SPI_WP_R

R191 1K_4

ROM WP#

PAD3

C63

0.1U/16V_4

CLK_PCI_EC [12,30]

EC-SIV-12

+V3P3S

SPI_WP_ME [9]

PAD2

*spad-len22-2-top

EC-SIV-08

PAD4

PAD5

*PAD-NL6C-1

USB3PWR_1

+VRTC

LID_OPEN_OUT1_L[21,30,31]

USBP1_DN_C[28] USBP1_DP_C[28]

USB3_TXP1_DP[11] USB3_TXN1_DN[11]

USB3_RXN1_DN[11] USB3_RXP1_DP[11]

Battery LED

BAT_LED0[30] BAT_LED1[30]

C66 *1U/6.3V_4

C

C65 *1U/6.3V_4

R114 10K_4 R110 1K_4 R120 *0_4S R123 *0_4S

R23 300_4 R26 300_4

DB CONNECTOR

C74 *1U/6.3V_4

EC-DV-01

Green

2 1

Org

LID_OPEN# USBP1-_CONN

USBP1+_CONN

3

LED1 LED 3P ORG/BLUE

D

E

27

2122

CN5

20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

SMD/FPC/20P

+V3P3A

1

2 2

EMI caps

C42 *0.1U/16V_4

1 1

1

+VDDQ_M0_M1_R +V5A +V1P15A +V3P3S

C41 *1000P/50V_4

C81

C93

*1000P/50V_4

*0.1U/16V_4

A

C328 *0.1U/16V_4

C331 *1000P/50V_4

C75 *0.1U/16V_4

B

C73 *1000P/50V_4

RF caps

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

C

D

Date: Sheet of

Quanta Computer Inc.

DB /TPM/Hole

Tuesday, April 12, 2016 4127

E

1A

5

4

3

2

1

USB3.0 (UB3)

D D

USB_ILIM_SEL[30]

C C

USB PWR (Charger)

+V3P3A_EC

2

+V5A

R412 10K_4

Q44 2N7002K

USB2_STATUS_L

+V3P3A

3

1

C259 1U/10V_4

USB3_PWR_EN[30]

USB_OC0#[11,34]

USB_CTL1[30]

R104 10K_4 R103 10K_4

80 mils (Iout=2A)

USB3_STATUS_L USB_OC0#

USB3_ILIM_SEL

R419 *0_4S

USB3_PWR_EN

USB3_CTL2_R USB3_CTL3_R

R102

10K_4

U15

1

IN

9

STATUS

13

FAULT

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2 CTL38DP_OUT

SN1408009RTER

ILIM_LO

ILIM_HI

GND_PAD

GND

DM_IN DP_IN

DM_OUT

OUT

80 mils (Iout=2A)

12

USB3PWR

15

ILIM_LO

16

ILIM_HI

(RILIM_HI 1.96A)

17 14

11

USBP2-_L

10

USBP2+_L

2

USBP2_DN

3

USBP2_DP

USB3PWR

C85

0.1U/16V_4

R422

25.5K/F_4

USBP2_DN [11] USBP2_DP [11]

D5 BZT52-B5V6S(5.6V)

2 1

R421 47K_4

USB3.0 (UB3)

USB3_RXN2_DN[11] USB3_RXP2_DP[11]

USB3_TXN2_DN[11] USB3_TXP2_DP[11]

R154 *0_4S

R153 *0_4S

C92 0.1U/16V_4 C86 0.1U/16V_4

USBP2-_L

USBP2+_L

USB3_TXN2_C USB3_TXP2_C

USB3_RXN2_R USB3_RXN2_R USB3_RXP2_R USB3_RXP2_R

USB3_TXN2_R USB3_TXN2_R USB3_TXP2_R USB3_TXP2_R

4

1

DLW21HN900SQ2L

R146 *0_4S

R144 *0_4S

6 7 8 9

10

L7

4

U18

NC NC GND NC NC

3

2

CH4 CH3

GND

CH2 CH1

ESD8004MUTAG

5 4 3 2 1

USB3PWR

80 mils (Iout=2A)

USB3PWR

+

C80

220U/6.3V/ESR35_3528

USB3PWR

USBP2-_C

USBP2+_C USB3_RXN2_R

USB3_RXP2_R USB3_TXN2_R

USB3_TXP2_R

CN6

USB3.0 CONN

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

5

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

12

USBP2-_C

USBP2+_C

C84 1000P/50V_4

11111010131312

D4

TVM0G5R5M261R_4

U32

2

VIN

IO1

3

GND

IO2

AZC002-02N.R7G

4 1

28

USB3PWR

USB PWR(Charger)

USB3PWR_1

+V5A

B B

A A

5

+V3P3A_EC

2

R40 10K_4

Q6 2N7002K

4

USB3_STATUS_L

+V3P3A

3

1

C10 1U/10V_4

USB2_PWR_EN[30]

USB_OC1#[11,34]

R45 10K_4 R52 10K_4

80 mils (Iout=2A)

USB2_STATUS_L USB_OC1#

USB2_ILIM_SEL

R41 *0_4S

USB2_PWR_EN

USB_CTL1USB_ILIM_SEL USB3_CTL2_L USB3_CTL3_L

R44

10K_4

U9

1

IN

9

STATUS

13

FAULT

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2 CTL38DP_OUT

SN1408009RTER

ILIM_LO

ILIM_HI

GND_PAD

GND

DM_IN

DP_IN

DM_OUT

OUT

80 mils (Iout=2A)

12

USB3PWR_1

15

ILIM_LO_1

16

ILIM_HI_1

(RILIM_HI 1.96A)

17 14

11

USBP1_DN_C

10

USBP1_DP_C

2

USBP1_DN

3

USBP1_DP

3

C43

0.1U/16V_4

R42

25.5K/F_4

USBP1_DN_C [27] USBP1_DP_C [27]

USBP1_DN [11] USBP1_DP [11]

D2 BZT52-B5V6S(5.6V)

2 1

R43 47K_4

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

USB3/Charger

Tuesday, April 12, 2016 4128

1

1A

5

4

3

2

1

KBC

KBC(KBC)

KB_PWR_L

1 2

D21 *5V/0.2P_4

29

TRACK PAD BOARD CONN

TP_PWR

R538 100K_4

C360 1U/6.3V_4

R536 *0_4S

TP_PWR

R537 *0_4S R198 *0_4S

I2C_5_SDA_CONN_R

I2C_5_SCL_CONN_R

R540 100K_4

30mil

TP_PWR

C361

0.1U/16V_4

I2C_5_SDA_CONN_R I2C_5_SCL_CONN_R

TRACKPAD_INT_L_CONN

TP42

D22 *5V/0.2P_4 D11 *5V/0.2P_4

R524 *0_6

U28

D2S

1

ON

GND

SLG5NT1547V

CN10

7

66G1

5

8

5

G2

4

3

2

1

TRACK_PAD_6P

12 12

TP_PWR+V3P3A

C359

C134

1000P/50V_4

3

4

10P/50V_4

CN9

1

32

2

D D

KB_PWR_BTN_L[31]

KB_COL01[30] KB_COL07[30] KB_COL06[30]

KB_COL04[30] KB_COL05[30]

KB_COL03[30]

KB_COL00[30]

C C

R522 *0_4

KB_PWR_L

R521 *0_4S

KB_COL01 KB_COL07 KB_COL06

KB_ROW07[30]

KB_ROW00[30]

KB_ROW04[30] KB_ROW01[30]

KB_ROW03[30] KB_ROW06[30]

KB_ROW05[30]

KB_ROW10[30] KB_ROW11[30] KB_ROW09[30] KB_ROW08[30] KB_ROW12[30]

KB_ROW07 KB_COL04 KB_COL05 KB_ROW00 KB_COL02_SW KB_COL03 KB_ROW04 KB_ROW01 KB_COL00 KB_ROW02_SW KB_ROW03

KB_ROW06 KB_ROW05

KB_ROW10 KB_ROW11 KB_ROW09 KB_ROW08 KB_ROW12

31 3 4 5 6 7 8 9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

KB_CONN_51518-03001-001

7 8 5

6

3

4

1

2

CP5 *100p/50Vx4

7 8 5

6

3

4

1

2

CP2 *100p/50Vx4

7 8 5

6

3

4

1

2

CP4 *100p/50Vx4

7 8 5

6

3

4

1

2

CP3 *100p/50Vx4

7 8 5

6

3

4

1

2

CP1 *100p/50Vx4

C354 *100p/50V_4

KB_ROW11 KB_ROW09 KB_ROW08 KB_ROW12

KB_ROW04 KB_ROW01 KB_COL00 KB_ROW02_SW

KB_ROW03 KB_ROW06 KB_ROW05 KB_ROW10

KB_COL05 KB_ROW00 KB_COL02_SW KB_COL03

KB_COL07 KB_COL06 KB_ROW07 KB_COL04

KB_COL01

Trackpad(TPD)

I2C_5_SDA_CONN[35]

TRACKPAD_INT#[10,23]

S5 S0/S3

I2C_5_SCL_CONN[35]

TRACKPAD_PWREN

TRACKPAD_PWREN[30]

I2C_5_SDA_CONN I2C_5_SCL_CONN

R532 *0_4

Q56 2N7002K

1

2

TRACKPAD_PWREN

3

B B

HOLELESS RESET

1-CHIP(KBC)

+VRTC +VRTC

R352 *4.7K_4

R360 1M_4

BATT_EN#

3

BATT_ENABLE

A A

2

C216

2.2U/6.3V_4

5

1

Q33

2N7002K

BATT_EN# [37]

PWR_BTN_L[21,31]

BC_ACOK[31,35,37]

R368 *0_4S

R363 *0_4S

R364 1M/F_4

4

co-layout 4K4108 and 4K4137 SLG4K4108 (AL004108000) SLG4K4137 (AL004137000) 4K4137 PIN3 is BATT_ENABLE 4K4137 PIN4 is AC_PRESENT

+VRTC +VRTC +VRTC

R369 *10K_4

U25

PWR_BTN_L_4350 BATT_ENABLE ACPRESENT_4137

KB_COL02_SW

2

PWR_BTN_L

3

BATT_ENABLE

4

AC_PRESENT

5

KSO_SW

6

KSI_SW

7

C218

0.1U/16V_4

1

VDD

EC_RST_L

EC_IN_RW

EC_ENTERING_RW

KSO_INV

GND

PAD_GND

13

SLG4K4350VTR(TDFN-12)

R353 100K_4 R365 *4.7K_4 R377 *4.7K_4

12

SLG_EC_RST#

11

EC_IN_RW

10

EC_ENTERING_RW

9

KB_ROW02KB_ROW02_SW

8

KB_COL02

KSI

Pin 3,5,8,11 Open Drain

3

KB_ROW02_SW KB_COL02 EC_IN_RW

D20 RB500V-40

EC_IN_RW [35] EC_ENTERING_RW [30] KB_ROW02 [30]

KB_COL02 [30]

SLG_EC_RST# [21] EC_RST# [30,33]

pullup at EC side

2

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

KB/TP/HW RST

Tuesday, April 12, 2016 4129

1

1A

1 2 3

56

R73 *0_4S

R125

1 2

*0.01/F_0805_S

5

CLK_PCI_EC[12,27]

KB_COL02 KB_COL05 KB_COL04 KB_COL07

R398

100K/F_4

0.1U/16V_4

R92 *0_4S

5

LPC_LAD0[12,27] LPC_LAD1[12,27] LPC_LAD2[12,27]

CLK_PCI_EC

R413 22_4

TP15

R407 47K_4

C95 1u/6.3V_4

WLAN_PWR_EN[24]

PMIC_EN[39]

PCH_SUS_STAT_L[34]

TOUCHPANEL_PWREN[19]

TRACKPAD_PWREN[29]

EC_KBD_IRQ#[34]

BATT_Green

+V3P3A_EC

C243

0.1U/16V_4

EC_SPI_WP# EC_SPI_HOLD# EC_SPI_MOSI_R EC_SPI_MISO_R EC_SPI_CS#_R EC_SPI_CLK_R

BAT_LED0[27] BAT_LED1[27]

BATT_Amber

EC_KBD_ALERT[10]

R424

HCB1608KF-600T30_6

C250

0.1U/16V_4

C59

C245

0.1U/16V_4

R88 10K_4 R141 10K_4 R140 10K_4 R89 10K_4 R86 10K_4 R145 10K_4

TP29 TP9 TP22

TP53 TP12

TP26

+V3P3A_EC_ANA

C255

0.1U/16V_4

C236

0.1U/16V_4

+V3P3A_EC_SPI

LPC_LFRAME#[12,27] PLTRST#[24,34]

LPC_CLKRUN_L[12]

EC_GPIO12

EC_SOC_WAKE_SCI_N[34]

RSMRST_N_PWRGD[ 39]

EC_SERVO_JTAG_RST_N[21]

EC_UART0_RX[21]

EC_UART0_TX[21]

TP49 TP13

R121 *0_4S R118 *0_4S

R397 *0_4S

C242 1000P/50V_4

C56

0.1U/16V_4

EC_SPI_MISO_R EC_SPI_MOSI_R EC_SPI_CLK_R EC_SPI_CS#_R

LPC_LAD3[12,27]

KB_COL00[29] KB_COL01[29] KB_COL02[29] KB_COL03[29] KB_COL04[29] KB_COL05[29] KB_COL06[29]

KB_COL07[29] BOARD_ID1[21] EC_JTAG_TMS[21] EC_JTAG_TDI[21] BOARD_ID2[21]

KB_ROW00[29] KB_ROW01[29] KB_ROW02[29] KB_ROW03[29] KB_ROW04[29] KB_ROW05[29] KB_ROW06[29] KB_ROW07[29] KB_ROW08[29] KB_ROW09[29] KB_ROW10[29] KB_ROW11[29] KB_ROW12[29]

IRQ_SERIRQ[27,34]

EC_SMI_3P3_L[34]

EC_RST#[29,33]

C57 0.1U/16V_4

C223

0.1U/16V_4

SPI NOR FLASH

KBC(KBC)

D D

+V3P3A_EC

RP1 10K_10P8R

10

9

KB_COL06

8

KB_COL03

7 4

KB_COL01 KB_COL00

C C

PCH_RSMRST_L[34]

V3P3A_PWRGD[38,39]

B B

+V3P3A

A A

SOC_EC_SPI_WP#[34]

4

CLK_PCI_EC_R1

PLTRST#

BOARD_ID1

BOARD_ID2

SERIRQ- NOT USED

VCC1_RST#

CAP

WLAN_PWR_EN EC_GPIO47 ADAPTER_ID

TOUCHPANEL_PWREN

GYRO_INT2 V3P3A_PWRGD_EC EC_PLUG_DETECT EC_PWM0 PROBE_DETECT_L EC_PWM1

THERMAL_PROBE_EN_L EC_PWM3 EC_GPIO145 ALS_INT#

+VRTC

+V3P3A_EC

U13

2

SO

5

SI

HOLD

6

SCK

1

CE

W25X40CLSSIG

4

B25 B26 B27 A26 B29 B28 A27 A28

B16 A15 B15 A14 B14 B13 A13 A12 B12 A11 B11 A10 B10

A9 A6 B6 A4 B5 B4 A3 B3

A2 B43 B44

B2 A54

A29 B65 A38

B32 B41 B45 A36

A25

A7

A43 B46

A33 B36 A31 B33 B20 B18 B55 B56

B17 A37 A40 A60 A61 A59

B54 A39 B49 A17

B42

A34 B22

B7 A19 B31 A42 A53 B63

8

VDD

7

EC_SPI_HOLD#

3

EC_SPI_WP#

WP

4

VSS

EMBEDDED CONTROLLER

U14

LAD0/GPIO112 LAD1/GPIO114 LAD2/GPIO113 LAD3/GPIO111 PCI_CLK/GPIO117 LFRAME#/GPIO120 LRESET#/GPIO116 CLKRUN#/GPIO14

KSI0/GPIO125/TRACEDATA3 KSI1/GPIO126/TRACEDATA2 KSI2/GPIO144/TRACEDATA1 KSI3/GPIO32/TRACEDATA0 KSI4/GPIO142/TRACECLK KSI5/GPIO40 KSI6/GPIO42 KSI7/GPIO43 KSO0/GPIO0/JTAG_TCK KSO1/GPIO100/JTAG_TMS KSO2/GPIO101/JTAG_TDI KSO3/GPIO102/JTAG_TDO KSO4/GPIO103/TFDP_DATA/XNOR KSO5/GPIO104/TFDP_CLK KSO6/GPIO1 KSO7/GPIO2 KSO8/GPIO3 KSO9/GPIO106 KSO10/GPIO4 KSO11/GPIO107 KSO12/GPIO5 KSO13/GPIO6 KSO14/GPIO7 KSO15/GPIO10 KSO16/GPIO11 GPIO12/KSO17

SERIRQ/GPIO115 GPIO44/NSMI NEC_SCI/GPIO26

nRESET_OUT/GPIO121 VCC1_RST#/GPIO131 GPIO143/RSMRST# VCC_PWRGD/GPIO63

JTAG_RST# CAP

GPIO162/RXD GPIO165/TXD/SHD_CS1#

PS2CLK0/GPIO46 PS2DAT0/GPIO47 PS2CLK1/GPIO50 PS2DAT1/GPIO65 PS2CLK2/GPIO51 PS2DAT2/GPIO52 GPIO53/PS2_CLK3 GPIO152/PS2_DAT3

GPIO127/PECI_RDY GPIO130 GPIO132/PECI_DAT GPIO133/PWM0 GPIO135/KBRST GPIO136/PWM1

GPIO140/TACH2/TACH2PWM_IN GPIO141/PWM3/LED3 GPIO145 GPIO147

VREF_PECI

VBAT AVCC VCC1_1

VCC1_2 VCC1_3 VCC1_4 VCC1_5 VCC1_6

MEC1322-LZY DQFN132

KEYBOARD

SIDEBAND

POWER

C87

0.1U/16V_4

LPC

UART

GPIO

3

B38

EC_XTAL_OUT

XTAL1

B37

EC_XTAL_IN

XTAL2

B40

XTAL

GPIO

SMBUS/I2C

GPIO

FLASH

GND

+V3P3A_EC+V3P3A_EC_SPI

32kHZ_OUT/GPIO13

GPIO34/PWM2/TACH2PWM_OUT

ADC_TO_PWM_OUT/GPIO41

GPIO45/A20M/PVT_CS1#

ADC_TO_PWM_IN/ADC0/GPIO56

I2C0_CLK0/GPIO15 I2C0_DAT0/GPIO16

I2C0_CLK1/GPIO34 I2C0_DAT1/GPIO17

GPIO22/I2C1_CLK0 GPIO23/I2C1_DAT0

GPIO20/I2C2_CLK0 GPIO21/I2C2_DAT0

GPIO25/I2C3_DAT0 GPIO24/I2C3_CLK0

GPIO157/BC_CLK GPIO160/BC_DAT GPIO161/BC_INT#

GPIO54/PVT_MOSI

GPIO164/PVT_MISO

GPIO153/PVT_SCLK

GPIO146/PVT_CS0#

GPIO64/SHD_MOSI GPIO124/SHD_MISO GPIO122/SHD_SCLK GPIO150/SHD_CS0#

D6 RB500V-40

Q16 PJA138K

3

1

+V5A

2

3

ADC1/GPIO57 ADC2/GPIO60

ADC3/GPIO61 ADC4/GPIO62

GPIO105/TACH1

LED0/GPIO154 LED1/GPIO155 LED2/GPIO156

VSS_VBAT

USB_ILIM_SEL

B34

LID_OPEN_OUT1_R

GPIO27

B57

EC_ACIN_R EC_ACIN

GPIO30

A16

VOLUME_UP

GPIO31

B35

EC_SPI_WP_ME#

GPIO33

B64

VOLUME_DOWN

A32

GPIO35

B68

GPIO36

A30 A51 B24

EC_ADC0

A22

ACDC_ID

B23

BC_PMON

A20

WIFI_PWREN

B21

EC_GPIO62

A62

GPIO66

A46

EC_GPIO105

B39

GPIO110

B8

GPIO67

A8

GPIO55

B9

EC_BC_BATPRES

GPIO210

A18

GPIO211

A24

GPIO200

A56

SMB_BC_CLK

B59

SMB_BC_DATA

A55

EC_I2C0_SCL

B58

EC_I2C0_SDA

B47

EC_I2C_6_SCL_R

A44

EC_I2C_6_SDA_R

B48

EC_SENSOR_I2C1_SCL

A45

EC_SENSOR_I2C1_SDA

B66

SMB_THRM_DATA

A63

SMB_THRM_CLK

can be wake up cntrl GPIO

B19

PROCHOT_EC

GPIO151

B60

BOARD_ID0

A57

TP_GPIO155

B61 A49

B53 A50

GYRO_INT1

A58

USB_C_MUX_CROSS_BAR_EN

GPIO163

A21

GPIO206

B30

GPIO123

A41

GPIO202

B51

USB_C_MUX_CROSS_BAR_POL

GPIO201

A52

GPIO203

B62

GPIO204

B67

EC_SPI_MOSI_R

A47

EC_SPI_MISO_R

B1

EC_SPI_CLK_R

A48

EC_SPI_CS#_R

A64

SW_OPEN_EC

B50

EC_GPIO124_R

A1

EC_GPIO122

B52

WLAN_OFF_L

A35 A23

AVSS

A5

VSS

133

THM-GND

+V3P3A_EC_SPI

D7 RB500V-40

R150 *0_4

R405 *0_4S

R81 *0_4S

R138 GD@100_4 R79 GD@100_4 R142 GD@100_4 R78 GD@100_4

R137 *0_4S R394 *0_4S R149 *0_4S R91 10K_4

+V3P3A_EC_GD

the C load need check

USB_ILIM_SEL [28]

USB_CTL1

R75 *0_4S

+V3P3A_EC

WLAN_OFF_L [ 24]

2

TP31 TP57

TP58 TP20

TP23 TP67

TP17

TP14

TP19

EC_SPI_MOSI EC_SPI_MISO EC_SPI_CLK EC_SPI_CS#

EC_SPI_MISO_R EC_SPI_MOSI_R EC_SPI_CLK_R EC_SPI_CS#_R

For ICT, place on TOP side

2

32.768KHZ

Y3

1 2

R391 10M_4

C220 22p/50V_4

EC_ACIN [31]

SMC_ONOFF_N [31]

USB2_PWR_EN [28]

EC_ENTERING_RW [29]

USB_OC1_L [34]

BC_PMON [37]

PCH_WAKE_EC_L [34] USB_CTL1 [28] EC_REST_L [34]

USB3_PWR_EN [28]

USB_OC0_L [34]

PCH_SLP_SX_L [34] PCH_SLP_S4_L [34]

SMB_BC_CLK [37] SMB_BC_DATA [37]

BATT,Charger

SMB_THRM_DATA [33] SMB_THRM_CLK [33]

Thermal

PWR_BTN_SELECT [31] PCH_SUSPWRDNACK [34]

PCH_PWRBTN_L [16,34]

PCH_SLP_S3_L [34]

EC_STRAP_GPIO1 [12] EC_BL_DISABLE_L [20] STARTUP_LATCH_SET [ 31]

SMC_SHUTDOWN [31]

EC_SPI_MOSI [21] EC_SPI_MISO [21] EC_SPI_CLK [21] EC_SPI_CS# [21]

EC_HIB_L [31]

EC_GPIO124 [21]

CORE_PWROK_R [12,16,39]

TP83 TP84 TP85 TP86

EC-SIV-18

EC_XTAL_IN

C222 18P/50V_4

EC_SERVO_JTAG_RST_N EC_ACIN EC_RST#

LID_OPEN_OUT1_R

R111

EC_BC_BATPRES

10K_4

EC_I2C0_SCL EC_I2C0_SDA EC_I2C_6_SCL_R EC_I2C_6_SDA_R EC_SENSOR_I2C1_SCL EC_SENSOR_I2C1_SDA

EC_SPI_WP_ME#

R77 *100K_4 R76 100K_4

SMB_BC_CLK SMB_BC_DATA

BATT,Charger

SMB_THRM_CLK SMB_THRM_DATA

Thermal

PROCHOT_EC

D3 RB500V-40

D8 RB500V-40

R143 100K_4

LID_OPEN_OUT1_R

EC_BC_BATPRES

RAM ID - USE FOR BOARD ID

R415 *1K_4 R425 1K_4 R148 *1K_4

BOARD_ID0 BOARD_ID1 BOARD_ID2 0 NA 0

BOARD_ID0 BOARD_ID1 BOARD_ID2

EVT1.7EVT1.5EVT1.0 DVT

1

0

0 1

Size Document Number Rev

Date: Sheet of

0

NA

0 1

PROJECT : NL6D

Quanta Computer Inc.

KBC

Tuesday, April 12, 2016 4130

1

R112 *10K_4 R402 10K_4 R396 10K_4

R87 10K_4 R442 100K_4

R543 *10K_4 R544 *10K_4 R545 *10K_4 R546 *10K_4 R547 10K_4 R548 10K_4

SPI_WP_ME_ROM_Q [9]

EC_SPI_WP#

R106 3.3K/F_4 R408 3.3K/F_4

R130 1K_4 R430 1K_4

LID_OPEN_OUT1_L [21,27,31]

pullup at HSR side

BC_BATPRES [37]

PROCHOT# [12,21]

3

Q15

2

2N7002K

1

R414 1K_4 R426 *1K_4 R147 1K_4

BCRD2 FAB1 BCRD2 FAB1.1

1

0

1

0

1

30

+V3P3A_EC

+V3P3_THM

+V3P3A_EC

1 0 1

+V3P3A_EC

1A

5

4

3

2

1

KBC(KBC)

D D

C C

B B

POWERON and WAKE SEQUENCING

PWR_BTN_L[21,29]

+V3P3A_LDO

R24

3

*100K_4

Q4

R22

*PJA138K

PWR_BTN_SELECT[30]

KB_PWR_BTN_L[29]

EC_ACIN[30]

BC_ACOK[29,35,37]

2

1

R25 *1M_4

EC_ACIN

D17 RB500V-40

BC_ACOK BC_ACOK_FET

C194 *0.1U/16V_4

C196

0.1U/16V_4

*0_4S

R319 *47K_4

2

+V3P3A_LDO

3

1

R21 100K_4

PWR_BTN_L

D1 *RB500V-40

Q28 *PJA138K

31

+V3P3A_EC

R39 10K_4

SMC_ONOFF_N

3

Q3 PJA138K

PWR_BTN

R305 100K_4

LID_OPEN_OUT1_L

2

1

STARTUP_LATCH_SET[30]

+V3P3A_LDO

0.1u/16V_4C158

2 1

BC_ACOK

C166 0.01U/50V_4 R282

+V3P3A_LDO

0.1u/16V_4C4 U2

1

5

2

43

TC7SZ14FU

+V3P3A_LDO

LID_OPEN_OUT1_L[21,27,30]

5

3

74LVC1G32GW

EC_WAKE_L

R280 *10K_4

U24

EC-DV-04

2

R281 47K_4

SMC_ONOFF_N [30]

4

3

Q27 PJA138K

1

0.1u/16V_4C165

+V3P3A_LDO

R294 10K_4

SMC_SHUTDOWN[30]

0.1u/16V_4C154

1 2

+V3P3A_LDO

U22

TC7SZ14FU

V5A_EN_OR

R224 *0_4

D13 BAT54C

C150

0.1U/16V_4

V5A_EN [38]

U23

1

6

CP

C

2

5

GND

VCC

4

D3Q

74LVC1G175GW

5 43

EC_HIB_L[30]

EC_WAKE

R337 100K_4

+V3P3A_LDO

R318 100K_4

3

2

1

10K_4

STARTUP_FF_CLEAR_N

Q32 PJA138K

U21

1

A1

2

B1

5

A2

6

B2

NL27WZ02USG

+V3P3A_LDO

0.1u/16V_4C164

8

VDD

7

WAKE_V5A_EN_R WAKE_V5A_EN

Y1

3

Y2

4

VSS

+V3P3A_LDO

R255 100K_4

R260 *0_4S

C152

0.1U/16V_4

EC HIB WAKE SOURCES

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

PWRBTN/PS/SVID

Date: Sheet of

Tuesday, April 12, 2016 4131

Date: Sheet of

Tuesday, April 12, 2016 4131

Date: Sheet of

5

4

3

2

Tuesday, April 12, 2016 4131

1

1A

5

Video codec(VDC)

4

3

2

1

32

D D

C C

B B

Removed (2015/03/30)

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Quanta Computer Inc.

VIDEO CODEC

Tuesday, April 12, 2016 4132

1

1A

5

4

3

2

1

SENSORS/Touch screen Board/LED Board

Thermal (THM)

+V3P3A +V3P3_THM

SMB_THRM_CLK[30]

SMB_THRM_DATA[30]

R433 *0_4S

R127 *0_4S R427 *0_4S C124

TEMP_ALERT#[12]

D D

0305 renamed the net name of thermal SMBUS and move the pull up to EC page

C C

THERMAL SENSOR

+V3P3_THM

C332 0.1U/16V_4

EC_SMB2_CLK_THM EC_SMB2_DATA_THM

TEMP_ALERT#

R495 *0_4S

U20 TMP432ADGSR

10

SCLK

9

SDA

8

ALERT#

7

OVERT# GND6DN2

ADDR=0x4C

Place oo PCB BOT Local Temp.

EC_RST#

VCC

DP1 DN1 DP2

1 2 3 4 5

EC_RST# [29,30]

2200P/50V_4

C104 2200P/50V_4

H_THRMDA

H_THRMDC H_THRMDA2OVERT#

H_THRMDC2

Base: PIN 1 Emitter: PIN 2 Collector: PIN 3

Place oo PCB TOP Remote Temp.

2

1 3

2

1 3

Place oo PCB ? Remote Temp.

G-Sensor (ACS)

Q21MMBT3904

Q17MMBT3904

ACCELEROMETER

Removed (2015/03/27)

33

Touch screen(TSN)

B B

Removed (2015/03/27)

LED board(UIF)

A A

PROJECT : NL6D

Removed (2015/03/27)

Size Document Number Rev

Date: Sheet of

Tuesday, April 12, 2016 4133

Date: Sheet of

Tuesday, April 12, 2016 4133

Date: Sheet of

5

4

3

2

Tuesday, April 12, 2016 4133

PROJECT : NL6D

Quanta Computer Inc.

SENSORS

1

1A

5

4

3

2

1

LEVEL TRANSLATOR 1

SoC(CPU)

D D

C C

B B

ILB_SERIRQ[12]

PMC_SUS_STAT#[12]

PCH_WAKE_L[12]

SOC_WAKE_SCI_N[10,23]

EC_SMI_L[10,23]

KBD_IRQ#[10,23]

SOC_REST_BTN#[12,16,21]

USB OC

A A

USB_OC1#[11,28]

5

PWRON SEQUENCE

+V1P8A

1

Q55 DMG301NU-7

PMC_SUS_STAT#

USB_OC0#[11,28]

1

Q52 PJA138K

PCH_WAKE_L

SOC_WAKE_SCI_N

EC_SMI_L

KBD_IRQ#

SOC_REST_BTN#

USB3 OC(UB3)

USB_OC0#

USB2 OC(UB2)

USB_OC1#

+V3P3A

R504

R505 100K_4

3

R94 100K_4

3

R50 100K_4

3

R65 100K_4

3

R471 100K_4

3

10K_4

IRQ_SERIRQ [27,30] SOC_PWRBTN#[12] PCH_PWRBTN_L [16,30]

+V3P3A+V1P8A

PCH_SUS_STAT_L [30]

+V3P3A+V1P8A

PCH_WAKE_EC_L [30]

+V3P3A+V1P8A

EC_SOC_WAKE_SCI_N [30]

+V3P3A+V1P8A

EC_SMI_3P3_L [30]

+V3P3A+V1P8A

EC_KBD_IRQ# [30]

+V3P3A+V1P8A

EC_REST_L [30]

2

3

IRQ_SERIRQILB_SERIRQ

R485 10K_4

2

3

2

1

Q54 PJA138K

R502 *0_4

2

1

Q12 PJA138K R113 *0_4

2

1

Q7 DMG301NU-7

R49 *0_4

2

1

Q11 DMG301NU-7

R74 *0_4

2

1

Q51 PJA138K

R481 *0_4

0311 Added 5 FETs as level shifters on EC OD GPIOs

+V1P8A

2

1

Q45 PJA138K

2

1

Q34 PJA138K

R418 10K_4

3

R349 10K_4

3

+V3P3A

+V3P3A+V1P8A

4

USB_OC0_L [30]

USB_OC1_L [30]

PWRON SEQUENCE

+V1P8A

R58 10K_4

SOC_PWRBTN#

SOC_RSMRST#[12,16]

PMC_SUSPWRDNACK

SLP_S3#[12,39,41]

SLP_S0IX#[12,39]

SOC_PLTRST#[12,16,19]

SLP_S3#

SLP_S4#

SOC_PLTRST#

ROM WP

SOC_SPI_WP#[9]

3

R66 10K_4

+V3P3A

R67 *30K/F_4

+V3P3A

PCH_SLP_S3_L

R628 100K_4 R410 *100K_4

R411 *10K_4 R629 10K_4

PCH_SLP_S4_L

PCH_RSMRST_L [ 30]

PCH_SUSPWRDNACK [30]PMC_SUSPWRDNACK[12]

PCH_SLP_S3_L [30]

+V3P3A

PCH_SLP_S4_L [30]SLP_S4#[12,39]

+V1P8A

2

1

Q10 PJA138K

R59 *0_4

SOC_RSMRST#

GND

+V1P8A +V3P3A_PRIME

R395 *10K_4

+V1P8A

2

1

Q9 PJA138K

1

Q46 PJA138K

1

Q48 PJA138K

R392*0_4S

3

2

3

0305 SLP_SX related components are stuffed

+V1P8S

1

Q39 PJA138K

2

+V1P8A

2

1

Q47 *PJA138K

+V3P3A_PRIME

3

R439 10K_4

3

+V3P3S

R630 *10K_4

R440 *10K_4

+V3P3A

PCH_SLP_SX_LSLP_S0IX#

TPM_PLTRST# [27]

+V3P3A_EC_SPI

R542

2

GND

10K_4

2

3

Q60

PJA138K

1

R488 *0_4

3

Q59 PJA138K

1

SOC_EC_SPI_WP# [30]

pullup at EC ROM side

2

PCH_SLP_SX_L [30]

SOC_PLTRST#

C3690.1U/16V_4

+V1P8A

R631 0_4

U31

6

VCCB

5

DIR

4

B

SN74LVC1T45DRLR

R632 *0_4

1

C368 0.1U/16V_4

VCCA

2

GND

3

A

C370 220P/50V_4

+V1P8A

1

SOC_PLTRST# PLTRST#

Q81 *PJA138K

Quanta Computer Inc.

Size Document Number Rev

LEVEL TRANSLATOR 1

Date: Sheet of

Tuesday, April 12, 2016 4134

Date: Sheet of

Tuesday, April 12, 2016 4134

Date: Sheet of

Tuesday, April 12, 2016 4134

+V3P3S +V3P3A_PRIME

PLTRST# [24,30]

+V3P3A_PRIME+V3P3S

R633 *10K_4

2

3

PROJECT : NL6D

1

34

R634 *10K_4

1A

NOTE:USE 4 BIT LEVEL TRANSLATORS

5

LTE(LTE)

Removed (2015/03/27)

D D

4

WiFi(NGF)

WIFI SUSCLK

PMC_SUSCLK0[12]

WIFI WAKE(OD)

3

LEVEL TRANSLATOR 2

WIFI SIGNALS

+V1P8A

R206 10K_4

+V1P8A

2

1

Q25 DMG301NU-7

R283 *0_4S

3

WLAN_WAKE_LSOC_PMC_WAKE#

+V3P3A_WIFI

R202 10K_4

WIFI_SUSCLK [24]

WLAN_WAKE_L [24]SOC_PMC_WAKE#[12]

2

TRACK PAD I2C_5 SIGNALS

Trackpad(TPD)

I2C_5_SDA[10]

+V1P8A

(S5)

I2C_5_SCL[10]

R525 *2.2K_4

R519 *2.2K_4

I2C_5_SCL I2C_5_SCL_CONN

+V1P8A

1

Q58 DMG301NU-7

R535 *0_4

+V1P8A

1

Q57 DMG301NU-7

R520 *0_4

2

Hugo had the level shifter also

3

I2C_5_SDA_CONNI2C_5_SDA

R539 2.2K_4

2

R523 2.2K_4

3

1

I2C_5_SDA_CONN [29]

TP_PWR

I2C_5_SCL_CONN [29]

35

(S0/S3)

Touch Screen(TSN)

+V1P8A

R219

2

+V3P3A

GND

10K_4

R420 10K_4

2

3

Q40

PJA138K

1

WIFI_DISABLE

WIFI_DISABLE#[9]

C C

eDP CONTROL PIN

LCD(LDS)

EDP_BKLTEN[8]

B B

KBC(KBC)

AC DETECT

ACPRESENT[12]

+V1P8A

2

1

Q35 PJA138K

3

BC_ACOK [29,31,37]

EDP_BKLTCTL[8]

+V3P3DX_EDP

R361 10K_4

3

1

+V3P3A

3

2

1

GND

+V1P8A

2

1

Q26 PJA138K

EDP_BKLTEN_CONN [20]

Q42 PJA138K

+V3P3DX_EDP

R358

R390

10K_4

3

2

Q41

1

PJA138K

3

EDP_BKLTCTL_CONN [20]

Q43 PJA138K

+V3P3A_WIFI

R259 10K_4

RF_EN [24]

(S5)

TOUCH_INT#[9]

MUX_AUD_INT1#[10,23]

Audio(ADO)

(S5)

I2C_4_SDA[10]

+V1P8A

I2C_4_SCL[10]

I2C_0_SDA_R[10]

+V1P8A

I2C_0_SCL_R[10]

TOUCH SCREEN I2C_0 SIGNALS

R554 *0_4

+V1P8A

Q61

5

I2C_0_SDA_R

R551 *2.2K_4 R552 *2.2K_4

R561 *10K_4

+V1P8A

R559 *0_4

R560 *0_4

I2C_4_SDA

R183 2.2K_4

R182 2.2K_4

I2C_4_SCL I2C_4_SCL_AUDIO

4 3

2 6

1

I2C_0_SCL_R

*PJ4N3KDW

R555 *0_4

+V1P8A

2

3

1

Q63 *PJA138K

R558 *0_4

+V1P8S

2

3

1

I2C_4_SDA_AUDIO

Q23 *DMG301NU-7

R188 *0_4S

+V1P8S

2

3

1

Q22 *DMG301NU-7

R180 *0_4S

Removed (2015/04/09)

I2C_0_SDA_CONN

R556 *2.2K_4 R553 *2.2K_4

I2C_0_SCL_CONN

R557 *10K_4

R187 *2.2K_4

R184 *2.2K_4

I2C_0_SDA_CONN [19]

+V3P3A

I2C_0_SCL_CONN [19]

+V3P3A

TS_INT# [ 19]

I2C_4_SDA_AUDIO [26]

+V1P8S

I2C_4_SCL_AUDIO [26]

(S0/S3)

(S0)

0310 Added level shifter on SMBUS from

KBC(KBC)

A A

EC_IN_RW_Q[9]

HW RESET

5

+V1P8S

2

Q38 *PJA138K

1

R373 *0_4S

3

EC_IN_RW [29]

4

SoC to XDP, it will be un-stuffed in MP

SMB_SOC_DATA[10]

SMB_SOC_CLK[10]

SMB_SOC_CLK SMB_XDP_SCL

+V1P8A

2

1

Q30 DMG301NU-7

+V1P8A

2

1

Q29 DMG301NU-7

3

SMB_XDP_SDASMB_SOC_DATA

3

R308 2.2K_4

R309 2.2K_4

SMB_XDP_SDA [16]

+V3P3A

SMB_XDP_SCL [16]

+V1P8A +V1P8A

R199

2

AJACK_PRESENT_SOC[10] HP_JD_L [26]

Active high or Low?

AJACK_PRESENT_SOC HP_JD_L

2

10K_4

1

Q24 PJA138K

R197 *0_4

3

Active at falling edge, pullup at 227 side

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

LEVEL TRANSLATOR 2

Date: Sheet of

Tuesday, April 12, 2016

Date: Sheet of

Tuesday, April 12, 2016

Date: Sheet of

Tuesday, April 12, 2016

1

NL6D

1A

4135

5

4

3

2

1

DC JACK

36

PJ1

D D

POWER_JACK_50281-0050N-001

1 2

3 4

5

6

7

ADPIN-

EC1 1000P/50V/X7R_4

PF1

0466005.NR

1 2

EL3

HCB2012KF-800T50

EL2

HCB2012KF-800T50

PD2

SMAJ22A

2 1

+VADP

System Adaptor

PR143 100K/F_4

C C

VMUC_CTRL_F

PR144

4.7K/F_4

PQ5

AOL1413

5 2

4

2

PC197

0.1u/50V_6

1 3

PR139 20K/F_4

VMUC_CTRL

3

1

+VADP_F_+VDC_INADPIN+

PR134 20K/F_4

PQ11 *DMG301NU-7

PC191

0.1u/50V_6

VADP_FET_G

VMUC_CTRL_F

PQ4 AOL1413

1 3

2

4

VMUC_CTRL

PQ12

PMST3904

1 3

52

+VDC_IN_FET

JP4 *0R_12_S

EC-SVT-P03

+VDC_IN

B B

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

DC IN

Tuesday, April 12, 2016 4136

1

1A

5

DCCBB

A

4

3

2

1

VR PAGE: +VBATA

37

+VCHGR_LDO

PD5

REGN

HIDRV

PHASE LODRV

BATDRV

BATPRES

38

+VBATT

+VBATA

PC195

0.1u/50V_6

PC200

0.1u/25V_4

CHG_AGND

PC142 10u/25V_6 PC143 10u/25V_6

PC131

10u/25V_6

JP5 *0R_12_S

EC-SVT-P03

+VBATA_OUT

PR89

R1206-R010

PC198

0.1u/25V_4

2 cell: 9V (Default) Fsw: 800kHz (Default)

PC136

21

10u/25V_6

+V_BC_SW_VBA TT

PC199

CHG_AGND

PC140

10u/25V_6

0.1u/25V_4

PC135

PC138

10u/25V_6

PC144

10u/25V_6

PC137

10u/25V_6

PQ7 AOL1413

1

52

3

4

PC141

10u/25V_6

+VBATT

PC146

10u/25V_6

PC148

PC149

10u/25V_6

PC147

10u/25V_6

+V_BC_SW

PC134

0.1u/50V_6

BC_BST_R

PC129 47n/50V_6

CSD87381P

1

TG

4

BG

PQ6 CSD87381P

+V3P3A_LDO

+VCHGR_LDO

CHG_AGND

PD1 *RB500V-40

+VCHGR_VIN+VCHGR_VIN

PC196

PC116

PC121

10u/25V_6

PIMB061H-2R2MS 7x7x1.8mm Idc: 6A Isat: 13A

PL9

2.2uH_7X7X3

PR96

2.2_6

PGND

PC193

10u/25V_6

EL1

PR80

2.2_12

2

+VCHGR_VIN_FB

VIN

VSW

5 3

BC_BATDRV_R

HCB2012KF-800T50

+V_BC_SW

PC139 2200p/50V_6

+V_BC_SW_R

22UF CAPS TO BE REDUCED TO 2X10UF FOR COST REDUCTION

PR141 100K/F_4

BC_BATPRES [30]

PR93 10K/F_4

PR92

1.02K/F_4

21

PD6

DA2J10100L

+V_CHGR_VCC_D

PR140 10_1206

+V_CHGR_VCC

PC123 1U/25V_6

28

VCC

24

+VCHGR_LDO

26

TG_VBATT

25

BC_BST

BTST

27

+V_BC_SW

23

BG_VBATT

20

CHGR_SRP_DP

SR+

19

CHGR_SRN_DN

SR-

18

BC_BATDRV

17

BC_BAT

BAT

15

BC_BATPRES

EC-SVT-P01

29

PR90

22

GND

21

ILIM

*0R_6_S

?REV = 1

CHG_AGND

ADPTR_ILIM

EC-SVT-P01

BC_BST

CHG_AGND

PC133 1U/25V_6

EC-SVT-P01

*0_4_S

12

PR91

*0_4_S

12

PR94

*0_4_S

12

PR95 PR88 10/F_6

CHG_AGND

PR142 *100K/F_4

PR87 *0R_6_S

+VDC_IN

?

PU21

BQ24770RUYR

GND_EPAD

G130G231G332G433G534G635G736G837G9

DA2J10100L

D

PR67 430K/F_4

PR66

68.1K/F_4

+VDC_IN

CHG_AGND

+VCHGR_LDO

CHG_AGND

12V will enable charger

PC111 1000p/50V_4

PR146 100K/F_4

PR145 *0_4

+V3P3A_LDO

TP_CHGR_ACDRV

TP41

PR69 100K/F_4

+V3P3A_LDO

PR85 10K_4

PR86 1M_4

CHG_AGND

EC-SVT-P01

BC_ACOK[29,31,35]

PC108 1U/25V_6

PC109

0.1u/50V_6

PR68 *0_4_S

12

PR70 392K /F_4

EC-SVT-P01

SMB_BC_DATA SDA SMB_BC_CLK

BC_PMON[30]

VBATA_VR_HOT_N[12]

PR72

30.1K/F_4

PR64

R1206-R010

PC115

0.1u/50V_6

PR79 *0_4_S

PR84

BC_PMON

CHG_AGND

21

PC117

0.1u/50V_6

CHGR_CMSRC

CHGR_ACDRV AC_DET

12

*0_4_S

12

BC_ACOK

BC_PMON

VBATA_VR_HOT_N

BC_CMPIN

BC_CMPOUT

BC_CELL

BQ24770RUYR

PC122

100P/50V_4

CHG_AGND

1

AC-

2

AC+

3

CMSRC

4

ACDRV

6

ACDET

11

SDA

12

SCL

5

ACOK

7

IADP

8

IDCHG

9

PMON

10

PROCHOT

13

CMPIN

14

CMPOUT

16

CELL

BATTERY CONNECTOR

+VBATT

+V3P3A

PR150

*10K/F_4

EC2

1000P/50V/X7R_4

VBATT2

PR148

200/F_4

PD8

2 1

PF2

0501010.WR

1 2

2 1

PR147 200/F_4

PD7 PDZ5.6B

VBATT MBCLK

MBDATA

BC_BATPRES

+V3P3A

PR151 *100K/F_4

PC201

0.1U/16V_4

BATT_EN#

PR149 *0_6

2

EL4

PC145

10u/25V_6

HCB2012KF-800T50

EL5

HCB2012KF-800T50

Removed (2015/09/21)

PC150

10u/25V_6

A

SMB_BC_DATA[30]

SMB_BC_CLK[30]

5

4

3

SMB_BC_DATA SMB_BC_CLK

PDZ5.6B

BATT_EN#

PJ2

1

10

2

11 3 4 5 6 7

12 8 9

BATT_CONN_8P

Size Docu ment Number Rev

Date: Sheet of

Tuesday, April 12, 2016 4137

Date: Sheet of

Tuesday, April 12, 2016 4137

Date: Sheet of

Tuesday, April 12, 2016 4137

BATT_EN# [29]

PROJECT : NL6D

Quanta Computer Inc.

+VBATA

1

1A

5

D D

C C

B B

DISCAHRGE CKT

+V3P3A

+V3P3A_DISCHR G1

PD3

DA2J10100L

21

PD4

DA2J10100L

21

PC163

22U/6.3V_6

+V3P3A +V5A

V3P3A_PWR GD[30,39]

PR30 475/F_4

4

Input Capacitors

+V5A

PR44 100K/F_4

+V5A_LDO Always ON w/ VBATA EN pin floating Ground EN to disable

+V3P3A

PR4 100K/F_4

+V5A

+V5A_LDO Always ON w/ VBATA EN pin floating Ground EN to disable

PR20 475/F_4

PR42 10K/F_4

EC-SVT-P03

+VBATA

V5A_VBYP

JP3

Place thermal V IAs (connected to VBATA plane)

*SHORTPAD

close to VIN pi n (PIN 1)

1 2

+V5A_VIN

PC75

10u/25V_8

EC-SVT-P01

V5A_EN

+V5A_LDO

12

PR52 *0_4_S

Maximum current = 100mA

+VBATA

EC-SVT-P03

PC5

0.1U/25V_4

V3P3A_PWR GD

PR2

1 2

*0_4_S

EC-SVT-P01

PR7

PC151

10u/25V_8

Place thermal V IAs (connected to VBATA plane) close to VIN pi n (PIN 1)

V3P3A_VBYP

V3P3A_ENLDO

+V3P3A_LDO

*0_4

3

PC178

10u/25V_8

PR53 *0_4_S

12

V5A_PWRG D

V5A_ENLDO

+V5A_LDO

PC71 *4.7U/6.3V_4

*SHORTPAD

1 2

Input Capacitors

+V3P3A_VIN

PC1

10u/25V_8

V3P3A_EN

+V3P3A_LDO

Maximum current = 100mA

EC-SVT-P01

PC7

4.7U/6.3V_4

PC177

10u/25V_8

13

EN

4

PGOOD

3

VBYP

12

ENLDO

6

LDO

14

AGND

EC-SVT-P01

*0_4_S

Charge Pump VCLK

PC4

10u/25V_8

13

4 3

12

6

14

PC80

0.1U/25V_4

V5A_BOOT +V5A_LX

1

10

VIN

BOOT

PU16

RT7291BGQUF

VOUT

PGND

CLK5VCC

11

V5A_CLK

12

+VCC_V5A

PR43

NOT USED

PR46

1 2

*0_4_S

PC12

0.1U/25V_4

V3P3A_BOOT

1

10

VIN

EN PGOOD VBYP

PU2

RT7290AGQUF

ENLDO LDO AGND

CLK5VCC

11

V3P3A_CLK

12

+VCC_V3P3A

PR6

*0_4_S

EC-SVT-P01

PR55 *0R_6_S

V5A_BOOT_R

+V5A_LX_R

PC89

150p/50V_4

8

SW1

9

SW2

15

SW3

16

SW4

7 2

PC81

1u/10V_4

1 2

V5A_VOUT

PC69

Internal Input for Controller (5V) DO NOT CONNECT

PR45

*0_4_S

*0.1U/16V_4

PL5

2.2uH_7X7X3

+V5A_OUT

EC-SVT-P01

PR11 *0R_6_SJP6

V3P3A_BOOT_R

PR12

2.2_6

+V3P3A_LX +V3P3A_LX_R

PC15 150p/50V_4

BOOT

VOUT

PGND

8

SW1

9

SW2

15

SW3

16

SW4

7

V3P3A_VOUT

2

PC11 *0.1U/16V_4

PC10

1u/10V_4

+V3P3A_OUT

PL2

2.2uH_7X7X3

PR9

1 2

*0_4_S

EC-SVT-P01

Internal Input for Controller (5V) DO NOT CONNECT

2

PR54

2.2_6

EC-SVT-P03

JP2

*0R_12_S

Place thermal V IAs (connected to GROUND plane) close to PGND p in (PIN 2)

Connect V3PA_AG ND to System Grou nd with a VIA clo se to AGND pin ( PIN 14)

Output Capacitors

PC63

PC49

22U/6.3V_6

PC173

22U/6.3V_6

PC54

PC169

22U/6.3V_6

EC-SVT-P03

JP1

*0R_12_S

Output Capacitors

PC22

PC160

PC157

22U/6.3V_6

Place thermal V IAs (connected to GROUND plane) close to PGND p in (PIN 2)

PC29

22U/6.3V_6

PC159

22U/6.3V_6

1

38

PJP2

+V5A_P

*SHORTPAD

+V5A_P

22U/6.3V_6

+V3P3A_P

PC36

1 2

PC60

PC171

22U/6.3V_6

+V3P3A Imax = 5A OCP = 11A Fsw = 500kHz

PJP1 *SHORTPAD

1 2

22U/6.3V_6

+V5A

+V5A Imax =7.5A OCP = 11A Fsw = 500kHz

+V3P3A

VR_ALW_EN_N_D1

3

A A

V5A_EN[31]

+V3P3A_DISCHR G1

PU9

74AHC1G04GW

5

?

2

4

?

5

VR_ALW_EN _NV5A_EN

?

A

Y

VCC

GND

74LVC1G04GW

?

3

2

1

PQ3 T2N7002BK

VR_ALW_EN_N_D2

3

PQ2

2

T2N7002BK

1

4

Charge Pump VCLK

NOT USED

PROJECT : NL6D

Quanta Computer Inc.

Size Document Num ber Rev

Date: Sheet of

3

2

Date: Sheet of

V5A_V3P3A

Tuesday, April 12, 2016 4138

1

1A

5

4

3

2

1

PMIC

D D

PR73 *0_4_S

12

VGG_OCP

SLP_S0IX# SLP_S4# SLP_S3#

VTT_FB

PC186

*1000P/50V_4

12

11

26 27

8

10

9

47 15 16 36 24

4

38 37 39

49 12 23 25

7 6

45 53

+VCC_LX_R1

1

PC118 *0.1U/16V_4

2

+VGG_LX_R1

1

PC185 *0.1U/16V_4

2

+VDDQ_LX_R1

1

PC189 *0.1U/16V_4

2

PU18

PMIC_EN

I2C_SDA I2C_SCL

OCSET1 OCSET2 OCSET6

VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6_VDDQ

SLP_S0IX_B SLP_S4_B SLP_S3_B

PHASE1 PHASE2 DDR_SEL IRQ

VTT_SNS VTT

AGND EPAD

RT5067AGQW

REV = 1

1 OF 1

?

RT5067

VIN_1P8_SW

VDDQ_LDO_IN

DRAMPWROK VCCAPWROK COREPWROK

VO_1P8U

VO_1P8S V3P3A_O

V3P3_IN

VO_1P15S

VIN_LDO

VOUT_1P24

VSYS

RSMRST_B

PHASE6

LX3_1 LX3_2

LX4_1 LX4_2

PWM1 PWM2 PWM6

DRV_EN6 DRV_EN2 DRV_EN1

10/F_6

+VBIAS_PMIC

PC128 1U/10V_4

44

VCC

20

VIN3

35

VIN4

21

VIN5

28 29 30

31 32

41 42 43 46

5 40

1 2

3 17

18 19

33 34

22

LX5

50 13 51

52 14 48

?

PR81

+VCC_LX[40]

+VDDQ +V3P3A_PRIME

PR62

10K_4

PR132 1M_4

C C

B B

PR65 10K_4

DDR3_DRAM_PWROK DDR3_VCCA_PWROK

PR124 10K_4

CORE_PWROK_R

PMIC_EN

+VCC_SENSEP_DP[12] +VGG_SENSEP_DP[12]

+VNN_SENSEP[12]

CORE_PWROK_R [12,16,30] DDR3_DRAM_PWROK [6 ] DDR3_VCCA_PWROK [7]

V3P3A_PWRGD[30,38]

+VCC +VGG

PR83 *0_4_S

12

PR125 0_4

PMIC_EN[30]

+VNN

PR76

PR117

100/F_4

12

PR118 0_4

+VDDQ_VTT +VDDQ_VTT_PMIC

PR104 *0R_6_S

V3P3A_PWRGD

PMIC_EN

PR116 100/F_4

1

2

PC183

*0.1U/16V_4

1

2

PC184

SLP_S0IX#[12,34] SLP_S4#[12,34] SLP_S3#[12,34,41]

PR127 *0_4

PR131 *0_4_S

I2C_1_SDA[10] I2C_1_SCL[10]

PR129 21.5K/F_4 PR121 45.3K/F_4 PR128 15K/F_4

1

2

*0.1U/16V_4

PR126 100K_4

PMIC_IRQ_N[9]

PC101

22u/6.3V_6

PR123 *0_4_S

+VGG_LX[40]

PR133 *0_4_S

+VDDQ_LX[40]

12

PMIC_EN_R

I2C_1_SDA I2C_1_SCL

VCC_OCP VDDQ_OCP

VCC_FB VGG_FB VNN_FB V1P05A_FB V1P8A_FB

VDDQ_FB[40]

PC132

*0.1U/16V_4

+VCC_LX_R1 +VGG_LX_R1

DDR_SEL PMIC_IRQ_N

12

PC102

22u/6.3V_6

+V5A

+V1P8A_LDO

+VBATA_PMIC

PMIC_RSMRST_N +VDDQ_LX_R1

DDR3_DRAM_PWROK DDR3_VCCA_PWROK CORE_PWROK_R

VCC_PWM VGG_PWM VDDQ_PWM

VDDQ_DRV_EN VGG_DRV_EN VCC_DRV_EN

PC94 10u/25V_6

PC114 10u/25V_6

PC92 10u/25V_6

PC113 10u/25V_6

PC85 10u/25V_6

+V1P8S_PMIC

PR57 *0R_6_S

PC96 10U/6.3V_6

+V3P3A

2.2u/10V_4

PC187

PR74 *0_4_S

12

VCC_PWM [40] VGG_PWM [40] VDDQ_PWM [40]

VDDQ_DRV_EN [40] VGG_DRV_EN [40] VCC_DRV_EN [40]

PC78 10u/25V_6

+V1P8S

+V1P15A_PMIC

PC91 10u/25V_6

PC112 10u/25V_6

PC126 22u/6.3V_6

+V1P24A

0.1U/25V_4

+V1P8A

PC127 22u/6.3V_6

PC130

PC95 10U/6.3V_6

+VNN_LX

+V1P05A_LX

+V1P8A_LX

PR50

*0R_8_S

PR71

*0R_8_S

PR49

*0R_8_S

PC125 22u/6.3V_6

PC120 22u/6.3V_6

+V1P8U

PC93 10U/6.3V_6

+V3P3A_PRIME_PMIC

PR75 *0R_6_S

PR82 *0R_6_S

+VDDQ+VBATA

PC104 10u/6.3V_6

+V1P15A

+V1P8A

V1P8A_FB

+V5A+VNN_VIN

+V5A+V1P05A_VIN

+V5A+V1P8A_VIN

PC100

2.2u/10V_4

PL7

1uH_5X5X1.2

V1P05A_FB

PL8

1uH_5X5X1.2

PL6

2.2uH_5X5X1.2

PR56 *0_4_S

PR122 *0R_6_S

12

+V3P3A_PRIME

PC83 22u/6.3V_6

PR63 *0_4_S

PC105 22u/6.3V_6

PC79 22u/6.3V_6

12

PC99 22u/6.3V_6

PC76 22u/6.3V_6

PMIC_RSMRST_N

PC90 22u/6.3V_6

PC107 22u/6.3V_6

PC73 22u/6.3V_6

+V1P8A

PR120 10K_4

+V3P3A

PR135 10K/F_4

+VNN_PMIC

PMIC_IRQ_N

PR137 *0_4_S

PC87 22u/6.3V_6

PC106 22u/6.3V_6PR58 *0_4_S

PC82 22u/6.3V_6

12

+V1P8A_PMIC

To SOC

RSMRST_N_PWRGD [30]

PC84

PC88

22u/6.3V_6

+V1P05A

PC98

PC97

22u/6.3V_6

PC86

PC77

22u/6.3V_6

PR51

*0R_12_S

PR48

*0R_12_S

39

+VNN

+V1P8A

A A

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PMIC

Tuesday, April 12, 2016 4139

1

1A

5

4

3

2

1

VR PAGE : +VCC, +VGG, +VDDQ

CSD87381P

VIN

TG

VSW

BG

PGND

PU15 CSD87381P

Max Current = 15A Ron_HS = 15.7mohm Ron_LS = 7.0mohm

CSD87381P

VIN

VSW

PGND

+VBATA

PR110 *0R_8_S

+VCC_VIN

PC170

PC172 10u/25V_6

2 5

+VCC_LX

3

+VBATA

0603 25V

2 5

+VGG_LX

3

PR37 *0R_8_S

+VGG_LX_R

PC62 10u/25V_6

PR35

2.2_6

PC61 1000P/50V/NPO_4

PR41

2.2_6

+VCC_LX_R

PC59 1000P/50V/NPO_4

10u/25V_6

PL4

0.47uH_7X7x3

+VGG_VIN

PC51 10u/25V_6

PL3

0.33uH_7X7X3

PC47 10u/25V_6

PC56 10u/25V_6

+VGG_PMIC

+VCC_PMIC

PC52 1u/25V_6

PR47

*0R_12_S

270u/2.5V_7343

PC202 *270u/2.5V_7343

+

PC74

PC65 22u/6.3V_6

PC66 22u/6.3V_6

PC67 22u/6.3V_6

Not Moving PMR after Bulk Caps due to INA Device placement

PC48 1u/25V_6

PR29

*0R_12_S

PC37

270u/2.5V_7343

PC42

+

270u/2.5V_7343

PC34 22u/6.3V_6

PC35 22u/6.3V_6

PC64 22u/6.3V_6

+VGG Imax =14 A OCP = 16.8A

PC32 22u/6.3V_6

+VCC Imax =7 A OCP = 10A

+VCC

PC68

PC72

*22u/6.3V_6

22u/6.3V_6

+VGG

PC33

PC31

22u/6.3V_6

Place Cin close to FET VIN pin (1uF closer to VIN)

PC46 1U/10V_4

+VCC_VCC

+VCC_VGG

VGG_DRV_EN VGG_PWM

+V5A

PR38 10/F_6

PU14

8 1

5 6

9

+V5A

PR32 10/F_6

8 1

5 6

9

VCC EN

PWM GND

EPAD

RT9610BZQW

PU13

VCC EN

PWM GND

EPAD

RT9610BZQW

<IPN>

UGATE

BOOT PHASE LGATE

UGATE

BOOT PHASE LGATE

3 4 2 7

VCC_UGATE

VCC_LGATE

VGG_UGATE VGG_BOOT

VGG_LGATE

PR39 2.2_6

VCC_BOOT_RVC C_BOOT

TP24

Place Cin close to FET VIN pin (1uF closer to VIN)

PR31 2.2_6

VGG_BOOT_R

TP52

TP21

PC58

0.1U/25V_4

+VCC_LX[39]

TP18

PC45

0.1U/25V_4

+VGG_LX[39]

1 4

1

TG

4

BG

PU12 CSD87381P

Max Current = 15A Ron_HS = 15.7mohm Ron_LS = 7.0mohm

D D

PC57 1U/10V_4

VCC_DRV_E N[39] VCC_PW M[39]

C C

VGG_DRV_EN[39] VGG_PWM[39]

B B

VCC_DRV_E N VCC_PW M

40

+VBATA

PR19 *0R_8_S

+V5A

PR8 10/F_6

+VCC_VDD Q

PC9 1U/10V_4

VDDQ_DRV _EN[39] VDDQ_PW M[39]

A A

5

VDDQ_DRV _EN VDDQ_PW M

8 1

5 6

9

<IPN>

PU4

VCC

UGATE

EN PWM

GND EPAD

RT9610BZQW

BOOT PHASE LGATE

3 4 2 7

VDDQ_UGAT E

VDDQ_LGATE

4

PR10 2.2_6

TP5

VDDQ_BOOT _RVDDQ_B OOT

TP43

PC13

0.1U/25V_4

+VDDQ_LX[39]

1

TG

4

BG

PU6 CSD87381P

CSD87381P

PGND

VSW

+VDDQ_VIN

PC24

PC23

1u/25V_6

10u/25V_6

PR17

2.2_6

+VDDQ_LX_R

PC26 1000P/50V/NPO_4

PL1

1uH_7X7X3

2

VIN

5

+VDDQ_LX

3

PC28 10u/25V_6

+VDDQ_PMIC

PC27 10u/25V_6

PR5

*0R_12_S

VDDQ_FB[39]

PC6

270u/2.5V_7343

+VDDQ Imax = 5A

PC18 22u/6.3V_6

OCP = 8A

+VDDQ

PC17 22u/6.3V_6

PROJECT : NL6D

Quanta Computer Inc.

Size Document Num ber Rev

Date: Sheet of

VCC, VGG, VDDQ

Tuesday, April 12, 2016 4140

1

1A

PR60

1 2

*0_4_S

+

2

PC19 22u/6.3V_6

PC20 22u/6.3V_6

5

4

3

2

1

VR PAGE: POWER GATES

41

+V3P3DX_EDP: VCC_EDP

CHECK SLEW RATE

+V3P3A

D D

EDP_VDDEN_SWITCH

EDP_VDDEN[8]

1.8V level

C C

PC14

0.1U/16V_4

2

PR13 20K_4

1

+V3P3A

2

PR102 100K_4

3

1

PR103 100K_4

PQ9 DMG301NU-7

EDP_VDD_EN_R

EDP_VDDEN_G

DEFAULT OPTION FOR PANEL POWER SEQUENCING

B B

+V5A

2

PC176

0.1U/16V_4

+V3P3S

PR113 10K_4

A A

1

SLP_S3#_R

2

PC180

0.1U/16V_4

1

PR14 *0_4

+V5S

PU28

2

IN

3

EN

4

FLG

PU7

5

IN

4

IN

3

ON/OFF

NCT3522U

+V3P3S

2

OUT1

OUT2

GND

7

AP2151DFMG-7

PR101 100K_4

3

1

5

6

1

OUT

GND

EDP_VDDEN_SWITCH

PQ8 DMG301NU-7

+V5S

1 2

PC181 10u/16V_6

+V3P3DX_EDP_OUT

PC30 22u/6.3V_6

PC25 22u/6.3V_6

PR18

*0R_12_S

+V3P3DX_EDP

SDMMC3_PWR_EN_N

1 1 0 0 1

SDMMC3_PWR_EN_N[8,19]

+V3P3S

SLG7NT402

+V3P3A

PC21

0.1U/16V_4

1 2

SLP_S3#[12,34,39]

10U/6.3V_6

Notes: Imax: 4A Rise time: 1ms

SDMMC3_1P8_EN VSDIO (V)

0

0V

1

0V

3.3V

0

1.8V

PC161 1U/10V_4

EC-SVT-P01

PR25

1 2

*0_4_S

Design Note : controls the time when VSDIO changes from 3.3V to 1.8V

SDMMC3_1P8_EN

VSDIO_EN_G_N

PR23 100K_4

PC165

0.1U/16V_4

1 2

2

PC158

+V1P8A

+V3P3A_PRIME

PR24 100K_4

3

PQ1 DMG301NU-7

1

VSDIO_3P3_1P8_T_CKT

PR107 47K_4

1 2 4

SLG7NT402VTR

8

VDD

GND

7

ON D

PU3

SLP_S3#_CAPSLP_S3#

CAP

5

S

?

PC43 22u/6.3V_6

+VSDIO

CAD Note : place the caps close to IC NEW FOOT PRINT IS REQUIRED

+V3P3A

PC162

1U/10V_4

PU24

A1

VIN1

VIN2

EN

BD2204GUL-E2

BGA6_P5MM_C10_22H

PR109 240/F_4

PQ10 DMG301NU-7

VOUT

GND

SEL

VSDIO_EN

2

A2

A3

+VSDIO

1 2

VSDIO_DISC_D

3

1

PC8 4700P/25V_4

PC44 22u/6.3V_6

PC166

4.7U/6.3V_4

B1

B2

B3

+V3P3S+V3P3A

1 2

PR27 *0.002_1206

+V3P3DX_EDP

Notes: Imax: 100 mA Rise time: 150 uSec

+VSDIO

PC164

2.2u/10V_4

PR105

SDMMC3_1P8_ENVSDIO_SEL

100K_4

SDMMC3_1P8_EN [8]

PROJECT : NL6D

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Power Gates

Tuesday, April 12, 2016 4141

1

1A

Quanta NL6D Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual