QUANTA LZ3, LZ3A Schematics

5

4

3

2

1

LZ3/LZ3A (Z580) Intel Chief River Platform (Optimus) Block Diagram

01

27MHz

D

MEMORY

PCI-E

D

DDRIII-SODIMM1

INTEL

NV

Nvidia

FAN / THERMAL

DDR SYSTEM

Ivy Bridge

Page13

Dual Channel DDR3

35W(DC/QC)

Interfaces

N13P-GS

Page29

1333/1600

1.5V

DDRIII-SODIMM2

rPGA 988

N13P-GL

VRAM x8pcs

PCI-Express 3.0

REGULATOR (DDR3)

Page12

Page2,3,4,5

N13M-GE1

Page19,20

Graphics

BGA(29X29mm)

1.5VSUS, 0.75VSMDDR_VTERM,1.5V

FDI

DMI

Page14,15,16,17,18

1.5V_GPU,1.5V_CPU Page37

REGULATOR

+1.05V_VTT,+1.8V

Page38

DMIX4

DC/DC

SATA - HDD

6Gbit/s

INT_HDMI

HDMI

3VPCU, 5VPCU, +15V

FDI

DMI

Page21

Page36

PG 42

Page26

1.5Gbit/s

INT_CRT

CRT

CPU Core

C

SATA - CD-ROM

Page22

Page41

PG 43

C

Page26

INT_LVDS

LVDS

VGA Core Discrete

Page23

USB2.0

Page42,43

PG 44

Panther Point

X1

X2

X1

X1

Card Reader

HM76

Camera

USB2.0 Ports X2

Bluetooth

Controller

Page30

Page28

Page30

PCH

RTS5139-GR

Speaker

AUDIO CODEC

USB3.0

Page31

IHDA

Page25

Reltek

X2

ALC269Q-VC2-GR

Card Reader

Page25

USB 3.0 Ports X2

Audio Jack

32.768KHz

CONN

Page28

5-IN-1

(External MIC)

SD/MMC/MS/XD

Page25

PCI-E

Page31

B

X1

X1

Xia

B

Head-Phone Jack

25MHz

INT_MIC(analog)

Mini PCI-E Card

LAN

Page25

Page6,7,8,9,10,11

USB2.0

Page25

WLAN

(10/100 and 1G LAN)

RTL8105E/RTL8111F

BIOS & ME FW

SPI

LPC

Page27

Page24

8M

25MHz

EC

SPI Flash

IT8518 CX

Page32

A

A

K/B

T/P

Battery

Charger

PROJECT : LZ2A

Page32

Page30

Page35

Page35

Quanta Computer Inc.

Size

Document Number

Rev

Custom

Front page

1A

Date:

Thursday, December 01, 2011

Sheet

1

of

43

5

4

3

2

1

D

C

B

A

5

4

3

2

1

4,6,7,8,10,33,34,38,43	+1.05V_PCH	02
4,10,12,13,33,34,37,43	+1.5V_SUS
6,7,8,9,10,27,31,34	+3V_S5
4,33	+1.5V_CPU

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.

PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.

Ivy Bridge Processor (DMI,PEG,FDI)

U36A

Ivy Bridge Processor (CLK,MISC,JTAG)

PEG_ICOMPI

J22

PEG_COMP

PEG_ICOMPO

J21

6

DMI_TXN0

B27

H22

B25

DMI_RX#[0]

PEG_RCOMPO

PEG_RXN[0..15]

14

U36B

6

DMI_TXN1

DMI_RX#[1]

6

DMI_TXN2

A25

DMI_RX#[2]

PEG_RXN0

6

DMI_TXN3

B24

DMI_RX#[3]

PEG_RX#[0]

K33

M35

PEG_RXN1

6

DMI_TXP0

B28

PEG_RX#[1]

L34

PEG_RXN2

SNB_IVB# N.A at SNB EDS #27637 0.7v1

MISC

CLOCKS

A28

CLK_CPU_BCLKP

8

DMI_RX[0]

PEG_RX#[2]

C26

BCLK

6

DMI_TXP1

B26

DMI_RX[1]

DMI

PEG_RX#[3]

J35

PEG_RXN3

7

H_SNB_IVB#

PROC_SELECT#

BCLK#

A27

CLK_CPU_BCLKN

8

6

DMI_TXP2

A24

DMI_RX[2]

PEG_RX#[4]

J32

PEG_RXN4

B23

H34

PEG_RXN5

R533

1K/F_4

6

DMI_TXP3

DMI_RX[3]

PEG_RX#[5]

H31

PEG_RXN6

TP12

SKTOCC#

AN34

6

DMI_RXN0

G21

PEG_RX#[6]

G33

PEG_RXN7

SKTOCC#

A16

DPLL_SSCLKP_R

R534

*0_4

CLK_DPLL_SSCLKP

8

DMI_TX#[0]

PEG_RX#[7]

DPLL_REF_CLK

6

DMI_RXN1

E22

DMI_TX#[1]

PEG_RX#[8]

G30

PEG_RXN8

DPLL_REF_CLK#

A15

DPLL_SSCLKN_R

R537

*0_4

CLK_DPLL_SSCLKN

8

F21

F35

PEG_RXN9

6

DMI_RXN2

D21

DMI_TX#[2]

PEG_RX#[9]

E34

PEG_RXN10

R536

1K/F_4

+1.05V_PCH

6

DMI_RXN3

DMI_TX#[3]

PEG_RX#[10]

E32

PEG_RXN11

TP9

TP_CATERR#

AL33

6

DMI_RXP0

G22

PEG_RX#[11]

D33

PEG_RXN12

CATERR#

D22

DMI_TX[0]

PEG_RX#[12]

D31

PEG_RXN13

THERMAL

6

DMI_RXP1

F20

DMI_TX[1]

- GRAPHICS

PEG_RX#[13]

B33

PEG_RXN14

6

DMI_RXP2

DMI_TX[2]

PEG_RX#[14]

6

DMI_RXP3

C21

DMI_TX[3]

PEG_RX#[15]

C32

PEG_RXN15

PEG_RXP[0..15] 14

32

EC_PECI

AN33

PECI

SM_DRAMRST#

R8

CPU_DRAMRST#

DDR3

MISC

PEG_RX[0]

J33

PEG_RXP0

PEG_RX[1]

L35

PEG_RXP1

K34

PEG_RXP2

32,41

H_PROCHOT#

R168

56_4

H_PROCHOT#_R

AL32

AK1

SM_RCOMP_0

R565

140/F_4

6

FDI_TXN0

A21

PEG_RX[2]

H35

PEG_RXP3

PROCHOT#

SM_RCOMP[0]

A5

SM_RCOMP_1

R559

25.5/F_4

H19

FDI0_TX#[0]

PEG_RX[3]

H32

PEG_RXP4

SM_RCOMP[1]

A4

SM_RCOMP_2

R560

200/F_4

6

FDI_TXN1

E19

FDI0_TX#[1]

PEG_RX[4]

G34

PEG_RXP5

SM_RCOMP[2]

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,

6

FDI_TXN2

FDI0_TX#[2]

FDI

PEG_RX[5]

PEG_RXP6

AN32

6

FDI_TXN3

F18

FDI0_TX#[3]

PEG_RX[6]

G31

9 PM_THRMTRIP#

THERMTRIP#

SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,

B21

F33

PEG_RXP7

6

FDI_TXN4

C20

FDI1_TX#[0]

PEG_RX[7]

F30

PEG_RXP8

SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,

6

FDI_TXN5

D18

FDI1_TX#[1]

PEG_RX[8]

E35

PEG_RXP9

6

FDI_TXN6

FDI1_TX#[2]

PEG_RX[9]

6

FDI_TXN7

E17

FDI1_TX#[3]

PEG_RX[10]

E33

PEG_RXP10

AP29

XDP_PRDY#

Intel(R)

PEG_RX[11]

F32

PEG_RXP11

PRDY#

TP19

PCI EXPRESS*

D34

PEG_RXP12

AP27

XDP_PREQ#

PEG_RX[12]

PREQ#

TP17

6

FDI_TXP0

A22

FDI0_TX[0]

PEG_RX[13]

E31

PEG_RXP13

G19

C33

PEG_RXP14

MANAGEMENT

AR26

XDP_TCLK

6

FDI_TXP1

E20

FDI0_TX[1]

PEG_RX[14]

B32

PEG_RXP15

JTAG & BPM

TCK

AR27

XDP_TMS

TP47

6

FDI_TXP2

G18

FDI0_TX[2]

PEG_RX[15]

CPU_PLTRST#_R

6

PM_SYNC

R448

*0_4s

PM_SYNC_R

AM34

TMS

AP30

XDP_TRST#

TP41

6

FDI_TXP3

FDI0_TX[3]

M29 PEG_TXN0_C

PM_SYNC

TRST#

TP38

6

FDI_TXP4

B20

FDI1_TX[0]

PEG_TX#[0]

+3V_S5

C19

M32

PEG_TXN1_C

AR28

XDP_TDI_R

6

FDI_TXP5

D19

FDI1_TX[1]

PEG_TX#[1]

M31

PEG_TXN2_C

TDI

AP26

XDP_TDO

TP43

6

FDI_TXP6

F17

FDI1_TX[2]

PEG_TX#[2]

L32

PEG_TXN3_C

9

H_PWRGOOD

R450

*0_4s

H_PWRGOOD_R

AP33

TDO

TP56

6

FDI_TXP7

FDI1_TX[3]

PEG_TX#[3]

UNCOREPWRGOOD

L29

PEG_TXN4_C

R147

6

FDI_FSYNC0

J18

PEG_TX#[4]

K31

PEG_TXN5_C

1.5K/F_4

C500

R461

10K_4

FDI0_FSYNC

PEG_TX#[5]

AL35

XDP_DBRST#

6

FDI_FSYNC1

J17

FDI1_FSYNC

PEG_TX#[6]

K28

PEG_TXN6_C

*0.1U/10V_4

C524

*0.1U/10V_4

DBR#

XDP_DBRST#

6

PEG_TX#[7]

J30

PEG_TXN7_C

U32

+1.05V_PCH

PM_DRAM_PWRGD_R

V8

SM_DRAMPWROK

6

FDI_INT

H20

J28

PEG_TXN8_C

1

5

FDI_INT

PEG_TX#[8]

H29

PEG_TXN9_C

NC

VCC

AT28

6

FDI_LSYNC0

J19

PEG_TX#[9]

G27

PEG_TXN10_C

8,14,24,27 PLTRST#

2

R421

*75_4

BPM#[0]

AR29

FDI0_LSYNC

PEG_TX#[10]

IN

BPM#[1]

6

FDI_LSYNC1

H17

FDI1_LSYNC

PEG_TX#[11]

E29

PEG_TXN11_C

BPM#[2]

AR30

F27

PEG_TXN12_C

3

GND OUT

4

CPU_PLTRST#

R444

*43_4

CPU_PLTRST#_R

AR33

RESET#

AT30

PEG_TX#[12]

D28

PEG_TXN13_C

RV11

PWR

BPM#[3]

AP32

PEG_TX#[13]

F26

PEG_TXN14_C

*74LVC1G07GW

BPM#[4]

AR31

PEG_TX#[14]

BPM#[5]

E25

PEG_TXN15_C

AT31

eDP_COMP

A18

PEG_TX#[15]

R160

BPM#[6]

AR32

eDP_COMPIO

M28 PEG_TXP0_C

BPM#[7]

A17

eDP_ICOMPO

PEG_TX[0]

0402-*EGA

INT_eDP_HPD_Q

B16

M33

PEG_TXP1_C

750/F_4

eDP_HPD

PEG_TX[1]

M30

PEG_TXP2_C

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.

PEG_TX[2]

L31

PEG_TXP3_C

PEG_TX[3]

PEG_TXP4_C

Ivy Bridge_rPGA_2DPC_Rev0p61

eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.

C15

eDP_AUX

PEG_TX[4]

L28

D15

eDP_AUX#

eDP

PEG_TX[5]

K30

PEG_TXP5_C

K27

PEG_TXP6_C

PEG_TX[6]

J29

PEG_TXP7_C

C17

PEG_TX[7]

J27

PEG_TXP8_C

eDP_TX[0]

PEG_TX[8]

F16

eDP_TX[1]

PEG_TX[9]

H28

PEG_TXP9_C

C16

G28

PEG_TXP10_C

G15

eDP_TX[2]

PEG_TX[10]

E28

PEG_TXP11_C

eDP_TX[3]

PEG_TX[11]

F28

PEG_TXP12_C

C18

PEG_TX[12]

D27

PEG_TXP13_C

E16

eDP_TX#[0]

PEG_TX[13]

E26

PEG_TXP14_C

D16

eDP_TX#[1]

PEG_TX[14]

D25

PEG_TXP15_C

eDP_TX#[2]

PEG_TX[15]

F15

eDP_TX#[3]

+3V_S5

Ivy Bridge_rPGA_2DPC_Rev0p61

+1.5V_SUS

+1.5V_CPU

C290

R278

R275

*0_4

*0.1U/10V_4

1K/F_4

5

U15

R274

200/F_4

12,13

DDR3_DRAMRST#

R280

1K/F_4

CPU_DRAMRST#_R

3

1

CPU_DRAMRST#

6

SYS_PWROK

2

4

PM_DRAM_PWRGD_Q

R269

130/F_4

PM_DRAM_PWRGD_R

Q31

R268

*0_4

6 PM_DRAM_PWRGD

1

FOR DEEP S3

R613

0_4

2

ME2N7002E

8 DRAMRST_CNTRL_PCH

3

R270

R273

39_4

3

1

R271

*0_4s

*74AHC1G09GW

32

EC_DRAMRST_GATE

R614

*0_4

C289

4.99K/F_4

0.047U/10V_4

PM_DRAM_PWRGD_Q

R272

*3K/F_4

Q30

2

ME2N7002E

MAINON#

4,34

EC-C01

12,13

DRAMRST_CNTRL_DDR

PEG x16 (UMA Non-stuff)

DP & PEG Compensation

PEG_TXN[0..15] 14

Processor pull-up(CPU)

0.1uF AC coupling Caps for PCIE GEN3

PEG_TXP[0..15]

14

0.1uF AC coupling Caps for PCIE GEN3

+1.05V_PCH

R527

24.9/F_4

PEG_COMP

PEG_TXP0_C

C499

DIS@0.1U/10V/X5R_4 PEG_TXP0

PEG_TXN0_C

C498

DIS@0.1U/10V/X5R_4 PEG_TXN0

+1.05V_PCH

PEG_TXP1_C

C475

DIS@0.1U/10V/X5R_4 PEG_TXP1

PEG_TXN1_C

C474

DIS@0.1U/10V/X5R_4 PEG_TXN1

PEG_ICOMPI and RCOMPO signals should be routed within 500

H_PROCHOT# R164

62/F_4

PEG_TXP2_C

C513

DIS@0.1U/10V/X5R_4 PEG_TXP2

PEG_TXN2_C

C514

DIS@0.1U/10V/X5R_4 PEG_TXN2

mils typical impedance = 43 mohms PEG_ICOMPO signals should

XDP_TDO

R178

51_4

PEG_TXP3_C

C493

DIS@0.1U/10V/X5R_4 PEG_TXP3

PEG_TXN3_C

C492

DIS@0.1U/10V/X5R_4 PEG_TXN3

XDP_TMS

R480

51_4

PEG_TXP4_C

C487

DIS@0.1U/10V/X5R_4 PEG_TXP4

PEG_TXN4_C

C486

DIS@0.1U/10V/X5R_4 PEG_TXN4

be routed within 500 mils

XDP_TDI_R

R477

51_4

PEG_TXP5_C

C508

DIS@0.1U/10V/X5R_4 PEG_TXP5

PEG_TXN5_C

C509

DIS@0.1U/10V/X5R_4 PEG_TXN5

typical impedance = 14.5 mohms

XDP_PREQ#

R172

*51_4

PEG_TXP6_C

C477

DIS@0.1U/10V/X5R_4 PEG_TXP6

PEG_TXN6_C

C476

DIS@0.1U/10V/X5R_4 PEG_TXN6

XDP_TCLK

R487

51_4

PEG_TXP7_C

C504

DIS@0.1U/10V/X5R_4 PEG_TXP7

PEG_TXN7_C

C503

DIS@0.1U/10V/X5R_4 PEG_TXN7

XDP_TRST#

R470

51_4

PEG_TXP8_C

C478

DIS@0.1U/10V/X5R_4 PEG_TXP8

PEG_TXN8_C

C479

DIS@0.1U/10V/X5R_4 PEG_TXN8

PEG_TXP9_C

C502

DIS@0.1U/10V/X5R_4 PEG_TXP9

PEG_TXN9_C

C501

DIS@0.1U/10V/X5R_4 PEG_TXN9

PEG_TXP10_C

C481

DIS@0.1U/10V/X5R_4 PEG_TXP10

PEG_TXN10_C

C480

DIS@0.1U/10V/X5R_4 PEG_TXN10

+1.05V_PCH

R532

*10K_4

INT_eDP_HPD_Q

PEG_TXP11_C

C494

DIS@0.1U/10V/X5R_4 PEG_TXP11

PEG_TXN11_C

C495

DIS@0.1U/10V/X5R_4 PEG_TXN11

PEG_TXP12_C

C483

DIS@0.1U/10V/X5R_4 PEG_TXP12

PEG_TXN12_C

C482

DIS@0.1U/10V/X5R_4 PEG_TXN12

PEG_TXP13_C

C491

DIS@0.1U/10V/X5R_4 PEG_TXP13

PEG_TXN13_C

C490

DIS@0.1U/10V/X5R_4 PEG_TXN13

+1.05V_PCH

R528

24.9/F_4

eDP_COMP

PEG_TXP14_C

C484

DIS@0.1U/10V/X5R_4 PEG_TXP14

PEG_TXN14_C

C485

DIS@0.1U/10V/X5R_4 PEG_TXN14

eDP_COMPIO and ICOMPO signals should be shorted near balls and

PEG_TXP15_C

C497

DIS@0.1U/10V/X5R_4 PEG_TXP15

PEG_TXN15_C

C496

DIS@0.1U/10V/X5R_4 PEG_TXN15

routed with typical impedance <25 mohms

PROJECT : LZ2A

Quanta Computer Inc.

Size

Document Number

Rev

IVY Bridge 1/4

1A

Date:

Thursday, December 01, 2011

Sheet

2

of

43

5

4

3

2

1

D

C

B

A

5

4

3

2

1

Ivy Bridge Processor (DDR3)

03

U36C

U36D

D

SA_CLK[0]

AB6

M_A_CLKP0

13

12

M_B_DQ[63:0]

SB_CLK[0]

AE2

M_B_CLKP0

12

D

13

M_A_DQ[63:0]

M_A_DQ0

SA_CLK#[0]

AA6

M_A_CLKN0 13

M_B_DQ0

SB_CLK#[0]

AD2

M_B_CLKN0 12

C5

V9

C9

R9

SA_DQ[0]

SA_CKE[0]

M_A_CKE0

13

SB_DQ[0]

SB_CKE[0]

M_B_CKE0

12

M_A_DQ1

D5

M_B_DQ1

A7

SA_DQ[1]

SB_DQ[1]

M_A_DQ2

D3

M_B_DQ2

D10

SA_DQ[2]

SB_DQ[2]

M_A_DQ3

D2

M_B_DQ3

C8

SA_DQ[3]

SB_DQ[3]

M_A_DQ4

D6

AA5

M_A_CLKP1 13

M_B_DQ4

A9

AE1

M_B_CLKP1 12

SA_DQ[4]

SA_CLK[1]

SB_DQ[4]

SB_CLK[1]

M_A_DQ5

C6

AB5

M_B_DQ5

A8

AD1

SA_DQ[5]

SA_CLK#[1]

M_A_CLKN1

13

SB_DQ[5]

SB_CLK#[1]

M_B_CLKN1

12

M_A_DQ6

C2

V10

M_A_CKE1

13

M_B_DQ6

D9

R10

M_B_CKE1

12

SA_DQ[6]

SA_CKE[1]

SB_DQ[6]

SB_CKE[1]

M_A_DQ7

C3

M_B_DQ7

D8

SA_DQ[7]

SB_DQ[7]

M_A_DQ8

F10

M_B_DQ8

G4

SA_DQ[8]

SB_DQ[8]

M_A_DQ9

F8

M_B_DQ9

F4

SA_DQ[9]

SB_DQ[9]

M_A_DQ10

G10

AB4

M_B_DQ10

F1

AB2

M_A_DQ11

G9

SA_DQ[10]

SA_CLK[2]

AA4

M_B_DQ11

G1

SB_DQ[10]

SB_CLK[2]

AA2

SA_DQ[11]

SA_CLK#[2]

SB_DQ[11]

SB_CLK#[2]

M_A_DQ12

F9

W9

M_B_DQ12

G5

T9

SA_DQ[12]

SA_CKE[2]

SB_DQ[12]

SB_CKE[2]

M_A_DQ13

F7

M_B_DQ13

F5

M_A_DQ14

G8

SA_DQ[13]

M_B_DQ14

F2

SB_DQ[13]

SA_DQ[14]

SB_DQ[14]

M_A_DQ15

G7

M_B_DQ15

G2

M_A_DQ16

K4

SA_DQ[15]

AB3

M_B_DQ16

J7

SB_DQ[15]

AA1

SA_DQ[16]

SA_CLK[3]

SB_DQ[16]

SB_CLK[3]

M_A_DQ17

K5

AA3

M_B_DQ17

J8

AB1

SA_DQ[17]

SA_CLK#[3]

SB_DQ[17]

SB_CLK#[3]

M_A_DQ18

K1

W10

M_B_DQ18

K10

T10

M_A_DQ19

J1

SA_DQ[18]

SA_CKE[3]

M_B_DQ19

K9

SB_DQ[18]

SB_CKE[3]

SA_DQ[19]

SB_DQ[19]

M_A_DQ20

J5

M_B_DQ20

J9

M_A_DQ21

J4

SA_DQ[20]

M_B_DQ21

J10

SB_DQ[20]

SA_DQ[21]

SB_DQ[21]

M_A_DQ22

J2

AK3

M_A_CS#0

13

M_B_DQ22

K8

AD3

M_B_CS#0

12

SA_DQ[22]

SA_CS#[0]

SB_DQ[22]

SB_CS#[0]

M_A_DQ23

K2

AL3

M_B_DQ23

K7

AE3

SA_DQ[23]

SA_CS#[1]

M_A_CS#1

13

SB_DQ[23]

SB_CS#[1]

M_B_CS#1

12

M_A_DQ24

M8

AG1

M_B_DQ24

M5

AD6

SA_DQ[24]

SA_CS#[2]

SB_DQ[24]

SB_CS#[2]

M_A_DQ25

N10

AH1

M_B_DQ25

N4

AE6

M_A_DQ26

N8

SA_DQ[25]

SA_CS#[3]

M_B_DQ26

N2

SB_DQ[25]

SB_CS#[3]

SA_DQ[26]

SB_DQ[26]

M_A_DQ27

N7

M_B_DQ27

N1

SA_DQ[27]

SB_DQ[27]

M_A_DQ28

M10

M_B_DQ28

M4

C

M_A_DQ29

M9

SA_DQ[28]

AH3

M_A_ODT0 13

M_B_DQ29

N5

SB_DQ[28]

B

AE4

M_B_ODT0 12

C

SA_DQ[29]

SA_ODT[0]

SB_DQ[29]

SB_ODT[0]

M_A_DQ30

N9

A

AG3

M_B_DQ30

M2

AD4

SA_DQ[30]

SA_ODT[1]

M_A_ODT1

13

SB_DQ[30]

SB_ODT[1]

M_B_ODT1

12

M_A_DQ31

M7

AG2

M_B_DQ31

M1

AD5

M_A_DQ32

AG6

SA_DQ[31]

SA_ODT[2]

AH2

M_B_DQ32

AM5

SB_DQ[31]

MEMORY

SB_ODT[2]

AE5

SA_DQ[32]

MEMORY

SA_ODT[3]

SB_DQ[32]

SB_ODT[3]

M_A_DQ33

AG5

M_B_DQ33

AM6

M_A_DQ34

AK6

SA_DQ[33]

M_B_DQ34

AR3

SB_DQ[33]

SA_DQ[34]

SB_DQ[34]

M_A_DQ35

AK5

M_B_DQ35

AP3

SA_DQ[35]

SB_DQ[35]

M_A_DQ36

AH5

M_A_DQSN[7:0] 13

M_B_DQ36

AN3

M_B_DQSN[7:0] 12

SA_DQ[36]

SB_DQ[36]

M_A_DQ37

AH6

C4

M_A_DQSN0

M_B_DQ37

AN2

D7

M_B_DQSN0

SA_DQ[37]

SA_DQS#[0]

SB_DQ[37]

SB_DQS#[0]

M_A_DQ38

AJ5

G6

M_A_DQSN1

M_B_DQ38

AN1

F3

M_B_DQSN1

M_A_DQ39

AJ6

SA_DQ[38]

SA_DQS#[1]

J3

M_A_DQSN2

M_B_DQ39

AP2

SB_DQ[38]

SB_DQS#[1]

K6

M_B_DQSN2

SA_DQ[39]

SA_DQS#[2]

SB_DQ[39]

SB_DQS#[2]

M_A_DQ40

AJ8

M6

M_A_DQSN3

M_B_DQ40

AP5

N3

M_B_DQSN3

SA_DQ[40]

SA_DQS#[3]

SB_DQ[40]

SB_DQS#[3]

M_A_DQ41

AK8

AL6

M_A_DQSN4

M_B_DQ41

AN9

AN5

M_B_DQSN4

M_A_DQ42

AJ9

SA_DQ[41]

SA_DQS#[4]

AM8

M_A_DQSN5

M_B_DQ42

AT5

SB_DQ[41]

SYSTEM

SB_DQS#[4]

AP9

M_B_DQSN5

SA_DQ[42]

SYSTEM

SA_DQS#[5]

SB_DQ[42]

SB_DQS#[5]

M_A_DQ43

AK9

AR12

M_A_DQSN6

M_B_DQ43

AT6

AK12

M_B_DQSN6

M_A_DQ44

AH8

SA_DQ[43]

SA_DQS#[6]

AM15

M_A_DQSN7

M_B_DQ44

AP6

SB_DQ[43]

SB_DQS#[6]

AP15

M_B_DQSN7

SA_DQ[44]

SA_DQS#[7]

SB_DQ[44]

SB_DQS#[7]

M_A_DQ45

AH9

M_B_DQ45

AN8

SA_DQ[45]

SB_DQ[45]

M_A_DQ46

AL9

M_B_DQ46

AR6

M_A_DQ47

AL8

SA_DQ[46]

M_B_DQ47

AR5

SB_DQ[46]

SA_DQ[47]

SB_DQ[47]

M_A_DQ48

AP11

M_A_DQSP[7:0] 13

M_B_DQ48

AR9

M_B_DQSP[7:0] 12

SA_DQ[48]

SB_DQ[48]

M_A_DQ49

AN11

D4

M_A_DQSP0

M_B_DQ49

AJ11

C7

M_B_DQSP0

SA_DQ[49]

SA_DQS[0]

SB_DQ[49]

SB_DQS[0]

M_A_DQ50

AL12

F6

M_A_DQSP1

M_B_DQ50

AT8

G3

M_B_DQSP1

SA_DQ[50]

SA_DQS[1]

SB_DQ[50]

SB_DQS[1]

M_A_DQ51 AM12

K3

M_A_DQSP2

M_B_DQ51

AT9

J6

M_B_DQSP2

M_A_DQ52

AM11

SA_DQ[51]

SA_DQS[2]

N6

M_A_DQSP3

M_B_DQ52

AH11

SB_DQ[51]

DDR

SB_DQS[2]

M3

M_B_DQSP3

SA_DQ[52]

DDR

SA_DQS[3]

SB_DQ[52]

SB_DQS[3]

M_A_DQ53

AL11

AL5

M_A_DQSP4

M_B_DQ53

AR8

AN6

M_B_DQSP4

SA_DQ[53]

SA_DQS[4]

SB_DQ[53]

SB_DQS[4]

M_A_DQ54

AP12

AM9

M_A_DQSP5

M_B_DQ54

AJ12

AP8

M_B_DQSP5

SA_DQ[54]

SA_DQS[5]

SB_DQ[54]

SB_DQS[5]

M_A_DQ55

AN12

AR11

M_A_DQSP6

M_B_DQ55

AH12

AK11

M_B_DQSP6

SA_DQ[55]

SA_DQS[6]

SB_DQ[55]

SB_DQS[6]

M_A_DQ56

AJ14

AM14

M_A_DQSP7

M_B_DQ56

AT11

AP14

M_B_DQSP7

M_A_DQ57

AH14

SA_DQ[56]

SA_DQS[7]

M_B_DQ57

AN14

SB_DQ[56]

SB_DQS[7]

SA_DQ[57]

SB_DQ[57]

M_A_DQ58

AL15

M_B_DQ58

AR14

B

SA_DQ[58]

SB_DQ[58]

B

M_A_DQ59

AK15

M_B_DQ59

AT14

M_A_DQ60

AL14

SA_DQ[59]

M_A_A[15:0]

13

M_B_DQ60

AT12

SB_DQ[59]

M_B_A[15:0]

12

SA_DQ[60]

SB_DQ[60]

M_A_DQ61

AK14

AD10

M_A_A0

M_B_DQ61

AN15

AA8

M_B_A0

M_A_DQ62

AJ15

SA_DQ[61]

SA_MA[0]

W1

M_A_A1

M_B_DQ62

AR15

SB_DQ[61]

SB_MA[0]

T7

M_B_A1

SA_DQ[62]

SA_MA[1]

SB_DQ[62]

SB_MA[1]

M_A_DQ63

AH15

W2

M_A_A2

M_B_DQ63

AT15

R7

M_B_A2

SA_DQ[63]

SA_MA[2]

SB_DQ[63]

SB_MA[2]

W7

M_A_A3

T6

M_B_A3

SA_MA[3]

V3

M_A_A4

SB_MA[3]

T2

M_B_A4

SA_MA[4]

SB_MA[4]

V2

M_A_A5

T4

M_B_A5

SA_MA[5]

W3

M_A_A6

SB_MA[5]

T3

M_B_A6

SA_MA[6]

SB_MA[6]

13

M_A_BS#0

AE10

W6

M_A_A7

12

M_B_BS#0

AA9

R2

M_B_A7

SA_BS[0]

SA_MA[7]

SB_BS[0]

SB_MA[7]

AF10

V1

M_A_A8

AA7

T5

M_B_A8

13

M_A_BS#1

SA_BS[1]

SA_MA[8]

12

M_B_BS#1

SB_BS[1]

SB_MA[8]

V6

W5

M_A_A9

R6

R3

M_B_A9

13

M_A_BS#2

SA_BS[2]

SA_MA[9]

12

M_B_BS#2

SB_BS[2]

SB_MA[9]

AD8

M_A_A10

AB7

M_B_A10

SA_MA[10]

V4

M_A_A11

SB_MA[10]

R1

M_B_A11

SA_MA[11]

SB_MA[11]

W4

M_A_A12

T1

M_B_A12

SA_MA[12]

SB_MA[12]

13 M_A_CAS#

AE8

AF8

M_A_A13

12 M_B_CAS#

AA10

AB10

M_B_A13

AD9

SA_CAS#

SA_MA[13]

V5

M_A_A14

AB8

SB_CAS#

SB_MA[13]

R5

M_B_A14

13

M_A_RAS#

SA_RAS#

SA_MA[14]

12

M_B_RAS#

SB_RAS#

SB_MA[14]

13

M_A_WE#

AF9

V7

M_A_A15

12

M_B_WE#

AB9

R4

M_B_A15

SA_WE#

SA_MA[15]

SB_WE#

SB_MA[15]

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

A

A

PROJECT : LZ2A

Quanta Computer Inc.

Size

Document Number

Rev

IVY Bridge 2/4

1A

Date:

Thursday, December 01, 2011

Sheet

3

of

43

5

4

3

2

1

5

4

3

2

1

Ivy Bridge Processor (GRAPHIC POWER)

33,41

+VCC_CORE

04

34

MAINON_15V

Ivy Bridge Processor

2,6,7,8,10,33,34,38,43

+1.05V_PCH

2,33

+1.5V_CPU

2,10,12,13,33,34,37,43

+1.5V_SUS

CPU VGT

10,27

+1.5V

7,10,33,34,40

+1.8V

CPU Core Power

SNB 45W:33A

POWER

33,34,39

+0.85V

22uF x 12

33,41

+VCC_GFX

SNB: 55A

SNB 45W:55A

22uF x 4 (Reserved)

U36G

TP34

POWER

22uF x 32

U36F

SNB 45W:8.5A

AT24

VAXG1

VAXG_SENSE

AK35

VCC_AXG_SENSE

41

IVY: 55A

+VCC_GFX

CPU VTT

SENSE

LINES

R423

100/F_4

+VCC_GFX

D

22uF x 3 (Non-stuff)

AG34

AH13

AR24

VAXG2

VSSAXG_SENSE

VSS_AXG_SENSE

41

+VCC_CORE

22uF x 10

AT23

AK34

R425

100/F_4

+1.05V_PCH

22uF x 6 (Non-stuff)

C580

C586

C590

C210

AT20

VAXG4

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AT18

TP36

AG35

VAXG5

VCC1

AT17

VAXG6

AG33

VCC2

VCCIO1

AH10

AR23

VAXG7

C218

C219

C216

C220

VCC3

VCCIO2

VAXG8

AG32

AG10

AR21

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AG31

VCC4

VCCIO3

AC10

C246

C251

C247

C245

C244

C243

AR20

VAXG9

AG30

VCC5

VCCIO4

Y10

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AR18

VAXG10

AL1

+VDDR_REF_CPU

+VDDR_REF_CPU

VCC6

VCCIO5

VAXG11

SM_VREF

AG29

VCC7

VCCIO6

U10

AR17

VAXG12

VREF

CAD Note: +VDDR_REF_CPU should

AG28

P10

AP24

22uF_8 x8 Socket TOP cavity

AG27

VCC8

VCCIO7

L10

C226

C232

C236

C239

AP23

VAXG13

have 10 mil trace width

VCC9

VCCIO8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

VAXG14

AG26

VCC10

VCCIO9

J14

AP21

VAXG15

AF35

VCC11

VCCIO10

J13

AP20

VAXG16

SA_DIMM_VREFDQ

B4

SMDDR_VREF_DQ0_M3

13

AF34

VCC12

VCCIO11

J12

AP18

VAXG17

SB_DIMM_VREFDQ

D1

SMDDR_VREF_DQ1_M3

12

AF33

J11

AP17

C222

C221

C230

C217

VCC13

VCCIO12

VAXG18

R561

*1K_4

AF32

VCC14

VCCIO13

H14

AN24

VAXG19

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AF31

H12

AN23

AF30

VCC15

VCCIO14

H11

C598

C597

C596

C248

AN21

VAXG20

R564

*1K_4

AF29

VCC16

VCCIO15

G14

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AN20

VAXG21

VCC17

VCCIO16

VAXG22

1.5V-RAILS

AC33

VCC32

ANDPEGDDR

VCCIO30

C13

22uF (Reserved)

AK23

VAXG37

GRAPHICS

VDDQ13

P4

AF28

VCC18

VCCIO17

G13

C237

C565

C241

C240

AN18

VAXG23

AF27

VCC19

VCCIO18

G12

AN17

VAXG24

AF26

VCC20

VCCIO19

F14

22uF_8 x7 Socket TOP cavity

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AM24

VAXG25

VDDQ1

AF7

+1.5V_CPU

CPU MCH

AD35

VCC21

VCCIO20

F13

AM23

VAXG26

VDDQ2

AF4

AD34

F12

22uF_8 x5 Socket BOT cavity

AM21

AF1

AD33

VCC22

VCCIO21

F11

AM20

VAXG27

VDDQ3

AC7

C282

C287

C281

C283

SNB 45W: 5A

C519

C198

C193

C175

AD32

VCC24

VCCIO23

E14

AM18

VAXG29

VDDQ5

AC4

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

330uF/6mohm x 1

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AD31

VCC25

VCCIO24

E12

AM17

VAXG30

VDDQ6

AC1

AD30

VCC26

C602

C601

C252

C249

C600

AL24

VAXG31

VDDQ7

Y7

330uF x1, 10uF_8 x6 Socket BOT edge.

10uF x 6

AD29

VCCIO25

E11

AL23

Y4

22uF_8 x10 Socket TOP

VCC27

22U/6.3V_8

22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

VAXG32

VDDQ8

AD28

VCC28

VCCIO26

D14

AL21

VAXG33

VDDQ9

Y1

edge

AD27

VCC29

VCCIO27

D13

AL20

VAXG34

VDDQ10

U7

+ C285

SNB: 5A

AD26

D12

AL18

U4

AC35

VCC30

VCCIO28

D11

AL17

VAXG35

VDDQ11

U1

C279

C286

220U/2.5V_7343

AC34

VCC31

VCCIO29

C14

AK24

VAXG36

VDDQ12

P7

10U/6.3V_6 10U/6.3V_6

IVY: 5A

22uF (Reserved)

C517

C516

C520

C518

AC32

VCC33

VCCIO31

C12

AK21

VAXG38

DDR3

VDDQ14

P1

VCC34

VCCIO32

VAXG39

VDDQ15

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

AC27

A13

AJ23

AC31

VCC35

VCCIO33

C11

C593

C250

C262

C599

AK20

VAXG40

AC30

VCC36

VCCIO34

B14

AK18

VAXG41

AC29

VCC37

VCCIO35

B12

*22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

*22U/6.3V_8

AK17

VAXG42

AC28

A14

AJ24

VCC38

VCCIO36

VAXG43

SNB: 6A

AC26

VCC39

VCCIO37

A12

AJ21

VAXG44

VCC40

VCCIO38

VAXG45

IVY: 6A

AA35

A11

AJ20

AA34

VCC41

VCCIO39

AJ18

VAXG46

C576

C592

AA33

VCC42

J23

+1.05V_PCH_40

R526

*0_short_4

+1.05V_PCH

AJ17

VAXG47

RAIL

M27

+0.85V

C

10U/6.3V_8

10U/6.3V_8

AA32

VCC43

VCCIO40

AH24

VAXG48

VCCSA1

M26

C583

C591

VCC44

VAXG49

VCCSA2

AA31

VCC45

AH23

VAXG50

VCCSA3

L26

10U/6.3V_8

10U/6.3V_8

AA30

AH21

J26

C231

C572

C566

AA29

VCC46

AH20

VAXG51

VCCSA4

J25

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

VCC47

VAXG52

VCCSA5

AA28

VCC48

AH18

VAXG53

VCCSA6

J24

AA27

VCC49

AH17

VAXG54

MISC SA

VCCSA7

H26

330uF x1, 10uF_8 x1 Socket BOT edge,

AA26

CORESUPPLY

H25

10uF_8 x10 Socket BOT cavity

VCC50

SVID

10uF x 1

RAIL1.8V

VCCSA8

Y35

VCC66

10uF_8 x2 Socket BOT cavity.

VCC51

Y34

VCC52

Y33

VCC53

CPU SA

Y32

VCC54

Y31

C568

C573

Y30

VCC55

H23

R610

*0_4S

VCCUSA_SENSE

39

SNB 45W: 6A

VCC56

VCCSA_SENSE

C582

10U/6.3V_8

C574

10U/6.3V_8

Y29

VCC57

330uF/7mohm x 1

Y28

VCC58

B6

VCCSA_SEL0

39

10U/6.3V_8

10U/6.3V_8

Y27

VCC59

CPU VCCPL

+1.8V

VCCPLL1

R241

1K_4

10uF x 3

Y26

VCC60

A6

VCCPLL2

VCCSA_VID[0]

C22

V35

A2

C24

R235

1K_4

V34

VCC61

AJ29 H_CPU_SVIDALRT#

SNB 45W:1.5A

+ C284

VCCPLL3

VCCSA_VID[1]

VCC62

VIDALERT#

C280

C603

C605

V33

VCC63

VIDSCLK

AJ30

H_CPU_SVIDCLK

330uF/7mohm x 1

*330U/2.5V_7343

VCCSA_SEL

39

V32

VCC64

VIDSOUT

AJ28

H_CPU_SVIDDAT

10U/6.3V_6

1U/6.3V_4

1U/6.3V_4

A19

R521

*0_4

V31

VCC65

VCCIO_SEL

H_VTTVID1 38

V30

V29

VCC67

1uF x 2

Ivy Bridge_rPGA_2DPC_Rev0p61

V28

C575

C584

VCC68

V27

VCC69

10U/6.3V_8

10U/6.3V_8

V26

VCC70

U35

VCC71

U34

VCC72

U33

U32

VCC73

VCC74

U31

VCC75

U30

U29

VCC76

VCC77

U28

VCC78

U27

VCC79

U26

R35

VCC80

VCC81

R34

VCC82

R33

VCC83

R32

R31

VCC84

B

VCC85

4.5A

R30

VCC86

R29

LINES

P32

VCC87

B10

VTT_SENSE

R455

100_4

AON7406

R28

VCC88

+VCC_CORE

+1.5V_SUS

+1.5V_CPU

+1.5V_SUS

R27

VCC89

VCC_SENSE

AJ35

VCC_SENSE

41

R26

VCC90

VSS_SENSE

AJ34

R454

100_4

VSS_SENSE

41

C293

0.1U/10V_4

P35

P34

VCC91

VCC92

Q35

C294

0.1U/10V_4

P33

VCC93

P31

VCC94

VCCIO_SENSE

A10

VSSP_SENSE

VTT_SENSE 38

1

C291

0.1U/10V_4

VCC95

SENSE

VSS_SENSE_VCCIO

VSSP_SENSE

38

P30

SVID CLK

5

4

2

P29

VCC96

3

C292

0.1U/10V_4

VCC97

P28

VCC98

Placement close to CPU.

P27

VCC99

Layout note: need routing

P26

VCC100

34 MAINON_15V

together and ALERT need

Ivy Bridge_rPGA_2DPC_Rev0p61

+1.05V_PCH

between CLK and DATA

+1.05V_PCH

C288

R277

*470P/50V/X7R_4

220_8

Close to VR

+1.5V_CPU

+1.5V

VTT_SENSE

R550

10/F_4

3

R276

*0_8S

VSSP_SENSE

R556

10/F_4

R484

54.9/F_4

H_CPU_SVIDCLK

R169

*0_4S

2,34

MAINON#

2

VR_SVID_CLK

41

Q36

0.5A

ME2N7002E

								1
			Place PU resistor close to CPU				SVID DATA
			+1.05V_PCH			+1.05V_PCH
		+VDDR_REF_CPU
12,13,37 SMDDR_VREF	R566	*0_8				Close to VR
			R158			R469
			130/F_4			130/F_4
A	3	1	H_CPU_SVIDDAT	R171	*0_4S		VR_SVID_DATA 41
		Q51
	2	ME2N7002E	Place PU resistor close to CPU				SVID ALERT
34 MAINON_15V		R563
		100K_4
				+1.05V_PCH
					R157
					75_4			PROJECT : LZ2A
			H_CPU_SVIDALRT# R170	43_4	R156	*0_4S	VR_SVID_ALERT# 41	Quanta Computer Inc.
							Size	Document Number		Rev
								IVY Bridge 3/4		1A
							Date:	Friday, December 02, 2011	Sheet 4 of	43
5		4	3				2	1

D

C

B

A

D

C

B

A

5

4

3

2

1

AT35

AT32

AT29

AT27

AT25

AT22

AT19

AT16

AT13

AT10

AT7

AT4

AT3

AR25

AR22

AR19

AR16

AR13

AR10

AR7

AR4

AR2

AP34

AP31

AP28

AP25

AP22

AP19

AP16

AP13

AP10

AP7

AP4

AP1

AN30

AN27

AN25

AN22

AN19

AN16

AN13

AN10

AN7

AN4

AM29

AM25

AM22

AM19

AM16

AM13

AM10

AM7

AM4

AM3

AM2

AM1

AL34

AL31

AL28

AL25

AL22

AL19

AL16

AL13

AL10

AL7

AL4

AL2

AK33

AK30

AK27

AK25

AK22

AK19

AK16

AK13

AK10

AK7

AK4

AJ25

Ivy Bridge Processor (GND)

	U36H
	VSS1		VSS81	AJ22
				AJ19
	VSS2		VSS82
				AJ16	T35
	VSS3		VSS83
				AJ13	T34
	VSS4		VSS84
				AJ10	T33
	VSS5		VSS85
				AJ7	T32
	VSS6		VSS86
				AJ4	T31
	VSS7		VSS87
				AJ3	T30
	VSS8		VSS88
				AJ2	T29
	VSS9		VSS89
				AJ1	T28
	VSS10		VSS90
				AH35	T27
	VSS11		VSS91
				AH34	T26
	VSS12		VSS92
				AH32	P9
	VSS13		VSS93
				AH30	P8
	VSS14		VSS94
				AH29	P6
	VSS15		VSS95
				AH28	P5
	VSS16		VSS96
				AH25	P3
	VSS17		VSS98
				AH22	P2
	VSS18		VSS99
				AH19	N35
	VSS19		VSS100
				AH16	N34
	VSS20		VSS101
				AH7	N33
	VSS21		VSS102
	VSS22		VSS103	AH4	N32
				AG9	N31
	VSS23		VSS104
				AG8	N30
	VSS24		VSS105
	VSS25		VSS106	AG4	N29
				AF6	N28
	VSS26		VSS107
				AF5	N27
	VSS27		VSS108
				AF3	N26
	VSS28		VSS109
				AF2	M34
	VSS29		VSS110
				AE35	L33
	VSS30		VSS111
				AE34	L30
	VSS31		VSS112
				AE33	L27
	VSS32		VSS113
				AE32	L9
	VSS33		VSS114
				AE31	L8
	VSS34		VSS115
				AE30	L6
	VSS35		VSS116
				AE29	L5
	VSS36	VSS	VSS117
				AE28	L4
	VSS37		VSS118
				AE27	L3
	VSS38		VSS119
				AE26	L2
	VSS39		VSS120	AE9	L1
	VSS40		VSS121
				AD7	K35
	VSS41		VSS122
				AC9	K32
	VSS42		VSS123
				AC8	K29
	VSS43		VSS124
				AC6	K26
	VSS44		VSS125
				AC5	J34
	VSS45		VSS126
				AC3	J31
	VSS46		VSS127
	VSS47		VSS128	AC2	H33
				AB35	H30
	VSS48		VSS129
				AB34	H27
	VSS49		VSS130
	VSS50		VSS131	AB33	H24
				AB32	H21
	VSS51		VSS132
				AB31	H18
	VSS52		VSS133
				AB30	H15
	VSS53		VSS134
				AB29	H13
	VSS54		VSS135
				AB28	H10
	VSS55		VSS136
				AB27	H9
	VSS56		VSS137
				AB26	H8
	VSS57		VSS138
				Y9	H7
	VSS58		VSS139
				Y8	H6
	VSS59		VSS140
				Y6	H5
	VSS60		VSS141
				Y5	H4
	VSS61		VSS142
				Y3	H3
	VSS62		VSS143
				Y2	H2
	VSS63		VSS144
				W35	H1
	VSS64		VSS145
				W34	G35
	VSS65		VSS146
				W33	G32
	VSS66		VSS147
				W32	G29
	VSS67		VSS148
				W31	G26
	VSS68		VSS149
				W30	G23
	VSS69		VSS150
				W29	G20
	VSS70		VSS151
				W28	G17
	VSS71		VSS152
	VSS72		VSS153	W27	G11
				W26	F34
	VSS73		VSS154
				U9	F31
	VSS74		VSS155
	VSS75		VSS156	U8	F29
				U6
	VSS76		VSS157
				U5
	VSS77		VSS158
				U3
	VSS78		VSS159
				U2
	VSS79		VSS160
	VSS80

U36I

VSS161		VSS234
VSS162		VSS235
VSS163		VSS236
VSS164		VSS237
VSS165		VSS238
VSS166		VSS239
VSS167		VSS240
VSS168		VSS241
VSS169		VSS242
VSS170		VSS243
VSS171		VSS244
VSS172		VSS245
VSS173		VSS246
VSS174		VSS247
VSS175		VSS248
VSS176		VSS249
VSS177		VSS250
VSS178		VSS251
VSS179		VSS252
VSS180		VSS253
VSS181		VSS254
VSS182		VSS255
VSS183		VSS256
VSS184		VSS257
VSS185		VSS258
VSS186		VSS259
VSS187		VSS260
VSS188		VSS261
VSS189		VSS262
VSS190		VSS263
VSS191		VSS264
VSS192		VSS265
VSS193		VSS266
VSS194	VSS	VSS267
VSS195		VSS268
VSS196		VSS269
VSS197		VSS270
VSS198		VSS271
VSS199		VSS272
VSS200		VSS273
VSS201		VSS274
VSS202		VSS275
VSS203		VSS276
VSS204		VSS277
VSS205		VSS278
VSS206		VSS279
VSS207		VSS280
VSS208		VSS281
VSS209		VSS282
VSS210		VSS283
VSS211		VSS284
VSS212		VSS285
VSS213
VSS214
VSS215
VSS216
VSS217

VSS218

VSS219

VSS220

VSS221

VSS222

VSS223

VSS224

VSS225

VSS226

VSS227

VSS228

VSS229

VSS230

VSS231

VSS232

VSS233

F22

F19

E30

E27

E24

E21

E18

E15

E13

E10

E9

E8

E7

E6

E5

E4

E3

E2

E1

D35

D32

D29

D26

D20

D17

C34

C31

C28

C27

C25

C23

C10

C1

B22

B19

B17

B15

B13

B11

B9

B8

B7

B5

B3

B2

A35

A32

A29

A26

A23

A20

A3

U36E	05
Ivy Bridge Processor (RESERVED, CFG)

TP24

TP21

TP23

TP25

TP26

CFG0	AK28
CFG2	AK29
	AL26
CFG4	AL27
	AK26
CFG5	AL29
CFG6	AL30
CFG7	AM31
	AM32
	AM30
	AM28
	AM26
	AN28
	AN31
	AN26
	AM27
	AK31
	AN29
	AJ31
	AH31
	AJ33
	AH33
	AJ26
	F25
	F24
	F23
	D24
	G25
	G24
	E23
	D23
	C30
	A31
	B30
	B29
	D30
	B31
	A30
	C29
	J20
	B18
	J15

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]	CFG
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

RSVD5

RSVD8	RESERVED
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD27

Ivy Bridge_rPGA_2DPC_Rev0p61

VCC_DIE_SENSE VSS_DIE_SENSE

RSVD28

RSVD29

RSVD30

RSVD31

RSVD32

RSVD33

RSVD34

RSVD35

RSVD37

RSVD38

RSVD39

RSVD40

RSVD41

RSVD42

RSVD43

RSVD44

RSVD45

RSVD46

RSVD47

RSVD48

RSVD49

RSVD50

RSVD51

RSVD52

BCLK_ITP

BCLK_ITP#

RSVD56

RSVD57

RSVD58

KEY

	AH27	VCC_DIE_SENSE	TP27
	AH26	VSS_DIE_SENSE
			TP28
			R155
	L7		*0_4
	AG7		For Sandy Bridge R10053 stuff
	AE7
	AK2		For Ivy Bridge R10053 no stuff
	W8
	AT26
	AM33
	AJ27

T8

J16

H16

G16

AR35

AT34

AT33

AP35

AR34

B34

A33

A34

B35

C35

AJ32

AK32

	AN35	TP11
	AM35
		TP16

Reserved for Intel Debug

AT2

AT1

AR1

For rPGA socket, RSVD59 pin should be left NC

B1

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

	Processor Strapping		The CFG signals have a default value of '1' if not terminated on the board.
					CFG2	R239	1K/F_4
			1	0	CFG4	R240	*1K/F_4
	CFG2	Normal Operation		Lane Reversed	CFG7	R230	*1K/F_4
	(PEG Static Lane Reversal)
	CFG4	Disable; No physical DP attached to eDP		Enable; An ext DP device is connected to eDP	CFG5	R238	*1K/F_4
	(DP Presence Strap)				CFG6	R229	*1K/F_4
	CFG7	PEG train immediately following		PEG wait for BIOS training
	(PEG Defer Training)	xxRESETB de assertion

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

				PROJECT : LZ2A
				Quanta Computer Inc.
			Size	Document Number		Rev
				IVY Bridge 4/4		1A
			Date:	Thursday, December 01, 2011	Sheet 5 of	43
5	4	3	2	1

D

C

B

A

D

C

B

A

5

4

Cougar Point/Panther Point (DMI,FDI,PM)

U13C

2	DMI_RXN0			BC24
2	DMI_RXN1			BE20
2	DMI_RXN2			BG18
2	DMI_RXN3			BG20
2	DMI_RXP0			BE24
2	DMI_RXP1			BC20
2	DMI_RXP2			BJ18
2	DMI_RXP3			BJ20
2	DMI_TXN0			AW24
2	DMI_TXN1			AW20
2	DMI_TXN2			BB18
2	DMI_TXN3			AV18
2	DMI_TXP0			AY24
2	DMI_TXP1			AY20
2	DMI_TXP2			AY18
2	DMI_TXP3			AU18
				BJ24
	+1.05V_PCH	R543	49.9/F_4 DMI_COMP	BG25
		R260	750/F_4 DMI_RBIAS	BH21

32

SUSACK#

SUSACK#

R620

0_4

	SUSWARN#_R	R436	*0_4		C12
2	XDP_DBRST#			XDP_DBRST#	K3
		C522 *1U/6.3V_4
	SYS_PWROK	R451	*0_4_short SYS_PWROK_R		P12
		R426	*0_4
32	EC_PWROK	R460	*0_4_short EC_PWROK_R		L22
	EC_PWROK_R	R428	*0_4_short APWROK_R		L10
2 PM_DRAM_PWRGD				PM_DRAM_PWRGD	B13
32	RSMRST#			RSMRST#	C21
32 SUSWARN#		R410	0_4	SUSWARN#_R	K16

FOR DEEP S3

DMI0RXN			FDI_RXN0
DMI1RXN			FDI_RXN1
DMI2RXN			FDI_RXN2
DMI3RXN			FDI_RXN3
			FDI_RXN4
DMI0RXP			FDI_RXN5
DMI1RXP			FDI_RXN6
DMI2RXP			FDI_RXN7
DMI3RXP			FDI_RXP0
DMI0TXN			FDI_RXP1
DMI1TXN			FDI_RXP2
DMI2TXN			FDI_RXP3
DMI3TXN	DMI	FDI	FDI_RXP4
			FDI_RXP5
DMI0TXP			FDI_RXP6
DMI1TXP			FDI_RXP7
DMI2TXP
DMI3TXP			FDI_INT
DMI_ZCOMP			FDI_FSYNC0
DMI_IRCOMP			FDI_FSYNC1
DMI2RBIAS			FDI_LSYNC0
			FDI_LSYNC1
	Management		DSWVRMEN
SUSACK#			DPWROK
SYS_RESET#			WAKE#
SYS_PWROK	+3V		CLKRUN# / GPIO32
PWROK	+3V_S5	SUS_STAT# / GPIO61
APWROK	Power		SUSCLK / GPIO62
	+3V_S5
DRAMPWROK	+3V_S5		SLP_S5# / GPIO63
RSMRST#	System		SLP_S4#

+3V_S5

SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3#

BJ14				FDI_TXN0	2
AY14
				FDI_TXN1	2
BE14				FDI_TXN2	2
BH13				FDI_TXN3	2
BC12				FDI_TXN4	2
BJ12				FDI_TXN5	2
BG10				FDI_TXN6	2
BG9				FDI_TXN7	2
BG14				FDI_TXP0	2
BB14				FDI_TXP1	2
BF14				FDI_TXP2	2
BG13				FDI_TXP3	2
BE12
				FDI_TXP4	2
BG12				FDI_TXP5	2
BJ10				FDI_TXP6	2
BH9				FDI_TXP7	2
AW16				FDI_INT	2
AV12				FDI_FSYNC0		2
BC10				FDI_FSYNC1		2
AV14				FDI_LSYNC0		2
BB10				FDI_LSYNC1		2
A18	DSWVREN			FOR DEEP S3
			DPWROK
	R615	*0_4
E22	R124	0_4	RSMRST#	RSMRST# 32
B9	PCIE_WAKE#			PCIE_WAKE#		24,27,32
N3	CLKRUN#			CLKRUN#	32
G8	LPC_PD#		T18
N14	PCH_SUSCLK		T21
D10	SLP_S5#		T17
H4				PM_SLP_S4# 32
F4				SIO_SLP_S3#		32

32 SIO_PWRBTN#			E20	PWRBTN#		SLP_A#	G10	SLP_A#	T16
									FOR DEEP S3
17,32 AC_PRESENT	R459	*0_4_short AC_PRESENT_R	H20	ACPRESENT / GPIO31 DSW		SLP_SUS#	G16		SLP_SUS#	10,32
		PM_BATLOW#	E10	BATLOW# / GPIO72 +3V_S5		PMSYNCH	AP14		PM_SYNC	2
		PM_RI#	A10	RI#	+3V_S5	SLP_LAN# / GPIO29	K14	WLAN_AOAC_ON	WLAN_AOAC_ON 27
				CPT_PPT_Rev_0p5

3

2

1

2,4,7,8,10,33,34,38,43	+1.05V_PCH	06
7,8,9,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43	+3V
2,7,8,9,10,27,31,34	+3V_S5
7,10,32	+3V_RTC

Cougar Point/Panther Point (LVDS,DDI)

U13D

23 INT_LVDS_BLON

J47

L_BKLTEN

SDVO_TVCLKINN

AP43

23

INT_LVDS_VDDEN

M45

L_VDD_EN

SDVO_TVCLKINP

AP45

23 PCH_BRIGHT_PWM

P45

L_BKLTCTL

SDVO_STALLN

AM42

AM40

SDVO_STALLP

23

INT_EDIDCLK

T40

L_DDC_CLK

K47

AP39

23

INT_EDIDDAT

L_DDC_DATA

SDVO_INTN

AP40

R496

2.2K_4

SDVO_INTP

+3V

T45

R489

2.2K_4

P39

L_CTRL_CLK

L_CTRL_DATA

R511

2.37K/F_4

LVD_IBG

AF37

LVD_IBG

SDVO_CTRLCLK

P38

INT_HDMI_SCL

21

T22

AF36

LVD_VBG

SDVO_CTRLDATA

M39

INT_HDMI_SDA

21

AE48

LVD_VREFH

.INT

AE47

AT49

LVD_VREFL

DDPB_AUXN

AT47

DDPB_AUXP

AT40

INT_HDMI_HPD_Q

INT_TXLCLKOUTN

DDPB_HPD

23

INT_TXLCLKOUTN

AK39

INT_TXLCLKOUTP

AK40

LVDSA_CLK#

LVDS

AV42

HDMI

23

INT_TXLCLKOUTP

LVDSA_CLK

DDPB_0N

INT_HDMI_TXDN2

21

INT_TXLOUTN0

DDPB_0P

AV40

INT_HDMI_TXDP2

21

23 INT_TXLOUTN0

AN48

LVDSA_DATA#0

DDPB_1N

AV45

INT_HDMI_TXDN1

21

23 INT_TXLOUTN1

INT_TXLOUTN1

AM47

LVDSA_DATA#1

Interface

DDPB_1P

AV46

INT_HDMI_TXDP1 21

INT_TXLOUTN2

AK47

AU48

23 INT_TXLOUTN2

DDPC_CTRLDATA

INT_HDMI_TXDN0

21

AJ48

LVDSA_DATA#3

DDPB_2P

AU47

INT_HDMI_TXDP0

21

INT_TXLOUTP0

DDPB_3N

AV47

INT_HDMI_TXCN

21

23 INT_TXLOUTP0

INT_TXLOUTP1

AM49

LVDSA_DATA0

DDPB_3P

INT_HDMI_TXCP

21

23 INT_TXLOUTP1

INT_TXLOUTP2

AK49

LVDSA_DATA1

23 INT_TXLOUTP2

LVDSA_DATA2

AJ47

P46

LVDSA_DATA3

DDPC_CTRLCLK

P42

AF40

LVDSB_CLK#

Display

+3V

AF39

DDPC_1N

AY43

DP.INT

LVDSB_CLK

DDPC_AUXN

AP49

DDPC_AUXP

DDPC_HPD_PU

R548

10K_4

AH45

AT38

LVDSB_DATA#0

DDPC_HPD

AH47

LVDSB_DATA#1

Follow PDG eDP disable guide

AF49

AY47

LVDSB_DATA#2

DDPC_0N

AF45

LVDSB_DATA#3

DDPC_0P

AY49

AH43

LVDSB_DATA0

Digital

DDPC_1P

AY45

AH49

BA47

LVDSB_DATA1

DDPC_2N

AF47

BA48

LVDSB_DATA2

DDPC_2P

AF43

BB47

LVDSB_DATA3

DDPC_3N

DDPC_3P

BB49

22

INT_CRT_BLU

INT_CRT_BLU

N48

CRT_BLUE

DDPD_CTRLCLK

M43

INT_CRT_GRE

P49

M36

22

INT_CRT_GRE

CRT_GREEN

DDPD_CTRLDATA

INT_CRT_RED

T49

22

INT_CRT_RED

CRT_RED

+3V

CRT

DDPD_AUXN

AT45

22

INT_DDCCLK

T39

CRT_DDC_CLK

DDPD_AUXP

AT43

DDPD_HPD_PU

R547

10K_4

22

INT_DDCDAT

M40

CRT_DDC_DATA

DDPD_HPD

BH41

R176

33_4

INT_CRT_HSYNC_R

DDPD_0N

BB43

Follow PDG eDP disable guide

22 INT_CRT_HSYNC

M47

CRT_HSYNC

DDPD_0P

BB45

R182

33_4

INT_CRT_VSYNC_R

M49

BF44

22 INT_CRT_VSYNC

CRT_VSYNC

DDPD_1N

BE44

DDPD_1P

BF42

DAC_IREF

DDPD_2N

T43

DAC_IREF

DDPD_2P

BE42

T42

BJ42

CRT_IRTN

DDPD_3N

BG42

R506

DDPD_3P

1K/F_4

CPT_PPT_Rev_0p5

R place close to PCH

R183

150/F_4

INT_CRT_BLU

INT_HDMI_HPD_Q

R535

*0_4S

INT_HDMI_HPD 21

R193

150/F_4

INT_CRT_GRE

R192

150/F_4

INT_CRT_RED

R523

R540

*100K_4

100K_4

DPWROK FOR

System PWR_OK(CLG)

PCH Pull-high/low(CLG)

+3V_RTC

+3V

+3V_S5

DSW (DEEP S3)

+3V_S5

+3VPCU

CLKRUN#

R198

8.2K_4

PM_RI#

R142

10K_4

+3VPCU

R127

330K_4

XDP_DBRST#

R180

1K_4

PM_BATLOW#

R445

8.2K_4

High or Low

C171

R173

*1K_4

PCIE_WAKE#

R146

10K_4

+3V_DSW

0.1U/10V_4

DSWVREN

RSMRST#

WLAN_AOAC_ON

R616

R617

R139

10K_4

R418

10K_4

D28

*10K_4

*10K_4

U7

5

R140

SYS_PWROK

R457

100K_4

SUSWARN#

R409

10K_4

DPWROK

+3V_S5

SYS_PWROK

2

DELAY_VR_PWRGOOD 41

*330K_4

AC_PRESENT

R442

10K_4

*RB500V-40

3

2

SYS_PWROK

4

1

EC_PWROK

3

C665

PM_DRAM_PWRGD R435

*200/F_4

TC7SH08FU

D29

*0.1U/10V/X5R_4

+3VPCU

2

2

add cap to

R112

timing tune

*RB500V-40

100K_4

On Die DSW VR Enable

Q55

1

Q56

*PDTC144EU

1

*2N7002

High = Enable (Default)

PROJECT : LZ2A

	R117 *0_4		Low = Disable	Quanta Computer Inc.
			Size	Document Number		Rev
				Panther Point 1/6		1A
			Date:	Thursday, December 01, 2011	Sheet 6 of	43
5	4	3	2	1

D

C

B

A

D

C

B

A

5

RTC Circuitry(RTC)

20mils

R347

*0_6S

+3V_RTC_2

D19 +3V_RTC

+3VPCU

R407

20K_4

RTC_RST#

+3V_RTC_1

1

J2

20MIL

BAT54C

C511

1U/6.3V_4

30mils

2

*SHORT_ PAD1

R355

1K_4

R414

20K_4

SRTC_RST#

1

J1

0

C404

C512

20MIL

1U/6.3V_4

1U/6.3V_4

2

RTC

*SHORT_ PAD1

+3V

1

BT1

BAT_CONN

2

HDA Bus(CLG)

FC4

*22P/50V_4

25

ACZ_BITCLK

R464

33_4

ACZ_BITCLK_R

25

ACZ_SYNC

R398

33_4 ACZ_SYNC_CODEC

25

ACZ_RST#

R446

33_4

ACZ_RST#_R

25

ACZ_SDOUT

R412

33_4

ACZ_SDOUT_R

R399

10K_4

+5V

2

ACZ_SYNC_CODEC

1

3ACZ_SYNC_R

R400

1M/F_6

Q14

ME2N7002E

PCH Dual SPI (CLG) AKE3EFP0N04: W25Q64CVSSIG

32Mbit (8M Byte), SPI

AKE3EFN0Q00: EN25Q64-104HIP

AKE3NFP0Z00: MX25L6406EM2I-12G

Socket: DG008000031

+3V_PCH_SPI

U11

PCH_SPI_CS0#

1

CE#

VDD

8

PCH_SPI_CLK

R188

33_4

PCH_SPI1_CLK_R

6

PCH_SPI_SI

R167

33_4

PCH_SPI1_SI_R

5

SCK

PCH_SPI_SO

R200

33_4

PCH_SPI1_SO_R

2

SI

7

R152

3.3K_4

SO

HOLD#

C199

3

WP#

VSS

4

C189

*22P/50V_4

MX25L6406EM2I-12G

0.1U/10V_4

+3V_PCH_SPI

R165

3.3K_4

+3V

+3V_PCH_SPI

R175

*0_6_short

5

4

3

2

1

6,8,9,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43	+3V	07
6,10,32	+3V_RTC
10,21,22,25,26,29,30,33,34	+5V
2,6,8,9,10,27,31,34	+3V_S5
2,4,6,8,10,33,34,38,43	+1.05V_PCH
6,23,24,26,27,31,32,34,35,36,40	+3VPCU

PCH2(CLG)

+3V

IRQ_SERIRQ

R509

8.2K_4

D

C144

18P/50V_4

Cougar Point/Panther Point (HDA,JTAG,SATA)

ODD_PRSNT#

R485

*10K_4

2 1

LCD_BK_OFF#

R427

10K_4

U13A

SATA_ACT#

R210

10K_4

INTEL_BT_OFF#

R137

10K_4

Y2

R134

32.768KHZ

10M_4

RTC_X1

A20

RTCX1

FWH0 / LAD0

C38

LPC_LAD0

27,32

C145

18P/50V_4

3 4

RTC_X2

LPC

FWH1 / LAD1

A38

LPC_LAD1

27,32

C20

B37

RTCX2

FWH2 / LAD2

LPC_LAD2

27,32

RTC_RST#

D20

FWH3 / LAD3

C37

LPC_LAD3

27,32

RTCRST#

D36

FWH4 / LFRAME#

LPC_LFRAME#

27,32

SRTC_RST#

G22

SRTCRST#

E36

RTC

LDRQ0#

LPC_DRQ#0

27

+3V_RTC

R415

1M_4

SM_INTRUDER#

K22

+3V

K36 LCD_BK_OFF

INTRUDER#

LDRQ1# / GPIO23

LCD_BK_OFF#

23

PCH_INVRMEN

C17

INTVRMEN

SERIRQ

V5

IRQ_SERIRQ

27,32

ACZ_BITCLK_R

SATA0RXN

AM3

SATA_RXN1

26

N34

HDA_BCLK

6G

SATA0RXP

AM1

SATA_RXP1

26

SATA HDD

AP7

ACZ_SYNC_R

L34

SATA0TXN

SATA_TXN1_C

26

HDA_SYNC

SATA0TXP

AP5

SATA_TXP1_C

26

ACZ_RST#_R

K34

SATA

AP11

25

SPKR

SPKR

T10

SPKR

SATA1RXN

AM10

AM8

SATA1RXP

HDA_RST#

SATA1TXN

AP10

SATA1TXP

25

ACZ_SDIN0

E34

HDA_SDIN0

SATA2RXN

AD7

SATA_RXN3

26

SATA2RXP

AD5

SATA_RXP3

26

SATA ODD

TP39

G34

HDA_SDIN1

SATA2TXN

AH5

SATA_TXN3_C

26

C34

SATA2TXP

AH4

SATA_TXP3_C

26

HDA_SDIN2

IHDA

AF1

SATA3RXN

AB8

A34

AB10

HDA_SDIN3

SATA3RXP

AF3

SATA3TXN

ACZ_SDOUT_R

A36

HDA_SDO

SATA3TXP

C

SATA

AD1

SATA4RXN

Y7

Y5

INTEL_BT_OFF#

+3V

SATA4RXP

27 INTEL_BT_OFF#

C36

AD3

HDA_DOCK_EN# / GPIO33

SATA4TXN

+3V_S5

R416

*10K_4

BOARD_ID3

N32

HDA_DOCK_RST# / GPIO13 +3V_S5

SATA4TXP

SATA5RXN

Y3

9

BOARD_ID3

SATA5RXP

Y1

AB3

PCH_JTAG_TCK_R

SATA5TXN

TP13

J3

AB1

JTAG_TCK

SATA5TXP

TP45

PCH_JTAG_TMS_R

H7

JTAG_TMS

JTAG

SATAICOMPO

Y11

PCH_JTAG_TDO_R

H1

Y10

SATA_COMP

R518

37.4/F_4

TP48

PCH_JTAG_TDI_R

K5

JTAG_TDI

SATAICOMPI

+1.05V_PCH

TP14

JTAG_TDO

SATA3RCOMPO

AB12

SATA3COMPI

AB13

SATA3_COMP

R519

49.9/F_4

32 PCH_SPI_CLK

PCH_SPI_CLK

T3

SPI_CLK

SATA3RBIAS

AH1

SATA3_RBIAS

R234

750/F_4

32 PCH_SPI_CS0#

PCH_SPI_CS0#

Y14

SPI_CS0#

+3VPCU

R204

*10K_4

PCH_SPI_CS1#

T1

SPI_CS1#

SPI

P3

SATA_ACT#

SATALED#

32 PCH_SPI_SI

PCH_SPI_SI

V4

SPI_MOSI

+3V SATA0GP / GPIO21

V14

ODD_PRSNT# 26

32

PCH_SPI_SO

PCH_SPI_SO

U3

SPI_MISO

+3V SATA1GP / GPIO19

P1

BBS_BIT0

CPT_PPT_Rev_0p5

PCH Strap Table

B

Pin Name

Strap description

Sampled

Configuration

SPKR

No reboot mode setting

PWROK

0 = Default (weak pull-down 20K)

+3V

R514

*1K_4

SPKR

1 = Setting to No-Reboot mode

GNT3# / GPIO55

Top-Block Swap Override

PWROK

0 = "top-block swap" mode

R472

*1K_4

1 = Default (weak pull-up 20K)

PCI_GNT3#

8

INTVRMEN

Integrated 1.05V VRM enable

ALWAYS

Should be always pull-up

+3V_RTC

R114

330K_4

PCH_INVRMEN

GNT1# / GPIO51

Boot BIOS Selection 1 [bit-1]

PWROK

Default weak pull-up on GNT0/1#

GNT1#

GNT0#

Boot Location

[Need external pull-down for LPC BIOS]

1

1

SPI

*

R471

*1K_4

BBS_BIT1

8

GPIO19

Boot BIOS Selection 0 [bit-0]

PWROK

0

0

LPC

R203

*1K_4

BBS_BIT0

HDA_SDO	Flash Descriptor Security	RSMRST	0	= Override	+3V_S5	R411		*1K_4	ACZ_SDOUT_R
			1	= Default (weak pull-up 20K)
			0	= Set to Vss			R254	2.2K_4	+1.8V
DF_TVS	DMI/FDI Termination voltage	PWROK					R255	1K_4
			1	= Set to Vcc (weak pull-down 20K)					DF_TVS	9
									H_SNB_IVB#		2
GPIO28	On-die PLL Voltage Regulator	RSMRST#	0	= Disable		R490	*1K_4		PLL_ODVR_EN 9
			1	= Enable (Default)
											A

HDA_SYNC

On-Die PLL VR Voltage Select

RSMRST

0

= Support by 1.8V (weak pull-down)

+3V_S5

R413

1K_4

ACZ_SYNC_R

1

= Support by 1.5V

GPIO8

Integrated Clock Chip Enable

RSMRST#

Should be pull-down

(weak pull-up 20K)

SPI_MOSI

iTPM function Disable

APWROK

0

= Default (weak pull-down 20K)

+3V

R181

*1K_4 PCH_SPI_SI

PROJECT : LZ2A

1

= Enable

Quanta Computer Inc.

NV_ALE

Intel Anti-Theft HDD protection

PWROK

0 = Disable (Internal pull-down 20kohm)

Size

Document Number

Rev

Panther Point 2/6

1A

Date:

Thursday, December 01, 2011

Sheet

7 of

43

4

3

2

1

5

4

3

2

1

D

C

B

A

Cougar Point-M/Panther Point (PCI,USB,NVRAM)

								U13E
							BG26	TP1
							BJ26	TP2
							BH25	TP3
							BJ16
							BG16	TP4
								TP5
							AH38	TP6
							AH37
							AK43	TP7
							AK45	TP8
								TP9
							C18	TP10
							N30
							H3	TP11
								TP12
							AH12	TP13
							AM4	TP14
							AM5
							Y13	TP15
								TP16
							K24	TP17
							L24	TP18
							AB46
							AB45	TP19
								TP20		RSVD
							B21	TP21
							M20	TP22
							AY16
							BG46	TP23
								TP24
		28	USB30_RX1-			USB30_RX1-	BE28	TP25	USB30_RX1N
						USB30_RX2-	BC30
		28	USB30_RX2-					TP26	USB30_RX2N
							BE32	TP27	USB30_RX3N
							BJ32
						USB30_RX1+	BC28	TP28	USB30_RX4N
		28	USB30_RX1+					TP29	USB30_RX1P
						USB30_RX2+	BE30
		28	USB30_RX2+					TP30	USB30_RX2P
							BF32	TP31	USB30_RX3P
	USB3.0						BG32
						USB30_TX1-	AV26	TP32	USB30_RX4P
		28	USB30_TX1-			USB30_TX2-	BB26	TP33	USB30_TX1N
		28	USB30_TX2-					TP34	USB30_TX2N
							AU28	TP35	USB30_TX3N
							AY30
		28	USB30_TX1+			USB30_TX1+	AU26	TP36	USB30_TX4N
						USB30_TX2+	AY26	TP37	USB30_TX1P
		28	USB30_TX2+					TP38	USB30_TX2P
							AV28
							AW30	TP39	USB30_TX3P
								TP40	USB30_TX4P
					PCI_PIRQA#		K40	PIRQA#
					PCI_PIRQB#		K38
					PCI_PIRQC#		H38	PIRQB#		PCI
					PCI_PIRQD#		G38	PIRQC#
								PIRQD#
14 DGPU_HOLD_RST#		DGPU_HOLD_RST#			RF_PWR_OFF#		C46	REQ1# / GPIO50		+3V
			TP64				C44	REQ2# / GPIO52		+3V
					DGPU_PWR_EN		E40			+3V
7	BBS_BIT1							REQ3# / GPIO54
						BBS_BIT1	D47			+3V
	TP10	BT_DIS						GNT1# / GPIO51
							E42	GNT2# / GPIO53		+3V
7	PCI_GNT3#	PCI_GNT3#					F46	GNT3# / GPIO55		+3V
					MPC_PWR_CTRL#		G42	PIRQE# / GPIO2		+3V
26,32	ODD_MDDA#		R475	*0_4	ODD_MDDA_R#		G40	PIRQF# / GPIO3		+3V
					EXTTS_SNI_DRV0_PCH C42					+3V
					EXTTS_SNI_DRV1_PCH		D44	PIRQG# / GPIO4		+3V
								PIRQH# / GPIO5
			TP42				K10	PME#
					PCI_PLTRST#		C6	PLTRST#
					RV9	*EGA-0402
32 CLK_PCI_8512			R153	22_4	CLK_PCI_EC_R		H49	CLKOUT_PCI0
			R161	22_4	CLK_PCI_LPC_R		H43
27 CLK_LPC_DEBUG								CLKOUT_PCI1
		CLK_PCI_FB R478		22_4	CLK_PCI_FB_R		J48	CLKOUT_PCI2
							K42
							H40	CLKOUT_PCI3
								CLKOUT_PCI4
								CPT_PPT_Rev_0p5

USB

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

RSVD1	AY7
	AV7
RSVD2	AU3
RSVD3
RSVD4	BG4
RSVD5	AT10
	BC8
RSVD6
RSVD7	AU2
	AT4
RSVD8	AT3
RSVD9
RSVD10	AT1
	AY3
RSVD11	AT5
RSVD12
RSVD13	AV3
RSVD14	AV1
	BB1
RSVD15	BA3
RSVD16
RSVD17	BB5
RSVD18	BB3
	BB7
RSVD19	BE8
RSVD20
RSVD21	BD4
	BF6
RSVD22
RSVD23	AV5	NV_ALE		TP59
RSVD24	AV10
RSVD25	AT8
RSVD26	AY5
	BA2
RSVD27
RSVD28	AT12
RSVD29	BF3
USBP0N	C24	USBP0-		USBP0-	28
	A24	USBP0+
USBP0P	C25	USBP1-		USBP0+	28
USBP1N				USBP1-	28
USBP1P	B25	USBP1+		USBP1+	28
	C26	USBP2-
USBP2N	A26	USBP2+		USBP2-	30
USBP2P	K28	USBP3-		USBP2+	30
USBP3N				USBP3-	27
USBP3P	H28	USBP3+		USBP3+	27
	E28
USBP4N
USBP4P	D28
USBP5N	C28
	A28
USBP5P	C29
USBP6N
USBP6P	B29
USBP7N	N28
	M28
USBP7P	L30	USBP8-		USBP8-	31
USBP8N	K30	USBP8+
USBP8P				USBP8+	31
USBP9N	G30	USBP9-		USBP9-	28
	E30	USBP9+
USBP9P	C30	USBP10-		USBP9+	28
USBP10N	A30	USBP10+		USBP10-	31
USBP10P				USBP10+	31
USBP11N	L32	USBP5-		USBP5-	30
USBP11P	K32	USBP5+		USBP5+	30
USBP12N	G32
USBP12P	E32
	C32
USBP13N	A32
USBP13P
USBRBIAS#	C33	USB_BIAS	R136	22.6/F_4
USBRBIAS	B33
OC0# / GPIO59	A14	USB_OC0#		USB_OC0#		28
	K20	USB_OC1#
OC1# / GPIO40	B17	USB_OC2#
OC2# / GPIO41	C16	USB_OC3#
OC3# / GPIO42	L16	USB_OC4#		USB_OC4#		31
OC4# / GPIO43
OC5# / GPIO9	A16	USB_OC5#		USB_OC5#		28
	D14	USB_OC6#
OC6# / GPIO10	C14	USB_OC7#
OC7# / GPIO14

USB 3.0

USB 3.0 (BIOS debug)

CCD

WLAN

WWAN(common design reserved)

BlueTooth

USB 2.0

USB 2.0 (DB&BIOS debug)

Card Reader

USB port 6,7disable for HM65.

LAN

WLAN

EHCI1

EHCI2

Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)

U13B

2,6,7,9,10,27,31,34

+3V_S5

08

BG34

6,7,9,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43

+3V

BJ34

PERN1

+3V_S5

E12

SMBALERT#

PERP1

SMBALERT# / GPIO11

AV32

AU32

PETN1

H14

SMB_PCH_CLK

24 PCIE_RXN2_LAN

BE34

PETP1

SMBCLK

C9

SMB_PCH_DAT

PERN2

SMBDATA

24 PCIE_RXP2_LAN

BF34

PERP2

C594

0.1U/10V_4

PCIE_TXN2_LAN_C

BB32

24 PCIE_TXN2_LAN

PETN2

C595

0.1U/10V_4

PCIE_TXP2_LAN_C

AY32

24

PCIE_TXP2_LAN

PETP2

SMBUS

DRAMRST_CNTRL_PCH

DRAMRST_CNTRL_PCH 2

27

PCIE_TXN3

C261

0.1U/10V_4

PCIE_TXP3_C

AU34

PETN3

G12

SMB_ME0_DAT

BG36

+3V_S5

SML0ALERT# / GPIO60

A12

27

PCIE_RXN3

BJ36

PERN3

C8

SMB_ME0_CLK

27

PCIE_RXP3

C260

0.1U/10V_4

PCIE_TXN3_C

AV34

PERP3

SML0CLK

27

PCIE_TXP3

BF36

PETP3

SML0DATA

PERN4

BE36

PERP4

+3V_

S5

SML1ALERT#_R

AY34

C13

BB34

PETN4

SML1ALERT# / PCHHOT# / GPIO74

PETP4

+3V_S5

SMB_ME1_CLK

E*

SML1CLK / GPIO58

E14

BG37

PERN5

SMB_ME1_DAT

+3V_S5

BH37

M16

AY36

PERP5

-

SML1DATA / GPIO75

BJ38

PETN5

PCI

BB36

PETP5

PERN6

BG38

PERP6

Controller

CL_CLK1

TP51

BC38

Link

M7

AU36

PETN6

CL_CLK1

AV36

PETP6

BG40

PERN7

CL_DATA1

T11

CL_DAT1

TP53

BJ40

PERP7

AY40

BB40

PETN7

P10

CL_RST#

TP52

PETP7

CL_RST1#

BE38

PERN8

AW38

PERP8

PETN8

AY38

Y40

PETP8

+3V_S5

PEG_A_CLKRQ# / GPIO47

M10

PEG_CLKREQ#

PEG_CLKREQ# 14

CLKOUT_PCIE0N

Y39

PCIECLKRQ0#

CLKOUT_PCIE0P

CLKOUT_PEG_A_N

AB37

CLKOUT_PEG_A_N

J2

+3V S5

AB38

CLKOUT_PEG_A_P

PCIECLKRQ0# / GPIO73

CLKOUT_PEG_A_P

LAN

CLK_PCIE_LANN

AB49

CLKOUT_PCIE1N

CLOCKS

CLKOUT_DMI_N

AV22

CLK_CPU_BCLKN

2

CLK_PCIE_LANP

AB47

CLKOUT_PCIE1P

CLKOUT_DMI_P

AU22

CLK_CPU_BCLKP 2

PCIECLKRQ1#

M1

+3V

PCIECLKRQ1# / GPIO18

CLKOUT_DP_N

AM12

CLK_DPLL_SSCLKN

2

AA48

CLKOUT_PCIE2N

CLKOUT_DP_P

AM13

CLK_DPLL_SSCLKP

2

AA47

CLKOUT_PCIE2P

CLKIN_DMI_N

BF18

CLK_BUF_PCIE_3GPLLN

PCIECLKRQ2#

V10

+3V

BE18

CLK_BUF_PCIE_3GPLLP

PCIECLKRQ2# / GPIO20

CLKIN_DMI_P

Y37

CLKOUT_PCIE3N

CLKIN_GND1_N

BJ30

CLK_BUF_BCLKN

Y36

BG30

CLK_BUF_BCLKP

PCIECLKRQ3#

CLKOUT_PCIE3P

+3V_S5

CLKIN_GND1_P

A8

PCIECLKRQ3# / GPIO25

CLKIN_DOT_96N

G24 CLK_BUF_DREFCLKN

E24

CLK_BUF_DREFCLKP

CLK_PCIE_WLANN

Y43

CLKOUT_PCIE4N

CLKIN_DOT_96P

WLAN

CLK_PCIE_WLANP

Y45

CLKOUT_PCIE4P

AK7 CLK_BUF_DREFSSCLKN

PCIECLKRQ4#

L12

+3V_S5

CLKIN_SATA_N

AK5

CLK_BUF_DREFSSCLKP

PCIECLKRQ4# / GPIO26

CLKIN_SATA_P

V45

CLKOUT_PCIE5N

REFCLK14IN

K45

CLK_PCH_14M

V46

CLKOUT_PCIE5P

PCIECLKRQ5#

L14

+3V_S5

H45

CLK_PCI_FB

C209

27P/50V_4

AB42

PCIECLKRQ5# / GPIO44

CLKIN_PCILOOPBACK

V47

XTAL25_IN

2

AB40

CLKOUT_PEG_B_N

XTAL25_IN

V49

XTAL25_OUT

R211

Y3

CLKOUT_PEG_B_P

XTAL25_OUT

1M_4

25MHZ

E6

PEG_B_CLKRQ# / GPIO56 +3V_S5

1

C203

27P/50V_4

Y47

XCLK_RCOMP R516

90.9/F_4

V40

CLKOUT_PCIE6N

XCLK_RCOMP

+1.05V_PCH

V42

CLKOUT_PCIE6P

GPIO45

T13

PCIECLKRQ6# / GPIO45

+3V_S5

V38

CLKOUT_PCIE7N

+3V

CLKOUTFLEX0 / GPIO64

K43

TP49

V37

PCIECLKRQ7# / GPIO46

+3VCLOCKS

CLKOUTFLEX2 / GPIO66

H47

CLK_25M

TP50

PCIECLKRQ7#

K12

CLKOUT_PCIE7P

+3V_S5

+3V

CLKOUTFLEX1 / GPIO65

F47

CLK_FLEX1

TP46

TP57

CLK_PCH_ITPN_R

AK14

CLKOUT_ITPXDP_N

FLEX

TP55

CLK_PCH_ITPP_R

AK13

K49

CLK_48M_CARD_C

CLKOUT_ITPXDP_P

+3V

CLKOUTFLEX3 / GPIO67

TP69

CPT_PPT_Rev_0p5

DGPU Power ON

WLAN

LAN

SW:Stuff

MPC Switch Control

PCH

UMA:Non-stuff

CLK_PCIE_WLANN

CLK_PCIE_LANN

Low = MPC ON

27 CLK_PCIE_WLANN

24 CLK_PCIE_LANN

15,42,43 GFXON

R449

*DIS@0_4 DGPU_PWR_EN

27 CLK_PCIE_WLANP

CLK_PCIE_WLANP

24 CLK_PCIE_LANP

CLK_PCIE_LANP

14

CLK_PCIE_VGAN

3

4

CLKOUT_PEG_A_N

MPC_PWR_CTRL#

High = MPC OFF (Default)

R110

*0_4_short PCIECLKRQ4#

R196

*0_4_short

PCIECLKRQ1#

14 CLK_PCIE_VGAP

1

2

CLKOUT_PEG_A_P

27 PCIE_CLKREQ_WLAN#

24

PCIE_CLKREQ_LAN#

R510

DIS@0X2

R627

DIS@0_4

MPC_PWR_CTRL#

R465

*1K_4

3V_GPU_EN_EC 32

EC

PCI/USBOC# Pull-up(CLG)

SMBus(CLK)

CLK_REQ/Strap Pin(CLG)

SMBus/Pull-up(CLG)

+3V_S5

+3V_S5

+3V_S5

R438

1K_4 DRAMRST_CNTRL_PCH

+3V

R132

+3V

R417

10K_4

SMBALERT#

10

1

USB_OC3#

R145

2.2K_4 SMB_PCH_CLK

PLTRST#(CLG)

USB_OC5#

9

2

USB_OC2#

R106

10K_4

PCIECLKRQ2#

R154

2.2K_4 SMB_PCH_DAT

USB_OC0#

8

3

USB_OC4#

R197

10K_4

PCIE_CLKREQ_LAN#

R150

2.2K_4 SMB_ME0_CLK

+3V_S5

USB_OC7#

7

4

USB_OC1#

R143

R121

R159

2.2K_4

SMB_ME0_DAT

USB_OC6#

6

5

5

4.7K_4

+3V_S5

5

2.2K_4

R439

10K_4

SML1ALERT#_R

10KX8

SMB_PCH_DAT

SMB_RUN_DAT

PCIECLKRQ0#

SMB_ME1_CLK

C173

3

4

SMB_RUN_DAT

12,13

R174

10K_4

17,29,30,32

MB_CLK1

3

4

+3V

R149

10K_4

PCIECLKRQ3#

0.1U/10V_4

Q61A

R437

10K_4

PCIE_CLKREQ_WLAN#

Q62A

5

R128

ME2N7002KW

R440

10K_4

PCIECLKRQ5#

2N7002KDW

10

1

EXTTS_SNI_DRV0_PCH

R419

10K_4

PCIECLKRQ7#

PCI_PLTRST#

2

9

2

RF_PWR_OFF#

+3V

+3V_S5

4

PLTRST#

8

3

ODD_MDDA_R#

R495

10K_4

GPIO45

1

MPC_PWR_CTRL#

7

4

EXTTS_SNI_DRV1_PCH

U8

BT_DIS

6

5

R479 Ra DIS@10K_4 PEG_CLKREQ#

3

SW:Ra

TC7SH08FU

R131

10KX8

R144

100K_4

4.7K_4

R103

+3V

2

UMA:Rb

PEG_CLKREQ#

2

R473

*UMA@10K_4

2.2K_4

SMB_PCH_CLK

6

1

SMB_RUN_CLK

SMB_RUN_CLK

12,13

Rb

R113

*0_4 PLTRST#

PCI_PIRQA#

R482

8.2K_4

Q61B

17,29,30,32

MB_DATA1

6

1

SMB_ME1_DAT

PLTRST#

2,14,24,27

PCI_PIRQB#

R483

8.2K_4

PCI_PIRQC#

R433

8.2K_4

ME2N7002KW

CLK_BUF_BCLKN

R554

10K_4

Q62B

PCI_PIRQD#

R432

8.2K_4

CLK_BUF_BCLKP

R555

10K_4

2N7002KDW

CLK_BUF_PCIE_3GPLLN

R558

10K_4

DGPU_HOLD_RST#

R148

DIS@100K_4

CLK_BUF_PCIE_3GPLLP

R557

10K_4

DGPU_PWR_EN

R453

100K_4

CLK_BUF_DREFCLKN

R468

10K_4

CLK_BUF_DREFCLKP

R474

10K_4

PROJECT : LZ2A

CLK_BUF_DREFSSCLKN

R522

10K_4

CLK_BUF_DREFSSCLKP

R520

10K_4

Quanta Computer Inc.

CLK_PCH_14M

R492

10K_4

Size

Document Number

Rev

Panther Point 3/6

1A

Date:

Friday, December 02, 2011

Sheet

8

of

43

5

4

3

2

1

D

C

B

A

5

4

3

2

1

D

C

B

A

Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)

6,7,8,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43

+3V

2,6,7,8,10,27,31,34

+3V_S5

U13F

R25

10K/F_4

09

S_GPIO R507

100_4

T7

BMBUSY# / GPIO0 +3V

+3V

TACH4 / GPIO68

C40

FB_CLAMP_PCH

R118

*GS@0_4

FB_CLAMP

15

32

EC_EXT_SMI#

EC_EXT_SMI#

A42

TACH1 / GPIO1

+3V

+3V

TACH5 / GPIO69

B41 R122

1.5K/F_4

BOARD_ID1

H36

TACH2 / GPIO6

+3V

+3V

TACH6 / GPIO70

C41

GPU_EVENT_PCH# R462

*GS@0_4

GPU_EVENT#

17

32

EC_EXT_SCI#

EC_EXT_SCI#

E38

TACH3 / GPIO7

+3V

+3V

TACH7 / GPIO71

A40

PCB_LAYER_ID

R634

10K/F_4@GS@NC

+3V

TP8

ICC_EN#

C10

GPIO8 +3V_S5

NVidia N13P-GS

27

LAN_DISABLE#

LAN_DISABLE#

C4

LAN_PHY_PWR_CTRL / GPIO12 +3V_S5

GPIO Pull-up/Pull-down(CLG)

HOST_ALERT#1_R

G2

GPIO15 +3V_S5

A20GATE

P4

EC_A20GATE

32

+3V_S5

BOARD_ID2

U2

SATA4GP / GPIO16+3V

PECI

AU16

TP58

RCIN#

P5

EC_RCIN#

EC_RCIN#

32

LAN_DISABLE#

R162

10K_4

GPIO

14,43 GFXPG

R100 *0_4_short

GFXPG_R

D40

TACH0 / GPIO17 +3V

CPU/MISC

PROCPWRGD

AY11

H_PWRGOOD

2

+3V

7 PLL_ODVR_EN

BIOS_REC

P8

GPIO28

+3V_S5

PCH_THRMTRIP#

R539

390_4

T5

SCLOCK / GPIO22 +3V

THRMTRIP#

AY10

PM_THRMTRIP# 2

SYSTEM_ID1

E8

GPIO24 / MEM_LED+3V_S5

INIT3_3V#

T14

EC_EXT_SMI#

R130

10K_4

EC_EXT_SCI#

R431

10K_4

GPIO27

E16

GPIO27

DSW

DF_TVS

AY1

DF_TVS

7

EC_A20GATE

R498

10K_4

EC_RCIN#

R500

10K_4

R494

*0_4_short PLL_ODVR_EN_R

TEMP_ALERT#

R223

10K_4

TS_VSS1

AH8

BT_ON#

R481

10K_4

SYSTEM_ID0

K1

STP_PCI# / GPIO34 +3V

GPIO27

R441

10K_4

TS_VSS2

AK11

30

BT_ON#

BT_ON#

K4

GPIO35 +3V

TS_VSS3

AH10

30

CCD_ON#

CCD_ON#

V8

SATA2GP / GPIO36+3V

TS_VSS4

AK10

FDI_OVRVLTG

M5

SATA3GP / GPIO37+3V

MFG_MODE

N2

SLOAD / GPIO38+3V

NC_1

P37

DGPU_PRSNT#

M3

SDATAOUT0 / GPIO39 +3V

Board ID

ID1

ID2

ID3

Board ID

TEST_SET_UP

V13

SDATAOUT1 / GPIO48 +3V

BG2

For Function

GPIO6

GPIO16

GPIO13

VSS_NCTF_15

SDV

0

0

0

29,32

TEMP_ALERT#

V3

SATA5GP / GPIO49 +3V

BG48

VSS_NCTF_16

SIV

0

0

1

Board ID

SV_DET

D6

GPIO57 +3V_S5

BH3

VSS_NCTF_17

use below GPIO:

SIT

0

1

0

VSS_NCTF_18

BH47

0

1

LZ1,LZ2,LZ3

BOARD_ID1

A4

BJ4

SVT

1

BOARD_ID2

VSS_NCTF_1

VSS_NCTF_19

SOVP

1

0

0

BOARD_ID3

A44

VSS_NCTF_2

VSS_NCTF_20

BJ44

A45

VSS_NCTF_3

VSS_NCTF_21

BJ45

PCB_LAYER_ID:

+3V

0-->6 layer

A46

VSS_NCTF_5

NCTF

VSS_NCTF_23

BJ46

R187

*10K_4

SYSTEM_ID0

R179

10K_4

VSS_NCTF_4

VSS_NCTF_22

1-->8 layer

R209

*10K_4

BOARD_ID2

R213

10K_4

R429

10K_4

BOARD_ID1

R430

*10K_4

A5

BJ5

R129

*10K_4

PCB_LAYER_ID

R138

10K_4

A6

VSS_NCTF_6

VSS_NCTF_24

BJ6

System ID[0.1]:

+3V_S5

-->LZ1 [0.0]

B3

C2

R476

10K_4

SYSTEM_ID1

R467

*10K_4

VSS_NCTF_7

VSS_NCTF_25

-->LZ2 [0.1]

R503

10K_4

BOARD_ID3

R443

*10K_4

-->LZ3 [1.0]

B47

VSS_NCTF_8

VSS_NCTF_26

C48

BOARD_ID3 7

BD1

D1

VSS_NCTF_9

VSS_NCTF_27

Arvin Wang update table on 9/19 14:12

BD49

D49

VSS_NCTF_10

VSS_NCTF_28

BOARD ID0

SYSTEM ID0

SYSTEM ID1

SV_SET_UP

LZ2

BE1

VSS_NCTF_11

VSS_NCTF_29

E1

GPIO 71

GPIO 34

GPIO 24

BE49

VSS_NCTF_12

VSS_NCTF_30

E49

High = Strong (Default)

6 Layer

0

0

1

8 Layer

1

0

1

BF1

VSS_NCTF_13

VSS_NCTF_31

F1

BF49

VSS_NCTF_14

VSS_NCTF_32

F49

+3V

TEST_SET_UP

R194

10K_4

+3V_S5

CPT_PPT_Rev_0p5

R185

*0_4

R456

*10K_4

SV_DET

R458

100K_4

+3V_S5

SWITCHABLE

UMA

HOST_ALERT#1_R

R466

1K_4

Stuff

R532

R533

SGPIO

Intel ME Crypto Transport Layer

No Stuff

R533

R532

+3V

Security (TLS) cipher suite

+3V

S_GPIO

R508

10K_4

Low = Disable (Default)

R505

*0_4

R195

*10K_4

DGPU_PRSNT#

R186

DIS@100K_4

High = Enable

+3V

+3V

+3V

MFG-TEST

R491

100K_4

FDI_OVRVLTG

R486

*1K/F_4

CCD_ON#

R515

*200K/F_4

BIOS_REC

R499

10K_4

+3V

R501

*0_4

				MFG_MODE	R199	10K_4
					R202	*0_4
FDI TERMINATION	LOW - Tx, Rx terminated	DMI TERMINATION	Low = Tx, Rx terminated to	High = Disable (Default)			PROJECT : LZ2A
			same voltage (DC Coupling Mode)
VOLTAGE OVERRIDE	to same voltage	VOLTAGE OVERRIDE	(DEFAULT)	BIOS RECOVERY			Quanta Computer Inc.
				Low = Enable
						Size	Document Number				Rev
							Panther Point 4/6				1A
						Date:	Thursday, December 01, 2011	Sheet	9	of	43
	5		4	3		2		1

D

C

B

A

5

4

3

2

1

PCH5(CLG)

10

Cougar Point/Panther Point (POWER)

2,4,6,7,8,33,34,38,43

+1.05V_PCH

6,7,8,9,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43

+3V

6,7,32

+3V_RTC

+VCCA_DAC_1_2

+3V

2,6,7,8,9,27,31,34

+3V_S5

VccADAC =1mA(8mils)

23,26,28,31,33,34

+5V_S5

POWER

L24

HCB1608KF_1.5A_6

7,21,22,25,26,29,30,33,34

+5V

+1.05V_PCH

+1.05V_PCH_VCC

U13G

R309

VccCORE =1.3 A(60mils)

R497

C202

C536

C200

AA23

VCCCORE[1]

VCCADAC

U48

*0_6

0.01U/16V_4

0.1U/10V_4

10U/6.3V_6

AC23

*0_1206_S

AD21

VCCCORE[2]

CRT

C560

C559

C552

C329

AD23

VCCCORE[3]

U47

+VCCALVDS

+3V

VCCCORE[4]

VSSADAC

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

10U/6.3V_6

AF21

CORE

VccALVDS=1mA(8mils)

VCCCORE[5]

R552

*0_4_S

Cougar Point/Panther Point (POWER)

D

AF23

VCCCORE[6]

D

AG21

VCCCORE[7]

AG23

VCCCORE[8]

R237

*0_8

+1.05V_VCCUSBCORE

+1.05V_PCH

AG24

AK36

+1.05V_PCH

+1.05V_PCH

+1.05V_PCH_VCCDPLL_EXP

AG26

VCCCORE[9]

VCC

VCCALVDS

POWER

VCCCORE[10]

U13J

R133

*0_8_S

R545

*0_6_S

AG27

VCCCORE[11]

VSSALVDS

AK37

+VCC_TX_LVDS

+1.8V

AG29

VCCCORE[12]

+VCCACLK

AJ23

VCCCORE[13]

LVDS

AM37

VccTX_LVDS=60mA(10mils)

L17

0.1uH_8

R619

*0_4

AD49

VCCACLK

VCCIO[29]

N26

C535

+1.05V_PCH

+1.05V_VCCAPLL_EXP

AJ26

VCCCORE[14]

VCCTX_LVDS[1]

+3V_DSW

AJ27

VCCDSW3_3= 3mA

P26

1U/6.3V_4

VCCSUS3_3 = 119mA(15mils)

VCCCORE[15]

R488

0_4

+VCCPDSW

VCCIO[30]

L13

*1uH/25mA_6

AJ29

VCCCORE[16]

VCCTX_LVDS[2]

AM38

C577

C578

C275

+3V_S5

T16

VCCDSW3_3

+3V_S5

AJ31

VCCIO[31]

P28

VCCCORE[17]

AP36

0.01U/16V_4

0.01U/16V_4

22U/6.3V_8

VCCTX_LVDS[3]

C540

PCH_VCCDSW

R135

0_6

V12

DCPSUSBYP

VCCIO[32]

T27

C268

AP37

0.1U/10V_4

*10U/6.3V_6

AN19

VCCTX_LVDS[4]

T29

Can't be deleted

VCCIO[28]

C546

+3V_SUS_CLKF33

T38

VCC3_3[5]

VCCIO[33]

C543

+3V_VCC_GIO

+3V

+1.05V_PCH

+VCCAPLL_CPY_PCH

*0.1U/10V_4

0.1U/10V_4

+1.05V_PCH

+1.05V_VCCIO

BJ22

VCCAPLLEXP

L15

*10uH/100mA_8

VCCSUS3_3[7]

T23

+3V_VCCPSUS

BH23

R301

VccIO =2.925 A(140mils)

V33

R504

*0_6_S

VCCAPLLDMI2

T24

AN16

HVCMOS

VCC3_3[6]

+1.05V_PCH

R546

*0_6_short +VCCDPLL_CPY

AL29

VCCSUS3_3[8]

R108

*0_6

VCCIO[15]

VCCDMI = 42mA(10mils)

C269

VCCIO[14]

V23

*0_1206_S

AN17

C544

*10U/6.3V_6

USB

VCCSUS3_3[9]

C570

C567

C569

VCCIO[16]

VCC3_3[7]

V34

0.1U/10V_4

+1.1V_VCC_DMI

+1.05V_PCH

+VCCSUS1

AL24

DCPSUS[3]

VCCSUS3_3[10]

V24

C533

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

0.1U/10V_4

AN21

VCCIO[17]

R530

*0_4_S

C558

VCCSUS3_3[6]

P24

+3V_VCCPSUS

AN26

VCCIO[18]

C571

VCCME(+1.05V) = ??A(??mils)

*1U/6.3V_4

AA19

VCCASW[1]

+VCCAUPLL

R538

*0_6_S

T26

+1.05V_PCH

AN27

AT16

+VCCAFDI_VRM

+VCCAFDI_VRM

1U/6.3V_4

+1.05V_PCH

+1.05V_VCCEPW

AA21

VCCIO[34]

VCCIO[19]

VCCVRM[3]

R251

VccASW =1.01 A(60mils)

VCCASW[2]

VCC5REFSUS=1mA

C579

C314

AP21

AA24

M26

+5V_PCH_VCC5REFSUS_L

VCCIO[20]

VCCASW[3]

V5REF_SUS

1U/6.3V_4

10U/6.3V_6

AP23

VCCIO[21]

VCCDMI[1]

AT20

VCCCLKDMI = 20mA(8mils)

*0_1206_S

C548

C550

C549

AA26

VCCASW[4]

Clock and Miscellaneous

AN23

+VCCA_USBSUS

C488

AP24

DFT / SPI DMI

+1.1V_VCC_DMI_CCI

+VCC_DMI_CCI

+1.05V_PCH

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

AA27

DCPSUS[4]

0.1U/10V_4

VCCIO[22]

VCCIO

VCCASW[5]

+3V_VCCPSUS

AN24

AP26

AB36

L11

*10uH/100mA_8R525

*1/F_4

AA29

VCCSUS3_3[1]

C564

VCCIO[23]

VCCCLKDMI

VCCASW[6]

*1U/6.3V_4

+3V

+3V_VCC_EXP

AT24

VCCIO[24]

C553

C234

R524

*0_4_S

AA31

VCCASW[7]

V5REF= 1mA

C

R258

*0_8_S

1U/6.3V_4

*10U/6.3V_6

C238

C242

AC26

VCCASW[8]

V5REF

P34

+5V_PCH_VCC5REF

R402

10/F_4

+5V

C

AN33

VCCIO[25]

22U/6.3V_8

22U/6.3V_8

AC27

VCCASW[9]

C534

D9

RB500V-40

+3V

AN34

AG16

N20

C259

VCCIO[26]

VCCDFTERM[1]

+VCCP_NAND

+1.8V

VCCPNAND = 190 mA(15mils)

AC29

PCI/GPIO/LPC

VCCSUS3_3[2]

1U/10V_4

0.1U/10V_4

VCCASW[10]

N22

R261

*0_8_S

VCCSUS3_3[3]

BH29

VCC3_3[3]

VCCDFTERM[2]

AG17

AC31

VCCASW[11]

+3V_VCCPSUS

P20

+VCCAFDI_VRM

AD29

VCCSUS3_3[4]

VCCSUS3_3 = 119mA(15mils)

160mA (15mils)

VCCDFTERM[3]

AJ16

C563

VCCASW[12]

VCCSUS3_3[5]

P22

0.1U/10V_4

AD31

C532

C266 *0.1U/10V_4

+VCCAFDI_VRM AP16

VCCASW[13]

1U/6.3V_4

VCCVRM[2]

VCCDFTERM[4]

AJ17

W21

VCCASW[14]

VCC3_3[1]

AA16

+1.05V_PCH

R262

*0_8

+1.05V_VCCAPLL_FDI

BG6

VccAFDIPLL

W23

VCCASW[15]

VCC3_3[8]

W16

+3V_VCCPCORE

R542

*0_6_S

+3V

+3V_VCCME_SPI

+3V

VCCSPI = 20mA(8mils)

VCCPCORE = 28mA(10mils)

+1.05V_VCCDPLL_FDI

W24

VCCASW[16]

VCC3_3[4]

T34

+3V

R263

*0_8_S

AP17

VCCIO[27]

C547

FDI

V1

R220

*0_6_S

W26

0.1U/10V_4

VCCSPI

+3V_S5

VCCASW[17]

C545

+1.05V_PCH

AU20

VCCDMI[2]

W29

VCCASW[18]

0.1U/10V_4

C208

+1.05V_PCH

C267

1U/6.3V_4

R517

*0_6

W31

VCCASW[19]

VCC3_3[2]

AJ2

+3V

*0.1U/10V_4

CPT_PPT_Rev_0p5

R245

*0_6_S

W33

VCCASW[20]

C561

AF13

VCCIO[5]

0.1U/10V_4

C557

C531

0.1U/10V_4 +VCCRTCEXT

N16

DCPRTC

+V1.05S_SATA3

1U/6.3V_4

VCCIO[12]

AH13

R242

*0_8_S

+1.05V_PCH

R541

*0_6_S

+VCCAFDI_VRM

+VCCAFDI_VRM

Y49

VCCVRM[4]

VCCIO[13]

AH14

C556

1U/6.3V_4

C555

65mA(10mils)

+1.05V_VCCA_A_DPL

VCCIO[6]

AF14

??mA(??mils)

BD47

1U/6.3V_4

VCCADPLLA

SATA

AK1

+V1.1LAN_VCCAPLL

L12

*10uH/100mA_8

+1.05V_PCH

+1.05V_VCCA_B_DPL

VCCAPLLSATA

8mA(8mils)

BF47

VCCADPLLB

VCCVRM= 114mA(15mils)

C253

+VCCAFDI_VRM

R544

*0_6_S

+VCCDIFFCLK

AF17

VCCVRM[1]

AF11

*10U/6.3V_6

+VCCDIFFCLKN

AF33

VCCIO[7]

C562

VCCDIFFCLKN[1]

+1.05V_VCCIO1

R243

*0_6_S

AF34

AC16

+1.05V_PCH

1U/6.3V_4

VCCDIFFCLKN= 55mA(10mils)

AG34

VCCDIFFCLKN[2]

VCCIO[2]

B

+1.05V_PCH

VCCDIFFCLKN[3]

AC17

B

+VCCAFDI_VRM

VCCSSC= 95mA(10mils)

VCCIO[3]

C551

R246

*0_6

+V1.05V_SSCVCC

AG33

VCCSSC

VCCIO[4]

AD17

1U/6.3V_4

R513

0_6

VCCVRM: 1.8V (Destop)

C537

C541

0.1U/10V_4 +VCCSST

V16

+1.05V_VCCEPW VCCME = 1.01A(60mils)

+1.5V

1.5V (Mobile)

DCPSST

*1U/6.3V_4

+1.05V_PCH

R512

*0_6

T17

T21

+1.05V_PCH

+V1.05M_VCCSUS

DCPSUS[1]

VCCASW[22]

V19

1mA(8mils)

DCPSUS[2]

MISC

R259

*0_4_S

+VTT_VCCPCPU

VCCASW[23]

V21

C263

C264

C265

BJ8

V_PROC_IO

CPU

T19

VCCRTC<1mA(8mils)

+3V_RTC

4.7U/6.3V_6

0.1U/10V_4

0.1U/10V_4

VCCASW[21]

R422

*0_4

+1.5V_SUS

A22

VCCRTC

VCCSUSHDA

P32

+V3.3A_1.5A_HDA_IO

R447

0_4

+3V_S5

+3V

CPT_PPT_Rev_0p5RTC

HDA

C151

C146

C174

C523

C530

VCCSUSHDA= 10mA(8mils)

R529

*0_6

1U/6.3V_4

0.1U/10V_4

0.1U/10V_4

*1U/6.3V_4

0.1U/10V_4

R531

1/F_4

+3V_SUS_CLKF33_R

L10

10uH/100mA_8

+3V_SUS_CLKF33

FOR DEEP S3

C224

C542

10U/6.3V_6

1U/6.3V_4

FOR DEEP S3

+3V_S5

R580

0_4

+1.05V_PCH

L14

10uH/100mA_8

+1.05V_VCCA_A_DPL

Q58

*AOS3413

*AOS3413

+5V_PCH_VCC5REFSUS_L

+5V_PCH_VCC5REFSUS

Q57

+ C271

C585

3

1

R119

10/F_4

+5V_S5

+3V_VCCPSUS

3

1

A

*220U/2.5V_3528

1U/6.3V_4

D8

RB500V-40

A

+3V_S5

+5VPCU

2

L16

10uH/100mA_8

+1.05V_VCCA_B_DPL

2

+ C276

C587

PR147

*220U/2.5V_3528

1U/6.3V_4

*1M_4

Q59

*ME2N7002E

SLP_SUS

3

1

2

PROJECT : LZ2A

Quanta Computer Inc.

SLP_SUS# 6,32

Size

Document Number

Rev

Panther Point 5/6

1A

Date:

Thursday, December 01, 2011

Sheet

10

of

44

5

4

3

2

1

5

4

3

2

1

PCH6(CLG)

11

U13I

Cougar Point/Panther Point (GND)

AY4

VSS[159]

VSS[259]

H46

AY42

VSS[160]

VSS[260]

K18

AY46

K26

D

VSS[161]

VSS[261]

D

AY8

K39

VSS[162]

VSS[262]

B11

K46

VSS[163]

VSS[263]

B15

K7

VSS[164]

VSS[264]

B19

L18

VSS[165]

VSS[265]

B23

L2

VSS[166]

VSS[266]

B27

L20

VSS[167]

VSS[267]

B31

L26

VSS[168]

VSS[268]

B35

L28

VSS[169]

VSS[269]

B39

L36

VSS[170]

VSS[270]

B7

L48

U13H

VSS[171]

VSS[271]

F45

M12

VSS[172]

VSS[272]

H5

BB12

P16

VSS[0]

VSS[173]

VSS[273]

BB16

M18

VSS[174]

VSS[274]

AA17

AK38

BB20

M22

VSS[1]

VSS[80]

VSS[175]

VSS[275]

AA2

AK4

BB22

M24

VSS[2]

VSS[81]

VSS[176]

VSS[276]

AA3

AK42

BB24

M30

VSS[3]

VSS[82]

VSS[177]

VSS[277]

AA33

AK46

BB28

M32

VSS[4]

VSS[83]

VSS[178]

VSS[278]

AA34

AK8

BB30

M34

VSS[5]

VSS[84]

VSS[179]

VSS[279]

AB11

AL16

BB38

M38

VSS[6]

VSS[85]

VSS[180]

VSS[280]

AB14

AL17

BB4

M4

VSS[7]

VSS[86]

VSS[181]

VSS[281]

AB39

AL19

BB46

M42

VSS[8]

VSS[87]

VSS[182]

VSS[282]

AB4

AL2

BC14

M46

VSS[9]

VSS[88]

VSS[183]

VSS[283]

AB43

AL21

BC18

M8

VSS[10]

VSS[89]

VSS[184]

VSS[284]

AB5

AL23

BC2

N18

VSS[11]

VSS[90]

VSS[185]

VSS[285]

AB7

AL26

BC22

P30

VSS[12]

VSS[91]

VSS[186]

VSS[286]

AC19

AL27

BC26

N47

VSS[13]

VSS[92]

VSS[187]

VSS[287]

AC2

AL31

BC32

P11

VSS[14]

VSS[93]

VSS[188]

VSS[288]

AC21

AL33

BC34

P18

VSS[15]

VSS[94]

VSS[189]

VSS[289]

AC24

AL34

BC36

T33

VSS[16]

VSS[95]

VSS[190]

VSS[290]

AC33

AL48

BC40

P40

C

VSS[17]

VSS[96]

VSS[191]

VSS[291]

C

AC34

AM11

BC42

P43

VSS[18]

VSS[97]

VSS[192]

VSS[292]

AC48

AM14

BC48

P47

VSS[19]

VSS[98]

VSS[193]

VSS[293]

AD10

AM36

BD46

P7

VSS[20]

VSS[99]

VSS[194]

VSS[294]

AD11

AM39

BD5

R2

VSS[21]

VSS[100]

VSS[195]

VSS[295]

AD12

AM43

BE22

R48

VSS[22]

VSS[101]

VSS[196]

VSS[296]

AD13

AM45

BE26

T12

VSS[23]

VSS[102]

VSS[197]

VSS[297]

AD19

AM46

BE40

T31

VSS[24]

VSS[103]

VSS[198]

VSS[298]

AD24

AM7

BF10

T37

VSS[25]

VSS[104]

VSS[199]

VSS[299]

AD26

AN2

BF12

T4

VSS[26]

VSS[105]

VSS[200]

VSS[300]

AD27

AN29

BF16

W34

VSS[27]

VSS[106]

VSS[201]

VSS[301]

AD33

AN3

BF20

T46

VSS[28]

VSS[107]

VSS[202]

VSS[302]

AD34

AN31

BF22

T47

VSS[29]

VSS[108]

VSS[203]

VSS[303]

AD36

AP12

BF24

T8

VSS[30]

VSS[109]

VSS[204]

VSS[304]

AD37

AP19

BF26

V11

VSS[31]

VSS[110]

VSS[205]

VSS[305]

AD38

AP28

BF28

V17

VSS[32]

VSS[111]

VSS[206]

VSS[306]

AD39

AP30

BD3

V26

VSS[33]

VSS[112]

VSS[207]

VSS[307]

AD4

AP32

BF30

V27

VSS[34]

VSS[113]

VSS[208]

VSS[308]

AD40

AP38

BF38

V29

VSS[35]

VSS[114]

VSS[209]

VSS[309]

AD42

AP4

BF40

V31

VSS[36]

VSS[115]

VSS[210]

VSS[310]

AD43

AP42

BF8

V36

VSS[37]

VSS[116]

VSS[211]

VSS[311]

AD45

AP46

BG17

V39

VSS[38]

VSS[117]

VSS[212]

VSS[312]

AD46

AP8

BG21

V43

VSS[39]

VSS[118]

VSS[213]

VSS[313]

AD8

AR2

BG33

V7

VSS[40]

VSS[119]

VSS[214]

VSS[314]

AE2

AR48

BG44

W17

VSS[41]

VSS[120]

VSS[215]

VSS[315]

AE3

AT11

BG8

W19

VSS[42]

VSS[121]

VSS[216]

VSS[316]

AF10

AT13

BH11

W2

VSS[43]

VSS[122]

VSS[217]

VSS[317]

AF12

AT18

BH15

W27

VSS[44]

VSS[123]

VSS[218]

VSS[318]

AD14

AT22

BH17

W48

VSS[45]

VSS[124]

VSS[219]

VSS[319]

AD16

AT26

BH19

Y12

VSS[46]

VSS[125]

VSS[220]

VSS[320]

AF16

AT28

H10

Y38

B

VSS[47]

VSS[126]

VSS[221]

VSS[321]

B

AF19

AT30

BH27

Y4

VSS[48]

VSS[127]

VSS[222]

VSS[322]

AF24

AT32

BH31

Y42

VSS[49]

VSS[128]

VSS[223]

VSS[323]

AF26

AT34

BH33

Y46

VSS[50]

VSS[129]

VSS[224]

VSS[324]

AF27

AT39

BH35

Y8

VSS[51]

VSS[130]

VSS[225]

VSS[325]

AF29

AT42

BH39

BG29

VSS[52]

VSS[131]

VSS[226]

VSS[328]

AF31

AT46

BH43

N24

VSS[53]

VSS[132]

VSS[227]

VSS[329]

AF38

AT7

BH7

AJ3

VSS[54]

VSS[133]

VSS[228]

VSS[330]

AF4

AU24

D3

AD47

VSS[55]

VSS[134]

VSS[229]

VSS[331]

AF42

AU30

D12

B43

VSS[56]

VSS[135]

VSS[230]

VSS[333]

AF46

AV16

D16

BE10

VSS[57]

VSS[136]

VSS[231]

VSS[334]

AF5

AV20

D18

BG41

VSS[58]

VSS[137]

VSS[232]

VSS[335]

AF7

AV24

D22

G14

VSS[59]

VSS[138]

VSS[233]

VSS[337]

AF8

AV30

D24

H16

VSS[60]

VSS[139]

VSS[234]

VSS[338]

AG19

AV38

D26

T36

VSS[61]

VSS[140]

VSS[235]

VSS[340]

AG2

AV4

D30

BG22

VSS[62]

VSS[141]

VSS[236]

VSS[342]

AG31

AV43

D32

BG24

VSS[63]

VSS[142]

VSS[237]

VSS[343]

AG48

AV8

D34

C22

VSS[64]

VSS[143]

VSS[238]

VSS[344]

AH11

AW14

D38

AP13

VSS[65]

VSS[144]

VSS[239]

VSS[345]

AH3

AW18

D42

M14

VSS[66]

VSS[145]

VSS[240]

VSS[346]

AH36

AW2

D8

AP3

VSS[67]

VSS[146]

VSS[241]

VSS[347]

AH39

AW22

E18

AP1

VSS[68]

VSS[147]

VSS[242]

VSS[348]

AH40

AW26

E26

BE16

VSS[69]

VSS[148]

VSS[243]

VSS[349]

AH42

AW28

G18

BC16

VSS[70]

VSS[149]

VSS[244]

VSS[350]

AH46

AW32

G20

BG28

VSS[71]

VSS[150]

VSS[245]

VSS[351]

AH7

AW34

G26

BJ28

VSS[72]

VSS[151]

VSS[246]

VSS[352]

AJ19

AW36

G28

VSS[73]

VSS[152]

VSS[247]

AJ21

AW40

G36

VSS[74]

VSS[153]

VSS[248]

AJ24

AW48

G48

VSS[75]

VSS[154]

VSS[249]

AJ33

AV11

H12

VSS[76]

VSS[155]

VSS[250]

AJ34

AY12

H18

A

VSS[77]

VSS[156]

VSS[251]

A

AK12

AY22

H22

VSS[78]

VSS[157]

VSS[252]

AK3

AY28

H24

VSS[79]

VSS[158]

VSS[253]

H26

CPT_PPT_Rev_0p5

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

PROJECT : LZ2A

F3

VSS[258]

CPT_PPT_Rev_0p5

Quanta Computer Inc.

Size

Document Number

Rev

Panther Point 6/6

1A

Date:

Thursday, December 01, 2011

Sheet

11

of

43

5

4

3

2

1

5

4

3

2

1

DDR_RVS(DDR)

2,4,10,13,33,34,37,43

+1.5V_SUS

6,7,8,9,10,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43

+3V

12

JDIM2A

M_B_DQ[63:0]

3

13,34,37

+0.75V_DDR_VTT

3

M_B_A[15:0]

13 +SMDDR_VREF_DIMM

M_B_A0

98

5

M_B_DQ5

A0

DQ0

M_B_A1

97

7

M_B_DQ4

M_B_A2

96

A1

DQ1

15

M_B_DQ3

A2

DQ2

M_B_A3

95

17

M_B_DQ2

+1.5V_SUS

M_B_A4

92

A3

DQ3

4

M_B_DQ0

JDIM2B

A4

DQ4

M_B_A5

91

6

M_B_DQ1

75

44

A5

DQ5

VDD1

VSS16

M_B_A6

90

16

M_B_DQ6

76

48

M_B_A7

86

A6

DQ6

18

M_B_DQ7

81

VDD2

VSS17

49

A7

DQ7

VDD3

VSS18

M_B_A8

89

21

M_B_DQ12

82

54

M_B_A9

85

A8

DQ8

23

M_B_DQ13

87

VDD4

VSS19

55

D

A9

DQ9

VDD5

VSS20

D

M_B_A10

107

33

M_B_DQ14

88

60

A10/AP

DQ10

VDD6

VSS21

M_B_A11

84

35

M_B_DQ10

2.48A

93

61

A11

DQ11

VDD7

VSS22

M_B_A12

83

A12/BC#

DQ12

22

M_B_DQ8

94

VDD8

VSS23

65

M_B_A13

119

24

M_B_DQ9

99

66

A13

DQ13

VDD9

VSS24

M_B_A14

80

34

M_B_DQ11

100

71

A14

DQ14

VDD10

VSS25

M_B_A15

78

36

M_B_DQ15

105

72

A15

DIMM-SO

DQ15

VDD11

VSS26

39

M_B_DQ20

106

DIMM-SO

127

3

M_B_CLKP1

102

CK1

DQ24

+3V

VDDSPD

VSS35

57

M_B_DQ25

199

150

3

M_B_BS#0

109

DQ16

41

M_B_DQ21

111

VDD12

VSS27

128

3

M_B_BS#1

108

BA1

DQ18

51

M_B_DQ18

112

VDD14

VSS29

133

3

M_B_BS#2

79

BA2

DQ19

53

M_B_DQ22

117

VDD15

VSS30

134

3

M_B_CS#0

114

S0#

DQ20

40

M_B_DQ17

118

VDD16

VSS31

138

121

42

M_B_DQ16

123

139

3

M_B_CS#1

S1#

DQ21

VDD17

VSS32

101

50

M_B_DQ19

124

144

3

M_B_CLKP0

CK0

DQ22

VDD18

VSS33

103

52

M_B_DQ23

145

3

M_B_CLKN0

CK0#

DQ23

VSS34

3

M_B_CLKN1

104

CK1#

DDR3PC2100SDRAM

DQ25

59

M_B_DQ30

DDR3PC2100SDRAM (204P)

VSS36

151

73

(204P)

160

M_B_DQ46

26

VSS9

203

DM7

DQ46

3

M_B_CKE0

74

CKE0

DQ26

69

M_B_DQ26

122

NC1

VSS37

156

3

M_B_CKE1

115

CKE1

DQ27

56

M_B_DQ28

125

NC2

VSS38

161

3

M_B_CAS#

110

CAS#

DQ28

58

M_B_DQ24

R322

10K_4

NCTEST

VSS39

162

3

M_B_RAS#

113

RAS#

DQ29

68

M_B_DQ31

+3V

198

VSS40

167

R328

3 M_B_WE#

DIMM1_SA0

WE#

DQ30

2,13

13

PM_EXTTS#0

EVENT#

VSS41

10K_4

197

SA0

DQ31

70

M_B_DQ29

DDR3_DRAMRST#

30

RESET#

VSS42

168

+3V

R329

10K_4

DIMM1_SA1

201

SA1

DQ32

129

M_B_DQ37

VSS43

172

8,13

SMB_RUN_CLK

202

SCL

DQ33

131

M_B_DQ36

4 SMDDR_VREF_DQ1_M3

SMDDR_VREF_DQ1_M3

R318

*0_6

VSS44

173

8,13

SMB_RUN_DAT

200

SDA

DQ34

141

M_B_DQ34

SMDDR_VREF_DQ1_M1

R317

0_6

+SMDDR_VREF_DQ1

1

VREF_DQ

VSS45

178

DQ35

143

M_B_DQ35

+SMDDR_VREF_DIMM

126

VREF_CA

VSS46

179

3

M_B_ODT0

116

ODT0

DQ36

130

M_B_DQ33

VSS47

184

3

M_B_ODT1

120

132

M_B_DQ32

185

ODT1

DQ37

VSS48

140

M_B_DQ39

2

189

DQ38

VSS1

VSS49

11

142

M_B_DQ38

3

190

C

28

DM0

DQ39

147

M_B_DQ40

8

VSS2

VSS50

195

C

02/23 Remove 0ohm to GND

DM1

DQ40

VSS3

VSS51

46

149

M_B_DQ47

9

196

63

DM2

DQ41

157

M_B_DQ43

STD 4H

STD 8H

13

VSS4

VSS52

DM3

DQ42

VSS5

136

DM4

DQ43

159

M_B_DQ42

14

VSS6

153

146

M_B_DQ45

19

170

DM5

DQ44

148

M_B_DQ41

FOX

20

VSS7

DM6

DQ45

VSS8

187

158

M_B_DQ44

25

+0.75V_DDR_VTT

3

M_B_DQSP[7:0]

M_B_DQSP0

12

DQ47

163

M_B_DQ51

LTK

DGMK4000004

DGMK4000097

31

VSS10

VTT1

204

DQS0

DQ48

VSS11

VTT2

M_B_DQSP1

29

165

M_B_DQ53

32

M_B_DQSP2

47

DQS1

DQ49

175

M_B_DQ54

37

VSS12

205

DQS2

DQ50

VSS13

GND

M_B_DQSP3

64

177

M_B_DQ55

SUY

38

206

DQS3

DQ51

VSS14

GND

M_B_DQSP4

137

164

M_B_DQ48

43

DQS4

DQ52

VSS15

M_B_DQSP5

154

166

M_B_DQ50

DQS5

DQ53

M_B_DQSP6

171

174

M_B_DQ52

MLX

DGMK4000011

DGMK4000080

DQS6

DQ54

3

M_B_DQSN[7:0]

M_B_DQSP7

188

176

M_B_DQ49

DDR3-DIMM0_H=4.0_RVS

DQS7

DQ55

M_B_DQSN0

10

181

M_B_DQ63

DDR-78279-001-RVS-204P

DQS#0

DQ56

M_B_DQSN1

27

183

M_B_DQ57

Standard 8H type:DDR-C-2013310-204p-1

DGMK0000120

DQS#1

DQ57

M_B_DQSN2

45

DQS#2

DQ58

191

M_B_DQ61

IC SOCKET DDR3 SO-DIMM(204P,H4.0,REV)

M_B_DQSN3

62

193

M_B_DQ62

DQS#3

DQ59

M_B_DQSN4

135

180

M_B_DQ60

DQS#4

DQ60

M_B_DQSN5

152

182

M_B_DQ56

DQS#5

DQ61

M_B_DQSN6

169

192

M_B_DQ58

M_B_DQSN7

186

DQS#6

DQ62

194

M_B_DQ59

DQS#7

DQ63

DDR3-DIMM0_H=4.0_RVS

DDR-78279-001-RVS-204P

+1.5V_SUS

DGMK0000120

IC SOCKET DDR3 SO-DIMM(204P,H4.0,REV)

B

B

R311

1K/F_4

VREF DQ1 M1 Solution

4,13,37

SMDDR_VREF

SMDDR_VREF

R320

*0_6

+SMDDR_VREF_DIMM

Place these Caps near So-Dimm1.

R305

+1.5V_SUS

1K/F_4

C319

+1.5V_SUS

0.1U/10V_4

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ1

C362

C358

C333

C357

C331

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

1U/6.3V_4

1U/6.3V_4

SMDDR_VREF

R321

*0_6

C359

C342

C336

C345

C341

R312

.10U/6

C356

C340

2U/6.2

2U/6.2

1K/F_4

10U/6.3V_8

.10U/6

0.1U/10V_4

0.1U/10V_4

C361

C334

C335

C360

C332

SMDDR_VREF_DQ1_M3 1

3

SMDDR_VREF_DQ1_M1

63V

83V

63V.

63V.

2

Q40

10U/6.3V_6

10U/6.3V_6

*10U/6.3V_6

1U/6.3V_4

1U/6.3V_4

+3V

ME2320D

R306

+0.75V_DDR_VTT

1K/F_4

2,13

DRAMRST_CNTRL_DDR

C353

C354

C343

C339

C330

C350

C355

C364

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

A

2.2U/6.3V_6

0.1U/10V_4

10U/6.3V_6 *10U/6.3V_6

A

PROJECT : LZ2A

Quanta Computer Inc.

Size

Document Number

Rev

DDRIII SO-DIMM-0

1A

Date:

Thursday, December 01, 2011

Sheet

12

of

43

5

4

3

2

1

			5
	DDR_RVS(DDR)
		3 M_A_A[15:0]
D
		3	M_A_BS#0
		3	M_A_BS#1
		3	M_A_BS#2
		3	M_A_CS#0
		3	M_A_CS#1
		3	M_A_CLKP0
		3	M_A_CLKN0
		3	M_A_CLKP1
		3	M_A_CLKN1
		3	M_A_CKE0
		3	M_A_CKE1
		3	M_A_CAS#
		3	M_A_RAS#
	R308	3	M_A_WE#
		10K_4
	R307	10K_4
		8,12	SMB_RUN_CLK
		8,12	SMB_RUN_DAT
		3	M_A_ODT0
		3	M_A_ODT1
C	02/23 Remove 0ohm to GND
		3 M_A_DQSP[7:0]
		3 M_A_DQSN[7:0]
B

A

5

4

3

2

1

M_A_A0

M_A_A1

M_A_A2

M_A_A3

M_A_A4

M_A_A5

M_A_A6

M_A_A7

M_A_A8

M_A_A9

M_A_A10

M_A_A11

M_A_A12

M_A_A13

M_A_A14

M_A_A15

DIMM0_SA0

DIMM0_SA1

M_A_DQSP0

M_A_DQSP1

M_A_DQSP2

M_A_DQSP3

M_A_DQSP4

M_A_DQSP5

M_A_DQSP6

M_A_DQSP7

M_A_DQSN0

M_A_DQSN1

M_A_DQSN2

M_A_DQSN3

M_A_DQSN4

M_A_DQSN5

M_A_DQSN6

M_A_DQSN7

		JDIM1A
98		A0		DQ0	5	M_A_DQ4
97					7	M_A_DQ5
96		A1		DQ1	15	M_A_DQ6
95		A2		DQ2	17	M_A_DQ7
92		A3		DQ3	4	M_A_DQ0
91		A4		DQ4	6	M_A_DQ1
90		A5		DQ5	16	M_A_DQ3
86		A6		DQ6	18	M_A_DQ2
89		A7		DQ7	21	M_A_DQ13
85		A8		DQ8	23	M_A_DQ9
107		A9		DQ9	33	M_A_DQ15
84		A10/AP		DQ10	35	M_A_DQ14
83		A11		DQ11	22	M_A_DQ12
119		A12/BC#		DQ12	24	M_A_DQ8
80		A13		DQ13	34	M_A_DQ10
78		A14		DQ14	36	M_A_DQ11
		A15	DIMM-	DQ15	39	M_A_DQ22
121		S1#		DQ21	42	M_A_DQ23
109				DQ16	41	M_A_DQ19
108		BA0		DQ17	51	M_A_DQ16
79		BA1		DQ18	53	M_A_DQ21
114		BA2		DQ19	40	M_A_DQ18
		S0#		DQ20
101		CK0	SO	DQ22	50	M_A_DQ17
103					52	M_A_DQ20
102		CK0#		DQ23	57	M_A_DQ31
104		CK1		DQ24	59	M_A_DQ27
73		CK1#	SDRAM	DQ25	67	M_A_DQ30
202		CKE0		DQ26	131	M_A_DQ33
74		CKE1		DQ27	69	M_A_DQ29
115		CAS#		DQ28	56	M_A_DQ24
110		RAS#		DQ29	58	M_A_DQ26
113		WE#		DQ30	68	M_A_DQ25
197					70	M_A_DQ28
201		SA0		DQ31	129	M_A_DQ37
		SA1		DQ32
200		SCL	DDR3	DQ33	141	M_A_DQ38
11		SDA		DQ34	142	M_A_DQ39
				DQ35	143	M_A_DQ34
116		ODT0		DQ36	130	M_A_DQ32
120		ODT1		DQ37	132	M_A_DQ36
					140	M_A_DQ35
				DQ38
28		DM0	PC2100 (204P)	DQ39	147	M_A_DQ44
		DM7		DQ46	160	M_A_DQ43
46		DM1		DQ40	149	M_A_DQ47
63		DM2		DQ41	157	M_A_DQ46
136		DM3		DQ42	159	M_A_DQ45
153		DM4		DQ43	146	M_A_DQ41
170		DM5		DQ44	148	M_A_DQ40
187		DM6		DQ45	158	M_A_DQ42
				DQ47
12					163	M_A_DQ54
29		DQS0		DQ48	165	M_A_DQ55
47		DQS1		DQ49	175	M_A_DQ51
64		DQS2		DQ50	177	M_A_DQ50
137		DQS3		DQ51	164	M_A_DQ48
154		DQS4		DQ52	166	M_A_DQ49
171		DQS5		DQ53	174	M_A_DQ53
188		DQS6		DQ54	176	M_A_DQ52
10		DQS7		DQ55	181	M_A_DQ61
27		DQS#0		DQ56	183	M_A_DQ58
45		DQS#1		DQ57	191	M_A_DQ57
62		DQS#2		DQ58	193	M_A_DQ63
135		DQS#3		DQ59	180	M_A_DQ56
152		DQS#4		DQ60	182	M_A_DQ60
169		DQS#5		DQ61	192	M_A_DQ59
186		DQS#6		DQ62	194	M_A_DQ62
		DQS#7		DQ63

DDR3-DIMM1_H=8.0_RVS

DDR-AS0A626-UARN-7F-204P

DGMK4000178

IC SOCKET DDR3 SODIMM(204P, H8.0, RVS)

M_A_DQ[63:0] 3		13
6,7,8,9,10,12,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43	+3V
2,4,10,12,33,34,37,43	+1.5V_SUS
12,34,37	+0.75V_DDR_VTT
12	+SMDDR_VREF_DIMM

+1.5V_SUS

2.48A

+3V

+3V	R286	10K_4

		12	PM_EXTTS#0	PM_EXTTS#0
		2,12 DDR3_DRAMRST#
	SMDDR_VREF_DQ0_M1	R303	0_6	+SMDDR_VREF_DQ0
				+SMDDR_VREF_DIMM
4 SMDDR_VREF_DQ0_M3	SMDDR_VREF_DQ0_M3	R314	*0_6

STD 4H

STD 8H

FOX

LTK DGMK4000004 DGMK4000097

SUY

MLX DGMK4000011 DGMK4000080

Standard 4H type:DDR-C-2013289-204p

	JDIM1B
75	VDD1			VSS16	44
76					48
	VDD2			VSS17
81					49
	VDD3			VSS18
82					54
	VDD4			VSS19
87					55
	VDD5			VSS20
88					60
	VDD6			VSS21
93					61
	VDD7			VSS22
94					65
	VDD8			VSS23
99					66
	VDD9			VSS24
100					71
	VDD10			VSS25
105					72
	VDD11			VSS26
106		DIMM			127
	VDD12			VSS27
123					139
111	VDD13			VSS28	128
112	VDD14			VSS29	133
117	VDD15			VSS30	134
118					138
	VDD16			VSS31
		SO-
124	VDD17			VSS32	144
	VDD18			VSS33
					145
				VSS34
199					150
	VDDSPD			VSS35
77		SDRAM		VSS36	151
	RESET#			VSS42	172
122	NC1			VSS37	156
125	NC2			VSS38	161
	NCTEST			VSS39	162
				VSS40
198					167
	EVENT#			VSS41
30					168
		DDR3		VSS43	173
2				VSS44
					189
1	VREF_DQ			VSS45	178
126	VREF_CA			VSS46	179
				VSS47	184
					185
				VSS48
3	VSS1	PC2100		VSS49	190
	VSS8		(204P)	VSS50
8	VSS2				195
	VSS3			VSS51
9					196
	VSS4			VSS52
13
	VSS5
14
	VSS6
19
	VSS7
20
25	VSS9
26					203	+0.75V_DDR_VTT
	VSS10			VTT1
31					204
	VSS11			VTT2
32
	VSS12
37					205
	VSS13			GND
38					206
	VSS14			GND
43
	VSS15
	DDR3-DIMM1_H=8.0_RVS
	DDR-AS0A626-UARN-7F-204P
	DGMK4000178
	IC SOCKET DDR3 SODIMM(204P, H8.0, RVS)

VREF DQ0 M3 Solution				+1.5V_SUS
				R325
				1K/F_4
4,12,37 SMDDR_VREF		R323	*0_6	SMDDR_VREF_DQ0_M1
				R324
				1K/F_4
SMDDR_VREF_DQ0_M3	1	3
	2	Q41
		ME2320D
2,12 DRAMRST_CNTRL_DDR

Place these Caps near So-Dimm0.

+1.5V_SUS

C303

C324

C306

C301

C326

10U/6.3V_6 10U/6.3V_6 10U/6.3V_6

1U/6.3V_4

1U/6.3V_4

C300

+ C296

.10U/6

*330U/2V/ESR9_7343C297

C323

10U/6.3V_8 10U/6.3V_8

3V

C307

C325

C322

C305

C327

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

10U/6.3V_6

10U/6.3V_6

*10U/6.3V_6 1U/6.3V_4

1U/6.3V_4

6

C299

C304

C317

C318

+3V

+0.75V_DDR_VTT

0.1U/10V_4

.2

0.1U/10V_4

2.2U/6.3V_6

C298

C302

C328

C320

C308

C311

6 3V.2U/6

C316

C321

1U/6.3V_4

1U/6.3V_4

1u/6.3V_4

1U/6.3V_4

2.2U/6.3V_6 0.1U/10V_4

10U/6.3V_6 *10U/6.3V_6

PROJECT : LZ2A

Quanta Computer Inc.

		Size	Document Number			Rev
			DDRIII SO-DIMM-1			1A
		Date:	Thursday, December 01, 2011	Sheet	13 of	43
4	3	2		1

D

C

B

A

A

B

C

D

1

2

3

PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >3.45A

								U30A	N13P-GS
To be placed no further from the GPU
than bewteen the PS and GPU				PLACE UNDER BGA	PLACE NEAR BALLS
+1.05V_GFX_PCIE									PEX_WAKE*
							AG19
C94	C149	C108	C150	C105	C116	C117		PEX_IOVDD
							AG21	PEX_IOVDD	PEX_RST*
83V.DIS@22U/6	83V.DIS@22U/6	83V.DIS@10U/6	83V.DIS@10U/6	63V.7U/6.DIS@4	43V.DIS@1U/6	43V.DIS@1U/6	AG22	PEX_IOVDD	PEX_TX0*
							AG24
								PEX_IOVDD	PEX_CLKREQ*
							AH21	PEX_IOVDD
							AH25	PEX_IOVDD	PEX_REFCLK
									PEX_REFCLK*
									PEX_TX0
				PLACE UNDER BGA	PLACE NEAR BALLS				PEX_RX0
+1.05V_GFX_PCIE							AG13	PEX_IOVDDQ	PEX_RX0*
							AG15	PEX_IOVDDQ
C106	C130	C107	C138	C104	C120	C113	AG16	PEX_IOVDDQ	PEX_TX1
							AG18	PEX_IOVDDQ	PEX_TX1*
83V.DIS@22U/6	83V.DIS@22U/6	83V.DIS@10U/6	83V.DIS@10U/6	63V.7U/6.DIS@4	43V.DIS@1U/6	43V.DIS@1U/6	AG25	PEX_IOVDDQ	PEX_RX2
							AL27	PEX_IOVDDQ
							AH15	PEX_IOVDDQ	PEX_RX1
							AH18	PEX_IOVDDQ	PEX_RX1*
							AH26	PEX_IOVDDQ
							AH27	PEX_IOVDDQ	PEX_TX2
							AJ27	PEX_IOVDDQ	PEX_TX2*
							AK27	PEX_IOVDDQ
			CAP CLOSE TO BGA				AM28	PEX_IOVDDQ	PEX_RX2*
							AN28	PEX_IOVDDQ	PEX_TX3
									PEX_TX3*

							PEX_RX3
							PEX_RX3*
							PEX_TX4
							PEX_TX4*
12~16 mils width							PEX_RX4
							PEX_RX4*
+3V_GPU	PLACE NEAR BGA						PEX_TX5
		+PEX_SVDD_3V3	R86	*GS@0_4	AH12		PEX_TX5*
						PEX_PLL_HVDD
	C467	DIS@0.1U/10V_4			AG12		PEX_RX5
						PEX_SVDD_3V3	PEX_RX5*
	C77	DIS@4.7U/6.3V_6
	C118	DIS@4.7U/6.3V_6					PEX_TX6
	210mA						PEX_TX6*
						1/19 PCI_EXPRESS	PEX_RX6
			0ohm (R86)				PEX_RX6*
							PEX_TX7
							PEX_TX7*

			N13P-GS (GK107)		Stuff			PEX_RX7
			N13P-GL (GF108)
					unstuff			PEX_RX7*
			N13M-GE1 (GF119)					PEX_TX8
						L4		PEX_TX8*
		16 mils width for 110mA		42 GPU_VCCSENSE			VDD_SENSE	PEX_RX8
GPU RST#(CLG)						L5		PEX_RX8*
				42 GPU_VSSSENSE			GND_SENSE	PEX_TX9
		+3V						PEX_TX9*
			C510					PEX_RX9
								PEX_RX9*
		5	DIS@0.1U/10V_4					PEX_TX10
		2				P8		PEX_TX10*
2,8,24,27 PLTRST#			4 GPU_RST#				3V3AUX_NC	PEX_RX10
		1
8 DGPU_HOLD_RST#								PEX_RX10*
		3	U9					PEX_TX11
			DIS@TC7SH08FU					PEX_TX11*
								PEX_RX11
			R90	*DIS@200/F_4	PEX_TSTCLK	AJ26		PEX_RX11*
							PEX_TSTCLK_OUT
					PEX_TSTCLK#	AK26	PEX_TSTCLK_OUT*	PEX_TX12
								PEX_TX12*
			150mA					PEX_RX12
								PEX_RX12*
	L5	DIS@0_6	PLACE UNDER GPU		+PEX_PLLVDD	AG26		PEX_TX13
+1.05V_GFX_PCIE							PEX_PLLVDD	PEX_TX13*
			C112	DIS@0.1U/10V_4				PEX_RX13
	C127							PEX_RX13*
	DIS@1U/6.3V_4		C129	DIS@1U/6.3V_4	TESTMODE			PEX_TX14
			C136	DIS@4.7U/6.3V_6		AK11	TESTMODE	PEX_TX14*
			PLACE NEAR BGA					PEX_RX14
					R94			PEX_RX14*
					DIS@10K_4			PEX_TX15
								PEX_TX15*
					PEX_TERMP AP29		PEX_TERMP	PEX_RX15
								PEX_RX15*
					R98
					DIS@2.49K/F_4		bga908-nvidia-n13p-gs-a1

1

2

3

4

5

6

7

8

15,16,33,43

+1.05V_GFX_PCIE

14

17,18,43

+3V_GPU

15,19,20,33,43

+1.5V_GPU

6,7,8,9,10,12,13,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43

+3V

18,33,42

GFX_CORE

AJ11

AJ12

GPU_RST#

AK12

R405

DIS@10K_4

+3V_GPU

PEX_CLKREQ#

AL13

CLK_PCIE_VGAP 8

AK13

CLK_PCIE_VGAN 8

A

AK14

PEG_RXP15_C C143

DIS@0.1U/10V_4

PEG_RXP15 2

AJ14

PEG_RXN15_C

C141

DIS@0.1U/10V_4

PEG_RXN15

2

AN12

PEG_TXP15 2

AM12

PEG_TXN15 2

AH14

PEG_RXP14_C C195

DIS@0.1U/10V_4

PEG_RXP14 2

AG14

PEG_RXN14_C

C196

DIS@0.1U/10V_4

PEG_RXN14

2

AN14

PEG_TXP14 2

AM14

PEG_TXN14 2

AK15

PEG_RXP13_C C166

DIS@0.1U/10V_4

PEG_RXP13 2

AJ15

PEG_RXN13_C

C167

DIS@0.1U/10V_4

PEG_RXN13

2

AP14

PEG_TXP13 2

AP15

PEG_TXN13 2

AL16

PEG_RXP12_C C186

DIS@0.1U/10V_4

PEG_RXP12 2

AK16

PEG_RXN12_C

C187

DIS@0.1U/10V_4

PEG_RXN12

2

AN15

PEG_TXP12 2

AM15

PEG_TXN12 2

AK17

PEG_RXP11_C C152

DIS@0.1U/10V_4

PEG_RXP11 2

AJ17

PEG_RXN11_C

C153

DIS@0.1U/10V_4

PEG_RXN11

2

AN17

PEG_TXP11 2

AM17

PEG_TXN11 2

AH17

PEG_RXP10_C C164

DIS@0.1U/10V_4

PEG_RXP10 2

AG17

PEG_RXN10_C

C165

DIS@0.1U/10V_4

PEG_RXN10

2

AP17

PEG_TXP10 2

AP18

PEG_TXN10 2

AK18

PEG_RXP9_C C184

DIS@0.1U/10V_4

B

PEG_RXP9 2

AJ18

PEG_RXN9_C

C185

DIS@0.1U/10V_4

PEG_RXN9 2

AN18

PEG_TXP9 2

AM18

PEG_TXN9 2

AL19

PEG_RXP8_C C163

DIS@0.1U/10V_4

PEG_RXP8 2

AK19

PEG_RXN8_C

C162

DIS@0.1U/10V_4

PEG_RXN8 2

AN20

PEG_TXP8 2

AM20

PEG_TXN8 2

AK20

PEG_RXP7_C C183

DIS@0.1U/10V_4

PEG_RXP7 2

AJ20

PEG_RXN7_C

C182

DIS@0.1U/10V_4

PEG_RXN7 2

AP20

PEG_TXP7 2

AP21

PEG_TXN7 2

AH20

PEG_RXP6_C C161

DIS@0.1U/10V_4

PEG_RXP6 2

AG20

PEG_RXN6_C

C160

DIS@0.1U/10V_4

PEG_RXN6 2

AN21

PEG_TXP6 2

AM21

PEG_TXN6 2

AK21

PEG_RXP5_C C180

DIS@0.1U/10V_4

PEG_RXP5 2

AJ21

PEG_RXN5_C

C181

DIS@0.1U/10V_4

PEG_RXN5 2

AN23

PEG_TXP5 2

AM23

PEG_TXN5 2

AL22

PEG_RXP4_C C158

DIS@0.1U/10V_4

PEG_RXP4 2

AK22

PEG_RXN4_C

C159

DIS@0.1U/10V_4

PEG_RXN4 2

AP23

PEG_TXP4 2

AP24

PEG_TXN4 2

AK23

PEG_RXP3_C C157

DIS@0.1U/10V_4

PEG_RXP3 2

C

AJ23

PEG_RXN3_C

C156

DIS@0.1U/10V_4

PEG_RXN3 2

AN24

PEG_TXP3 2

AM24

PEG_TXN3 2

AH23

PEG_RXP2_C C179

DIS@0.1U/10V_4

PEG_RXP2 2

AG23

PEG_RXN2_C

C178

DIS@0.1U/10V_4

PEG_RXN2 2

AN26

PEG_TXP2 2

AM26

PEG_TXN2 2

AK24

PEG_RXP1_C C155

DIS@0.1U/10V_4

PEG_RXP1 2

AJ24

PEG_RXN1_C

C154

DIS@0.1U/10V_4

PEG_RXN1 2

AP26

PEG_TXP1 2

AP27

PEG_TXN1 2

AL25

PEG_RXP0_C C176

DIS@0.1U/10V_4

PEG_RXP0 2

For power-down sequency

AK25

PEG_RXN0_C

C177

DIS@0.1U/10V_4

PEG_RXN0 2

+3V_GPU

+1.5V_GPU

+3V_GPU

GFX_CORE

+3V_GPU

+1.05V_GFX_PCIE

AN27

PEG_TXP0 2

AM27

PEG_TXN0 2

D1

D2

D25

DIS@RB500V-40

DIS@RB500V-40

DIS@RB500V-40

PEG CLK detect

D

GFXPG

9,43

SW: Stuff

UMA: Non-Stuff

2

8 PEG_CLKREQ#

3

1PEX_CLKREQ#

PROJECT : LZ2A

Q15

Quanta Computer Inc.

DIS@ME2N7002E

Size

Document Number

Rev

Nvidia-N13P GB4-128(PCIe)

1A

Date:

Monday, December 05, 2011

Sheet

14

of

43

4

5

6

7

8