QUANTA N83 Schematics

5

www.laptoprepairsecrets.com

4

3

2

1

HP Saipan System Block Diagram

-G PCA Only

LGA1151 socket

DDR4-SODIMM CH. A

D D

Page14

DDR4 2133 MT/s

CPU

Skylake-S

DDR4-SODIMM CH. B

C C

3.5" SATA HDD

Page15

Page35

SATA ODD

Page35

IR/HD
WEBCAM

Falcon Cliffs CAM

10pin CONN

Touch Contl.

B B

Page31

Page31

Page31

USB 2.0 x2
( External)

Page32

USB 3.0 x2
( External)

(1 port with fast Charging)

Page32

USB3.0 TYPE-C
( External)

Page33

TPM

A A

Infineon
SLB9670

Page37

CONFIDENTIAL

5

DDR4 2133 MT/s

SATA Gen3

SATA Gen2

USB 2.0

USB 3.0

USB 2.0

USB 2.0

USB 3.0

USB 3.0 x2

SPI

25MHZ XTAL

Up to 35W

Page3~8

FDI

DMI

Skylake PCH-H

(100 Series)

4

Page10~13

PEGx8

eDP

HDMI

USB 2.0

PCIe

SATA

PCIe

PCIe

Azalia

32.768KHz

LPC

SPI

NV

N16S-GMR-AIO

27 MHz

Page16~20

eDP to LVDS

QHD Bridge

Card Reader

RTS5239-R

Gigabit LAN

RTL8161GSH

Audio Codec

Realtek

ALC3252

EC

IT8987E

SPI ROM
64Mbit

3

2GB VRAM x4

Page21

LVDS(2ch)

Page22

Page24

LVDS(2ch) CONN 30PIN

HDMI IN CONN 20PIN

M.2 Slot

WLAN+BT Combo

Page34

M.2 Slot

SSD SATA

Page29

Page28 Page28

Cabled

Cabled

Cabled

Page27

I2C

Page30

Page12

SPI

Page35

CR Slot

Page29

RJ45

Int Spkr

Page27

Combo
Jack

Page27

DMIC

Page27

Converter
Connector

Page52

FAN

Page36

2

Page23

Page25

Page26

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

System Block Diagram

System Block Diagram

System Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

01

161Thursday, December 17, 2015

161Thursday, December 17, 2015

161Thursday, December 17, 2015

A

A

A

5

WWW.AliSaler.Com

www.laptoprepairsecrets.com

4

3

2

1

Voltage Rails

Voltage

+RTC_VCC 3V

+VIN

+5V_ALW

D D

+3V_AUX ON ON ON ON ON OFF LDO

+5V_S5

+3V_S5

+1.8V_S5

+1V_S5 1.0V

+VCCST_VCCPLL

+VDDQ

SMDDR_VTERM

+5V

+3V

+12V 12V MAIN_ON1

C C

+VCCGT

+3.3V_VGA 3.3V

+1.05V_VGA

+VGA_CORE

+VCCCORE

19V

5V

3.3V+3V_ALW

3.3V

3.3V

1.8V

1.0V

1.35V

0.75V

5V

3V

0.95V PG_MAINOFF+VCCIO

1.05V+VCCSA

0.65~1.3V

1.05V

0.8~1.15V

1.35V+1.35V_VGA

0.65~1.3V

ON ON ON ON ON ON

ON ON ON ON ON

ON ON ON ON ON

ON ON ON ON ON

ON ON ON ON OFF OFF

ON ON ON ON

ON ON ON ON

ON ON ON ON OFF OFF

OFF OFF OFFON OFFON S3_ON

ON

ON

OFF

ON OFFOFFOFFOFF OFF

ON OFFOFFOFF OFFOFF

ON OFF OFF OFF OFF

ON OFF OFF OFF OFFOFF

ON OFF OFF OFF OFFOFF

ON OFF OFF OFF OFFOFF

ON OFF OFF OFF OFF OFF

ON OFF OFF OFF OFF OFF

ON OFF OFF OFF OFF OFF

ON OFF OFF OFF OFF OFF

OFF OFF OFFON OFF

OFF OFF OFFON OFF

OFF OFF OFFON OFF MAIN_ON1

PCUPower Rail S0 Ctl SignalS3 S4 S5

OFF

OFF

G3

ON

ON

ON

OFF

OFF

Adapter in

Int. LDO

Int. LDO

S5_ON5V

S5_ON

S5_ON

PG_+1.8V_S5

S3_ON

DDR_VTT_CNTL

MAIN_ON1

PG_+VCCIO

VR_ON

EN_+3.3V_VGA

PG_+3.3V_MAIN

PG_+3.3V_MAIN

EN_+1.35V_VGA

VR_ON

02

RTC Batt, PCH , EC

LED

EC

System

PCH, USB, 3D WebCAM, Touch Panel, USB Charger

PCH, XDP, SPI flash ROM,NGFF LAN

PCH, XDP, NGFF LAN

PCH

CPU, PCH, XDP

DDR4, CPU DDR4 I/O

DDR4

HDD, O DD,Audio AMP,P anel VCC,F AN

PCH, Audio, Card Reader, TPM, FHD CAM

3.5" HDD

CPU

CPU

CPU

dGPU

dCPU

dGPU

dGPU, VRAM

CPU

Schematic “Value” Definition

Intel Platform Saipan-G and Saipan-U

B B

By Value
format

XX

*XX

PROTO@XX

MP@XX

DIS@xx

UMA@xx Install UMA

A A

QHD@xx QHD panel

FHD@xx FHD panel

Description Auto BOM

Control

Install

Non-Install

Install in
Pre-production only

Install in MP only

Install Discrete
(DGPU) only

V

V

V

V

V

V

VVV

VVV

DB/SI/PV Stage

UMA

Discrete
N16S GPU

VV

VV

V

V

UMA

VV

VV

V

VV

VV

MP

Discrete
N16S GPU

V

***Board ID and VRAM ID by manual control

5

4

3

ALL STAGE

QHD
PANEL

V

FHD
PANEL

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

V

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

Project:

Project:

Power States & Value Definition

Power States & Value Definition

Power States & Value Definition

--

--

--

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

A

A

A

261Thursday, December 17, 2015

261Thursday, December 17, 2015

261Thursday, December 17, 2015

5

www.laptoprepairsecrets.com

4

3

2

1

?

M_A_DQ[63:0](14)

D D

C C

B B

A A

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5

J1A

AE38

DDR0_DQ[0]

AE37

DDR0_DQ[1]

AG38

DDR0_DQ[2]

AG37

DDR0_DQ[3]

AE39

DDR0_DQ[4]

AE40

DDR0_DQ[5]

AG39

DDR0_DQ[6]

AG40

DDR0_DQ[7]

AJ38

DDR0_DQ[8]

AJ37

DDR0_DQ[9]

AL38

DDR0_DQ[10]

AL37

DDR0_DQ[11]

AJ40

DDR0_DQ[12]

AJ39

DDR0_DQ[13]

AL39

DDR0_DQ[14]

AL40

DDR0_DQ[15]

AN38

DDR0_DQ[16]/DDR0_DQ[32]

AN40

DDR0_DQ[17]/DDR0_DQ[33]

AR38

DDR0_DQ[18]/DDR0_DQ[34]

AR37

DDR0_DQ[19]/DDR0_DQ[35]

AN39

DDR0_DQ[20]/DDR0_DQ[36]

AN37

DDR0_DQ[21]/DDR0_DQ[37]

AR39

DDR0_DQ[22]/DDR0_DQ[38]

AR40

DDR0_DQ[23]/DDR0_DQ[39]

AW37

DDR0_DQ[24]/DDR0_DQ[40]

AU38

DDR0_DQ[25]/DDR0_DQ[41]

AV35

DDR0_DQ[26]/DDR0_DQ[42]

AW35

DDR0_DQ[27]/DDR0_DQ[43]

AU37

DDR0_DQ[28]/DDR0_DQ[44]

AV37

DDR0_DQ[29]/DDR0_DQ[45]

AT35

DDR0_DQ[30]/DDR0_DQ[46]

AU35

DDR0_DQ[31]/DDR0_DQ[47]

AY8

DDR0_DQ[32]/DDR1_DQ[0]

AW8

DDR0_DQ[33]/DDR1_DQ[1]

AV6

DDR0_DQ[34]/DDR1_DQ[2]

AU6

DDR0_DQ[35]/DDR1_DQ[3]

AU8

DDR0_DQ[36]/DDR1_DQ[4]

AV8

DDR0_DQ[37]/DDR1_DQ[5]

AW6

DDR0_DQ[38]/DDR1_DQ[6]

AY6

DDR0_DQ[39]/DDR1_DQ[7]

AY4

DDR0_DQ[40]/DDR1_DQ[8]

AV4

DDR0_DQ[41]/DDR1_DQ[9]

AT1

DDR0_DQ[42]/DDR1_DQ[10]

AT2

DDR0_DQ[43]/DDR1_DQ[11]

AV3

DDR0_DQ[44]/DDR1_DQ[12]

AW4

DDR0_DQ[45]/DDR1_DQ[13]

AT4

DDR0_DQ[46]/DDR1_DQ[14]

AT3

DDR0_DQ[47]/DDR1_DQ[15]

AP2

DDR0_DQ[48]/DDR1_DQ[32]

AM4

DDR0_DQ[49]/DDR1_DQ[33]

AP3

DDR0_DQ[50]/DDR1_DQ[34]

AM3

DDR0_DQ[51]/DDR1_DQ[35]

AP4

DDR0_DQ[52]/DDR1_DQ[36]

AM2

DDR0_DQ[53]/DDR1_DQ[37]

AP1

DDR0_DQ[54]/DDR1_DQ[38]

AM1

DDR0_DQ[55]/DDR1_DQ[39]

AK3

DDR0_DQ[56]/DDR1_DQ[40]

AH1

DDR0_DQ[57]/DDR1_DQ[41]

AK4

DDR0_DQ[58]/DDR1_DQ[42]

AH2

DDR0_DQ[59]/DDR1_DQ[43]

AH4

DDR0_DQ[60]/DDR1_DQ[44]

AK2

DDR0_DQ[61]/DDR1_DQ[45]

AH3

DDR0_DQ[62]/DDR1_DQ[46]

AK1

DDR0_DQ[63]/DDR1_DQ[47]

AU33

DDR0_ECC[0]

AT33

DDR0_ECC[1]

AW33

DDR0_ECC[2]

AV31

DDR0_ECC[3]

AU31

DDR0_ECC[4]

AV33

DDR0_ECC[5]

AW31

DDR0_ECC[6]

AY31

DDR0_ECC[7]

DDR CHANNEL A

SKL_S_CPU_LGA

SKL_S_CPU

LGA1151

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]

DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]

DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]

1 OF 12

DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]
DDR0_CKN[1]
DDR0_CKP[2]
DDR0_CKN[2]
DDR0_CKP[3]
DDR0_CKN[3]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]

DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]

DDR0_MA[3]
DDR0_MA[4]

DDR0_PAR

DDR0_ALERT#

DDR0_DQSN[0]
DDR0_DQSN[1]

DDR0_DQSP[0]
DDR0_DQSP[1]

DDR0_DQSP[8]
DDR0_DQSN[8]

4

AW18
AV18
AW17
AY17
AW16
AV16
AT16
AU16

AY24
AW24
AV24
AV25

AW12
AU11
AV13
AV10

AW11
AU14
AU12
AY10

AY13

M_A_BA#0

AV15

M_A_BA#1

AW23

M_A_BG#0

AW13

M_A_A16

AV14

M_A_A14

AY11

M_A_A15

AW15

M_A_A0

AU18

M_A_A1

AU17

M_A_A2

AV19

M_A_A3

AT19

M_A_A4

AU20

M_A_A5

AV20

M_A_A6

AU21

M_A_A7

AT20

M_A_A8

AT22

M_A_A9

AY14

M_A_A10

AU22

M_A_A11

AV22

M_A_A12

AV12

M_A_A13

AV23
AU24

AY15
AT23

AF39

M_A_DQSN0

AK39

M_A_DQSN1

AP39

M_A_DQSN2

AU36

M_A_DQSN3

AW7

M_A_DQSN4

AU3

M_A_DQSN5

AN3

M_A_DQSN6

AJ3

M_A_DQSN7

AF38

M_A_DQSP0

AK38

M_A_DQSP1

AP38

M_A_DQSP2

AV36

M_A_DQSP3

AV7

M_A_DQSP4

AU2

M_A_DQSP5

AN2

M_A_DQSP6

AJ2

M_A_DQSP7

AV32

M_A_DQSP8

AU32

M_A_DQSN8

DDR4 SO-DIMM FOR DQS[7:0] ONLY

?REV = 1.2

M_A_CLKP0 (14)
M_A_CLKN0 (14)
M_A_CLKP1 (14)
M_A_CLKN1 (14)

M_A_CKE0
M_A_CKE1

M_A_CS#0 (14)
M_A_CS#1 (14)

M_A_ODT0 (14)
M_A_ODT1 (14)

M_A_BA#[1..0] (14)

M_A_BG#0 (14)
M_A_A[16:0] (14)

M_A_BG#1 (14)
M_A_ACT# (14)

M_A_PARITY (14)
M_A_ALERT# (14)

M_A_DQSN[7:0] (14)

M_A_DQSP[7:0] (14)

TP7
TP8 TP72

M_B_DQ[63:0](15)

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

(14)
(14)

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

J1B

AD34

DDR1_DQ[0]/DDR0_DQ[16]

AD35

DDR1_DQ[1]/DDR0_DQ[17]

AG35

DDR1_DQ[2]/DDR0_DQ[18]

AH35

DDR1_DQ[3]/DDR0_DQ[19]

AE35

DDR1_DQ[4]/DDR0_DQ[20]

AE34

DDR1_DQ[5]/DDR0_DQ[21]

AG34

DDR1_DQ[6]/DDR0_DQ[22]

AH34

DDR1_DQ[7]/DDR0_DQ[23]

AK35

DDR1_DQ[8]/DDR0_DQ[24]

AL35

DDR1_DQ[9]/DDR0_DQ[25]

AK32

DDR1_DQ[10]/DDR0_DQ[26]

AL32

DDR1_DQ[11]/DDR0_DQ[27]

AK34

DDR1_DQ[12]/DDR0_DQ[28]

AL34

DDR1_DQ[13]/DDR0_DQ[29]

AK31

DDR1_DQ[14]/DDR0_DQ[30]

AL31

DDR1_DQ[15]/DDR0_DQ[31]

AP35

DDR1_DQ[16]/DDR0_DQ[48]

AN35

DDR1_DQ[17]/DDR0_DQ[49]

AN32

DDR1_DQ[18]/DDR0_DQ[50]

AP32

DDR1_DQ[19]/DDR0_DQ[51]

AN34

DDR1_DQ[20]/DDR0_DQ[52]

AP34

DDR1_DQ[21]/DDR0_DQ[53]

AN31

DDR1_DQ[22]/DDR0_DQ[54]

AP31

DDR1_DQ[23]/DDR0_DQ[55]

AL29

DDR1_DQ[24]/DDR0_DQ[56]

AM29

DDR1_DQ[25]/DDR0_DQ[57]

AP29

DDR1_DQ[26]/DDR0_DQ[58]

AR29

DDR1_DQ[27]/DDR0_DQ[59]

AM28

DDR1_DQ[28]/DDR0_DQ[60]

AL28

DDR1_DQ[29]/DDR0_DQ[61]

AR28

DDR1_DQ[30]/DDR0_DQ[62]

AP28

DDR1_DQ[31]/DDR0_DQ[63]

AR12

DDR1_DQ[32]/DDR1_DQ[16]

AP12

DDR1_DQ[33]/DDR1_DQ[17]

AM13

DDR1_DQ[34]/DDR1_DQ[18]

AL13

DDR1_DQ[35]/DDR1_DQ[19]

AR13

DDR1_DQ[36]/DDR1_DQ[20]

AP13

DDR1_DQ[37]/DDR1_DQ[21]

AM12

DDR1_DQ[38]/DDR1_DQ[22]

AL12

DDR1_DQ[39]/DDR1_DQ[23]

AP10

DDR1_DQ[40]/DDR1_DQ[24]

AR10

DDR1_DQ[41]/DDR1_DQ[25]

AR7

DDR1_DQ[42]/DDR1_DQ[26]

AP7

DDR1_DQ[43]/DDR1_DQ[27]

AR9

DDR1_DQ[44]/DDR1_DQ[28]

AP9

DDR1_DQ[45]/DDR1_DQ[29]

AR6

DDR1_DQ[46]/DDR1_DQ[30]

AP6

DDR1_DQ[47]/DDR1_DQ[31]

AM10

DDR1_DQ[48]

AL10

DDR1_DQ[49]

AM7

DDR1_DQ[50]

AL7

DDR1_DQ[51]

AM9

DDR1_DQ[52]

AL9

DDR1_DQ[53]

AM6

DDR1_DQ[54]

AL6

DDR1_DQ[55]

AJ6

DDR1_DQ[56]

AJ7

DDR1_DQ[57]

AE6

DDR1_DQ[58]

AF7

DDR1_DQ[59]

AH7

DDR1_DQ[60]

AH6

DDR1_DQ[61]

AE7

DDR1_DQ[62]

AF6

DDR1_DQ[63]

AR25

DDR1_ECC[0]

AR26

DDR1_ECC[1]

AM26

DDR1_ECC[2]

AM25

DDR1_ECC[3]

AP26

DDR1_ECC[4]

AP25

DDR1_ECC[5]

AL25

DDR1_ECC[6]

AL26

DDR1_ECC[7]

SKL_S_CPU_LGA

DDR CHANNEL B

?

SKL_S_CPU

LGA1151

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]

DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]

2 OF 12

DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]
DDR1_CKP[2]
DDR1_CKN[2]
DDR1_CKP[3]
DDR1_CKN[3]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]

DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]

DDR1_MA[3]
DDR1_MA[4]

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN[6]
DDR1_DQSN[7]

DDR1_DQSP[6]
DDR1_DQSP[7]

DDR1_DQSP[8]
DDR1_DQSN[8]

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

REV = 1.2

AM20
AM21
AP22
AP21
AN20
AN21
AP19
AP20

AY29
AV29
AW29
AU29

AP17
AN15
AN17
AM15

AM16
AL16
AP15
AL15

AN18

M_B_A16

AL17

M_B_A14

AP16

M_B_A15

AL18

M_B_BA#0

AM18

M_B_BA#1

AW28

M_B_BG#0

AL19

M_B_A0

AL22

M_B_A1

AM22

M_B_A2

AM23

M_B_A3

AP23

M_B_A4

AL23

M_B_A5

AW26

M_B_A6

AY26

M_B_A7

AU26

M_B_A8

AW27

M_B_A9

AP18

M_B_A10

AU27

M_B_A11

AV27

M_B_A12

AR15

M_B_A13

AY28
AU28

AL20
AY25

AF34

M_B_DQSN0

AK33

M_B_DQSN1

AN33

M_B_DQSN2

AN29

M_B_DQSN3

AN13

M_B_DQSN4

AR8

M_B_DQSN5

AM8

M_B_DQSN6

AG6

M_B_DQSN7

AF35

M_B_DQSP0

AL33

M_B_DQSP1

AP33

M_B_DQSP2

AN28

M_B_DQSP3

AN12

M_B_DQSP4

AP8

M_B_DQSP5

AL8

M_B_DQSP6

AG7

M_B_DQSP7

AN25

M_B_DQSP8

AN26

M_B_DQSN8

DDR4 SO-DIMM FOR DQS[7:0] ONLY

AB40
AC40

DIMM_DQ_CPU_VREF_A

AC39

?

TP71

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

CPU_PEG/DISPLAY

CPU_PEG/DISPLAY

CPU_PEG/DISPLAY

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

3

2

Page Modified: Sheet of

Project:

DIMM_CA_CPU_VREF_A (14)

TP68

DIMM_DQ_CPU_VREF_B (15)

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

03

M_B_CLKP0 (15)
M_B_CLKN0 (15)
M_B_CLKP1 (15)
M_B_CLKN1 (15)

M_B_CKE0 (15)
M_B_CKE1 (15)

M_B_CS#0 (15)
M_B_CS#1 (15)

M_B_ODT0 (15)
M_B_ODT1 (15)

M_B_A[16:14](15)

M_B_BA#[1..0] (15)

M_B_BG#0 (15)
M_B_A[13:0] (15)

M_B_BG#1 (15)
M_B_ACT# (15)

M_B_PARITY (15)
M_B_ALERT# (15)

M_B_DQSN[7:0] (15)

M_B_DQSP[7:0] (15)

361Thursday, December 1 7, 2015

361Thursday, December 1 7, 2015

361Thursday, December 1 7, 2015

A

A

A

5

www.laptoprepairsecrets.com

J1C

PEG_RXP0(16)
PEG_RXN0(16)

D D

PEG_RXP1(16)
PEG_RXN1(16)

PEG_RXP2(16)
PEG_RXN2(16)

PEG_RXP3(16)
PEG_RXN3(16)

EC-DB-E02 EC-DB-E02

C C

PEG_RCOMP
Trace length < 400 mils
Trace w idth = 12 mils
Trace spacing = 15 mils

+VCCIO

R57 24.9/F_4

B B

PLACE INSIDE CPU CAVITY

DMI_PCH_CPU_RXP0(10)
DMI_PCH_CPU_RXN0(10)

DMI_PCH_CPU_RXP1(10)
DMI_PCH_CPU_RXN1(10)

DMI_PCH_CPU_RXP2(10)
DMI_PCH_CPU_RXN2(10)

DMI_PCH_CPU_RXP3(10)
DMI_PCH_CPU_RXN3(10)

PEG_RCOMP

B8

PEG_RXP[0]

B7

PEG_RXN[0]

C7

PEG_RXP[1]

C6

PEG_RXN[1]

D6

PEG_RXP[2]

D5

PEG_RXN[2]

E5

PEG_RXP[3]

E4

PEG_RXN[3]

F6

PEG_RXP[4]

F5

PEG_RXN[4]

G5

PEG_RXP[5]

G4

PEG_RXN[5]

H6

PEG_RXP[6]

H5

PEG_RXN[6]

J5

PEG_RXP[7]

J4

PEG_RXN[7]

K6

PEG_RXP[8]

K5

PEG_RXN[8]

L5

PEG_RXP[9]

L4

PEG_RXN[9]

M6

PEG_RXP[10]

M5

PEG_RXN[10]

N5

PEG_RXP[11]

N4

PEG_RXN[11]

P6

PEG_RXP[12]

P5

PEG_RXN[12]

R5

PEG_RXP[13]

R4

PEG_RXN[13]

T6

PEG_RXP[14]

T5

PEG_RXN[14]

U5

PEG_RXP[15]

U4

PEG_RXN[15]

L7

PEG_RCOMP

Y3

DMI_RXP[0]

Y4

DMI_RXN[0]

AA4

DMI_RXP[1]

AA5

DMI_RXN[1]

AB4

DMI_RXP[2]

AB3

DMI_RXN[2]

AC4

DMI_RXP[3]

AC5

DMI_RXN[3]

SKL_S_CPU_LGA

SKL_S_CPU

LGA1151

3 OF 12

4

PEG_TXP[0]
PEG_TXN[0]

PEG_TXP[1]
PEG_TXN[1]

PEG_TXP[2]
PEG_TXN[2]

PEG_TXP[3]
PEG_TXN[3]

PEG_TXP[4]
PEG_TXN[4]

PEG_TXP[5]
PEG_TXN[5]

PEG_TXP[6]
PEG_TXN[6]

PEG_TXP[7]
PEG_TXN[7]

PEG_TXP[8]
PEG_TXN[8]

PEG_TXP[9]
PEG_TXN[9]

PEG_TXP[10]
PEG_TXN[10]

PEG_TXP[11]
PEG_TXN[11]

PEG_TXP[12]
PEG_TXN[12]

PEG_TXP[13]
PEG_TXN[13]

PEG_TXP[14]
PEG_TXN[14]

PEG_TXP[15]
PEG_TXN[15]

DMI_TXP[0]
DMI_TXN[0]

DMI_TXP[1]
DMI_TXN[1]

DMI_TXP[2]
DMI_TXN[2]

DMI_TXP[3]
DMI_TXN[3]

REV = 1.2

3

?

A5
A6

B4
B5

C3
C4

D2
D3

E1
E2

F2
F3

G1
G2

H2
H3

J1
J2

K2
K3

L1
L2

M2
M3

N1
N2

P2
P3

R2
R1

T2
T3

AC2
AC1

AD3
AD2

AE2
AE1

AF2
AF3

?

PEG_TXP0 (16)
PEG_TXN0 (16)

PEG_TXP1 (16)
PEG_TXN1 (16)

PEG_TXP2 (16)
PEG_TXN2 (16)

PEG_TXP3 (16)
PEG_TXN3 (16)

DMI_CPU_PCH_TXP0 (10)
DMI_CPU_PCH_TXN0 (10)

DMI_CPU_PCH_TXP1 (10)
DMI_CPU_PCH_TXN1 (10)

DMI_CPU_PCH_TXP2 (10)
DMI_CPU_PCH_TXN2 (10)

DMI_CPU_PCH_TXP3 (10)
DMI_CPU_PCH_TXN3 (10)

HDMI

HDMI_TX2P(26)
HDMI_TX2N(26)
HDMI_TX1P(26)
HDMI_TX1N(26)
HDMI_TX0P(26)
HDMI_TX0N(26)
HDMI_CLKP(26)
HDMI_CLKN(26)

C21
D21
D22
E22
B23
A23
C23
D23

B13
C13

B18
A18
D18
E18
C19
D19
D20
E20

A12
B12

B14
A14
C15
B15
B16
A16
C17
B17

B11
C11

2

J1D

DDI1_TXP[0]
DDI1_TXN[0]
DDI1_TXP[1]
DDI1_TXN[1]
DDI1_TXP[2]
DDI1_TXN[2]
DDI1_TXP[3]
DDI1_TXN[3]

DDI1_AUXP
DDI1_AUXN

DDI2_TXP[0]
DDI2_TXN[0]
DDI2_TXP[1]
DDI2_TXN[1]
DDI2_TXP[2]
DDI2_TXN[2]
DDI2_TXP[3]
DDI2_TXN[3]

DDI2_AUXP
DDI2_AUXN

DDI3_TXP[0]
DDI3_TXN[0]
DDI3_TXP[1]
DDI3_TXN[1]
DDI3_TXP[2]
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3]

DDI3_AUXP
DDI3_AUXN

SKL_S_CPU_LGA

AUD_CPU_SDI_R

EMI reserved

AUD_CPU_BCLK

?

SKL_S_CPU

LGA1151

4 OF 12

R121 20/1%_4

C96 *10p/50V/NPO_4

EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

EDP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

+VCCIO(7,38,42,47)

E10
D10
D9
C9
H10
G10
G9
F9

D12
E12

D14

M9

EDP_COMP

V3

AUD_CPU_BCLK

V2
U1

AUD_CPU_SDI_R

?REV = 1.2

AUD_CPU_SDI (9 )

1

04

DDID_TXDP0 (22)
DDID_TXDN0 (22)
DDID_TXDP1 (22)
DDID_TXDN1 (22)

DDID_TXDN2 (24)
DDID_TXDP2 (24)
DDID_TXDN3 (24)
DDID_TXDP3 (24)

EDP_AUXP (22)
EDP_AUXN (22)

+VCCIO

R59 24.9/F_4

Place inside CPU cavity

AUD_CPU_BCLK (9)
AUD_CPU_SDO (9)

HP Restricted Secret

A A

Title

Title

Title

CPU_PEG/DISPLAY

CPU_PEG/DISPLAY

CPU_PEG/DISPLAY

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

5

4

3

2

Page Modified: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

461Thursday, December 17, 2015

461Thursday, December 17, 2015

461Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

CLK_DMI_100M_P(12)
CLK_DMI_100M_N(12)

CLK_PCIBCLK_P(12)
CLK_PCIBCLK_N(12)

D D

CLK_24MHZ_P(12)
CLK_24MHZ_N(12)

+VCCST_VCCPLL

R4 56/1%_4
R12 100/1%_4

H_VIDALERT#(48)
H_VIDSCK(48)
H_VIDSOUT(48)

VCCST_PWR GD(9,38)

C C

B B

H_PWRGD(9,38)

H_PM_SYNC(10)
H_PM_DOWN(10)

PCH_THERMTR IP#(10)

H_SKTOCC#(11)

H_PROHOT#

VR_HOT#(39,48)

EC_PROCHOT(30)

EC-DB2-E02

A A

EMI

ESD

VR_HOT#

EC-DB-E01

R13 100/1%_4

DG: 75<Rec<200

H_THERMTRIP#

H_PWRGD

H_PREQ#

H_TRST#

CPU_RESET#

Near CPU

R11 220_4

R10 100/1%_4

TP67
TP66

R119 2.8K/F_4
R122 6.04K/F_4

R577 20/1%_4

R76 SP_4

TP90

R5 75/1%_4

3

EC_PRHOT_S

Q2
2N7002K/60V/0.3A

2

R14 100k/5%_4

D7 TVS_AZ5125-01H

D26 *TVS_AZ5125-01H

D6 TVS_AZ5125-01H

D25 *TVS_AZ5125-01H

D28 *TVS_AZ5125-01H

H_VIDALERT#_R
H_VIDSCK
H_VIDSOUT
H_PROCHOT#

DDR_VTT_CNTL_R
FM_OPC_ZVM_N
RSCD_AC37

H_PWRGD

H_PM_DOWN_R
H_PECI
H_THERMTRIP#

SKL_CNL

H_CATERR#

1

Near CPU

5

4

?

J1E

W5

BCLKP

W4

BCLKN

W1

PCI_BCLKP

W2

PCI_BCLKN

K9

CLK24P

J9

CLK24N

E39

VIDALERT#

E38

VIDSCK

E40

VIDSOUT

C39

PROCHOT#

AC36

DDR_VTT_CNTL

AC38

ZVM#

AC37

RSVD_AC37

H_VCCST_PWRGD

U2

VCCST_PWR GD

F8

PROCPWRGD

E7

RESET#

E8

PM_SYNC

D8

PM_DOWN

G7

PECI

D11

THERMTRIP#

AB35

SKTOCC#

AB36

PROC_SELECT#

D13

CATERR#

SKL_S_CPU_LGA

+VCCST_VCCPLL

VR_HOT# PCH_THERMTR IP#

C8
1000P/50V_4

4

SKL_S_CPU

LGA1151

5 OF 12

H_PECI

H_PECI

DDR_VTT_CNTL

+VDDQ level

DDR_VTT_CNTL_R

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]

CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[17]
CFG[16]
CFG[19]
CFG[18]

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

PROC_TDO

PROC_TDI

PROC_TMS

PROC_TCK

PROC_TRST #
PROC_PREQ#
PROC_PRDY#

CFG_RCOMP

EC-DB2-E01

R552 SP_4

R559 *0/5%_4

+3V_S5

R1
10k/5%_4

DDR_VTT_CNTL_G

34

5

Q1A

H15
F15
F16
H16
F19
H18
G21
H20
G16
E16
F17
H17
G20
F20
F21
H19

F14
E14
F18
G18

D16
D17
G14
H14

H13
G12
F13
F11

F12
B9
B10

M11

?REV = 1.2

3

PD_TEST_CPU _0
PD_TEST_CPU _1
PD_TEST_CPU _2
PD_TEST_CPU _3
PD_TEST_CPU _4
PD_TEST_CPU _5
PD_TEST_CPU _6
PD_TEST_CPU _7
PD_TEST_CPU _8
PD_TEST_CPU _9
PD_TEST_CPU _10
PD_TEST_CPU _11
PD_TEST_CPU _12
PD_TEST_CPU _13
PD_TEST_CPU _14
PD_TEST_CPU _15

SKL_PCUSTB_0_D P
SKL_PCUSTB_0_D N
SKL_PCUSTB_1_D P
SKL_PCUSTB_1_D N

SKL_XDP_BPM2
SKL_XDP_BPM3

CFG_RCOMP

PD_TEST_CPU _3

EC_PECI (3 0)

PCH_PECI (10)

+3V_S5

R2
10k/5%_4

61

2

Q1B

PJ4N3KDW/3 0V_0.1A-SC70

3

TP88
TP87

R51 49.9/F_4

R491 1K_4

DDR_VTT_CNTL (41)

2

PD_TEST_CPU _0 (38)
PD_TEST_CPU _1 (38)
PD_TEST_CPU _2 (38)
PD_TEST_CPU _3 (38)
PD_TEST_CPU _4 (38)
PD_TEST_CPU _5 (38)
PD_TEST_CPU _6 (38)
PD_TEST_CPU _7 (38)
PD_TEST_CPU _8 (38)
PD_TEST_CPU _9 (38)
PD_TEST_CPU _10 (38)
PD_TEST_CPU _11 (38)
PD_TEST_CPU _12 (38)
PD_TEST_CPU _13 (38)
PD_TEST_CPU _14 (38)
PD_TEST_CPU _15 (38)

SKL_PCUSTB_0_D P (38)
SKL_PCUSTB_0_D N (38 )
SKL_PCUSTB_1_D P (38)
SKL_PCUSTB_1_D N (38 )

SKL_XDP_BPM_0 (38)
SKL_XDP_BPM_1 (38)

H_TDO (38)CPU_RESET#(10,38)
H_TDI (38)
H_TMS (38)
H_TCK (38)

H_TRST# (12,38)
H_PREQ# (38)
H_PRDY# (38)

XDP_PCUDEBUG_3 (38)

2

+VCCST_VCCPLL(7,9,38,46,47,48)
+VCCIO(4,7,38,42,47)

BK: FOLLOW CRB v1.0

H_PREQ#
H_TMS
H_TDO
H_TDI
H_TRST#
H_TCK

H_TCK TERMINATION PLACE NEAR CPU WITHIN

1.1 INCH

BK: FOLLOW CRB 1.1

Check pcie reverse

EC-DB-E02

EC-DB-E03

PD_TEST_CPU _0
PD_TEST_CPU _1
PD_TEST_CPU _2
PD_TEST_CPU _3
PD_TEST_CPU _4
PD_TEST_CPU _5
PD_TEST_CPU _6
PD_TEST_CPU _7
PD_TEST_CPU _8
PD_TEST_CPU _9
PD_TEST_CPU _10
PD_TEST_CPU _11
PD_TEST_CPU _12
PD_TEST_CPU _13
PD_TEST_CPU _14
PD_TEST_CPU _15

Unstuff R461 & R462 for SPT-H

SKL_CNL

SKL_PCUSTB_0_D P
SKL_PCUSTB_0_D N
SKL_PCUSTB_1_D P
SKL_PCUSTB_1_D N

BK: CRB --> NO THESE , NEED CONFIRM

CRB: Close to SPT-H

H_PWRGD

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

CPU MISC

CPU MISC

CPU MISC

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

1

+VCCST_VCCPLL

R77 *51/F_4
R550 *51/F_4
R540 *51/F_4
R539 *51/F_4
R545 *51/F_4
R61 51/F_4

R492 *1K_4
R484 *1K_4
R489 *1K_4
R496 *1K_4
R511 1K_4
R506 *1K_4
R514 *1K_4
R515 *1K_4
R488 *1K_4
R487 *1K_4
R494 *1K_4
R495 *1K_4
R518 *1K_4
R519 *1K_4
R526 *1K_4
R523 *1K_4

R6 *10k/5%_4

R483 *1K_4
R481 *1K_4
R499 *1K_4
R503 *1K_4

R75 1k/5%_4

R564 *10k/5%_4

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

05

+3V_S5

+VCCST_VCCPLL

A

A

A

561Thursday, December 17, 2015

561Thursday, December 17, 2015

561Thursday, December 17, 2015

5

www.laptoprepairsecrets.com

A25
A26
A27
A28
A29
A30
B25
B27
B29
B31
B32
B33
B34
B35
B36
B37
C25
C26
C27
C28
C29
C30
C32
C34
C36
D25
D27
D29
D31
D32
D33
D34
D35
D36
E24
E25
E26
E27
E28
E29
E30
E32
E34
E36
F23
F24
F25
F27
F29

F31
G30
G32

H22

H23

H25

H27

H29

H31

AJ11
AJ13
AJ15
AJ17
AJ19
AJ21

SKL_S_CPU_LGA

J1G

SKL_S_CPU

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

LGA1151

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC
VCC
VCC
VCC
VCC
VCC

R8 *0/5%_4

R7 100/1%_4

R9 100/1%_4

7 OF 12

+VCCCPRE:
Icc ( max ) : 66A
Icc ( PS2) : 35A

+VCCCORE +VCCCORE

Decoupling Capacitors

D D

+VCCCORE

EC-DB2-E03

+

PC329 DIS@330u /2V_7343

+

PC330 *DIS@330u /2V_7343

Place caps at top
socket edge

+VCCCORE

C45 22U

C323 22U

C50 22U

C329 22U

C51 22U

C C

B B

A A

C360 22U

C44 22U

C362 22U

C56 22U

C42 22U

C61 22U

C58 22U

Place all above caps on
top side of CPU cavity

+VCCCORE

C43 22U

C68 22U

C57 22U

C63 22U

C59 22U

C350 22U

C46 22U

C341 22U

C60 22U

C371 22U

Place all below caps
on bottom side near
CPU socket

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

VCCCORE_SENSE

VSSCORE_SENSE

DG: Near CPU

5

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC
VCC
VCC
VCC
VCC
VCC

VCC_SENSE

VSS_SENSE

REV = 1.2

VSSCORE_SENSEVCCCORE_SENSE

4

?

4

H32
J21
F32
F33
F34
G23
G24
G25
G26
G27
G28
G29
J22
J23
J24
J25
J26
J27
J28
J29
J30
J31
K16
K18
K20
K21
K23
K25
K27
K29
K31
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
M13
M14
M16
M18
M20
M22
M24
M26
M28
M30

AJ12
AJ14
AJ16
AJ18
AJ20
AJ22

C38
D38

?

+VCCCORE

+VCCCPRE:
Icc ( max ) : 40A
Icc ( PS2) : 32A

VCCCORE_SENSE (48)
VSSCORE_SENSE (48)

+VCCGT

3

AA34

VCCGT

AA35

VCCGT

AA36

VCCGT

AA37

VCCGT

AA38

VCCGT

AB33

VCCGT

AB34

VCCGT

G36

VCCGT

G37

VCCGT

G38

VCCGT

G39

VCCGT

G40

VCCGT

H36

VCCGT

H38

VCCGT

H40

VCCGT

J36

VCCGT

J37

VCCGT

J38

VCCGT

J39

VCCGT

J40

VCCGT

K36

VCCGT

K38

VCCGT

K40

VCCGT

L34

VCCGT

L35

VCCGT

L36

VCCGT

L37

VCCGT

L38

VCCGT

L39

VCCGT

L40

VCCGT

M33

VCCGT

M34

VCCGT

M36

VCCGT

M38

VCCGT

M40

VCCGT

N34

VCCGT

N35

VCCGT

N36

VCCGT

N37

VCCGT

N38

VCCGT

N39

VCCGT

N40

VCCGT

P33

VCCGT

P34

VCCGT

P36

VCCGT

P38

VCCGT

P40

VCCGT

R34

VCCGT

R35

VCCGT

R36

VCCGT

R37

VCCGT

R38

VCCGT

R39

VCCGT

R40

VCCGT

T33

VCCGT

T34

VCCGT

T36

VCCGT

T38

VCCGT

T40

VCCGT

U34

VCCGT

U35

VCCGT

U36

VCCGT

U37

VCCGT

U38

VCCGT

U39

VCCGT

U40

VCCGT

V33

VCCGT

V34

VCCGT

V36

VCCGT

V38

VCCGT

V40

VCCGT

W34

VCCGT

W35

VCCGT

W36

VCCGT

W37

VCCGT

W38

VCCGT

Y33

VCCGT

Y34

VCCGT

Y36

VCCGT

Y38

VCCGT

SKL_S_CPU_LGA

3

J1H

SKL_S_CPU

LGA1151

VCCGT_SENSE

VSSGT_SENSE

VCCGTX_SENSE
VSSGTX_SENSE

8 OF 12

VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX

REV = 1.2??

F35
G34
G35
H33
H34
J33
J35
K32
K34
L31
L33
M32

F39
F38

F37
F36

2

Decoupling Capacitors

+VCCGT

C327 47u/6.3V_8

C26 47u/6.3V_8

C36 47u/6.3V_8

C347 47u/6.3V_8

C318 47u/6.3V_8

C35 47u/6.3V_8

C336 47u/6.3V_8

Place caps on top side
socket cavity

+VCCGT

C335 47u/6.3V_8

C348 47u/6.3V_8

C32 47u/6.3V_8

C337 47u/6.3V_8

C326 47u/6.3V_8

C325 47u/6.3V_8

C27 47u/6.3V_8

C28 47u/6.3V_8

C37 47u/6.3V_8

Place caps on backside
under socket cavity

+VCCGT

C30 47u/6.3V_8

C31 47u/6.3V_8

C320 47u/6.3V_8

C319 47u/6.3V_8

VCCGT_SENSE (48 )
VSSGT_SENSE (48)

2

HP Restricted Secret

Title

Title

Title

CPU POWER

CPU POWER

CPU POWER

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

1

+VCCCORE(7,47,48,49)
+VCCGT(47,48,50)

06

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

661Thursday, December 17, 2015

661Thursday, December 17, 2015

661Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

+VCCSA

+VCCSA:
Icc ( max ) :11A

D D

+VCCIO

+VCCIO:
Icc ( max ) :5.31A

C C

VCCST:
Icc ( max ) :0.1A

B B

+VCCST_VCCPLL

+VCCFUSEPRG

AA7
AB6
AB7
AB8
AC7
AC8

N7
P7
R7
T7
U7
Y6
Y7
Y8

W7

V7

AA6

AK11
AK14
AK24

AJ23

M8
P8
T8
U8

W8

V5
V6

V4

SKL_S_CPU_LGA

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

VCCST
VCCST

VCCPLL

SKL_S_CPU

LGA1151

VCC_OPC_1P8
VCC_OPC_1P8

VCCSA_SENSE

VCCIO_SENSE

VSS_SAIO_SENSE

VCCOPC_SENSE

VCCEOPIO_SENSE

VSSOPC_EOPIO_SENSE

9 OF 12

REV = 1.2 ?

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VCCPLL_OC

VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC

VCCEOPIO
VCCEOPIO

?J1I

4

+VDDQ

AT18
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
AW14
AW25
AY12
AY16
AY18
AY23

AJ9

+VCCPLL_OC_R

+VCCPCC_OC:
Icc ( max ) :0.11A

AJ30
AJ27
AJ28
AJ29
AK27

AJ25
AJ26

AB37
AB38

AD5
AF4
AE4

AK21
AJ24
AK22

+VDDQ:
Icc ( max ) :2.5A

EC-DB-E01

R549 SP_4

R544 *0_4

+VDDQ

+VCCPLL_OC

PCH_2_CPU_T RIGGER(12)
CPU_2_PCH_TRIGGER(12)

VCCSA_SENSE (44)
VCCIO_SENSE (42)
VSS_SA_IO_SENSE ( 42,44)

3

TP14
TP13

TP85

TP75
TP1
TP73
TP2

R86 20/1%_4

TP83
TP91

H_AV1
H_AW2

H_K10

H_J17
H_B39
H_J19
H_C40

PROC_TRIGOUT

H_L12
H_K12

J8

RSVD_TP

J7

RSVD_TP

L8

RSVD_TP

K8

RSVD_TP

AV1

RSVD_TP

AW2

RSVD_TP

H8

VSS

K10

RSVD

L10

RSVD

J17

RSVD

B39

RSVD

J19

RSVD

C40

RSVD

G8

VSS

AY3

VSS

D1

PROC_TRIGIN

B3

PROC_TRIGOUT

L12

RSVD

K12

RSVD

SKL_S_CPU_LGA

2

+VCCSA(44,47)
+VDDQ(9,14,15,41,46,47,55)
+VCCIO(4,38,42,47)
+VCCST_VCCPLL(5,9,38,46,47,48)

J1J

SKL_S_CPU

LGA1151

10 OF 12

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

VSS

VSS
VSS

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD

REV = 1.2??

H11
H12

AW38
AV39

AU39
AU40

AT15

AR23
AR22

J15
J14

AU9
AU10

J13
K13
J11

D15
K11

H_H12

H_AW38
H_AV39

H_AU39
H_AU40

H_J15
H_J14

H_AU9
H_AU10

H_J13
H_K13

H_K11

TP86

TP5
TP6

TP4
TP3

TP74
TP89

TP12
TP11

TP81
TP80

TP84

R533
*560/F_4

CRB 1.1: remove

1

07

Decoupling Capacitors

EC-DB-E01

+VCCCORE

A A

R556 SP_4

R557 *0/5%_4

+VCCFUSEPRG+VCCST_VCCPLL

5

+VCCSA

C67 22U

C66 22U

Place all caps
inside CPU socket
cavity top ;

+VCCST_VCCPLL

C444 22U

C442 1U

X5R

Place caps at
top socket edge

0603X5R

0603X5R

0603X5R

0402

6.3V

6.3V

6.3V

6.3V

4

+VCCIO

C416 22U

C417 22U

C415 22U

C39 22U

C64 22U

C65 22U

C411 0.1U

X7R

C412 0.1U

X7R

C352 0.1U

X7R

Place all caps
inside CPU socket
cavity top

0603X5R

0603X5R

0603X5R

0603X5R

0603X5R

0603X5R

0402

0402

0402

6.3V

6.3V

6.3V

6.3V

6.3V

6.3V

16V

16V

16V

+VDDQ

C367 22U

C338 22U

C353 22U

C394 22U

C54 *22U

1 2

D47 *TVL040201SP0

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

6.3V

0603X5R

ESD

Place cap in socket edge top

3

2

RF

+VCCPLL_OC +VDDQ

C282 *6.8p/50V/NPO_4
C97 *6.8p/50V/NPO_4

C284 *6.8p/50V/NPO_4
C283 *6.8p/50V/NPO_4

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

CPU POWER/RSVD

CPU POWER/RSVD

CPU POWER/RSVD

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

A

A

A

761Thursday, December 17, 2015

761Thursday, December 17, 2015

761Thursday, December 17, 2015

5

www.laptoprepairsecrets.com

J1F

SKL_S_CPU

D D

A7

VSS

AC34

VSS

AC35

VSS

AC6

VSS

AD1

VSS

AD33

VSS

AD36

VSS

AD37

VSS

AD38

VSS

AD39

VSS

AD4

VSS

AD40

VSS

AD6

VSS

AD7

VSS

AD8

VSS

AE3

VSS

AE33

VSS

AE36

VSS

AE5

VSS

AE8

VSS

AF1

VSS

AF33

VSS

AF36

VSS

AF37

VSS

C C

B B

A A

AF40

VSS

AF5

VSS

AF8

VSS

AJ31

VSS

AJ32

VSS

AJ33

VSS

AJ34

VSS

AJ35

VSS

AJ36

VSS

AJ4

VSS

AJ5

VSS

AJ8

VSS

AK10

VSS

AK12

VSS

AK13

VSS

AK15

VSS

AK16

VSS

AK17

VSS

AK18

VSS

AK19

VSS

AK20

VSS

AK23

VSS

AK25

VSS

AK26

VSS

AK28

VSS

SKL_S_CPU_LGA

5

VSS
VSS
VSS
VSS
VSS
VSS
VSS

LGA1151

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

6 OF 12

REV = 1.2 ?

?

AK29
AK30
AK36
AK37
AK40
AK5
AK6
AK7
AK8
AK9
AL1
AL11
AL14
AL2
AL21
AL24
AL27
AL3
AL30
AL36
AL4
AL5
AM11
AM14
AM17
AM19
AM24
AM27
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AM37
AM38
AM39
AM40
AM5
AN1
AN10
AN11
AN14
AN16
AN19
AN22
AN23
AN24
AN27
AN30
AN36
AN4
AN5
AN6
AN7
AN8
AN9
AP11
AP14
AP24
AP27
AP30
AP36
AP37
AP40
AP5
AR1
AR11
AR14
AR16
AR17
AR18
AR19
AR2
AR20
AR21

AB5

AC3
AC33
AB39

AA8

A17
A11

AA33

AA3

A24
A13

A15
AG1
AH8

AJ1

AH40

AH5

AH39
AH38
AH37
AH36

AG8

AH33

AG5
AG4

AG36
AG33

AG3
AG2

AR30

AR3

AR27

AT10

H30

AV38

AV9

L11

K30

K28

K26

K24

H28

AT30
AT25
AT14

AR33

AU1
AT9

AT28
AT32

AY9

AW9
AW5

AW30

AW3

AV5

AV34
AV30
AV28
AV26

AV2
AU7
AU5

AU30

AT7
AT6
AT5

AT40
AT39
AT36
AT24
AT17
AT13
AT12
AT11

AR5
AR4

AR36
AR35
AR34
AR32
AR31

C20
C22
C35
C33
C31
C24

C2
A4
H7

L6
L9

B6

4

J1K

SKL_S_CPU

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

LGA1151

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL_S_CPU_LGA

4

?

VSS_NCTF

11 of 12

?

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

REV = 1.2

C37
J16
D40
K35
K37
K33
H37
C10
D24
D37
B30
B26
B24
AY7
AY5
AY30
AY27
AW36
AW34
AW32
C12
C14
C16
C18
C5
C8
D26
D28
D30
D4

J1L

G13
G17
G15

G3
G6

H1
H21
H24
H26
H39

H4

H9

J18
J20

J3
J6

K1

K14
K17
K22

U3

T37
T35

R33

P4

P39
P37

P1
N33
M39
M37
M29
M25
M27
M23
M21
M19
M15
M17
M10
M12

M1

L32

L3

L13

K7

K4

K39
AU25
AU34

AU4
AT38
AT37
AT34
AT31
AT29
AT27
AT26

AR24

V35

U6

V1
V37
V39

AT8

W3

Y35

W6

Y37

SKL_S_CPU_LGA

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL_S_CPU

LGA1151

3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS_NCTF

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

12 of 12

REV = 1.2

3

2

?

D39
D7
E11
E13
E17
E15
E19
E21
E23
E3
E31
E33
E37
E35
E6
E9
F1
F22
F10
F26
F28
F30
F40
F4
F7
G11
G19
G22
G31
G33
H35
J10
J12
J32
J34
K15
K19
B38
U33
T4
T1
R6
R8
R3
P35
N8
N6
N3
M4
M7
M35
B28
T39
V8
W33
Y5

?

1

08

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

CPU GND

CPU GND

CPU GND

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

2

Page Modified: Sheet of

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

A

A

A

861Thursday, December 17, 2015

861Thursday, December 17, 2015

861Thursday, December 17, 2015

5

www.laptoprepairsecrets.com

U41D

PCH_BD1
PCH_BE2

BA9

HDA_BCLK

BD8

HDA_RST#

BE7

HDA_SDI0

BC8

HDA_SDI1

BB7

HDA_SDO

BD9

HDA_SYNC

BD1

RSVD_BD1

BE2

RSVD_BE2

AM1

DISPA_SDO

AN2

DISPA_SDI

AM2

DISPA_BCLK

AL42

GPP_D8/SSP0_SCLK

AN42

GPP_D7/SSP0_RXD

AM43

GPP_D6/SSP0_TXD

AJ33

GPP_D5/SSP0_SFRM

AH44

GPP_D20/DMIC_DATA0

AJ35

GPP_D19/DMIC_CLK0

AJ38

GPP_D18/DMIC_DATA1

AJ42

GPP_D17/DMIC_CLK1

BC10

RTCRST#

BB10

SRTCRST#

AW11

PCH_PWROK

BA11

RSMRST#

AV11

DSW_PWROK

BB41

GPP_C2/SMBALERT#

AW44

GPP_C0/SMBCLK

BB43

GPP_C1/SMBDATA

BA40

GPP_C5/SML0ALERT#

AY44

GPP_C3/SML0CLK

BB39

GPP_C4/SML0DATA

AT27

GPP_B23/SML1ALERT#/PCHHOT#

AW42

GPP_C6/SML1CLK

AW45

GPP_C7/SML1DATA

SPT_PCH_DT/SKT

HDA_BCLK(27)
HDA_RST#(27)
HDA_SDIN(27)

HDA_SDOUT_R(10)
HDA_SDOUT(27)
HDA_SYNC(27)

D D

C C

AUD_CPU_SDO(4)
AUD_CPU_SDI(4)
AUD_CPU_BCLK(4)

PCHHOT#(30)

R326 22/5%_4
R778 22/5%_4

R327 22/5%_4
R779 22/5%_4

R787 33/J_4

R774 33/J_4

Near PCH

Note: RESET# is not
required for the
ALC3252.

HDA_BCLK_R
HDA_RST#_R
HDA_SDIN

HDA_SDOUT_R
HDA_SYNC_R

TP141
TP138

AUD_CPU_SDO_R

AUD_CPU_SCLK_R

PCH_RTCRST#
PCH_SRTCRST#

PCH_PWROK
PCH_RSMRST#

PCH_DPWROK
SMB_ALT#
SMB_CLK_RESUME
SMB_DAT_RESUME
GPP_C_5
SML0_CLK
SML0_DAT
PCHHOT#
SMB1_CLK
SMB1_DAT

Strap Pin Table

Configuration

"Top swap" m ode

0 = Disable, Default (Int ernal pull-down)
1 = Enable

"No-Reboot" mo de

0 = Disable, Default (Int ernal pull-down)
1 = Enable

Intel ME Crypto TLS cipher suite.

0 = Disable, Default (Internal pull-down)
1 = Enable

BOOT SELECT STRAP

0 = SPI, Default (Internal pull-down)
1 = LPC

ESPI/LPC SELECT STRAP ( for EC )

0 = LPC ( Default, int. pull-down )
1 = ESPI

BOOT HALT

0 = Enable
1 = PCH has Internal weak pull-up

B B

JTAG ODT

0 = Enable
1 = PCH has Internal weak pull-up

CONSENT STRAP

0 = Consent strap is enabled
1 = PCH has Internal weak pull-up

PERSONALITY STRAP

0 = Enable
1 = PCH has Internal weak pull-up

0 = PCH has Internal weak pull-down
1 = EXI boot stall by pass is enabled

SECRUITY MEASURES.

0 = Enable, Defualt (Internal weak
pull-down)

1 = Disable. Flash Descriptor Securit y
overrided, pull up for debug only.

ESPI FLASH SHARING MODE

0 = Master (Internal weak pull-down)
1 = Slave

DFX TEST MODE

XTAL input is single ended if sampled l ow
else di fferenti al

A A

TEST SETUP MENU

0 = Test setup menu enabled
1 = Disabled (Default)

SV ADVANCE MENU TABLE

0 = SV ADVANCE MENU
1 = Normal Menu (Default)

Note

SPKR

LPSS_GSPI0_MOSI(12)

SMB_ALT#

LPSS_GSPI1_MOSI(12)

GPP_C_5

SPI_MOSI(10,37,38)

SPI_MISO(10,37)

SPI_IO2(10,38)

SPI_IO3(10)

150K PU NEEDED TO DISABLE EXI BOOT STALL BYPASS

PCHHOT#

HDA_SDO(10)

HDA_SDOUT_R

GPP_H_12(10)

VISACH2_D3(10)

TEST_SETUP_MENU(11)

SV_ADVANCE_GP48(10)

5

R729 *4. 7K/F_4
R736 *20 k/5%_4

R726 *4.7K/ F_4

R725 *1k/ 5%_4

R176 *4. 7K/F_4
R175 *20 k/5%_4

R222 *4. 7K/F_4
R223 *20 k/5%_4

R676 *4.7K/ F_4

R675 20k/ 5%_4

R720 1k/ 5%_4
R721 *4. 7K/F_4

R719 *20 k/5%_4
R718 *4. 7K/F_4

R730 *20 k/5%_4
R727 *1. 2k/5%_4

R701 *20k/5%_4
R694 *4.7k/5%_4

R224 150k/1%_4
R225 *20k/5%_4

R319 1K/J_4

HDA_SDO

R586 1K/J_4

R685 *4. 7K/F_4
R684 *20 k/5%_4

R655 *4. 7K/F_4
R669 *20 k/5%_4

R146 10K/J_4

R159 *0/ 5%_4

R645 20k/ 5%_4

R644 *0/ 5%_4

4

SPT-H_PCH

(Primary)

AUDIO

(Primary)

(RTC)
(RTC)

(RTC)

REV = 1.3

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5_SPI

+3V_S5_SPI

+3V_S5_SPI

+3V_S5_SPI

pull down is needed for
pre-ES1/ES1 samples.

+3V_S5

+DVDDIO_AUDIO

EN_OVERRIDE (30)

+3V_S5

+3V_S5

+3V

+3V

SMBUS

CRB 1.0

4

BMBUSY#
PCH_LPC_CLKRUN#

LANPHYPC

SLP_WLAN#

DDR4_DRAMRST_N_R
VRALERTB_PU
TP_DETECT#
GPP_B_1
GPP_B_0
GPP_B_11
PCH_SYSPWROK

PCH_WAKE#
SLP_A#
SLP_LAN#
PM_SLP_S0_R#
PM_SLP_S3_R#
PM_SLP_S4#
PM_SLP_S5_R#

PCH_SUSCLK
BATLOW#
PCH_SUSACK#
PCH_SUSPWRACK

LAN_WAKE#
GPD1
PM_SLP_SUS#_N

SYS_RST#
SPKR
PCH_PROCPWRGD

PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI

+3V_S5

C598

0.1u/16V/X7R_4

U42

3 5

TC7SH08FU

R178 1k/5%_4
R168 1k/5%_4

R163 1k/5%_4
R162 1k/5%_4

SMBCLK0_EC

SMBDATA0_EC

3

TP56

EC-DB2-E01

TP53

R761 SP_4

TP36
TP119
TP38

EC-DB2-E01

TP135
TP44

R735 SP_4
R316 SP_4

R307 SP_4

R748 *0/5%_4
R751 *0/5%_4 R320 10K/J_4

TP137

R773 30/1%_4

C191 0.1u/16V/ X7R_4

PCH_RSMRST#

R321
*0_4

PCH_DPWROK

4

3

R309 47k/5%_4

CRB v1.1: R2039 -> 47kohm

Stuff R2043 and don't stuff R2048 if
not supporting Deep SX..

C192 *0.01u/50V/ X7R_4

R323 100k/5%_4

PCH_PWROK_R

BK: DG

PCH_PWROK

R765 10K/J_4

R763 249/1%_4

R759 249/1%_4

+3V_S5 +3V

SMBCLK_PCH_MAIN
SMBDATA_PCH_MAIN

SMBCLK_PCH_MAIN (14,15,38)

SMBDATA_PCH_MAIN (14,15,38)

+3V_S5

SMBCLK0_EC/SMBDATA0_EC:

SMBCLK0_EC (30)

SMBDATA0_EC (30)

PCH_PWROK

R199 1k/5%_4
R197 1k/5%_4

PCH_LPC_CLKRUN# (30)

DDR4_DRAMRST# (14,15)

TP_DETECT# (31)

PCH_SYSPWROK (38)

PCH_WAKE# (28,34,35)

PM_SLP_S0# (30)
PM_SLP_S3# (30)
PM_SLP_S4# (30)
PM_SLP_S5# (30)

PCH_SUSCLK (34,35)

EC_SUSACK# (30)
EC_SUSPWRACK (30)

EC_PWBTN_OUT# (30,38)
SYS_RST# (38)
SPKR (27)
H_PWRGD (5,38)

ITP_PMODE (38)
PCH_JTAGX (38)
PCH_JTAG_TMS (38)
PCH_JTAG_TDO (38)
PCH_JTAG_TDI (38)
PCH_JTAG_TCK (38)

VCCST_PWRGD (5,38)

PCH_SYSPWROK

(Be asserted after both PWROK and VR_READY assertion)

EC_SYS_PWROK(30)

RTC circuit

R27

1.5k/1%_4

VCC_RTC_S

R26

45.3k/1%_4

R25 1K_4

BT_+

12

+-

?

GPP_B1
GPP_B0

GPP_B11

SYS_PWROK

WAKE#

SLP_LAN#

SLP_SUS#

SYS_RESET#

ITP_PMODE

JTAGX
JTAG_TMS
JTAG_TDO

JTAG_TDI

JTAG_TCK

EC-DB1-E01

*TVS AZ5125-01 H.R7G

BB17
AW22

AR15

AV13

BC14
BD23
AL27
AR27
N44
AN24
AY1

BC13
BC15
AV15
BC26
AW15
BD15
BA13

AN15
BD13
BB19
BD19

BD11
BB15
BB13
AT13
AW1
BD26
AM3

AT2
AR3
AR2
AP1
AP2
AN3

?

R328 SP_4

GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

GPP_A8/CLKRUN#

GPD11/LANPHYPC

(DSW)

(DSW)

GPD9/SLP_WLAN#

(DSW)
(Primary)

GPP_B2/VRALERT#

GPP_G17/ADR_COMPLETE

DRAM_RESET#

(Primary)

(DSW)
(DSW)
(DSW)
(Primary)
(DSW)
(DSW)
(DSW)

(DSW)
(DSW)
(Primary)

GPP_A13/SUSWARN#/SUSPWRDNACK

(DSW)
(DSW)
(DSW)

JTAG

4 OF 12

GPD6/SLP_A#

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD8/SUSCLK

GPD0/BATLOW#

GPP_A15/SUSACK#

GPD2/LAN_WAKE#
GPD1/ACPRESENT

GPD3/PWRBTN#

GPP_B14/SPKR

PROCPWRGD

RSMRST# & DSW_PWROK

EC_RSMRST#(30,38)

D8

Near PCH

EC-DB1-E01

+3V

R769
10K/J_4

R329 SP_4

R762 *0/J_4

2

1

EC_DPWROK(30)

PCH_PWROK PCH SYSTEM RESET

VR_READY(30,48)

EC_PWROK(30)

VR_EADY to EC delay--> EC_PWROK

SYSTEM SMBUS

MEMORY,XDP

CRB: DIMM, PEG slot,
power thermal sensor?

SMB_CLK_RESUME

+3V

SMB_DAT_RESUME

SYSTEM SMBUS

EC-DB1-E04

SMB1_CLK

+3V

SMB1_DAT

+3V

Q7

6

2

5

Q55

6

2

5

SMB_CLK_RESUME
SMB_DAT_RESUME

1

SMBCLK_PCH_MAIN

43

SMBDATA_PCH_MAIN

2N7002DW/60V/0.115A

SMB1_CLK
SMB1_DAT

1

43

2N7002DW/60V/0.115A

2

PM_SLP_SUS#

PM_SLP_SUS#_N

To EC ??

PCH_SUSPWRACK PCH_SUSACK#

BOM Note:
EMPTY R2029 FOR USB WAKE S4/S5

DESIGN NOTE:
STUFF R3030 FOR NON-DEEP SX

EC-DB1-E01

R785 SP_4

BK: CRB

PCH_SYSPWROK

D1
BAT54C

1

2

20MIL

BT_-

BT1
CONNDIPHOUSING2P

CLEAR CMOS

CLR_CMOS(30)

2

R767 10k/5%_4

C597 *0.1u/16V/ X7R_4

R752 *0/J_4

R755 *1k/5%_4

R789 1K/J_4

+3V

R343

2.2K/J_4

JP2

1 2

SHORT PAD

+3V_RTC+3V_AUX

R27/R26
CRB: 30.1k 1%
Check list: 20k

20MIL

3

R29 20K/F_4

C40 1u/10V/X5R_4

R28 20K/F_4

C48 1u/10V/X5R_4

PCH_RTCRST#

2

PDTC144EU
Q5

1 3

1

+3V_PCH_VCCDSW(13)
+3V_S5(5,10,11,12,13,23,25,28,30,32,34,37,38,39,41,42, 43,45,46,47,54,55)
+3V(10,11,12,13,14,15,16,17,18, 19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)
+VCCST_VCCPLL(5,7,38,46,47,48)

PM_SLP_SUS# (30)

PCH_SYSPWROK

R780 *10K/J_4

+3V

SYS_RST#_GSYS_RST#

R342 1K/J_4

JP1

12

SHORT PAD

PCH_RTCRST#

PCH_SRTCRST#

VRALERTB_PU

BMBUSY#

TP_DETECT#
PCH_LPC_CLKRUN#

PCH_WAKE#
BATLOW#
GPD1
LAN_WAKE#
EC_PWBTN_OUT#

DDR4_DRAMRST#

PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
PCH_JTAG_TCK

PCH_SUSCLK

CRB: for
LPT-H

SML0_CLK
SML0_DAT

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

PCH_HDA/SMBUS/MISC

PCH_HDA/SMBUS/MISC

PCH_HDA/SMBUS/MISC

--

--

--

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

09

+3V_S5

R747 10K/J_4

R756 *10K/J_4

R731 10K/J_4
R227 8.2k/5%_4

+3V_PCH_VCCDSW

BK

R764 1K/J_4
R766 10K/J_4
R758 *10K/J_4
R770 4.7K/F_4

R760 470/5%_4

C595 *0.1u/16V/ X7R_4

DG: NEAR DIMM

+VCCST_VCCPLL

R790 51/F_4
R782 51/F_4
R783 51/F_4
R295 *51/5%_4

R304 *1.5K/F_4

R177 1k/5%_4
R179 1k/5%_4

961Thursday, December 17, 2015

961Thursday, December 17, 2015

961Thursday, December 17, 2015

+VDDQ

+3V_S5

+3V

A

A

A

5

www.laptoprepairsecrets.com

?

REV = 1.3

REV = 1.3

R753 *0/J_4

+3V

C588 0.1U

10%

2

1

3 5

SPT-H_PCH

DMI

PCIe/USB 3

(H110)

(H110)

LAN,PCIe
(H110)

(H110)

2 OF 12

SPT-H_PCH

1 OF 12

4

U40
TC7SH08FUSSOP-5P

N/A

LAN

PCIe

?

0402 X7R

USB 2.0

N/A

(H110)

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7

USB2_VBUSSENSE

GPP_B13/PLTRST#

GPP_G16/GSXCLK

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_E3/CPU_GP0

GPP_E7/CPU_GP1

GPP_B3/CPU_GP2

GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

INTRUD ER#

16V

AF5

USB2N_1

AG7

USB2P_1

AD5

USB2N_2

AD7

USB2P_2

AG8

USB2N_3

AG10

USB2P_3

AE1

USB2N_4

AE2

USB2P_4

AC2

USB2N_5

AC3

USB2P_5

AF2

USB2N_6

AF3

USB2P_6

AB3

USB2N_7

AB2

USB2P_7

AL8

USB2N_8

AL7

USB2P_8

AA1

USB2N_9

AA2

USB2P_9

AJ8

USB2N_10

AJ7

USB2P_10

W2

USB2N_11

W3

USB2P_11

AD3

USB2N_12

AD2

USB2P_12

V2

USB2N_13

V1

USB2P_13

AJ11

USB2N_14

AJ13

USB2P_14

AD43
AD42
AD39
AC44
Y43
Y41
W44
W43

AG3

USB2_COMP

AD10
AB13

RSVD_AB13

AG2

USB2_ID

BD14

GPD7/RSVD

USB2_COMP
Trace length < 500 m ils
Trace impedance 50 ohm
No longer tha n 450 mils to r esistor
Trace spacing is 15 m ils

?

BB27

P43
R39
R36
R42
R41

AF41
AE44
BC23
BD24

BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34

BE11

?

CRB:
NFC
PLTRST_PEG_SLOTS_N
USBHUB_RST_N
TPM

R741
100K/F_4

U41B

PCH_RCOMPN
PCH_RCOMPP

PME_N

TP_PCH_AF17

TP_FPF_VREF
TP_FPF_MON

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK

SPI_IO2_R
SPI_IO3_R

L27

DMI_RXN0

N27

DMI_RXP0

C27

DMI_TXN0

B27

DMI_TXP0

E24

DMI_RXN1

G24

DMI_RXP1

B28

DMI_TXN1

A28

DMI_TXP1

G27

DMI_RXN2

E26

DMI_RXP2

B29

DMI_TXN2

C29

DMI_TXP2

L29

DMI_RXN3

K29

DMI_RXP3

B30

DMI_TXN3

A30

DMI_TXP3

B18

PCIE_RCOMPN

C17

PCIE_RCOMPP

H15

PCIE1_RXN/USB3_7_RXN

G15

PCIE1_RXP/USB3_7_RXP

A16

PCIE1_TXN/USB3_7_T XN

B16

PCIE1_TXP/USB3_7_TXP

B19

PCIE2_TXN/USB3_8_T XN

C19

PCIE2_TXP/USB3_8_TXP

E17

PCIE2_RXN/USB3_8_RXN

G17

PCIE2_RXP/USB3_8_RXP

L17

PCIE3_RXN/USB3_9_RXN

K17

PCIE3_RXP/USB3_9_RXP

B20

PCIE3_TXN/USB3_9_T XN

C20

PCIE3_TXP/USB3_9_TXP

E20

PCIE4_RXN/USB3_10_RXN

G19

PCIE4_RXP/USB3_10_RXP

B21

PCIE4_TXN/USB3_10_T XN

A21

PCIE4_TXP/USB3_10_T XP

K19

PCIE5_RXN

L19

PCIE5_RXP

D22

PCIE5_TXN

C22

PCIE5_TXP

G22

PCIE6_RXN

E22

PCIE6_RXP

B22

PCIE6_TXN

A23

PCIE6_TXP

L22

PCIE7_RXN

K22

PCIE7_RXP

C23

PCIE7_TXN

B23

PCIE7_TXP

K24

PCIE8_RXN

L24

PCIE8_RXP

C24

PCIE8_TXN

B24

PCIE8_TXP

SPT_PCH_DT/SKT

U41A

BD17

GPP_A11/PME#

AG15

RSVD_AG15

AG14

RSVD_AG14

AF17

RSVD_AF17

AE17

RSVD_AE17

AR19

TP5

AN17

TP4

BB29

SPI0_MOSI

BE30

SPI0_MISO

BD31

SPI0_CS0#

BC31

SPI0_CLK

AW31

SPI0_CS1#

BC29

SPI0_IO2

BD30

SPI0_IO3

AT31

SPI0_CS2#

AN36

GPP_D1/SPI1_CLK

AL39

GPP_D0/SPI1_CS#

AN41

GPP_D3/SPI1_MOSI

AN38

GPP_D2/SPI1_MISO

AH43

GPP_D22/SPI1_IO3

AG44

GPP_D21/SPI1_IO2

SPT_PCH_DT/SKT

DMI_CPU_PCH_TXN0(4)
DMI_CPU_PCH_TXP0(4)
DMI_PCH_CPU_RXN0(4)
DMI_PCH_CPU_RXP0(4)
DMI_CPU_PCH_TXN1(4)
DMI_CPU_PCH_TXP1(4)
DMI_PCH_CPU_RXN1(4)
DMI_PCH_CPU_RXP1(4)
DMI_CPU_PCH_TXN2(4)

D D

DMI_CPU_PCH_TXP2(4)
DMI_PCH_CPU_RXN2(4)
DMI_PCH_CPU_RXP2(4)
DMI_CPU_PCH_TXN3(4)
DMI_CPU_PCH_TXP3(4)
DMI_PCH_CPU_RXN3(4)
DMI_PCH_CPU_RXP3(4)

R744 100/F_4

C C

PCIE_WLAN_RX_N(34)

WLAN

Card
Reader

B B

PCIE_WLAN_RX_P(34)
PCIE_WLAN_TX_N(34)
PCIE_WLAN_TX_P(34)
PCIE_CR_RX_N(29)
PCIE_CR_RX_P(29)
PCIE_CR_TX_N(29)
PCIE_CR_TX_P(29)

+VCCPGPPA

TP48

TP45
TP42

SPI_MOSI(9,37,38)
SPI_MISO(9,37)

SPI_CLK(37)

SPI_CS2#(37)

R754 10K/J_4

EC-SI-xx remove TP

Platform Reset

A A

PLTRST_N

5

4

USB_OC_0#
USB_OC_1#
USB_OC_2#
VISACH2_D3
USB_OC_4#
USB_OC_5#
USB_OC_6#
USB_OC_7#

PCH_USB_COMP
PCH_USB_SS
PCH_AB13
PCH_USB_ID

PCH_BD14

PLTRST_N_R

GPP_G_16
GPP_G_12
CAM_ON
IR_ON
GPP_G_15

PCH_GPP_E_3

BT_RF_OFF_R
GPP_B_4

GPP_H_18
GPP_H_17
GPP_H_16
GPP_H_15
GPP_H_14
GPP_H_13
GPP_H_12
GPP_H_11
GPP_H_10

INTRUDER#

PLTRST_N_BUF (16,24,34,35)

R775 113/F_4
R318 1K_4

TP49

R776 1K_4

TP136

R733 30/1%_4

R745 1k/5%_4

4

USB2_USB3P_1N (32)
USB2_USB3P_1P (32)
USB2_USB3P_2N (32)
USB2_USB3P_2P (32)
USB2_USB2P_3N (32)
USB2_USB2P_3P (32)
USB2_USB2P_4N (32)
USB2_USB2P_4P (32)
USB2_IR_5N (31)
USB2_IR_5P (31)
USB2_TYPC_6N (33)
USB2_TYPC_6P (33)
USB2_WLAN_7N (34)
USB2_WLAN_7P (34)
USB2_TCH_8N (31)
USB2_TCH_8P (31)
USB2_CAM_9N (31)
USB2_CAM_9P (31)

USB_OC_0# (32)
USB_OC_1# (32)
USB_OC_2# (32)
VISACH2_D3 (9)

TP125
TP25

TP155
TP22

TP156

NEAR PCH

TP134

TP127
TP131
TP126
TP128
TP27
TP129

TP28
TP130

Security Jumper

CONN MINI JUMPER
2P FS (P2.0,H5.0)
DFJP02FS000

3

USB3.0 P1

USB3.0 P2

USB2.0 P1~P2

IR CAM

TYPE-C

BT

TOUCH MODULE

WEBCAM

ODD

HDD

CRB:
LAN
EC
DBG

PLTRST_N (28,29,37)

CAM_ON (27,31)

BT_RF_OFF (34)

GPP_H_12 (9)

SPI_IO2_R

SPI_IO3_R

HDA_SDO(9) HDA_SDOUT_R (9)

CLR_CMOS(CN16_1)

EC_SCI#(30)

SV_ADVANCE_GP48(9)

SATA_TX1_N(36)
SATA_TX1_P(36)
SATA_RX1_N(36)
SATA_RX1_P(36)

SATA_TX0_N(36)
SATA_TX0_P(36)
SATA_RX0_N(36)
SATA_RX0_P(36)

R724 *0/5%_4

R706 SP_4

EC-DB2-E01

TP122
TP123
TP20
TP124

CLR_BIOS_DATA#
CLR_PASSWORD#
BOOT_BLK_REC#

BOOT_BLK_WRITE#

TP115
TP114
TP117

TP18
TP21
TP121

SPI ROM Socket

U11

1

SPI_CS0#_R
SPI_CLK_R
SPI_SI
SPI_SO

SPI_WP#

CN12

2
4
6
8 7

HEADER_10P

c13541-11039-l-10p-ldv

CE#

6

SCK

5

SI

2

SO

3

WP#

*A25LQ32AM-F/Q

DFHS08FS023

91960-0084L-8P-SOCKET

U12 & U11 footprint

1

HDA_SDOUT_R

3

CLR_BIOS_DATA#

5

CLR_PASSWORD#
BOOT_BLK_REC#

910

BOOT_BLK_WRITE#

HOLD#

SPI_IO2 (9,38)

SPI_IO3 (9)

3

GPP_G_8
GPP_G_9
GPP_G_10
GPP_G_11

EC_SCI#

GPP_G_5
GPP_G_6
GPP_G_7

GPP_F_10
GPP_F_11
GPP_F_13

VDD

VSS

AV2
AV3

AW2

R44
R43
U39
N42

U43
U42
U41
M44
U36
P44
T45
T44

B33
C33
K31
L31

AB33
AB35
AA44
AA45

B38
C38
D39
E37

C36
B36
G35
E35

A35
B35
H33
G33

J45
K44
N38
N39
H44
H43
L39
L37

+3V_S5_SPI

8

7

SPI_HOLD

4

󴣊󵄖󳓓

?

N/A

(H110)

SPT-H_PCH

PCIE9_RXN/SATA0A_RXN

PCIe,LAN

CLINK

FAN

SATA

(H110)

SATA,LAN

(H110)

LAN

(H110)

N/A

(H110)

3 OF 12

PCIE9_RXP/SATA0A_RXP

(H110)

PCIE9_TXN/SATA0A_T XN
PCIE9_TXP/SATA0A_T XP

PCIE10_RXN/SATA1A_RXN

PCIe

PCIE10_RXP/SATA1A_RXP

(H110)

PCIE10_TXN/SATA1A_T XN

PCIE10_TXP/SATA1A_T XP

PCIE15_RXN/SATA2_RXN

SATA

PCIE15_RXP/SATA2_RXP

(H110)

PCIE15_TXN/SATA2_T XN

PCIE15_TXP/SATA2_T XP

PCIe/SATA

PCIE16_RXN/SATA3_RXN

SATA

PCIE16_RXP/SATA3_RXP

(H110)

PCIE16_TXN/SATA3_T XN

PCIE16_TXP/SATA3_T XP

PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_T XN

N/A

PCIE17_TXP/SATA4_T XP

(H110)

PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_T XN

PCIE18_TXP/SATA5_T XP

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

GPP_F21/EDP_BKLTCTL

HOST

U41C

CL_CLK
CL_DATA
CL_RST#

GPP_G8/FAN_PWM_0
GPP_G9/FAN_PWM_1
GPP_G10/FAN_PWM_2
GPP_G11/FAN_PWM_3

GPP_G0/FAN_TACH_0
GPP_G1/FAN_TACH_1
GPP_G2/FAN_TACH_2
GPP_G3/FAN_TACH_3
GPP_G4/FAN_TACH_4
GPP_G5/FAN_TACH_5
GPP_G6/FAN_TACH_6
GPP_G7/FAN_TACH_7

PCIE11_TXP
PCIE11_TXN
PCIE11_RXP
PCIE11_RXN

GPP_F10/SCLOCK
GPP_F11/SLOAD
GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1

PCIE14_TXN/SATA1B_T XN
PCIE14_TXP/SATA1B_T XP
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP

PCIE13_TXN/SATA0B_T XN
PCIE13_TXP/SATA0B_T XP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP

PCIE12_TXP
PCIE12_TXN
PCIE12_RXP
PCIE12_RXN

PCIE20_TXP
PCIE20_TXN
PCIE20_RXP
PCIE20_RXN
PCIE19_TXP
PCIE19_TXN
PCIE19_RXP
PCIE19_RXN

SPT_PCH_DT/SKT

REV = 1.3

BIOS SPI ,64Mbit (8M Byte)

SPI_MOSI

R133 33/J_4

SPI_CS0# SPI_CS0#_R

R161 33/J_4

SPI_CLK

R138 33/J_4

SPI_MISO

R147 33/J_4

SPI_CS0#_R
SPI_CLK_R
SPI_SI
SPI_SO

R137 15_4

EC-DB2-E01

R164 SP_4

SPI_CS0#
SPI_SI
SPI_SO +3V_S5_SPI_SKT
SPI_CLK_R
SPI_WP# SPI_HOLD

E16(1-2)

MINI_JUMP_2P_FM_2.54MM_BLACK
PROTO
Pinrex 202-H71-01GU0B

SPI_SI

SPI_CLK_R

SPI_SO

R142
1k_4

TP15
TP17

SPI_WP#SPI_IO2_R

TP16
TP19

E1

1
3

4

526

87

9 10

PROTO@HEADER_10P

c13541-11039-l-10p-ldv

2

GPP_E8/SATALED#

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THERMTRIP#

PECI

PM_SYNC

PLTRST_CPU#

PM_DOWN

R125 15/1%_4

R167 15/1%_4

R132 15/1%_4

LAYOUT: CLOSE TO ECLAYOUT: CLOSE TO SOC

R145 15/1%_4

U12

1

CE#

6

SCK

5

SI

2

SO

HOLD#

3

WP#

W25Q64BVSSIG

SOCKET

CRITICAL

SPI_CS0#_R

2

?

VDD

VSS

G31
H31
C31
B31

G29
E29
C32
B32

F41
E41
B39
A39

D43
E42
A41
A40

H42
H40
E45
F45

K37
G37
G45
G44

AD44

AG36

VISA2CH1_CLK

AG35

VISACH1_D0

AG39
AD35
AD31
AD38
AC43
AB44

W36
W35

PCH_W35

W42

PCH_W42

AJ3

PCH_THRMP#

AL3
AJ4

H_PM_SYNC_R

AK2

H_CPU_RESET#

AH2

8

7

SPI_HOLD

4

EC-DB1-E01

R166 SP_4

C129

0.1U

0402
16V
X7R

R777 560/F_4

R788 30/1%_4

R784

EC-DB1-E01

EC_MOSI (30)

EC_CS# (30)

EC_SCK (30)

EC_MISO (30)

R143
1k_4

R136 15_4

PCIE_GLAN_RX_N (28)
PCIE_GLAN_RX_P (28)
PCIE_GLAN_TX_N (28)
PCIE_GLAN_TX_P (28)

M.2_SSD_RX0_N (35)
M.2_SSD_RX0_P (35)
M.2_SSD_TX0_N (35)
M.2_SSD_TX0_P (35)

TP154
TP153

TP30
TP116

SP_4

+3V_S5_SPI

EC-DB1-E01

SPI_IO3_R

+3V_S5

1

+3V(9,11,12,13, 14,15,16,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36, 38,42,44,46,47,48,53,54,55)
+3V_RTC(9,13)
+3V_S5(5,9,11,12,13, 23,25,28,30,32,34,37,38,39,41,42,43,45,46,47,54,55)

LAN

M.2
SSD

PCH_SATA_LED_# (31)

M.2_SSD_SATA_PCIE_DET# (35)

PCH_BRIGHT (22,24)

PCH_THERMTRIP# (5)
PCH_PECI (5)
H_PM_SYNC (5)
CPU_RESET# (5,38)
H_PM_DOWN (5)

+3V_S5

R158 SP_4

C124

0.1U

0402
X7R
16V

EC_SCI#
GPP_G_5
GPP_G_6

GPP_F_11

PCH_SATA_LED_#

GPP_F_10
GPP_G_7

GPP_G_5

INTRUDER#

VISACH1_D0

PCH_PECI

BT_RF_OFF_R

CAM_ON
IR_ON

USB_OC_0#
USB_OC_1#
USB_OC_2#

USB_OC_4#
USB_OC_5#
USB_OC_6#
USB_OC_7#

CLR_BIOS_DATA#
CLR_PASSWORD#
BOOT_BLK_REC#
BOOT_BLK_WRITE#

ESD reserved

PLTRST_N

EMI reserved

SPI_CLK

R668 10K/J_4
R650 *10K/J_4
R646 *10K/J_4

R151 *10K/J_4

R670 10K/J_4

R150 *10K/J_4
R657 *10K/J_4

R659 10K/J_4

R768 1M/J_4

R149 43k/1%_4

R148 *1k/5%_4

R786 1k/5%_4

C613 *47p/50V/NPO_4

R740 10K/J_4

R157 10K/J_4
R664 10K/J_4

R656 10K/J_4
R642 10K/J_4
R198 10K/J_4

R660 10K/J_4
R154 10K/J_4
R662 10K/J_4
R653 10K/J_4

R652 10K/J_4
R651 10K/J_4
R156 10K/J_4
R155 10K/J_4

D36 *TVS_AZ5125-01H

C583 *10p/50V/NPO_4

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Page Modified: Sheet

Page Modified: Sheet

Page Modified: Sheet

Project:

PCH_DMI/PCIE/USB/SATA/GPIO

PCH_DMI/PCIE/USB/SATA/GPIO

PCH_DMI/PCIE/USB/SATA/GPIO

--

--

--

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

10

+3V

+3V_RTC

+3V

+3V_S5

+3V_S5

+3V

of

10 61Thursday, December 17, 2015

of

10 61Thursday, December 17, 2015

of

10 61Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

U41F

USB3_TXN1(32)
USB3_TXP1(32)

USB PORT

D D

USB PORT

TYPE-C_1

TYPE-C_2

C C

3D CAM

HDMI_HPD(26)

EC_SMI#(30)

USB3_RXN1(32)
USB3_RXP1(32)
USB3_TXN2(32)
USB3_TXP2(32)
USB3_RXN2(32)
USB3_RXP2(32)

USB3_TYPC_TX5N(33)
USB3_TYPC_TX5P(33)
USB3_TYPC_RX5N(33)
USB3_TYPC_RX5P(33)

USB3_TYPC_TX3P(33)
USB3_TYPC_TX3N(33)
USB3_TYPC_RX3P(33)
USB3_TYPC_RX3N(33)

USB3_CAM_TX4P(31)
USB3_CAM_TX4N(31)
USB3_CAM_RX4P(31)
USB3_CAM_RX4N(31)

R336 SP_4

EC_SMI#_PCH

C11

USB3_1_TXN

B11

USB3_1_TXP

B7

USB3_1_RXN

A7

USB3_1_RXP

B12

USB3_2_TXN/SSIC_1_TXN

A12

USB3_2_TXP/SSIC_1_TXP

C8

USB3_2_RXN/SSIC_1_RXN

B8

USB3_2_RXP/SSIC_1_RXP

B15

USB3_6_TXN

C15

USB3_6_TXP

K15

USB3_6_RXN

K13

USB3_6_RXP

B14

USB3_5_TXN

C14

USB3_5_TXP

G13

USB3_5_RXN

H13

USB3_5_RXP

D13

USB3_3_TXP/SSIC_2_TXP

C13

USB3_3_TXN/SSIC_2_TXN

A9

USB3_3_RXP/SSIC_2_RXP

B10

USB3_3_RXN/SSIC_2_RXN

B13

USB3_4_TXP

A14

USB3_4_TXN

G11

USB3_4_RXP

E11

USB3_4_RXN

SPT_PCH_DT /SKT

U41E

AW4

GPP_I0/DDPB_HPD0

AY2

GPP_I1/DDPC_HPD1

AV4

GPP_I2/DDPD_HPD2

BA4

GPP_I3/DDPE_HPD3

EC_DB2_E01

DDPD_HPD(22,24)

B B

BD7

GPP_I4/EDP_HPD

Active high

SPT_PCH_DT /SKT

REV = 1.3

SPT-H_PCH

N/A

(H110)

USB

REV = 1.3

4

?

LPC/eSPI

GPP_A5/LFRAME#/ESPI_CS#

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

SATA

USB3

(H110)

6 OF 12

?

SPT-H_PCH

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

5 OF 12

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A6/SERIRQ

GPP_A10/CLKOUT_LPC1

GPP_G19/SMI#

GPP_G18/NMI#

GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3

BB3
BD6
BA5
BC4
BE5
BE6

Y44

GPP_F14

V44

GPP_F23

W39

GPP_F22

L43

GPP_G23

L44

GPP_G22

U35

GPP_G21

R35

GPP_G20

BD36

GPP_H23

?

AT22
AV22
AT19
BD16

BE16
BA17
AW17
AT17
BC18

BC17
AV19

M45
N43

AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41

?

DDPB_CTRLCLK
DDPB_CTRLDATA

CAM_DET#
DGPU_PLTRST_N

DMIC_DET#

3

SERIRQ
LPC_PIRQ
EC_KBRST#

CLKOUT_LPC0
CLKOUT_LPC1

2X4_PWRDET

PCH_GPP_E_4
HD_3D_DET

SSD_SATA_DEVSLP
PCH_CODEC_IRQ

R757 22_4
R228 22_4

TP120

TP47

EC-DB2-E04

TP157

TP24

F_LAD0 (30,34,37)
F_LAD1 (30,34,37)
F_LAD2 (30,34,37)
F_LAD3 (30,34,37)

L_FRAME# (30,34,37)
SERIRQ (30,37)

EC_KBRST# (30 )
EC_LPCPD# (30 )

CK_24M_EC (30)
CK_24M_LPC (37)
CK_24M_DEBUG(34)
PCH_SMI# (37)

DGPU_EVENT# (19)
DGPU_PWROK
SSD_SATA_DEVSLP (35)

DDPB_CTRLCLK (26)
DDPB_CTRLDATA (26)

H_SKTOCC#
CAM_DET# (31)
DGPU_PLTRST_N (16)

CAM_FW_UPDATE# (31)
EN_DGPU_PW R# (54)
SPI_TPM_PIRQ (37)
TEST_SETUP_MENU (9)

DMIC_DET#

(16,18)

(5)

(31)

2

+3V(9,10,12,13,14,15,16,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)
+3V_S5(5,9,10,12,13,23,25,28,30,32,34,37,38,39,41,42,43,45,46,47,54,55)

3D camera

HD camera

1

0

CRB: Connect to +3V_S5 directly

SERIRQ & LPC_PIRQ
Note: An external pull-up is required

H/W STRAPS:
DDPB_CTRLDATA: ( pull up at HDMI page )
0= Port B is not detected. Default, Internal PD
1= Port B is detected.

DGPU_HOLD_RST#
0 = Keep dGPU in reset
1 = Reset is released. This action taken 100 ms after
DGPU_PWROK to ensure clock is stable.

EN_DGPU_PWR
1 = dGPU power switch turned on
0 = Power switch turned off

1

2X4_PWRDET

CAM_DET#
DMIC_DET#

EC_KBRST#
SERIRQ

PCH_SMI#

HD_3D_DET

LPC_PIRQ

SPI_TPM_PIRQ

DGPU_PLTRST_N

EC_SMI#

11

R661 *10K/J_4

R140 10K/J_4
R678 10K/J_4

R294 10K/J_4
R286 10K/J_4

R672 10K/J_4
R671 *10K/J_4R226 22_4

R128 *10K/J_4
R127 10K/J_4

+3V_S5

R293 10K/J_4

+3V_S5

R153 8.2k/5%_4

R152 10K/J_4

R341 10K/J_4

+3V

+3V

+3V

+3V

HP Restricted Secret

A A

EC-DB2-E05

5

4

3

EMI reserved

CK_24M_EC

CK_24M_LPC

C594 10p/50V/NPO_4

C153 *10p/50V/NPO_4

2

Title

Title

Title

PCH_USB3/LPC

PCH_USB3/LPC

PCH_USB3/LPC

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

11 61Thursday, December 17, 2015

11 61Thursday, December 17, 2015

11 61Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

4

3

2

1

?

U41G

AR17

GPP_A16/CLKOUT_48

BC9

BD10

BC24

AW24

AT24
BD25
BB24
BE25

AT33
AR31
BD32
BC32
BB31
BC33
BA33

AW33

BB33
BD33

R13
R11

1 2

G1

CLKOUT_CPUNSSC_P

F1

CLKOUT_CPUNSSC

G2

CLKOUT_CPUBCLK_P

H2

CLKOUT_CPUBCLK

A5

XTAL24_OUT

A6

XTAL24_IN

E1

XCLK_BIASREF

RTCX1
RTCX2

GPP_B5/SRCCLKREQ0#
GPP_B6/SRCCLKREQ1#
GPP_B7/SRCCLKREQ2#
GPP_B8/SRCCLKREQ3#
GPP_B9/SRCCLKREQ4#
GPP_B10/SRCCLKREQ5#
GPP_H0/SRCCLKREQ6#
GPP_H1/SRCCLKREQ7#
GPP_H2/SRCCLKREQ8#
GPP_H3/SRCCLKREQ9#
GPP_H4/SRCCLKREQ10#
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
GPP_H7/SRCCLKREQ13#
GPP_H8/SRCCLKREQ14#
GPP_H9/SRCCLKREQ15#

CLKOUT_PCIE_N15
CLKOUT_PCIE_P15

P1

CLKOUT_PCIE_N14

R2

CLKOUT_PCIE_P14

W7

CLKOUT_PCIE_N13

Y5

CLKOUT_PCIE_P13

U2

CLKOUT_PCIE_N12

U3

CLKOUT_PCIE_P12

SPT_PCH_DT /SKT

U41J

BD2

VSS_BD2

BD45

VSS_BD45

BD44

VSS_BD44

BE44

VSS_BE44

D45

VSS_D45

A42

VSS_A42

B45

VSS_B45

B44

VSS_B44

A4

VSS_A4

A3

VSS_A3

B2

VSS_B2

A2

VSS_A2

B1

VSS_B1

BB1

VSS_BB1

BC1

VSS_BC1

A44

VSS_A44

C1

RSVD_C1

D1

RSVD_D1

SPT_PCH_DT /SKT

CLK_24MHZ_P(5)
CLK_24MHZ_N(5)

CLK_DMI_100M_P(5)

D D

C C

B B

A A

CLK_DMI_100M_N(5)

+1V_S5_VCCF24

LAN_PCIE_CLKREQ#(28)
WLAN_PCIE_CLKREQ#(34)
CR_PCIE_CLKREQ#(29)

GPU_PCIE_CLKREQ#(16)

SSD_PCIE_CLKREQ#(35)

EC-DB2-E20

R330 2.7K/F_4

EC-DB2-E07

WLAN_PCIE_CLKREQ#

5

XTAL_24M_PCH_O UT
XTAL_24M_PCH_IN

PCH_XCLK_BAISREF

XTAL_PCH_RT C1
XTAL_PCH_RT C2

LAN_PCIE_CLKREQ#
WLAN_PCIE_CLKREQ#
CR_PCIE_CLKREQ#

GPU_PCIE_CLKREQ#

PCA_ID0
PCA_ID1
BOARD_ID0
BOARD_ID1

TP139
TP140

PCH_C1
PCH_D1

D46 TVL040201SP0

SPT-H_PCH

REV = 1.3

SPT-H_PCH

10 OF 12

REV = 1.3

CLKOUT_CPUPCIBCLK

CLKOUT_CPUPCIBCLK_P

7 OF 12

?

RSVD_AR22

RSVD_W13

RSVD_U13

RSVD_P31

RSVD_N31

RSVD_P27
RSVD_R27
RSVD_N29

RSVD_P29

RSVD_AN29

RSVD_R24

RSVD_P24

CPU_TRST#

PCH_TRIGOUT

PCH_TRIGIN

4

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

CLKOUT_PCIE_N6
CLKOUT_PCIE_P6

CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
CLKOUT_PCIE_P8

CLKOUT_PCIE_N9
CLKOUT_PCIE_P9

CLKOUT_PCIE_N10

CLKOUT_PCIE_P10

CLKOUT_PCIE_N11

CLKOUT_PCIE_P11

AR22
W13
U13
P31
N31

P27
R27
N29
P29
AN29
R24
P24

AT3

PREQ#

AT4

PRDY#

AY5
AL2

PCH_TOUT

AK1

?

L1
L2

J1
J2

N7
N8

L7
L5

D3
F2

E5
G4

D5
E6

D8
D7

R8
R7

U5
U7

W10
W11

N3
N2

P3
P2

R3
R4

?

PCH_AR22
PCH_W13
PCH_U13
PCH_P31
PCH_N31

PCH_P27
PCH_R27
PCH_N29
PCH_P29
PCH_AN29
PCH_R24
PCH_P24

R791 30/1%_4

CLK_CPU_XDP_N (38)
CLK_CPU_XDP_P (38)

CLK_PCIBCLK_N (5)
CLK_PCIBCLK_P (5)

CLK_PCIE_LAN_N (28)
CLK_PCIE_LAN_P (28)

CLK_PCIE_WLAN_N(34)
CLK_PCIE_WLAN_P(34)

CLK_PCIE_CR_N
CLK_PCIE_CR_P

WLAN_OFF(34)

CLK_PCIE_VGA_N (16)
CLK_PCIE_VGA_P (16)

EC-DB2-E20

CLK_PCIE_M2_SSD_N(35)
CLK_PCIE_M2_SSD_P(35)

TP43
TP52
TP57
TP29
TP32

TP39
TP37
TP35
TP33
TP34
TP41
TP40

UART2_TXD
UART2_RXD

LPSS_GSPI1_MOSI(9)

LPSS_GSPI0_MOSI(9)

(29)
(29)

EC-DB1-E01

R732 SP_4

PCH_XDP_PREQ#_ R (38)
PCH_XDP_PRDY#_R (38)
H_TRST# (5,38)
PCH_2_CPU_T RIGGER (7)
CPU_2_PCH_TRIGGER (7)

+3V_S5

JP3

1
2
3
4

*PROTO@DIP Header 4P

3

WLAN_OFF_R

WLAN_OFF_R

UART2_TXD
UART2_RXD

R698 *UMA@10K_4
R695 10K_4

PCA ID [1:0]

00

01

10

11

LAN_PCIE_CLKREQ#
GPU_PCIE_CLKREQ#

WLAN_OFF_R

XTAL

R772 1M

C603
10P

1

AT29
AR29
AV29
BC27

BD28
BD27

AW27

AR24

AV44
BA41
AU44
AV43

AU41
AT44
AT43
AU43

AN43
AN44
AR39
AR45

AR41
AR44
AR38
AT42

AM44

AJ44

PCA_ID0
PCA_ID1

R746 10K/J_4
R739 10K/J_4

R728 10K/J_4

Ra

0603

Y5

3

1

3

C610
10P

4

224

XTAL 24MHz 30pp m

BG624000044

U41K

GPP_B22/GSPI1_MOSI
GPP_B21/GSPI1_MISO
GPP_B20/GSPI1_CLK
GPP_B19/GSPI1_CS#

GPP_B18/GSPI0_MOSI
GPP_B17/GSPI0_MISO
GPP_B16/GSPI0_CLK
GPP_B15/GSPI0_CS#

GPP_C9/UART0_TXD
GPP_C8/UART0_RXD
GPP_C11/UART0_CTS#
GPP_C10/UART0_RTS#

GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C23/UART2_CTS#
GPP_C22/UART2_RTS#
GPP_C21/UART2_TXD
GPP_C20/UART2_RXD

GPP_C19/I2C1_SCL
GPP_C18/I2C1_SDA
GPP_C17/I2C0_SCL
GPP_C16/I2C0_SDA

GPP_D4/ISH_I2C2_SDA
GPP_D23/ISH_I2C2_SCL

SPT_PCH_DT /SKT

R690 DIS@10K_4 R704 *10K_4
R696 *10K_4

REV = 1.3

PCA Name

SPT-H_PCH

+3V +3V

R689 10K_4

Board Rev[1:0]

Saipan-U

Saipan-G

+3V

+3V

XTAL_24M_PCH_IN

XTAL_24M_PCH_O UT

1%

32.768KHZ/12.5PF_20PPM

HP Restricted Secret

Title

Title

Title

PCH_CLOCK/I2C

PCH_CLOCK/I2C

PCH_CLOCK/I2C

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

2

Page Modified: Sheet of

+3V_S5(5,9,10,11,13,23,25,28,30,32,34,37,38,39,41,42,43,45,46,47,54,55)
+3V(9,10,11,13,14,15,16,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)

?

GPP_D9
GPP_D10
GPP_D11
GPP_D12

GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#

GPP_D14/ISH_UART0_TXD

GPP_D13/ISH_UART0_RXD

GPP_H20/ISH_I2C0_SCL

GPP_H19/ISH_I2C0_SDA

GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA

GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7

11 OF 12

BOARD_ID0
BOARD_ID1

R702 10K_4

R686 *10K_4

Consumer AIO

00

01

10

11

00

01

10

All DB

All SI

PV1

PV2

MVB

1st Major ECN

2nd Major ECN

3rd Major ECN11

15P/50V_4

15P/50V_4

C609

21

Y4

10M_6

C601

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

XTAL_PCH_RT C1

R771

XTAL_PCH_RT C2

1

12

AL44
AL36
AL35
AJ39

AJ43
AL43
AK44
AK45

BC38
BB38

BD38
BE39

BC22
BD18
BE21
BD22
BD21
BB22
BC19

?

12 61Thursday, December 17, 2015

12 61Thursday, December 17, 2015

12 61Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

+1V_S5

VCCPRIM_1p0 : 7.11A

D D

VCCCLK1 : 0.035A
VCCCLK2 : 0.204A
VCCCLK3 : 0.057A
VCCCLK4 : 0.036A
VCCCLK5 : 0.007A

VCCMPHY_1p0 : 6.01A

VCCAMPHYPLL_1p0 : 0.08A
VCCPCIE3PLL_1p0 : 0.036A

VCCAPLLEBB_1p0 : 0.03A

C C

VCCUSB2PLL_1p0: 0.012A
VCCHDAPLL_1p0 : 0.033A

VCCHDA : 0.075A
VCCDSW_3p3 : 0.92A

+1V_S5_VCCAPLL

+3V_PCH_VCCDSW

Group D 3.3V

+1.8V_S5 +VCCPGPPD

R665 *0_6

+3V_S5

EC-DB-E01 EC-DB-E01

R666 SP_6

+3V_S5 +DVDDIO_AUDIO

EC-DB-E01

R306 SP_6

+1.8V_S5

B B

A A

R305 *0_6

+3V_RTC +3V_VCCPRTC

EC-DB-E01

R278 SP_6

+1V_S5 +1V_S5_VCCF24

EC-DB-E01

+1V_S5 +1V_S5_VCCAMPHYPLL

R691 0_6

+1V_S5_VCCAPLL+1V_S5

R335 0_6

+1V_PCH_VCCDSW

+1V_S5

+1V_S5_VCCF24

+1V_S5

+1V_S5_VCCAMPHYPLL

+1V_S5

+DVDDIO_AUDIO

Group A 3.3V

+1.8V_S5 +VCCPGPPA

R220 *0_6

+3V_S5

R196 SP_6

C188 0.1u/16V/X7R_4

Near ball BA15

C156 1U/6.3V/X5R_4
C157 0.1u/16V/X7R_4

Place <5MM from PCH BA22
Place <3mm --> 0.1UF

C196 *22U/6.3V/X5R_6
C195 *22U/6.3V/X5R_6
C194 *1U/6.3V/X5R_4

Place <5MM from PCH K2

C581 *22U/6.3V/X5R_6
C576 *22U/6.3V/X5R_6
C575 *1U/6.3V/X5R_4

Place <5MM from PCH A42

C193 *22U/6.3V/X5R_6
C198 *22U/6.3V/X5R_6

U41H

AA23

VCCPRIM_1P0_AA23

AA26

VCCPRIM_1P0_AA26

AA28

VCCPRIM_1P0_AA28

AC23

VCCPRIM_1P0_AC23

AC26

VCCPRIM_1P0_AC26

AC28

VCCPRIM_1P0_AC28

AE23

VCCPRIM_1P0_AE23

AE26

VCCPRIM_1P0_AE26

Y23

VCCPRIM_1P0_Y23

Y25

VCCPRIM_1P0_Y25

BA29

DCPDSW_1P0

N17

VCCCLK1

R19

VCCCLK3

U20

VCCCLK4

V17

VCCCLK2

R17

VCCCLK6

K2

VCCCLK5_K2

K3

VCCCLK5_K3

U21

VCCMPHY_1P0_U21

U23

VCCMPHY_1P0_U23

U25

VCCMPHY_1P0_U25

U26

VCCMPHY_1P0_U26

V26

VCCMPHY_1P0_V26

A43

VCCMPHYPLL_1P0_A43

B43

VCCMPHYPLL_1P0_B43

C44

VCCPCIE3PLL_1P0_C 44

C45

VCCPCIE3PLL_1P0_C 45

V28

VCCAPLLEBB_1P0

AC17

VCCPRIM_1P0_AC17

AJ5

VCCUSB2PLL_1P0_ AJ5

AL5

VCCUSB2PLL_1P0_ AL5

AN19

VCCHDAPLL_1P0

BA15

VCCHDA

W15

VCCDSW_3P3 _W15

SPT_PCH_DT /SKT

+3V_PCH_VCCDSW

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

Near to AJ5, AL5 and AN19.

5

4

?

SPT-H_PCH

CORE

MPHY

USB

C197 *1U/6.3V/X5R_4

Place <3MM from PCH W15

C189 1U/6.3V/X5R_4

Place <5MM from PCH AD13

C133 1U/6.3V/X5R_4
C182 0.1u/16V/X7R_4

Place <5mm from PCH BA20
Place <3mm --> 0.1UF

C117 *0.1u/16V/X7R_4

Place <3mm from PCH BC42

C121 *0.1u/16V/X7R_4

Place <3mm from PCH AJ41

C132 *0.1u/16V/X7R_4

Place <3mm from PCH AN5

C130 *0.1u/16V/X7R_4

Place <3mm from PCH AD41

4

8 OF 12REV = 1.3

VCCGPIO

(A)

(B,H)
(B,H)
(E,F)
(E,F)
(G)

(D)
(D)
(D)
(D)

VCCPRIM_1P0_AL22

VCCDSW_3P3 _BA24

VCCPGPPBH_BC42
VCCPGPPBH_BD40

VCCPRIM_3P3_AN5

VCCPRIM_1P0_AD15

VCCPRIM_1P0_AJ20
VCCPRIM_1P0_AJ21
VCCPRIM_1P0_AJ23
VCCPRIM_1P0_AJ25

VCCPGPPCD_BC44
VCCPGPPCD_BA45
VCCPGPPCD_BC45
VCCPGPPCD_BB45

VCCPRIM_3P3_BD3
VCCPRIM_3P3_BE3
VCCPRIM_3P3_BE4

VCCPGPPA

VCCPGPPEF_AJ41
VCCPGPPEF_AL41

VCCPGPPG

VCCATS

VCCRTCPRIM_3P3

VCCRTC
DCPRTC

VCCSPI_BE41
VCCSPI_BE43
VCCSPI_BE42

?

3

+1V_S5_AL22

EC-DB-E01

AL22

R231 SP_6

BA24
BA31

+VCCPGPPA

+3V_S5

BC42
BD40
AJ41
AL41
AD41

+1V_S5 +3V +3V_S5

AN5

AD15
AD13

0.007A

BA20

< 0.001A

BA22

0.001A

BA26

VCC_RTCEXT _CAP

Place <5mm from PCH BA26

+1V_S5

AJ20
AJ21
AJ23
AJ25

+3V_S5_VCCSPI

BE41
BE43
BE42

BC44
BA45
BC45
BB45

+3V_S5_VCCPFUSE
BD3
BE3
BE4

+1V_S5

C140 22U/6.3V/X5R_6
C169 1U/6.3V/X5R_4

Place <3MM from PCH U21

+1V_PCH_VCCDSW

Place <5MM from PCH BA29

+3V_S5

+3V_S5

+3V_DSW

C138 1U/6.3V/X5R_4

C183 *0.1u/16V/X7R_4

Place <3mm from PCH BC42 & BD40

R333 0/5%_4

R334 *0/5%_4R324 SP_6

+1V_S5

VCCPGPPA : 0.082A

VCCPGPPBCH: 0.229A
VCCPGPPEF : 0.114A
VCCPGPPG : 0.065A

C139 0.1u/16V/X7R_4

0.029A

R667 SP_6

EC-DB-E01

R781 SP_6

EC-DB-E01

+VCCPGPPD

0.078A

0.171A

+3V_PCH_VCCDSW

3

+3V_PCH_VCCDSW

+3V_S5

+3V_S5

+VCCPGPPA

+3V_VCCPRTC

AC18

AN4

AN10

BE14
BE18
BE23
BE28
BE32
BE37
BE40

BE9
C10

C2
C28
C37

J7
K10
K27
K33
K36

K4
K42
K43
L12
L13
L15

L4

L41

L8
M35
M42
N10
N15
N19
N22
N24
N35
N36

N4

N41

N5
P17
P19
P22
P45

R10
R14
R22
R29
R33
R38

R5

T1

T2

T4
Y18
Y20
Y21
Y26
Y28
Y29
A18
A25
A32
A37

AA17
AA18
AA20
AA21
AA25
AA29

AA4
AA42
AB10

SPT_PCH_DT /SKT

U41I

SPT-H_PCH

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 12

2

?

AR5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

REV = 1.3

2

AR7
U15
AL4
AE29
AE4
AE42
AF18
AF20
AF21
AF23
AF25
AF26
AF28
AF29
AG11
AG13
AG31
AG32
AG33
AG38
AG4
AH1
AH17
AH18
AH20
AH21
AH23
AH25
AH26
AH28
AH29
AH45
AJ10
AJ14
AJ15
AJ17
AJ18
AJ26
AJ28
AJ29
AJ31
AJ32
AJ36
AK4
AK42
AU7
AV17
AV24
AV27
AV31
AV33
AV6
AW13
AW19
AW29
AW37
AW9
AY38
AY45
B25
B3
B37
B40
B6
BA1
BB11
BB16
BB21
BB25
BB30
BB34
BC2
BD43

?

HP Restricted Secret

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

C42

VSS

D10

VSS

D12

VSS

D15

VSS

D16

VSS

D17

VSS

D19

VSS

D21

VSS

D24

VSS

D25

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

D33

VSS

D35

VSS

D36

VSS

E13

VSS

E15

VSS

E31

VSS

E33

VSS

F44

VSS

F8

VSS

G42

VSS

G9

VSS

H17

VSS

H19

VSS

H22

VSS

H24

VSS

H27

VSS

H29

VSS

H3

VSS

H35

VSS

J10

VSS

J11

VSS

J3

VSS

J39

VSS

J5

VSS

T42

VSS

U10

VSS

U11

VSS

U14

VSS

U17

VSS

U18

VSS

U28

VSS

U29

VSS

U31

VSS

U32

VSS

U33

VSS

U38

VSS

U4

VSS

U8

VSS

V18

VSS

V20

VSS

V21

VSS

V23

VSS

V25

VSS

V29

VSS

V3

VSS

V45

VSS

W14

VSS

W31

VSS

W32

VSS

W33

VSS

W38

VSS

W4

VSS

W8

VSS

Y17

VSS

SPT_PCH_DT /SKT

PCH_POWER/GND

PCH_POWER/GND

PCH_POWER/GND

--

--

--

?

SPT-H_PCH

U41L

12 OF 12

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

1

AB11

VSS

AB7

VSS

AB14

VSS

AB31

VSS

AB32

VSS

AB38

VSS

AB4

VSS

AB5

VSS

AC1

VSS

AC20

VSS

AC21

VSS

AC25

VSS

AC29

VSS

AC45

VSS

AB8

VSS

AD11

VSS

AD14

VSS

AB15

VSS

AD32

VSS

AD33

VSS

AD36

VSS

AD4

VSS

AD8

VSS

AE18

VSS

AE20

VSS

AE21

VSS

AE25

VSS

AE28

VSS

AL10

VSS

AL11

VSS

AL13

VSS

AL17

VSS

AL19

VSS

AL24

VSS

AL29

VSS

AL32

VSS

AL33

VSS

AL38

VSS

AM15

VSS

AM17

VSS

AM19

VSS

AM22

VSS

AM24

VSS

AM27

VSS

AM29

VSS

AM45

VSS

AN11

VSS

AN22

VSS

AN27

VSS

AN31

VSS

AN39

VSS

AN7

VSS

AN8

VSS

AP11

VSS

AP4

VSS

AR33

VSS

AR34

VSS

AR42

VSS

AR9

VSS

AT10

VSS

AT15

VSS

AT36

VSS

AT9

VSS

AU1

VSS

AU35

VSS

AU36

VSS

AU39

VSS

AU45

VSS

C4

VSS

REV = 1.3

?

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

13

A

A

A

13 61Thursday, December 17, 2015

13 61Thursday, December 17, 2015

13 61Thursday, December 17, 2015

5

www.laptoprepairsecrets.com

JDIM1A

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10

TP76
TP82

M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

M_A_EVENT#

CHA_SA0
CHA_SA1
CHA_SA2

M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7

+VDDQ

M_A_EVENT#

D D

M_A_ACT#(3)
M_A_PARITY(3)
M_A_ALERT#(3)

DDR4_DRAMRST#(9,15)

EC-DB1-E05

+VDDQ

C C

SMBCLK_PCH_MAIN(9,15,38)
SMBDATA_PCH_MAIN(9,15,38)

+VDDQ

B B

C328 *0.1U/16V_4

PLACE THE CAP WITHIN 200 MILS FROMTHE DIMM

R493 240_4

M_A_BA#0(3)
M_A_BA#1(3)
M_A_BG#0(3)
M_A_BG#1(3)

M_A_CS#0(3)
M_A_CS#1(3)
M_A_CKE0(3)
M_A_CKE1(3)

M_A_CLKP0(3)
M_A_CLKN0(3)
M_A_CLKP1(3)
M_A_CLKN1(3)

M_A_ODT0(3)
M_A_ODT1(3)

R461 240_4
R459 240_4
R469 240_4
R471 240_4
R456 240_4
R458 240_4
R472 240_4
R477 240_4

DIMMA_CA_VREF

+VDDQ

R551
1K_4

DIMM_CA_VREF_A

A A

R534
1K_4

5

DIMM_CA_VREF_A

C285

0.1u/16V/X7R_4

R558 2.0/1%_4

C404
*0.1u/16V/X7R_4

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/W E#

156

A15/CAS#

152

A16/RAS#

162

M_A_S2
M_A_S3

Place tge cap close to Dimm

C9

0.022u/16V/X7R_4

DIMM_CA_CPU_VREF_A_RC

R15

24.9/1%_4

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DM8

DDR4-DIMM2_H=8_STD

C425 *2.2U/10V/X5R_4
C431 0.1u/16V/X7R_4

DIMM_CA_CPU_VREF_A (3)

4

DDR4 SODIMM 260 PIN

CAD NOTE:
NEAR TO DIMM

4

(260P)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

swap pin for layout

8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246

13
34
55
76
179
200
221
242
97

DDR_M_A_DQSP8

11
32
53
74
177
198
219
240
95

DDR_M_A_DQSN8

M_A_DQ1
M_A_DQ5
M_A_DQ3
M_A_DQ6
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ7
M_A_DQ13
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ10
M_A_DQ16
M_A_DQ21
M_A_DQ23
M_A_DQ22
M_A_DQ17
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ25
M_A_DQ24
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ31
M_A_DQ30
M_A_DQ37
M_A_DQ33
M_A_DQ38
M_A_DQ34
M_A_DQ36
M_A_DQ32
M_A_DQ35
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ47
M_A_DQ42
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ43
M_A_DQ52
M_A_DQ50
M_A_DQ53
M_A_DQ55
M_A_DQ48
M_A_DQ54
M_A_DQ51
M_A_DQ49
M_A_DQ63
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ56
M_A_DQ58
M_A_DQ57
M_A_DQ62

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP[7:0] (3)

TP9

M_A_DQSN[7:0] (3)

TP10

M_A_DQ[63:0] (3)M_A_A[16:0](3)

Place these Caps near CHA So-Dimm0.

C368 10U/6.3V/X5R_6
C402 10U/6.3V/X5R_6
C346 10U/6.3V/X5R_6
C321 10U/6.3V/X5R_6
C385 10U/6.3V/X5R_6
C317 10U/6.3V/X5R_6
C388 10U/6.3V/X5R_6
C354 10U/6.3V/X5R_6
C357 10U/6.3V/X5R_6

C399 1U/6.3V/X5R_4
C533 1U/6.3V/X5R_4
C446 1U/6.3V/X5R_4
C358 1U/6.3V/X5R_4

C508 0.1u/16V/X7R_4
C307 0.1u/16V/X7R_4
C292 0.1u/16V/X7R_4
C294 0.1u/16V/X7R_4
C460 0.1u/16V/X7R_4

On "Bottom side"

+SMDDR_VTERM+VDDQ

+2.5V_S3

+3V

3

2250mA

+VDDQ

C564 10U/6.3V/X5R_6

C565 10U/6.3V/X5R_6

C550 1U/6.3V/X5R_4
C544 1U/6.3V/X5R_4
C553 1U/6.3V/X5R_4
C554 1U/6.3V/X5R_4

C547 10U/6.3V/X5R_6
C120 10U/6.3V/X5R_6
C549 1U/6.3V/X5R_4
C548 1U/6.3V/X5R_4

C538 2.2U/10V/X5R_4
C539 0.1u/16V/X7R_4

Close to pin255

3

JDIM1B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

DDR4-DIMM2_H=8_STD

2

+VDDQ(7,9,15,41,46,47,55)
+SMDDR_VTERM(15,41,47)
+3V(9,10,11,12,13,15,16,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)

1

14

255

VDDSPD

VPP1
VPP2

VTT

VREF_CA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

VSS69

DDR4 SODIMM 260 PIN

VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND
GND

2

+3V

257
259

258

164

DIMM_CA_VREF_A

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

+2.5V_S3

+SMDDR_VTERM

M_A_CLKP1

+3V

R528
*0/5%_4

R537
0/5%_4

SPD SA0

SPD SA1

R486 *100KR_4

R500 *100KR_4

R629
*0/5%_4

R634
0/5%_4

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

DDR4 CHA DIMM 0

DDR4 CHA DIMM 0

DDR4 CHA DIMM 0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

R630
*0/5%_4

CHA_SA0
CHA_SA1
CHA_SA2

R631
0/5%_4

Design Note:

0

SPD Address for CH0
Write Address: 0xA0
Read Address: 0xA1
SA0=0 ; SA1=0

0

1

M_A_CLKN0M_A_CLKP0

M_A_CLKN1

14 61Thursday, December 17, 2015

14 61Thursday, December 17, 2015

14 61Thursday, December 17, 2015

A

A

A

5

www.laptoprepairsecrets.com

M_B_A[16:0](3)

D D

M_B_ACT#(3)
M_B_PARITY(3)
M_B_ALERT#(3)

DDR4_DRAMRST#(9,14)

EC-DB1-E05

+VDDQ

C C

SMBCLK_PCH_MAIN(9,14,38)
SMBDATA_PCH_MAIN(9,14,38)

+VDDQ

B B

C330 *0.1U/16V_4

PLACE THE CAP WITHIN 200 MILS FROMTHE DIMM

R490 240_4

M_B_BA#0(3)
M_B_BA#1(3)
M_B_BG#0(3)
M_B_BG#1(3)

M_B_CS#0(3)
M_B_CS#1(3)
M_B_CKE0(3)
M_B_CKE1(3)

M_B_CLKP0(3)
M_B_CLKN0(3)
M_B_CLKP1(3)
M_B_CLKN1(3)

M_B_ODT0(3)
M_B_ODT1(3)

R457 240_4
R465 240_4
R468 240_4
R476 240_4
R470 240_4
R453 240_4
R475 240_4
R473 240_4

TP78
TP77

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_EVENT#

CHB_SA0
CHB_SA1
CHB_SA2

M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7

+VDDQ

M_B_EVENT#

M_B_S2
M_B_S3

144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152

162
165

114
143
116
134
108

150
145
115
113

149
157
109
110

137
139
138
140

155
161

253
254

256
260
166

92

91
101
105

88

87
100
104

12

33

54

75
178
199
220
241

96

DIMMA_CA_VREF

+VDDQ

1K_4

DIMM_CA_VREF_B

A A

R535
1K_4

5

DIMM_CA_VREF_B

C528

0.1u/16V/X7R_4R531

R536 2.0/1%_4

C401
*0.1u/16V/X7R_4

C398 *2.2U/10V/X5R_4
C400 0.1u/16V/X7R_4

Place tge cap close to Dimm

C428

0.022u/16V/X7R_4

DIMM_DQ_CPU_VREF_B_RC

R548

24.9/1%_4

4

JDIM2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/W E#
A15/CAS#
A16/RAS#

S2#/C0
S3#/C1

ACT#
PARITY
ALERT#
EVENT#
RESET#

BA0
BA1
BG0
BG1

S0#
S1#
CKE0
CKE1

CK0
CK0#
CK1
CK1#

ODT0
ODT1

SCL
SDA

SA0
SA1
SA2

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DDR4-DIMM1_H=4_STD

DIMM_DQ_CPU_VREF_B (3)

(260P)

DDR4 SODIMM 260 PIN

CAD NOTE:
NEAR TO DIMM

4

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

8

M_B_DQ1

7

M_B_DQ4

20

M_B_DQ6

21

M_B_DQ3

4

M_B_DQ0

3

M_B_DQ5

16

M_B_DQ7

17

M_B_DQ2

28

M_B_DQ12

29

M_B_DQ8

41

M_B_DQ15

42

M_B_DQ10

24

M_B_DQ9

25

M_B_DQ13

38

M_B_DQ11

37

M_B_DQ14

50

M_B_DQ17

49

M_B_DQ21

62

M_B_DQ18

63

M_B_DQ19

46

M_B_DQ16

45

M_B_DQ20

58

M_B_DQ22

59

M_B_DQ23

70

M_B_DQ24

71

M_B_DQ29

83

M_B_DQ27

84

M_B_DQ26

66

M_B_DQ28

67

M_B_DQ25

79

M_B_DQ30

80

M_B_DQ31

174

M_B_DQ37

173

M_B_DQ32

187

M_B_DQ34

186

M_B_DQ39

170

M_B_DQ33

169

M_B_DQ36

183

M_B_DQ38

182

M_B_DQ35

195

M_B_DQ41

194

M_B_DQ45

207

M_B_DQ42

208

M_B_DQ47

191

M_B_DQ44

190

M_B_DQ40

203

M_B_DQ46

204

M_B_DQ43

216

M_B_DQ48

215

M_B_DQ52

228

M_B_DQ51

229

M_B_DQ55

211

M_B_DQ53

212

M_B_DQ49

224

M_B_DQ54

225

M_B_DQ50

237

M_B_DQ61

236

M_B_DQ57

249

M_B_DQ58

250

M_B_DQ59

232

M_B_DQ60

233

M_B_DQ56

245

M_B_DQ62

246

M_B_DQ63

13

M_B_DQSP0

34

M_B_DQSP1

55

M_B_DQSP2

76

M_B_DQSP3

179

M_B_DQSP4

200

M_B_DQSP5

221

M_B_DQSP6

242

M_B_DQSP7

97

DDR_M_B_DQSP8

11

M_B_DQSN0

32

M_B_DQSN1

53

M_B_DQSN2

74

M_B_DQSN3

177

M_B_DQSN4

198

M_B_DQSN5

219

M_B_DQSN6

240

M_B_DQSN7

95

DDR_M_B_DQSN8

On "Bottom side"

3

swap pin for layout

M_B_DQ[63:0] (3)

2250mA

+VDDQ

M_B_DQSP[7:0] (3)

TP69

M_B_DQSN[7:0] (3)

TP70

Place these Caps near CHB So-Dimm0.

+SMDDR_VTERM+VDDQ

C373 10U/6.3V/X5R_6
C392 10U/6.3V/X5R_6
C356 10U/6.3V/X5R_6
C387 10U/6.3V/X5R_6
C355 10U/6.3V/X5R_6
C481 10U/6.3V/X5R_6
C403 10U/6.3V/X5R_6
C291 10U/6.3V/X5R_6
C377 10U/6.3V/X5R_6

C308 1U/6.3V/X5R_4
C501 1U/6.3V/X5R_4
C366 1U/6.3V/X5R_4
C290 1U/6.3V/X5R_4

C349 0.1u/16V/X7R_4
C476 0.1u/16V/X7R_4
C440 0.1u/16V/X7R_4
C286 0.1u/16V/X7R_4
C296 0.1u/16V/X7R_4

C558 10U/6.3V/X5R_6

C557 10U/6.3V/X5R_6

C562 1U/6.3V/X5R_4
C560 1U/6.3V/X5R_4
C559 1U/6.3V/X5R_4
C561 1U/6.3V/X5R_4

+2.5V_S3

C563 10U/6.3V/X5R_6
C570 10U/6.3V/X5R_6
C552 1U/6.3V/X5R_4
C119 1U/6.3V/X5R_4

+3V

C542 2.2U/10V/X5R_4
C543 0.1u/16V/X7R_4

Close to pin255

3

JDIM2B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

DDR4-DIMM1_H=4_STD

2

+VDDQ(7,9,14,41,46,47,55)
+SMDDR_VTERM(14,41,47)
+3V(9,10,11,12,13,14,16,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)

255

VDDSPD

257

VPP1

259

VPP2

258

VTT

164

VREF_CA

2

VSS48

6

VSS49

10

VSS50

14

VSS51

18

VSS52

22

VSS53

26

VSS54

30

VSS55

36

VSS56

40

VSS57

44

VSS58

48

VSS59

52

VSS60

56

VSS61

60

VSS62

64

VSS63

68

VSS64

72

VSS65

78

VSS66

82

VSS67

86

VSS68

90

(260P)

VSS69

DDR4 SODIMM 260 PIN

VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND
GND

94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

+3V

+SMDDR_VTERM

DIMM_CA_VREF_B

+2.5V_S3

M_B_CLKP1

+3V

R529
*0/5%_4

R538
*0/5%_4

SPD SA0

SPD SA1

R637
0/5%_4

R636
*0/5%_4

1

R497 *100KR_4

R504 *100KR_4

R626
*0/5%_4

CHB_SA0
CHB_SA1
CHB_SA2

R628
0/5%_4

0

1

15

M_B_CLKN0M_B_CLKP0

M_B_CLKN1

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

DDR4 CHB DIMM 1

DDR4 CHB DIMM 1

DDR4 CHB DIMM 1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

2

Page Modified: Sheet of

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

1

A

A

A

15 61Thursday, December 17, 2015

15 61Thursday, December 17, 2015

15 61Thursday, December 17, 2015

1

www.laptoprepairsecrets.com

PEX_IOVDD + PEX_IOVDDQ = 1.042A

Near GPU

C393 DIS@22u/6.3V/X5R_6
C375 *DIS@22u/6.3V/X5R_6
C376 DIS@10u/6.3V/X5R_6
C433 *DIS@10u/6.3V/X5R_6
C474 DIS@4.7u/6.3V/X5R_4

Under GPU

C408 DIS@1u/6.3V/X5R_4

A A

B B

C C

+1.05V_VGA

R543 DIS@0/5%_6

Near GPU

C441 DIS@4.7u/6.3V/X5R_6
C447 DIS@1u/6.3V/X5R_4

Under GPU

C456 DIS@0.1u/16V/X7R_4

D D

C462 *DIS@1u/6.3V/X5R_4

Near GPU

C396 DIS@22u/6.3V/X5R_6
C374 *DIS@22u/6.3V/X5R_6
C395 DIS@10u/6.3V/X5R_6
C386 *DIS@10u/6.3V/X5R_6
C432 DIS@4.7u/6.3V/X5R_6

Under GPU

C438 DIS@1u/6.3V/X5R_4
C427 *DIS@1u/6.3V/X5R_4

PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA

Place all above caps on
top side of CPU cavity

Near GPU

C519 DIS@4.7u/6.3V/X5R_6
C510 DIS@4.7u/6.3V/X5R_6
C493 DIS@0.1u/16V/X7R_4

VGA_VDD_SEN(53)

VGA_GND_SEN(53)

PEX_PLLVDD = 130mA

R527 *DIS@200/1%_4

R579 DIS@10k/5%_4

R49 DIS@2.49k/1%_4

1

PEX_TSTCLK
PEX_TSTCLK#

CX300T30001 Change to 0ohm

PEX_PLLVDD

TESTMODE

PEX_TERMP

+1.05V_VGA

+1.05V_VGA

+3.3V_VGA

2

AA22
AB23
AC24
AD25
AE26
AE27

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25

AF26
AF27

AF22

AE22

AA14
AA15

AF25

2

AA8
AA9

AB8

AD9

F2

F1

U7A

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD
PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

PEX_PLLVDD
PEX_PLLVDD

TESTMODE

PEX_TERMP

3

1/14 PCI_EXPRESS

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

3

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK

PEX_REFCLK

PEX_TX0
PEX_TX0

PEX_RX0
PEX_RX0

PEX_TX1
PEX_TX1

PEX_RX1
PEX_RX1

PEX_TX2
PEX_TX2

PEX_RX2
PEX_RX2

PEX_TX3
PEX_TX3

PEX_RX3
PEX_RX3

PEX_TX4
PEX_TX4

PEX_RX4
PEX_RX4

PEX_TX5
PEX_TX5

PEX_RX5
PEX_RX5

PEX_TX6
PEX_TX6

PEX_RX6
PEX_RX6

PEX_TX7
PEX_TX7

PEX_RX7
PEX_RX7

PEX_TX8
PEX_TX8

PEX_RX8
PEX_RX8

PEX_TX9
PEX_TX9

PEX_RX9
PEX_RX9

PEX_TX10
PEX_TX10

PEX_RX10
PEX_RX10

PEX_TX11
PEX_TX11

PEX_RX11
PEX_RX11

PEX_TX12
PEX_TX12

PEX_RX12
PEX_RX12

PEX_TX13
PEX_TX13

PEX_RX13
PEX_RX13

PEX_TX14
PEX_TX14

PEX_RX14
PEX_RX14

PEX_TX15
PEX_TX15

PEX_RX15
PEX_RX15

GF119GF117

COMMONbga595-nvidia-n13p-gv2-s-a2

AB6

AC7

AC6

AE8
AD8

AC9
AB9

AG6
AG7

AB10
AC10

AF7
AE7

AD11
AC11

AE9
AF9

AC12
AB12

AG9
AG10

AB13
AC13

AF10
AE10

AD14
AC14

AE12
AF12

AC15
AB15

AG12
AG13

AB16
AC16

AF13
AE13

AD17
AC17

AE15
AF15

AC18
AB18

AG15
AG16

AB19
AC19

AF16
AE16

AD20
AC20

AE18
AF18

AC21
AB21

AG18
AG19

AD23
AE23

AF19
AE19

AF24
AE24

AE21
AF21

AG24
AG25

AG21
AG22

VGA_RST#

PEG_CLKREQ#

PEG_REFCLK
PEG_REFCLK#

C_PEG_RXP0
C_PEG_RXN0

C_PEG_TXP0
C_PEG_TXN0

C_PEG_RXP1
C_PEG_RXN1

C_PEG_TXP1
C_PEG_TXN1

C_PEG_RXP2
C_PEG_RXN2

C_PEG_TXP2
C_PEG_TXN2

C_PEG_RXP3
C_PEG_RXN3

C_PEG_TXP3
C_PEG_TXN3

EC-DB-E03

PEG_RST#

PEG_RST#

4

C513 *DIS@0.1u/16V/X7R_4

R611 DIS@0/5%_4

R590 DIS@10k/5%_4

R589 DIS@0/5%_4
R587 DIS@0/5%_4

C541 DIS@0.22u/10V/X5R_4
C536 DIS@0.22u/10V/X5R_4

C89 DIS@0.22u/10V/X5R_4
C88 DIS@0.22u/10V/X5R_4

C531 DIS@0.22u/10V/X5R_4
C534 DIS@0.22u/10V/X5R_4

C87 DIS@0.22u/10V/X5R_4
C85 DIS@0.22u/10V/X5R_4

C525 DIS@0.22u/10V/X5R_4
C529 DIS@0.22u/10V/X5R_4

C84 DIS@0.22u/10V/X5R_4
C83 DIS@0.22u/10V/X5R_4

C516 DIS@0.22u/10V/X5R_4
C522 DIS@0.22u/10V/X5R_4

C82 DIS@0.22u/10V/X5R_4
C81 DIS@0.22u/10V/X5R_4

PLTRST_N_BUF(10,24,34,35)

DGPU_PLTRST_N(11)

SYS_PEX_RST_MON#

DGPU_PWROK(11,18)

+3.3V_VGA +3V

PEG_CLKREQ#

4

5

PEGX_RST# (19)

+3.3V_VGA

CLK_PCIE_VGA_P (12)
CLK_PCIE_VGA_N (12)

PEG_RXP0 (4)
PEG_RXN0 (4)

PEG_TXP0 (4)
PEG_TXN0 (4)

PEG_RXP1 (4)
PEG_RXN1 (4)

PEG_TXP1 (4)
PEG_TXN1 (4)

PEG_RXP2 (4)
PEG_RXN2 (4)

PEG_TXP2 (4)
PEG_TXN2 (4)

PEG_RXP3 (4)
PEG_RXN3 (4)

PEG_TXP3 (4)
PEG_TXN3 (4)

C535 DIS@0.1u/16V/X5R_4

R618 SP_4

EC-DB1-E01

R604 *DIS@100K/F_4

swap pin for layout

+3V

2

1

DGPU_PLTRST

U35

DIS@TC7SH08FU

3 5

EC-DB1-E07 EC-DB1-E07

R126
*DIS@10k/5%_4

1

2

Q6
DIS@PJA138K/50V_0.5A

5

R118
*DIS@10k/5%_4

3

6

NV SUGGEST ( for
ADP only)
No stuff: U62,
stuff:R614

4

SYS_PEX_RST

GPU_PEX_RST_HOLD#(19)

GPU_PCIE_CLKREQ# (12)

6

7

+1.05V_VGA(17,18,54)
+3.3V_VGA(18,19,20,53,54)
+3V(9,10,11,12,13,14,15,17,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54, 55)
+VGA_CORE(20,53,54)

+3V

EC-DB1-E02

R612 *DIS@0/5%_4

R614 DIS@0/5%_4

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

2

1

U36

3 5

*DIS@TC7SH08FU

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Project:

N16S-GM_PCIE_Interface

N16S-GM_PCIE_Interface

N16S-GM_PCIE_Interface

--

--

--

7

16

SYS_PEX_RST_MON# (19)

C546 DIS@0.1u/16V/X5R_4

4

PEGX_RST#

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

8

R624
DIS@100K/F_4

8

A

A

A

16 61Thursday, December 17, 2015

16 61Thursday, December 17, 2015

16 61Thursday, December 17, 2015

1

www.laptoprepairsecrets.com

R105 DIS@10K/F_4

A A

NV suggestion---9/29

Mode F is optiminzed for GDDR5 single rank designs

B B

+1.35V_VGA

C C

FB_PLLAVDD = 55mA

+1.05V_VGA

D D

L55
DIS@BLM15PX330SN1D(33,3000MA)

R525 *DIS@60.4_4
R510 *DIS@60.4_4

VMA_CLK0(21)
VMA_CLK0#(21)
VMA_CLK1(21)
VMA_CLK1#(21)

VMA_WCK01(21)
VMA_WCK01#(21)
VMA_WCK23(21)
VMA_WCK23#(21)
VMA_WCK45(21)
VMA_WCK45#(21)
VMA_WCK67(21)
VMA_WCK67#(21)

C418 DIS@22u/6.3V/X5R_6
C407 DIS@0.1u/16V/X7R_4
C410 DIS@0.1u/16V/X7R_4
C423 DIS@0.1u/16V/X7R_4

NV suggestion---9/29

FBA_CMD0(21)
FBA_CMD1(21)
FBA_CMD2(21)
FBA_CMD3(21)
FBA_CMD4(21)
FBA_CMD5(21)
FBA_CMD6(21)
FBA_CMD7(21)
FBA_CMD8(21)
FBA_CMD9(21)
FBA_CMD10(21)
FBA_CMD11(21)
FBA_CMD12(21)
FBA_CMD13(21)
FBA_CMD14(21)
FBA_CMD15(21)
FBA_CMD16(21)
FBA_CMD17(21)
FBA_CMD18(21)
FBA_CMD19(21)
FBA_CMD20(21)
FBA_CMD21(21)
FBA_CMD22(21)
FBA_CMD23(21)
FBA_CMD24(21)
FBA_CMD25(21)
FBA_CMD26(21)
FBA_CMD27(21)
FBA_CMD28(21)
FBA_CMD29(21)
FBA_CMD30(21)
FBA_CMD31(21)

2

PS_FB_CLAMP

U7_F22
U7_J22

+FB_PLLAVDD

C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22

K27
K25

F22

D24
D25
N22
M22

D18
C18
D17
D16
T24
U24
V24
V25

F16

P22

H22

J23
J25
J24

J27
J26

J22

F3

U7B

FB_CLAMP

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67

FB_PLLAVDD

FB_PLLAVDD

FB_DLLAVDD

3

GF119NC

GF117

4

2/14 FBA

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8

FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25

D19
D14
C17
C22
P24
W24
AA25
U25

E19
C15
B16
B22
R25
W23
AB26
T26

F19
C14
A16
A22
P25
W22
AB27
T27

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

5

FBVDDQ + FBVDD = 3.116A

Near BGA

C420 DIS@22u/6.3V/X5R_6
C429 DIS@10u/6.3V/X5R_6

Near balls

C295 DIS@4.7u/6.3V/X5R_4
C383 DIS@4.7u/6.3V/X5R_4
C457 DIS@1u/6.3V/X5R_4
C421 DIS@1u/6.3V/X5R_4

C422 DIS@0.1u/16V/X7R_4
C450 DIS@0.1u/16V/X7R_4

NV suggestion---9/29

VMA_DQ[63:0]

FBA_DBI[7:0] (21)

FBA_EDC[7:0] (21)

For support GC6 2.0

Remove GC6 1.0 for Nvidia suggest 11/27

GC6_FB_EN(19)

PG_+VGA_CORE(53)

6

+1.35V_VGA

VMA_DQ[63:0] (21)

R95
*DIS@0_4

U7D

12/14 FBVDDQ

B26

FBVDDQ

C25

FBVDDQ

E23

FBVDDQ

E26

FBVDDQ

F14

FBVDDQ

F21

FBVDDQ

G13

FBVDDQ

G14

FBVDDQ

G15

FBVDDQ

G16

FBVDDQ

G18

FBVDDQ

G19

FBVDDQ

G20

FBVDDQ

G21

FBVDDQ

H24

FBVDDQ

H26

FBVDDQ

J21

FBVDDQ

K21

FBVDDQ

L22

FBVDDQ

L24

FBVDDQ

L26

FBVDDQ

M21

FBVDDQ

N21

FBVDDQ

R21

FBVDDQ

T21

FBVDDQ

V21

FBVDDQ

W21

FBVDDQ

bga595-nvidia-n13p-gv2-s-a2

COMMON

GC6_EN_R

U8
*DIS@NL17SZ32DFT2G

R94 DIS@0_4

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

+3V

2

1

3 5

7

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

C92
*DIS@0.1u/16V/X7R_4

4

R91
DIS@100K/F_4

+1.05V_VGA(16,18,54)
+1.35V_VGA(21,54)
+3V(9,10,11,12,13,14,15,16,18,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)

R532 DIS@40.2/F_4

R522 DIS@40.2/F_4

R520 DIS@60.4/F_4

FBVDDQ

EN_+1.35V_VGA (54)

8

17

+1.35V_VGA

Stuff it, if not support GC6 2.0

GF119

GF117FB_PLLAVDD

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

FB_DLLAVDD = 15mA

INT

bga595-nvidia-n13p-gv2-s-a2

1

2

3

FB_VREF_PROBE

COMMON

4

D23

FB_VREF_PROBE

TP79

5

Project:

Project:

Title

Title

Title

N16S-GT (MEMORY)

N16S-GT (MEMORY)

N16S-GT (MEMORY)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

6

Page Modified: Sheet of

Project:

7

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

8

A

A

A

17 61Thurs day, Decem ber 17, 2015

17 61Thurs day, Decem ber 17, 2015

17 61Thurs day, Decem ber 17, 2015

1

www.laptoprepairsecrets.com

U7G

4/14 IFPAB

GF119

GF117

GF117GF119

GF117

GF117

NC

NC

GF117

NC

NC

NC

NC

NC

NC

NC

NC
NC

NC

GF119

AA6

IFPAB_R SET

V7

U7_V7

U7_W8

U7_W6

U7_Y6

U7_M7
U7_N7

U7_P6

U7_T7

U7_R7

IFPAB_PL LVDD

W7

IFPAB_PL LVDD

W6

IFPA_IOV DD

Y6

IFPB_IOV DD

IFPAB

bga595-nvidia-n13p-gv2-s-a2

U7H

5/14 IFPC

T6

IFPC_RS ET

M7

IFPC_PL LVDD

N7

IFPC_PL LVDD

P6

IFPC_IO VDD

bga595-nvidia-n13p-gv2-s-a2

U7I

6/14 IFPD

U6

IFPD_RS ET

T7

IFPD_PL LVDD

R7

IFPD_PL LVDD

R6

IFPD_IO VDD

1

GF119

GF119

IFPD

NC

TP108

TP103

A A

TP111

TP107

B B

TP94
TP93

C C

TP98

TP112

TP110

D D

U7_R6

TP104

2

GF117

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

DVI/HDMI DP

I2CW _SDA

NC

I2CW _SCL

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

GF117

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

2

GF119

IFPA_T XC
IFPA_T XC

IFPA_T XD0
IFPA_T XD0

IFPA_T XD1
IFPA_T XD1

IFPA_T XD2
IFPA_T XD2

IFPA_T XD3
IFPA_T XD3

IFPB_T XC
IFPB_T XC

IFPB_T XD4
IFPB_T XD4

IFPB_T XD5
IFPB_T XD5

IFPB_T XD6
IFPB_T XD6

IFPB_T XD7
IFPB_T XD7

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

I2CX_SD A
I2CX_SC L

TXC
TXC

GPIO14

COMMON

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

3

U7J

7/14 IFPEF

AC4
AC3

Y3
Y4

AA2
AA3

AA1
AB1

AA5
AA4

AB4
AB5

AB2
AB3

AD2
AD3

AD1
AE1

AD5
AD4

TP95

TP97

TP100

TP106

U7_J7

U7_K7

U7_H6

U7_J6

B3

J7

K7

K6

H6

J6

GF119

IFPEF_P LLVDD

IFPEF_P LLVDD

IFPEF_R SET

GF119

IFPE_IOV DD

IFPF_IO VDD

IFPE

IFPF

GF117

GF117

NC

NC

NC

NC

NC

IFPC

GF119GF117

bga595-nvidia-n13p-gv2-s-a2

N5

IFPC_AU X

N4

IFPC_AU X

N3

GF119

IFPC_L3
IFPC_L3

IFPC_L2
IFPC_L2

IFPC_L1
IFPC_L1

IFPC_L0
IFPC_L0

GPIO15

COMMON

DPDVI/HDMI

IFPD_AU X
IFPD_AU X

IFPD_L3
IFPD_L3

IFPD_L2
IFPD_L2

IFPD_L1
IFPD_L1

IFPD_L0
IFPD_L0

GPIO17

COMMONbga595-nvidia-n13p-gv2-s-a2

N2

R3
R2

TP102

R1
T1

TP113

T3
T2

C3

P4
P3

R5
R4

T5
T4

U4
U3

V4
V3

D4

3

U7_W7

U7_AE2

U7K

3/14 DACA

GF119

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

bga595-nvidia-n13p-gv2-s-a2

PLLVDD = 38mA

+1.05V_VGA

+1.05V_VGA

L58
DIS@BLM15PX330SN1D(33,3000MA)

EC-DB2-E08

SP_PLLVDD = 17mA

L59 DIS@HCB1608KF-301T20(300+-25%,2A)

VID_PLLVDD = 41mA

GF117

TSEN_VREF

4

GF117

DVI-DL

I2CY_SD A

NC
NC

I2CY_SC L

NC

TXC

NC

TXC

TXD0

NC
NC

TXD0

NC

TXD1

NC

TXD1

NC

TXD2

NC

TXD2

HPD_ENC

GF117

DVI-DL

NC
NC

NC
NC

NC

TXD3

NC

TXD3

NC

TXD4

NC

TXD4

TXD5

NC

TXD5

NC

NC

GF117

NC

NC

C512 DIS@22u/6.3V/X5R_6
C502 DIS@0.1u/16V/X7R_4

C526 DIS@47u/6.3V_8
C517 DIS@1u/6.3V/X5R_4
C503 DIS@0.1u/16V/X7R_4
C511 DIS@0.1u/16V/X7R_4

R79 DIS@10K/F_4

4

NC
NC

NC
NC

NC

NC

NC

GF119

DVI-SL/HDMI

I2CY_SD A
I2CY_SC L

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

HPD_E

GF119

DVI-SL/HDMI

I2CZ_SD A
I2CZ_SC L

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

HPD_F

GF119

I2CA_SC L
I2CA_SD A

DACA_HSYNC
DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

COMMON

B7
A7

AE3
AE4

AG3

AF4

AF3

DP

IFPE_AU X
IFPE_AU X

IFPE_L3
IFPE_L3

IFPE_L2
IFPE_L2

IFPE_L1
IFPE_L1

IFPE_L0
IFPE_L0

GPIO18

DP

IFPF_AU X
IFPF_AU X

IFPF_L3
IFPF_L3

IFPF_L2
IFPF_L2

IFPF_L1
IFPF_L1

IFPF_L0
IFPF_L0

GPIO19

I2CA_SCL
I2CA_SDA

R85
DIS@2.2K_4

COMMON

5

J3
J2

J1
K1

K3
K2

M3
M2

M1
N1

C2

H4
H3

J5
J4

K5
K4

L4
L3

M5
M4

F7

+3.3V_MAIN POWER

GC6 Power control

EN_+3.3V_MAIN(19)

DGPU_PWROK

(54)

PG_+1.35_VGA

+1.05V_GFX and GPU core power EN

R89
DIS@2.2K_4

+3.3V_MAIN

DIS@4.7K_4

+3.3V_VGA

R479 DIS@4.7K_4

R478

PG_+3.3V_MAIN_G1

6

NV_PLLVDD

U7M

SP_PLLVDD

XTAL_SSIN

EVGA-XTALI EVGA-XTALO

9/14 XTAL_PLL

L6

PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

A10

XTALSSIN

C11

XTALIN

bga595-nvidia-n13p-gv2-s-a2

GF119

NC

GF117

XTALOUT

COMMON

C10

B10

6

XTALOUTBUF F

5

R641
*DIS@10K_4

2

C339
*DIS@1000p/5 0V_4

BXTALOUT

+3.3V_VGA

R639
*DIS@10K_4

R640

EN_+3.3V_MAIN#

*DIS@200K_4

3

Q36
*DIS@2N7002K

1

2

DGPU_POK2

C340
*DIS@1000P/5 0V_4

PG_+3.3V_MAIN_G2

2

Q22

1 3

DIS@METR3904-G

+3.3V_VGA

R83 *DIS@10K/F_4

R81 DIS@10K/F_4

7

+3V(9,10,11,12,13,14,15,16,17,19,22,24,25,26,27,28,29,30,31,34,35,36,38,42,44,46,47,48,53,54,55)
+1.05V_VGA(16,17,54)
+3.3V_VGA(16,19,20,53,54)
+3.3V_MAIN(19,20)

+3.3V_VGA

C567
*DIS@0.022U/ 25V_4

EN_+3.3V_MAIN#_G

C566
*DIS@0.022U/ 25V_4

2

Q35
*DIS@AO3413

60mil

1

R635
DIS@0_8

EN_+3.3V_MAIN#

60mil

+3.3V_MAIN

3

R365: N16V stuff it, not support GC6 2.0

+3.3V_VGA

DGPU_PGOK-1

Q21
DIS@METR3904-G

1 3

+3V

R467
DIS@4.7K_4

C315
DIS@1000P/50V_4

2

R449
DIS@4.7K_4

Q19

DIS@DTC144EUA

1 3

R450
DIS@100K/F_4

+3.3V_VGA

+3V

R466
DIS@4.7K_4

C314
DIS@1000p/50V_4

R448
DIS@1.5K/F_4

PG_+3.3V_MAIN

Q20
DIS@DTC144EU

R447
*DIS@100K/F_4

2

1 3

PG_+3.3V_MAIN

EC-DB2-E09

C71 DIS@10p/50V/NPO_4

2

Y1
DIS@27MHZ

BG627000039

2

443

C72 DIS@12p/50V/C0G_4

EVGA-XTALI

1

1

R78
DIS@1M/F_4

3

EVGA-XTALO

For Int Clk 27Mhz

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

N16S-GT (DISPLAY)

N16S-GT (DISPLAY)

N16S-GT (DISPLAY)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

--

--

--

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

7

Project:

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

8

18

+3.3V_MAIN

PR281
*DIS@22_8

DIS_+3.3V_MAIN

3

2

PQ51
*DIS@PJC138K

1

DGPU_PWROK (11,16)

(53,54)

18 61Thursday, December 17, 2015

18 61Thursday, December 17, 2015

18 61Thursday, December 17, 2015

8

A

A

A

1

www.laptoprepairsecrets.com

U7L

10/14 MISC2

E10

VMON_IN0

F10

VMON_IN1

D1

STRAP0

STRAP0

D2

STRAP1

STRAP1

A A

+3.3V_VGA

R115 *DIS@10k/5%_4

R104
DIS@40.2K/F_4

Strap Mode Slection

B B

JTAG_TCK

TP105

JTAG_TMS

TP109

JTAG_TDI

TP101

JTAG_TDO

TP99

JTAG_TRST#

C C

GPIO
ASSIGNMEN TS

GPIO

I/O

IN

0 FB Clamp monitor (GC6 1.0)

0OUT GC6_FB_EN GC6 FB Enable (GC6 2.0)

OUT

5

OUT

6

6IN DGPU EVENT from CPU (GC6 2.0)DGPU_EVENT#

OUT

8

OUT

9

D D

OUT

11

IN

12

OUT

13

E4

STRAP2

STRAP2

E3

STRAP3

STRAP3

D3

STRAP4

STRAP4

GF119

C1

STRAP5_NC

F6

GPU_MULTSTRAP

MULTISTRAP_REF 0_GND

F4

MULTISTRAP_REF 1_GND

F5

MULTISTRAP_REF 2_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

U7N

8/14 MISC1

E12

THERMDN

F12

THERMDP

AE5

JTAG_TCK

AD6

JTAG_TMS

AE6

JTAG_TDI

AF6

JTAG_TDO

AG4

JTAG_TRST

bga595-nvidia-n13p-gv2-s-a2

PIN

FB_CLAMP_MON

+3V_MAIN_EN

FB_CLAMP_REQ#

VGA_OVT#

ALERT

PWR_VID GPU CORE_VDD PWM Control signal

PWR_LEVEL

PSI Phase Shedding

1

GF117

NC

GF119

USAGE

Enable GC6 +3V_MAIN

Active low FB Clamp tog gle request (GC6 1.0)

ACTIVE LOW THERMAL OVER TEMP

ACTIVE LOW THERMAL ALERT

AC Power detect or pow er supply overdraw input

GF117

GM108: OVT#

GM108

GPIO16
GPIO20
GPIO21

NC

NC

GF117

2

GM108: GPIO8

NC
NC

GF117

NC
NC
NC

2

ROM_CS

ROM_SO

ROM_SCLK

I2CS_SCL
I2CS_SDA

I2CC_SCL

I2CC_SDA

GF119

I2CB_SCL
I2CB_SDA

GF119

3

D12

ROM_CS

B12

ROM_SI

BUFRST

PGOOD

ROM_SI

A12

ROM_SO

C12

ROM_SCLK

D11

D10

R607 *DIS@10k/5%_4

E9

SYS_PEX_RST_MON#

CEC

D9

GPUT_CLK_L

D8

GPUT_DATA_L

A9

DGPU_EDIDCLK

B9

DGPU_EDIDDATA

C9

N12E_SCL

C8

N12E_SDA

N16S (GC2.0) -> GPIO0 stuff R130/R13 7 and un-stuff Q19/R138
GPIO6 stuff R111/R1 10 and un-stuff Q20/R122

C6

FB_CLAMP_MON

GPIO0

B2

GPIO1

D6

GPIO2

C7

GPIO3

F9

GPIO4

A3

EN_+3.3V_MAIN

GPIO5

A4

GPU_EVENT#

GPIO6

B6

GPIO7

A6

VGA_OVT#_R

OVERT

F8

ALERT

GPIO9

C5

GPIO10_VREF_R

GPIO10

E7

GPIO11

D7

GPIO12_ACIN

GPIO12

B4

GPIO13

D5

GPU_GPIO16

GPIO16

E6

GPIO20

C4

GPU_PEX_RST_HOLD#

GPIO21

COMMON

+3.3V_VGA

SYS_PEX_RST_MON# (16)

R80 DIS@1.8k/5%_4
R84 DIS@1.8k/5%_4

R82 DIS@1.8k/5%_4
R87 DIS@1.8k/5%_4

R92 *DIS@0/5%_4

R90 *DIS@10k/5%_4

R97 *DIS@0/5%_4

R117 DIS@0/5%_4
R96 DIS@0/5%_4

EC-DB1-E08

TP96

N16S-GM/-GT/-LP VRAM Configurati on Table

RAMCFG
[3:0]

0011

0110

3

GPU Internal thermal sensor

For GC6 2.0

GC6_FB_EN (17)

(18)

EN_+3.3V_MAIN

DGPU_EVENT# (11)

VGA_ALERT (30,36)
GPIO10_VREF

(21)

PWM-VID

(53)

DGPU_PSI

(53)

GPU_PEX_RST_HOLD# (16)

DESCRIPTION

1.35V gDDR5

256Mx16 SAMSUNG

4

+3.3V_MAIN

MBDATA _GPU(30)

MBCLK_G PU(30)

VGA_OVT#_R

R638
DIS@0/5%_4

PEGX_RST#(16)

OVT: Active low OD output

Alert: OD Input

For GC6 2.0

ROM_SI

Vendor

SAMSUNG0000 512Mx16

Micron0001

HYNIX

4

Vendor P/N

K4G80325FB-HC03

MT51J256M32HF-60:A

K4G41325FC-HC03

H5GC4H24AJR-T2C

Q28

5

2

6

DIS@2N7002DW

PEGX_RST#_C

2

1

3

Q37
DIS@2N7002K

HW STRAPS:

GPIO12 AC detect
AC high
DC low

GPIO12_ACIN

DGPU_PSI

VGA_OVT#_R

ALERT

GPU_PEX_RST_HOLD#

GPU_EVENT#

JTAG_TMS

JTAG_TDI

JTAG_TRST#

JTAG_TCK

GPIO10_VREF_R

5

43

1

GPUT_DATA_L

R591 DIS@4.7K_4
R588 DIS@4.7K_4

GPUT_CLK_L

Remove GC6 1.0 for Nvidia suggest 11/27

PEGX_RST#_C

R632 *DIS@10k/5%_4

VGA_OVT#

R643 DIS@10k/5%_4

VGA_OVT#(3 0)

R88 DIS@100k/5%_4

R109 *DIS@10k/5%_4

R625 DIS@100k/5%_4

R116 DIS@10k/5%_4

R593 DIS@10k/5%_4

R98 *DIS@10k/5%_4

R616 *DIS@10k/5%_4

R620 *DIS@10k/5%_4

R609 DIS@10k/5%_4

R610 *DIS@10k/5%_4

R93 DIS@100K_4

ROM_SI (R74)

PD 4.99K ohm

PD 10K ohm

PD 20K ohm

PD 34.8K ohm

5

+3.3V_VGA
+3.3V_VGA

+3.3V_VGA

+3.3V_VGA

STN B/S

6

R73
*DIS@10K/F_4

ROM_SI
ROM_SO
ROM_SCLK

VRAM Select

R74
DIS@20k/1%_4

R74

+3V

K4G80325FB-HC03@4.99 K/F_4

R74

MT51J 256M32H F-60:A @10K/F_ 4

R74

H5GC4H24AJR-T2C@34.8K/F_4

EC-DB1-E07

Note: GC6 2.0 is supported by
N16x GPU in the GB2B
,GB4B-128,and GB3B-256
packages.

ROM_CS ROM_CS_R

R578 DIS@33/5%_4

ROM_SCLK

R64 *DIS@33/5%_4

ROM_SI

R72 *DIS@33/5%_4

EC-DB1-E09

Configuration

6

7

R71
*DIS@4.99K/F_4

R68
DIS@4.99K/F_4

R66
*DIS@4.99K/F_4

R69
DIS@4.99K/F_4

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

2/25 Change R442 from 4.99K to 45.3K for support Gen3

Logical Strap Bit Mapping

+3.3V_VGA +3.3V_VGA +3.3V_VGA

C106

R129
*DIS@10K_4

ROMWP#

7

1
6
5
2

3

*DIS@PM25LD512C2-SCER

R580
DIS@10K_4

ROM_SCLK_R
ROM_SI_R
ROM_SO

*DIS@22p/50V_4

8

+3.3V_VGA(16,18,20,53,54)
+3.3V_MAIN(18,20)

19

Default: N16S-GM VRAM:HYNIX

R111

R112

*DIS@10K/F_4

DIS@49.9k/1%_4

R100

R101

*DIS@45.3K/F_4

*DIS@4.99K/F_4

1 2

R114
*DIS@15K/F_4

R103
*DIS@15K/F_4

+3.3V_VGA+3.3V_MAIN

R113
*DIS@10K/F_4

R102
*DIS@4.99K/F_4

R110
*DIS@10K/F_4

R99
*DIS@45.3K/F_4

N16S-GMR DID=0x134E

ROM_SCLK = Stuff 4.99K PD
ROM_SI = Stuff 20K PD
(VRAM Configuration follow below table)
ROM_SO = Stuff 4.99K PD
STRAP0 = Stuff 49.9K PU
STRAP1 = NC
STRAP2 = NC
STRAP3 = NC
STRAP4 = NC

4.99K
10K
15K
20K

24.9K

30.1K

34.8K

45.3K

PU-VDD

1010

1100
1101

1111

PD

00001000
00011001
0010
00111011
0100
0101
01101110
0111

FOR DEBUG ONLY

U9

CE#
SCK
SI
SO

WP#

HOLD#

8

VDD

7

ROMHOLD#

4

VSS

R124
*DIS@10K_4

C102

*DIS@0.1u/16V/X5R_4

HP Restricted Secret

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project:

Project:

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Page Modified: Sheet of

Page Modified: Sheet of

Page Modified: Sheet of

Project:

N16S-GT (GPIO/STRAPS)

N16S-GT (GPIO/STRAPS)

N16S-GT (GPIO/STRAPS)

--

--

--

HP-SAIPAN

HP-SAIPAN

HP-SAIPAN

GB2B-64

QCI P/N

CS24992FB26
CS31002FB26
CS31502FB24
CS32002FB29
CS32492FB16
CS33012FB18
CS33482FB06
CS34532FB18

19 61Thursday, December 17, 2015

19 61Thursday, December 17, 2015

19 61Thursday, December 17, 2015

8

A

A

A