QUANTA LZ2, LZ2A Schematics

5
4
3
2
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LZ2/LZ2A (Z480) Intel Chief River Platform (Optimus) Block Diagram
27MHz
1
01
D D
C C
DDRIII-SODIMM1
Page13
DDRIII-SODIMM2
Page12
Dual Channel DDR3 1333/1600 1.5V
SATA - HDD
Page26
SATA - CD-ROM
Page26
6Gbit/s
1.5Gbit/s
DDR SYSTEM MEMORY
INTEL Ivy Bridge 35W(DC/QC)
rPGA 988
Page2,3,4,5
FDI
Panther Point
HM76
Speaker
Page25
Audio Jack
(External MIC)
Page25
B B
Head-Phone Jack
Page25
AUDIO CODEC
5HOWHN $/&49&*5
Page25
INT_MIC(analog)
Page25
BIOS & ME FW
8M
,+'$
32.768KHz25MHz
63,
PCH
Page6,7,8,9,10,11
DMI
DMIFDI
'0,;
/3&
PCI-E
3&,([SUHVV
Graphics Interfaces
Page14,15,16,17,18
INT_HDMI
INT_CRT
INT_LVDS
86%
; ;
Page30 Page28 Page30
86%
USB 3.0 Ports X2
Page28
3&,(
86%
USB2.0 Ports X2Camera
;
;
Mini PCI-E Card
:/$1
Page27 Page24
Nvidia
N13P-GS N13P-GL N13M-GE1
BGA(29X29mm)
;
Bluetooth
Xia
;
LAN
DQG*/$1 57/(57/)
25MHz
NV
VRAM x8pcs
Page19,20
+'0,
&57
/9'6
;
Card Reader Controller
576*5
Page31
Card Reader CONN
,1 6'00&06;'
Page31
Page21
Page22
Page23
FAN / THERMAL
Page29
REGULATOR (DDR3)
1.5VSUS, 0.75VSMDDR_VTERM,1.5V
1.5V_GPU,1.5V_CPU
REGULATOR
+1.05V_VTT,+1.8V
DC/DC
3VPCU, 5VPCU, +15V
Page36
CPU Core
Page41
VGA Core
Page42,43
Page37
Page38
Discrete
PG 42
PG 43
PG 44
EC
SPI Flash
IT8518 CX
Page32
A A
Battery ChargerK/B T/P
5
4
Page35Page35Page30Page32
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
1
1ACustom
1ACustom
145Wednesday, November 30, 2011
145Wednesday, November 30, 2011
145Wednesday, November 30, 2011
1ACustom
of
of
of
5
Ivy Bridge Processor (DMI,PEG,FDI)
U36A
U36A
DMI_TXN0[6] DMI_TXN1[6] DMI_TXN2[6] DMI_TXN3[6]
DMI_TXP0[6] DMI_TXP1[6] DMI_TXP2[6] DMI_TXP3[6]
D D
DMI_RXN0[6] DMI_RXN1[6] DMI_RXN2[6] DMI_RXN3[6]
DMI_RXP0[6] DMI_RXP1[6] DMI_RXP2[6] DMI_RXP3[6]
FDI_TXN0[6] FDI_TXN1[6] FDI_TXN2[6] FDI_TXN3[6] FDI_TXN4[6] FDI_TXN5[6] FDI_TXN6[6] FDI_TXN7[6]
FDI_TXP0[6] FDI_TXP1[6] FDI_TXP2[6] FDI_TXP3[6] FDI_TXP4[6] FDI_TXP5[6] FDI_TXP6[6] FDI_TXP7[6]
C C
FDI_FSYNC0[6] FDI_FSYNC1[6]
FDI_INT[6]
FDI_LSYNC0[6] FDI_LSYNC1[6]
eDP_COM P
INT_eDP_HPD_Q
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.
B B
DDR3_DRAMRST#[12,13]
FOR DEEP S3
B27 B25 A25 B24
B28 B26 A24 B23
G21 E22 F21 D21
G22 D22 F20 C21
A21 H19 E19 F18 B21 C20 D18 E17
A22 G19 E20 G18 B20 C19 D19 F17
J18 J17
H20
J19
H17
A18 A17 B16
C15 D15
C17 F16 C16 G15
C18 E16 D16 F15
R280 1K/F_4R280 1K/F_4
For ESD
DRAMRST_CNTRL_PCH[8]
EC_DRAMRST_GATE[32]
DRAMRST_CNTRL_DDR[12,13]
DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]
DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]
DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]
DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]
FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]
FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]
FDI0_FSYNC FDI1_FSYNC
FDI_INT
FDI0_LSYNC FDI1_LSYNC
eDP_COM PIO eDP_ICOMPO eDP_HP D
eDP_AUX eDP_AUX#
eDP_TX [0] eDP_TX [1] eDP_TX [2] eDP_TX [3]
eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]
Ivy Bridge_r PGA_2DPC _Rev0p61
Ivy Bridge_r PGA_2DPC _Rev0p61
SC52 *0.1U/10V_4SC52 *0.1U/10V_4 U32
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
+1.5V_SUS
R278
R278
1K/F_4
1K/F_4
R613 0_4R613 0_4
R614 *0_4R614 *0_4
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
R275 *0_4R275 *0_4
3
2
C289
C289
0.047U/10V_4
0.047U/10V_4
PEG x16 (UMA Non-stuff)
0.1uF AC coupling Caps for PCIE GEN2
0.22uF AC coupling Caps for PCIE GEN3
PEG_TXP0_C
A A
PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C
C499 DIS@0.1U/10V/X5R_4C499 DIS@0.1U/10V/X5R_4 C475 DIS@0.1U/10V/X5R_4C475 DIS@0.1U/10V/X5R_4 C513 DIS@0.1U/10V/X5R_4C513 DIS@0.1U/10V/X5R_4 C493 DIS@0.1U/10V/X5R_4C493 DIS@0.1U/10V/X5R_4 C487 DIS@0.1U/10V/X5R_4C487 DIS@0.1U/10V/X5R_4 C508 DIS@0.1U/10V/X5R_4C508 DIS@0.1U/10V/X5R_4 C477 DIS@0.1U/10V/X5R_4C477 DIS@0.1U/10V/X5R_4 C504 DIS@0.1U/10V/X5R_4C504 DIS@0.1U/10V/X5R_4 C478 DIS@0.1U/10V/X5R_4C478 DIS@0.1U/10V/X5R_4 C502 DIS@0.1U/10V/X5R_4C502 DIS@0.1U/10V/X5R_4 C481 DIS@0.1U/10V/X5R_4C481 DIS@0.1U/10V/X5R_4 C494 DIS@0.1U/10V/X5R_4C494 DIS@0.1U/10V/X5R_4 C483 DIS@0.1U/10V/X5R_4C483 DIS@0.1U/10V/X5R_4 C491 DIS@0.1U/10V/X5R_4C491 DIS@0.1U/10V/X5R_4 C484 DIS@0.1U/10V/X5R_4C484 DIS@0.1U/10V/X5R_4 C497 DIS@0.1U/10V/X5R_4C497 DIS@0.1U/10V/X5R_4
5
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
PEG_TXP[0..15] [14]
J22 J21 H22
K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32
J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32
M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25
M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25
1
Q31
Q31 ME2N7002E
ME2N7002E
4
PEG_COMP
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15
PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C
PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C
CPU_DRAMRST#CPU_DRAMRST#_R
R271
R271
4.99K/F_4
4.99K/F_4
4
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils. PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_RXN[0..15] [14]
PEG_RXP[0..15] [14]
PLTRST#[8,14,24,27]
0.1uF AC coupling Caps for PCIE GEN2
0.22uF AC coupling Caps for PCIE GEN3
PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C
C498 DIS@0.1U/10V/X5R_4C498 DIS@0.1U/10V/X5R_4 C474 DIS@0.1U/10V/X5R_4C474 DIS@0.1U/10V/X5R_4 C514 DIS@0.1U/10V/X5R_4C514 DIS@0.1U/10V/X5R_4 C492 DIS@0.1U/10V/X5R_4C492 DIS@0.1U/10V/X5R_4 C486 DIS@0.1U/10V/X5R_4C486 DIS@0.1U/10V/X5R_4 C509 DIS@0.1U/10V/X5R_4C509 DIS@0.1U/10V/X5R_4 C476 DIS@0.1U/10V/X5R_4C476 DIS@0.1U/10V/X5R_4 C503 DIS@0.1U/10V/X5R_4C503 DIS@0.1U/10V/X5R_4 C479 DIS@0.1U/10V/X5R_4C479 DIS@0.1U/10V/X5R_4 C501 DIS@0.1U/10V/X5R_4C501 DIS@0.1U/10V/X5R_4 C480 DIS@0.1U/10V/X5R_4C480 DIS@0.1U/10V/X5R_4 C495 DIS@0.1U/10V/X5R_4C495 DIS@0.1U/10V/X5R_4 C482 DIS@0.1U/10V/X5R_4C482 DIS@0.1U/10V/X5R_4 C490 DIS@0.1U/10V/X5R_4C490 DIS@0.1U/10V/X5R_4 C485 DIS@0.1U/10V/X5R_4C485 DIS@0.1U/10V/X5R_4 C496 DIS@0.1U/10V/X5R_4C496 DIS@0.1U/10V/X5R_4
3
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Ivy Bridge Processor (CLK,MISC,JTAG)
H_SNB_IVB#[7]
TP12TP12
TP9TP9
EC_PECI[32]
U32
1
VCC5NC
2
IN
GND3OUT
*74LVC1G07GW
*74LVC1G07GW
R168 56_4R168 56_4
R448 *0_4_SR448 *0_4_S
R450 *0_4_SR450 *0_4_S
R461 10K_4R461 10K_4 C524 *0.1U/10V_4C524 *0.1U/10V_4
R444 *43_4R444 *43_4
R160
R160
750/F_4
750/F_4
CPU_PLTRST#_R
+3V_S5
C500
C500 *0.1U/10V_4
*0.1U/10V_4
CPU_PLTRST#
4
PEG_TXN[0..15] [14]
3
+1.05V_PCH
CPU_PLTRST#
1.5K/F_4
1.5K/F_4
H_PROCHOT#[32,41]
PM_THRMTRIP#[9]
PM_SYNC[6 ]
H_PWRGOOD[9]
R421 *75_4R421 *75_4
R147
R147
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
SKTOCC#
TP_CATERR#
H_PROCHOT#_R
PM_SYNC_R
H_PWR GOOD_R
PM_DRAM_PWRGD_R
CPU_PLTRST#_R
For ESD
DP & PEG Compensation
PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
U36B
U36B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
RV11 *EGA-0402RV11 *EGA-0402
Ivy Bridge_r PGA_2DPC _Rev0p61
Ivy Bridge_r PGA_2DPC _Rev0p61
SYS_PWROK[6]
PM_DRAM_PWRGD[6]
PM_DRAM_PWRGD_Q
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
2
BCLK
BCLK#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
R268 *0_4R268 *0_4
R270
R270 *0_4_S
*0_4_S
R272 *3K/F_4R272 *3K/F_4
DPLL_REF_CLK
DPLL_REF_CLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
PRDY#
PREQ#
TCK TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
2
1
BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
C290
C290 *0.1U/10V_4
*0.1U/10V_4
U15
U15
*74AHC1G09GW
*74AHC1G09GW
3 5
JTAG & BPM
JTAG & BPM
+1.05V_PCH[4,6,7,8,10,33,34,38,43] +1.5V_SUS[4,10,12,13,33,34,37,43] +3V_S5[6,7,8,9,10,27,31,34] +1.5V_CPU[4,33]
A28 A27
R533 1K/F_4R533 1K/F_4
DPLL_SSCLKP_R
A16
DPLL_SSCLKN_R
A15
R536 1K/F_4R536 1K/F_4
CPU_DRAMRST#
R8
SM_RCOMP_0
AK1
SM_RCOMP_1
A5
SM_RCOMP_2
A4
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils, SM_RCOMP[1] W:20mils/S:20mils/L: 500mils, SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
XDP_TMS
AR27
XDP_TRST#
AP30
XDP_TDI_R
AR28
XDP_TDO
AP26
XDP_DBRST#
AL35
AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32
4
R273 39_4R273 39_4
R565 140/F_4R565 140/F_4 R559 25.5/F_4R559 25.5/F_4 R560 200/F_4R560 200/F_4
+1.5V_CPU+3V_S5
3
Q30 ME2N7002EQ30 ME2N7002E
1
R534 *0_4R534 *0_4 R537 *0_4R537 *0_4
+1.05V_PCH
TP19TP19 TP17TP17
TP47TP47 TP41TP41 TP38TP38
TP43TP43 TP56TP56
R274
R274 200/F_4
200/F_4
R269 130/F_4R269 130/F_4
1
2
Processor pull-up(CPU)
R527 24.9/F_4R527 24.9/F_4 R164 62/F_4R164 62/F_4
R532 *10K_4R532 *10K_4
R528 24.9/F_4R528 24.9/F_4
PEG_COMP
INT_eDP_HPD_Q
eDP_COM P
2
H_PROCHOT# XDP_TDO XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TCLK XDP_TRST#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Wednesday, November 30, 2011 2 45
Date: Sheet
Wednesday, November 30, 2011 2 45
Date: Sheet
Wednesday, November 30, 2011 2 45
Date: Sheet
R178 51_4R178 51_4 R480 51_4R480 51_4 R477 51_4R477 51_4 R172 *51_4R172 *51_4 R487 51_4R487 51_4 R470 51_4R470 51_4
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
IVY Bridge 1/4
IVY Bridge 1/4
IVY Bridge 1/4
1
02
CLK_CPU_BCLKP [8] CLK_CPU_BCLKN [8]
CLK_DPLL_SSCLKP [8] CLK_DPLL_SSCLKN [8]
XDP_DBRST# [6]
PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q
MAINON# [4,34]
+1.05V_PCH
of
of
of
1A
1A
1A
5
4
3
2
1
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03
U36C
U36C
Ivy Bridge Processor (DDR3)
U36D
U36D
AB6
D D
M_A_DQ[63:0][13]
C C
B B
M_A_BS#0[13] M_A_BS#1[13] M_A_BS#2[13]
M_A_CAS#[13] M_A_RAS#[13] M_A_WE #[13]
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
F10
G10
N10
M10
AG6 AG5 AK6 AK5 AH5 AH6
AK8
AK9 AH8 AH9 AL9
AL8 AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12
AJ14 AH14 AL15 AK15 AL14 AK14
AJ15 AH15
AE10 AF10
AE8 AD9 AF9
AJ5 AJ6 AJ8
AJ9
C5 D5 D3 D2 D6 C6 C2 C3
F8
G9 F9 F7 G8 G7 K4 K5 K1
J1 J5 J4
J2 K2 M8
N8 N7
M9 N9 M7
V6
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
SA_CLK[0]
AA6
SA_CLK#[0]
V9
SA_CKE[0]
AA5
SA_CLK[1]
AB5
SA_CLK#[1]
V10
SA_CKE[1]
AB4
SA_CLK[2]
AA4
SA_CLK#[2]
W9
SA_CKE[2]
AB3
SA_CLK[3]
AA3
SA_CLK#[3]
W10
SA_CKE[3]
AK3
SA_CS#[0]
AL3
SA_CS#[1]
AG1
SA_CS#[2]
AH1
SA_CS#[3]
AH3
SA_ODT[0]
AG3
SA_ODT[1]
AG2
SA_ODT[2]
AH2
SA_ODT[3]
M_A_DQSN0
C4
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
G6 J3 M6 AL6 AM8 AR12 AM15
D4 F6 K3 N6 AL5 AM9 AR11 AM14
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_CLKP0 [13] M_A_CLKN0 [13] M_A_CKE0 [13]
M_A_CLKP1 [13] M_A_CLKN1 [13] M_A_CKE1 [13]
M_A_CS#0 [13] M_A_CS#1 [13]
M_A_ODT0 [13] M_A_ODT1 [13]
M_A_DQSN[7:0] [13]
M_A_DQSP[7:0] [13]
M_A_A[15:0] [13]
M_B_DQ[63:0][12]
M_B_BS#0[12] M_B_BS#1[12] M_B_BS#2[12]
M_B_CAS#[12] M_B_RAS#[12] M_B_W E#[12]
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
D10
K10
AM5 AM6 AR3
AP3 AN3 AN2 AN1
AP2
AP5 AN9
AT5
AT6
AP6 AN8 AR6 AR5 AR9
AJ11
AT8
AT9
AH11
AR8
AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15
AA9
AA7
AA10
AB8
AB9
J10
C9 A7
C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2
J7 J8
K9
J9
K8 K7 M5 N4 N2 N1 M4 N5 M2 M1
R6
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]
SB_ODT[0]
SB_ODT[1] SB_ODT[2] SB_ODT[3]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
AE2 AD2 R9
AE1 AD1 R10
AB2 AA2 T9
AA1 AB1 T10
AD3 AE3 AD6 AE6
AE4 AD4 AD5 AE5
D7 F3 K6 N3 AN5 AP9 AK12 AP15
C7 G3 J6 M3 AN6 AP8 AK11 AP14
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_CLKP0 [12] M_B_CLKN0 [12] M_B_CKE0 [12]
M_B_CLKP1 [12] M_B_CLKN1 [12] M_B_CKE1 [12]
M_B_CS#0 [12] M_B_CS#1 [12]
M_B_ODT0 [12] M_B_ODT1 [12]
M_B_DQSN[7:0] [12]
M_B_DQSP[7:0] [12]
M_B_A[15:0] [12]
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
A A
5
4
3
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
IVY Bridge 2/4
IVY Bridge 2/4
IVY Bridge 2/4
Wednesday, November 30, 2011 3 45
Wednesday, November 30, 2011 3 45
Wednesday, November 30, 2011 3 45
1
of
1A
1A
1A
5
POWER
POWER
U36F
+VCC_CORE
SNB: 55A IVY: 55A
C218
C218
C219
C219
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
D D
C C
22uF_8 x8 Socket TOP cavity
C222
C222
C221
C221
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C198
C198
C519
C519
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C516
C516
C517
C517
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C576
C576
C583
C583
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
C216
C216 22U/6.3V_8
22U/6.3V_8
C230
C230 22U/6.3V_8
22U/6.3V_8
C193
C193 22U/6.3V_8
22U/6.3V_8
C520
C520 22U/6.3V_8
22U/6.3V_8
C591
C591 10U/6.3V_8
10U/6.3V_8
C220
C220 22U/6.3V_8
22U/6.3V_8
C217
C217 22U/6.3V_8
22U/6.3V_8
C175
C175 22U/6.3V_8
22U/6.3V_8
C518
C518 22U/6.3V_8
22U/6.3V_8
C592
C592
10U/6.3V_8
10U/6.3V_8
10uF_8 x10 Socket BOT cavity
C568
C568
C574
10U/6.3V_8
10U/6.3V_8
C574
10U/6.3V_8
10U/6.3V_8
C575
C575
10U/6.3V_8
10U/6.3V_8
5
C573
C573
10U/6.3V_8
10U/6.3V_8
C584
C584 10U/6.3V_8
10U/6.3V_8
C582
C582
10U/6.3V_8
10U/6.3V_8
+VCC_CORE: 22uF_8 x8 TOP Socket cavity 22uF_8 x8 TOP Socket edge 10uF_8 x10 BOT Socket cavity
B B
A A
U36F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
CORE SUPPLY
CORE SUPPLY
VSS_SENSE_VCCIO
SENSE LINES SVID
SENSE LINES SVID
4
+1.05V_PCH
AH13
VCCIO1
AH10
VCCIO2
AG10
VCCIO3
AC10
VCCIO4
Y10
VCCIO5
U10
VCCIO6
P10
VCCIO7
L10
VCCIO8
J14
VCCIO9
J13
VCCIO10
J12
VCCIO11
J11
VCCIO12
H14
VCCIO13
H12
VCCIO14
H11
VCCIO15
G14
VCCIO16
G13
VCCIO17
G12
VCCIO18
F14
VCCIO19
F13
VCCIO20
F12
VCCIO21
F11
VCCIO22
E14
VCCIO23
E12
VCCIO24
E11
VCCIO25
D14
VCCIO26
D13
VCCIO27
D12
VCCIO28
D11
VCCIO29
C14
VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
VIDALERT#
VIDSCLK VIDSOUT
VCC_SENSE VSS_SENSE
VCCIO_SENSE
4
C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
AJ29 AJ30 AJ28
AJ35 AJ34
B10 A10
+1.05V_PCH_40
H_CPU_SVIDALRT # H_CPU_SVIDCLK H_CPU_SVIDDAT
VTT_SENSE VSSP_SENSE
VTT_SENSE
VSSP_SENSE
PEG AND DDR
PEG AND DDR
SNB: 8.5A IVY: 8.5A
C251
C251
C246
C246
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C598
C598
C597
C597
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22uF_8 x7 TOP Socket cavity 22uF_8 x5 BOT Socket cavity
C601
C601
C602
C602
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22uF (Reserved)
C593
C593
C250
C250
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
R526 *0_4_SR526 *0_4_S
R455 100_4R455 100_4
R454 100_4R454 100_4
R550 10/F _4R550 10/F_4
R556 10/F _4R556 10/F_4
SMDDR_VREF[12,13,37]
MAINON_15V[34]
3
http://adf.ly/3o8pJ
Ivy Bridge Processor (GRAPHIC POWER)
SNB: 21.5A IVY: 33A
C247
C247 22U/6.3V_8
22U/6.3V_8
C596
C596 22U/6.3V_8
22U/6.3V_8
C252
C252
*22U/6.3V_8
*22U/6.3V_8
C262
C262
*22U/6.3V_8
*22U/6.3V_8
+VCC_CORE
+1.05V_PCH
+1.05V_PCH
VCC_SENSE [41] VSS_SENSE [41]
VTT_SENSE [38] VSSP_SENSE [38]
C245
C245 22U/6.3V_8
22U/6.3V_8
C248
C248 22U/6.3V_8
22U/6.3V_8
C249
C249
*22U/6.3V_8
*22U/6.3V_8
C599
C599 *22U/6.3V_8
*22U/6.3V_8
C244
C244 22U/6.3V_8
22U/6.3V_8
C600
C600 *22U/6.3V_8
*22U/6.3V_8
C243
C243 22U/6.3V_8
22U/6.3V_8
+VCC_GFX
C580
C580 22U/6.3V_8
22U/6.3V_8
C226
C226 22U/6.3V_8
22U/6.3V_8
C237
C237 22U/6.3V_8
22U/6.3V_8
+VCC_GFX: 22uF_8 x2 TOP Socket cavity 22uF_8 x4 TOP Socket edge 22uF_8 x2 BOT Socket cavity 22uF_8 x4 BOT Socket edge
+1.8V
C280
C280
10U/6.3V_6
10U/6.3V_6
Layout note: need r outing
together and ALERT need
between CLK and DATA
H_CPU_SVIDCLK
C586
C586 22U/6.3V_8
22U/6.3V_8
C232
C232 22U/6.3V_8
22U/6.3V_8
C565
C565 22U/6.3V_8
22U/6.3V_8
C603
C603 1U/6.3V_4
1U/6.3V_4
CPU VCCPL
SNB 45W:1.5A
330uF/7mohm x 1
10uF x 1
1uF x 2
C590
C590 22U/6.3V_8
22U/6.3V_8
C236
C236 22U/6.3V_8
22U/6.3V_8
C241
C241 22U/6.3V_8
22U/6.3V_8
Place PU resistor close to CPU
+1.05V_PCH +1.05V_PCH
R158
R158 130/F_4
130/F_4
R170 43_4R170 43_4
R566 *0_8R566 *0_8
3
2
+VDDR_REF_CPU
1
Q51
Q51 ME2N7002E
ME2N7002E
H_CPU_SVIDDAT
Place PU resistor close to CPU
R563
R563 100K_4
100K_4
3
H_CPU_SVIDALRT #
C605
C605 1U/6.3V_4
1U/6.3V_4
R169 *0_4_SR169 *0_4_S
R171 *0_4_SR171 *0_4_S
+1.05V_PCH
C210
C210 22U/6.3V_8
22U/6.3V_8
C239
C239 22U/6.3V_8
22U/6.3V_8
C240
C240 22U/6.3V_8
22U/6.3V_8
+
+
C284
C284 *330U/2.5V_7343
*330U/2.5V_7343
R157
R157 75_4
75_4
U36G
U36G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
+1.05V_PCH
Close to VR
R484
R484
54.9/F_4
54.9/F_4
Close to VR
R469
R469 130/F_4
130/F_4
R156 *0_4_SR156 *0_4_S
2
POWER
POWER
1.8V RAIL
1.8V RAIL
SVID CLK
VR_SVID_CLK [41]
SVID DATA
VR_SVID_DATA [41]
SVID ALERT
VR_SVID_ALERT# [41]
2
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
SM_VREF
SA_DIMM_VREFDQ
VREFMISC
VREFMISC
SB_DIMM_VREFDQ
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9
GRAPHICS
GRAPHICS
VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0] VCCSA_VID[1]
VCCIO_SEL
TP34TP34
AK35 AK34
AL1
B4 D1
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
M27 M26 L26 J26 J25 J24 H26 H25
H23
C22 C24
A19
MAINON_15V[34]
MAINON#[2,34]
R423 100/F_4R423 100/F_4
R425 100/F_4R425 100/F_4
TP36TP36
+VDDR_REF_CPU
CAD Note: +VDDR_REF_CPU should have 10 mil trace width
C282
C282
10U/6.3V_6
10U/6.3V_6
C279
C279
10U/6.3V_6
10U/6.3V_6
C231
C231
10U/6.3V_6
10U/6.3V_6
330uF x1, 10uF_8 x1 Socket BOT edge, 10uF_8 x2 Socket BOT cavity.
R610 *0_4_SR610 *0_4_S
R241 1K_4R241 1K_4 R235 1K_4R235 1K_4
R521 *0_4R521 *0_4
Q35
Q35 AON7406
AON7406
5 2
C288
C288
*470P/50V/X7R_4
*470P/50V/X7R_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
+VCC_CORE[33,41] +1.05V_PCH[2,6,7,8,10,33,34,38,43] MAINON_15V[34] +1.5V_SUS[ 2,10,12,13,33,34,37,43]
C287
C287
10U/6.3V_6
10U/6.3V_6
+1.5V_CPU[2,33] +1.5V[10,27] +1.8V[7,10, 33,34,40] +0.85V[33,34, 39] +VCC_GFX[33,41]
+VCC_GFX
R561 *1K_4R561 *1K_4
R564 *1K_4R564 *1K_4
C281
C281
10U/6.3V_6
10U/6.3V_6
SNB: 5A
IVY: 5A
C283
C283
10U/6.3V_6
10U/6.3V_6
04
VCC_AXG_SENSE [41] VSS_AXG_SENSE [41]
+VDDR_REF_CPU
SMDDR_VREF_DQ0_M3 [13] SMDDR_VREF_DQ1_M3 [12]
+1.5V_CPU
330uF x1, 10uF_8 x6 Socket BOT edge.
+
+
C285
C285 220U/2.5V_7343
220U/2.5V_7343
C286
C286
10U/6.3V_6
10U/6.3V_6
SNB: 6A IVY: 6A
C566
C566
R277
R277 220_8
220_8
3
Q36
Q36 ME2N7002E
ME2N7002E
1
1
+0.85V
VCCUSA_SENSE [39]
VCCSA_SEL0 [ 39]
VCCSA_SEL [ 39]
H_VTTVID1 [38]
R276 *0_8_SR276 *0_8_S
40mile routing
+1.5V_SUS+1.5V_CPU+1.5V_SUS
C293 0.1U/10V_4C293 0.1U/10V_4
C294 0.1U/10V_4C294 0.1U/10V_4
C291 0.1U/10V_4C291 0.1U/10V_4
C292 0.1U/10V_4C292 0.1U/10V_4
Placement close to CPU.
of
of
of
C572
C572
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
+1.5V_CPU +1.5V
5A
1
3
4
2
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
IVY Bridge 3/4
IVY Bridge 3/4
IVY Bridge 3/4
Wednesday, November 30, 2011 4 45
Wednesday, November 30, 2011 4 45
Wednesday, November 30, 2011 4 45
1A
1A
1A
5
4
3
2
1
Ivy Bridge Processor (GND)
U36H
U36H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
AR25 AR22 AR19 AR16 AR13 AR10
AR7 AR4
AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10
AP7
AP4
AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10
AN7
AN4
AM29 AM25 AM22 AM19 AM16 AM13 AM10
AM7
AM4
AM3
AM2
AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10
AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10
AK7
AK4 AJ25
VSS11
AT4
VSS12
AT3
VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80
VSS
VSS
D D
C C
B B
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2
M34
H33 H30 H27 H24 H21 H18 H15 H13 H10
G35 G32 G29 G26 G23 G20 G17 G11
U36I
U36I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186 VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
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F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
Ivy Bridge Processor (RESERVED, CFG)
U36E
U36E
RSVD28 RSVD29 RSVD30 RSVD31
RSVD32
RSVD33 RSVD34 RSVD35
RSVD37 RSVD38 RSVD39 RSVD40
RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
RSVD51 RSVD52
BCLK_ITP
BCLK_ITP#
RSVD56 RSVD57 RSVD58
KEY
AH27 AH26
L7 AG7 AE7 AK2
W8
AT26 AM33 AJ27
T8 J16 H16 G16
AR35 AT34 AT33 AP35 AR34
B34 A33 A34 B35 C35
AJ32 AK32
AN35 AM35
AT2 AT1 AR1
B1
TP24TP24 TP21TP21
TP23TP23
TP25TP25 TP26TP26
CFG0CFG0
CFG2
CFG4CFG4 CFG5 CFG6 CFG7CFG7
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
Ivy Bridge_ rPGA_2DPC _Rev0p61
Ivy Bridge_ rPGA_2DPC _Rev0p61
CFG
CFG
RESERVED
RESERVED
VCC_DIE_SENSE
VSS_DIE_SENSE
VCC_DIE_SENSE VSS_DIE_SENSE
Reserved for Intel Debug
TP27TP27 TP28TP28
R155
R155 *0_4
*0_4
For Sandy Bridge R10053 stuff For Ivy Bridge R10053 no stuff
TP11TP11 TP16TP16
For rPGA socket, RSVD59 pin should be left NC
05
Ivy Bridge_r PGA_2DPC _Rev0p61
Ivy Bridge_r PGA_2DPC _Rev0p61
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
10
CFG2 (PEG Static Lane Reversal)
CFG4
A A
(DP Presence Strap)
CFG7 (PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following xxRESETB de assertion
Ivy Bridge_r PGA_2DPC _Rev0p61
Ivy Bridge_r PGA_2DPC _Rev0p61
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
4
3
CFG2
CFG4
CFG7
CFG5
CFG6
R239 1K/F_4R239 1K/F_4
R240 *1K/F_4R240 *1K/F_4
R230 *1K/F_4R230 *1K/F_4
R238 *1K/F_4R238 *1K/F_4
R229 *1K/F_4R229 *1K/F_4
CFG[6:5] (PCIE Port B ifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Quanta Computer Inc.
IVY Bridge 4/4
IVY Bridge 4/4
IVY Bridge 4/4
Wednesday, November 30, 2011 5 45
Wednesday, November 30, 2011 5 45
Wednesday, November 30, 2011 5 45
1A
1A
1A
of
of
1
of
5
Cougar Point/Panther Point (DMI,FDI,PM)
U13C
U13C
DMI_RXN0[2] DMI_RXN1[2] DMI_RXN2[2]
D D
C C
B B
DMI_RXN3[2]
DMI_RXP0[2] DMI_RXP1[2] DMI_RXP2[2] DMI_RXP3[2]
DMI_TXN0[2] DMI_TXN1[2] DMI_TXN2[2] DMI_TXN3[2]
DMI_TXP0[2] DMI_TXP1[2] DMI_TXP2[2] DMI_TXP3[2]
FOR DEEP S3
SUSACK#[32]
XDP_DBRST#[2]
SYS_PWROK
EC_PWROK[32]
EC_PWROK_R
PM_DRAM_PWRGD[2]
RSMRST#[32]
FOR DEEP S3
SUSWARN#[32]
SIO_PWRBTN#[32]
AC_PRESENT[17,32]
+1.05V_PCH
R543 49.9/F_4R543 49.9/F_4
R260 750/F_4R260 750/F_4
SUSACK#
SUSWARN#_R
C522 *1U/6.3V_4C522 *1U/6.3V_4 R451 *0_4_SR451 *0_4_S
R426 *0_4R426 *0_4 R460 *0_4_SR460 *0_4_S
R428 *0_4_SR428 *0_4_S
R410 0_4R410 0_4
R459 *0_4_SR459 *0_4_S
DMI_COMP
DMI_RBIAS
R620 0_4R620 0_4
R436 *0_4R436 *0_4
XDP_DBRST#
SYS_PWROK_R
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUSWARN#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
+3V_S5
+3V_S5
+3V_S5
DSW
+3V_S5
+3V_S5
4
BJ14
FDI_RXN0
AY14
FDI_RXN1
BE14
FDI_RXN2
BH13
FDI_RXN3
BC12
FDI_RXN4
BJ12
FDI_RXN5
BG10
FDI_RXN6
BG9
FDI_RXN7
BG14
FDI_RXP0
BB14
FDI_RXP1
BF14
FDI_RXP2
BG13
FDI_RXP3
BE12
FDI_RXP4
BG12
FDI_RXP5
BJ10
FDI_RXP6
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
+3V
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO6 2
SLP_S5# / GPIO6 3
System Power Management
System Power Management
+3V_S5
SLP_LAN# / GP IO29
FDI_RXP7
FDI_INT
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
R615 *0_4R615 *0_4 R124 0_4R124 0_4
PCIE_WAKE#
CLKRUN#
LPC_PD#
PCH_SUSCLK
SLP_S5#
SLP_A#
WLAN_A OAC_ON
3
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FDI_TXN0 [2] FDI_TXN1 [2] FDI_TXN2 [2] FDI_TXN3 [2] FDI_TXN4 [2] FDI_TXN5 [2] FDI_TXN6 [2] FDI_TXN7 [2]
FDI_TXP0 [2] FDI_TXP1 [2] FDI_TXP2 [2] FDI_TXP3 [2] FDI_TXP4 [2] FDI_TXP5 [2] FDI_TXP6 [2] FDI_TXP7 [2]
FDI_INT [2]
FDI_FSYNC0 [2]
FDI_FSYNC1 [2]
FDI_LSYNC0 [2]
FDI_LSYNC1 [2]
DPWROK RSMRST#
FOR DEEP S3
RSMRST# [32]
PCIE_WAKE# [24,27,32]
CLKRUN# [32]
T18T18
T21T21
T17T17
PM_SLP_S4# [32]
SIO_SLP_S3# [32]
T16T16
FOR DEEP S3
SLP_SUS# [10,32]
PM_SYNC [2]
WLAN_A OAC_ON [27]
2
+1.05V_PCH[2,4,7,8,10,33,34,38,43] +3V[7,8,9,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43] +3V_S5[2,7,8,9,10,27,31,34] +3V_RTC[7,10,32]
1
06
Cougar Point/Panther Point (LVDS,DDI)
U13D
U13D
INT_LVDS_BLON[23]
INT_LVDS_VDDEN[23]
PCH_BRIGHT_PWM[23]
INT_EDIDC LK[23] INT_EDIDD AT[23]
R511 2.37K/F_4R511 2.37K/F_4
INT_TXLCLKOUTN[23]
INT_TXLCLKOUTP[23]
INT_TXLOUTN0[23] INT_TXLOUTN1[23] INT_TXLOUTN2[23]
INT_TXLOUTP0[23] INT_TXLOUTP1[23] INT_TXLOUTP2[23]
+3V
R496 2.2K_4R496 2.2K_4 R489 2.2K_4R489 2.2K_4
LVD_IBG
T22T22
R place close to PCH
R506
R506
1K/F_4
1K/F_4
INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED
INT_CRT_BLU INT_CRT_GRE INT_CRT_RED
INT_CRT_HSYNC_R INT_CRT_VSYNC_R
DAC_IREF
R183 150/F_4R183 150/F_4
R193 150/F_4R193 150/F_4
R192 150/F_4R192 150/F_4
INT_CRT_BLU[22] INT_CRT_GRE[22] INT_CRT_RED[22]
INT_DDCCLK[22] INT_DDCDAT[22]
INT_CRT_HSYNC[22] INT_CRT_VSYNC[22]
R176 33_4R176 33_4 R182 33_4R182 33_4
J47
M45
P45
T40 K47
T45 P39
AF37 AF36
AE48 AE47
AK39 AK40
AN48 AM47 AK47
AJ48
AN47 AM49 AK49
AJ47
AF40 AF39
AH45 AH47 AF49 AF45
AH43 AH49 AF47 AF43
N48
P49 T49
T39
M40
M47 M49
T43 T42
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
L_BKLTEN L_VDD_EN
L_BKLTCTL
L_DDC_CLK L_DDC_DATA
L_CTRL_CLK L_CTRL_DATA
LVD_IBG LVD_VBG
LVD_VREFH LVD_VREFL
LVDSA_CLK# LVDSA_CLK
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
LVDSB_CLK# LVDSB_CLK
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
CRT_DDC_CLK CRT_DDC_DATA
CRT_HSYNC CRT_VSYNC
DAC_IREF CRT_IRTN
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN DDPB_AUXP
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
CRT
CRT
DDPD_AUXP
INT_HDMI_HPD_Q
SDVO_INTN SDVO_INTP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47
INT_HDMI_HPD_Q
AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49
DDPC_HPD_PU
AT38
AY47
Follow PDG eDP disable guide
AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43
DDPD_HPD_PU
BH41
BB43
Follow PDG eDP disable guide
BB45 BF44 BE44 BF42 BE42 BJ42 BG42
R535 *0_4_SR535 *0_4_S
R523
R523 *100K_4
*100K_4
INT_HDMI_ SCL [21] INT_HDMI_ SDA [21]
INT_HDMI_TXDN2 [21] INT_HDMI_TXDP2 [21] INT_HDMI_TXDN1 [21] INT_HDMI_TXDP1 [21] INT_HDMI_TXDN0 [21] INT_HDMI_TXDP0 [21] INT_HDMI_TXCN [21] INT_HDMI_TXCP [21]
R548 10K_4R548 10K_4
R547 10K_4R547 10K_4
R540
R540 100K_4
100K_4
INT. HDMI
+3V
INT. DP
+3V
INT_HDMI_HPD [21]
DPWROK FOR DSW (DEEP S3)
+3VPCU+3V_DSW
+3VPCU
FOR DEEP S3
D28
A A
+3VPCU
+3V_S5
D28
*RB500V-40
*RB500V-40
D29
D29
*RB500V-40
*RB500V-40
5
Q55
Q55
*LTC044EUBFS8TL
*LTC044EUBFS8TL
R616
R616
R617
R617
*10K_4
*10K_4
*10K_4
*10K_4
DPWROK
3
C665
C665 *0.1U/10V/X5R_4
1
Q56
Q56 *2N7002
*2N7002
*0.1U/10V/X5R_4
add cap to timing tune
2
2
1 3
SYS_PWROK[2]
4
System PWR_OK(CLG)
+3V_S5
C171
C171
0.1U/10V_4
0.1U/10V_4
2
1
3 5
SYS_PWROK
U7
U7
TC7SH08FU
TC7SH08FU
4
R117 *0_4R117 *0_4
EC_PWROK
R112
R112 100K_4
100K_4
DELAY_VR_PW RGOOD [41]
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
3
DSWVREN
+3V_RTC
R127
R127 330K_4
330K_4
R140
R140 *330K_4
*330K_4
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
2
PCH Pull-high/low(CLG)
+3V
R198 8.2K_4R198 8.2K_4
R180 1K_4R180 1K_4
R173 *1K_4R173 *1K_4
R139 10K_4R139 10K_4
R457 100K_4R457 100K_4
PM_RI#
PM_BATLOW#
PCIE_WAKE#
WLAN_A OAC_ON
SUSWARN#
AC_PRESENT
PM_DRAM_PWRGD
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Panther Point 1/6
Panther Point 1/6
Panther Point 1/6
Wednesday, November 30, 2011 6 45
Wednesday, November 30, 2011 6 45
Wednesday, November 30, 2011 6 45
R142 10K_4R142 10K_4
R445 8.2K_4R445 8.2K_4
R146 10K_4R146 10K_4
R418 10K_4R418 10K_4
R409 10K_4R409 10K_4
R442 10K_4R442 10K_4
R435 *200/F_4R435 *200/F_4
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
1
+3V_S5
For AOAC
1A
1A
1A
of
of
of
5
RTC Circuitry(RTC)
+3VPCU
20mils
R347 *0_6_SR347 *0_6_S
+3V_RTC_2
+3V_RTC_1
20MIL
R355
R355 1K_4
1K_4
D D
20MIL
+3V_RTC_0
12
BT1
BT1
BAT_CONN
BAT_CONN
D19
D19
BAT54C
BAT54C
+3V_RTC
R407 20K_4R407 20K_4
30mils
R414 20K_4R414 20K_4
C404
C404 1U/6.3V_4
1U/6.3V_4
C511
C511 1U/6.3V_4
1U/6.3V_4
C512
C512 1U/6.3V_4
1U/6.3V_4
RTC_RST#
12
J2
J2
*SHORT_ PAD1
*SHORT_ PAD1
SRTC_RST#
12
J1
J1
*SHORT_ PAD1
*SHORT_ PAD1
HDA Bus(CLG)
R399 10K_4R399 10K_4
2
3
For EMI
ACZ_BITCLK_R
ACZ_SYNC_CODEC
ACZ_RST#_R
ACZ_SDOUT_R
+5V
ACZ_SYNC_RACZ_SYNC_CODEC
C C
ACZ_BITCLK[25]
ACZ_SYNC[ 25]
ACZ_RST#[25]
ACZ_SDOUT[25]
R400 1M/F_6R400 1M/F_6
FC4 *22P/50V_4FC 4 *22P/50V_4
R464 33_4R464 33_4
R398 33_4R398 33_4
R446 33_4R446 33_4
R412 33_4R412 33_4
1
Q14 ME2N7002EQ14 ME2N7002E
4
http://adf.ly/3o8pJ
3
2
1
+3V[6,8,9,10,12,13,14,15,17, 21,22,23,24,25,26,27,29,30,31,32,33,34,37, 38,41,42,43] +3V_RTC[6,10,32] +5V[10,21,22,25,26,29,30,33,34] +3V_S5[2,6,8,9,10,27,31,34] +1.05V_PCH[2,4,6,8,10,33,34,38,43] +3VPCU[6,23,24, 26,27,31,32,34,35,36,40]
07
Cougar Point/Panther Point (HDA,JTAG,SATA)
C144 18P/50V_4C144 18P/50V_4
C145 18P/50V_4C145 18P/50V_4
23
Y2
R134
R134 10M_4
10M_4
TP39TP39
TP13TP13
TP45TP45
TP48TP48
TP14TP14
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BITCLK_R
ACZ_SYNC_R
SPKR
ACZ_RST#_R
ACZ_SDOUT_R
INTEL_BT_OFF#
PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
32.768KHZY232.768KHZ
4 1
R415 1M_4R415 1M_4
+3V_RTC
SPKR[25]
ACZ_SDIN0[25]
INTEL_BT_OFF#[27]
BOARD_ID3[9]
PCH_SPI_CLK[32]
PCH_SPI_CS0#[32]
R204 *10K_4R204 *10K_4
+3VPCU
PCH_SPI_SI[32]
PCH_SPI_SO[32]
U13A
U13A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
+3V
+3V
+3V_S5
+3V
+3V
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN SATA1RXP
SATA 6G
SATA 6G
SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
C38 A38 B37 C37
D36
E36 K36
V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
LCD_BK_OFF
IRQ_SERIRQ
SATA_COMP
SATA3_COMP
SATA3_RBIAS
SATA_ACT#
ODD_PRSNT#
BBS_BIT0
R518 37.4/F_4R518 37.4/ F_4
R519 49.9/F_4R519 49.9/ F_4
R234 750/F_4R234 750/F_4
+1.05V_PCH
LPC_LAD0 [27,32] LPC_LAD1 [27,32] LPC_LAD2 [27,32] LPC_LAD3 [27,32]
LPC_LFRAME# [27,32]
LPC_DRQ#0 [27]
LCD_BK_OFF# [23]
IRQ_SERIRQ [27,32]
SATA_RXN1 [26] SATA_RXP1 [26] SATA_TXN1_C [ 26] SATA_TXP1_C [26]
SATA_RXN3 [26] SATA_RXP3 [26] SATA_TXN3_C [ 26] SATA_TXP3_C [26]
ODD_PRSNT# [26]
SATA HDD
SATA ODD
B B
PCH Dual SPI (CLG)
+3V_PCH_SPI+3V
R175 *0_6_SR175 *0_6_S
U11 PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO
A A
+3V_PCH_SPI
R188 33_4R188 33_4 R167 33_4R167 33_4 R200 33_4R200 33_4
PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
C199
C199 *22P/50V_4
*22P/50V_4
R165 3.3K_4R165 3.3K_4
5
U11
1 6 5 2
3
CE#
VDD SCK SI SO
HOLD#
WP#
VSS
MX25L6406EM2I-12G
MX25L6406EM2I-12G
8
7
4
32Mbit (8M Byte), SPI
+3V_PCH_SPI
R152 3.3K_4R152 3.3K_4
C189
C189
0.1U/10V_4
0.1U/10V_4
PCH Strap Table
Pin Name
SPKR
GNT3# / GPIO55
INTVRMEN
GNT1# / GPIO51
GPIO19
HDA_SDO
DF_TVS
GPIO28
Strap description
No reboot mode setting PW ROK
Top-Block Swap Ov erride
Integrated 1.05V VRM enable ALWAYS Should be always pull-up
Boot BIOS Selecti on 1 [bit-1]
Boot BIOS Selecti on 0 [bit-0]
Flash Descriptor Securit y
DMI/FDI Termination voltage
On-die PLL Voltage Regulat or RSMRST#
HDA_SYNC On-Die PLL VR Vol tage Select RSMRST
GPIO8
SPI_MOSI
NV_ALE
4
Integrated Clock Chip Enabl e
iTPM functi on Disable APWROK
Intel Anti-Thef t HDD protection PWROK 0 = Disable (Internal pull -down 20kohm)
Sampled
PWROK
PWROK
PWROK
RSMRST
PWROK
RSMRST#
Configuration
0 = Default (weak pull -down 20K) 1 = Setting to No-Reboot m ode
0 = "top-block swap" mode 1 = Default (weak pull -up 20K)
GNT0#GNT1#
11
00
0 = Overri de 1 = Default (weak pull -up 20K)
0 = Set to Vss 1 = Set to Vcc (weak pull-down 20K)
0 = Disable 1 = Enable (Default )
0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V
Should be pull-down (weak pull-up 20K)
0 = Default (weak pull -down 20K) 1 = Enable
3
Boot Loc ation
SPI
LPC
R514 *1K_4R514 *1K_4
+3V
R472 *1K_4R472 *1K_4
R114 330K_4R114 330K_4
+3V_RTC
Default weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]
+3V_S5
+3V_S5
+3V
R471 *1K_4R471 *1K_4
R203 *1K_4R203 *1K_4
R411 *1K_4R411 *1K_4
R254 2. 2K_4R254 2.2K_4 R255 1K_4R255 1K_4
R490 *1K_4R490 *1K_4
R413 1K_4R413 1K_4
R181 *1K_4R181 *1K_4
*
IRQ_SERIRQ ODD_PRSNT#
SPKR
PCI_GNT3# [8]
PCH_INVRMEN
+1.8V
BBS_BIT1 [8]
DF_TVS [9] H_SNB_IVB# [ 2]
PLL_ODVR_EN [9]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BBS_BIT0
ACZ_SDOUT_R
ACZ_SYNC_R
PCH_SPI_SI
2
LCD_BK_OFF# SATA_ACT# INTEL_BT_OFF#
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Panther Point 2/6
Panther Point 2/6
Panther Point 2/6
Wednesday, November 30, 2011 7 45
Wednesday, November 30, 2011 7 45
Wednesday, November 30, 2011 7 45
1
R509 8.2K_4R509 8.2K_4 R485 *10K_4R485 *10K_4 R427 10K_4R427 10K_4 R210 10K_4R210 10K_4 R137 10K_4R137 10K_4
+3V
1A
1A
1A
of
of
of
5
Cougar Point-M/Panther Point (PCI,USB,NVRAM)
U13E
U13E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
D D
USB30_RX1-[28] USB30_RX2-[28]
USB30_RX1+[28]
h^ϯϬ
C C
B B
PCI/USBOC# Pull-up(CLG)
USB_OC5# USB_OC0# USB_OC7# USB_OC6#
MPC_PWR_CTRL# BT_DIS
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
DGPU_HOLD_RST#
A A
GFXON
USB30_RX2+[28]
USB30_TX1-[28] USB30_TX2-[28]
USB30_TX1+[28] USB30_TX2+[28]
DGPU_HOLD_RST#[14]
ODD_MDDA#[26,32]
CLK_PCI_8512[32]
CLK_LPC_DEBUG[27]
+3V_S5
10
+3V
10
BBS_BIT1[7]
PCI_GNT3#[7]
For ESD
R132
R132
1
9
2
8
3
7 4
56
10KX8
10KX8
R128
R128
1
9
2
8
3
7 4
56
10KX8
10KX8
R482 8.2K_4R482 8.2K _4 R483 8.2K_4R483 8.2K _4 R433 8.2K_4R433 8.2K _4 R432 8.2K_4R432 8.2K _4
R148 DIS@100K_4R148 DIS@100K_4
R453 100K_4R453 100K_4
R475 *0_4R475 *0_4
RV9 *EGA-0402RV9 *EGA-0402
R153 22_4R153 22_4 R161 22_4R161 22_4
CLK_PCI_FB
R478 22_4R478 22_4
USB_OC3# USB_OC2# USB_OC4# USB_OC1#
EXTTS_SNI_DRV0_PCH RF_PWR_OFF# ODD_MDDA_R# EXTTS_SNI_DRV1_PCH
+3V
5
TP64TP64
TP10TP10
TP42TP42
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
DGPU_HOLD_RST# RF_PWR_OFF# DGPU_PWR_EN
BBS_BIT1 BT_DIS PCI_GNT3#
MPC_PWR_CTRL# ODD_MDDA_R# EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH
PCI_PLTRST#
CLK_PCI_EC_R CLK_PCI_LPC_R
CLK_PCI_FB_R
PCIE CLOCK
WLAN
LAN
DGPU
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB30_RX1N
TP25
BC30
USB30_RX2N
TP26
BE32
USB30_RX3N
TP27
BJ32
USB30_RX4N
TP28
BC28
USB30_RX1P
TP29
BE30
USB30_RX2P
TP30
BF32
USB30_RX3P
TP31
BG32
USB30_RX4P
TP32
AV26
USB30_TX1N
TP33
BB26
USB30_TX2N
TP34
AU28
USB30_TX3N
TP35
AY30
USB30_TX4N
TP36
AU26
USB30_TX1P
TP37
AY26
USB30_TX2P
TP38
AV28
USB30_TX3P
TP39
AW30
USB30_TX4P
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
CLK_PCIE_WLANN[27] CLK_PCIE_WLANP[27]
PCIE_CLKREQ_WLAN#[27]
CLK_PCIE_LANN[24] CLK_PCIE_LANP[24]
PCIE_CLKREQ_LAN#[24]
SW:Stuff UMA:Non-stuff
CLK_PCIE_VGAN[14] CLK_PCIE_VGAP[14]
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
RSVD
RSVD
PCI
PCI
+3V +3V +3V
USB
USB
+3V +3V +3V
+3V +3V +3V +3V
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
R110 *0_4_SR110 *0_4_S
R196 *0_4_SR196 *0_4_S
3 1
R510 DIS@0X2R510 DIS@0X2
Low = MPC ON High = MPC OFF (Default)
R465 *1K_4R465 *1K_4
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25
RSVD26 RSVD27
RSVD28 RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
4 2
4
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8
AY5 BA2
AT12 BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
CLK_PCIE_WLANN CLK_PCIE_WLANP
PCIECLKRQ4#
CLK_PCIE_LANN CLK_PCIE_LANP
PCIECLKRQ1#
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
4
NV_ALE
USB_BIAS
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
http://adf.ly/3o8pJ
LAN
WLAN
TP59TP59
USBP0- [28]
USB 3.0
USBP0+ [28] USBP1- [28]
USB 3.0 (BIOS debug)
USBP1+ [28] USBP2- [30]
CCD
USBP2+ [30] USBP3- [27]
WLAN
USBP3+ [27]
USB port 6,7disable for HM75.
USBP8- [31]
USB 2.0
USBP8+ [31] USBP9- [28]
USB 2.0 (DB&BIOS debug)
USBP9+ [28] USBP10- [31]
Card Reader
USBP10+ [31] USBP5- [30]
BlueTooth
USBP5+ [30]
R136 22.6/F_4R136 22.6/F_4
USB_OC0# [28]
USB_OC4# [31] USB_OC5# [28]
CLK_PCIE_LANN
CLK_PCIE_LANP
CLK_PCIE_WLANN
CLK_PCIE_WLANP
FC6 *3.3p/16V/NP0_4FC6 *3.3p/16V/NP0_4
FC7 *3.3p/16V/NP0_4FC7 *3.3p/16V/NP0_4
FC8 *3.3p/16V/NP0_4FC8 *3.3p/16V/NP0_4
FC9 *3.3p/16V/NP0_4FC9 *3.3p/16V/NP0_4
CLK_REQ/Strap Pin(CLG) PLTRST#(CLG)
SW:Ra UMA:Rb
+3V
R106 10K_4R106 10K_4 R197 10K_4R197 10K_4
+3V_S5
R174 10K_4R174 10K_4 R149 10K_4R149 10K_4 R437 10K_4R437 10K_4 R440 10K_4R440 10K_4 R419 10K_4R419 10K_4
R495 10K_4R495 10K_4
CLK_BUF_BCLKN CLK_BUF_BCLKP
CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_PCH_14M
Ra
R479 DIS@10K_4R479 DIS@10K_4
PEG_CLKREQ#
PCIECLKRQ2# PCIE_CLKREQ_LAN#
PCIECLKRQ0# PCIECLKRQ3# PCIE_CLKREQ_WLAN# PCIECLKRQ5# PCIECLKRQ7#
GPIO45
PEG_CLKREQ#
R473 *UMA@10K_4R473 *UMA@10K_4
Rb
R554 10K_4R554 10K_4 R555 10K_4R555 10K_4
R558 10K_4R558 10K_4 R557 10K_4R557 10K_4 R468 10K_4R468 10K_4 R474 10K_4R474 10K_4 R522 10K_4R522 10K_4 R520 10K_4R520 10K_4 R492 10K_4R492 10K_4
3
PCIE_RXN2_LAN[24] PCIE_RXP2_LAN[24]
PCIE_TXN2_LAN[24] PCIE_TXP2_LAN[24]
PCIE_RXN3[27] PCIE_RXP3[27]
PCIE_TXN3[27] PCIE_TXP3[27]
EHCI1
EHCI2
+3V_S5
PCI_PLTRST#
2
1
3 5
R113 *0_4R113 *0_4
DGPU Power ON
GFXON[15,42,43]
3
2
Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)
LAN
WLAN
PCIE_TXN2_LAN_C PCIE_TXP2_LAN_C
PCIE_TXN3_C PCIE_TXP3_C
PCIECLKRQ0#
CLK_PCIE_LANN CLK_PCIE_LANP
PCIECLKRQ1#
PCIECLKRQ2#
PCIECLKRQ3#
CLK_PCIE_WLANN CLK_PCIE_WLANP
PCIECLKRQ4#
PCIECLKRQ5#
GPIO45
PCIECLKRQ7#
CLK_PCH_ITPN_R CLK_PCH_ITPP_R
C594 0.1U/10V_4C594 0.1U/10V_4 C595 0.1U/10V_4C595 0.1U/10V_4
C260 0.1U/10V_4C260 0.1U/10V_4 C261 0.1U/10V_4C261 0.1U/10V_4
TP57TP57 TP55TP55
U13B
U13B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
+3V_S5
+3V_S5
SMBUSController
SMBUSController
+3V_S5
SML1ALERT# / PCHHOT# / GPIO74
+3V_S5
+3V_S5
PCI-E*
PCI-E*
+3V_S5
+3V_S5
CLOCKS
CLOCKS
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
+3V_S5
+3V
+3V
SMBALERT# / GPIO11
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_DATA1
Link
Link
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
SMBus(CLK)
Q62A
Q62A
2N7002KDW
2N7002KDW
Q62B
Q62B
2N7002KDW
2N7002KDW
R143
R143
4.7K_4
4.7K_4
R144
R144
4.7K_4
4.7K_4
+3V_S5
3 4
+3V_S5
6 1
+3V
+3V
5
2
Q61A
Q61A
5
ME2N7002KW
ME2N7002KW
34
2
ME2N7002KW
ME2N7002KW
61
Q61B
Q61B
C173
C173
0.1U/10V_4
0.1U/10V_4
4
U8 TC7SH08FUU8TC7SH08FU
PLTRST#
R627 DIS@0_4R627 DIS@0_4
R449 *DIS@0_4R449 *DIS@0_4
R131
R131 100K_4
100K_4
DGPU_PWR_EN
PLTRST# [2,14,24,27]
3V_GPU_EN_EC [32]
MB_CLK1[17,29,30,32]
MB_DATA1[17,29,30,32]
SMB_RUN_DAT[12,13]
SMB_RUN_CLK[12,13]
2
SMBCLK
CL_CLK1
R121
R121
2.2K_4
2.2K_4
SMB_ME1_CLK
R103
R103
2.2K_4
2.2K_4
SMB_ME1_DAT
SMB_PCH_DAT
SMB_PCH_CLK
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
CL_CLK1
M7
CL_DAT1
T11
CL_RST#
P10
PEG_CLKREQ#
M10
CLKOUT_PEG_A_N
AB37
CLKOUT_PEG_A_P
AB38
AV22 AU22
AM12 AM13
CLK_BUF_PCIE_3GPLLN
BF18
CLK_BUF_PCIE_3GPLLP
BE18
CLK_BUF_BCLKN
BJ30
CLK_BUF_BCLKP
BG30
CLK_BUF_DREFCLKN
G24
CLK_BUF_DREFCLKP
E24
CLK_BUF_DREFSSCLKN
AK7
CLK_BUF_DREFSSCLKP
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
K43
CLK_FLEX1
F47
CLK_25M
H47
CLK_48M_CARD_C
K49
1
+3V_S5[2,6,7,9,10,27,31,34] +3V[6,7,9,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43]
08
DRAMRST_CNTRL_PCH [2]
TP51TP51
TP53TP53
TP52TP52
PEG_CLKREQ# [14]
CLK_CPU_BCLKN [2] CLK_CPU_BCLKP [2]
CLK_DPLL_SSCLKN [2] CLK_DPLL_SSCLKP [2]
C209 27P/50V_4C209 27P/50V_4
21
R211
R211
Y3
1M_4
1M_4
25MHZY325MHZ
R516 90.9/F_4R516 90.9/F_4
+1.05V_PCH
TP49TP49
TP46TP46
TP50TP50
TP69TP69
SMBus/Pull-up(CLG)
+3V_S5
R438 1K_4R438 1K_4
R417 10K_4R417 10K_4 R145 2.2K_4R145 2.2K _4 R154 2.2K_4R154 2.2K _4 R150 2.2K_4R150 2.2K _4 R159 2.2K_4R159 2.2K _4 R439 10K_4R439 10K_4
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Panther Point 3/6
Panther Point 3/6
Panther Point 3/6
Wednesday, November 30, 2011 8 45
Wednesday, November 30, 2011 8 45
Wednesday, November 30, 2011 8 45
1
C203 27P/50V_4C203 27P/50V_4
DRAMRST_CNTRL_PCH
SMBALERT# SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#_R
1A
1A
1A
5
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
S_GPIO
R507 100_4R507 100_4
TP8TP8
EC_EXT_SMI#
BOARD_ID1
EC_EXT_SCI#
ICC_EN#
LAN_DISABLE#
HOST_ALERT#1_R
BOARD_ID2
R100 *0_4_SR100 *0_4_S
BIOS_REC
SYSTEM_ID1
GPIO27
R494 *0_4_SR494 *0_4_S
SYSTEM_ID0
BT_ON#
CCD_ON#
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
SV_DET
+3V_S5
+3V
GFXPG_R
PLL_ODVR_EN_R
EC_EXT_SMI#[32]
D D
C C
B B
EC_EXT_SCI#[32]
LAN_DISABLE#[27]
GFXPG[14,43]
PLL_ODVR_EN[7]
BT_ON#[30]
CCD_ON#[30]
TEMP_ALERT#[29,32]
GPIO Pull-up/Pull-down(CLG)
LAN_DISABLE#
EC_EXT_SMI# EC_EXT_SCI# EC_A20GATE EC_RCIN# TEMP_ALERT# BT_ON# GPIO27
R162 10K_4R162 10K_4
R130 10K_4R130 10K_4 R431 10K_4R431 10K_4 R508 10K_4R508 10K_4 R498 10K_4R498 10K_4 R500 10K_4R500 10K_4 R223 10K_4R223 10K_4 R481 10K_4R481 10K_4 R441 10K_4R441 10K_4
T7
A42
H36
E38
C10
C4
G2
U2
D40
T5
E8
E16
P8
K1
K4
V8
M5
N2
M3
V13
V3
D6
A4
A44
A45
A46
A5
A6
B3
B47
BD1
BD49
BE1
BE49
BF1
BF49
4
U13F
U13F
BMBUSY# / GPIO0
TACH1 / GPIO1
TACH2 / GPIO6
TACH3 / GPIO7
GPIO8
LAN_PHY_PWR_CTRL / GPIO12
GPIO15
SATA4GP / GPIO16
TACH0 / GPIO17
SCLOCK / GPIO22
GPIO24 / MEM_LED
GPIO27
GPIO28
STP_PCI# / GPIO34
GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
SLOAD / GPIO38
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
+3V
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V
+3V
+3V
+3V_S5
DSW
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V
+3V
+3V
+3V
+3V_S5
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
3
http://adf.ly/3o8pJ
R25 10K/F_4R25 10K/F_4
R118 *GS@0_4R118 *GS@0_4
R462 *GS@0_4R462 *GS@0_4
R634 10K/F_4@GS@NCR634 10K/F_4@GS@NC
TP58TP58
R539 390_4R539 390_4
SGPIO
S_GPIO
R505 *0_4R505 *0_4
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
FB_CLAMP_PCH
R122 1.5K/F_4R122 1.5K/F_4
GPU_EVENT_PCH#
PCB_LAYER_ID
EC_RCIN#
PCH_THRMTRIP#
NVidia N13P-GS
FB_CLAMP [15]
GPU_EVENT# [17]
+3V
NVidia N13P-GS
EC_A20GATE [32]
EC_RCIN# [32]
H_PWRGOOD [2]
PM_THRMTRIP# [2]
DF_TVS [7]
Board ID For Function
+3V
TEST_SET_UP
2
ID1
SDV
SIV
SIT
SVT
GPIO6
00 001 001
SOVP
R209 *10K_4R209 *10K_4 R429 10K_4R429 10K_4 R129 *10K_4R129 *10K_4 R187 10K_4R187 10K_4
R476 *10K_4R476 *10K_4 R503 10K_4R503 10K_4
SV_SET_UP
High = Strong (Default)
R194 10K_4R194 10K_4 R185 *0_4R185 *0_4
ID2 GPIO16
BOARD_ID2 BOARD_ID1 PCB_LAYER_ID SYSTEM_ID0
SYSTEM_ID1 BOARD_ID3
ID3 GPIO13
R213 10K_4R213 10K_4 R430 *10K_4R430 *10K_4 R138 10K_4R138 10K_4 R179 *10K_4R179 *10K_4
R467 10K_4R467 10K_4 R443 *10K_4R443 *10K_4
+3V
0
+3V_S5
+3V_S5[2,6,7,8,10,27,31,34] +3V[6,7,8,10,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43]
+3V
+3V_S5
BOARD_ID3 [7]
R456 *10K_4R456 *10K_4
1
Board ID use below GPIO:
BOARD_ID1 BOARD_ID2 BOARD_ID3
PCB_LAYER_ID: 0-->6 layer 1-->8 layer
System ID[0],ID[1]:
-->LZ1 [0,0]
-->LZ2 [0,1]
-->LZ3 [1,0]
SV_DET
R458 100K_4R458 100K_4
09
HOST_ALERT#1_R
A A
DMI TERMINATION VOLTAGE OVERRIDE
CCD_ON#
R515 *200K/F_4R515 *200K/F_4
Low = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)
5
+3V
R491 100K_4R491 100K_4
FDI TERMINATION VOLTAGE OVERRIDE
FDI_OVRVLTG
LOW - Tx, Rx terminated to same voltage
4
R486 *1K/F_4R486 *1K/F_4
+3V
BIOS RECOVERY
BIOS_REC
R499 10K_4R499 10K_4 R501 *0_4R501 *0_4
High = Disable (Default)
Low = Enable
3
+3V
Intel ME Crypto Transport Layer Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
MFG-TEST
MFG_MODE
R466 1K_4R466 1K_4
R199 10K_4R199 10K_4 R202 *0_4R202 *0_4
2
+3V_S5
+3V
+3V
No Stuff
R195 *UMA@10K_4R195 *UMA@10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Quanta Computer Inc.
Panther Point 4/6
Panther Point 4/6
Panther Point 4/6
Wednesday, November 30, 2011 9 45
Wednesday, November 30, 2011 9 45
Wednesday, November 30, 2011 9 45
SWITCHABLE
R186
R195 R186
DGPU_PRSNT#
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
1
UMA
R195Stuff
R186 DIS@100K_4R186 DIS@100K_4
of
1A
1A
1A
5
PCH5(CLG)
Cougar Point/Panther Point (POWER)
POWER
POWER
U13G
+1.05V_PCH
R309 *0_1206_SR309 *0_1206_S
D D
+1.05V_PCH
R545 *0_6_SR545 *0_6_S
+1.05V_PCH
L13 *1uH/25mA_6L13 *1uH/25mA_6
+1.05V_PCH
R301 *0_1206_SR301 *0_1206_S
+3V
C C
R258 *0_8_SR258 *0_8_S
+1.05V_PCH
R262 *0_8R262 *0_8
R263 *0_8_SR263 *0_8_S
+1.05V_PCH
B B
VccCORE =1.3 A(60mils)
C560
C560
C559
C559
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C268
C268 *10U/6.3V_6
*10U/6.3V_6
VccIO =2.925 A(140mils)
C567
C567
C570
C570
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C579
C579 1U/6.3V_4
1U/6.3V_4
C259
C259
0.1U/10V_4
0.1U/10V_4
C266 *0.1U/10V_4C266 *0.1U/10V_4
C267 *0.1U/10V_4C267 *0.1U/10V_4
+1.5V
+1.05V_PCH
+3V
+1.05V_PCH_VCC
C552
C552 1U/6.3V_4
1U/6.3V_4
+1.05V_PCH_VCCDPLL_EXP
+1.05V_VCCAPLL_EXP
+1.05V_VCCIO
C569
C569 1U/6.3V_4
1U/6.3V_4
C314
C314 10U/6.3V_6
10U/6.3V_6
+3V_VCC_EXP
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
+1.05V_VCCDPLL_FDI
R513 0_6R513 0_6
R512 *0_6R512 *0_6
R529 *0_6R529 *0_6
R531 1/F_4R531 1/F_4
C329
C329 10U/6.3V_6
10U/6.3V_6
160mA (15mils)
+3V_SUS_CLKF33_R +3V_SUS_CLKF33
U13G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
VCCVRM: 1.8V (Destop)
1.5V (Mobile)
L10 10uH/100mA_8L10 10uH/100mA_8
CRTLVDS
CRTLVDS
VCC CORE
VCC CORE
DMI
DMI
VCCIO
VCCIO
DFT / SPI HVCMOS
DFT / SPI HVCMOS
FDI
FDI
+VCCAFDI_VRM
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCCVRM[3]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
C224
C224 10U/6.3V_6
10U/6.3V_6
VCCADAC
VSSADAC
VCC3_3[6]
VCC3_3[7]
VCCDMI[1]
VCCSPI
C542
C542 1U/6.3V_4
1U/6.3V_4
4
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
C553
C553 1U/6.3V_4
1U/6.3V_4
AG16
AG17
AJ16
AJ17
V1
C208
C208 1U/6.3V_4
1U/6.3V_4
VccADAC =1mA(8mils)
+VCCA_DAC_1_2
C202
C202
C536
C536
0.01U/16V_4
0.01U/16V_4
0.1U/10V_4
0.1U/10V_4
VccALVDS=1mA(8mils)
+VCCALVDS
VccTX_LVDS=60mA(10mils)
+VCC_TX_LVDS
C577
C577
C578
C578
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
0.01U/16V_4
+3V_VCC_GIO
C544
C544
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
VCCDMI = 42mA(10mils)
+1.1V_VCC_DMI
VCCCLKDMI = 20mA(8mils)
+1.1V_VCC_DMI_CCI
VCCPNAND = 190 mA(15mils)
+VCCP_NAND
+VCCP_NAND
VCCSPI = 20mA(8mils)
+3V_VCCME_SPI
C234
C234 *10U/6.3V_6
*10U/6.3V_6
C563
C563
0.1U/10V_4
0.1U/10V_4
L11
L11
*10uH/100mA_8
*10uH/100mA_8
3
http://adf.ly/3o8pJ
L24
L24
C200
C200 10U/6.3V_6
10U/6.3V_6
R552 *0_4_SR552 *0_4_S
L17 0.1uH_8L17 0.1uH_8
C275
C275 22U/6.3V_8
22U/6.3V_8
R504 *0_6_SR504 *0_6_S
R530 *0_4_SR530 *0_4_S
C571
C571 1U/6.3V_4
1U/6.3V_4
+VCC_DMI_CCI +1.05V_PCH
R525 *1/F_4R525 *1/F_4
R524 *0_4_SR524 *0_4_S
R261 *0_8_SR261 *0_8_S
R220 *0_6_SR220 *0_6_S
+3V
HCB1608KF_1.5A_6
HCB1608KF_1.5A_6
+3V
+1.8V
+3V
+1.05V_PCH
+1.8V
+3V
+1.05V_PCH
+3V_DSW
+3V_S5
+1.05V_PCH
L15 *10uH/100mA_8L15 *10uH/100mA_8
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
R245 *0_6_SR245 *0_6_S
R541 *0_6_SR541 *0_6_S
R544 *0_6_SR544 *0_6_S
+1.05V_PCH
R246 *0_6R246 *0_6
+1.05V_PCH
R259 *0_4_SR259 *0_4_S
+3V_RTC
VCCRTC<1mA(8mils)
R237 *0_8R237 *0_8
FOR DEEP S3
R619 *0_4R619 *0_4
R488 0_4R488 0_4
R546 *0_6_SR546 *0_6_S
R251 *0_1206_SR251 *0_1206_S
C269 *10U/6.3V_6C269 *10U/6.3V_6
+1.05V_VCCEPW
C557
C557 1U/6.3V_4
1U/6.3V_4
C555
C555 1U/6.3V_4
1U/6.3V_4
C562
C562 1U/6.3V_4
1U/6.3V_4
C537
C537 *1U/6.3V_4
*1U/6.3V_4
C263
C263
4.7U/6.3V_6
4.7U/6.3V_6
C151
C151 1U/6.3V_4
1U/6.3V_4
VCCDSW3_3= 3mA
C540
C540
0.1U/10V_4
0.1U/10V_4
C546
C546
*0.1U/10V_4
*0.1U/10V_4
C558
C558 *1U/6.3V_4
*1U/6.3V_4
VccASW =1.01 A(60mils)
C550
C550
C548
C548 1U/6.3V_4
1U/6.3V_4
65mA(10mils)
8mA(8mils)
VCCDIFFCLKN= 55mA(10mils)
VCCSSC= 95mA(10mils)
C264
C264
0.1U/10V_4
0.1U/10V_4
C146
C146
0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
C238
C238 22U/6.3V_8
22U/6.3V_8
C531
C531
+VCCAFDI_VRM
C541
C541
C265
C265
0.1U/10V_4
0.1U/10V_4
C174
C174
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C549
C549 1U/6.3V_4
1U/6.3V_4
C242
C242 22U/6.3V_8
22U/6.3V_8
2
Cougar Point/Panther Point (POWER)
POWER
POWER
U13J
+VCCACLK
+VCCPDSW
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCAPLL_CPY_PCH
+VCCDPLL_CPY
+VCCSUS1
+VCCRTCEXT
+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL
+VCCDIFFCLK +VCCDIFFCLKN
+V1.05V_SSCVCC
+VCCSST
+V1.05M_VCCSUS
+VTT_VCCPCPU
AD49
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
BD47
BF47
AF17 AF33 AF34 AG34
AG33
T16
V12
T38
W21
W23
W24
W26
W29
W31
W33
N16
Y49
V16
T17 V19
BJ8
A22
U13J
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1] DCPSUS[2]
V_PROC_IO
VCCRTC
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[12]
VCCIO[13]
VCCAPLLSATA
VCCVRM[1]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
V5REF
VCCIO[5]
VCCIO[6]
VCCIO[2]
VCCIO[3]
VCCIO[4]
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
VCCSUS3_3 = 119mA(15mils)
VCC5REFSUS=1mA
VCCSUS3_3 = 119mA(15mils)
VCCPCORE = 28mA(10mils)
VCCVRM= 114mA(15mils)
VCCME = 1.01A(60mils)
VCCSUSHDA= 10mA(8mils)
+V3.3A_1.5A_HDA_IO
+1.05V_PCH[2,4,6,7,8,33,34,38,43] +3V[6,7,8,9,12,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43] +3V_RTC[6,7,32] +3V_S5[2,6,7,8,9,27,31,34] +5V_S5[23,26,28,31,33,34] +5V[7,21,22,25,26,29,30,33,34]
+1.05V_VCCUSBCORE
+3V_VCCPSUS
+3V_VCCPSUS
+VCCAUPLL
+5V_PCH_VCC5REFSUS_L
+VCCA_USBSUS
+3V_VCCPSUS
+5V_PCH_VCC5REF
+3V_VCCPSUS
+3V_VCCPCORE
+3V
C545
C545
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
+V1.1LAN_VCCAPLL
+VCCAFDI_VRM
+1.05V_VCCIO1
C530
C530
C523
C523
0.1U/10V_4
0.1U/10V_4
*1U/6.3V_4
*1U/6.3V_4
C564
C564 *1U/6.3V_4
*1U/6.3V_4
1
R133 *0_8_SR133 *0_8_S
C535
C535 1U/6.3V_4
1U/6.3V_4
R135 0_6R135 0_6
C543
C543
0.1U/10V_4
0.1U/10V_4
R108 *0_6R108 *0_6
C533
C533
0.1U/10V_4
0.1U/10V_4
R538 *0_6_SR538 *0_6_S
C488
C488
0.1U/10V_4
0.1U/10V_4
R402 10/F_4R402 10/F_4
C534
C534 1U/10V_4
1U/10V_4
C532
C532 1U/6.3V_4
1U/6.3V_4
C547
C547
0.1U/10V_4
0.1U/10V_4
C561
C561
0.1U/10V_4
0.1U/10V_4
C556
C556 1U/6.3V_4
1U/6.3V_4
L12 *10uH/100mA_8L12 *10uH/100mA_8
C253
C253 *10U/6.3V_6
*10U/6.3V_6
C551
C551 1U/6.3V_4
1U/6.3V_4
V5REF= 1mA
D9 RB500V-40D9 RB500V-40
R542 *0_6_SR542 *0_6_S
R242 *0_8_SR242 *0_8_S
R243 *0_6_SR243 *0_6_S
+1.05V_VCCEPW
R422 *0_4R422 *0_4 R447 0_4R447 0_4
10
+1.05V_PCH
+3V_S5
+1.05V_PCH
+5V
+3V
+3V
+3V
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.5V_SUS +3V_S5
+1.05V_PCH
L14 10uH/100mA_8L14 10uH/100mA_8
+
+
C271
C271 *220U/2.5V_3528
*220U/2.5V_3528
L16 10uH/100mA_8L16 10uH/100mA_8
+
+
C276
C276 *220U/2.5V_3528
*220U/2.5V_3528
A A
5
C585
C585 1U/6.3V_4
1U/6.3V_4
C587
C587 1U/6.3V_4
1U/6.3V_4
+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL
4
FOR DEEP S3
SLP_SUS#[6,32]
+5VPCU
R628 *1M_4R628 *1M_4
+3V_VCCPSUS
SLP_SUS#_L
Q71 *ME2N7002EQ71 *ME 2N7002E
3
2
R580 0_4R580 0_4
*AOS3413
*AOS3413
Q58
Q58
3
2
*AOS3413
*AOS3413 Q57
Q57
3
2
3
1
1
SLP_SUS#_L
1
SLP_SUS#_L
+5V_PCH_VCC5REFSUS+5V_PCH_VCC5REFSUS_L
R119 10/F_4R119 10/F_4
D8 RB500V-40D8 RB500V-40
+3V_S5
+5V_S5
+3V_S5
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Panther Point 5/6
Panther Point 5/6
Panther Point 5/6
Wednesday, November 30, 2011 10 45
Wednesday, November 30, 2011 10 45
Wednesday, November 30, 2011 10 45
1
1A
1A
1A
5
PCH6(CLG)
4
3
2
1
http://adf.ly/3o8pJ
11
U13I
U13I
Cougar Point/Panther Point (GND)
D D
U13H
U13H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
C C
B B
A A
5
AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39
AD4 AD40 AD42 AD43 AD45 AD46
AD8
AE2
AE3 AF10 AF12
AD14 AD16
AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38
AF4 AF42 AF46
AF5
AF7
AF8
AG19
AG2 AG31 AG48 AH11
AH3 AH36 AH39 AH40 AH42 AH46
AH7
AJ19 AJ21 AJ24 AJ33 AJ34 AK12
AK3
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
4
AY42 AY46
BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38
BB46 BC14 BC18
BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46
BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28
BF30 BF38 BF40
BG17 BG21 BG33 BG44
BH11 BH15 BH17 BH19
BH27 BH31 BH33 BH35 BH39 BH43
AY4
AY8
BB4
BC2
BD5
BD3
BF8
BG8
H10
BH7
D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42
G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34
B11 B15 B19 B23 B27 B31 B35 B39
B7
F45
D3
D8 E18 E26
F3
VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
3
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Panther Point 6/6
Panther Point 6/6
Panther Point 6/6
Wednesday, November 30, 2011 11 45
Wednesday, November 30, 2011 11 45
Wednesday, November 30, 2011 11 45
1
of
1A
1A
1A
5
DDR_RVS(DDR)
JDIM2A
C331
C331 1U/6.3V_4
1U/6.3V_4
98 97 96 95 92 91 90 86 89 85
107
84 83
119
80 78
109 108
79 114 121 101 103 102 104
73
74 115 110 113 197 201 202 200
116 120
11
28
46
63 136 153 170 187
12
29
47
64 137 154 171 188
10
27
45
62 135 152 169 186
C332
C332 1U/6.3V_4
1U/6.3V_4
JDIM2A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR3-DIMM0_H=4.0_RVS
DDR3-DIMM0_H=4.0_RVS
C356
C356
10U/6.3V_8
10U/6.3V_8
M_B_A[15:0][3]
D D
M_B_BS#0[3] M_B_BS#1[3] M_B_BS#2[3] M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP0[3] M_B_CLKN0[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CKE0[3] M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3] M_B_W E#[3]
SMB_RUN_CLK[8,13] SMB_RUN_DAT[8,13] SMDDR_VREF_DQ1_M3[4]
M_B_ODT0[3] M_B_ODT1[3]
C C
M_B_DQSP[7:0][3]
M_B_DQSN[7:0][3]
B B
+1.5V_SUS
C359
C359
10U/6.3V_6
10U/6.3V_6
Place these Caps near So-Dimm1.
C362
C362 10U/6.3V_6
10U/6.3V_6
C361
C361 10U/6.3V_6
10U/6.3V_6
+3V
+3V
C358
C358 10U/6.3V_6
10U/6.3V_6
C334
C334 10U/6.3V_6
10U/6.3V_6
R328 10K_4R328 10K_4 R329 10K_4R329 10K_4
C333
C333 10U/6.3V_6
10U/6.3V_6
+0.75V_DDR_VTT
C357
C357 1U/6.3V_4
1U/6.3V_4
C335
C335 *10U/6.3V_6
*10U/6.3V_6
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
DIMM1_SA0 DIMM1_SA1
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
C360
C360 1U/6.3V_4
1U/6.3V_4
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
4
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
+SMDDR_VREF_DIMM
C340
C340
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
0.1U/10V_4
3
M_B_DQ[63:0] [3]
M_B_DQ5
5
M_B_DQ4
7
M_B_DQ3
15
M_B_DQ2
17
M_B_DQ0
4
M_B_DQ1
6
M_B_DQ6
16
M_B_DQ7
18
M_B_DQ12
21
M_B_DQ13
23
M_B_DQ14
33
M_B_DQ10
35
M_B_DQ8
22
M_B_DQ9
24
M_B_DQ11
34
M_B_DQ15
36
M_B_DQ20
39
M_B_DQ21
41
M_B_DQ18
51
M_B_DQ22
53
M_B_DQ17
40
M_B_DQ16
42
M_B_DQ19
50
M_B_DQ23
52
M_B_DQ25
57
M_B_DQ30
59
M_B_DQ27
67
M_B_DQ26
69
M_B_DQ28
56
M_B_DQ24
58
M_B_DQ31
68
M_B_DQ29
70
M_B_DQ37
129
M_B_DQ36
131
M_B_DQ34
141
M_B_DQ35
143
M_B_DQ33
130
M_B_DQ32
132
M_B_DQ39
140
M_B_DQ38
142
M_B_DQ40
147
M_B_DQ47
149
M_B_DQ43
157
M_B_DQ42
159
M_B_DQ45
146
M_B_DQ41
148
M_B_DQ44
158
M_B_DQ46
160
M_B_DQ51
163
M_B_DQ53
165
M_B_DQ54
175
M_B_DQ55
177
M_B_DQ48
164
M_B_DQ50
166
M_B_DQ52
174
M_B_DQ49
176
M_B_DQ63
181
M_B_DQ57
183
M_B_DQ61
191
M_B_DQ62
193
M_B_DQ60
180
M_B_DQ56
182
M_B_DQ58
192
M_B_DQ59
194
+SMDDR_VREF_DQ1
C336
C336
C345
C342
C342
2.2U/6.3V_6
2.2U/6.3V_6
0.1U/10V_4
0.1U/10V_4
C345
http://adf.ly/3o8pJ
PM_EXTTS#0[13]
C341
C341
2.2U/6.3V_6
2.2U/6.3V_6
DDR3_DRAMRST#[2,13]
SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ1_M1
+3V
R322 10K_4R322 10K_4
R318 *0_6R318 *0_6 R317 0_6R317 0_6
2.48A
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
+1.5V_SUS
+3V
2
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=4.0_RVS
DDR3-DIMM0_H=4.0_RVS DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P DGMK0000120
DGMK0000120 IC SOCKET DDR3 SO-DIMM(204P,H4.0,REV)
IC SOCKET DDR3 SO-DIMM(204P,H4.0,REV)
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
+3V[6,7,8,9,10,13,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43] +1.5V_SUS[2,4,10,13,33,34,37,43] +0.75V_DDR_VTT[13,34,37] +SMDDR_VREF_DIMM[13]
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+0.75V_DDR_VTT
1
12
C350
C353
C353
C354
C364
C355
C355
2.2U/6.3V_6
2.2U/6.3V_6
A A
SMDDR_VREF[4,13,37]
C364
0.1U/10V_4
0.1U/10V_4
5
SMDDR_VREF
1U/6.3V_4
1U/6.3V_4
C354
1U/6.3V_4
1U/6.3V_4
R320 *0_6R320 *0_6
+1.5V_SUS
DRAMRST_CNTRL_DDR[2,13]
C343
C343
1U/6.3V_4
1U/6.3V_4
C339
C339
1U/6.3V_4
1U/6.3V_4
R311
R311 1K/F_4
1K/F_4
+SMDDR_VREF_DIMM
R305
R305 1K/F_4
1K/F_4
10U/6.3V_6
10U/6.3V_6
C319
C319
0.1U/10V_4
0.1U/10V_4
FOR DEEP S3
C350
C330
C330
*10U/6.3V_6
*10U/6.3V_6
VREF DQ1 M1 Solution
SMDDR_VREF
SMDDR_VREF_DQ1_M3
4
R321 *0_6R321 *0_6
1
Q40
Q40
2
ME2320D
ME2320D
+1.5V_SUS
R312
R312 1K/F_4
1K/F_4
3
SMDDR_VREF_DQ1_M1
R306
R306 1K/F_4
1K/F_4
3
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
Wednesday, November 30, 2011 12 45
Wednesday, November 30, 2011 12 45
Wednesday, November 30, 2011 12 45
1
of
1A
1A
1A
5
DDR_RVS(DDR)
JDIM1A
M_A_A[15:0][3]
D D
M_A_BS#0[3] M_A_BS#1[3] M_A_BS#2[3] M_A_CS#0[3] M_A_CS#1[3] M_A_CLKP0[3] M_A_CLKN0[3] M_A_CLKP1[3] M_A_CLKN1[3] M_A_CKE0[3] M_A_CKE1[3] M_A_CAS#[3] M_A_RAS#[3] M_A_WE #[3]
SMB_RUN_CLK[8,12] SMB_RUN_DAT[8,12]
M_A_ODT0[3] M_A_ODT1[3]
C C
M_A_DQSP[7:0][3]
M_A_DQSN[7:0][3]
R308 10K_4R308 10K_4 R307 10K_4R307 10K_4
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
DIMM0_SA0 DIMM0_SA1
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=8.0_RVS
DDR3-DIMM1_H=8.0_RVS
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
3
http://adf.ly/3o8pJ
M_A_DQ4
5
M_A_DQ5
7
M_A_DQ6
15
M_A_DQ7
17
M_A_DQ0
4
M_A_DQ1
6
M_A_DQ3
16
M_A_DQ2
18
M_A_DQ13
21
M_A_DQ9
23
M_A_DQ15
33
M_A_DQ14
35
M_A_DQ12
22
M_A_DQ8
24
M_A_DQ10
34
M_A_DQ11
36
M_A_DQ22
39
M_A_DQ19
41
M_A_DQ16
51
M_A_DQ21
53
M_A_DQ18
40
M_A_DQ23
42
M_A_DQ17
50
M_A_DQ20
52
M_A_DQ31
57
M_A_DQ27
59
M_A_DQ30
67
M_A_DQ29
69
M_A_DQ24
56
M_A_DQ26
58
M_A_DQ25
68
M_A_DQ28
70
M_A_DQ37
129
M_A_DQ33
131
M_A_DQ38
141
M_A_DQ34
143
M_A_DQ32
130
M_A_DQ36
132
M_A_DQ35
140
M_A_DQ39
142
M_A_DQ44
147
M_A_DQ47
149
M_A_DQ46
157
M_A_DQ45
159
M_A_DQ41
146
M_A_DQ40
148
M_A_DQ42
158
M_A_DQ43
160
M_A_DQ54
163
M_A_DQ55
165
M_A_DQ51
175
M_A_DQ50
177
M_A_DQ48
164
M_A_DQ49
166
M_A_DQ53
174
M_A_DQ52
176
M_A_DQ61
181
M_A_DQ58
183
M_A_DQ57
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ60
182
M_A_DQ59
192
M_A_DQ62
194
M_A_DQ[63:0] [3]
DDR3_DRAMRST#[2,12]
SMDDR_VREF_DQ0_M3[4]
+1.5V_SUS
2.48A
+3V
R286 10K_4R286 10K_4
PM_EXTTS#0[12]
PM_EXTTS#0
SMDDR_VREF_DQ0_M3
+3V
R303 0_6R303 0_6
R314 *0_6R314 *0_6
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1 +SMDDR_VREF_DIMM
2
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=8.0_RVS
DDR3-DIMM1_H=8.0_RVS
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
+3V[6,7,8,9,10,12,14,15,17,21,22,23,24,25,26,27,29,30,31,32,33,34,37,38,41,42,43] +1.5V_SUS[2,4,10,12,33,34,37,43] +0.75V_DDR_VTT[12,34,37] +SMDDR_VREF_DIMM[12]
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+0.75V_DDR_VTT
1
13
B B
Place these Caps near So-Dimm0.
+1.5V_SUS
C303
C303 10U/6.3V_6
10U/6.3V_6
C300
C300
10U/6.3V_6
10U/6.3V_6
C307
C307 10U/6.3V_6
10U/6.3V_6
A A
+3V
C316
C316
C321
2.2U/6.3V_6
2.2U/6.3V_6
C321
0.1U/10V_4
0.1U/10V_4
C324
C324 10U/6.3V_6
10U/6.3V_6
C325
C325 10U/6.3V_6
10U/6.3V_6
+0.75V_DDR_VTT
5
C306
C306 10U/6.3V_6
10U/6.3V_6
C298
C298
1U/6.3V_4
1U/6.3V_4
C301
C301 1U/6.3V_4
1U/6.3V_4
C322
C322 *10U/6.3V_6
*10U/6.3V_6
C302
C302
1U/6.3V_4
1U/6.3V_4
C305
C305 1U/6.3V_4
1U/6.3V_4
C326
C326 1U/6.3V_4
1U/6.3V_4
C328
C328
1u/6.3V_4
1u/6.3V_4
C327
C327 1U/6.3V_4
1U/6.3V_4
+
+
C296
C296
*330U/2V/ESR9_7343
*330U/2V/ESR9_7343
C320
C320
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
C308
C308
10U/6.3V_6
10U/6.3V_6
C297
C297
10U/6.3V_8
10U/6.3V_8
+SMDDR_VREF_DIMM
C299
C299
C311
C311
*10U/6.3V_6
*10U/6.3V_6
4
C323
C323
10U/6.3V_8
10U/6.3V_8
C304
C304
2.2U/6.3V_6
2.2U/6.3V_6
0.1U/10V_4
0.1U/10V_4
+SMDDR_VREF_DQ0
C317
C317
2.2U/6.3V_6
2.2U/6.3V_6
C318
C318
VREF DQ0 M3 Solution
SMDDR_VREF[4,12,37]
SMDDR_VREF_DQ0_M3
FOR DEEP S3
DRAMRST_CNTRL_DDR[2,12]
3
R323 *0_6R323 *0_6
1
Q41
Q41
2
ME2320D
ME2320D
+1.5V_SUS
R325
R325 1K/F_4
1K/F_4
SMDDR_VREF_DQ0_M1
R324
R324 1K/F_4
3
1K/F_4
2
PROJECT : LZ2A
PROJECT : LZ2A
PROJECT : LZ2A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Wednesday, November 30, 2011 13 45
Wednesday, November 30, 2011 13 45
Wednesday, November 30, 2011 13 45
1
of
1A
1A
1A
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