Quanta LX3, Pavilion dv6, LX5 (Huror River) Schematic

1
2
3
4
5
6
7
8
Dis.
RED":N"UVCEM"WR
NC[GT"3"<"VQR
A A
NC[GT"4"<"UIPF NC[GT"5"<"KP3*Jkij+ NC[GT"6"<"KP4*Nqy+ NC[GT"7"<"UXEE NC[GT"8"<"KP5*Jkij+ NC[GT"9"<"UIPF NC[GT":"<"DQV
B B
DDR III SMDDR_VTERM and GPU+1.5V/+1.0V(RT8207G)
C C
BATTERY SELECTO R (Wireless LAN
SYSTEM CHARGER(P2806)
PAGE 43
PAGE 42
PAGE 44
SYSTEM POWER RT8206B
PAGE 38
+
1.05V_VTT and GPU
+1.8V/+3V(VT358)
VCCP +1.05V/+1.8V (RT 8204)
PAGE 39
PAGE 41
D D
VGACORE/VDDCI(RT8208/RT9018A)
PAGE 42
CPU CORE (ADP3212)
PAGE 40
1
DDR3-SODIMM1
DDR3-SODIMM2
UCVC"JFF"3UV
UCVC"JFF"3UV
UCVC"JFF"3UVUCVC"JFF"3UV
PAGE 34
UCVC"/"4pf"JFF
UCVC"/"EF/TQO
G/UCVC1WUD"Rqtv
Ceegngtqogvgt JR524FNVT:
URK"TQO
NZ517"*Jwtqp"Tkxgt+"DNQEM"FKCITCO
2
Lcem"vq Uwd/Yqqhgt
PAGE 31
VRAM GDDR5*8
54,54"qt"86,38
PAGE 20-23
ATI Capliano Pro (128bit)
ATI Robson M2 (128bit)
(FCBGA) 962p 29X29mm
PAGE 15-19
0
USB2.0 Port
PAGE 32
Z3
LAN
Realtek PCIE-LAN
RTL8111(E) GigaLAN
PAGE 33
RJ45
PAGE 33
5
27MHz
BlueTooth
25MHz
6
PAGE 32
LVDS CRT HDMI
HDMI CON (1920*1200)
iGPU HDMI LVDS CRT
4
Webcam w/ Mic
PAGE 32
Z3
half size mini-card
Shirley Peak
802.11a/b/g/n)
PAGE 36
6
PAGE 13
PAGE 14
PAGE 34
PAGE 34
PAGE 32
PAGE 30
PAGE 7
Mg{dqctf
Nkijv"Ugpuqt
GMT G991P1U
U[UVGO"HCP
DKQU *U[UVGO"DKQU+
2
UCVC2"522OD1u
UCVC2"522OD1u
UCVC2"522OD1u
*3+
UODWU
Vqwej"Rcf
PAGE 37
PAGE 36
PAGE 32
DDR3 1066,1333 MT/s
DDR3 1066,1333 MT/s
DMI*4
UCVC2"522OD1u
32.768KHz
FOKE
PAGE 30
3
LPC
ENE KBC
KB3926 D2
PAGE 35
Intel Sandy
CPU 45Watt
35Watt
4 Core
( rPGA 989 )
PAGE 3-6
BCLK133M DMI100M DP120M
PCH 3.5Watt
Platform Controller Hub
PAGE 7-12
Azalia
Cwfkq"Lcem" *Jgcfrjqpg1OKE+
PAGE 30
4
32.768KHz
PCI-E 100M
Audio
KFV;4JF:2
PAGE 29
Lcem"vq Urgcmgt
PAGE 30
REK/Gzrtguu Igp4"Z"38
PCH CLK 27M
USB2.0 48M
Fingerprint
PAGE 32
Cornkhkgt
VRC5333F3
PAGE 27
PAGE 27
10
Display
Owz
PAGE 24
34
Card Reader
Realtek RTS5138
PAGE 24
5-in-1 flash media slot(SD/MS/MMC/ XD/MSP)
PAGE 24
LCD CONN for dual channel (15.6",17")
Fwcn"Ejcppgn"NXFU
CRT
USB2.0 Port
POWER LED HDD LED
8,9
7
Z4
Form 17"
PAGE 32
11
USB2.0 Port Form 15"
PAGE 32
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
PAGE 25
PAGE 26
USB2.0 Port POWER LED HDD LED Form 15"
PAGE 32
7
3
Touchscreen
PAGE 32
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1A
1A
147Friday, October 01, 2010
147Friday, October 01, 2010
147Friday, October 01, 2010
8
1A
of
of
of
23
1
2
3
4
5
6
7
8
24
A A
4/7 DB del for PDC update.
B B
C C
D D
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
Clock Gen(9LRS3197)/HOLES
Clock Gen(9LRS3197)/HOLES
Clock Gen(9LRS3197)/HOLES
247Friday, October 01, 2010
247Friday, October 01, 2010
247Friday, October 01, 2010
8
1A
1A
1A
of
of
of
5
4
3
2
1
Sandy Bridge Processor (DMI,PEG,FDI) Sandy Bridge Processor (CLK,MISC,JTAG)
CPU_DRAMRST#
1
R23
R23
4.99K/F_4
4.99K/F_4
25
U31A
U31A
DMI_TXN0[7] DMI_TXN1[7] DMI_TXN2[7] DMI_TXN3[7]
D D
C C
B B
DMI_TXP0[7] DMI_TXP1[7] DMI_TXP2[7] DMI_TXP3[7]
DMI_RXN0[7] DMI_RXN1[7] DMI_RXN2[7] DMI_RXN3[7]
DMI_RXP0[7] DMI_RXP1[7] DMI_RXP2[7] DMI_RXP3[7]
FDI_TXN0[7] FDI_TXN1[7] FDI_TXN2[7] FDI_TXN3[7] FDI_TXN4[7] FDI_TXN5[7] FDI_TXN6[7] FDI_TXN7[7]
FDI_TXP0[7] FDI_TXP1[7] FDI_TXP2[7] FDI_TXP3[7] FDI_TXP4[7] FDI_TXP5[7] FDI_TXP6[7] FDI_TXP7[7]
FDI_FSYNC0[7] FDI_FSYNC1[7]
FDI_INT[7]
FDI_LSYNC0[7] FDI_LSYNC1[7]
eDP_COMP INT_eDP_HPD_Q
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. eDP_COMP connect to P IN A17 W:12mils/S:15mils/L: 500mi ls.
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Brid ge_rPGA_Rev0 p61
Sandy Brid ge_rPGA_Rev0 p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
J22 J21 H22
K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32
J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32
M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25
M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25
PEG_COMP
PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15
PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15
C_PEG_TX#0 C_PEG_TX#1 C_PEG_TX#2 C_PEG_TX#3 C_PEG_TX#4 C_PEG_TX#5 C_PEG_TX#6 C_PEG_TX#7 C_PEG_TX#8 C_PEG_TX#9 C_PEG_TX#10 C_PEG_TX#11 C_PEG_TX#12 C_PEG_TX#13 C_PEG_TX#14 C_PEG_TX#15
C_PEG_TX0 C_PEG_TX1 C_PEG_TX2 C_PEG_TX3 C_PEG_TX4 C_PEG_TX5 C_PEG_TX6 C_PEG_TX7 C_PEG_TX8 C_PEG_TX9 C_PEG_TX10 C_PEG_TX11 C_PEG_TX12 C_PEG_TX13 C_PEG_TX14 C_PEG_TX15
PEG_COMP connect t o PIN H22&J22 W:4mils/S:15mils/L: 500mils. PEG_COMP connect t o PIN J21 W:12mils/S:15mils/L: 500mils.
H_SNB_IVB#[8]
SNB_IVB# N.A at SNB EDS #27637 0.7v1
Placement close to EC.
R99 43_4R99 43_4
R141 56.2/F_4R141 56.2/F_4 R136 140/F_4R136 140/F_4
R523 *0_4/SR523 *0_4/S
R503 *0_4/SR503 *0_4/S
R514 *0_4/SR514 *0_4/ R513 10K_4R513 10K_4
PEG_RX[0..15] [15]
EC_PECI[35]
H_PROCHOT#[35,40]
PM_THRMTRIP#[10,35]
PM_SYNC[7]
H_PWRGOOD[10]
3/26 DB del for DG update.
8/16 PV Modify
CPU RESET#
PLTRST#[9,33,35,36,37]
2 1
SM_DRAMPWROK Processor Input. DDR3 DRAM RESET
3/26 DB del for DG update.
+1.05V_VTT
U37
U37
GND3OUT IN
74LVC1G07GW
74LVC1G07GW
R529 *1.5K/F_4R529 *1.5K/F_4
+3VS5 +3VS5
CPU_PLTRST# CPU_PLTRST#_RCPU_PLTRST#_R
4
+3VS5
VCC5NC
8/6 PV NA.
R16
R16 *10K_4
*10K_4
PM_DRAM_PWRGD_PU
R19
R19 *0_4
*0_4
PM_DRAM_PWRGD [7]
R9 *0_4/SR9 *0_4/S
C685
C685
0.1U/10V_4
0.1U/10V_4
R527 75_4R527 75_4 R524 43_4R524 43_4
U1
U1
1 2
IN GND3OUT
*74LVC1G07GW
*74LVC1G07GW
PM_DRAM_PWRGD_C
R10
R10
10/13 MV Modify.
*3K/F_4
*3K/F_4
TP12TP12
TP11TP11
VCC5NC
SKTOCC#
TP_CATERR#
H_PECI
H_PROCHOT#_R
PM_THRMTRIP#_R
PM_SYNC_R
H_PWRGOOD_R
PM_DRAM_PWRGD_R
R521
R521 *750/F_4
*750/F_4
4/20 DB add.4/20 DB add.
C24
C24 *0.1U/10V_4
*0.1U/10V_4
PM_DRAM_PWRGD_C
4
3
Q2 *2N7002Q2*2N7002
1
6/4 DB2 Modify.
U31B
U31B
C26
SNB_IVB#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
+1.5V_CPU
R4 200/F_4R4200/F_4
R15 130/F_4R15 130/F_4
R13
R13
2
6/4 DB2 Modify.
MAIN_ONG [5,45]
*39_4
*39_4
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
PM_DRAM_PWRGD_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PRDY# PREQ#
TCK TMS
TRST#
TDO
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
DDR3_DRAMRST#[13,14]
DRAMRST_CNTRL_PCH[9]
3/26 DB for H/W modify.
A28 A27
A16 A15
R8
AK1 A5 A4
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils, SM_RCOMP[1] W:20mils/S:20mils/L: 500mils, SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
AP29 AP27
AR26 AR27 AP30
AR28
TDI
AP26
AL35
AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32
+1.5VSUS
+1.05V_VTT [5,11,39,40] +1.5V_CPU [5] +3VS5 [7,8,9,10,11,45] +3V [7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47]
CLK_CPU_BCLKP [9]PEG_RX#[0..15] [15] CLK_CPU_BCLKN [9]
CLK_DPLL_SSCLKP_R CLK_DPLL_SSCLKN_R
CPU_DRAMRST#
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
XDP_PRDY# XDP_PREQ#
XDP_TCLK XDP_TMS XDP_TRST#
XDP_TDI_R XDP_TDO
XDP_DBRST#
XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7
R356 26.1/F_4R356 26.1/F_4 R355 200/F_4R355 200/F_4
R501 *1K_4R501 *1K_4
R32 1K_4R32 1K_4
R33 1K_4R33 1K_4
CPU_DRAMRST#_R
R24 *0_4/SR24 *0_4/S
TP52TP52 TP15TP15
TP50TP50 TP47TP47 TP46TP46
TP14TP14 TP42TP42
XDP_DBRST# [7]
TP49TP49 TP45TP45 TP53TP53 TP43TP43 TP41TP41 TP44TP44 TP51TP51 TP48TP48
R29 *0_4R29 *0_4
3
C23
C23
0.047U/10V_4
0.047U/10V_4
CPU XDP
+3V
Q4
2
2N7002Q42N7002
FDI disable (DIS only stuff)
8/17: PV Modify.
R436 0_4R436 0_4 R422 0_4R422 0_4
A A
R441 0_4R441 0_4
R427 1K_4R427 1K_4 R447 1K_4R447 1K_4
FDI_FSYNC can gang all these 4 signals togeth er and tie them with only one 1K resistor to GND (DG V0.5 Ch2.2.9).
FDI_INT FDI_FSYNC0
FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
PEG x16 disable (UMA only remove)
PEG_TX[0..15][15] PEG_TX#[0..15][15]
C_PEG_TX0 C_PEG_TX1 C_PEG_TX2 C_PEG_TX3 C_PEG_TX4 C_PEG_TX5 C_PEG_TX6 C_PEG_TX7 C_PEG_TX8 C_PEG_TX9 C_PEG_TX10 C_PEG_TX11 C_PEG_TX12 C_PEG_TX13 C_PEG_TX14 C_PEG_TX15
C690 0.1U/10V_4C690 0.1U/10V_4 C686 0.1U/10V_4C686 0.1U/10V_4 C682 0.1U/10V_4C682 0.1U/10V_4 C676 0.1U/10V_4C676 0.1U/10V_4 C671 0.1U/10V_4C671 0.1U/10V_4 C668 0.1U/10V_4C668 0.1U/10V_4 C658 0.1U/10V_4C658 0.1U/10V_4 C662 0.1U/10V_4C662 0.1U/10V_4 C650 0.1U/10V_4C650 0.1U/10V_4 C640 0.1U/10V_4C640 0.1U/10V_4 C638 0.1U/10V_4C638 0.1U/10V_4 C632 0.1U/10V_4C632 0.1U/10V_4 C627 0.1U/10V_4C627 0.1U/10V_4 C626 0.1U/10V_4C626 0.1U/10V_4 C619 0.1U/10V_4C619 0.1U/10V_4 C599 0.1U/10V_4C599 0.1U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3
5
PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15
C_PEG_TX#0 C_PEG_TX#1 C_PEG_TX#2 C_PEG_TX#3 C_PEG_TX#4 C_PEG_TX#5 C_PEG_TX#6 C_PEG_TX#7 C_PEG_TX#8 C_PEG_TX#9 C_PEG_TX#10 C_PEG_TX#11 C_PEG_TX#12 C_PEG_TX#13 C_PEG_TX#14 C_PEG_TX#15
C694 0.1U/10V_4C694 0.1U/10V_4 C689 0.1U/10V_4C689 0.1U/10V_4 C684 0.1U/10V_4C684 0.1U/10V_4 C681 0.1U/10V_4C681 0.1U/10V_4 C675 0.1U/10V_4C675 0.1U/10V_4 C674 0.1U/10V_4C674 0.1U/10V_4 C664 0.1U/10V_4C664 0.1U/10V_4 C665 0.1U/10V_4C665 0.1U/10V_4 C661 0.1U/10V_4C661 0.1U/10V_4 C646 0.1U/10V_4C646 0.1U/10V_4 C642 0.1U/10V_4C642 0.1U/10V_4 C636 0.1U/10V_4C636 0.1U/10V_4 C633 0.1U/10V_4C633 0.1U/10V_4 C631 0.1U/10V_4C631 0.1U/10V_4 C621 0.1U/10V_4C621 0.1U/10V_4 C612 0.1U/10V_4C612 0.1U/10V_4
PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15
0.22uF AC coupling Caps for PCIE GEN1/2/3
4
Embedded Display P LL Clock
8/17: PV Modify.
CLK_DPLL_SSCLKP_R CLK_DPLL_SSCLKN_R
CLK_DPLL_SSCLKP_R CLK_DPLL_SSCLKN_R
SG/UMA
3
Ra Rb Rc NCDIS Stuff
Ra
RP12
RP12
3 1
*0_4P2R_4
*0_4P2R_4
Rb
R365 0_4R365 0_4
Rc
R364 0_4R364 0_4
Stuff Stuff NC
3/26 DB change Part reference.
4
CLK_DPLL_SSCLKP [9]
2
CLK_DPLL_SSCLKN [9]
NC
DP & PEG Compensation
+1.05V_VTT
+1.05V_VTT
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
+1.05V_VTT
PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms
R360 10K_4R360 10K_4
R361 24.9/F_4R361 24.9/F_4
R58 24.9/F_4R58 24.9/F_4
2
INT_eDP_HPD_Q
eDP_COMP
PEG_COMP
Processor pull-up (CPU)
H_PROCHOT# XDP_TDO XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TCLK XDP_TRST#
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R145 62_4R145 62_4 R534 51_4R534 51_4 R535 51_4R535 51_4 R156 51_4R156 51_4 R158 *51_4R158 *51_4 R162 51_4R162 51_4 R526 51_4R526 51_4
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
1
+1.05V_VTT
347Wednesday, October 13, 2010
347Wednesday, October 13, 2010
347Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (DDR3)
U31C
U31C
D D
M_A_DQ[63:0][13]
C C
B B
M_A_BS#0[13] M_A_BS#1[13] M_A_BS#2[13]
M_A_CAS#[13] M_A_RAS#[13] M_A_WE#[13]
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
G10
N10
M10
AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9
AL8 AP11 AN11
AL12 AM12 AM11
AL11 AP12 AN12
AJ14 AH14
AL15 AK15
AL14 AK14
AJ15 AH15
AE10 AF10
AE8 AD9 AF9
F10
C5 D5 D3 D2 D6 C6 C2 C3
F8
G9
F9
F7 G8 G7
K4
K5
K1
J1
J5
J4
J2
K2 M8
N8
N7 M9
N9 M7
V6
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]
SA_ODT[0]
SA_ODT[1] SA_ODT[2] SA_ODT[3]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AB6 AA6 V9
AA5 AB5 V10
AB4 AA4 W9
AB3 AA3 W10
AK3 AL3 AG1 AH1
AH3 AG3 AG2 AH2
C4 G6 J3 M6 AL6 AM8 AR12 AM15
D4 F6 K3 N6 AL5 AM9 AR11 AM14
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_CLKP0 [13] M_A_CLKN0 [13] M_A_CKE0 [13]
M_A_CLKP1 [13] M_A_CLKN1 [13] M_A_CKE1 [13]
M_A_CS#0 [13] M_A_CS#1 [13]
M_A_ODT0 [13] M_A_ODT1 [13]
M_A_DQSN[7:0] [13]
M_A_DQSP[7:0] [13]
M_A_A[15:0] [13]
M_B_DQ[63:0][14]
M_B_BS#0[14] M_B_BS#1[14] M_B_BS#2[14]
M_B_CAS#[14] M_B_RAS#[14] M_B_WE#[14]
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
D10
K10
AM5 AM6 AR3
AP3 AN3 AN2 AN1
AP2
AP5 AN9
AT5
AT6
AP6 AN8 AR6 AR5 AR9
AJ11
AT8
AT9
AH11
AR8
AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15
AA9
AA7
AA10
AB8
AB9
J10
C9 A7
C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2
J7 J8
K9
J9
K8 K7 M5 N4 N2 N1 M4 N5 M2 M1
R6
U31D
U31D
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
M_B_DQSN0
D7
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
F3 K6 N3 AN5 AP9 AK12 AP15
C7 G3 J6 M3 AN6 AP8 AK11 AP14
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_CLKP0 [14] M_B_CLKN0 [14] M_B_CKE0 [14]
M_B_CLKP1 [14] M_B_CLKN1 [14] M_B_CKE1 [14]
M_B_CS#0 [14] M_B_CS#1 [14]
M_B_ODT0 [14] M_B_ODT1 [14]
M_B_DQSN[7:0] [14]
M_B_DQSP[7:0] [14]
M_B_A[15:0] [14]
26
Sandy Brid ge_rPGA_Rev0 p61
Sandy Brid ge_rPGA_Rev0 p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
A A
5
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
3
Sandy Bridge_r PG A_Re v0p61
Sandy Bridge_r PG A_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
2
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
1
1A
1A
1A
of
of
of
447Wednesday, October 13, 2010
447Wednesday, October 13, 2010
447Wednesday, October 13, 2010
5
4
3
2
1
Sandy Bridge Processor (POWER) Sandy Bridge Processor (GRAPHIC POWER)
9/29 MV for Power Mod ify.
27
U31G
U31F
SNB: 55A
C596
C596
D D
22U/6.3V_8
22U/6.3V_8
C574
C574 22U/6.3V_8
22U/6.3V_8
C577
C577 22U/6.3V_8
22U/6.3V_8
C179
C179 22U/6.3V_8
22U/6.3V_8
C C
C67
C67 22U/6.3V_8
22U/6.3V_8
C126
C126 22U/6.3V_8
22U/6.3V_8
C122
C122 22U/6.3V_8
22U/6.3V_8
C643
C643 *22U/6.3VS_8
*22U/6.3VS_8
B B
C576
C576 22U/6.3V_8
22U/6.3V_8
C477
C477 22U/6.3VS_8
22U/6.3VS_8
22uF_8 x8 Socket TOP cavity 22uF_8 x10 Socket BOT cavi ty 22uF_8 x8 Socket TOP edge 470uF_7343 x4
C623
C623 22U/6.3V_8
22U/6.3V_8
C564
C564 22U/6.3V_8
22U/6.3V_8
C575
C575 22U/6.3V_8
22U/6.3V_8
C95
C95 22U/6.3V_8
22U/6.3V_8
C635
C635 *22U/6.3VS_8
*22U/6.3VS_8
C106
C106 22U/6.3V_8
22U/6.3V_8
C99
C99 22U/6.3V_8
22U/6.3V_8
C672
C672 *22U/6.3VS_8
*22U/6.3VS_8
C617
C617 22U/6.3V_8
22U/6.3V_8
C557
C557 22U/6.3VS_8
22U/6.3VS_8
+VCC_CORE
C586
C586 22U/6.3V_8
22U/6.3V_8
C555
C555 22U/6.3V_8
22U/6.3V_8
C132
C132 22U/6.3V_8
22U/6.3V_8
C587
C587 22U/6.3V_8
22U/6.3V_8
C85
C85 22U/6.3V_8
22U/6.3V_8
C147
C147 22U/6.3V_8
22U/6.3V_8
C76
C76 22U/6.3V_8
22U/6.3V_8
C558
C558 22U/6.3V_8
22U/6.3V_8
C110
C110 22U/6.3V_8
22U/6.3V_8
C660
C660 *22U/6.3VS_8
*22U/6.3VS_8
3/26 DB change 10U FP to 0805.
A A
+VCC_CORE [40] +VCC_GFX [40] +VCCSA [41] +1.05V_VTT [3,11,39,40] +1.5V_CPU [3] +1.5V_CPU [3] +1.5VSUS [3,11,13,14,43,45]
5
U31F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8
VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24
VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
CORE SUPPLY
CORE SUPPLY
VCCIO_SENSE
SENSE LINES SVID
SENSE LINES SVID
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE VSS_SENSE
VSSIO_SENSE
4
AH13
SNB: 8.5A
AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12
E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
AJ29 AJ30 AJ28
3/26 DB Modify.
AJ35 AJ34
B10 A10
C71
C71 22U/6.3VS_8
22U/6.3VS_8
C131
C131 22U/6.3VS_8
22U/6.3VS_8
C70
C70 *22U/6.3VS_8
*22U/6.3VS_8
C597
C597 *22U/6.3VS_8
*22U/6.3VS_8
C547
C547 22U/6.3VS_8
22U/6.3VS_8
C68
C68 *22U/6.3VS_8
*22U/6.3VS_8
C573
C573 *22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x7 Socket TOP cavity 22uF_8 x5 Socket BOT cavity 22uF_8 x2 Socket TOP cavity (no stuff) 22uF_8 x5 Socket BOT cavity (no stuff) 330uF_7343 x2
+1.05V_VTT_40
H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT
R59 *0_4/SR59 *0_4/S
R137 100_4R137 100_4
R135 100_4R135 100_4
VSSP_SENSE
Trace Route to Po wer IC area.
+1.05V_VTT
C69
C69 22U/6.3VS_8
22U/6.3VS_8
C86
C86 22U/6.3VS_8
22U/6.3VS_8
C105
C105 22U/6.3VS_8
22U/6.3VS_8
C94
C94 *22U/6.3VS_8
*22U/6.3VS_8
5/14 modify
C31
C31
*22U/6.3VS_8
*22U/6.3VS_8
C563
C563 22U/6.3VS_8
22U/6.3VS_8
C552
C552 22U/6.3VS_8
22U/6.3VS_8
+1.05V_VTT
+VCC_CORE
VCC_SENSE [40,46] VSS_SENSE [40,46]
VCCP_SENSE [39]
C541
C541 22U/6.3VS_8
22U/6.3VS_8
C176
C176 22U/6.3VS_8
22U/6.3VS_8
C585
C585 22U/6.3VS_8
22U/6.3VS_8
C30
C30 *22U/6.3VS_8
*22U/6.3VS_8
C149
C149 *22U/6.3VS_8
*22U/6.3VS_8
C120
C120 *22U/6.3VS_8
*22U/6.3VS_8
C63
C63 22U/6.3VS_8
22U/6.3VS_8
5/4: add C8260/ C8322
6/7 DB2 Modify
TP37TP37
22uF_8 x2 Socket TOP cavity 22uF_8 x2 Socket BOT cavi ty 22uF_8 x4 Socket TOP edge 22uF_8 x4 Socket BOT edge 470uF_7343 x2
9/26: MV Modify
+VCC_GFX
8/17: PV Modify
+1.8V
SNB: 1.5A
C492
C492
C495
C495
10U/6.3V_6
10U/6.3V_6
1U/6.3V_4
1U/6.3V_4
330uF x1, 10uF_8 x1, 1uF_4 x2 Socket BOT edge.
3/26 DB change 10U FP to 0805.
Layout note: need routing together and ALERT need between CLK and DATA.
H_CPU_SVIDCLK
Place PU resistor close to CPU
H_CPU_SVIDDAT
Place PU resistor close to CP U
H_CPU_SVIDALRT#
3
SNB: 21.5A
C130
R522 0_4R522 0_4
Ra
C130 *22U/6.3V_8
*22U/6.3V_8
C177
C177 *22U/6.3V_8
*22U/6.3V_8
C590
C590 *22U/6.3V_8
*22U/6.3V_8
C123
C123 *22U/6.3V_8
*22U/6.3V_8
C121
C121 *22U/6.3V_8
*22U/6.3V_8
C598
C598 *22U/6.3V_8
*22U/6.3V_8
C591
C591 *22U/6.3V_8
*22U/6.3V_8
C145
C145 *22U/6.3V_8
*22U/6.3V_8
C143
C143 *22U/6.3V_8
*22U/6.3V_8
C178
C178 *22U/6.3V_8
*22U/6.3V_8
C589
C589 *22U/6.3V_8
*22U/6.3V_8
C133
C133 *22U/6.3V_8
*22U/6.3V_8
DISNCSG/UMA
Ra Stuff
C494
C494 1U/6.3V_4
1U/6.3V_4
3/26 DB Modify.
+1.05V_VTT +1.05V_VTT
C921 *0.1U/10V_4C921 *0.1U/10V_4
+1.05V_VTT
+
+
C486
C486
330U/2V_7343
330U/2V_7343
R108
R108 130/F_4
130/F_4
3/26 DB Modify.
R96 75_4R96 75_4
R89 43_4R89 43_4
U31G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_r PG A_Re v0p61
Sandy Bridge_r PG A_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Place PU resistor close to VR
R120 *54.9/F_4R120 *54.9/F_4
Place PU resistor
R100
R100
close to VR
*130/F_4
*130/F_4
5/12: modify
10/01: modify
3/26 DB Modify.
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREFMISC
VREFMISC
GRAPHICS
GRAPHICS
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
1.8V RAIL
1.8V RAIL
+1.5V_CPU +1.5V
SVID CLK
+1.05V_VTT
VR_SVID_CLK [40]
SVID DATA
4/27: layout modify
VR_SVID_DATA [40]
SVID ALERT
VR_SVID_ALERT# [40]
2
VAXG_SENSE
SM_VREF
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
FC_C22
VCCSA_VID1
R747 0_8R747 0_8
5/13: modify
3/26 DB Modify.
AK35 AK34
R130 *100_4R130 *100_4
R124 100_4R124 100_4
DISNCSG/UMA
VCC_AXG_SENSE [40,46] VSS_AXG_SENSE [40,46]
R130 Stuff
CAD Note: +VDDR_REF_CPU should have 10 mil trace width
R175 *0_8R175 *0_8
2
3
Q13
Q13 2N7002
2N7002
MAIND
SNB: 5A
C109
C109 10U/6.3V_8
10U/6.3V_8
1
5/14 modify
C89
C89 10U/6.3V_6
10U/6.3V_6
4/27: layout modify
+
C174
C174 10U/6.3V_6
10U/6.3V_6
+
C127
C127 10U/6.3V_6
10U/6.3V_6
330uF x1, 10uF_8 x6 Socket BO T edge.
3/26 DB change 10U FP to 0805.
AL1
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
+VDDR_REF_CPU
R170
R170 100K_4
100K_4
SNB: 6A
M27 M26 L26 J26 J25 J24 H26 H25
H23
C22 C24
C549
C549 10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE_R
H_FC_C22
C482
C482 10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1 Socket BO T edge,
F_8 x2 Socket BOT cavity.
10u
3/26 DB change 10U FP to 0805.
R358 *0_4/SR358 *0_4/S
R363 10K_4R363 10K_4
R357 10K_4R357 10K_4
5/11: Add for intel CRB
40mile routing
JP1
JP1 *SOLDERJUMPER-2
*SOLDERJUMPER-2
Q39
Q39 AON7410
AON7410
5 2
MAIND
Custom
Custom
Custom
+1.5V_CPU+1.5VSUS
12
R2
1
220_8R2220_8
3
3
3/26 DB add for Intel.
4
C18
C18 *470P/50V_4
*470P/50V_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SNB 3/4 (POWER)
SNB 3/4 (POWER)
SNB 3/4 (POWER)
Placement close to CPU.
2
Q1
2N7002Q12N7002
1
1
+VCC_GFX
DDR_VTTREF [13,14,43]
MAIND [45]
+1.5V_CPU
C155
C155
C112
C112
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
5/23: na
12
C714
C714 *330U_2.5V_5.0x5.9_ESR10m
*330U_2.5V_5.0x5.9_ESR10m
+VCCSA
C545
C545
C485
C485
10U/6.3V_8
10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
VCCUSA_SENSE [41]
VCCSA_SEL [41]
+1.5VSUS
C710 0.1U/10V_4C710 0.1U/10V_4 C712 0.1U/10V_4C712 0.1U/10V_4 C715 0.1U/10V_4C715 0.1U/10V_4 C699 0.1U/10V_4C699 0.1U/10V_4
MAIN_ONG [3,45]
5/6: modify
CPU VDDQ
of
of
of
547Wednesday, October 13, 2010
547Wednesday, October 13, 2010
547Wednesday, October 13, 2010
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (GND)
U31H
U31H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
AT16 AT13 AT10
AR25 AR22 AR19 AR16 AR13 AR10
AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10
AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10
AM29 AM25 AM22 AM19 AM16 AM13 AM10
AM7 AM4 AM3 AM2
AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10
AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10
AJ25
AT7 AT4 AT3
AR7 AR4 AR2
AP7 AP4 AP1
AN7 AN4
AL7 AL4 AL2
AK7 AK4
VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80
VSS
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2
M34
H33 H30 H27 H24 H21 H18 H15 H13 H10
G35 G32 G29 G26 G23 G20 G17 G11
U31I
U31I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186 VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
SMDDR_VREF_DQ0_M3[13] SMDDR_VREF_DQ1_M3[14]
H_VTTVID1[39]
Sandy Bridge Processor (RESERVED, CFG)
U31E
U31E
For CPU debug.
TP9TP9 TP10TP10
TP13TP13
R359
R359 *1K_4
*1K_4
R362 *0_4/SR362 *0_4/S
CFG0 CFG2 CFG4
CFG5 CFG6 CFG7CFG7
R354
R354 *1K_4
*1K_4
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
RSVD1
AH31
RSVD2
AJ33
RSVD3
AH33
RSVD4
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
RSVD26
J15
RSVD27
Sandy Bridge_r PG A_Re v0p61
Sandy Bridge_r PG A_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
RESERVED
RESERVED
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
AH27
RSVD53
AN35
RSVD54
AM35
RSVD55
#27636 SNB EDS0.7v1 no function.
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
For rPGA socket, RSVD59 pin should be left NC.
B1
KEY
TP40TP40 TP39TP39
28
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Processor Strapping
The CFG signals have a default value of '1' if not terminated on t he board.
10
A A
CFG2 (PEG Static Lane Reversal)
CFG4 (DP Presence Strap)
CFG7 (PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following xxRESETB de assertion
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2
R151 1K_4R151 1K_4
CFG4
R149 *1K_4R149 *1K_4
CFG7
R144 *1K_4R144 *1K_4
CFG5
R139 *1K_4R139 *1K_4
CFG6
R146 *1K_4R146 *1K_4
3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
1
1A
1A
1A
of
of
of
647Wednesday, October 13, 2010
647Wednesday, October 13, 2010
647Wednesday, October 13, 2010
5
4
3
2
1
Cougar Point (DMI,FDI,PM)
U44C
U44C
DMI_RXN0[3] DMI_RXN1[3] DMI_RXN2[3] DMI_RXN3[3]
DMI_RXP0[3]
D D
SUS_PWR_ACK_R
C C
B B
5/7: DEL R8293 for SUSACK# From EC
XDP_DBRST#[3]
SYS_PWROK
EC_PWROK[25,35]
EC_PWROK_R
PM_DRAM_PWRGD[3]
RSMRST#[35]
SUS_PWR_ACK[35]
DNBSWON#[35]
AC_PRESENT[35]
DMI_RXP1[3] DMI_RXP2[3] DMI_RXP3[3]
DMI_TXN0[3] DMI_TXN1[3] DMI_TXN2[3] DMI_TXN3[3]
DMI_TXP0[3] DMI_TXP1[3] DMI_TXP2[3] DMI_TXP3[3]
R282 49.9/F_4R282 49.9/F_4
+1.05V
R276 750/F_4R276 750/F_4
R623 *0_4/SR623 *0_4/S
R625 *0_4/SR625 *0_4/S R617 *0_4R617 *0_4
R618 *0_4/SR618 *0_4/S
R256 *0_4/SR256 *0_4/S
R624 *0_4/SR624 *0_4/S
R638 *0_4/SR638 *0_4/S
R630 *0_4R630 *0_4
8/6: PV modify
DMI_COMP DMI_RBIAS
SUSACK#_R
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
3VS5)
(+
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / G P IO72
A10
RI#
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
DMI
FDI
DMI
FDI
FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16 AV12 BC10 AV14 BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
R642 *0_4/SR642 *0_4/S
PCIE_WAKE#
CLKRUN#
PCH_SUSCLK_L
R219 *0_4/SR219 *0_4/S
R600 *0_4/SR600 *0_4/S
SLP_LAN#
TP66TP66
R271 *0_4/SR271 *0_4/S
TP54TP54
5/7: DEL R8304 , Add TP9041
FDI_TXN0 [3] FDI_TXN1 [3] FDI_TXN2 [3] FDI_TXN3 [3] FDI_TXN4 [3] FDI_TXN5 [3] FDI_TXN6 [3] FDI_TXN7 [3]
FDI_TXP0 [3] FDI_TXP1 [3] FDI_TXP2 [3] FDI_TXP3 [3] FDI_TXP4 [3] FDI_TXP5 [3] FDI_TXP6 [3] FDI_TXP7 [3]
FDI_INT [3] FDI_FSYNC0 [3] FDI_FSYNC1 [3] FDI_LSYNC0 [3] FDI_LSYNC1 [3]
TP67TP67
R645 *0_4/SR645 *0_4/S
DPWROK
PCIE_WAKE# [33,36]
CLKRUN# [35]
TP26TP26
TP29TP29
SLP_S5 [35]
SUSC# [35]
SUSB# [35]
5/11: add TP9048
TP25TP25
PM_SYNC [3]
6/30 : add TP
RSMRST#
5/12: modify
PCH_SUSCLK [35]
PCH_LVDS_BLON[24]
PCH_DISP_ON[24]
PCH_DPST_PWM[24]
PCH_EDIDCLK[24] PCH_EDIDDATA[24]
3/26 DB change net name.
PCH_LA_CLK#[24]
PCH_LA_CLK[24]
PCH_LA_DATAN0[24] PCH_LA_DATAN1[24] PCH_LA_DATAN2[24]
PCH_LA_DATAP0[24] PCH_LA_DATAP1[24] PCH_LA_DATAP2[24]
PCH_LB_CLK#[24] PCH_LB_CLK[24]
PCH_LB_DATAN0[24] PCH_LB_DATAN1[24] PCH_LB_DATAN2[24]
PCH_LB_DATAP0[24] PCH_LB_DATAP1[24] PCH_LB_DATAP2[24]
PCH_CRT_B[24] PCH_CRT_G[24] PCH_CRT_R[24]
PCH_DDCCLK[24] PCH_DDCDATA[24]
8/13: PV add
C916
C916
C915
C915
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
PCH_CRT_B PCH_CRT_G PCH_CRT_R
C917
C917
*220P/50V_4
*220P/50V_4
PCH_EDIDCLK PCH_EDIDDAT
CTRL_CLK CTRL_DATA
LVD_IBG
PCH_LA_CLK# PCH_LA_CLK
PCH_LA_DATAN0 PCH_LA_DATAN1 PCH_LA_DATAN2
PCH_LA_DATAP0 PCH_LA_DATAP1 PCH_LA_DATAP2
PCH_LB_CLK# PCH_LB_CLK
PCH_LB_DATAN0 PCH_LB_DATAN1 PCH_LB_DATAN2
PCH_LB_DATAP0 PCH_LB_DATAP1 PCH_LB_DATAP2
PCH_CRT_B PCH_CRT_G PCH_CRT_R
PCH_HSYNC_R PCH_VSYNC_R
Cougar Point (LVDS,DDI)
U44D
U44D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
T2T2
DAC_IREF
R689
R689 1K/F_4
1K/F_4
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJ H FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJ H FCBGA TOP B/S
LVDS
LVDS
CRT
CRT
+1.05V [8,9,11,34,35,41] +3V_RTC [8,11] +3V_DSW [8,11] +3VPCU [8,25,32,34,35,36,37,38,39,40,42,44,45,47] +3VS5 [3,8,9,10,11,45] +3V [3,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5V [8,11,19,25,26,27,29,30,32,34,36,37,45]
SDVO_CTRLDATA
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLDATA
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_CTRLCLK
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_CTRLCLK
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_CLK [27] SDVO_DATA [27]
DPB_HPD_Q DPB_LANE0_N
DPB_LANE0_P DPB_LANE1_N DPB_LANE1_P DPB_LANE2_N DPB_LANE2_P DPB_LANE3_N DPB_LANE3_P
29
INT. HDMI
PCH Pull-high/low(CLG)
PM_RI# PM_BATLOW# PCIE_WAKE# SLP_LAN# SUS_PWR_ACK AC_PRESENT_R
A A
CLKRUN# XDP_DBRST#
RSMRST# SYS_PWROK
R615 10K_4R615 10K_4 R616 *8.2K_4R616 *8.2K_4 R614 10K_4R614 10K_4 R632 *10K_4R632 *10K_4 R627 10K_4R627 10K_4 R629 10K_4R629 10K_4
R591 8.2K_4R591 8.2K_4 R583 10K_4R583 10K_4 R576 *1K_4R576 *1K_4 R647 10K_4R647 10K_4 R621 *10K_4R621 *10K_4
7/2 SI modify
+3VS5 +3VPCU+3VS5
+3V
5
INT LVDS & CRT disable (DIS only remove)
8/17: PV modify
+3V
PCH_HSYNC[24] PCH_VSYNC[24]
PD Res place close to PCH PCH to Res routeing 50 ohm Impedance.
Res to connector filter routeing 37.5ohm Impedance.
R313 *150/F_4R313 *150/F_4 R318 *150/F_4R318 *150/F_4 R321 *150/F_4R321 *150/F_4
3/26 DB change net name.
R690 *2.2K_4R690 *2.2K_4 R691 *2.2K_4R691 *2.2K_4
R294 *2.37K/F_4R294 *2.37K/F_4
R323 *33_4R323 *33_4 R325 *33_4R325 *33_4
CTRL_CLK CTRL_DATA
LVD_IBG
PCH_HSYNC_R PCH_VSYNC_R
4/29 modify
PCH_CRT_B PCH_CRT_G PCH_CRT_R
4
DPB_LANE0_N DPB_LANE0_P DPB_LANE1_N DPB_LANE1_P DPB_LANE2_N DPB_LANE2_P DPB_LANE3_N DPB_LANE3_P
C420 *0_4/SC420 *0_4/S C421 *0_4/SC421 *0_4/S C422 *0_4/SC422 *0_4/S C426 *0_4/SC426 *0_4/S C433 *0_4/SC433 *0_4/S C432 *0_4/SC432 *0_4/S C434 *0_4/SC434 *0_4/S C435 *0_4/SC435 *0_4/S
INT HDMI Detect Function
R715 *0_4R715 *0_4
DPB_HPD_Q
R711
R711 *100K_4
*100K_4
1
Q47
Q47
2
*2N7002K
*2N7002K
+5V
9/26: MV modify
3
R707
R707 *100K_4
*100K_4
IN_D2# [27] IN_D2 [27] IN_D1# [27] IN_D1 [27] IN_D0# [27] IN_D0 [27] IN_CLK# [27] IN_CLK [27]
HDMI_HPD_CON [27]
3
System PWR_OK(CLG)
C779 *0.1U/10V_4C779 *0.1U/10V_4
SYS_PWROK
+3V_RTC
4
U43
U43 *TC7SH08FU
*TC7SH08FU
4/20 DB update.
8/13 PV update.
R246 0_4R246 0_4
R633 330K_4R633 330K_4
2 1
3 5
DSWVREN
On Die DSW VR Enable High = Enable ( Def ault)
Low = Disable
IMVP_PWRGD [40]
EC_PWROK
R620
R620 100K_4
100K_4
6/4 :DB2 modify
R637 *330K_4R637 *330K_4
2
DPWROK FOR DSWINT HDMI disable (DIS only remove)
+3VPCU
+3VS5
+3VPCU
5/12: modify
+3V_DSW
D16
D16
*RB500V-40
*RB500V-40 D17
D17
*RB500V-40
*RB500V-40
Q44
Q44 *PDTC144EU
*PDTC144EU
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R631
R631 *10K_4
*10K_4
2
2
1 3
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
1
3
1
R626
R626 *10K_4
*10K_4
Q43
Q43 *2N7002
*2N7002
DPWROK
C780
C780 *0.1U/10V_4
*0.1U/10V_4
add cap to timing tune
of
of
of
747Wednesday, October 13, 2010
747Wednesday, October 13, 2010
747Wednesday, October 13, 2010
1A
1A
1A
5
TP68TP68 TP69TP69
6/30 SI Modify
TP74TP74
R275 1M_4R275 1M_4
D D
C C
B B
+3V_RTC
6/30 SI Modify
+3VPCU
PCH Strap Table
Pin Name Strap descriptio n Sampled Co n fi g uration
SPKR
TP70TP70
SPKR[29]
ACZ_SDIN0[29]
TP32TP32
TP31TP31
TP23TP23 TP18TP18 TP17TP17 TP16TP16
R572 *10K_4R572 *10K_4
Different from Calpella
RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN
ACZ_BCLK ACZ_SYNC SPKR ACZ_RST#
ACZ_SDOUT
GPIO33
PCH_JTAG_TCK_R PCH_JTAG_TMS PCH_JTAG_TDI_R PCH_JTAG_TDO_R
PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#
PCH_SPI_SI PCH_SPI_SO
No reboot mode setting PWROK
GNT3# / GPIO55 T
Cougar Point (HDA,JTAG,SATA)
U44A
U44A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
op-Block Swap Override
PWROK
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up HDA_DOCK_EN#/GPIO33 GNT1# / GPIO51
GPIO19
Different from Calpella
GNT2# / GPIO53 NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1] Boot BIOS Selection 0 [bit-0] ESI strap (Server only)
Intel Anti-Theft HDD protection
Only for Interposer
DMI Termin a tion voltage
HDA_SDO PW GPIO8
GPIO28
Different from Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST# On-die PLL Voltage Regulator RSMRST#
PWROK PWROK PWROK PWROK PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
ROKFlash Descriptor Security
SPI_MOSI iTPM function Disable APWROK
5
4
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
LDRQ0#
LDRQ1# / GPIO23
(+3V)
SERIRQ
SATA0RXN SATA0RXP SATA0TXN
SATA0TXP
SATA1RXN SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN SATA2RXP SATA2TXN
SATA2TXP
SATA3RXN SATA3RXP SATA3TXN
SATA3TXP
SATA
SATA
SATA4RXN SATA4RXP SATA4TXN
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
11 00
Should not be pull-down (weak pull-up 20K)
weak pull-down 20kohm
0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V
0 = Override
1 = Default (weak pull-up 20K)
0 = Disable
1 = Enable (Default) 0 = Default (weak pull-down 20K)
1 = Enable
4
4/29 DB change net name.
C38 A38 B37 C37
D36 E36
K36 V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11 Y10
AB12 AB13
AH1
P3 V14 P1
Boot Location
3/26 DB change net name.
LAD0 [35,36] LAD1 [35,36] LAD2 [35,36] LAD3 [35,36]
PCH_DRQ#0 PCH_DRQ#1
SERIRQ
SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C
SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C
LFRAME# [35,36]
TP33TP33 TP34TP34
R245 8.2K_4R245 8.2K_4
C882 0.01U/25V_4C882 0.01U/25V_4 C881 0.01U/25V_4C881 0.01U/25V_4 C368 0.01U/25V_4C368 0.01U/25V_4 C363 0.01U/25V_4C363 0.01U/25V_4
C688 0.01U/25V_4C688 0.01U/25V_4 C683 0.01U/25V_4C683 0.01U/25V_4 C375 0.01U/25V_4C375 0.01U/25V_4 C373 0.01U/25V_4C373 0.01U/25V_4
3/26 DB modify for pl acement.
DG recommended that AC coupling capacitors should be close to the connector (<100 mils) for optimal signal quality.
SATA_RXN4_C SATA_RXP4_C SATA_TXN4_C SATA_TXP4_C
SATA_RXN5_C SATA_RXP5_C SATA_TXN5_C SATA_TXP5_C
C562 0.01U/25V_4C562 0.01U/25V_4 C566 0.01U/25V_4C566 0.01U/25V_4 C365 0.01U/25V_4C365 0.01U/25V_4 C366 0.01U/25V_4C366 0.01U/25V_4
C716 0.01U/25V_4C716 0.01U/25V_4 C713 0.01U/25V_4C713 0.01U/25V_4 C372 0.01U/25V_4C372 0.01U/25V_4 C371 0.01U/25V_4C371 0.01U/25V_4
3/26 DB modify for pl acement.
SATA_COMP
SATA3_COMP
SATA3_RBIAS
DGT_STOP# BBS_BIT0
SPI
LPC
R260 37.4/F_4R260 37.4/F_4
R263 49.9/F_4R263 49.9/F_4
R597 750/F_4R597 750/F_4
R590 10K_4R590 10K_4
+3V
+3V
DGT_STOP# [32]
SPKR
R687 *1K_4R687 *1K_4 R700 10K_4R700 10K_4
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS] Default weak pull-up on GNT 0/1#
USE GPIO PIN
+1.8V
4/29 modify
+1.8V
+3VS5
GPIO33_E[35]
PCH_SPI_SI
R595 2.2K_4R595 2.2K_4
3
+1.05V [7,9,11,34,35,41] +1.8V [5,11,39,45] +3V_RTC [7,11] +3V_DSW [7,11] +3VPCU [7,25,32,34,35,36,37,38,39,40,42,44,45,47] +3V [3,7,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +V3.3A_1.5A_HDA_IO [11]
+3V SERIRQ [35]
SATA_RXN0 [34] SATA_RXP0 [34] SATA_TXN0 [34] SATA_TXP0 [34]
SATA_RXN1 [34] SATA_RXP1 [34] SATA_TXN1 [34] SATA_TXP1 [34]
SATA_RXN4 [34] SATA_RXP4 [34] SATA_TXN4 [34] SATA_TXP4 [34]
SATA_RXN5 [32] SATA_RXP5 [32] SATA_TXN5 [32] SATA_TXP5 [32]
+1.05V
SATA_LED# [32]
5/6: modify
HDD0 (SATA3 6.0Gb/s)
5/6: modify
HDD1 (SATA3 6.0Gb/s)
5/6: modify
ODD (SATA1 1.5Gb/s)
4/29: modify
E-SATA
Bios swap GPIO 4/23.
DGT_STOP#
R215 10K_4R215 10K_4
+3V
Circuit
R568 *1K_4R568 *1K_4
R640 330K_4R640 330K_4
R659 0_4R659 0_4
1 2
R573 *1K_4R573 *1K_4 R686 *1K_4R686 *1K_4
R596 *1K_4R596 *1K_4
R307 1K_4R307 1K_4
ACZ_SDOUT
R619 *1K_4R619 *1K_4
R608 *1K_4R608 *1K_4
R634 1K_4R634 1K_4
3
+3V
PCI_GNT3# [9]
Bios request, for can't boot Capella 4/23.
+3V_RTC
BIOS_WP#
R609 4.7K_4R609 4.7K_4
4/29 reserve.
BBS_BIT0
BBS_BIT1 [9]
NV_ALE [9]
ACZ_SYNC
R662 *1K_4R662 *1K_4
ICC_EN# [10]
PLL_ODVR_EN [10]
+3V
9/30: MV modify
NV_CLE [9] H_SNB_IVB# [3]
8/12 PV Modify.
N.A at CPT EDS 0.7
+V3.3A_1.5A_HDA_IO
2
RTC Circuitry(RTC)
5/12: modify
R319 *0_6R319 *0_6
+3V_DSW
R330 *0_6/SR330 *0_6/S
+3VPCU
+3V_RTC_0
R328 1K_4R328 1K_4
12
CN29
CN29 BAT_CONN
BAT_CONN
RTC Power trace width 20mils.
6/9 : DB2 Modify Footprint
HDA Bus(CLG)
BIT_CLK_AUDIO[29] ACZ_RST#_AUDIO[29] ACZ_SDOUT_AUDIO[29]
+5V
ACZ_SYNC_AUDIO[29]
9/30 : MV Modify
6/28 SI modify
PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO PCH_SPI1_SO_R
2
R299 33_4R299 33_4 R666 33_4R666 33_4 R656 33_4R656 33_4
R748 10K_4R748 10K_4
R661 33_4R661 33_4
R785 *1M_4R785 *1M_4
6/4 : DB2 Modify
R636 *0_4/SR636 *0_4/S R635 *0_4/SR635 *0_4/S R606 *0_4/SR606 *0_4/S
R603 3.3K_4R603 3.3K_4
+3V
TP64TP64 TP65TP65
RTC Clock 32.768KHz
C789 18P/50V_4C789 18P/50V_4
C788 18P/50V_4C788 18P/50V_4
30mils
+3V_RTC
FOR DSW
+3V_RTC_2 +3V_RTC_1
D6 BAT54CD6BAT54C
ACZ_BCLK ACZ_RST# ACZ_SDOUTACZ_SDOUT
2
ACZ_SYNC
1
Q48
Q48 2N7002K
2N7002K
6/23: SI modify
Vender EON Winbond Socket
3
TP57TP57 TP58TP58
PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
C783
C783 *22P/50V_4
*22P/50V_4
BIOS_WP#
TP59TP59
Size 4MB 4MB
P/N AKE39FN0Q00 (EN25F32-100HIP) AKE391P0N00 (W25Q32BVSSIG) DG008000031
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
2:
R297 *0_6R297 *0_6
+3VS5
R208
R208 *210/F_4
*210/F_4
R209
R209 *100/F_4
*100/F_4
VDD
VSS
RTC_X1
R641
R641 10M_4
10M_4
RTC_X2
C438
C438 1U/6.3V_4
1U/6.3V_4
C428
C428 1U/6.3V_4
1U/6.3V_4
5/3 : modify
10/13: MV modify
4/29: modify
R204
R204 *210/F_4
*210/F_4
PCH_JTAG_TMS PCH_JTAG_TDI_R PCH_JTAG_TDO_R
R205
R205 *100/F_4
*100/F_4
8
R639 3.3K_4R639 3.3K_4
7 4
0.1U/10V_4
0.1U/10V_4
1
RTC_RST#
12
J2
J2 *SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST#
12
J1
J1 *SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST#RTC_RST#
PCH_JTAG_TCK_R
R233
R233 *51_4
*51_4
C784
C784
847Wednesday, October 13, 2010
847Wednesday, October 13, 2010
847Wednesday, October 13, 2010
+3V
of
of
of
23
Y4
Y4
32.768KHZ
32.768KHZ
4 1
R327
R327
20K/F_4
20K/F_4
R317
R317 20K/F_4
20K/F_4
C440
C440 1U/6.3V_4
1U/6.3V_4
4/20 DB add.
PCH JTAG Debug(CLG)
R239
R239 *210/F_4
*210/F_4
R240
R240 *100/F_4
*100/F_4
PCH SPI ROM(CLG)
U42
U42
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
SPI Flash Socket
SPI Flash Socket
9/30: MV modify
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
1A
1A
1A
5
Cougar Point-M (PCI,USB,NVRAM)
U44E
U44E
PCI/USBOC# Pull-up(CLG)
3/26 DB change Part reference.
DGPU_HOLD_RST#
1
INTH#
2
BT_COMBO_EN#
3
DGPU_SELECT#
56
3/26 DB change Part reference.
USB_OC6#
1
USB_OC0#
2
USB_OC7#
3
USB_OC5#
56
C897 *27P/50V_4C897 *27P/50V_4 C898 *27P/50V_4C898 *27P/50V_4
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
BT_COMBO_EN# DGPU_SELECT#
BBS_BIT1 PWM_SELECT# PCI_GNT3#
MPC_PWR_CTRL# LCD_BK DGPU_HOLD_RST# INTH#
TP24TP24
PCI_PLTRST#
CLK_PCI_TPM_R CLK_PCI_CARD_R
R324 22_4R324 22_4 R316 22_4R316 22_4
R315 22_4R315 22_4
CLK_PCI_FB_R CLK_PCI_LPC_R CLK_PCI_EC_R
PLTRST#
4
R212
R212 100K_4
100K_4
+3V
PCI_PIRQA#
R310 8.2K_4R310 8.2K_4
PCI_PIRQB#
R670 8.2K_4R670 8.2K_4
PCI_PIRQC#
R296 8.2K_4R296 8.2K_4
PCI_PIRQD#
USB_OC4# USB_OC1# USB_OC2# USB_OC3#
R302 8.2K_4R302 8.2K_4
+3V
RP21
RP21
10
9 8 7 4
10K_10P8R_6
10K_10P8R_6
+3VS5
RP20
RP20
10
9 8 7 4
10K_10P8R_6
10K_10P8R_6
D D
MPC_PWR_CTRL# EDID_SELECT#
LCD_BK
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
C C
CLK_33M_DEBUG
L63 *33nH/600mA_6L63 *33nH/600mA_6
CLK_33M_KBC
L64 *33nH/600mA_6L64 *33nH/600mA_6
Low = MPC ON High = MPC OFF (Default)
R682 *1K_4R682 *1K_4
6/28: DB2 reserve
BT_COMBO_EN#[36] DGPU_SELECT#
EDID_SELECT#
BBS_BIT1[8]
PWM_SELECT#
PCI_GNT3#[8]
LCD_BK[25]
DGPU_HOLD_RST#[37]
INTH#[30]
B B
TP56TP56
CLK_33M_KBC[35]
CLK_PCI_FB
+3VS5
2 1
3 5
TP36TP36
C362 *0.1U/10V_4C362 *0.1U/10V_4
U18
U18 *TC7SH08FU
*TC7SH08FU
PLTRST# [3,33,35,36,37]
CLK_33M_DEBUG[36]
PLTRST#(CLG)
PCI_PLTRST#
R228
R228
4/29 modify
*0_4/S
*0_4/S
A A
PLTRST#
PEG Clock detect (SG only)
DGPU_PWROK_1 [43]
2
CLK_PEGA_REQ#
Q29
Q29 *2N7002
*2N7002
3
6/9: modify
5
1
PCI_PME#
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
RSVD
RSVD
(+3V) (+3V) (+3V)
(+3V) (+3V) (+3V)
(+3V) (+3V) (+3V) (+3V)
SMBus/Pull-up(CLG)
4/20 modify
SMB_PCH_DAT
SMB_PCH_CLK
MBCLK2[14,30,35]
MBDATA2[14,30,35]
Q18
Q18 2N7002K
2N7002K
2N7002K
2N7002K
Q14
Q14
+3V
Q15
Q15
2N7002K
2N7002K
3
2
+3V
2
3
PCI
PCI
(+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5)
1
2 2
1
1
R300 4.7K_4R300 4.7K_4 R298 4.7K_4R298 4.7K_4
1
Q17
Q17 2N7002K
2N7002K
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
NV_RCOMP
NV_RE#_WRB0 NV_RE#_WRB1
NV_WE#_CK0 NV_WE#_CK1
USB
USB
USBRBIAS#
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
SMB_ME1_CLK
3
R257 2.2K_4R257 2.2K_4
R270 2.2K_4R270 2.2K_4
SMB_ME1_DAT
3
SMB_RUN_DAT [13,14]
SMB_RUN_CLK [13,14]
4
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_ALE NV_CLE
NV_RB#
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS
+3VS5
4
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AY1
AV10 AT8 AY5
BA2 AT12
BF3
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
WLAN
LAN
NV_ALE NV_CLE
3/26 DB change from Port5 & Port6 to Port12 & Port13 for DF PCH.
USB_BIAS
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
NV_ALE [8] NV_CLE [8]
USBP0- [32] USBP0+ [32] USBP1- [32] USBP1+ [32] USBP2- [32] USBP2+ [32] USBP3- [32] USBP3+ [32] USBP4- [25] USBP4+ [25]
USBP8- [32] USBP8+ [32] USBP9- [32] USBP9+ [32] USBP10- [36] USBP10+ [36] USBP11- [32] USBP11+ [32] USBP5- [28] USBP5+ [28] USBP6- [32] USBP6+ [32]
R654
R654
22.6/F_4
22.6/F_4
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1# CLK_PCIE_REQ2#
CLK_PCIE_REQ0# CLK_PCIE_REQ3# CLK_PCIE_REQ4#
CLK_PEGB_REQ# CLK_PEGA_REQ# CLK_PEGA_REQ#
CLK_BUF_BCLK_N CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL# CLK_BUF_PCIE_3GPLL CLK_BUF_DREFCLK# CLK_BUF_DREFCLK CLK_BUF_DREFSSCLK# CLK_BUF_DREFSSCLK CLK_PCH_14M
CLOCK TERMINATION for FCIM
PCIE_RXN2_LAN[33]
PCIE_RXP2_LAN[33] PCIE_TXN2_LAN[33] PCIE_TXP2_LAN[33]
C892 *.1U/10V_4C892 *.1U/10V_4
PCH_CLK_27M_1
Left_USB E-Sata Fingerprint Touchscreen Webcam
Right_USB 17" Right_USB 15" WLAN Right_USB 15" Card Reaer Blue tooth
Ra Rb
PCIE_RXN1[36] PCIE_RXP1[36]
PCIE_TXN1[36] PCIE_TXP1[36]
R238 10K_4R238 10K_4 R229 10K_4R229 10K_4
R599 10K_4R599 10K_4 R610 10K_4R610 10K_4 R247 10K_4R247 10K_4
R244 10K_4R244 10K_4 R236 *10K_4R236 *10K_4 R227 10K_4R227 10K_4
SG : Rb ; UMA : Ra
R289 10K_4R289 10K_4 R288 10K_4R288 10K_4
R269 10K_4R269 10K_4 R265 10K_4R265 10K_4 R290 10K_4R290 10K_4 R286 10K_4R286 10K_4 R242 10K_4R242 10K_4 R243 10K_4R243 10K_4 R309 10K_4R309 10K_4
3
C414 0.1U/10V_4C414 0.1U/10V_4 C410 0.1U/10V_4C410 0.1U/10V_4
C418 0.1U/10V_4C418 0.1U/10V_4 C419 0.1U/10V_4C419 0.1U/10V_4
5/13: add for leakage
7/2 : Modify +3v
9/26: MV modify
+3V
DGPU_PWROK [10,35,42,43,47]
1
5
U49
U49
2 4
*74LVC1G126
*74LVC1G126
Bios swap GPIO 4/23.Bios swap GPIO 4/23.
TP22TP22
+3V
+3VS5
3
Cougar Point-M (PCI-E,SMBUS,CLK)
U44B
U44B
BG34
PERN1
BJ34
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_LAN_C PCIE_TXP2_LAN_C
PCH_CLK_27M [18]
CLK_PCH_SRC0N CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
BOARD_ID0[10]
CLK_PEGB_REQ#
BOARD_ID1[10] BOARD_ID2[10]
TP30TP30 TP27TP27
CLK_PCH_ITPN CLK_PCH_ITPP
PCIE Clock
WLAN
LAN
GPU
CLK_PCIE_WLANN[36] CLK_PCIE_WLANP[36]
PCIE_CLKREQ_WLAN#[36]
CLK_PCIE_LANN[33] CLK_PCIE_LANP[33]
PCIE_CLKREQ_LAN#[33]
CLK_PCIE_VGA#[15]
CLK_PCIE_VGA[15]
+3VS5 [3,7,8,10,11,45] +3V [3,7,8,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47]
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
(+3V)
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
(+3VS5)
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
(+3VS5)
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
PCI-E*
PCI-E*
3/26 DB change Part reference.
R577 *0_4/SR577 *0_4/S
3/26 DB change Part reference.
R589 *0_4/SR589 *0_4/S
3/26 DB change Part reference.
RP14
RP14
2
0_4P2R_4
0_4P2R_4
4
Remove for UMA only.
2
(+3VS5)
SMBALERT# / GPIO11
SMBCLK
SMBDATA
(+3VS5)
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
Link
Link
PEG_A_CLKRQ# / GPIO47
CLOCKS
CLOCKS
FLEX CLOCKS
FLEX CLOCKS
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
CLK_PCH_SRC0N CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCH_PEGAN
1
CLK_PCH_PEGAP
3
2
SML0CLK
SML0DATA
(+3VS5) (+3VS5)
SML1CLK / GPIO58
(+3VS5)
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
(+3V)
CLKOUTFLEX0 / GPIO64
(+3V)
CLKOUTFLEX1 / GPIO65
(+3V)
CLKOUTFLEX2 / GPIO66
(+3V)
CLKOUTFLEX3 / GPIO67
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
CL_CLK_R
M7
CL_DAT_R
T11
CL_RST#_R
P10
CLK_PEGA_REQ#
M10
CLK_PCH_PEGAN
AB37
CLK_PCH_PEGAP
AB38
AV22 AU22
AM12 AM13
CLK_BUF_PCIE_3GPLL#
BF18
CLK_BUF_PCIE_3GPLL
BE18
CLK_BUF_BCLK_N
BJ30
CLK_BUF_BCLK_P
BG30
CLK_BUF_DREFCLK#
G24
CLK_BUF_DREFCLK
E24
CLK_BUF_DREFSSCLK#
AK7
CLK_BUF_DREFSSCLK
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
CLK_FLEX0
K43
CLK_FLEX1
F47
CLK_FLEX2
H47
CLK_FLEX3
K49
1
DRAMRST_CNTRL_PCH [3]
TP28TP28
TP19TP19
TP21TP21
TP20TP20
CLK_CPU_BCLKN [3] CLK_CPU_BCLKP [3]
CLK_DPLL_SSCLKN [3] CLK_DPLL_SSCLKP [3]
3/26 DB del external clock generator.
TP71TP71
C830
C830 18P/50V_4
18P/50V_4
21
R683
R683
Y5
1M_4
1M_4
25MHzY525MHz
C829
C829 18P/50V_4
18P/50V_4
R688 90.9/F_4R688 90.9/F_4
4/29: remove CLK_27M_VGA
TP35TP35
5/13: modify CLK_48M to CLK_FLEX1
R304 22_4R304 22_4
Rb
R692 *22_4R692 *22_4
Remove Ra, Rb for UMA & SG. 27MHz support DIS only.
+3VS5
R250 1K_4R250 1K_4 R252 10K_4R252 10K_4
R268 2.2K_4R268 2.2K_4 R264 2.2K_4R264 2.2K_4 R607 2.2K_4R607 2.2K_4 R261 2.2K_4R261 2.2K_4 R258 10K_4R258 10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PD7
PD7
PD7
Date: Sheet
Date: Sheet
Date: Sheet
TP72TP72
+1.05V
CLK_48M_CR [28]
TP55TP55
PCH_CLK_27M_1
SMBus/Pull-up(CLG)
DRAMRST_CNTRL_PCH SMBALERT#
SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#_R
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
2;
of
of
of
947Wednesday, October 13, 2010
947Wednesday, October 13, 2010
947Wednesday, October 13, 2010
1A
1A
1A
5
にイオわらェえへイゑィォえぐはへぱぷごまほほょぶにぼのごぺほまぬけ
にイオわらェえへイゑィォえぐはへぱぷごまほほょぶにぼのごぺほまぬけ
5/23: stuff for bios
Bios swap GPIO 4/23.
PCI_SERR#[35] SIO_EXT_SMI#[35] SIO_EXT_SCI#[35]
BT_OFF#[32,36]
D D
Reserve
ACCLED_EN[32]
ICC_EN#[8]
LAN_DISABLE#[33]
RF_OFF#[36]
ODD_PRSNT#[34]
DGPU_PWROK[9,35,42,43,47]
R222 *0_4/SR222 *0_4/S
4/29 modify
R248 *0_4/SR248 *0_4/S
R580 *0_4R580 *0_4
R213 *0_4R213 *0_4
Bios swap GPIO 4/23.
PLL_ODVR_EN[8]
9/26: MV Modify
DGPU_PWR_EN[35,42,43]
C C
R613 *0_4/SR613 *0_4/S
R231 *0_4R231 *0_4
Bios swap GPIO 4/23.
DGT_RESET[32]
B B
+3VS5 [3,7,8,9,11,45] +3V [3,7,8,9,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47]
S_GPIO SIO_EXT_SMI# SIO_EXT_SCI# BT_OFF# ICC_EN# LAN_DISABLE#_R RF_OFF#
ODD_PRSNT#_R
DGPU_PWROK BIOS_REC BOARD_ID5 GPIO27 PLL_ODVR_EN_R BOARD_ID3 BOARD_ID4 DGPU_PWR_EN_R FDI_OVRVLTG MFG_MODE DGPU_PRSNT# TEST_SET_UP DGT_RESET SV_DET
にイオわらェえへイゑィォえぐはへぱぷごまほほょぶにぼのごぺほまぬけにイオわらェえへイゑィォえぐはへぱぷごまほほょぶにぼのごぺほまぬけ
U44F
U44F
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
BOARD ID SETTING
BOARD_ID4
Model
LX3 UMA
LX5 UMA 0
N
N
N
N Z
Z
Z
Z N
N
N
N
5
5
A A
5
5 Z
Z
Z
Z
LX3 Capilano
"
"
"
"
XT
- SG
7
7
7
7
F
F
F
F
LX5 Capilano
"
"
"
"
K
K
K
K
- SG
XT
F
F
F
F
U
U
U
U
LX5 Capilano XT -
K
K
K
K
E
E
E
E
G/Subwoofer
S
U
U
U
U
T
T
T
T E
LX5 DISCRETE
E
E
E
G
G
G
G
Subwoofer
T
T
T
T
V
V
V
V G
G
G
G
G
G
G
G V
V
V
V G
G
G
G
BOARD_ID5
0
0
0
0
0
0
0
0
0
0
000
5
0
0
0
00
000
BOARD_ID1BOARD_ID2BOARD_ID3
BOARD_ID0
00000
0
0
0
1
1
1
1
1
0
0
1
1
1
0
0
0
1
0
1
1
1
4
TACH4 / GPIO68
(+3V)
TACH5 / GPIO69
(+3V)
TACH6 / GPIO70
(+3V)
TACH7 / GPIO71
(+3V)
A20GATE
PECI
RCIN#
PROCPWRGD
CPU/MISC
CPU/MISC
VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
THRMTRIP#
INIT3_3V#
NC_1 NC_2 NC_3 NC_4 NC_5
BOARD_ID0 BOARD_ID1 BOARD_ID2
GPIO
GPIO
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
BOARD_ID0[9] BOARD_ID1[9] BOARD_ID2[9]
RD0
R611 *10K_4R611 *10K_4
RD1
R220 *10K_4R220 *10K_4
RD2
R255 10K_4R255 10K_4
RD3
R594 10K_4R594 10K_4
RD4
R567 10K_4R567 10K_4
RD5
R311 10K_4R311 10K_4
4
3
5/11 stuff R9144
C40 B41 C41 A40
P4 AU16 P5 AY11 AY10 T14
AH8 AK11 AH10 AK10 P37
GPIO68 GPIO69 GPIO70 GPIO71
EC_RCIN#
PCH_THRMTRIP#
R675 10K_4R675 10K_4 R676 1.5K/F_4R676 1.5K/F_4
R680 *1.5K/F_4R680 *1.5K/F_4
R253 390_4R253 390_4
R249 *0_4/SR249 *0_4/S
+3V
+3V
EC_A20GATE [35]
EC_RCIN# [35] H_PWRGOOD [3] PM_THRMTRIP# [3,35]
DG rev0.9 suggest to TS_VSS connect to GND 4/23.
BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49
RU0
R612 10K_4R612 10K_4
RU1
R226 10K_4R226 10K_4
RU2
R254 *10K_4R254 *10K_4
RU3
R592 *10K_4R592 *10K_4
RU4
R566 *10K_4R566 *10K_4
RU5
R301 *10K_4R301 *10K_4
4/29 modify
+3VS5
+3V
+3VS5
3
Intel ME Crypto Transport Layer Security (TLS) cipher suite
Low = Disable (Default) High = Enable
R234 *0_4R234 *0_4
SV_SET_UP
High = Strong (Default)
DMI TERMINATION VOLTAGE OVERRIDE
R581 *100K_4R581 *100K_4
MFG-TEST
MFG_MODE
Bios swap GPIO 4/23.
S_GPIO
RF_OFF#
TEST_SET_UP
Low = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)
R575 10K_4R575 10K_4 R574 *0_4R574 *0_4
R221 10K_4R221 10K_4 R216 *0_4R216 *0_4
R598 1K_4R598 1K_4
R232 10K_4R232 10K_4
R230 200K/F_4R230 200K/F_4
GFX Present
SG Ra Rb
RaRb
R582 10K_4R582 10K_4
UMA Rb Ra
DGPU_PRSNT#
Stu
ff
NC
2
1
Clock Gen Power OK (CLG)
3/26 DB del external clock generator.
GPIO Pull-up/Pull-down(CLG)
+3V
LAN_DISABLE#_R ACCLED_EN
SIO_EXT_SCI# SIO_EXT_SMI# BT_OFF# EC_A20GATE EC_RCIN# DGT_RESET
+3V
+3VS5
GPIO70 GPIO71 ODD_PRSNT#_R DGPU_PWROK
DGPU_PWROK GPIO27
R206 *0_4R206 *0_4
BIOS RECOVERY High = Disable (Default)
+3V
R602 100K_4R602 100K_4
+3V +3V
R218 100K_4R218 100K_4
FDI TERMINATION VOLTAGE OVERRIDE
+3V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
R579 10K_4R579 10K_4 R251 10K_4R251 10K_4
R305 10K_4R305 10K_4 R679 10K_4R679 10K_4 R308 10K_4R308 10K_4 R223 10K_4R223 10K_4 R224 10K_4R224 10K_4 R578 10K_4R578 10K_4 R673 1.5K/F_4R673 1.5K/F_4 R668 1.5K/F_4R668 1.5K/F_4 R214 10K_4R214 10K_4 R303 10K_4R303 10K_4
R306 *10K_4R306 *10K_4 R267 10K_4R267 10K_4
4/29 modify
BIOS_REC
R207 10K_4R207 10K_4
Low = Enable
SV_DET
R601 *10K_4R601 *10K_4
TEST DETECT
Low = Default
FDI_OVRVLTGDGPU_PWR_EN_R
LOW - Tx, Rx terminated to same voltage
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
+3VS5
+3V
R217 *1K_4R217 *1K_4
32
+3V
+3V
of
of
of
10 47Wednesday, October 13, 2010
10 47Wednesday, October 13, 2010
10 47Wednesday, October 13, 2010
1A
1A
1A
5
4
3
2
1
Cougar Point-M (POWER)
COUGAR POINT (POWER)
U44G
U44G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
C831 1U/6.3V_4C831 1U/6.3V_4
+
+
C867 *220U/2.5V_3528
C867 *220U/2.5V_3528
C818 1U/6.3V_4C818 1U/6.3V_4
+
+
C824 *220U/2.5V_3528
C824 *220U/2.5V_3528
5/14 modify
C852 1U/6.3V_4C852 1U/6.3V_4
L55
L55 10uH/100mA_8
10uH/100mA_8
C853 10U/6.3VS_6C853 10U/6.3VS_6
2
CRTLVDS
CRTLVDS
VCC CORE
VCC CORE
VCCIO
VCCIO
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
FDI
FDI
VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCADAC
VSSADAC
VCCALVDS VSSALVDS
VCC3_3[6] VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
+5V_PCH_VCC5REF
V5REF= 1mA
+5V_PCH_VCC5REFSUS
VCC5REFSUS=1mA
8/17: PV modify
+3V+3V_VCC_GIO
R277 *0_4/SR277 *0_4/S
C390
C390 1U/6.3V_4
1U/6.3V_4
+1.8V+VCCP_NAND
+3V+3V_VCCME_SPI
33
+3V
+1.8V+VCC_TX_LVDS
+1.05V_VTT+1.1V_VCC_DMI
+5V +3V
+5VS5 +3VS5
of
of
of
11 47Wednesday, October 13, 2010
11 47Wednesday, October 13, 2010
11 47Wednesday, October 13, 2010
1mA (10mils)
U48
U47
AK36 AK37
AM37 AM38 AP36 AP37
SG & UMA : Ra DIS : Rb
V33 V34
+VCCA_DAC_1_2
1mA (10mils)
+VCCALVDS +3V
60mA (10mils)
L52
L52
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
C846 10U/6.3VS_6C846 10U/6.3VS_6 C837 0.1U/10V_4C837 0.1U/10V_4 C844 0.01U/25V_4C844 0.01U/25V_4 R703 *0_6R703 *0_6
Ra
R665 *0_4R665 *0_4
Rb
R667 0_4R667 0_4
Ra
L51
L51
*0.1uH/250mA_8
*0.1uH/250mA_8
Rb
R693 0_4R693 0_4 C832 *22U/6.3VS_8C832 *22U/6.3VS_8 C836 *0.01U/25V_4C836 *0.01U/25V_4 C826 *0.01U/25V_4C826 *0.01U/25V_4
R669 *0_6/SR669 *0_6/S
C813
C813
0.1U/10V_4
0.1U/10V_4
42mA (10mils)
+VCCAFDI_VRM
AT16 AT20
+1.1V_VCC_DMI_CCI
AB36
C870
C870
C855
C855
*10U/6.3V_6
*10U/6.3V_6
1U/6.3V_4
1U/6.3V_4
190 mA (15mils)
AG16
AG17
AJ16
AJ17
R237 *0_8/SR237 *0_8/S
C385
C385
0.1U/10V_4
0.1U/10V_4
20mA (10mils)
V1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R571 *0_6/SR571 *0_6/S
C774
C774 1U/6.3V_4
1U/6.3V_4
R295 10_4R295 10_4 D5 RB500V-40D5 RB500V-40
C407
C407 1U/6.3V_4
1U/6.3V_4
R291 10_4R291 10_4 D4 RB500V-40D4 RB500V-40
C405
0.1U/10V_4
0.1U/10V_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
1A
1A
1A
119mA (20mils)
+3V
+1.05V+1.05V_VCCUSBCORE
+3VS5
+1.05V
+3VS5
+3V
+1.05V
+1.05V
+1.05V
+1.5VSUS +3VS5
+1.05V +1.05V_PCH_VCC
6/9: DB2 modify
7/1: SI DEL
+1.05V +1.05V_VCCAPLL_EXP
+1.05V +1.05V_VCCIO
6/9: DB2 modify
7/1: SI DEL
(Mobile 1.5V)
+1.5V
+1.05V
+1.05V +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
3
+1.05V_PCH_VCCDPLL_EXP+1.05V
R283
R283
*0_6/S
*0_6/S
L48
L48
*1uH/25mA_6
*1uH/25mA_6
C416
C416 10U/6.3VS_6
10U/6.3VS_6
R646 *0_8/SR646 *0_8/S
R708 *0_6/SR708 *0_6/S R709 *0_6R709 *0_6
+1.05V_VTT
+1.05V
L53
L53 10uH/100MA_8
10uH/100MA_8
L50
L50 10uH/100MA_8
10uH/100MA_8
+3V
R714 *0_6R714 *0_6 R720 1/F_4R720 1/F_4
R724 *1/F_4R724 *1/F_4 R730 *0_4/SR730 *0_4/S
1.3 A (60mils)
C400
C400 1U/6.3V_4
1U/6.3V_4
C391
C391 10U/6.3VS_6
10U/6.3VS_6
C791
C791 *10U/6.3V_6
*10U/6.3V_6
2.925 A (140mils)
C412
C412 1U/6.3V_4
1U/6.3V_4
C398
C398 1U/6.3V_4
1U/6.3V_4
+3V_VCC_EXP+3V
160mA (15mils)
+VCCAFDI_VRM
+1.05V
20mA (10mils)
20mA (10mils)
C394
C394 1U/6.3V_4
1U/6.3V_4
C399
C399 1U/6.3V_4
1U/6.3V_4
C411
C411 1U/6.3V_4
1U/6.3V_4
C404
C404 1U/6.3V_4
1U/6.3V_4
C799
C799
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
R588 *0_8R588 *0_8 R259 *0_8/SR259 *0_8/S
+1.05V_VCCDPLL_FDI
65mA (10mils)
+1.05V_VCCA_A_DPL
(10mils)
8mA
+1.05V_VCCA_B_DPL
+3V_SUS_CLKF33 +3V_SUS_CLKF33_R
L54
L54 *10uH/100mA_8
*10uH/100mA_8
U44J
R695 *0_8R695 *0_8
+1.05V
R274 *0_4/SR274 *0_4/S
+3VS5
R281 *0_4R281 *0_4
+3V_DSW
C389
5/12: modify
D D
+1.05V
8/6: PV modify
L49
L49
*10uH/100mA_8
*10uH/100mA_8
+1.05V
R293
R293
*0_6/S
*0_6/S
+1.05V +1.05V_VCCEPW
6/9: DB2 modify
7/1: SI DEL
C C
R604 *0_6/SR604 *0_6/S
+1.05V
R699 *0_6/SR699 *0_6/S
+1.05V
B B
R685 *0_6/SR685 *0_6/S
+1.05V
R278 *0_6R278 *0_6
+1.05V
R273 *0_4/SR273 *0_4/S
+1.05V_VTT
V_PROC_IO=1mA (10mils)
A A
+3V_RTC
VCCRTC<1mA (10mils)
C389
0.1U/10V_4
0.1U/10V_4
+VCCAPLL_CPY_PCH
C795
C795 *10U/6.3V_6
*10U/6.3V_6
C401
C401 1U/6.3V_4
1U/6.3V_4
C777
C777
1U/6.3V_4
1U/6.3V_4
C840
C840
1U/6.3V_4
1U/6.3V_4
C833
C833
1U/6.3V_4
1U/6.3V_4
C387
C387
*1U/6.3V_4
*1U/6.3V_4
C785
C785
4.7U/6.3V_6
4.7U/6.3V_6
C808
C808 1U/6.3V_4
1U/6.3V_4
5
1.01A (60mils)
+1.05V [7,8,9,34,35,41] +1.05V_VTT [3,5,39,40] +1.5VSUS [3,5,13,14,43,45] +1.8V [5,8,39,45]
+VCCACLK
+VCCPDSW
3mA (10mils)
C377
C377
PCH_VCCDSW
*0.1U/10V_4
*0.1U/10V_4
+3V_SUS_CLKF33
4/29: modify
+VCCDPLL_CPY
+VCCSUS1
C786
C786 *1U/6.3V_4
*1U/6.3V_4
C402
C402
C395
C395
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C409
C408
C408 22U/6.3VS_8
22U/6.3VS_8
C409 22U/6.3VS_8
22U/6.3VS_8
C380
C380
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLK +VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C383
C383
0.1U/10V_4
0.1U/10V_4
+V1.05M_VCCSUS +VTT_VCCPCPU
C778
C778
0.1U/10V_4
0.1U/10V_4
C807
C807
0.1U/10V_4
0.1U/10V_4
+VCCRTCEXT
+VCCSST
C781
C781
0.1U/10V_4
0.1U/10V_4
C806
C806
0.1U/10V_4
0.1U/10V_4
U44J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNJH0T03
AJ0QNJH0T03
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
IC CTRL(989P)PCH-HM65 QNJH FCBGA TOP B/S
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
+3V_RTC [7,8] +3V_DSW [7,8] +3VS5 [3,7,8,9,10,45] +3V [3,7,8,9,10,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5VS5 [45] +5V [7,8,19,25,26,27,29,30,32,34,36,37,45]
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
4
VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]
VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]
VCC3_3[1] VCC3_3[8] VCC3_3[4]
VCC3_3[2]
VCCIO[5] VCCIO[12] VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26 P26 P28 T27 T29
+3V_VCCPUSB
T23 T24 V23 V24
+3V_VCCAUBG
P24
+VCCAUPLL
T26
+5V_PCH_VCC5REFSUS
M26
+VCCA_USBSUS
AN23
+3V_VCCPSUS
AN24
+5V_PCH_VCC5REF
P34
N20 N22
119mA (15mils)
+3V_VCCPSUS
P20 P22
AA16
266mA (20mils)
+3V_VCCPCORE
W16 T34
AJ2
AF13 AH13 AH14 AF14
+V1.1LAN_VCCAPLL
AK1
+VCCAFDI_VRM
AF11
AC16
+1.05V_VCCIO1
AC17 AD17
1.01A (60mils)
+1.05V_VCCEPW
T21
V21
T19
P32
+3V
C775
C775
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C798
C798
0.1U/10V_4
0.1U/10V_4
R684 *0_8/SR684 *0_8/S
C828
C828 1U/6.3V_4
1U/6.3V_4
R280 *0_6/SR280 *0_6/S
C396
C396
0.1U/10V_4
0.1U/10V_4
R279 *0_6/SR279 *0_6/S
C403
C403
0.1U/10V_4
0.1U/10V_4
R287 *0_6/SR287 *0_6/S
C392 *1U/6.3V_4C392 *1U/6.3V_4
R272 *0_6/SR272 *0_6/S
C393
C393 1U/6.3V_4
1U/6.3V_4
R210 *0_6/SR210 *0_6/S
C360
C360
0.1U/10V_4
0.1U/10V_4
C406
C406
0.1U/10V_4
0.1U/10V_4
R241 *0_8/SR241 *0_8/S
C374
C374 1U/6.3V_4
1U/6.3V_4
L45
L45 *10uH/100mA_8
*10uH/100mA_8 C772
C772 *10U/6.3V_6
*10U/6.3V_6
R225 *0_6/SR225 *0_6/S
C384
C384 1U/6.3V_4
1U/6.3V_4
R652 *0_4R652 *0_4 R651 *0_4/SR651 *0_4/S C405
C800
C800 *1U/6.3V_4
*1U/6.3V_4
5
4
3
2
1
IBEX PEAK-M (GND)
U44I
U44I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
D D
C C
B B
A A
5
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
4
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
3
IBEX PEAK-M (GND)
U44H
U44H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
34
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
12 47Wednesday, October 13, 2010
12 47Wednesday, October 13, 2010
12 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
4
3
2
1
JDIM1A
M_A_A[15:0][4]
D D
M_A_BS#0[4] M_A_BS#1[4] M_A_BS#2[4] M_A_CS#0[4] M_A_CS#1[4] M_A_CLKP0[4] M_A_CLKN0[4] M_A_CLKP1[4] M_A_CLKN1[4] M_A_CKE0[4] M_A_CKE1[4] M_A_CAS#[4] M_A_RAS#[4]
R153 10K_4R153 10K_4 R152 10K_4R152 10K_4
C C
B B
M_A_WE#[4]
SMB_RUN_CLK[9,14] SMB_RUN_DAT[9,14]
M_A_ODT0[4] M_A_ODT1[4]
M_A_DQSP[7:0][4]
M_A_DQSN[7:0][4]
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_A_DQ4
5
M_A_DQ5
7
M_A_DQ7
15
M_A_DQ6
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ3
16
M_A_DQ2
18
M_A_DQ9
21
M_A_DQ8
23
M_A_DQ15
33
M_A_DQ10
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ11
36
M_A_DQ21
39
M_A_DQ16
41
M_A_DQ19
51
M_A_DQ18
53
M_A_DQ20
40
M_A_DQ17
42
M_A_DQ23
50
M_A_DQ22
52
M_A_DQ25
57
M_A_DQ24
59
M_A_DQ30
67
M_A_DQ26
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ31
68
M_A_DQ27
70
M_A_DQ36
129
M_A_DQ37
131
M_A_DQ34
141
M_A_DQ38
143
M_A_DQ32
130
M_A_DQ33
132
M_A_DQ35
140
M_A_DQ39
142
M_A_DQ41
147
M_A_DQ45
149
M_A_DQ47
157
M_A_DQ46
159
M_A_DQ40
146
M_A_DQ44
148
M_A_DQ42
158
M_A_DQ43
160
M_A_DQ49
163
M_A_DQ48
165
M_A_DQ54
175
M_A_DQ55
177
M_A_DQ53
164
M_A_DQ52
166
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ61
181
M_A_DQ60
183
M_A_DQ62
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ59
192
M_A_DQ58
194
M_A_DQ[63:0] [4]
+3V
PM_EXTTS#0[14]
DDR3_DRAMRST#[3,14]
SMDDR_VREF_DQ0_M3[6]
SMDDR_VREF_DQ0_M3
R27 0_6R27 0_6 R17 *0_6R17 *0_6
6/28: SI add for RF
+1.5V
C893 2.2U/6.3V_6C893 2.2U/6.3V_6 C894 2.2U/6.3V_6C894 2.2U/6.3V_6 C895 2.2U/6.3V_6C895 2.2U/6.3V_6 C896 2.2U/6.3V_6C896 2.2U/6.3V_6
+1.5VSUS
2.48A
+3V
R133 10K_4R133 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1 +SMDDR_VREF_DIMM
+1.5VSUS
+0.75V_DDR_VTT [14,43,45] +1.5VSUS [3,5,11,14,43,45] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,42,44,45,47] +3V [3,7,8,9,10,11,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5VPCU [32,35,38,39,40,41,42,43,44,45]
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
(204P)
(204P)
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+0.75V_DDR_VTT
35
VREF DQ0 M2 Solution VREF DQ0 M1 SolutionPlace these Caps near So-Dimm0.
R112 *0_6R112 *0_6
+1.5VSUS
R31
R31 1K/F_4
1K/F_4
R106
R106 1K/F_4
1K/F_4
+1.5VSUS
R125 *0_6R125 *0_6
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
DDR_VTTREF[5,14,43]
R97
R97 10K_4
10K_4
+SMDDR_VREF_DIMM
C157
C157
R95
R95
470P/50V_4
470P/50V_4
10K_4
10K_4
13 47Wednesday, October 13, 2010
13 47Wednesday, October 13, 2010
13 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
+1.5VSUS +0.75V_DDR_VTT
C88 1U/6.3V_4C88 1U/6.3V_4 C93 1U/6.3V_4C93 1U/6.3V_4 C72 1U/6.3V_4C72 1U/6.3V_4 C56 1U/6.3V_4C56 1U/6.3V_4 C98 10U/6.3VS_6C98 10U/6.3VS_6 C61 10U/6.3VS_6C61 10U/6.3VS_6
6/23 : Del M2 solution
A A
4/29: reserve M2 solution
5
4
C46 10U/6.3VS_6C46 10U/6.3VS_6 C52 10U/6.3VS_6C52 10U/6.3VS_6 C83 10U/6.3VS_6C83 10U/6.3VS_6 C65 10U/6.3VS_6C65 10U/6.3VS_6 C47 *10U/6.3V_6C47 *10U/6.3V_6 C40 10U/6.3V_8C40 10U/6.3V_8 C38 10U/6.3V_8C38 10U/6.3V_8
4/27: layout modify
5/23: na
6/28: SI del C717
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
3
C645 1U/6.3V_4C645 1U/6.3V_4 C639 1U/6.3V_4C639 1U/6.3V_4 C634 1U/6.3V_4C634 1U/6.3V_4 C628 1U/6.3V_4C628 1U/6.3V_4 C622 10U/6.3V_6C622 10U/6.3V_6 C657 *10U/6.3V_6C657 *10U/6.3V_6
C186 0.1U/10V_4C186 0.1U/10V_4 C136 2.2U/6.3V_6C136 2.2U/6.3V_6
C21 0.1U/10V_4C21 0.1U/10V_4 C26 2.2U/6.3V_6C26 2.2U/6.3V_6
+3V
C198 0.1U/10V_4C198 0.1U/10V_4 C258 2.2U/6.3V_6C258 2.2U/6.3V_6
DDR_VTTREF SMDDR_VREF_DQ0_M1
2
5
4
3
2
1
2.48A
+3V
R511 10K_4R511 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ1
MBCLK2 MBDATA2 PM_EXTTS#0 PM_EXTTS#0_EC
R134 10K_4R134 10K_4
+1.5VSUS
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000126
DGMK4000126
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
DDR3 Thermal Sensor
U11
U11
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
G780P81U
G780P81U
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VCC DXP DXN GND
(204P)
(204P)
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
1 2 3 5
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
C261 0.01U/25V_4C261 0.01U/25V_4
DDR_THERMDA
C206
C206 2200P/50V_4
2200P/50V_4
DDR_THERMDC
+0.75V_DDR_VTT
+3V
2
36
Q10
Q10 MMBT3904-7-F
MMBT3904-7-F
1 3
JDIM2A
M_B_A[15:0][4]
D D
M_B_BS#0[4] M_B_BS#1[4] M_B_BS#2[4] M_B_CS#0[4] M_B_CS#1[4] M_B_CLKP0[4] M_B_CLKN0[4] M_B_CLKP1[4] M_B_CLKN1[4] M_B_CKE0[4] M_B_CKE1[4] M_B_CAS#[4] M_B_RAS#[4]
R154 10K_4R154 10K_4 R512 10K_4R512 10K_4
+3V
C C
B B
+0.75V_DDR_VTT [13,43,45] +1.5VSUS [3,5,11,13,43,45] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,42,44,45,47] +3V [3,7,8,9,10,11,13,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5VPCU [32,35,38,39,40,41,42,43,44,45]
M_B_WE#[4]
SMB_RUN_CLK[9,13] SMB_RUN_DAT[9,13]
M_B_ODT0[4] M_B_ODT1[4]
M_B_DQSP[7:0][4]
M_B_DQSN[7:0][4]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
DIMM1_SA0 DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000126
DGMK4000126
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_B_DQ5
5
M_B_DQ4
7
M_B_DQ3
15
M_B_DQ2
17
M_B_DQ0
4
M_B_DQ1
6
M_B_DQ6
16
M_B_DQ7
18
M_B_DQ12
21
M_B_DQ13
23
M_B_DQ14
33
M_B_DQ10
35
M_B_DQ8
22
M_B_DQ9
24
M_B_DQ11
34
M_B_DQ15
36
M_B_DQ20
39
M_B_DQ21
41
M_B_DQ18
51
M_B_DQ22
53
M_B_DQ17
40
M_B_DQ16
42
M_B_DQ19
50
M_B_DQ23
52
M_B_DQ25
57
M_B_DQ29
59
M_B_DQ27
67
M_B_DQ26
69
M_B_DQ28
56
M_B_DQ24
58
M_B_DQ31
68
M_B_DQ30
70
M_B_DQ36
129
M_B_DQ37
131
M_B_DQ35
141
M_B_DQ34
143
M_B_DQ33
130
M_B_DQ32
132
M_B_DQ39
140
M_B_DQ38
142
M_B_DQ44
147
M_B_DQ40
149
M_B_DQ42
157
M_B_DQ43
159
M_B_DQ45
146
M_B_DQ41
148
M_B_DQ46
158
M_B_DQ47
160
M_B_DQ49
163
M_B_DQ48
165
M_B_DQ54
175
M_B_DQ55
177
M_B_DQ52
164
M_B_DQ53
166
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ61
181
M_B_DQ56
183
M_B_DQ62
191
M_B_DQ63
193
M_B_DQ57
180
M_B_DQ60
182
M_B_DQ59
192
M_B_DQ58
194
M_B_DQ[63:0] [4]
SMDDR_VREF_DQ1_M3[6]
SMDDR_VREF_DQ1_M1 SMDDR_VREF_DQ1_M3
DDR3_DRAMRST#[3,13]
R483 0_6R483 0_6 R71 *0_6R71 *0_6
+3V
+SMDDR_VREF_DIMM
MBCLK2[9,30,35]
MBDATA2[9,30,35]
PM_EXTTS#0[13]
+3V
VREF DQ1 M2 Solution
+1.5VSUS
C84 1U/6.3V_4C84 1U/6.3V_4 C39 1U/6.3V_4C39 1U/6.3V_4 C66 1U/6.3V_4C66 1U/6.3V_4 C64 1U/6.3V_4C64 1U/6.3V_4
6/23 : Del M2 solution
A A
4/29 reserve M2 solution
5
4
C59 10U/6.3VS_6C59 10U/6.3VS_6 C111 10U/6.3VS_6C111 10U/6.3VS_6 C104 10U/6.3VS_6C104 10U/6.3VS_6 C53 10U/6.3VS_6C53 10U/6.3VS_6 C90 10U/6.3VS_6C90 10U/6.3VS_6 C96 10U/6.3VS_6C96 10U/6.3VS_6 C74 *10U/6.3V_6C74 *10U/6.3V_6 C125 10U/6.3V_8C125 10U/6.3V_8 C103 10U/6.3V_8C103 10U/6.3V_8
Place these Caps near So-Dimm1.
+0.75V_DDR_VTT
C254 1U/6.3V_4C254 1U/6.3V_4 C246 1U/6.3V_4C246 1U/6.3V_4 C238 1U/6.3V_4C238 1U/6.3V_4 C265 1U/6.3V_4C265 1U/6.3V_4 C260 10U/6.3V_6C260 10U/6.3V_6 C225 *10U/6.3V_6C225 *10U/6.3V_6
+3V
C669 0.1U/10V_4C669 0.1U/10V_4 C670 2.2U/6.3V_6C670 2.2U/6.3V_6
3
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1
C195 0.1U/10V_4C195 0.1U/10V_4 C156 2.2U/6.3V_6C156 2.2U/6.3V_6
C594 0.1U/10V_4C594 0.1U/10V_4 C582 2.2U/6.3V_6C582 2.2U/6.3V_6
2
VREF DQ1 M1 Solution
DDR_VTTREF[5,13,43]
R90 *0_6R90 *0_6
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+1.5VSUS
R490
R490 1K/F_4
1K/F_4
SMDDR_VREF_DQ1_M1
R84
R84 1K/F_4
1K/F_4
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
1
1A
1A
1A
of
of
of
14 47Wednesday, October 13, 2010
14 47Wednesday, October 13, 2010
14 47Wednesday, October 13, 2010
5
4
3
2
1
37
U33H
U33A
U33A
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
CLOCK
CLOCK
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AJ21
NC#1
AK21
NC#2
AH16
PWRGOOD
AA30
PERSTB
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP PCIE_CALRN
Y32
W33 W32
U33 U32
U30 U29
T33 T32
T30 T29
P33 P32
P30 P29
N33 N32
N30 N29
L33 L32
L30 L29
K33 K32
J33 J32
K30 K29
H33 H32
Y30 Y29
C_PEG_RXN15
C_PEG_RXP14 C_PEG_RXN14
C_PEG_RXP13 C_PEG_RXN13
C_PEG_RXP12 C_PEG_RXN12
C_PEG_RXP11 C_PEG_RXN11
C_PEG_RXP10 C_PEG_RXN10
C_PEG_RXP9 C_PEG_RXN9
C_PEG_RXP8 C_PEG_RXN8
C_PEG_RXP7 C_PEG_RXN7
C_PEG_RXP6 C_PEG_RXN6
C_PEG_RXP5 C_PEG_RXN5
C_PEG_RXP4 C_PEG_RXN4
C_PEG_RXP3 C_PEG_RXN3
C_PEG_RXP2 C_PEG_RXN2
C_PEG_RXP1 C_PEG_RXN1
C_PEG_RXP0 C_PEG_RXN0
PCIE_CALRP PCIE_CALRNPWRGOOD_BUF
C_PEG_RXP15
Y33
C187 0.1U/10V_4C187 0.1U/10V_4 C193 0.1U/10V_4C193 0.1U/10V_4
C175 0.1U/10V_4C175 0.1U/10V_4 C189 0.1U/10V_4C189 0.1U/10V_4
C207 0.1U/10V_4C207 0.1U/10V_4 C215 0.1U/10V_4C215 0.1U/10V_4
C202 0.1U/10V_4C202 0.1U/10V_4 C208 0.1U/10V_4C208 0.1U/10V_4
C213 0.1U/10V_4C213 0.1U/10V_4 C224 0.1U/10V_4C224 0.1U/10V_4
C233 0.1U/10V_4C233 0.1U/10V_4 C245 0.1U/10V_4C245 0.1U/10V_4
C227 0.1U/10V_4C227 0.1U/10V_4 C239 0.1U/10V_4C239 0.1U/10V_4
C231 0.1U/10V_4C231 0.1U/10V_4 C242 0.1U/10V_4C242 0.1U/10V_4
C247 0.1U/10V_4C247 0.1U/10V_4 C256 0.1U/10V_4C256 0.1U/10V_4
C255 0.1U/10V_4C255 0.1U/10V_4 C259 0.1U/10V_4C259 0.1U/10V_4
C262 0.1U/10V_4C262 0.1U/10V_4 C264 0.1U/10V_4C264 0.1U/10V_4
C263 0.1U/10V_4C263 0.1U/10V_4 C270 0.1U/10V_4C270 0.1U/10V_4
C266 0.1U/10V_4C266 0.1U/10V_4 C271 0.1U/10V_4C271 0.1U/10V_4
C273 0.1U/10V_4C273 0.1U/10V_4 C275 0.1U/10V_4C275 0.1U/10V_4
C278 0.1U/10V_4C278 0.1U/10V_4 C279 0.1U/10V_4C279 0.1U/10V_4
C276 0.1U/10V_4C276 0.1U/10V_4 C277 0.1U/10V_4C277 0.1U/10V_4
R102 1.27K/F_4R102 1.27K/F_4 R94 2K/F_4R94 2K/F_4
+1.0V_VGA
PEG_RX15 [3] PEG_RX#15 [3]
PEG_RX14 [3] PEG_RX#14 [3]
PEG_RX13 [3] PEG_RX#13 [3]
PEG_RX12 [3] PEG_RX#12 [3]
PEG_RX11 [3] PEG_RX#11 [3]
PEG_RX10 [3] PEG_RX#10 [3]
PEG_RX9 [3] PEG_RX#9 [3]
PEG_RX8 [3] PEG_RX#8 [3]
PEG_RX7 [3] PEG_RX#7 [3]
PEG_RX6 [3] PEG_RX#6 [3]
PEG_RX5 [3] PEG_RX#5 [3]
PEG_RX4 [3] PEG_RX#4 [3]
PEG_RX3 [3] PEG_RX#3 [3]
PEG_RX2 [3] PEG_RX#2 [3]
PEG_RX1 [3] PEG_RX#1 [3]
PEG_RX0 [3] PEG_RX#0 [3]
+1.8V_DPC_VDD18 +1.8V_DPA_VDD18
+1.0V_DPC_VDD10
+1.8V_DPC_VDD18
+1.0V_DPC_VDD10
R426 150/F_4R426 150/F_4 R424 150/F_4R424 150/F_4
+1.8V_DPE_VDD18
+1.0V_DPE_VDD10
+1.8V_DPE_VDD18
+1.0V_DPE_VDD10
R460 150/F_4R460 150/F_4
DPCD_CALR
DPEF_CALR
CLK_PCIE_VGA CLK_PCIE_VGA#
R198 *0_4/SR198 *0_4/S
PEG_TX15 PEG_TX#15
PEG_TX14 PEG_TX#14
PEG_TX13 PEG_TX#13
PEG_TX12 PEG_TX#12
PEG_TX11 PEG_TX#11
PEG_TX10 PEG_TX#10
PEG_TX9 PEG_TX#9
PEG_TX8 PEG_TX#8
PEG_TX7 PEG_TX#7
PEG_TX6 PEG_TX#6
PEG_TX5 PEG_TX#5
PEG_TX4 PEG_TX#4
PEG_TX3 PEG_TX#3
PEG_TX2 PEG_TX#2
PEG_TX1 PEG_TX#1
PEG_TX0 PEG_TX#0
VGA_RST#
PEG_TX15[3] PEG_TX#15[3]
D D
C C
B B
Seymour/Whistler:SWAPLOCKA Madison/Capilano :NC
R62
R62 10K/F_4
10K/F_4
PEG_TX14[3] PEG_TX#14[3]
PEG_TX13[3] PEG_TX#13[3]
PEG_TX12[3] PEG_TX#12[3]
PEG_TX11[3] PEG_TX#11[3]
PEG_TX10[3] PEG_TX#10[3]
PEG_TX9[3] PEG_TX#9[3]
PEG_TX8[3] PEG_TX#8[3]
PEG_TX7[3]
PEG_TX#7[3]
PEG_TX6[3]
PEG_TX#6[3]
PEG_TX5[3]
PEG_TX#5[3]
PEG_TX4[3]
PEG_TX#4[3]
PEG_TX3[3]
PEG_TX#3[3]
PEG_TX2[3]
PEG_TX#2[3]
PEG_TX1[3]
PEG_TX#1[3]
PEG_TX0[3]
PEG_TX#0[3]
CLK_PCIE_VGA[9]
CLK_PCIE_VGA#[9]
PEGX_RST#[37]
PV Change to Short Pad
U33H
AP20
DPC_VDD18#1
AP21
DPC_VDD18#2
AP13
DPC_VDD10#1
AT13
DPC_VDD10#2
AN17
DPC_VSSR#1
AP16
DPC_VSSR#2
AP17
DPC_VSSR#3
AW14
DPC_VSSR#4
AW16
DPC_VSSR#5
AP22
DPD_VDD18#1
AP23
DPD_VDD18#2
AP14
DPD_VDD10#1
AP15
DPD_VDD10#2
AN19
DPD_VSSR#1
AP18
DPD_VSSR#2
AP19
DPD_VSSR#3
AW20
DPD_VSSR#4
AW22
DPD_VSSR#5
AW18
DPCD_CALR
DP E/F POWER
DP E/F POWER
AH34
DPE_VDD18#1
AJ34
DPE_VDD18#2
AL33
DPE_VDD10#1
AM33
DPE_VDD10#2
AN34
DPE_VSSR#1
AP39
DPE_VSSR#2
AR39
DPE_VSSR#3
AU37
DPE_VSSR#4
AF34
DPF_VDD18#1
AG34
DPF_VDD18#2
AK33
DPF_VDD10#1
AK34
DPF_VDD10#2
AF39
DPF_VSSR#1
AH39
DPF_VSSR#2
AK39
DPF_VSSR#3
AL34
DPF_VSSR#4
AM34
DPF_VSSR#5
AM39
DPEF_CALR
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
DP A/B POWERDP C/D POWER
DP A/B POWERDP C/D POWER
DPA_VDD18#1 DPA_VDD18#2
DPA_VDD10#1 DPA_VDD10#2
DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5
DPB_VDD18#1 DPB_VDD18#2
DPB_VDD10#1 DPB_VDD10#2
DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5
DPAB_CALR
DP PLL POWER
DP PLL POWER
DPC_PVDD
DPD_PVDD
NC_DPF_PVDD NC_DPF_PVSS
DPA_PVDD DPA_PVSS
DPB_PVDD DPB_PVSS
DPC_PVSS
DPD_PVSS
DPE_PVDD DPE_PVSS
AN24 AP24
AP31 AP32
AN27 AP27 AP28 AW24 AW26
AP25 AP26
AN33 AP33
AN29 AP29 AP30 AW30 AW32
AW28
AU28 AV27
AV29 AR28
AU18 AV17
AV19 AR18
AM37 AN38
AL38 AM35
DPAB_CALR
( DPA/B_VDD10 : 1.0V @ 115mA+115mA)
+1.0V_DPA_VDD10
C92
C92
C91
10U/6.3V_8
10U/6.3V_8
+1.8V_DPA_VDD18
C91
1U/6.3V_4
1U/6.3V_4
( DPA/B_PVDD : 1.8V@20mA+20mA)
+1.8V_DPB_PVDD
C51
C51
C540
10U/6.3V_8
10U/6.3V_8
C540
1U/6.3V_4
1U/6.3V_4
( DPC/D_PVDD:1.8V@20mA+20mA)
+1.8V_DPC_PVDD
( DPE/F_PVDD1.8V@20mA+20mA)
+1.8V_DPE_PVDD
C568
C565
C565
10U/6.3V_8
10U/6.3V_8
C568
0.1U/10V_4
0.1U/10V_4
C100
C100
0.1U/10V_4
0.1U/10V_4
C531
C531
0.1U/10V_4
0.1U/10V_4
C569
C569
0.1U/10V_4
0.1U/10V_4
+1.0V_VGA
L9
L9
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
+1.8V_VGA
L5
L5
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
+1.8V_VGA
+1.8V_VGA
L35
L35
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
( DPE/F_VDD18 : 1.8V@200mA+200mA)
3
+1.8V_DPE_VDD18
C581
C581
10U/6.3V_8
10U/6.3V_8
+1.8V_DPA_VDD18
C528
C528 10U/6.3VS_6
10U/6.3VS_6
SI Change
+1.8V_DPC_VDD18
C583
C580
C580
1U/6.3V_4
1U/6.3V_4
C583
0.1U/10V_4
0.1U/10V_4
( DPA/B_VDD18 : 1.8V@200mA+200mA)
C532
C532
0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
( DPC/D_VDD18 : 1.8V@200mA+200mA)
+1.8V_VGA+1.8V_VGA+1.8V_VGA
C124
C124
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
A A
MV EMI Request
C588
C588
C773
C773
0.1U/10V_4
0.1U/10V_4
SI Del R43,R38,C57
5
4
( VDD10 M97 1.0V/M96 1.1V)
( DPE/F_VDD10 : 1.0V@115mA+115mA )
+1.0V_DPE_VDD10
C118
C118
C119
C113
C113
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
1U/6.3V_4
( DPC/D_VDD10 : 1.0V@115mA+115mA)
+1.0V_DPC_VDD10
C119
0.1U/10V_4
0.1U/10V_4
+1.0V_VGA
L14
L14
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
+1.0V_VGA
C542
C542
L37
L37
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
+1.8V_VGA
+1.8V_VGA
L31
L31
+1.0V_VGA [17,19,43] +1.8V_VGA [17,19,42]
+1.8V_VGA
2
PD7
PD7
PD7
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
CATI APILANO-PRO (MEM)1/5
CATI APILANO-PRO (MEM)1/5
CATI APILANO-PRO (MEM)1/5
1
15 47Wednesday, October 13, 2010
15 47Wednesday, October 13, 2010
15 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
4
3
2
1
DQA0_[0..31][20] DQA1_[0..31][21]
MAA0_[0..8][20]
U33C
U33C
DDR2
DDR2 GDDR3/GDDR5
GDDR3/GDDR5 DDR3
DQA0_0
MVREFDA MVREFSA
R562243/F_4 R562243/F_4 R148243/F_4 R148243/F_4 R79243/F_4 R79243/F_4
R147243/F_4 R147243/F_4 R563243/F_4 R563243/F_4 R434243/F_4 R434243/F_4
DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31
D D
C C
+1.5V_VGA +1.5V_VGA
R536
R536
Ra
40.2/F_4
40.2/F_4
B B
5/3: stuff R88,R89 by AMD request
R532
R532 100/F_4
100/F_4
C695
R548
R548
40.2/F_4
40.2/F_4
C695
0.1U/10V_4
0.1U/10V_4
+1.5V_VGA
Rb
+1.5V_VGA
Ra
DDR3
C37
DQA0_0/DQA_0
C35
DQA0_1/DQA_1
A35
DQA0_2/DQA_2
E34
DQA0_3/DQA_3
G32
DQA0_4/DQA_4
D33
DQA0_5/DQA_5
F32
DQA0_6/DQA_6
E32
DQA0_7/DQA_7
D31
DQA0_8/DQA_8
F30
DQA0_9/DQA_9
C30
DQA0_10/DQA_10
A30
DQA0_11/DQA_11
F28
DQA0_12/DQA_12
C28
DQA0_13/DQA_13
A28
DQA0_14/DQA_14
E28
DQA0_15/DQA_15
D27
DQA0_16/DQA_16
F26
DQA0_17/DQA_17
C26
DQA0_18/DQA_18
A26
DQA0_19/DQA_19
F24
DQA0_20/DQA_20
C24
DQA0_21/DQA_21
A24
DQA0_22/DQA_22
E24
DQA0_23/DQA_23
C22
DQA0_24/DQA_24
A22
DQA0_25/DQA_25
F22
DQA0_26/DQA_26
D21
DQA0_27/DQA_27
A20
DQA0_28/DQA_28
F20
DQA0_29/DQA_29
D19
DQA0_30/DQA_30
E18
DQA0_31/DQA_31
C18
DQA1_0/DQA_32
A18
DQA1_1/DQA_33
F18
DQA1_2/DQA_34
D17
DQA1_3/DQA_35
A16
DQA1_4/DQA_36
F16
DQA1_5/DQA_37
D15
DQA1_6/DQA_38
E14
DQA1_7/DQA_39
F14
DQA1_8/DQA_40
D13
DQA1_9/DQA_41
F12
DQA1_10/DQA_42
A12
DQA1_11/DQA_43
D11
DQA1_12/DQA_44
F10
DQA1_13/DQA_45
A10
DQA1_14/DQA_46
C10
DQA1_15/DQA_47
G13
DQA1_16/DQA_48
H13
DQA1_17/DQA_49
J13
DQA1_18/DQA_50
H11
DQA1_19/DQA_51
G10
DQA1_20/DQA_52
G8
DQA1_21/DQA_53
K9
DQA1_22/DQA_54
K10
DQA1_23/DQA_55
G9
DQA1_24/DQA_56
A8
DQA1_25/DQA_57
C8
DQA1_26/DQA_58
E8
DQA1_27/DQA_59
A6
DQA1_28/DQA_60
C6
DQA1_29/DQA_61
E6
DQA1_30/DQA_62
A5
DQA1_31/DQA_63
L18
MVREFDA
L20
MVREFSA
L27
MEM_CALRN0
N12
MEM_CALRN1
AG12
MEM_CALRN2
M12
MEM_CALRP1
M27
MEM_CALRP0
AH12
MEM_CALRP2
AL31
RSVD
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
DDR2
DDR2 GDDR5/GDDR3
GDDR5/GDDR3 DDR3
DDR3
MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8
MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12
MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1
WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
MEMORY INTERFACE A
MEMORY INTERFACE A
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7
DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7
ADBIA0/ODTA0 ADBIA1/ODTA1
RASA0B RASA1B
CASA0B CASA1B
CSA0B_0 CSA0B_1
CSA1B_0 CSA1B_1
GDDR5
GDDR5
CLKA0
CLKA0B
CLKA1
CLKA1B
CKEA0 CKEA1
WEA0B WEA1B
MAA0_8 MAA1_8
G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17
A32 C32 D23 E22 C14 A14 E10 D9
C34 D29 D25 E20 E16 E12 J10 D7
A34 E30 E26 C20 C16 C12 J11 F8
J21 G19
H27 G27
J14 H14
K23 K19
K20 K17
K24 K27
M13 K16
K21 J20
K26 L15
H23 J19
MAA0_0 MAA0_1 MAA0_2 MAA0_3 MAA0_4 MAA0_5 MAA0_6 MAA0_7 MAA1_0 MAA1_1 MAA1_2 MAA1_3 MAA1_4 MAA1_5 MAA1_6 MAA1_7
WCKA0_0 WCKA0_0# WCKA0_1 WCKA0_1# WCKA1_0 WCKA1_0# WCKA1_1 WCKA1_1#
EDCA0_0 EDCA0_1 EDCA0_2 EDCA0_3 EDCA1_0 EDCA1_1 EDCA1_2 EDCA1_3
DBIA0_0 DBIA0_1 DBIA0_2 DBIA0_3 DBIA1_0 DBIA1_1 DBIA1_2 DBIA1_3
MAA0_8 MAA1_8
WCKA0_0 [20] WCKA0_0# [20] WCKA0_1 [20] WCKA0_1# [20] WCKA1_0 [21] WCKA1_0# [21] WCKA1_1 [21] WCKA1_1# [21]
EDCA0_0 [20] EDCA0_1 [20] EDCA0_2 [20] EDCA0_3 [20] EDCA1_0 [21] EDCA1_1 [21] EDCA1_2 [21] EDCA1_3 [21]
DBIA0_0 [20] DBIA0_1 [20] DBIA0_2 [20] DBIA0_3 [20] DBIA1_0 [21] DBIA1_1 [21] DBIA1_2 [21] DBIA1_3 [21]
ADBIA0# [20] ADBIA1# [21]
CLKA0 [20] CLKA0# [20]
CLKA1 [21] CLKA1# [21]
RASA0# [20] RASA1# [21]
CASA0# [20] CASA1# [21]
CSA0# [20]
CSA1# [21]
CKEA0# [20] CKEA1# [21]
WEA0# [20] WEA1# [21]
For MadisonFor PARK
R545
R545 100/F_4
100/F_4
C719
Rb
A A
C719
0.1U/10V_4
0.1U/10V_4
MEM_CALRNP0
MEM_CALRNP1
stuff
MEM_CALRNP2
DDR3/GDDR3 Memory Stuff Option
GDDR5
+1.5V_VGA
Ra 40.2R
Rb
5
1.5V
40.2R
100R
stuff
stuff
GDDR3
1.8V/1.5V
100R
DDR3
1.5V
40.2R
100R
4
MAA1_[0..8][21]
DQB0_[0..31][22] DQB1_[0..31][23]
MAB0_[0..8][22] MAB1_[0..8][23]
R142
R142
40.2/F_4
40.2/F_4
Ra
R140
R140 100/F_4
100/F_4
Rb
+1.5V_VGA
R132
R132
40.2/F_4
40.2/F_4
Ra
R131
R131 100/F_4
100/F_4
Rb
3
Park, M92M Use Channel B Memory Interface Only
U33D
U33D
DDR2
DDR2 GDDR3/GDDR5
GDDR3/GDDR5 DDR3
M6 M1 M3 M5
AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6
AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7
AM8 AM7
AK1 AL4
AM6 AM1
AN4 AP3 AP1 AP5
Y12
AA12
AD28 AK10
AL10
C539
C539 *0.1U/10V_4
*0.1U/10V_4
R420
R420 *51/F_4
*51/F_4
DDR3
C5
DQB0_0/DQB_0
C3
DQB0_1/DQB_1
E3
DQB0_2/DQB_2
E1
DQB0_3/DQB_3
F1
DQB0_4/DQB_4
F3
DQB0_5/DQB_5
F5
DQB0_6/DQB_6
G4
DQB0_7/DQB_7
H5
DQB0_8/DQB_8
H6
DQB0_9/DQB_9
J4
DQB0_10/DQB_10
K6
DQB0_11/DQB_11
K5
DQB0_12/DQB_12
L4
DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17
N4
DQB0_18/DQB_18
P6
DQB0_19/DQB_19
P5
DQB0_20/DQB_20
R4
DQB0_21/DQB_21
T6
DQB0_22/DQB_22
T1
DQB0_23/DQB_23
U4
DQB0_24/DQB_24
V6
DQB0_25/DQB_25
V1
DQB0_26/DQB_26
V3
DQB0_27/DQB_27
Y6
DQB0_28/DQB_28
Y1
DQB0_29/DQB_29
Y3
DQB0_30/DQB_30
Y5
DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63
MVREFDB MVREFSB
TESTEN CLKTESTA
CLKTESTB
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
+1.5V_VGA[19,20,21,22,23,47]
2
DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31 DQB1_0 DQB1_1 DQB1_2 DQB1_3 DQB1_4 DQB1_5 DQB1_6 DQB1_7 DQB1_8 DQB1_9 DQB1_10 DQB1_11 DQB1_12 DQB1_13 DQB1_14 DQB1_15 DQB1_16 DQB1_17 DQB1_18 DQB1_19 DQB1_20 DQB1_21 DQB1_22 DQB1_23 DQB1_24 DQB1_25 DQB1_26 DQB1_27 DQB1_28 DQB1_29 DQB1_30 DQB1_31
MVREFDB MVREFSB
+3V_VGA
C223
C223
SI Add
0.1U/10V_4
0.1U/10V_4
C197
C197
0.1U/10V_4
0.1U/10V_4
Place all these components very close to GPU (Within 25mm) and keep all component close to each Other (within 5mm) except Rser2
This basic topology should be used for DRAM_RST for
**
DDR3/GDDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec.
TESTEN
TEST_MCLK
R115
R115 *10K/F_4
*10K/F_4
R123
R123
5.11K/F_4
5.11K/F_4
TEST_YCLK
C153
C153
*0.1U/10V_4
*0.1U/10V_4
R127
R127 *51/F_4
*51/F_4
5/6: change R68 from 10k to 5.11k for AMD
MV del R567 add R68 in BOM
DDR2
DDR2 GDDR5/GDDR3
GDDR5/GDDR3 DDR3
DDR3
MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8
MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12
MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
MEMORY INTERFACE B
MEMORY INTERFACE B
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7
DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7
ADBIB0/ODTB0 ADBIB1/ODTB1
CLKB0
CLKB0B
CLKB1
CLKB1B RASB0B
RASB1B CASB0B
CASB1B
CSB0B_0 CSB0B_1
CSB1B_0 CSB1B_1
CKEB0 CKEB1
WEB0B WEB1B
MAB0_8 MAB1_8
GDDR5
GDDR5
DRAM_RST
MAB0_0
P8
MAB0_1
T9
MAB0_2
P9
MAB0_3
N7
MAB0_4
N8
MAB0_5
N9
MAB0_6
U9
MAB0_7
U8
MAB1_0
Y9
MAB1_1
W9
MAB1_2
AC8
MAB1_3
AC9
MAB1_4
AA7
MAB1_5
AA8
MAB1_6
Y8
MAB1_7
AA9
WCKB0_0
H3
WCKB0_0#
H1
WCKB0_1
T3
WCKB0_1#
T5
WCKB1_0
AE4
WCKB1_0#
AF5
WCKB1_1
AK6
WCKB1_1#
AK5
EDCB0_0
F6
EDCB0_1
K3
EDCB0_2
P3
EDCB0_3
V5
EDCB1_0
AB5
EDCB1_1
AH1
EDCB1_2
AJ9
EDCB1_3
AM5
DBIB0_0
G7
DBIB0_1
K1
DBIB0_2
P1
DBIB0_3
W4
DBIB1_0
AC4
DBIB1_1
AH3
DBIB1_2
AJ8
DBIB1_3
AM3 T7
W7 L9
L8 AD8
AD7 T10
Y10 W10
AA10 P10
L10 AD10
AC10 U10
AA11 N10
AB11
T8 W8
25mm (max)
AH11
VM_RST_1
R80
R80
From GPU
5K/F_4
5K/F_4 C75
Designator
R_MEM_2
R_MEM_3
C_MEM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
PD7
PD7
PD7
Date: Sheet
Date: Sheet
Date: Sheet
MAB0_8 MAB1_8
5mm (max) 25mm (max)
R83 10_4R83 10_4
**
R_MEM_2
** R_MEM_1
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
WCKB0_0 [22] WCKB0_0# [22] WCKB0_1 [22] WCKB0_1# [22] WCKB1_0 [23] WCKB1_0# [23] WCKB1_1 [23] WCKB1_1# [23]
EDCB0_0 [22] EDCB0_1 [22] EDCB0_2 [22] EDCB0_3 [22] EDCB1_0 [23] EDCB1_1 [23] EDCB1_2 [23] EDCB1_3 [23]
DBIB0_0 [22] DBIB0_1 [22] DBIB0_2 [22] DBIB0_3 [22] DBIB1_0 [23] DBIB1_1 [23] DBIB1_2 [23] DBIB1_3 [23]
ADBIB0# [22] ADBIB1# [23]
CLKB0 [22] CLKB0# [22]
CLKB1 [23] CLKB1# [23]
RASB0# [22] RASB1# [23]
CASB0# [22] CASB1# [23]
CSB0# [22]
CSB1# [23]
CKEB0# [22] CKEB1# [23]
WEB0# [22] WEB1# [23]
4/29 modify
R81 51_4R81 51_4
C75 120P/50V_4
120P/50V_4
ATI CAPILANO-PRO (MEM)2/5
ATI CAPILANO-PRO (MEM)2/5
ATI CAPILANO-PRO (MEM)2/5
1
38
** R_MEM_3
**
C_MEM
5KR_MEM_1
10R
51R
120pF
16 47Wednesday, October 13, 2010
16 47Wednesday, October 13, 2010
16 47Wednesday, October 13, 2010
VM_RST# [20,21,22,23]
1A
1A
1A
of
of
of
5
U33B
U33B
MUTI GFX
MUTI GFX
MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3
AR10
AW10
AU10 AP10 AV11 AT11 AR12
AW12
AU12 AP12
AR8 AU8 AP8
AW8
AR3 AR1 AU1 AU3
AW3
AP6
AW5
AU5 AR6
AW6
AU6 AT7 AV7 AN7 AV9 AT9
DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23
D D
5/3: modify for GDDR5 table
NC on Park/Robson/Seymour
+1.8V_VGA
R453 *10K/F_4R453 *10K/F_4 R455 10K/F_4R455 10K/F_4 R448 *10K/F_4R448 *10K/F_4 R446 *10K/F_4R446 *10K/F_4
SI Add for AMD request
R429 *0_4R429 *0_4
GPIO24_TRSTB
GPIO27_TMS
GPIO26_TCKXTALIN
NC on Park/Robson/Seymour
R77 *10K/F_4R77 *10K/F_4
R76 *10K/F_4R76 *10K/F_4
+3V_VGA
TP38TP38
5/5:add a TP
6/30 :Modify TP
MV del in BOM
Access to SCL and SDA is mandatory on BACO designs for debug purposes
5/6 add for AMD
C C
GPU_EDIDDATA[24]
GPIO0: option to control PSI in future products - not currently qualified
6/11 DB2 modify
8/13 PV modify
SI-2 Add
Seymour/Whistler: Stereo sync output
B B
Madison/Capilano: Alternate DP clock source & Stereo sync output
A A
4/29 add.
+3V_VGA
R74
R74 *10K/F_4
*10K/F_4
R109
R109 *10K/F_4
*10K/F_4
PLACE VREFG DIVIDER AND CAP CLOSE TO ASIC
GND Option If XO_IN/XO_IN2 not used For M97, XO_IN and XO_IN2 should be grounded
GPU_PROCHOT[35]
GPU_LVDS_BLON[18,24]
GFX_CORE_CNTRL0[18,42]
GFX_CORE_CNTRL1[18,42]
6/30 SI Modify TP
5
R56 *4.7K_4R56 *4.7K_4
+3V_VGA
R57 *4.7K_4R57 *4.7K_4
GPU_EDIDCLK[24]
VGA_GPIO0[1 8 ] VGA_GPIO1[1 8 ] VGA_GPIO2[1 8 ]
G_SMBDAT[18] G_SMBCLK[18]
VGA_GPIO8[1 8 ] VGA_GPIO9[1 8 ]
VGA_GPIO10[18]
VGA_GPIO11[18] VGA_GPIO12[18] VGA_GPIO13[18]
TP7TP7
VGA_ALERT[18,35]
4/29 modify.
VGA_GPIO22[18]
TP5TP5 TP6TP6
GPIO26_TCK[18]
TP1TP1 TP4TP4
GENERICA[18]
TP8TP8
GENERICC[18]
GenericF/G is NC on PARK
TMDS_H PD[27]
R78
R78 499/F_4
499/F_4
R117
R117 249/F_4
249/F_4
4/20 DB modify.
GFX_THMD+[18] GFX_THMD-[18]
R425 0_4R425 0_4
VGA_GPIO8 VGA_GPIO9 VGA_GPIO10 VGA_GPIO11
VGA_GPIO21_BBEN
GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS GPIO28_TDO
+1.8V_VGA
+1.8VDPLL_PVDD
+1.0VDPLL_VDDC
CLK_27M[18] CLK_100M[18]
TP3TP3 TP2TP2
+1.8V_TSVDD
+VGA_VREFG
C82
C82
0.1U/10V_4
0.1U/10V_4
AK26
SCL
AJ26
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH23
GPIO_3_SMBDATA
AJ23
GPIO_4_SMBCLK
AH17
GPIO_5_AC_BATT
AJ17
GPIO_6
AK17
GPIO_7_BLON
AJ13
GPIO_8_ROMSO
AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HPD2
AM13
GPIO_15_PW RCNTL_0
AK14
GPIO_16_SSIN
AG30
GPIO_17_THERMAL_INT
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
AL13
GPIO_20_PW RCNTL_1
AJ14
GPIO_21_BB_EN
AK13
GPIO_22_ROMCSB
AN13
GPIO_23_CLKREQB
AM23
JTAG_TRSTB
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_HPD4
AH26
GENERICF
AH24
GENERICG
AK24
HPD1
AH13
VREFG
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AW34
XO_IN
AW35
XO_IN2
AV33
XTALIN
AU34
XTALOUT
AF29
DPLUS
AG29
DMINUS
AK32
TS_FDO
AJ32
TSVDD
AJ33
TSVSS
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
I2C
I2C
PLL/CLOCK
PLL/CLOCK
THERMAL
THERMAL
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P TX0M_DPA2N
DPA
DPA
TX1P_DPA1P TX1M_DPA1N
TX2P_DPA0P TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P TX3M_DPB2N
DPB
DPB
TX4P_DPB1P TX4M_DPB1N
TX5P_DPB0P TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC
DPC
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TXCDM_DPD3N
TX3P_DPD2P
TX3M_DPD2N
DPD
DPD
TX4P_DPD1P
TX4M_DPD1N
TX5P_DPD0P
TX5M_DPD0N
DAC1
DAC1
DAC2
DAC2
H2SYNC V2SYNC
A2VDDQ A2VSSQ
DDC/AUX
DDC/AUX
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
DDCCLK_AUX3P
DDCDATA_AUX3N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
4
AU24 AV23
AT25 AR24
AU26 AV25
AT27 AR26
AR30 AT29
AV31 AU30
AR32 AT31
AT33 AU32
AU14 AV13
AT15 AR14
AU16 AV15
AT17 AR16
AU20 AT19
AT21 AR20
AU22 AV21
AT23 AR22
AD39
R
AD37
RB
AE36
G
AD35
GB
AF37
B
AE38
BB
AC36
HSYNC
AC38
VSYNC
DAC1_RSET
AB34
RSET
AD34
AVDD
AE34
AVSSQ
AC33
VDD1DI
AC34
VSS1DI
AC30
R2
AC31
R2B
AD30
G2
AD31
G2B
AF30
B2
AF31
B2B
AC32
C
AD32
Y
AF32
COMP
AD29 AC29
VDD2D
AG31
VDD2DI
AG32
VSS2DI
A2VDD
AG33
A2VDD
AD33 AF33
DAC2_RSET
AA29
R2SET
AUX1P AUX1N
AUX2P AUX2N
4
Seymour/Whistler:TSVSSQ Temperature sensor quiet ground. Madison/Capilano: A2VSSQ .
AM26 AN26
DDC1 AND AUX1 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION
AM27
REFER THE DATABOOK FOR DETAIL
AL27 AM19
AL19
DDC2 AND AUX2 CAN BE JOINTED TOGETHER FOR DUAL DCC/AUX FUNCTION REFER THE DATABOOK FOR DETAIL
AN20 AM20
AL30 AM30
DDCxx_AUX3x is NC on M92M2
AL29 AM29
DDCxx_AUX4x is NC on M92M2 and Park/Robson/Seymour
AN21 AM21
AJ30 AJ31
AK30
DDCxx_AUX7x is NC on M9x and Park/Robson/Seymour
AK29
N_TXC_HDMI+ [27] N_TXC_HDMI- [27]
N_TX0_HDMI+ [27] N_TX0_HDMI- [27]
N_TX1_HDMI+ [27] N_TX1_HDMI- [27]
N_TX2_HDMI+ [27] N_TX2_HDMI- [27]
DP Channel D i s NC on Park, Robson and Se ymour
GPU_CRT_R
GPU_CRT_G
GPU_CRT_B
GPU_CRT_R
GPU_CRT_G
GPU_CRT_B
R105
R105 499/F_4
499/F_4
R476 *0_4/SR476 *0_4/S R464 *0_4/SR464 *0_4/S
R488 *0_4/SR488 *0_4/S R465 *0_4/SR465 *0_4/S
+VDD1D
R129
R129 715/F_4
715/F_4
VGA STRAPS
GPU_CRT_R [24]
GPU_CRT_G [24]
GPU_CRT_B [24]
VGA STRAPS
GPU_HSYNC [18,24] GPU_VSYNC [18,24]
Seymour/Whistler: DAC2 is NC Madison/Capilano:DAC2 Output-C Madison/Capilano:DAC2 Output-Y
HSYNC_DAC2 [18] VSYNC_DAC2 [18]
+1.8V_VGA
For future back compatibility
+3V_VGA +1.8V_A2VDDQ
HDMI_SCL [27] HDMI_SDA [27]
GPU_DDCCLK [24] GPU_DDCDATA [24]
3
U33G
U33G
LVDS CONTROL
LVDS CONTROL
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N
LVTMDP
LVTMDP
TXCLK_LP_DPE3P TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
C918 5.6P/16V_4C918 5.6P/16V_4
R482 150/F_4R482 150/F_4
C919 5.6P/16V_4C919 5.6P/16V_4
R480 150/F_4R480 150/F_4
C920 5.6P/16V_4C920 5.6P/16V_4
R477 150/F_4R477 150/F_4
+1.8V_AVDD
8/13 PV modify
10/13 PV2 EMI request
TXOUT_L2N_DPE0N
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
Seymour/Whistler: DAC2 is NC
Madison/Capilano: DAC2 can be used for PS2(CRT) output or be left unconnected
For FL/GL support on Seymour/Whistler only
Seymour/Whist ler: GENCLK_CLK Seymour/Whistl er: GENCLK_VSYNC
NC on Seymour/Whistler
GPIO6
High
Low
3
+VDDCI
1.07V
1.12V
AK27
VARY_BL
AJ27
DIGON
AK35 AL36
AJ38 AK37
AH35 AJ36
AG38 AH37
AF35
TXOUT_U3P
AG36
TXOUT_U3N
AP34 AR34
AW37 AU35
AR37 AU39
AP35 AR35
AN36
TXOUT_L3P
AP37
TXOUT_L3N
+1.8V_VGA
+1.8V_VGA
(DAC1_VDD1DI:1.8V@100mA)
L12
L12
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
SI Add
2
R73 10K_4R73 10K_4
GPU_DPST_PWM GPU_DISP_ON
GPU_DISP_ON
R72 10K_4R72 10K_4
L13 HCB1608KF-181T15/1.5A_6L13 HCB1608KF-181T15/1.5A_6
(DAC1_AVDD: 1.8V@70mA+42mA) ( A2VDDQ: 1.8V@1mA)
L38
L38
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
FXRFCVC
3
4
52
GPU_TXUCLKOUT+ [24] GPU_TXUCLKOUT- [24]
GPU_TXUOUT0+ [2 4 ] GPU_TXUOUT0- [24]
GPU_TXUOUT1+ [2 4 ] GPU_TXUOUT1- [24]
GPU_TXUOUT2+ [2 4 ] GPU_TXUOUT2- [24]
GPU_TXLCLKOUT+ [24] GPU_TXLCLKOUT- [24]
GPU_TXLOUT0+ [24] GPU_TXLOUT0- [24 ]
GPU_TXLOUT1+ [24] GPU_TXLOUT1- [24 ]
GPU_TXLOUT2+ [24] GPU_TXLOUT2- [24 ]
C571
C571
1U/6.3V_4
1U/6.3V_4
C141
C141 10U/6.3VS_6
10U/6.3VS_6
5OGO""KF
5
2
2
GPU_DPST_PWM [24] GPU_DISP_ON [24]
+VDD1D
C561
C561 1U/6.3V_4
1U/6.3V_4
43
4 Uk¦g3
22
22
2
+1.8V_AVDD
+1.8V_A2VDDQ
C579
C579
0.1U/10V_4
0.1U/10V_4
C560
C560
0.1U/10V_4
0.1U/10V_4
2
2
Ucouwpi"M6I32547HG/JE27"*602Idru+"
3
J{pkz"J7IS3J46CHT/V2E"DIC
32
*602Idru+
Xgtqpc
IFFT7"V{rg
33
+1.0V_VGA[15,19,43]
+1.8V_VGA[15,19,42]
+3V_VGA[16,18,19,27,42]
DPLL_VDCC M97 1.0V/M96 1.1V
+1.8V_VGA
(1.8V@150mA DPLL_PVDD)
L11 HCB1608KF-181T15/1.5A_6L11 HCB1608KF-181T15/1.5A_6
C97
C97
C107
10U/6.3V_8
10U/6.3V_8
+1.0V_VGA
(1.0V@300mA DPLL _V DDC)
L8 HCB1608KF-181T15/1.5A_6L8 HCB1608KF-181T15/1.5A_6
10U/6.3V_8
10U/6.3V_8
+1.8V_VGA
(1.8V@20mA TSVDD)
L16 HCB1608KF-181T15/1.5A_6L16 HCB1608KF-181T15/1.5A_6
10U/6.3V_8
10U/6.3V_8
GPIO15 GPIO20
Low
Low
High
High
C107
1U/6.3V_4
1U/6.3V_4
C78
C78
C73
C73
1U/6.3V_4
1U/6.3V_4
C114
C114
C108
C108
1U/6.3V_4
1U/6.3V_4
Low
High
Low
High 0.9V
54,54"qt"86,38"z":"reu
54,54"qt"86,38"z":"reu
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Nu m ber Rev
Size Document Nu m ber Rev
Size Document Nu m ber Rev Custom
Custom
Custom
PD7
PD7
PD7
Date: Sheet
Date: Sheet
Date: Sheet
1
39
+1.8VDPLL_PVDD
C101
C101
0.1U/10V_4
0.1U/10V_4
+1.0VDPLL_VDDC
C79
C79
0.1U/10V_4
0.1U/10V_4
+1.8V_TSVDD
+VGACORE
1.05V
1V
0.95V
Eqphkiwtcvkqp
3I
3I
ATI CAPILANO-PRO DISPLAY3/5
ATI CAPILANO-PRO DISPLAY3/5
ATI CAPILANO-PRO DISPLAY3/5
1
of
of
of
17 47Wednesday, October 13, 2010
17 47Wednesday, October 13, 2010
17 47Wednesday, October 13, 2010
1A
1A
1A
5
U33F
U33F
AB39
PCIE_VSS#1
E39
PCIE_VSS#2
F34
PCIE_VSS#3
F39
PCIE_VSS#4
G33
PCIE_VSS#5
G34
PCIE_VSS#6
H31
PCIE_VSS#7
H34
PCIE_VSS#8
H39
PCIE_VSS#9
J31
D D
C C
B B
A A
PCIE_VSS#10
J34
PCIE_VSS#11
K31
PCIE_VSS#12
K34
PCIE_VSS#13
K39
PCIE_VSS#14
L31
PCIE_VSS#15
L34
PCIE_VSS#16
M34
PCIE_VSS#17
M39
PCIE_VSS#18
N31
PCIE_VSS#19
N34
PCIE_VSS#20
P31
PCIE_VSS#21
P34
PCIE_VSS#22
P39
PCIE_VSS#23
R34
PCIE_VSS#24
T31
PCIE_VSS#25
T34
PCIE_VSS#26
T39
PCIE_VSS#27
U31
PCIE_VSS#28
U34
PCIE_VSS#29
V34
PCIE_VSS#30
V39
PCIE_VSS#31
W31
PCIE_VSS#32
W34
PCIE_VSS#33
Y34
PCIE_VSS#34
Y39
PCIE_VSS#35
F15
GND#100
F17
GND#101
F19
GND#102
F21
GND#103
F23
GND#104
F25
GND#105
F27
GND#106
F29
GND#107
F31
GND#108
F33
GND#109
F7
GND#110
F9
GND#111
G2
GND#112
G6
GND#113
H9
GND#114
J2
GND#115
J27
GND#116
J6
GND#117
J8
GND#118
K14
GND#119
K7
GND#120
L11
GND#121
L17
GND#122
L2
GND#123
L22
GND#124
L24
GND#125
L6
GND#126
M17
GND#127
M22
GND#128
M24
GND#129
N16
GND#130
N18
GND#131
N2
GND#132
N21
GND#133
N23
GND#134
N26
GND#135
N6
GND#136
R15
GND#137
R17
GND#138
R2
GND#139
R20
GND#140
R22
GND#141
R24
GND#142
R27
GND#143
R6
GND#144
T11
GND#145
T13
GND#146
T16
GND#147
T18
GND#148
T21
GND#149
T23
GND#150
T26
GND#151
U15
GND#153
U17
GND#154
U2
GND#155
U20
GND#156
U22
GND#157
U24
GND#158
U27
GND#159
U6
GND#160
V11
GND#161
V16
GND#163
V18
GND#164
V21
GND#165
V23
GND#166
V26
GND#167
W2
GND#168
W6
GND#169
Y15
GND#170
Y17
GND#171
Y20
GND#172
Y22
GND#173
Y24
GND#174
Y27
GND#175
U13
GND#152
V13
GND#162
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
5
GND
GND
GND/PX_EN#61
VSS_MECH#1 VSS_MECH#2 VSS_MECH#3
GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8
GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60
GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78
GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99
A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5
B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13
A39 AW1 AW39
5/6: Add pu down for GPIO table
PX_EN_1
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
Tgugtxg"hqt"uwrrqtv"DCEQ"oqfg
Hqt"IFFT7"GGRTQO
4
STRAPS
VGA_GPIO0[17] VGA_GPIO1[17] VGA_GPIO2[17] VGA_GPIO8[17] VGA_GPIO9[17]
VGA_GPIO13[17]
VGA_GPIO12[17]
VGA_GPIO11[17] VGA_GPIO10[17]
add GPIO10 for EEPROM 4/23.
GENERICC[17] VGA_GPIO22[17]
5/6: Add for Enable EEPROM
GPU_VSYNC[17,24]
GPU_HSYNC[17,24]
VSYNC_DAC2[17] HSYNC_DAC2[17]
GPU_LVDS_BLON[17,24] GFX_CORE_CNTRL0[17,42] GFX_CORE_CNTRL1[17,42]
5/10 add pu down by AMD request.
PX_EN_1
R91 *0_4/SR91 *0_4/S R92 *0_4R92 *0_4
R107 10K/F_4R107 10K/F_4 R110 10K/F_4R110 10K/F_4 R405 *10K/F_4R405 *10K/F_4 R381 *10K/F_4R381 *10K/F_4 R75 *10K/F_4R75 *10K/F_4 R396 *10K/F_4R396 *10K/F_4
R406 10K/F_4R406 10K/F_4 R61 10K/F_4R61 10K/F_4
R69 *10K/F_4R69 *10K/F_4 R410 *10K/F_4R410 *10K/F_4
R409 10K/F_4R409 10K/F_4 R392 *10K/F_4R392 *10K/F_4
R66 *10K/F_4R66 *10K/F_4 R393 10K/F_4R393 10K/F_4 R484 10K/F_4R484 10K/F_4 R489 10K/F_4R489 10K/F_4
R119 *10K/F_4R119 *10K/F_4 R118 *10K/F_4R118 *10K/F_4
R343 10K/F_4R343 10K/F_4 R378 3K/F_4R378 3K/F_4 R379 3K/F_4R379 3K/F_4
PX_EN [19]
+3V_VGA
t
For PX_EN, refer to the BACO reference schematics for detail
+3V_VGA
R383
4/20 DB update
VGA_GPIO22[17] VGA_GPIO10[17] VGA_GPIO9[17] VGA_GPIO8[17]
+3V_VGA
6/23: SI modify
4
R384 33_4R384 33_4 R367 33_4R367 33_4 R368 33_4R368 33_4 R385 33_4R385 33_4
TP62TP62
R387 10K/F_4R387 10K/F_4
TP63TP63
R383 10K/F_4
10K/F_4
1 6 5 2
3
U22U22
CE#
VDD SCK SI SO
HOLD#
WP#
VSS
Fghcwnv
8
7 4
C490
C490
0.1U/10V_4
0.1U/10V_4
3
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
STRAPS
TX_PWRS_ENB
TX_DEEMPH_EN GPIO1
BIF_GEN2_EN_A
RSVD BIF_VGA_DIS VGA ENABLEDGPIO9 RSVD
BIOS_ROM_EN ROMIDCFG(2:0) GPIO[13:11] VIP_DEVICE_STRAP_ENA
RSVD AUD[1] AUD[0] VSYNC
27MHz + 100Mhz OSC Option
4/29 reserve PCH_CLK
+3V
+3V_VGA
3
PCH_CLK_27M[9]
L7
L7
1 2
HCB1608KF-181T15_6
HCB1608KF-181T15_6
L4
L4
1 2
*HCB1608KF-181T15_6
*HCB1608KF-181T15_6
+3V_VGA
VGA_ALERT[17,35]
2
CONFIGURATION STRAPS
TP60TP60
C537
C537
.1U/10V_4
.1U/10V_4
+3V_VGA
R64 10K_4R64 10K_4
VGA_ALERT
PIN
GPIO0
GPIO2
GPIO8 GPIO21
GPIO_22_ROMCSB
GENERICC HSYNC
C551
C551
12P/50V_4
12P/50V_4
R461*0_4 R461*0_4
SS_SEL0
C556
C556
SS_SEL1
.1U/10V_4
.1U/10V_4
4/19: change only from VGA
GPUT_CLK[35] GPUT_DATA[35]
R68 4.7K_4R68 4.7K_4 R67 4.7K_4R67 4.7K_4
R423 *0_4/SR423 *0_4/S
DESCRIPTION OF DEFAULT SETTINGS
Transmitter Power Savings Enable
0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)
PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis disabled for mobile mode 1: Tx de-emphasis enabled (Default setting for Desktop)
0 = Advertises the PCI-E device as 2.5 GT/s capable at power-on. 1 = Advertises the PCI-E device as 5.0 GT/s capable at power-on.
5.0 GT/s capability will be controlled by software.
ENABLE EXTERNAL BIOS ROM SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPSV2SYNC
AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPor t and HDMI i f dongle is detected 1 0 Audio for DisplayPor t only 1 1 Audio for both DisplayPort and HDMI
6/23: SI modify
Y3
2 1
27MHZY327MHZ
R444 1M/F_4R444 1M/F_4
R457
R457 *0_4/S
*0_4/S
U28
U28
1
XTALIN
4
VDD_100M
8
VDD_27M
7
SS_SEL0
3
SS_SEL1
6
GND_100M
2
GND_27M
11
GND_PAD
SL16010DCT
R419 *0_4/SR419 *0_4/S R428 *0_4/SR428 *0_4/S
GPUT_CLK GPUT_DATA
2
10
XTALOUT
CLK_100M_R
5
100M_OUT
CLK_27M_R
9
27M_OUT
G_SMBCLK [17] G_SMBDAT [17]
Vjgtocn"Ugpuqt
U6
*G781-1P8@EV
*G781-1P8@EV
U6
-OVT
8
SMCLK
7
SMDATA
6
-ALT
5
GND
K4E"CFFTGUU<";CJ
+3V_VGA[16,17,19,27,42]
C543
C543 12P/50V_4
12P/50V_4
VCC DXP DXN
5/10 modify
TP61TP61
R449 *0_4/SR449 *0_4/S R445 *0_4/SR445 *0_4/S R433 *0_4/SR433 *0_4/S R435 *0_4/SR435 *0_4/S
781-1_3V
1 2 3 4
-VGATHRM
PD7
PD7
PD7
1
RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE
3:
1 1 0
0 0 0
0
10
0
0
0 0 11
+3V
R437
R437
R442
R442
*10K/F_4
*10K/F_4
10K/F_4
10K/F_4
SS_SEL0 SS_SEL1
R452
R452
R451
R451
10K/F_4
10K/F_4
10K/F_4
10K/F_4
GENERICA [17] CLK_100M [17]
GPIO26_TCK [17]
CLK_27M [17]
C530
C546
C546
10P/50V_4
10P/50V_4
R54 *200/F_6R54 *200/F_6
C50 *0.1U/10V_4C50 *0.1U/10V_4
R63 *10K_4R63 *10K_4
C530 10P/50V_4
10P/50V_4SL16010DCT
+3V_VGA
GFX_THMD+
C527
C527 *2200P/50V_4
*2200P/50V_4
GFX_THMD-
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
GFX_THMD+ [17]
w/s
10 / 10
GFX_THMD- [17]
+3V_VGA
ATI CAPILANO-PRO(GD&Str)4/5
ATI CAPILANO-PRO(GD&Str)4/5
ATI CAPILANO-PRO(GD&Str)4/5
1
18 47Wednesday, October 13, 2010
18 47Wednesday, October 13, 2010
18 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
+1.5V_VGA
C603
C603
C702
C702
C348
2.2U/6.3V_4
2.2U/6.3V_4
C159
C159
2.2U/6.3V_4
2.2U/6.3V_4
C320
C320 10U/6.3V_8
10U/6.3V_8
C171
C171 10U/6.3VS_6
10U/6.3VS_6
C77
C77
+3V
3
1
5
R41
R41 *10K_4
*10K_4
C348
2.2U/6.3V_4
2.2U/6.3V_4
C608
C608
2.2U/6.3V_4
2.2U/6.3V_4
C610
C610 10U/6.3V_8
10U/6.3V_8
C536
C536
1U/6.3V_4
1U/6.3V_4
Q9 *2N7002Q9*2N7002
C325
C325 10U/6.3VS_6
10U/6.3VS_6
+1.0V_VGA
+VGACORE
C733
C733
2.2U/6.3V_4
2.2U/6.3V_4
12
+
+
C41
C41
330u_2.5V_3528
330u_2.5V_3528
+VDDR4
C142
C142 1U/6.3V_4
1U/6.3V_4
C322
C322 1U/6.3V_4
1U/6.3V_4
C80
C80
0.1U/10V_4
0.1U/10V_4
(1.8V@40mA PCIE_PVDD)
C595
C595 10U/6.3V_8
10U/6.3V_8
+5V
3
2
1
PX_EN#
PX_EN##
2.2U/6.3V_4
2.2U/6.3V_4
D D
+1.8V_VGA
C C
C165
C165
2.2U/6.3V_4
2.2U/6.3V_4
C763
C763 10U/6.3V_8
10U/6.3V_8
SI Change BOM
L10 HCB1608KF-181T15/1.5A_6L10 HCB1608KF-181T15/1.5A_6
L17 HCB1608KF-181T15/1.5A_6L17 HCB1608KF-181T15/1.5A_6
SI Change BOM
L20 HCB1608KF-181T15/1.5A_6L20 HCB1608KF-181T15/1.5A_6
SI Change BOM
L33 HCB1608KF-181T15/1.5A_6L33 HCB1608KF-181T15/1.5A_6
SI Change BOM
B B
L39 HCB1608KF-181T15/1.5A_6L39 HCB1608KF-181T15/1.5A_6
10U/6.3V_8
10U/6.3V_8
}ラ"0#1j"cラSW
PX_MODE[47]
R88 *0_4R88 *0_4
PX_EN[18]
A A
2
(VDDR1: 1.5V@9.1A )
C741
C741
C739
C739
1U/6.3V_4
1U/6.3V_4
2.2U/6.3V_4
2.2U/6.3V_4
12
C117
C117
+
+
C753
C753
22U/6.3VS_8
22U/6.3VS_8
330u_2.5V_3528
330u_2.5V_3528
(1.8V@136mA VDD_CT)
C57
C57 10U/6.3V_8
10U/6.3V_8
C139
C139
+3V_VGA
0.1U/10V_4
0.1U/10V_4
+MPV18
C327
C327
0.1U/10V_4
0.1U/10V_4
+SPV18
C615
C615 1U/6.3V_4
1U/6.3V_4
+1.0V_VGA
R36
R36 *1K_4
*1K_4
Q5
2
*2N7002Q5*2N7002
Q40
Q40 *2N7002
*2N7002
1
2
Q41
Q41
*2N7002
*2N7002
1
2
C162
C162
2.2U/6.3V_4
2.2U/6.3V_4
C191
C191 22U/6.3VS_8
22U/6.3VS_8
C137
C137
C140
C140
0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
C379
C379 10U/6.3V_8
10U/6.3V_8
+PCIE_PVDD
C614
C614
SI Change BOMSI Change BOM
1U/6.3V_4
1U/6.3V_4
L32 HCB1608KF-181T15/1.5A_6L32 HCB1608KF-181T15/1.5A_6
+5V
R34
R34 *1K_4
*1K_4
PX_EN## PX_EN#
3
Q42
Q42 *2N7002
*2N7002
1
3
3
4
C749
C749
2.2U/6.3V_4
2.2U/6.3V_4
C752
C752 22U/6.3VS_8
22U/6.3VS_8
(3.3V@60mA VDDR3)
C489
C489 1U/6.3V_4
1U/6.3V_4
VDDR4 for DVPDATA[12..23]
(VDDR4_5 : 1.8V@20/170 mA)
VDDR5 for DVPDATA[0..11]
(SPV10 :1.0V@120mA)
C33
C33 10U/6.3V_8
10U/6.3V_8
BIF_VDDC
C723
C723 *22U/6.3VS_8
*22U/6.3VS_8
4
+1.8V_VDDC_CT
+VDDR4
+VDDR4
+MPV18
+SPV18
C81
C81 1U/6.3V_4
1U/6.3V_4
+SPV10
C538
C538
0.1U/10V_4
0.1U/10V_4
SI Del R46
U33E
U33E
MEM I/O
MEM I/O
AC7
VDDR1#1
AD11
VDDR1#2
AF7
VDDR1#3
AG10
VDDR1#4
AJ7
VDDR1#5
AK8
VDDR1#6
AL9
VDDR1#7
G11
VDDR1#8
G14
VDDR1#9
G17
VDDR1#10
G20
VDDR1#11
G23
VDDR1#12
G26
VDDR1#13
G29
VDDR1#14
H10
VDDR1#15
J7
VDDR1#16
J9
VDDR1#17
K11
VDDR1#18
K13
VDDR1#19
K8
VDDR1#20
L12
VDDR1#21
L16
VDDR1#22
L21
VDDR1#23
L23
VDDR1#24
L26
VDDR1#25
L7
VDDR1#26
M11
VDDR1#27
N11
VDDR1#28
P7
VDDR1#29
R11
VDDR1#30
U11
VDDR1#31
U7
VDDR1#32
Y11
VDDR1#33
Y7
VDDR1#34
LEVEL
LEVEL TRANSLATION
TRANSLATION
AF26
VDD_CT#1
AF27
VDD_CT#2
AG26
VDD_CT#3
AG27
VDD_CT#4
I/O
I/O
AF23
VDDR3#1
AF24
VDDR3#2
AG23
VDDR3#3
AG24
VDDR3#4
AF13
VDDR4#4
AF15
VDDR4#5
AG13
VDDR4#7
AG15
VDDR4#8
AD12
VDDR4#1
AF11
VDDR4#2
AF12
VDDR4#3
AG11
VDDR4#6
M20
NC_VDDRHA
M21
NC_VSSRHA
V12
NC_VDDRHB
U12
NC_VSSRHB
PLL
PLL
AB37
PCIE_PVDD
H7
MPV18#1
H8
MPV18#2
AM10
SPV18
AN9
SPV10
AN10
SPVSS
VOLTAGE
VOLTAGE SENESE
SENESE
AF28
FB_VDDC
AG28
FB_VDDCI
AH29
FB_GND
Capilano Pro/Robson_M2
Capilano Pro/Robson_M2
3
PCIE
PCIE
PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8
PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12
CORE
CORE
POWER
POWER
ISOLATED
ISOLATED CORE I/O
CORE I/O
3
VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8
VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15 VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22
AA31 AA32 AA33 AA34 V28 W29 W30 Y31
G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28
AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28
AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13
+1.8V_PCIE_VDDR
C219
C219
2.2U/6.3V_4
2.2U/6.3V_4
C182
C182
2.2U/6.3V_4
2.2U/6.3V_4
C203
C203 10U/6.3VS_6
10U/6.3VS_6
BIF_VDDC
For non-BACO designs, connect BIF_VDDC to VDDC. For BACO designs - see BACO referen ce schematics (ref138)
(For MP7, 1.12V@4A VDDCI).
VDDCI
C251
C251
2.2U/6.3V_4
2.2U/6.3V_4
C196
C196 1U/6.3V_4
1U/6.3V_4
C218
C218
C43
C43
0.1U/10V_4
0.1U/10V_4 22U/6.3VS_8
22U/6.3VS_8
(1.8V@500mA PCIE_VDDR)
(1.0V@2000mA PCIE_VDDC)
C150
C150
2.2U/6.3V_4
2.2U/6.3V_4
C183
C183
2.2U/6.3V_4
2.2U/6.3V_4
C228
C228 22U/6.3VS_8
22U/6.3VS_8
R556 *0_4/SR556 *0_4/S
+VGACORE
L30
L30
UPB201212T-121Y-N/5A_8
UPB201212T-121Y-N/5A_8
SI Change BOM
C252
C252
2.2U/6.3V_4
2.2U/6.3V_4
C234
C234
2.2U/6.3V_4
2.2U/6.3V_4
C44
C44
C253
C253
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
C257
C257 1U/6.3V_4
1U/6.3V_4
C236
C236
2.2U/6.3V_4
2.2U/6.3V_4
12
+
+
C534
C534 *330u_2.5V_3528
*330u_2.5V_3528
C214
C214 10U/6.3VS_6
10U/6.3VS_6
C240
C240
2.2U/6.3V_4
2.2U/6.3V_4
2
C138
C138 1U/6.3V_4
1U/6.3V_4
C248
C248 1U/6.3V_4
1U/6.3V_4
C216
C216
C184
C184
2.2U/6.3V_4
2.2U/6.3V_4
2.2U/6.3V_4
2.2U/6.3V_4
C237
C237
2.2U/6.3V_4
2.2U/6.3V_4
12
+
+
C535
C535
*330u_2.5V_3528
*330u_2.5V_3528
+VGACORE
SI MODIFY and ADD
12
+
+
C510
C510
C533
C533
22U/6.3VS_8
22U/6.3VS_8
*330u_2.5V_3528
*330u_2.5V_3528
+1.0V_VGA[15,17,43]
+VGACORE[42]
+1.5V_VGA[16,20,21,22,23,47] +1.8V_VGA[15,17,42]
+3V_VGA[16,17,18,27,42]
2
C148
C148 1U/6.3V_4
1U/6.3V_4
C229
C229
2.2U/6.3V_4
2.2U/6.3V_4
C201
C201
2.2U/6.3V_4
2.2U/6.3V_4
C230
C230 10U/6.3VS_6
10U/6.3VS_6
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
L15
L15
C129
C129
SI Change BOM
10U/6.3V_8
10U/6.3V_8
+1.0V_VGA
C241
C241
2.2U/6.3V_4
2.2U/6.3V_4
C181
C181
C199
C199
2.2U/6.3V_4
2.2U/6.3V_4
2.2U/6.3V_4
2.2U/6.3V_4
C209
C209
2.2U/6.3V_4
2.2U/6.3V_4
C135
C135 10U/6.3VS_6
10U/6.3VS_6
BIF_VDDC
*10U/6.3VS_6
*10U/6.3VS_6
4/20 DB add.
1
+1.8V_VGA
C250
C250 10U/6.3V_8
10U/6.3V_8
+VGACORE
C220
C194
C194
2.2U/6.3V_4
2.2U/6.3V_4
C192
C192 10U/6.3VS_6
10U/6.3VS_6
C220
2.2U/6.3V_4
2.2U/6.3V_4
C185
C185
2.2U/6.3V_4
2.2U/6.3V_4
C173
C173 10U/6.3VS_6
10U/6.3VS_6
C151
C151
2.2U/6.3V_4
2.2U/6.3V_4
C221
C221
2.2U/6.3V_4
2.2U/6.3V_4
C152
C152 10U/6.3VS_6
10U/6.3VS_6
C200
C200
2.2U/6.3V_4
2.2U/6.3V_4
C235
C235
2.2U/6.3V_4
2.2U/6.3V_4
C188
C188 10U/6.3VS_6
10U/6.3VS_6
SI ADDSI ADD SI MODIFYSI MODIFY
C217
C217
C720
C720
*2.2U/6.3V_4
*2.2U/6.3V_4
C205
C205
*2.2U/6.3V_4
*2.2U/6.3V_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
ATI CAPILANO-PRO(POWER) 5/5
ATI CAPILANO-PRO(POWER) 5/5
ATI CAPILANO-PRO(POWER) 5/5
Date: Sheet
Date: Sheet
Date: Sheet
1
PD7
PD7
PD7
C725
C725
*10U/6.3VS_6
*10U/6.3VS_6
3;
of
of
of
19 47Wednesday, October 13, 2010
19 47Wednesday, October 13, 2010
19 47Wednesday, October 13, 2010
1A
1A
1A
5
4
3
2
1
DQA0_[31..0][16]
MAA0_[8..0][16]
U39
U39
MAA0_7
K4
A8/A7_A10/A0
MAA0_6
K5
A11/A6_A9/A1
MAA0_5 DQA0_19
K10
BA1/A5_BA3/A3
MAA0_4
K11
BA2/A4_BA0/A2
MAA0_3
H10
BA3/A3_BA1/A5
MAA0_2
H11
D D
RASA0#[16] CASA0#[16]
CSA0#[16]
WEA0#[16]
R758 0_4R758 0_4 R551 120_4R551 120_4
R760 0_4R760 0_4
VREFC_VMA1
VREFD_VMA1
VREFD_VMAU1
DBIA0_2 DBIA0_0
EDCA0_2 EDCA0_0
RASA0# CASA0# CSA0# WEA0#
MAA0_8
VM_RST#
+1.5V_VGA
R558 *0_4/SR558 *0_4/S
DBIA0_2[16] DBIA0_0[16]
EDCA0_2[16] EDCA0_0[16]
6/29: SI add 6/29: SI add
VM_RST#[16,21,22,23]
C C
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
B B
A A
C728 1U/6.3V_4C728 1U/6.3V_4 R553 5.49K_4R553 5.49K_4
C738 1U/6.3V_4C738 1U/6.3V_4 R557 2.37K_4R557 2.37K_4
C766 1U/6.3V_4C766 1U/6.3V_4 R565 5.49K_4R565 5.49K_4
C765 1U/6.3V_4C765 1U/6.3V_4 R564 2.37K_4R564 2.37K_4
ADBIA0#[16]
C318 1U/6.3V_4C318 1U/6.3V_4 R180 5.49K_4R180 5.49K_4
C323 1U/6.3V_4C323 1U/6.3V_4 R183 2.37K_4R183 2.37K_4
MAA0_1 MAA0_0
ADBIA0#
+1.5V_VGA
H5 H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3
G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1
G4
L1 L4
R5 C10 D11
G11 G14
L11
L14 P11 R10
B1 B3 D1 D3 E5 F1 F3 G2 H3 K3
L2 M1 M3
N5 P1 P3 T1
T3 B12 B14 D12 D14 E10 F12 F14
G13
H12 K12
L13 M12 M14
N10 P12 P14 T12 T14
BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
1GB GDDR5 : CHANNEL A-0 (64M x 16)
DQA0_16
A4
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23
WCK01#/WCK23#
WCK23/WCK01
WCK23#/WCK01#
CKE#
VSS#B5 VSS#G5 VSS#H1 VSS#K1 VSS#L5 VSS#T5
VSS#B10 VSS#D10 VSS#G10 VSS#H14
VSS#K14
VSS#L10
VSS#P10
VSS#T10
VSSQ#A1 VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4 VSSQ#E1 VSSQ#E3 VSSQ#F5 VSSQ#H2 VSSQ#K2
VSSQ#M5
VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1 VSSQ#U3
VSSQ#A12 VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14 VSSQ#E12 VSSQ#E14 VSSQ#F10 VSSQ#H13 VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
CK#
CK
DQA0_18
A2 B4
DQA0_17
B2
DQA0_20
E4
DQA0_23
E2
DQA0_21
F4
DQA0_22
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQA0_5
U11
DQA0_1
U13
DQA0_4
T11
DQA0_3
T13
DQA0_6
N11
DQA0_2
N13
DQA0_7
M11
DQA0_0
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKA0_1
D4
WCKA0_1#
D5
WCKA0_0
P4
WCKA0_0#
P5
CLKA0#
J11
CLKA0
J12
CKEA0#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
WCKA0_1 [16] WCKA0_1# [16] WCKA0_0 [16] WCKA0_0# [16]
CLKA0# [16] CLKA0 [16] CKEA0# [16]
CLKA0 CLKA0#
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
R201 60.4_4R201 60.4_4 R202 60.4_4R202 60.4_4
MF=1 Mirror
R186 *0_4/SR186 *0_4/S
C332 1U/6.3V_4C332 1U/6.3V_4 R191 5.49K_4R191 5.49K_4
C336 1U/6.3V_4C336 1U/6.3V_4 R192 2.37K_4R192 2.37K_4
C319 1U/6.3V_4C319 1U/6.3V_4 R181 5.49K_4R181 5.49K_4
C324 1U/6.3V_4C324 1U/6.3V_4 R184 2.37K_4R184 2.37K_4
+1.5V_VGA
+1.5V_VGA
DBIA0_3[16] DBIA0_1[16]
EDCA0_3[16] EDCA0_1[16]
R759 0_4R759 0_4
+1.5V_VGA
R761 0_4R761 0_4
VREFC_VMA2
VREFD_VMA2
C353 1U/6.3V_4C353 1U/6.3V_4 R199 5.49K_4R199 5.49K_4
C761 1U/6.3V_4C761 1U/6.3V_4 R200 2.37K_4R200 2.37K_4
R189 120_4R189 120_4
VREFD_VMAU2
MAA0_0 MAA0_1 MAA0_3 MAA0_2 MAA0_5 MAA0_4 MAA0_6 MAA0_7
CASA0# RASA0# WEA0# CSA0#
MAA0_8
VM_RST#
ADBIA0#
+1.5V_VGA
K4
K5 K10 K11 H10 H11
H5 H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3
G12
L12
A5 J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1
G4
L1 L4
R5 C10 D11
G11 G14
L11
L14 P11 R10
B1
B3 D1 D3
E5
F1
F3 G2 H3
K3
L2 M1 M3 N5
P1
P3
T1
T3
B12 B14 D12 D14 E10 F12 F14
G13
H12 K12
L13 M12 M14
N10 P12 P14 T12 T14
U15
U15
A8/A7_A10/A0 A11/A6_A9/A1 BA1/A5_BA3/A3 BA2/A4_BA0/A2 BA3/A3_BA1/A5 BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23 WCK23/WCK01
CKE#
VSS#B5 VSS#G5 VSS#H1 VSS#K1
VSS#L5
VSS#T5 VSS#B10 VSS#D10 VSS#G10 VSS#H14 VSS#K14
VSS#L10 VSS#P10 VSS#T10
VSSQ#A1 VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4 VSSQ#E1 VSSQ#E3
VSSQ#F5
VSSQ#H2 VSSQ#K2 VSSQ#M5 VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1
VSSQ#U3 VSSQ#A12 VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14 VSSQ#E12 VSSQ#E14 VSSQ#F10 VSSQ#H13 VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
42
DQA0_29
A4
DQA0_30
A2
DQA0_26
B4
DQA0_25
B2
DQA0_27
E4
DQA0_28
E2
DQA0_24
F4
DQA0_31
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQA0_12
U11
DQA0_9
U13
DQA0_15
T11
DQA0_8
T13
DQA0_13
N11
DQA0_10
N13
DQA0_14
M11
DQA0_11
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKA0_1
D4
WCKA0_1#
D5
WCKA0_0
P4
WCKA0_0#
P5
CLKA0#
J11
CK#
CK
CLKA0
J12
CKEA0#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
+1.5V_VGA
C736 2.2U/10V_4C736 2.2U/10V_4
C732 2.2U/10V_4C732 2.2U/10V_4
C740 2.2U/10V_4C740 2.2U/10V_4
C768 1U/6.3V_4C768 1U/6.3V_4
C767 10U/6.3V_8C767 10U/6.3V_8
C764 2.2U/10V_4C764 2.2U/10V_4
+1.5V_VGA
C751 2.2U/10V_4C751 2.2U/10V_4
C352 2.2U/10V_4C352 2.2U/10V_4
C338 2.2U/10V_4C338 2.2U/10V_4
C737 1U/6.3V_4C737 1U/6.3V_4
C346 10U/6.3V_8C346 10U/6.3V_8
C328 1U/6.3V_4C328 1U/6.3V_4
C326 1U/6.3V_4C326 1U/6.3V_4
C351 2.2U/10V_4C351 2.2U/10V_4
Change 1u to 2.2,for ATI Request 1212
C769 10U/6.3V_8C769 10U/6.3V_8
C321 10U/6.3V_8C321 10U/6.3V_8
+1.5V_VGA[16,19,21,22,23,47]
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
VRAM-A0
VRAM-A0
PD7
PD7
5
4
3
2
PD7
VRAM-A0
Date: Sheet
Date: Sheet
Date: Sheet
1
20 47Wednesday, October 13, 2010
20 47Wednesday, October 13, 2010
20 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
4
3
2
1
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16 DQ9/DQ17
DQ16/DQ8 DQ17/DQ9
DQ24/DQ0 DQ25/DQ1 DQ26/DQ2 DQ27/DQ3 DQ28/DQ4 DQ29/DQ5 DQ30/DQ6 DQ31/DQ7
CKE#
VSS#B5 VSS#G5 VSS#H1 VSS#K1 VSS#L5
VSS#T5 VSS#B10 VSS#D10 VSS#G10 VSS#H14 VSS#K14 VSS#L10 VSS#P10 VSS#T10
VSSQ#A1
VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4
VSSQ#E1
VSSQ#E3
VSSQ#F5 VSSQ#H2
VSSQ#K2 VSSQ#M5 VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1 VSSQ#U3
VSSQ#A12 VSSQ#A14
VSSQ#E12 VSSQ#E14 VSSQ#F10
VSSQ#K13
1GB GDDR5 : CHANNEL A-1 (64M x 16)
DQA1_6
A4
DQA1_4
A2
DQA1_7
B4
DQA1_3
B2
DQA1_5
E4
DQA1_0
E2
DQA1_1
F4
DQA1_2
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQA1_17
U11
DQA1_18
U13
DQA1_16
T11
DQA1_19
T13
DQA1_23
N11
DQA1_22
N13
DQA1_20
M11
DQA1_21
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKA1_0
D4
WCKA1_0#
D5
WCKA1_1
P4
WCKA1_1#
P5 J11
CK#
CK
CLKA1
J12
CKEA1#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
for DB2
WCKA1_0 [16]ADBIA1#[16] WCKA1_0# [16] WCKA1_1 [16] WCKA1_1# [16]
CLKA1# [16] CLKA1 [16] CKEA1# [16]
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
MF=1 Mirror
+1.5V_VGA
6/29: SI add
R193 *0_4/SR193 *0_4/S
+1.5V_VGA
C329 1U/6.3V_4C329 1U/6.3V_4 R188 5.49K_4R188 5.49K_4
C330 1U/6.3V_4C330 1U/6.3V_4 R187 2.37K_4R187 2.37K_4
C344 1U/6.3V_4C344 1U/6.3V_4 R194 5.49K_4R194 5.49K_4
C345 1U/6.3V_4C345 1U/6.3V_4 R195 2.37K_4R195 2.37K_4
C721 1U/6.3V_4C721 1U/6.3V_4 R546 5.49K_4R546 5.49K_4
C730 1U/6.3V_4C730 1U/6.3V_4 R549 2.37K_4R549 2.37K_4
DBIA1_1[16] DBIA1_3[16]
EDCA1_1[16] EDCA1_3[16]
CASA1#[16] RASA1#[16]
WEA1#[16]
CSA1#[16]
R763 0_4R763 0_4 R190 120_4R190 120_4
R765 0_4R765 0_4
VREFC_VMA4
VREFD_VMA4
VREFC_VMAU4
CASA1# RASA1# WEA1# CSA1#
MAA1_8
VM_RST#
ADBIA1#
MAA1_0 MAA1_1 MAA1_3 MAA1_2 MAA1_5 MAA1_4 MAA1_6 MAA1_7
+1.5V_VGA
K4
K5 K10 K11
H10 H11
H5
H4
D2
D13
P13
P2
C2
C13 R13
R2
G3
L3
G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1 G4
L1
L4
R5
C10 D11 G11 G14
L11 L14 P11
R10
B1
B3
D1
D3
E5
F1
F3
G2
H3
K3
L2
M1 M3
N5
P1
P3
T1
T3 B12 B14
D12 D14
E10 F12 F14
G13 H12
K12 L13
M12 M14 N10
P12 P14 T12 T14
U16
U16
A8/A7_A10/A0 A11/A6_A9/A1 BA1/A5_BA3/A3 BA2/A4_BA0/A2 BA3/A3_BA1/A5 BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23 WCK23/WCK01
CK#
CKE#
VSS#B5 VSS#G5 VSS#H1
VSS#K1
VSS#L5
VSS#T5
VSS#B10 VSS#D10 VSS#G10 VSS#H14 VSS#K14
VSS#L10
VSS#P10
VSS#T10
VSSQ#A1
VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4
VSSQ#E1
VSSQ#E3
VSSQ#F5 VSSQ#H2
VSSQ#K2 VSSQ#M5 VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1 VSSQ#U3
VSSQ#A12
VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14
VSSQ#E12
VSSQ#E14
VSSQ#F10 VSSQ#H13
VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
21
DQA1_9
A4
DQA1_8
A2
DQA1_11
B4
DQA1_10
B2
DQA1_12
E4
DQA1_15
E2
DQA1_13
F4
DQA1_14
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQA1_26
U11
DQA1_29
U13
DQA1_27
T11
DQA1_28
T13
DQA1_25
N11
DQA1_31
N13
DQA1_24
M11
DQA1_30
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKA1_0
D4
WCKA1_0#
D5
WCKA1_1
P4
WCKA1_1#
P5
CLKA1#
J11
CLKA1
J12
CK
CKEA1#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
CLKA1CLKA1#
R185 60.4_4R185 60.4_4
CLKA1#
R182 60.4_4R182 60.4_4
+1.5V_VGA
C349 2.2U/10V_4C349 2.2U/10V_4
+1.5V_VGA
C335 2.2U/10V_4C335 2.2U/10V_4
C331 2.2U/10V_4C331 2.2U/10V_4C750 2.2U/10V_4C750 2.2U/10V_4
Change 1u to 2.2,for ATI Request 1212
C724 2.2U/10V_4C724 2.2U/10V_4
C727 2.2U/10V_4C727 2.2U/10V_4
+1.5V_VGA
C337 2.2U/10V_4C337 2.2U/10V_4
C333 2.2U/10V_4C333 2.2U/10V_4
C357 10U/6.3V_8C357 10U/6.3V_8
C729 1U/6.3V_4C729 1U/6.3V_4
C340 1U/6.3V_4C340 1U/6.3V_4
C760 10U/6.3V_8C760 10U/6.3V_8
C743 1U/6.3V_4C743 1U/6.3V_4
C161 10U/6.3V_8C161 10U/6.3V_8
C350 10U/6.3V_8C350 10U/6.3V_8
C334 1U/6.3V_4C334 1U/6.3V_4
DQA1_[31..0][16]
MAA1_[8..0][16]
U40
U40
MAA1_7
K4
A8/A7_A10/A0
MAA1_6
K5
A11/A6_A9/A1
MAA1_5
K10
BA1/A5_BA3/A3
MAA1_4
K11
BA2/A4_BA0/A2
MAA1_3
H10
BA3/A3_BA1/A5
MAA1_2
H11
BA0/A2_BA2/A4
MAA1_1
H5
D D
+1.5V_VGA
EDCA1_0[16]
R544 *0_4/SR544 *0_4/S
EDCA1_2[16]
6/29: SI add
R552 120_4R552 120_4
VM_RST#[16,20,22,23]
C C
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
B B
A A
C734 1U/6.3V_4C734 1U/6.3V_4 R554 5.49K_4R554 5.49K_4
C735 1U/6.3V_4C735 1U/6.3V_4 R555 2.37K_4R555 2.37K_4
C722 1U/6.3V_4C722 1U/6.3V_4 R547 5.49K_4R547 5.49K_4
C731 1U/6.3V_4C731 1U/6.3V_4 R550 2.37K_4R550 2.37K_4
C757 1U/6.3V_4C757 1U/6.3V_4 R559 5.49K_4R559 5.49K_4
C758 1U/6.3V_4C758 1U/6.3V_4 R560 2.37K_4R560 2.37K_4
DBIA1_0[16] DBIA1_2[16]
R762 0_4R762 0_4
R764 0_4R764 0_4
VREFC_VMA3
VREFD_VMA3
DBIA1_0 DBIA1_2
EDCA1_0 EDCA1_2
RASA1# CASA1# CSA1# WEA1#
MAA1_8
VM_RST#
ADBIA1#
VREFD_VMAU3
MAA1_0
+1.5V_VGA
H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3 G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1 G4
L1
L4
R5 C10 D11 G11 G14
L11
L14 P11 R10
B1 B3 D1 D3 E5 F1 F3
G2
H3 K3
L2 M1 M3
N5
P1
P3
T1
T3
B12 B14 D12 D14 E10 F12 F14 G13 H12 K12
L13 M12 M14 N10 P12 P14 T12 T14
A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
WCK01/WCK23 WCK23/WCK01
VSSQ#C11 VSSQ#C12 VSSQ#C14
VSSQ#H13 VSSQ#M10
VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
+1.5V_VGA[16,19,20,22,23,47]
PD7
PD7
PD7
5
4
3
2
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
VRAM-A1
VRAM-A1
VRAM-A1
Date: Sheet
Date: Sheet
Date: Sheet
1
21 47Wednesday, October 13, 2010
21 47Wednesday, October 13, 2010
21 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
4
3
2
1
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16 DQ9/DQ17
DQ16/DQ8 DQ17/DQ9
DQ24/DQ0 DQ25/DQ1 DQ26/DQ2 DQ27/DQ3 DQ28/DQ4 DQ29/DQ5 DQ30/DQ6 DQ31/DQ7
CKE#
VSS#B5 VSS#G5 VSS#H1 VSS#K1 VSS#L5 VSS#T5
VSS#B10 VSS#D10 VSS#G10 VSS#H14
VSS#K14
VSS#L10
VSS#P10
VSS#T10
VSSQ#A1 VSSQ#A3
VSSQ#C1 VSSQ#C3 VSSQ#C4
VSSQ#E1 VSSQ#E3 VSSQ#F5
VSSQ#H2
VSSQ#K2
VSSQ#M5 VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1
VSSQ#U3 VSSQ#A12 VSSQ#A14
VSSQ#E12 VSSQ#E14 VSSQ#F10
VSSQ#K13
1GB GDDR5 : CHANNEL B-0 (64M x 16)
MAB0_0
R766 0_4R766 0_4 R539 120_4R539 120_4
R768 0_4R768 0_4
VREFD_VMB2
VREFD_VMBU2
MAB0_1 MAB0_3 MAB0_2 MAB0_5 MAB0_4 MAB0_6 MAB0_7
CASB0# RASB0# WEB0# CSB0#
MAB0_8
VM_RST#
ADBIB0#
+1.5V_VGA
DQB0_21
A4
DQB0_18
A2
DQB0_20
B4
DQB0_16
B2
DQB0_19
E4
DQB0_23
E2
DQB0_17
F4
DQB0_22
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQB0_2
U11
DQB0_1
U13
DQB0_3
T11
DQB0_0
T13
DQB0_6
N11
DQB0_5
N13
DQB0_7
M11
DQB0_4
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKB0_1
D4
WCKB0_1#
D5
WCKB0_0
P4
WCKB0_0#
P5
CLKB0#
J11
CK#
CK
CLKB0
J12
CKEB0#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
WCKB0_1 [16] WCKB0_1# [16] WCKB0_0 [16] WCKB0_0# [16]
CLKB0# [16] CLKB0 [16] CKEB0# [16]
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
CLKB0 CLKB0#
MF=1 Mirror
+1.5V_VGA
R541 *0_4/SR541 *0_4/S
6/29: SI add
C703 1U/6.3V_4C703 1U/6.3V_4 R540 5.49K_4R540 5.49K_4
C711 1U/6.3V_4C711 1U/6.3V_4 R538 2.37K_4R538 2.37K_4
C691 1U/6.3V_4C691 1U/6.3V_4 R530 5.49K_4R530 5.49K_4
C698 1U/6.3V_4C698 1U/6.3V_4 R537 2.37K_4R537 2.37K_4
C282 1U/6.3V_4C282 1U/6.3V_4 R174 5.49K_4R174 5.49K_4
C286 1U/6.3V_4C286 1U/6.3V_4 R173 2.37K_4R173 2.37K_4
R159 60.4_4R159 60.4_4 R163 60.4_4R163 60.4_4
DBIB0_3[16] DBIB0_1[16]
EDCB0_3[16] EDCB0_1[16]
+1.5V_VGA
VREFC_VMB2
+1.5V_VGA
K4
K5 K10 K11
H10 H11
H5
H4
D2
D13
P13
P2
C2
C13 R13
R2
G3
L3
G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1 G4
L1
L4
R5
C10 D11 G11 G14
L11 L14 P11
R10
B1
B3
D1
D3
E5
F1
F3
G2
H3
K3
L2
M1 M3
N5
P1
P3
T1
T3 B12 B14
D12 D14
E10 F12 F14
G13 H12
K12 L13
M12 M14 N10
P12 P14 T12 T14
U36
U36
A8/A7_A10/A0 A11/A6_A9/A1 BA1/A5_BA3/A3 BA2/A4_BA0/A2 BA3/A3_BA1/A5 BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23 WCK23/WCK01
CK#
CKE#
VSS#B5 VSS#G5 VSS#H1
VSS#K1
VSS#L5
VSS#T5
VSS#B10 VSS#D10 VSS#G10 VSS#H14 VSS#K14
VSS#L10
VSS#P10
VSS#T10
VSSQ#A1
VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4
VSSQ#E1
VSSQ#E3
VSSQ#F5 VSSQ#H2
VSSQ#K2 VSSQ#M5 VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1 VSSQ#U3
VSSQ#A12
VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14
VSSQ#E12
VSSQ#E14
VSSQ#F10 VSSQ#H13
VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
22
DQB0_24
A4
DQB0_25
A2
DQB0_27
B4
DQB0_28
B2
DQB0_31
E4
DQB0_30
E2
DQB0_26
F4
DQB0_29
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQB0_13
U11
DQB0_10
U13
DQB0_11
T11
DQB0_12
T13
DQB0_15
N11
DQB0_8
N13
DQB0_14
M11
DQB0_9
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKB0_1
D4
WCKB0_1#
D5
WCKB0_0
P4
WCKB0_0#
P5
CLKB0#
J11
CLKB0
J12
CK
CKEB0#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
+1.5V_VGA
C167 1U/6.3V_4C167 1U/6.3V_4
C607 2.2U/10V_4C607 2.2U/10V_4
C709 2.2U/10V_4C709 2.2U/10V_4
C602 2.2U/10V_4C602 2.2U/10V_4
+1.5V_VGA
C605 2.2U/10V_4C605 2.2U/10V_4
C522 1U/6.3V_4C522 1U/6.3V_4
C601 2.2U/10V_4C601 2.2U/10V_4
C611 2.2U/10V_4C611 2.2U/10V_4
C160 1U/6.3V_4C160 1U/6.3V_4
C48 2.2U/10V_4C48 2.2 U/1 0V_4
C609 2.2U/10V_4C609 2.2U/10V_4
Change 1u to 2.2,for ATI Request 1212
C604 10U/6.3V_8C604 10U/6.3V_8
C667 10U/6.3V_8C667 10U/6.3V_8
C606 10U/6.3V_8C606 10U/6.3V_8
C158 1U/6.3V_4C158 1U/6.3V_4
C280 10U/6.3V_8C280 10U/6.3V_8
DQB0_[0..31][16]
MAB0_[0..8][16]
U12
U12
MAB0_7
K4
A8/A7_A10/A0
MAB0_6
K5
A11/A6_A9/A1
MAB0_5
K10
BA1/A5_BA3/A3
MAB0_4
K11
BA2/A4_BA0/A2
MAB0_3
H10
BA3/A3_BA1/A5
MAB0_2
H11
D D
DBIB0_2
+1.5V_VGA
R166 *0_4/SR166 *0_4/S
C C
+1.5V_VGA
+1.5V_VGA
B B
A A
+1.5V_VGA
C285 1U/6.3V_4C285 1U/6.3V_4 R168 5.49K_4R168 5.49K_4
C281 1U/6.3V_4C281 1U/6.3V_4 R169 2.37K_4R169 2.37K_4
C284 1U/6.3V_4C284 1U/6.3V_4 R165 5.49K_4R165 5.49K_4
C283 1U/6.3V_4C283 1U/6.3V_4 R171 2.37K_4R171 2.37K_4
C267 1U/6.3V_4C267 1U/6.3V_4 R155 5.49K_4R155 5.49K_4
C249 1U/6.3V_4C249 1U/6.3V_4 R150 2.37K_4R150 2.37K_4
DBIB0_2[16] DBIB0_0[16]
EDCB0_2[16] EDCB0_0[16]
RASB0#[16] CASB0#[16]
CSB0#[16]
WEB0#[16]
6/29: SI add
R167 120_4R167 120_4
VM_RST#[16,20,21,23]
ADBIB0#[16]
VREFC_VMB1
R767 0_4R767 0_4
R769 0_4R769 0_4
VREFD_VMB1
VREFD_VMBU1
DBIB0_0
EDCB0_2 EDCB0_0
RASB0# CASB0# CSB0# WEB0#
MAB0_8
VM_RST#
ADBIB0#
MAB0_1 MAB0_0
+1.5V_VGA
H5 H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3 G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1 G4
L1
L4
R5 C10 D11 G11 G14
L11
L14 P11 R10
B1 B3 D1 D3 E5 F1 F3
G2
H3 K3
L2 M1 M3
N5
P1
P3
T1
T3
B12 B14 D12 D14 E10 F12 F14 G13 H12 K12
L13 M12 M14 N10 P12 P14 T12 T14
BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
WCK01/WCK23 WCK23/WCK01
VSSQ#C11 VSSQ#C12 VSSQ#C14
VSSQ#H13 VSSQ#M10
VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
+1.5V_VGA [16,19,20,21,23,47]
5
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
+1.5V_VGA[16,19,20,21,23,47]
4
3
2
PD7
PD7
PD7
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
VRAM-B0
VRAM-B0
VRAM-B0
Date: Sheet
Date: Sheet
Date: Sheet
1
22 47Wednesday, October 13, 2010
22 47Wednesday, October 13, 2010
22 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
4
3
2
1
DQB1_[0..31][16]
MAB1_[0..8][16]
U30
U30
MAB1_7
K4
A8/A7_A10/A0
MAB1_6
K5
A11/A6_A9/A1
MAB1_5
K10
BA1/A5_BA3/A3
MAB1_4
K11
D D
+1.5V_VGA
R401 *0_4/SR401 *0_4/S
DBIB1_0[16] DBIB1_2[16]
EDCB1_0[16] EDCB1_2[16]
6/29: SI add
R402 120_4R402 120_4
VM_RST#[16,20,21,22]
C C
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
B B
A A
ADBIB1#[16]
C519 1U/6.3V_4C519 1U/6 .3 V_4 R403 5.49K_4R403 5.49K_4
C513 1U/6.3V_4C513 1U/6 .3 V_4 R407 2.37K_4R407 2.37K_4
C515 1U/6.3V_4C515 1U/6.3V_4 R397 5.49K_4R397 5.49K_4
C516 1U/6.3V_4C516 1U/6.3V_4 R398 2.37K_4R398 2.37K_4
C523 1U/6.3V_4C523 1U/6.3V_4 R404 5.49K_4R404 5.49K_4
C514 1U/6.3V_4C514 1U/6.3V_4 R408 2.37K_4R408 2.37K_4
DBIB1_0 DBIB1_2
EDCB1_0 EDCB1_2
RASB1# CASB1# CSB1# WEB1#
MAB1_8
R771 0_4R771 0_4
VM_RST#
R773 0_4R773 0_4
ADBIB1#
VREFC_VMB3
VREFD_VMB3
VREFD_VMBU3
MAB1_3 MAB1_2 MAB1_1
+1.5V_VGA
H10 H11
H5 H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3
G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1
G4
L1 L4
R5 C10 D11 G11 G14
L11
L14 P11 R10
B1 B3 D1 D3 E5
F1
F3 G2 H3 K3
L2 M1 M3 N5 P1 P3
T1
T3
B12 B14 D12 D14 E10 F12 F14 G13 H12 K12
L13 M12 M14
N10 P12 P14 T12 T14
BA2/A4_BA0/A2 BA3/A3_BA1/A5 BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23 WCK23/WCK01
CKE#
VSS#B5 VSS#G5 VSS#H1 VSS#K1
VSS#L5 VSS#T5
VSS#B10 VSS#D10 VSS#G10 VSS#H14
VSS#K14
VSS#L10
VSS#P10
VSS#T10
VSSQ#A1 VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4 VSSQ#E1 VSSQ#E3 VSSQ#F5 VSSQ#H2 VSSQ#K2
VSSQ#M5
VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1 VSSQ#U3
VSSQ#A12 VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14 VSSQ#E12 VSSQ#E14
VSSQ#F10 VSSQ#H13 VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
1GB GDDR5 : CHANNEL B-1 (64M x 16)
MAB1_0 MAB1_1 MAB1_3 MAB1_2 MAB1_5 MAB1_4 MAB1_6 MAB1_7
CASB1# RASB1# WEB1# CSB1#
MAB1_8
VM_RST#
ADBIB1#
+1.5V_VGA
K4
K5 K10 K11 H10 H11
H5
H4
D2 D13 P13
P2
C2 C13 R13
R2
G3
L3 G12
L12
A5
J5
U5
J1
J13
J2
J10
J4
J14
A10
U10
C5
G1
G4
L1
L4
R5 C10 D11 G11 G14
L11
L14 P11 R10
B1 B3 D1 D3 E5 F1 F3 G2 H3 K3
L2 M1 M3
N5
P1
P3
T1
T3
B12 B14 D12 D14 E10 F12 F14 G13 H12 K12
L13
M12 M14 N10 P12 P14 T12 T14
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
MF=1 Mirror
R82 *0_4/SR82 *0_4/S
6/29: SI add
+1.5V_VGA
C54 1U/6.3V_4C54 1U/6.3V_4 R51 5.49K_4R51 5.49K_4
C60 1U/6.3V_4C60 1U/6.3V_4 R60 2.37K_4R60 2.37K_4
C87 1U/6.3V_4C87 1U/6.3V_4 R85 5.49K_4R85 5.49K_4
C102 1U/6.3V_4C102 1U/6.3V_4 R86 2.37K_4R86 2.37K_4
C518 1U/6.3V_4C518 1U/6.3V_4 R400 5.49K_4R400 5.49K_4
C517 1U/6.3V_4C517 1U/6.3V_4 R399 2.37K_4R399 2.37K_4
DBIB1_1[16] DBIB1_3[16]
EDCB1_1[16] EDCB1_3[16]
CASB1#[16] RASB1#[16]
WEB1#[16]
CSB1#[16]
R770 0_4R770 0_4 R52 120_4R52 120_4
R772 0_4R772 0_4
VREFC_VMB4
VREFD_VMB4
VREFD_VMBU4
DQB1_6
A4
DQB1_5
A2
DQB1_7
B4
DQB1_1
B2
DQB1_4
E4
DQB1_3
E2
DQB1_2
F4
DQB1_0MAB1_0
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQB1_16
U11
DQB1_19
U13
DQB1_17
T11
DQB1_18
T13
DQB1_21
N11
DQB1_20
N13
DQB1_23
M11
DQB1_22
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKB1_0
D4
WCKB1_0#
D5
WCKB1_1
P4
WCKB1_1#
P5
CLKB1#
J11
CK#
CK
CLKB1
J12
CKEB1#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
for DB2
WCKB1_0 [16] WCKB1_0# [16] WCKB1_1 [16] WCKB1_1# [16]
CLKB1# [16] CLKB1 [16] CKEB1# [16]
U8
U8
A8/A7_A10/A0 A11/A6_A9/A1 BA1/A5_BA3/A3 BA2/A4_BA0/A2 BA3/A3_BA1/A5 BA0/A2_BA2/A4 A9/A1_A11/A6 A10/A0_A8/A7
DBI0#/DBI3# DBI1#/DBI2# DBI2#/DBI1# DBI3#/DBI0#
EDC0/EDC3 EDC1/EDC2 EDC2/EDC1 EDC3/EDC0
RAS#/CAS# CAS#/RAS# CS#/WE# WE#/CS#
NC1 NC2 NC3
MF ZQ RESET# SEN ABI#
VREFC
VREFD#A10
VREFD#U10
VDD#C5 VDD#G1 VDD#G4 VDD#L1 VDD#L4 VDD#R5 VDD#C10 VDD#D11 VDD#G11 VDD#G14 VDD#L11 VDD#L14 VDD#P11 VDD#R10
VDDQ#B1 VDDQ#B3 VDDQ#D1 VDDQ#D3 VDDQ#E5 VDDQ#F1 VDDQ#F3 VDDQ#G2 VDDQ#H3 VDDQ#K3 VDDQ#L2 VDDQ#M1 VDDQ#M3 VDDQ#N5 VDDQ#P1 VDDQ#P3 VDDQ#T1 VDDQ#T3 VDDQ#B12 VDDQ#B14 VDDQ#D12 VDDQ#D14 VDDQ#E10 VDDQ#F12 VDDQ#F14 VDDQ#G13 VDDQ#H12 VDDQ#K12 VDDQ#L13 VDDQ#M12 VDDQ#M14 VDDQ#N10 VDDQ#P12 VDDQ#P14 VDDQ#T12 VDDQ#T14
K4G52324FG
K4G52324FG
WCK01#/WCK23# WCK23#/WCK01#
170-BALL
170-BALL SDRAM GDDR5
SDRAM GDDR5
DQ0/DQ24 DQ1/DQ25 DQ2/DQ26 DQ3/DQ27 DQ4/DQ28 DQ5/DQ29 DQ6/DQ30 DQ7/DQ31
DQ8/DQ16
DQ9/DQ17 DQ10/DQ18 DQ11/DQ19 DQ12/DQ20 DQ13/DQ21 DQ14/DQ22 DQ15/DQ23
DQ16/DQ8
DQ17/DQ9 DQ18/DQ10 DQ19/DQ11 DQ20/DQ12 DQ21/DQ13 DQ22/DQ14 DQ23/DQ15
DQ24/DQ0
DQ25/DQ1
DQ26/DQ2
DQ27/DQ3
DQ28/DQ4
DQ29/DQ5
DQ30/DQ6
DQ31/DQ7
WCK01/WCK23 WCK23/WCK01
CK#
CKE#
VSS#B5
VSS#G5
VSS#H1 VSS#K1 VSS#L5
VSS#T5 VSS#B10 VSS#D10 VSS#G10 VSS#H14 VSS#K14
VSS#L10 VSS#P10 VSS#T10
VSSQ#A1 VSSQ#A3 VSSQ#C1 VSSQ#C3 VSSQ#C4 VSSQ#E1 VSSQ#E3 VSSQ#F5 VSSQ#H2 VSSQ#K2
VSSQ#M5
VSSQ#N1 VSSQ#N3 VSSQ#R1 VSSQ#R3 VSSQ#R4 VSSQ#U1
VSSQ#U3 VSSQ#A12 VSSQ#A14 VSSQ#C11 VSSQ#C12 VSSQ#C14 VSSQ#E12 VSSQ#E14 VSSQ#F10 VSSQ#H13 VSSQ#K13 VSSQ#M10 VSSQ#N12 VSSQ#N14 VSSQ#R11 VSSQ#R12 VSSQ#R14 VSSQ#U12 VSSQ#U14
DQB1_9
A4
DQB1_10
A2
DQB1_15
B4
DQB1_8
B2
DQB1_11
E4
DQB1_13
E2
DQB1_14
F4
DQB1_12
F2 A11
A13 B11 B13 E11 E13 F11 F13
DQB1_27
U11
DQB1_30
U13
DQB1_25
T11
DQB1_29
T13
DQB1_26
N11
DQB1_28
N13
DQB1_24
M11
DQB1_31
M13 U4
U2 T4 T2 N4 N2 M4 M2
WCKB1_0
D4
WCKB1_0#
D5
WCKB1_1
P4
WCKB1_1#
P5
CLKB1#
J11
CLKB1
J12
CK
CKEB1#
J3
B5 G5 H1 K1 L5 T5 B10 D10 G10 H14 K14 L10 P10 T10
A1 A3 C1 C3 C4 E1 E3 F5 H2 K2 M5 N1 N3 R1 R3 R4 U1 U3 A12 A14 C11 C12 C14 E12 E14 F10 H13 K13 M10 N12 N14 R11 R12 R14 U12 U14
CLKB1
R70 60.4_4R70 60.4_4 R65 60.4_4R65 60.4_4
CLKB1#
+1.5V_VGA
C707 2.2U/10V_4C707 2.2U/10V_4
C708 2.2U/10V_4C708 2.2U/10V_4
C272 2.2U/10V_4C272 2.2U/10V_4
C706 2.2U/10V_4C706 2.2U/10V_4
+1.5V_VGA
C166 2.2U/10V_4C166 2.2U/10V_4
C170 2.2U/10V_4C170 2.2U/10V_4
C666 2.2U/10V_4C666 2.2U/10V_4
C705 1U/6.3V_4C705 1U/6.3V_4
C704 2.2U/10V_4C704 2.2U/10V_4
C212 2.2U/10V_4C212 2.2U/10V_4
C163 2.2U/10V_4C163 2.2U/10V_4
C168 1U/6.3V_4C168 1U/6.3V_4
Change 1u to 2.2,for ATI Request 1212
+1.5V_VGA
C169 10U/6.3V_8C169 10U/6.3V_8
C232 10U/6.3V_8C232 10U/6.3V_8
23
C648 10U/6.3V_8C648 10U/6.3V_8
C164 10U/6.3V_8C164 10U/6.3V_8
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
+1.5V_VGA[16,19,20,21,22,47]
PD7
PD7
PD7
5
4
3
2
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
VRAM-B1
VRAM-B1
VRAM-B1
Date: Sheet
Date: Sheet
Date: Sheet
1
23 47Wednesday, October 13, 2010
23 47Wednesday, October 13, 2010
23 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
A
FOR DIS ONLY
OPTION SIGNAL FROM NB to LVDS for DIS
GPU_TXLCLKOUT+[17]
GPU_TXLCLKOUT-[17]
GPU_TXLOUT0+[17]
GPU_TXLOUT0-[17]
GPU_TXLOUT1+[17]
GPU_TXLOUT1-[17]
GPU_TXLOUT2+[17]
4 4
GPU_TXLOUT2-[17]
GPU_TXLCLKOUT+ GPU_TXLCLKOUT­GPU_TXLOUT0+ GPU_TXLOUT0­GPU_TXLOUT1+ GPU_TXLOUT1­GPU_TXLOUT2+ GPU_TXLOUT2-
OPTION Back Light SIGNAL FROM NB to LVDS for DIS
GPU_LVDS_BLON[17,18] GPU_DISP_ON[17]
RP22 0_4P2R_4RP22 0_4P2R_4
3 1 1 3
RP24 0_4P2R_4RP24 0_4P2R_4
1 3
RP25 0_4P2R_4RP25 0_4P2R_4
3 1
RP27 0_4P2R_4RP27 0_4P2R_4
GPU_LVDS_BLON LVDS_BLON
1 3
TXLCLKOUT+
4
TXLCLKOUT-
2
TXLOUT0+
2
TXLOUT0-
4
TXLOUT1+
2
TXLOUT1-
4
TXLOUT2+
4
TXLOUT2-
2
2
DISP_ONGPU_DISP_ON
4
OPTION SIGNAL FROM NB to LVDS for DIS
GPU_EDIDCLK[17] GPU_EDIDDATA[17]
GPU_DPST_PWM[17] DPST_PWM [25]
PWM_VADJ[35]
3 3
PCH_LA_CLK[7]
PCH_LA_CLK#[7] PCH_LA_DATAP0[7] PCH_LA_DATAN0[7] PCH_LA_DATAP1[7] PCH_LA_DATAN1[7] PCH_LA_DATAP2[7] PCH_LA_DATAN2[7]
GPU_EDIDCLK GPU_EDIDDATA
OPTION SIGNAL FROM NB to LVDS for UMA
PCH_LA_CLK PCH_LA_CLK# PCH_LA_DATAP0 PCH_LA_DATAN0 PCH_LA_DATAP1 PCH_LA_DATAN1 PCH_LA_DATAP2 PCH_LA_DATAN2
RP29 0_4P2R_4RP29 0_4P2R_4
3 1
GPU_DPST_PWM
R752 0_4R752 0_4
R779*0_4 R779*0_4
FOR UMA ONLY
RP6 *0_4P2R_4RP6 *0_4P2R_4
1 3
RP3 *0_4P2R_4RP3 *0_4P2R_4
3 1
RP4 *0_4P2R_4RP4 *0_4P2R_4
3 1
RP5 *0_4P2R_4RP5 *0_4P2R_4
1 3
EDIDCLK
4
EDIDDATA
2
DPST_PWM
2 4 4 2 4 2 2 4
TXLCLKOUT+ TXLCLKOUT­TXLOUT0+ TXLOUT0­TXLOUT1+ TXLOUT1­TXLOUT2+ TXLOUT2-
B
TXLCLKOUT+ [25]
TXLCLKOUT- [25] TXLOUT0+ [25] TXLOUT0- [25] TXLOUT1+ [25] TXLOUT1- [25] TXLOUT2+ [25] TXLOUT2- [25]
LVDS_BLON [25] DISP_ON [25]
EDIDCLK [25] EDIDDATA [25]
C
FOR DIS ONLY
OPTION SIGNAL FROM NB to CRT for DIS
GPU_CRT_R
GPU_CRT_R[17] GPU_CRT_G[17] GPU_CRT_B[17]
GPU_HSYNC[17,18] GPU_VSYNC[17,18]
OPTION SIGNAL FROM NB to CRT for DIS
GPU_DDCCLK[17] GPU_DDCDATA[17]
GPU_CRT_G
RP26 0_4P2R_4RP26 0_4P2R_4
GPU_HSYNC GPU_VSYNC
GPU_DDCCLK GPU_DDCDATA
R776 0_4R776 0_4RP23 0_4P2R_4RP23 0_4P2R_4 R777 0_4R777 0_4 R778 0_4R778 0_4
3 1
RP28 0_4P2R_4RP28 0_4P2R_4
3 1
4 2
4 2
CRT_R_CON CRT_G_CON CRT_B_CONGPU_CRT_B
HSYNC_COM VSYNC_COM
DDCCLK_COM DDCDATA_COM
CRT_R_CON [26] CRT_G_CON [26] CRT_B_CON [26]
HSYNC_COM [26] VSYNC_COM [26]
DDCCLK_COM [26] DDCDATA_COM [26]
D
PCH_LVDS_BLON PCH_DISP_ON GPU_LVDS_BLON
8/6 :PV Add
9/26 :MV Modify
R340 *100K_4R340 *100K_4 R8 *100K_4R8 *100K_4 R775 *100K_4R775 *100K_4
E
46
FOR UMA ONLY
OPTION SIGNAL FROM NB to CRT for UMA
PCH_CRT_R[7] PCH_CRT_G[7] PCH_CRT_B[7]
PCH_HSYNC[7]
PCH_VSYNC[7]
PCH_CRT_R PCH_CRT_G
PCH_HSYNC PCH_VSYNC
R389 *0_4R389 *0_4 R388 *0_4R388 *0_4 R377 *0_4R377 *0_4
1 3
RP16 *0_4P2R_4RP16 *0_4P2R_4
5/11:for Layout modify
OPTION SIGNAL FROM NB to CRT for UMA
PCH_DDCCLK[7] PCH_DDCDATA[7]
PCH_DDCCLK PCH_DDCDATA
RP17 *0_4P2R_4RP17 *0_4P2R_4
1 3
CRT_R_CON CRT_G_CON CRT_B_CONPCH_CRT_B
HSYNC_COM
2
VSYNC_COM
4
DDCCLK_COM
2
DDCDATA_COM
4
OPTION Back Light SIGNAL FROM NB to LVDS for UMA
PCH_LVDS_BLON[7]
PCH_DISP_ON[7]
PCH_EDIDDATA[7] PCH_EDIDCLK[7]
PCH_LVDS_BLON LVDS_BLON
PCH_EDIDDATA EDIDDATA PCH_EDIDCLK
OPTION SIGNAL FROM NB to LVDS for UMA
PCH_DPST_PWM[7]
PWM_VADJ[35]
2 2
PCH_DPST_PWM DPST_PWM
FOR UMA/SG
RP1 *0_4P2R_4RP1 *0_4P2R_4
3 1
RP2 *0_4P2R_4RP2 *0_4P2R_4
R353 *0_4R353 *0_4
R780*0_4 R780*0_4
4
3
2
1
4
EDIDCLK
2
DISP_ONPCH_DISP_ON
FOR 17"DIS ONLY
GPU_TXUCLKOUT+[17]
GPU_TXUCLKOUT-[17]
GPU_TXUOUT0+[17]
GPU_TXUOUT0-[17]
GPU_TXUOUT1+[17]
GPU_TXUOUT1-[17]
GPU_TXUOUT2+[17]
GPU_TXUOUT2-[17]
GPU_TXUCLKOUT+ GPU_TXUCLKOUT­GPU_TXUOUT0+ GPU_TXUOUT0­GPU_TXUOUT1+ GPU_TXUOUT1­GPU_TXUOUT2+ GPU_TXUOUT2-
RP30 0_4P2R_4RP30 0_4P2R_4
3 1
RP31 0_4P2R_4RP31 0_4P2R_4
3 1
RP32 0_4P2R_4RP32 0_4P2R_4
3 1
RP33 0_4P2R_4RP33 0_4P2R_4
3 1
TXUCLKOUT+
4
TXUCLKOUT-
2
TXUOUT0+
4
TXUOUT0-
2
TXUOUT1+
4
TXUOUT1-
2
TXUOUT2+
4
TXUOUT2-
2
TXUCLKOUT+ [25]
TXUCLKOUT- [25] TXUOUT0+ [25] TXUOUT0- [25] TXUOUT1+ [25] TXUOUT1- [25] TXUOUT2+ [25] TXUOUT2- [25]
FOR 17"UMA ONLY
PCH_LB_CLK[7]
PCH_LB_CLK#[7] PCH_LB_DATAP0[7] PCH_LB_DATAN0[7] PCH_LB_DATAP1[7] PCH_LB_DATAN1[7] PCH_LB_DATAP2[7] PCH_LB_DATAN2[7]
1 1
A
PCH_LB_CLK PCH_LB_CLK# PCH_LB_DATAP0 PCH_LB_DATAN0 PCH_LB_DATAP1 PCH_LB_DATAN1 PCH_LB_DATAP2 PCH_LB_DATAN2
RP10 *0_4P2R_4RP10 *0_4P2R_4
1 3
RP7 *0_4P2R_4RP7 *0_4P2R_4
1 3
RP8 *0_4P2R_4RP8 *0_4P2R_4
1 3
RP9 *0_4P2R_4RP9 *0_4P2R_4
1 3
TXUCLKOUT+
2
TXUCLKOUT-
4
TXUOUT0+
2
TXUOUT0-
4
TXUOUT1+
2
TXUOUT1-
4
TXUOUT2+
2
TXUOUT2-
4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5V [7,8,11,19,25,26,27,29,30,32,34,36,37,45] +1.8V [5,8,11,39,45]
B
C
D
PD7
PD7
PD7
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
SWITCHABLE
SWITCHABLE
SWITCHABLE
E
of
of
of
24 47Wednesday, October 13, 2010
24 47Wednesday, October 13, 2010
24 47Wednesday, October 13, 2010
1A
1A
1A
1
2
3
4
5
6
7
8
+3V
+12VALW
14.5v
R341
R341 330K_6
330K_6
Q24
Q24
1 2
AO3404
AO3404
LCDONG
3
2
Q22
Q22
2N7002
2N7002
D8 *RB500V-40D8 *RB500V-40
2 1
1
LCDON#
D7 RB500V-40D7 RB500V-40
5/7 : na D7
3
2
1
C464
C464
0.027U/25V_6
0.027U/25V_6
R334 100K_4R334 100K_4 C458 22P/50V_4C458 22P/50V_4
R333 47K_4R333 47K_4
Q23
Q23
PDTC144EU
PDTC144EU
2
R342
R342 100K_4
100K_4
+5VSUS
12
1 3
R345
R345 100K_4
100K_4
A A
DISP_ON[24]
B B
4/29 modify 5/7 stuff R9079
LID_CONTROL[35]
LVDS_BLON[24]
R335 *0_4/SR335 *0_4/S
R336 1K_4R336 1K_4
R338 100K_4R338 100K_4
PN_BLON
+3V
C467
C467
0.1U/10V_4
0.1U/10V_4
+3VLCD
L27 HCB2012KF-600T30/3A_8L27 HCB2012KF-600T30/3A_8
12
R349
R349 22_8
22_8
LCDDISCHG
3
Q25
Q25
2
2N7002
2N7002
1
BLON_CON
+3VPCU
LID_EC# [35,36]
C470
C470 *0.01U/25V_4
*0.01U/25V_4
+3VLCD_CON
C469
C469
0.1U/10V_4
0.1U/10V_4
+VIN
EMI Request
SI Add BOM
C475
C475 10U/6.3V_8
10U/6.3V_8
L1 UPB201209T-330Y-N/5A_8L1 UPB201209T-330Y-N/5A_8
C887
C887
C1
C1
0.1U/50V_6
0.1U/50V_6
0.1U/50V_6
0.1U/50V_6
12
C3
C3
0.01U/25V_4
0.01U/25V_4
R28 2.2K_4R28 2.2K_4
R25 2.2K_4R25 2.2K_4
DIGITAL_D1
DIGITAL_CLK
C10
C10 10P/50V_4
10P/50V_4
Close to CN2
+VIN_BLIGHT
+VIN_BLIGHT
C5
C5
C8
C8
0.1U/50V_6
0.1U/50V_6
*10U/25V_12
*10U/25V_12
C11
C11 10P/50V_4
10P/50V_4
R3 75/F_6R3 75/F_6
+5V
EDIDCLK
EDIDDATA
DIGITAL_D1[29] DIGITAL_CLK[29]
C16
C16 1000P/50V_4
1000P/50V_4
+3VLCD_CON EDIDCLK[24]
C9
C9 *4.7U/6.3V_6
*4.7U/6.3V_6
EDIDDATA[24]
TXLOUT0-[24]
TXLOUT0+[24]
TXLOUT1-[24]
TXLOUT1+[24]
TXLOUT2-[24]
TXLOUT2+[24]
TXLCLKOUT-[24]
TXLCLKOUT+[24]
TXUOUT0-[24]
TXUOUT0+[24]
TXUOUT1-[24]
TXUOUT1+[24]
TXUOUT2-[24]
TXUOUT2+[24]
TXUCLKOUT-[24]
TXUCLKOUT+[24]
+3.9V_CAM
4 3 1
L21 *WCM2012-90L21 *WCM2012-90
+VIN_BLIGHT
C7
C7 22P/50V_4
22P/50V_4
+LOGO_PWR1 DIGITAL_CLK_L USBP4-
USBP4+
2
BLON_CON
+3V
C468
C468 1000P/50V_4
1000P/50V_4
L2 SBK160808T-601Y-N/0.2A_6L2 SBK160808T-601Y-N/0.2A_6
USBP4-[9]
DPST_PWM[24]
USBP4+[9]
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
47
41
42
45
46
43
CN3
CN3
44
GS12401-1011-9F
GS12401-1011-9F
C C
LCD_BK[9]
2
Q3
Q3 *PDTC144EU
*PDTC144EU
1 3
+3VPCU +VIN +VIN +VIN
C12
C462
C462
0.1U/10V_4
0.1U/10V_4
C496
C496 *0.1U/25V_4
*0.1U/25V_4
C12 *0.1U/25V_4
*0.1U/25V_4
C891
C891 *0.1U/25V_4
*0.1U/25V_4
PV EMI request MV EMI Request
+5V +3.9V_CAM
C457
C457
1U/6.3V_4
1U/6.3V_4
EC_PWROK[7,35]
U20
U20
VIN3VOUT
1
SHDN
2
GND
AP2128K-3.9TRG1
AP2128K-3.9TRG1
SET
4
R1
5
R2
R337
R337 *215K/F_4
*215K/F_4
R339
R339 *100K/F_4
*100K/F_4
C460
C460 10U/6.3V_8
10U/6.3V_8
C461
C461
0.01U/25V_4
0.01U/25V_4
Vout=1.25(1+R1/R2)
D D
+3V[3,7,8,9,10,11,13,14,18,19,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5V[7,8,11,19,26,27,29,30,32,34,36,37,45]
+VIN[31,38,39,41,42,43,44,45]
+3VPCU[7,8,32,34,35,36,37,38,39,40,42,44,45,47]
+12VALW[34,37,42,44,45]
1
2
3
4
5
6
7
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
LCD CONN/LID function
LCD CONN/LID function
LCD CONN/LID function
8
25 47Wednesday, October 13, 2010
25 47Wednesday, October 13, 2010
25 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
4
3
2
1
C471 0.1U/10V_4C471 0.1U/10V_4
+5VCRT
F1
F1
40 mils
12
FUSE1A6V_POLY
FUSE1A6V_POLY
L29 BLM18BA470SN1D/0.3A_6L29 BLM18BA470SN1D/0.3A_6 L28 BLM18BA470SN1D/0.3A_6L28 BLM18BA470SN1D/0.3A_6 L26 BLM18BA470SN1D/0.3A_6L26 BLM18BA470SN1D/0.3A_6
C20
C20 *5.6P/16V_4
*5.6P/16V_4
C25
C25 *5.6P/16V_4
*5.6P/16V_4
+5V
C22
C22 *5.6P/16V_4
*5.6P/16V_4
10/13 PV2 EMI request
R12
R12 150/F_4
150/F_4
SI Change
D D
CRT_R_CON[24] CRT_G_CON[24] CRT_B_CON[24]
CRT_R_CON CRT_G_CON CRT_B_CON
R26
R26 150/F_4
150/F_4
R21
R21 150/F_4
150/F_4
+5VCRT
SSM14 spec is 40V 1A
C478
C478
5.6P/16V_4
5.6P/16V_4
40 MIL
CRT_R1 CRT_G1 CRT_B1
C484
C484
5.6P/16V_4
5.6P/16V_4
C488
C488
5.6P/16V_4
5.6P/16V_4
SI2 EMI Request
R11 22_4R11 22_4
+5V+3V
C501
C501
0.1U/10V_4
0.1U/10V_4
C C
CRT_R1 CRT_G1 CRT_B1
8/13: PV Add
C15
C15
0.1U/10V_4
0.1U/10V_4
C913
C913
ESD PROTECTION
*220P/50V_4
*220P/50V_4
1
VCC_SYNC
2
VCC_VIDEO
3
VIDEO_1
4
VIDEO_2
5
VIDEO_3
6
GND
7
VCC_DDC
8
BYP
C45
C45
0.22U/6.3V_4
0.22U/6.3V_4
U4
SYNC_OUT2
SYNC_IN2
SYNC_OUT1
SYNC_IN1
DDC_OUT2
DDC_OUT1
CM2009U4CM2009
DDC_IN2 DDC_IN1
+5VCRT
16 15 14 13 12 11 10 9
CRTVSYNC_1 VSYNC_COM CRTHSYNC_1 HSYNC_COM DDCCLK2 DDCCLK_COM DDCDATA_COM DDCDAT2
D1 RB501V-40D1 RB501V-40
2 1
VSYNC_COM [24] HSYNC_COM [24]
DDCCLK_COM [24] DDCDATA_COM [24]
+5V_CRT2
R6
2.2K_4R62.2K_4
R20
R20
2.2K_4
2.2K_4
R346 22_4R346 22_4 R5 *0_4/S
R5 *0_4/S
short0402
short0402
R350 *0_4/S
R350 *0_4/S
short0402
short0402
ETV"RQTV
1617
6
111
7
12
2 8
13
3 9
14
4
10
15
5
CRT CONN
CRT CONN CN19
CN19
CRTVSYNC_2 CRTHSYNC_2 DDCCLK3 DDCDAT3
C463
C463 *470P/50V_4
*470P/50V_4
C466
C466 10P/50V_4
10P/50V_4
C473
C473
*47P/50V_4
*47P/50V_4
C479
C479 10P/50V_4
10P/50V_4
SI EMI RequestSI EMI Request
48
B B
+3V [3,7,8,9,10,11,13,14,18,19,25,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47] +5V [7,8,11,19,25,27,29,30,32,34,36,37,45]
A A
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
CRT/HDMI Conn
CRT/HDMI Conn
CRT/HDMI Conn
1
26 47Wednesday, October 13, 2010
26 47Wednesday, October 13, 2010
26 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
4
3
2
1
*&/+"%10%1/
R430 *0_4R430 *0_4
R439 0_4R439 0_4
Q30
Q30
HDMI_SDA_R
+3V_HDMI1
2
1 3
R413
R413 10K_4
10K_4
R474 4.7K_4R474 4.7K_4
R475 4.7K_4R475 4.7K_4
D D
&+5マ5)"*&/+
N_TXC_HDMI-[17] N_TXC_HDMI+[17] N_TX0_HDMI-[17] N_TX0_HDMI+[17] N_TX1_HDMI-[17] N_TX1_HDMI+[17] N_TX2_HDMI-[17] N_TX2_HDMI+[17]
HDMI_SDA[17] HDMI_SCL[17]
C C
TMDS_HPD[17]
N_TXC_HDMI­N_TXC_HDMI+ N_TX0_HDMI­N_TX0_HDMI+ N_TX1_HDMI­N_TX1_HDMI+ N_TX2_HDMI­N_TX2_HDMI+
HDMI_SDA HDMI_SCL
TMDS_HPD HDMI_HPD_3V
C618 0.1U/10V_4C618 0.1U/10V_4 C620 0.1U/10V_4C620 0.1U/10V_4 C624 0.1U/10V_4C624 0.1U/10V_4 C630 0.1U/10V_4C630 0.1U/10V_4 C637 0.1U/10V_4C637 0.1U/10V_4 C641 0.1U/10V_4C641 0.1U/10V_4 C649 0.1U/10V_4C649 0.1U/10V_4 C655 0.1U/10V_4C655 0.1U/10V_4
R473 0_4R473 0_4 R468 0_4R468 0_4
R421 0_4R421 0_4
C_TXC_HDMI­C_TXC_HDMI+ C_TX0_HDMI­C_TX0_HDMI+ C_TX1_HDMI­C_TX1_HDMI+ C_TX2_HDMI­C_TX2_HDMI+
HDMI_SDA_R HDMI_SCL_R
MMBT3904-7-F
MMBT3904-7-F
HDMI_HPD_3V
FKU1UI<"609M WOC<"404M
FKU1UI<"609M WOC<"404M
+3V
+3V_VGA
5/3 modify for AMD request
R458
R458 200K/F_4
200K/F_4
12
R104 *0_4R104 *0_4
+3V_HDMI2
R121 0_4R121 0_4
2
1
Q33 FDV301NQ33 FDV301N
1
Q34 FDV301NQ34 FDV301N
3
+3V_HDMI2
2
3
12
HDMI_HPDHDMI_DET_P
R462
R462 *200K/F_4
*200K/F_4
10/13 PV2 EMI request
8/16 PV for EMI reserve
5/10 modify for AMD request
+3V
+3V_VGA
8/16 PV modify
HDMI_SDATA
HDMI_SCLKHDMI_SCL_R
HDMI_SCLK HDMI_SCLK_R HDMI_SDATA HDMI_SDATA_R
2A
+5V
HDMI_HPD_R
7/#"10.;"*&/+
C_TX2_HDMI+ C_TX2_HDMI-
R500 *100_4R500 *100_4
C_TX1_HDMI+ C_TX1_HDMI-
R499 *100_4R499 *100_4
C_TX0_HDMI+ C_TX0_HDMI-
R494 *100_4R494 *100_4
C_TXC_HDMI+ C_TXC_HDMI-
R491 *100_4R491 *100_4
R509 499/F_4R509 499/F_4
3
1
3
R508 499/F_4R508 499/F_4 R507 499/F_4R507 499/F_4 R506 499/F_4R506 499/F_4 R502 499/F_4R502 499/F_4 R504 499/F_4R504 499/F_4 R516 499/F_4R516 499/F_4 R515 499/F_4R515 499/F_4
HDMI_HPD[35]
C_TX2_HDMI+ C_TX2_HDMI­C_TX1_HDMI+ C_TX1_HDMI­C_TX0_HDMI+ C_TX0_HDMI­C_TXC_HDMI+ C_TXC_HDMI-
2
C116
C116
0.1U/10V_4
0.1U/10V_4
IN_CLK# IN_CLK IN_D0# IN_D0 IN_D1# IN_D1 IN_D2# IN_D2
SDVO_DATA SDVO_CLK
HDMI_HPD_CON
B B
A A
IN_CLK#[7] IN_CLK[7]
IN_D0#[7]
IN_D0[7]
IN_D1#[7]
IN_D1[7]
IN_D2#[7]
IN_D2[7]
SDVO_DATA[7]
SDVO_CLK[7]
HDMI_HPD_CON[7]
+3V
5
C190 *0.1U/10V_4C190 *0.1U/10V_4 C204 *0.1U/10V_4C204 *0.1U/10V_4 C210 *0.1U/10V_4C210 *0.1U/10V_4 C222 *0.1U/10V_4C222 *0.1U/10V_4 C243 *0.1U/10V_4C243 *0.1U/10V_4 C244 *0.1U/10V_4C244 *0.1U/10V_4 C268 *0.1U/10V_4C268 *0.1U/10V_4 C269 *0.1U/10V_4C269 *0.1U/10V_4
R486 *0_4R486 *0_4 R487 *0_4R487 *0_4
R418 *0_4R418 *0_4
C134
C134
0.1U/10V_4
0.1U/10V_4
C572
C572
0.1U/10V_4
0.1U/10V_4
C_TXC_HDMI­C_TXC_HDMI+ C_TX0_HDMI­C_TX0_HDMI+ C_TX1_HDMI­C_TX1_HDMI+ C_TX2_HDMI­C_TX2_HDMI+
HDMI_SDA_R HDMI_SCL_R
HDMI_HPD_3V
C115
C115
0.1U/10V_4
0.1U/10V_4
4
+5V+3V
8/11 PV Modify
R782
R782
R781
R781
*0_4
*0_4
0_4
0_4
1 2
C677
C677
GOK
Q37
Q37
2N7002K
2N7002K
2
R520
R520
100K_4
100K_4
0.1U/10V_4
0.1U/10V_4
9/26: MV Del C906,C914 9/26: MV Add D21
+5V_HDMVCC
+5V_HDMVCC
R111 *0_4/SR111 *0_4/S R122 *0_4/SR122 *0_4/S
F2
F2 FUSE1A6V_POLY
FUSE1A6V_POLY
PBY160808T-470Y-N/3A_6
PBY160808T-470Y-N/3A_6 L36
L36
C717
C717
1000P/50V_4
1000P/50V_4
12
D21
D21 RB501V-40
RB501V-40 D14
D14 RB501V-40
RB501V-40
4/20 DB update
R466 10K_4R466 10K_4
R463
R463 100K_4
100K_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
PD7
PD7
PD7
Custom Date: Sheet
Date: Sheet
Date: Sheet
R98
R98
2.2K_4
2.2K_4
C128
C128 *10P/50V_4
*10P/50V_4
C_TX2_HDMI+ C_TX2_HDMI-
C_TX1_HDMI+ C_TX1_HDMI-
C_TX0_HDMI+ C_TX0_HDMI-
C_TXC_HDMI+ C_TXC_HDMI-
HDMI_SCLK_R HDMI_SDATA_R
+5V_HDMVCC HDMI_HPD_L
C584
C584 220P/50V_4
220P/50V_4
D13
D13 *BAV99W
*BAV99W
3
KB/POWER CONN
KB/POWER CONN
KB/POWER CONN
10/13 PV2 EMI request
R128
R128
2.2K_4
2.2K_4
C172
C172 *10P/50V_4
*10P/50V_4
CN24
CN24
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
SHELL2
HDMI CONN
HDMI CONN
HDMI_HPD_RHDMI_HPD
1
+3V
2
1
49
C914
C914
1000P/50V_4
1000P/50V_4
20
21
of
of
of
27 47Wednesday, October 13, 2010
27 47Wednesday, October 13, 2010
27 47Wednesday, October 13, 2010
1A
1A
1A
8
7
6
5
4
3
2
1
XD_D7 SP14 SP13 SP12 SP11
22
12
SP1119SP1220SP1321SP14
GPIO0
SP10
18 17 16
SP9
15
SP8
14
SP7
13
SP6
SP5 SP4
ENQUG"EP35
SP10 SP9
SP8 SP7 SP6
C443
C443
2.2U/6.3V_6
2.2U/6.3V_6
R326
R326 150K/F_4
150K/F_4
+3VCARD+3VCARD
C455
C455
0.1U/10V_4
0.1U/10V_4
C449
C449
0.1U/10V_4
0.1U/10V_4
RTS5138_RREF
RTS5138_VREG
C848
C848 1U/10V_4
1U/10V_4
SD_CLK_RMS_CLK_R
RTS5138_CLK_IN
U47
U47
1
RREF
2
DM
3
DP
4
3V3_IN
5
CARD_3V3
6
V18
GND
25
XD_CD#
SP1 SP2 SP3
23
24
XD_D7
CLK_IN
RTS5138
RTS5138
XD_CD#7SP18SP29SP310SP411SP5
CLK_48M_CR[9]
D D
USBP5-[9]
USBP5+[9]
C C
C872
C872
*10p/50V_4
*10p/50V_4
R734 *0_4/SR734 *0_4/S C873 *5.6P/50V_4C873 *5.6P/50V_4 C871 *100P/50V_4C871 *100P/50V_4 R729
R729
6.19K/F_4
6.19K/F_4
+3VCARD
C866
C866
*10p/50V_4
*10p/50V_4
1 2
+3V
R723 33_4R723 33_4 R704 33_4R704 33_4
For Layout change
C441
C441
0.1U/10V_4
0.1U/10V_4
SP8SD_CLK SP1MS_CLK
Share Pin
+3V
C863
C863
C864
C864
4.7U/6.3V_6
4.7U/6.3V_6
0.1U/10V_4
0.1U/10V_4
XD_CD# SP1 XD_RDY SD_WP MS_CLK SP2 XD_RE# MS_INS# SP3 XD_CE# SD_D1 SP4 XD_CLE SD_D0 SP5 XD_ALE SD_D7 MS_D3 SP6 XD_WE# SD_CD# SP7 XD_WP SD_D6 SP8 XD_D0 SD_CLK MS_D2 SP9 XD_D1 SD_D5 MS_D0 SP10 XD_D2 SD_CMD SP11 XD_D3 SD_D4 SP12 XD_D4 SD_D3 MS_D1 SP13 XD_D5 SD_D2 SP14 XD_D6 MS_BS
XD_D7
+3VCARD
C851
C851 *0.1U/10V_4
*0.1U/10V_4
C849
C849 *0.1U/10V_4
*0.1U/10V_4
C850
C850 *0.1U/10V_4
*0.1U/10V_4
4:
B B
A A
8
+3VCARD +3VCARD +3VCARD
C456 *270P/25V_4C456 *270P/25V_4
XD_RE#
R332
R332 *10K_4
*10K_4
MS_CLK MS_CLK_R
7
XD_CE# XD_CLE XD_ALE XD_WE# XD_WP XD_D0 XD_D1 SD_D2 SD_D3 SD_CMD
R733 *0_4/SR733 *0_4/S
MS_D3 MS_INS# MS_D2 MS_D0
XD_RDY
6
XD,MMC/SD,MS/MSP 5 IN1 CARD READER
CN16
CN16
1
XD-R/B
2
XD-RE
3
XD-CE
4
XD-CLE
5
XD-ALE
6
XD-WE
7
XD-WP
8
XD-D0
9
XD-D1
10
SD-DAT2
11
SD-DAT3
12
SD-CMD
13
4IN1-GND1
14
MS-VCC
15
MS-SCLK
16
MS-DATA3
17
MS-INS
18
MS-DATA2
19
MS-DATA0
CARD READER SOCKET
CARD READER SOCKET
SHIELD1-GND SHIELD2-GND
5 IN1 CARD-READER (PUSH-PUSH)
Support SD/SD PRO/MMC/MS/MS PRO/xD Cards
5
MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2 XD-D3 XD-D4
SD-DAT1
XD-D5 XD-D6 XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW
BOS BOS
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
37 38 39 40
SD_CLK_R
MS_D1 MS_BS
R735 *0_4/SR735 *0_4/S
SD_D0 XD_D2 XD_D3 XD_D4 SD_D1 XD_D5 XD_D6 XD_D7
XD_CD# SD_WP SD_CD#
4
SD_CLKSD_CLK
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,29,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47]
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
Date: Sheet
2
RTS5138 & CR SOCKET
RTS5138 & CR SOCKET
RTS5138 & CR SOCKET
28 47Wednesday, October 13, 2010
28 47Wednesday, October 13, 2010
28 47Wednesday, October 13, 2010
1
1A
1A
1A
of
of
of
A
B
C
D
E
4;
+3V[3,7,8,9,10,11,13,14,18,19,25,26,27,28,30,31,32,33,34,35,36,37,39,40,41,43,45,46,47]
+4.75VAVDD[31]
+5V[7,8,11,19,25,26,27,30,32,34,36,37,45]
>40mils trace
+5V_AVDD
Close to CODEC
+3V
C817
C817
C816
C816
0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
+3V
C805
C805
0.1U/10V_4
0.1U/10V_4
JFC"Dwu
VQ"Fkikvcn"OKEVQ"Fkikvcn"OKE
VOLMUTE#[35]
1 1
ACZ_SDOUT_AUDIO[8]
ACZ_SYNC_AUDIO[8]
BIT_CLK_AUDIO[8]
ACZ_RST#_AUDIO[8]
ACZ_SDIN0[8]
DIGITAL_CLK[25] DIGITAL_D1[25]
+3V
D19 RB500V-40D19 RB500V-40
ADC_EAPD#[31]
IDT_GPIO0
R648 10K_4R648 10K_4
Close to CODEC
ACZ_SDIN0BIT_CLK_AUDIO
C812
+3V
VOLMUTE#
IDT_GPIO0
C812 33P/50V_4
33P/50V_4
FOR EMI
MUTE_LED
Low -->MUTE High-->un-Mute
MUTE_LED#[37]
R649 10K_4R649 10K_4
2
1
A
3
D18
D18 BAT54A
BAT54A
C815
C815 33P/50V_4
33P/50V_4
MUTE_LED_R
+3V_DVDD_CORE
C792
C792 10U/6.3VS_6
10U/6.3VS_6
R660 *0_4/SR660 *0_4/S
R664 33_4R664 33_4
R657 *0_4/SR657 *0_4/S
C810 *10P/50V_4C810 *10P/50V_4
R677 *0_4/SR677 *0_4/S
C819 *10P/50V_4C819 *10P/50V_4
C803 10P/50V_4C803 10P/50V_4 R650 100_4R650 100_4
R655 *0_4/SR655 *0_4/S C804 10P/50V_4C804 10P/50V_4
ADC_EAPD#
12
C801
C801
4.7U/6.3V_6
4.7U/6.3V_6
+3V
R672
R672 *100K_4
*100K_4
3
Q45
Q45
2N7002
2N7002
2
1
HD_BCLK HD_SDIN0 HD_SDOUT HD_SYNC
DMIC_CLK_R DMIC0
CAP-
CAP+
AGND
U45
U45
1
DVDD_CORE
9
DVDD
3
DVDD_IO
6
HDA_BITCLK
8
HDA_SDI
5
HDA_SDO
10
HDA_SYNC
11
HDA_RST#
2
DMIC_CLK/GPIO1
4
DMIC0/GPIO2
46
DMIC1/GPIO0/SPDIF_OUT_1
48
SPDIF_OUT_0
47
EAPD
7
DVSS
35
CAP-
36
CAP+
33
AVSS
30
AVSS
26
AVSS
42
PVSS
49
DAP
92HD80B1
92HD80B1
ADC_VREG
12
C794
C794
4.7U/6.3V_6
4.7U/6.3V_6
AGND
B
AVDD AVDD
PVDD
Digital
Digital
Analog
Analog
VREG37VREFFILT21CAP2
V-
22
34
ADC_V-
C802
C802 10U/6.3VS_6
10U/6.3VS_6
AGND AGND AGND
PVDD
SENSE_A SENSE_B
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_or_F
HP1_PORT_B_L
HP1_PORT_B_R
PORT_C_L
PORT_C_R
VREFOUT_C
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PC_BEEP
MONO_OUT
25
BASS_OUT
ADC_VREFFILT
C823
C823 10U/6.3VS_6
10U/6.3VS_6
27 38
39 45
13 14
28 29 23
31 32
19 20 24
40 41
43 44
15 16
17 18
12
ADC_CAP2
C822
C822 1U/6.3V_4
1U/6.3V_4
MIC_L MIC_R VREFOUT_A
HPOUT_L HPOUT_R
C825
C825 10U/6.3VS_6
10U/6.3VS_6
SENSE_A SENSE_B
AMP_BEEP
BASS_OUT [31]
SENSE_A [30]
L_SPK+ L_SPK-
R_SPK­R_SPK+
C10625 close C10629, and C10625 close Chip
VQ"Kpvgtpcn"Urgcmgtu
C820
C820
0.1U/10V_4
0.1U/10V_4
Close to CODEC
C796
C796 1U/6.3V_4
1U/6.3V_4
MIC_L [30] MIC_R [30] VREFOUT_A [30]
C
L24
L24
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
C436
C436
0.1U/10V_4
0.1U/10V_4
Del L48
AGND
Close to CODEC
VQ"Cwfkq"Lcem"OKE
HPOUT_L [30] HPOUT_R [30]
AMP_BEEP_L
C821
C821
0.1U/10V_4
0.1U/10V_4
AGND
EMI Request
L_SPK+ L_SPK­R_SPK­R_SPK+
+4.75VAVDD
C793
C793 1U/6.3V_4
1U/6.3V_4
AGND
AGND SHIELD AGND SHIELD AGND SHIELD
R681 47K_4R681 47K_4
R678
R678 10K_4
10K_4
R10453 close R10454
L59 SBK160808T-221Y-N/0.2A_6L59 SBK160808T-221Y-N/0.2A_6
L58 SBK160808T-221Y-N/0.2A_6L58 SBK160808T-221Y-N/0.2A_6
L57 SBK160808T-221Y-N/0.2A_6L57 SBK160808T-221Y-N/0.2A_6
L56 SBK160808T-221Y-N/0.2A_6L56 SBK160808T-221Y-N/0.2A_6
C858
C858 1000P/50V_4
1000P/50V_4
SI Add for subwoofer noies
12
C424
AGND
C797
C797
0.1U/10V_4
0.1U/10V_4
C424
4.7U/6.3V_6
4.7U/6.3V_6
+5V
C790
C790 10U/6.3VS_6
10U/6.3VS_6
C425
C425
0.1U/10V_4
0.1U/10V_4
>40mils trace
VQ"Jgcfrjqpg"lcem
C834
C834
0.1U/10V_4
AMP_BEEP_R2
0.1U/10V_4
2N7002
2N7002
Q46
Q46
INT. SPEAKER
L_SPK+_R
L_SPK-_R R_SPK-_R R_SPK+_R
C859
C859 1000P/50V_4
1000P/50V_4
C860
C860 1000P/50V_4
1000P/50V_4
AGND
U19
U19
5
Vout
Vin
4
C423
C423 1U/6.3V_4
1U/6.3V_4
BYP GND2EN
TPS793475
TPS793475
SENSE_A
SENSE_B
C827
C827 10U/6.3V_8
10U/6.3V_8
AGND AGND
PV Change +5V to +5V_AVDD
+5V_AVDD
Changed by IDT recommend
R696
R696 10K_4
10K_4
3
D
6/17
1
AGND
C861
C861 1000P/50V_4
1000P/50V_4
2
INT SPEAKER CONN
INT SPEAKER CONN
1 2 3 4
CN13
CN13
SPKR [8]
1
C431
C431
C437
3
R320 10K_4R320 10K_4
Vset=1.242V
C437
0.1U/10V_4
0.1U/10V_4
0.047U/10V_4
0.047U/10V_4
R674 2.49K/F_4R674 2.49K/F_4
C429 1000P/50V_4C429 1000P/50V_4 R671 100K/F_4R671 100K/F_4
C814 *1000P/50V_4C814 *1000P/50V_4
C427
C427 1U/6.3V_4
1U/6.3V_4
+5V
+5V_AVDD AGND
+5V_AVDD AGND
SI Del R518,R521
PV Del R239,R243,
R644 *0_4/SR644 *0_4/S
R698 *0_4/SR698 *0_4/S R266 *0_4/SR266 *0_4/S R622 *0_4/SR622 *0_4/S
R746 *0_4/SR746 *0_4/S R725 *0_4/SR725 *0_4/S
PV EMI Request
AGND
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Azalia 92HD80
Azalia 92HD80
Azalia 92HD80
Date: Sheet
Date: Sheet
Date: Sheet
E
C413
C413
0.1U/10V_4
0.1U/10V_4
29 47Wednesday, October 13, 2010
29 47Wednesday, October 13, 2010
29 47Wednesday, October 13, 2010
+5V+4.75VAVDD
C430
C430 10U/6.3V_8
10U/6.3V_8
of
of
of
2A
2A
2A
1
2
3
4
5
6
7
8
52
AGND SHIELD AGND SHIELD
A A
SENSE_PHONE
B B
SENSE_MIC
+5V
R312
R312
SENSE_A
20K/F_4
3
Q19
Q19
2N7002K
2N7002K
1
AGND
R285 39.2K/F_4R285 39.2K/F_4
3
Q16
Q16
2N7002K
2N7002K
1
AGND
20K/F_4
5/6: modify
SENSE_A
5/6: modify
R322
R322 47K_4
47K_4
2
+5V
R284
R284 47K_4
47K_4
2
AGND SHIELD
SENSE_A [29]
HPOUT_L[29] HPOUT_R[29]
MIC_L[29] MIC_R[29]
HPOUT_L HPOUT_R
R663 30.1/F_4R663 30.1/F_4 R653 30.1/F_4R653 30.1/F_4
PV IDT Request
VREFOUT_A[29]
MIC_L MIC_R
HPOUT_L1 HPOUT_R1
VREFOUT_A
C787 2.2U/6.3V_6C787 2.2U/6.3V_6 C782 2.2U/6.3V_6C782 2.2U/6.3V_6
C417
C417 150P/50V_4
150P/50V_4
R643
R643
4.7K_4
4.7K_4
L23 SBK160808T-301Y-N/0.2A_6L23 SBK160808T-301Y-N/0.2A_6 L22 SBK160808T-301Y-N/0.2A_6L22 SBK160808T-301Y-N/0.2A_6
C415
C415 150P/50V_4
150P/50V_4
AGND
R628
R628
C378
C378
4.7K_4
4.7K_4 1U/6.3V_4
1U/6.3V_4
AGND
L47 SBK160808T-301Y-N/0.2A_6L47 SBK160808T-301Y-N/0.2A_6 L46 SBK160808T-301Y-N/0.2A_6L46 SBK160808T-301Y-N/0.2A_6
AGND
MIC_L1
AGND
C386 100P/50V_4C386 100P/50V_4
C382 100P/50V_4C382 100P/50V_4
C811
C811
0.1U/10V_4
0.1U/10V_4
SENSE_MIC
HPOUT_L2 HPOUT_R2
C809
C809
0.1U/10V_4
0.1U/10V_4
MIC_IN_L MIC_IN_RMIC_R1
AGND
AGND
SI-2 Change
1 2 6 3 4 5
SENSE_PHONE
CN28
CN28
1 2 6 3 4 5
MIC-JACK-PINK
MIC-JACK-PINK
Normal Close
Line out
CN30
CN30
7
8
HP-JACK-GREEN
HP-JACK-GREEN
Normal Close
MIC
7
8
SGT-LIS302DLTR interrupt pin default is low / active Hi , BIOS need to
C C
Accelerometer Sensor
+3V
C656
C625
C625
*10U/6.3V_8
*10U/6.3V_8
INTH# INTH#
C226
C226 *22P/50V_4
*22P/50V_4
D D
C656
0.1U/10V_4
0.1U/10V_4
INTH#[9]
G_INT2#[35]
MBDATA2[9,14,35] MBCLK2[9,14,35]
+3V
programming 22h to change status from active Hi to low
U34
U34 *HP302DLTR8
*HP302DLTR8
1
Vdd_IO
6
C663
C663
0.1U/10V_4
0.1U/10V_4
R495 *10K_4R495 *10K_4
3
11
8 9
12 13 14
7
VDD Reserved
Reserved
INT1 INT2
SDO SDA/SDI/SDO SCL/SPC CS
GND GND GND GND
6/23: SI Add
U50
+3V
G_INT2#
MBDATA2 MBCLK2
+3V
R756 *0_4/SR756 *0_4/S
R757 *0_4/SR757 *0_4/S
2 4 5 10
1
14
11
9 7
6 4
8
U50 HP3DCTR
HP3DCTR
Vdd_IO VDD
INT1 INT2
SDO SDA SCL
CS
RESERVED RESERVED RESERVED RESERVED
GND GND
2
NC
3
NC
10 13 15 16
5 12
38hexPin 12: Low
Pin 12: unconnected/floating
1
2
3
4
3Ahex
5
6
7
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Audio Jack/Accelerometer
Audio Jack/Accelerometer
Audio Jack/Accelerometer
30 47Wednesday, October 13, 2010
30 47Wednesday, October 13, 2010
30 47Wednesday, October 13, 2010
8
of
of
of
1A
1A
1A
VREF_2R
1
R721 10K/F_4R721 10K/F_4
2
SI Change
+4.75VAVDD
3
4
5
6
7
8
EQ FOR SUBWOOFER
OUT_BY
R717 *0_6R717 *0_6
for subwoofer work 4/23.
+4.75VAVDD
SI Change
53
R718
C868
1 2
C868
0.1U/10V_4
0.1U/10V_4
HPOUTL_EQ
1U/10V_6
1U/10V_6
C857
C857
10U/6.3VS_6
10U/6.3VS_6
A A
C847
BASS_OUT[29]
C847
R718 10K/F_4
10K/F_4
AGND
R706 10K/F_6R706 10K/F_6
C842 5600P/50V_6C842 5600P/50V_6
R702 10K/F_6R702 10K/F_6
VREF_2R
C843
C843
100P/50V_4
100P/50V_4
12
+
+
13
-
-
TLV2464CPWRG4
TLV2464CPWRG4
U46D
U46D
14
OUT_SHPOUT
1 2
C839 1U/10V_6C839 1U/10V_6
R697 60.4K/F_6R697 60.4K/F_6
R719 60.4K/F_6R719 60.4K/F_6
1NS
C838 0.027U/25V_6C838 0.027U/25V_6
R701 10K/F_6R701 10K/F_6
2NS
C865 0.027U/25V_6C865 0.027U/25V_6
R712 10K/F_6R712 10K/F_6
VREF_2R
VREF_2R
C835 0.027U/25V_6C835 0.027U/25V_6
C841
C841
100P/50V_4
100P/50V_4
C856 0.027U/25V_6C856 0.027U/25V_6
C854
C854
100P/50V_4
100P/50V_4
Change 4EQ to 2EQ
1IN-_1S
AGND
2IN-_1S
AGND
1OUT_1S
411
3
+
+
1
2
-
-
U46A
U46A
TLV2464CPWRG4
TLV2464CPWRG4
R694 60.4K/F_6R694 60.4K/F_6
AGND
2OUT_1S
10
+
+
8
9
-
-
U46C
U46C
TLV2464CPWRG4
TLV2464CPWRG4
R713 60.4K/F_6R713 60.4K/F_6
R710 10K/F_6R710 10K/F_6
R716 10K/F_6R716 10K/F_6
VREF_2R
C845
C845
100P/50V_4
100P/50V_4
1 2
C862 1U/10V_6C862 1U/10V_6
5
EQ_S1
6
C869 5600P/50V_6C869 5600P/50V_6
R731 10K/F_6R731 10K/F_6
+
+
7
-
-
U46B
U46B
TLV2464CPWRG4
TLV2464CPWRG4
SUB_OUTEQ_S
PV Change for HP request
B B
PVCC2
Sub-Woofer power
R727 *100K_6R727 *100K_6
PVCC2+VIN
R726 *0_8/S
R726 *0_8/S
short0805
short0805
+3V
PV change to short pad
PVCC2
SUB_GND
R740 10_6R740 10_6 C886 1U/25V_6C886 1U/25V_6
R739 27.4K/F_6R739 27.4K/F_6 C879 1U/25V_6C879 1U/25V_6
4/20 DB add.
R732 *0_8R732 *0_8 R745 *0_8R745 *0_8
R728 *0_8/SR728 *0_8/S
AGND
1
SUB_GND
SUB_OUT
SUB_GND
SUB_GND
C884 1U/25V_6C884 1U/25V_6
R737 47.5K/F_6R737 47.5K/F_6
AGND
2
C C
SUB_GND
D D
PV remove BOM
R743 *100K_4R743 *100K_4
+3V
ADC_EAPD#[29]
SUB_GND
GAIN1 dBGAIN0
0
1
R744 100K_4R744 100K_4
R742 *0_6/SR742 *0_6/S R741 *0_6/SR741 *0_6/S
C877 1U/25V_6C877 1U/25V_6 C876 1U/25V_6C876 1U/25V_6
PVCC2
00
1
0
11
12
18
23.6
36
3
R722 *100K_6R722 *100K_6
ADC_EAPD#
R736 10K_6R736 10K_6
1
SD
2
FAULT
3
NC_3
4
NC_4
5
GAIN0
6
GAIN1
7
AVCC
8
AGND
9
GVDD
10
PLIMIT
11
INN
12
INP
13
NC_13
14
AVCC
HPA00836
HPA00836
U48
U48
29
SUB_GND
4
OUTN_25
OUTN_23
OUTP_20
OUTP_18
GND
PVCCL PVCCL
BSN_26
PGND
BSN_22 BSP_21
PGND
BSP_17
PVCC PVCC
28 27 26 25 24 23 22 21 20 19 18 17 16 15
5/3 Change C951 to 100uf
PVCC2
C883
C883
100U/25V L-F
100U/25V L-F
C888 0.22U/50V_8C888 0.22U/50V_8
SUB_GND
C885 0.22U/50V_8C885 0.22U/50V_8 C880 0.22U/50V_8C880 0.22U/50V_8
SUB_GND
C878 0.22U/50V_8C878 0.22U/50V_8
5/3 del C964
12
C890
0.1U/50V_6
C890
0.1U/50V_6
+
+
C889
1000P/50V_6
C889
1000P/50V_6
SUB_GND
5/14 modify
L61 PBY160808T-151Y-NL61 PBY160808T-151Y-N
L60 PBY160808T-151Y-NL60 PBY160808T-151Y-N
PVCC2
C874
0.1U/50V_6
C874
0.1U/50V_6
5
C875
1000P/50V_6
C875
1000P/50V_6
SUB_GND
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,32,33,34,35,36,37,39,40,41,43,45,46,47] +4.75VAVDD [29] +VIN [25,38,39,41,42,43,44,45]
5/14 modify
6
R1 *0_4/SR1 *0_4/S
L62 *0_8/SL62 *0_8/S
1 2
R738 *0_6/SR738 *0_6/S
R172 *0_4/SR172 *0_4/S
EMI Request
1000P/50V_4
1000P/50V_4
SUB_GND
7
CN1
CN1
SUB_OUT+ SUB_OUT-
C4
C4
1000P/50V_4
1000P/50V_4
2 1
88266-020L
88266-020L
C2
C2
88266-020L-2p-r
SUB_GND
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
SUBWOOFER (EQ & AMP .)
SUBWOOFER (EQ & AMP .)
SUBWOOFER (EQ & AMP .)
31 47Wednesday, October 13, 2010
31 47Wednesday, October 13, 2010
31 47Wednesday, October 13, 2010
8
1A
1A
1A
of
of
of
5
BLUETOOTH
CN14
CN14 BLUE TOOTH CONN
BLUE TOOTH CONN
87213-0600-6P-L
87213-0600-6P-L
BTCON_P1
6
BLUELED
5
USBP6-_L
4
USBP6+_L
3
D D
C C
2
+3VPCU_BT
1
BT_OFF#[10,36]
2
C480
C480 1000P/50V_4
1000P/50V_4
8/16 PV add.
10/13 PV2 EMI request
R331
R331
4.7K_4
4.7K_4
Q21
Q21 PDTC144EU
PDTC144EU
1 3
BLUELED [35,36]
C444
C444 1U/6.3V_4
1U/6.3V_4
PV new Add
2
T3T3
+3VSUS+3VPCU
1
3
R783 0RR783 0R
L65
L65
1 4 3
*WCM2012-90
*WCM2012-90 R784 0RR784 0R
Q20
Q20 ME2303T1
ME2303T1
24mil
+3VPCU_BT
C447
C447 *10U/6.3V_8
*10U/6.3V_8
2
C446
C446
0.1U/10V_4
0.1U/10V_4
USBP6- [9] USBP6+ [9]
4
RIGHT SIDE USBX2 for 17"
C180 0.1U/10V_4C180 0.1U/10V_4
PV EMI request
L19 *WCM2012-90L19 *WCM2012-90
1 4 3
L18 *WCM2012-90L18 *WCM2012-90
1 4 3
2
4
+3V
1
3
USBP9+_R USBP9-_R
470P/50V_4
470P/50V_4
FOR 15" ONLY
+5VPCU
USBP8+[9]
USBP8-[9]
USBP9+[9]
USBP9-[9]
CN11
CN11
2 1
*88266-020L
*88266-020L
RP11
RP11
*0_4P2R_4
*0_4P2R_4
Close to CN10015
2
2
USB_ENABLE# SATA_LED# ACCLED_EN PWR_LED#
C58
C58
3
USBP8+ USBP8-
USBP9+ USBP9-
C154
C154 470P/50V_4
470P/50V_4
+5VPCU
1 2 3 4 5 6 7 8 9 10 11 12 13 14
CN6
CN6 DUAL USB CONN
DUAL USB CONN
PV Add for USBPV Add for USB
2
RIGHT SIDE USB for 15"
Close to CN9063
C445 *0.1U/10V_4C445 *0.1U/10V_4
PV EMI request
+5VPCU
USBP11+[9] USBP11-[9]
L25 *WCM2012-90L25 *WCM2012-90
6/28 : SI modify.
CN15
CN15
2 1
*88266-020L
*88266-020L
4 3 1
USB_ENABLE#
USBP11+_1 USBP11-_1
2
CN12
CN12 *USB CONN
*USB CONN
1
54
+5VPCU
1 2 3 4 5 6
10/01 MV Modify.
USBP9-_R
PV EMI request
4 3 1
L3 *WCM2012-90L3 *WCM2012-90
SATA_LED#[8]
ACCLED_EN[10]
PWR_LED#[35,36]
+3V
Close to CN10014
C17 *0.1U/10V_4C17 *0.1U/10V_4
USBP9+_EUSBP9+_R USBP9-_E
2
USB_ENABLE#
PWR_LED#
C474
C474 *0.1U/10V_4
*0.1U/10V_4
+5VPCU
1 2 3 4 5 6 7 8 9 10 11 12
CN2
CN2 *DUAL USB CONN
*DUAL USB CONN
USB fingerprint CON
U13
U13
2
1. USBP2-
3
2. USBP2+ 3 +3V
4. +5V
5. SYSTEM GND
6. SYSTEM GND
B B
USBP2-[9]
USBP2+[9] +3V +5V
C687
C687
0.1U/10V_4
0.1U/10V_4
4
Vin
IO1
1
Gnd
IO2
*PJSR05
*PJSR05
FINGER PRINTER CONN
FINGER PRINTER CONN
1 2 3 4 5 6
CN8
CN8
+3V
LEFT USB PORT
10/13 PV2 EMI Stuff.
4/20 DB add.
C762
R584 *0RR584 *0R
L44
L44
5
1 4 3
WCM2012-90
WCM2012-90
R587 *0RR587 *0R
USBP0-[9]
A A
USBP0+[9]
2
+5VSUS_USBP0 USBP0-_U USBP0+_U
1A
C762
0.1U/10V_4
0.1U/10V_4 CN27
CN27
1
1
2
2
3
3 44GND
USB CONN
USB CONN
GND GND GND
8 7 6 5
4
E-SATA
+5VPCU
2 3
USB_ENABLE#[35]
C726
C726 1U/6.3V_4
1U/6.3V_4
4 1
G547F2P81U
G547F2P81U
Touch screen for 15"
USBP3+[9] USBP3-[9]
3
U14
U14
VIN1 VIN2 EN GND
OUT3 OUT2 OUT1
OC
80 mils (Iout=2A)
8 7 6 5
C700
C700 470P/50V_4
470P/50V_4
USBP3+ USBP3-
+5VSUS_USBP0
C701
C701
0.1U/10V_4
0.1U/10V_4
L6
L6
4 3 1
*WCM2012-90
*WCM2012-90
2
*PJSD05TS
*PJSD05TS
5/14 modify.
+
+
C697
C697 100U/16V
100U/16V
D2
D2
12
D3
D3
12
*PJSD05TS
*PJSD05TS
DGT_STOP#[8] DGT_RESET[10]
+5V
Change the power from +3V to +5V.
2
USBP3+ USBP3-
10/13 PV2 EMI Stuff.
4/20 DB add.
USBP1-[9]
USBP1+[9]
DGT_STOP# DGT_RESET
FWE
GND
R542 *0RR542 *0R
L42
L42
1 4 3
WCM2012-90
WCM2012-90
R543 *0RR543 *0R
SATA_RXN5[8] SATA_RXP5[8]
+5VSUS_USBP0 USBP1-_E
2
USBP1+_E
SATA_TXP5[8]
SATA_TXN5[8]
4/29 modify.
CONN DIP ESATA+USB 11P 2R FR(H7.7)
CONN DIP ESATA+USB 11P 2R FR(H7.7)
CN4
CN4
1 2 3 4 5 6 7 8 9 10
*TS-FFC-connect
*TS-FFC-connect
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
BT/WC/FT/Touchscreen
BT/WC/FT/Touchscreen
BT/WC/FT/Touchscreen
1
USB & ESATA
CN26
CN26
1
USB Vcc
2
D-
3
D+
4
GND
5 6 7 8
9 10 11
USB_ESATA_COMBO
USB_ESATA_COMBO
usb-1-2006102-3-11p-v
usb-1-2006102-3-11p-v
DFHS11FR047
DFHS11FR047
GND A+ A­GND B­B+ GND
Shield Shield Shield Shield
32 47Wednesday, October 13, 2010
32 47Wednesday, October 13, 2010
32 47Wednesday, October 13, 2010
14 15 12 13
of
of
of
1A
1A
1A
5
4
3
2
1
C343
C343
0.1U/10V_4
0.1U/10V_4
LAN_MCTG
+3V_LAN
C339
C339
0.1U/10V_4
0.1U/10V_4
C718
C718 10P/3KV_1808
10P/3KV_1808
+3V_LAN
PCIE_CLKREQ_LAN#[9]
PCIE_TXP2_LAN[9] PCIE_TXN2_LAN[9]
CLK_PCIE_LANP[9] CLK_PCIE_LANN[9]
GND VIA x 9 Pcs
+1.05V_LAN
MDI0+ MDI0-
MDI1+ MDI1-
MDI2+ MDI2-
MDI3+ MDI3-
R197 10K/F_4R197 10K/F_4
PCIE_CLKREQ_LAN#
R196 2.49K/F_4R196 2.49K/F_4
+3V_LAN
U17
U17
10 11 12
+1.05V_LAN
LANRSET
1
MDIP0
2
MDIN0
3
AVDD1(NC)
4
MDIP1
5
MDIN1
6
AVDD1(NC)
7
MDIP2(NC)
8
MDIN2(NC)
9
AVDD1(NC) MDIP3(NC) MDIN3(NC) AVDD3(NC)
LAN_SMBDAT
R561 *0_4/SR561 *0_4/S
PCIE_TXP2_LAN
PCIE_TXN2_LAN
CLK_PCIE_LANP
CLK_PCIE_LANN
+3V_LAN
XTAL2
XTAL1
42
45
41
47
44
43
46
48
49
GND
RSET
AVDD1
AVDD33
CKXTAL2
CKXTAL1
VDD1(NC)
AVDD33(NC)
AVDD3(AVDD1)
RTL8111E-VB-GR
RTL8111E-VB-GR
DVDD113SMBCLK(NC)14SMBDATA(NC)15CLKREQB16HSIP17HSIN18REFCLK_P19REFCLK_M20EVDD121HSOP22HSON23GNDTX
LAN_CLKRQ
+1.05V_LAN+1.05V_LAN
LAN_GPIOS
40
38
37
39
LED0
VDD3
GPO/SMBALERT
24
PCIE_RXN2_LAN_L PCIE_RXP2_LAN_L
LAN_TX#
LAN_GLINK100#
LED1/EESK
SROUT1
VDDSR VDDSR
ENSR
EEDI/SDA LED3/EDO EECS/SCL
DVDD1
LANWAKEB
VDD3
ISOLATEB
PERSTP
+1.05V_LAN
R211 1K/F_4R211 1K/F_4
+1.05V_LAN_O
36 35 34 33
LAN_GLINK10#
32 31
LAN_ECS_SCL
30 29
PCIE_WAKE#
28 27
ISOLATEB
26
PLTRST#
25
C358 0.1U/10V_4C358 0.1U/10V_4 C355 0.1U/10V_4C355 0.1U/10V_4
+3V_LAN
R235 10K/F_4R235 10K/F_4 R585 10K/F_4R585 10K/F_4
+3V_LAN
+1.05V_LAN +3V_LAN
+3V_LAN
PCIE_WAKE# [7,36]
PLTRST# [3,9,35,36,37]
PCIE_RXN2_LAN [9] PCIE_RXP2_LAN [9]
+3V_LAN
C776
C776 22U/6.3VS_8
22U/6.3VS_8
Close to Pin 35/34
+3V
R605
R605 1K_4
1K_4
ISOLATEB
R593
R593
15K/F_4
15K/F_4
1 2
if ISOLATEB pin pull-low,the LAN chip will not drive it's PCI-E outputs ( excluding PCIE_WAKE# pin )
R586 *100_4R586 *100_4
2 1
*RB501V-40
*RB501V-40
D15
D15
C364
C364
0.1U/10V_4
0.1U/10V_4
55
LAN_DISABLE# [10]
For EMI 0 ~ 22 ohm
+3VLANVCC
C361
R203
Y1
25MHzY125MHz
C359
C359 33P/50V_4
33P/50V_4
R203 10_4
10_4
XTAL2
21
C354
C354 33P/50V_4
33P/50V_4
LAN_XTAL1 XTAL1
D D
C341
C341
0.1U/10V_4
0.1U/10V_4
C361
0.1U/10V_4
0.1U/10V_4
9/29: Modify footprint
AL08111DB00
C746 *0_4/SC746 *0_4/S
C747 *0_4/SC747 *0_4/S
C C
C742 *0_4/SC742 *0_4/S
C745 *0_4/SC745 *0_4/S
C744
C744
0.01U/25V_4
0.01U/25V_4
V_DAC0 MDI0+ MDI0-
V_DAC1 MDI1+ MDI1-
V_DAC2 MDI2+ MDI2-
V_DAC3 LAN _MCT3 MDI3+ MDI3-
RTL8111DL-GR
U38
U38
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+ TD4-12MX4-
NS892405
NS892405
MCT1 MX1+
MX1­MCT2 MX2+
MX2­MCT3 MX3+
MX3­MCT4 MX4+
24 23 22 21 20 19 18 17 16 15 14 13
LAN_MCT0 LAN_MX0+ LAN_MX0­LAN_MCT1 LAN_MX1+ LAN_MX1­LAN_MCT2 LAN_MX2+ LAN_MX2-
LAN_MX3+ LAN_MX3-
4/29 modify
4/23 modify4/23 modify
C290 *0_4/SC290 *0_4/S
C287 *0_4/SC287 *0_4/S
C288 *0_4/SC288 *0_4/S
C289 *0_4/SC289 *0_4/S
R176 75_4R176 75_4
R177 75_4R177 75_4
R178 75_4R178 75_4
R179 75_4R179 75_4
10/13 PV2 EMI Request
B B
Trace<30 mil Width > 60 mil
A A
IND SMD 4.7UH +-20% 680MA(CBC2518T4R7M) CV-4707MZ00
>60mil
+1.05V_LAN_O
L43 CBC2518T4R7ML43 CBC2518T4R7M
C759
C759
0.1U/10V_4
0.1U/10V_4
4.7U/6.3V_6
4.7U/6.3V_6
Power trace Layout 󱬵󱬵󱬵󱬵󱷯󱷯󱷯󱷯> 60mil
>60mil
C754
C754
0.1U/10V_4
C756
C756
0.1U/10V_4
C342
C342
0.1U/10V_4
0.1U/10V_4
C369
C369
0.1U/10V_4
0.1U/10V_4
+1.05V_LAN
C755
C755
0.1U/10V_4
0.1U/10V_4
C367
C367
0.1U/10V_4
0.1U/10V_4
+1.05V_LAN
C748
C748
0.1U/10V_4
0.1U/10V_4
4/23 modify
LAN_TX# LAN_YLED#
C771
C771
C347
C347
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
LAN_GLED#LAN_GLINK100#
C370
C370 *1000P/50V_4
*1000P/50V_4
C356
C356 *1000P/50V_4
*1000P/50V_4
Link
+3V_LAN
+3V_LAN
R438 330_4R438 330_4
R395 330_4R395 330_4
C550 1000P/50V_4C550 1000P/50V_4
LAN_YLED LAN_YLED#
LAN_MX3+ LAN_MX3­LAN_MX2­LAN_MX1­LAN_MX1+ LAN_MX2+ LAN_MX0+ LAN_MX0-
FOR EMI
LAN_GLED LAN_GLED#
C507 1000P/50V_4C507 1000P/50V_4
RJ45
CN22
CN22
12
LED_GRE_P
11
LED_GRE_N
8
RX1-
7
RX1+
6
RX0-
5
TX1-
4
TX1+
3
RX0+
2
TX0-
1
TX0+
10
LED_YEL_P
9
LED_YEL_N
RJ45_CONN
RJ45_CONN
4/23 modify
GND1
GND
14 13
Close to Pin 21
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
RTL 8111EL/RJ45
RTL 8111EL/RJ45
RTL 8111EL/RJ45
1
33 47Wednesday, October 13, 2010
33 47Wednesday, October 13, 2010
33 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
A
B
C
D
E
SATA HDD CONNECTOR
DFHD20MR005
DC Current rating: 0.5 A
D D
21
22
CN31 SATA HDD(1ST)
CN31 SATA HDD(1ST)
23
24
+5V: 2 A(4 Pin)
20
20
+3V: 2 A(4 Pin)
Gnd : (5 Pin)
SATA_TXP0 [8] SATA_TXN0 [8]
SATA_RXN0 [8]
SATA_RXP0 [8]
+3V_HDD
+5V
1
1
123456789
Main HDD
1011121314151617181920
5/6: modify
C C
+3V +3V_HDD
R329 *0_8R329 *0_8
+5V
C452
C452 10U/6.3V_8
10U/6.3V_8
120 mils
C453
C453
10U/6.3V_8
10U/6.3V_8
C451
C451
4.7U/6.3V_6
4.7U/6.3V_6 C450
C450
0.1U/10V_4
0.1U/10V_4
SATA CD-ROM
ODD_PRSNT#[10]
+5V +5V_ODD
R485 0_8R485 0_8
6/4 DB2 Modify
10/13 PV2 Modify
+5V_ODD
SATA_TXP4[8]
SATA_TXN4[8]
SATA_RXN4[8] SATA_RXP4[8]
5/6: modify
C592
C592
C600
0.1U/10V_4
0.1U/10V_4
1 2
+5V_ODD
C600
ODD_EJECT#
10U/6.3VS_6
10U/6.3VS_6
R481 1K_4R481 1K_4
C616
C616
0.1U/10V_4
0.1U/10V_4
120 mils
C593
C593
0.1U/10V_4
0.1U/10V_4
10 11 12 13 14 15 16 17 18 19
56
C613
C613
0.1U/10V_4
0.1U/10V_4
CN23
CN23
1
1
1
2 3 4 5 6 7 8 9
19
19
SATA ODD
SATA ODD
SI chenage footprint
SATA_2 CONNECTOR
+5V
120 mils
C654
C654
10U/6.3V_8
10U/6.3V_8
B B
A A
C651
C651
4.7U/6.3V_6
4.7U/6.3V_6
5/6: EMI request reserve
C652
C652
0.1U/10V_4
0.1U/10V_4
C680
C680
0.1U/10V_4
0.1U/10V_4
PV EMI request
C647
C647
C388
*0.1U/10V_4
*0.1U/10V_4
C388
*0.1U/10V_4
*0.1U/10V_4
A
10U/6.3V_8
10U/6.3V_8
+3V
C673
C673
*10U/6.3V_8
*10U/6.3V_8
C653
C653
C6
C6
*0.1U/10V_4
*0.1U/10V_4
SI chenage footprint
+3VPCU +5V+1.05V+3V
C459
C459 *0.1U/10V_4
*0.1U/10V_4
CN25
CN25
2nd SATA HDD(2ST)
2nd SATA HDD(2ST)
C376
C376
*0.1U/10V_4
*0.1U/10V_4
1
1
1
2 3 4 5 6 7 8 9 10 11 12 13
Main HDD
14 15 16 17 18 19
19
19
C381
C381
*0.1U/10V_4
*0.1U/10V_4
C397
C397
*0.1U/10V_4
*0.1U/10V_4
B
FOR 17.3"
SATA_TXP1 [8] SATA_TXN1 [8]
SATA_RXN1 [8]
SATA_RXP1 [8]
5/6: modify
+3V
+5V
C
8/11 PV Modify
6/4 DB2 Modify
+3V
PV modify
R496
R496 *10K_4
*10K_4
ODD_EJECT#
R40*0_4 R40*0_4
EJECT# [35]
5/7: Modify
10/13 PV2 Modify
High : ODD power down Low : ODD power on
ODD_PD[35]
+3VPCU [7,8,25,32,35,36,37,38,39,40,42,44,45,47] +1.05V [7,8,9,11,35,41] +3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,35,36,37,39,40,41,43,45,46,47] +5V [7,8,11,19,25,26,27,29,30,32,36,37,45] +12VALW [25,37,42,44,45]
R4590_4 R4590_4
D
R138
R138 330K_6
330K_6
Q31
Q31 2N7002
2N7002
+12VALW
2
10/13 PV2 Modify
AO3404 ID current
5.8A
Q35
Q35
1 2
*AO3404
*AO3404
3
C211
C211
0.027U/25V_6
0.027U/25V_6
2 1
1
+5V
C629
C629
0.1U/10V_4
0.1U/10V_4
3
+5V_ODD
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
12
R493
1
R493 *22_8
*22_8
6/4 DB2 Modify
3
2
Q32
Q32 2N7002
2N7002
1
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
ODD/HDD/ANT
ODD/HDD/ANT
ODD/HDD/ANT
E
34 47Wednesday, October 13, 2010
34 47Wednesday, October 13, 2010
34 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
U7
3 4
10
8 7
5 12 13 38
20
1
2 37
55 56 57 58 59 60 61 62
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
83 84 85 86 87 88
119 120 128
89 76
109 110 112 114 115 116 117 118
97 98 99
100 101 102 103 104 105 106 107 108
124
KB3930QF A1
KB3930QF A1
U7
SERIRQ LFRAME LAD0 LAD1 LAD2 LAD3 PCICLK PCIRST/GPIO5 CLKRUN
SCI/GPIOE GA20/GPIO0 KBRST/GPIO1 ECRST
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37
KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D PSCLK3/GPIO4E PSDAT3/GPIO4F
RD WR SELMEM/SPICS SELIO/GPIO50 SELIO2/GPIO43 D0/GPXD0 D1/GPXD1 D2/GPXD2 D3/GPXD3 D4/GPXD4 D5/GPXD5 D6/GPXD6 D7/GPXD7
A0/GPXA0 A1/GPXA1 A2/GPXA2 A3/GPXA3 A4/GPXA4 A5/GPXA5 A6/GPXA6 A7/GPXA7 A8/GPXA8 A9/GPXA9 A10/GPXA10 A11/GPXA11
V18R
AD0/GPI38
AD1/GPI39 AD2/GPI3A AD3/GPI3B
DA0/GPO3C DA1/GPO3D DA2/GPO3E
DA3/GPO3F
PWM1/GPIOE
PWM2/GPIO10
FANPWM1/GPIO12 FANPWM2/GPIO13
FANFB1/GPIO14 FANFB2/GPIO15
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
CIR_RX/GPIO40
CLKRUN# SCI1#
EC_A20GATE EC_RCIN# 3920_RST#
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17
GPUT_CLK GPUT_DATA GFX_HWPG ACIN TPCLK TPDATA
BIOS_RD# BIOS_WR# BIOS_CS#
CPU_ICC DGPU_PR_EN_E EC_GPXD1
KEYLED_CN BLUELED
R412*0_4 R412*0_4
USB_ENABLE# SUSON MAINON LAN_POWER S5_ON
R456*0_4/S R456*0_4/S
APD_120W
C525
C525
SERIRQ LFRAME#_R LAD0_R LAD1_R LAD2_R LAD3_R
SERIRQ[8]
LFRAME#[8,36]
LAD0[8,36] LAD1[8,36] LAD2[8,36] LAD3[8,36]
D D
C C
For GPU thermal
5/7 modify from EC request
4/29 modify from EC request
SUS_PWR_ACK[7]
KEYLED_CN[37]
RF_LINK#[36] HDMI_HPD[27]
EC_PECI[3]
USB_ENABLE#[32]
SUSON[43,45]
MAINON[38,39,41,43,44,45]
LAN_POWER[45]
S5_ON[45]
B B
BLED_COMBO[36]
AC_PRESENT[7]
MBATLED0#[44]
AC_LED_ON#[44]
WIRELESS_ON#[37]
WIRELESS_OFF#[37]
5/7 modify from EC request
CLK_33M_KBC[9]
CLKRUN#[7]
EC_A20GATE[10] EC_RCIN#[10]
GPUT_CLK[18] GPUT_DATA[18]
GFX_HWPG[40]
PCI_SERR#[10]
C512
C512
0.1U/10V_4
0.1U/10V_4
R46 *0_4/SR46 *0_4/S R44 *0_4/SR44 *0_4/S R43 *0_4/SR43 *0_4/S R42 *0_4/SR42 *0_4/S R45 *0_4/SR45 *0_4/S
PLTRST#[3,9,33,36,37]
MX0[37] MX1[37] MX2[37] MX3[37] MX4[37] MX5[37] MX6[37] MX7[37]
MY0[37] MY1[37] MY2[37] MY3[37] MY4[37] MY5[37] MY6[37] MY7[37] MY8[37] MY9[37] MY10[37] MY11[37] MY12[37] MY13[37] MY14[37] MY15[37] MY16[37] MY17[37]
ACIN[44,45]
CPU_ICC[46]
R376*0_4/SR376*0_4/S
4.7U/6.3V_6
4.7U/6.3V_6
1 2
FOR SG/DIS
DGPU_PWROK[9,10,42,43,47] DGPU_PR_EN[42,43,47]
A A
R443 0_4R443 0_4 R450 0_4R450 0_4
FOR UMA ONLY
EC_GPXD1 DGPU_PR_EN_E
R454
R454 *100K_4
*100K_4
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 AVCC
GPIO4 GPIO7
GPIO8 GPIOA
GPIOB GPIOC
GPIOD GPIO11 GPIO16 GPIO17 GPIO18
GPIO19 GPIO1A
GPIO41 GPIO42 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59
XCLKO
XCLKI
GND1 GND2 GND3 GND4 GND5 AGND
4
9 22 33 96 111 125 67
TEMP_MBAT
63
AD_TYPE
64
AD_AIR
65
SYS_I
66 68
70
VFAN
71
D/C#
72
PWM_VADJ
21
KB_LED_EN
23
G_INT2#
26
LID_CONTROL
27
FAN1SIG
28 29
MBCLK
77
MBDATA
78
MBCLK2
79
MBDATA2
80
SUSB#
6
HWPG
14
CPU_PROCHOT
15
SUSC#
16
DGPU_PWR_EN_1
17
GPIO33_E1
18
NBSWON1#
19 25 30 31
KBSMI#1
32
VRON
34
R50 1K_4R50 1K_4
36
R101 *0_4R101 *0_4
73 74 75
DNBSWON#1
90
CAPSLED#
91
PWR_LED#
92
EC_PWROK
93
RSMRST#
95
VOLMUTE#
121
BIOS_SPI_CLK
126
LID_EC#
127
CRY2
123
CRY1
122
11 24 35 94 113 69
+3VPCU
+3VPCU
C570 0.1U/10V_4C570 0.1U/10V_4 C544 0.1U/10V_4C544 0.1U/10V_4 C529 0.1U/10V_4C529 0.1U/10V_4 C524 0.1U/10V_4C524 0.1U/10V_4 C508 0.1U/10V_4C508 0.1U/10V_4 C505 0.1U/10V_4C505 0.1U/10V_4 C506 *10U/6.3V_8C506 *10U/6.3V_8
C567 0.1U/10V_4C567 0.1U/10V_4
C55 20P/50V_4C55 20P/50V_4
4
1
C62 *27P/50V_4C62 *27P/50V_4
CRY2
1 2
BIOS_CS# BIOS_SPI_CLK_I BIOS_WR# BIOS_RD#
R53 10K_4R53 10K_4
+3VPCU_EC
C548
C548
4.7U/6.3V_6
TEMP_MBAT [44] AD_AIR [44]
SYS_I [44]
T1T1
GPU_PROCHOT [17] VFAN [36] D/C# [44]
PWM_VADJ [24] KB_LED_EN [37]
G_INT2# [30] LID_CONTROL [25] FAN1SIG [36] ODD_PD [34]
MBCLK [44] MBDATA [44] MBCLK2 [9,14,30] MBDATA2 [9,14,30]
SUSB# [7] HWPG [38,39,41,42,43]
SUSC# [7]
NBSWON1# [36] SLP_S5 [7] EC_DEBUG1 [36] EJECT# [34]
VRON [40]
4/23, add strap, for indentify LX M/B
For Battery charge/char ge and c ap boar d
For PCH SMB/DDR Thermal IC/G-sensor
8/12 PV modify
9/26 MV Stuff
9/29 MV modify
GFX_VR_VCC [46] CPU_VCC [46] CAPSLED# [37]
PWR_LED# [32,36]
EC_PWROK [7,25] RSMRST# [7] VOLMUTE# [29]
LID_EC# [25,36]
Y2
Y2 *32.768KHZ
*32.768KHZ
2 3
R55 *0_4/SR55 *0_4/S
R414
R414 100K_4
100K_4
SPI_3P
R47 33_4R47 33_4
7/2 add U26 colay
C42 0.1U/10V_4C42 0.1U/10V_4
U25
U25
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
W25X40BVSSIG
W25X40BVSSIG
4.7U/6.3V_6
5/7 modify from EC request
D20RB500V-40 D20RB500V-40
GPIO33_E [8]
4/19 modify from EC request
R116 0_4R116 0_4 R103 *0_4R103 *0_4
If use PCH SUSCLK should change to 20P.
PCH_SUSCLK [7]
8
SPI_7P
7
R49 10K_4R49 10K_4
4
3
+3VPCU+3VPCU_EC
L34
L34 PBY160808T-470Y-N/3A_6
PBY160808T-470Y-N/3A_6
5
VOUT
4
NR/FB
C554
C554
*TPS73133
*TPS73133
*1U/6.3V_4
*1U/6.3V_4
3
Q28
Q28
2
*2N7002EPT_SC70
*2N7002EPT_SC70
1
EC_PECI [3] GFX_VR_ICC [46]
BIOS_SPI_CLK_I
C37
C37 22P/50V_4
22P/50V_4
4/19 modify from EC request
+3VPCU
U29
U29
1
VIN
3
SHDN
2
GND
VGA_ALERT [17,18]
+5VPCU
C559
C559
*1U/6.3V_4
*1U/6.3V_4
AC present: AC_IN-->high, CPU_PROCHOT-->low , H_PROCHOT#-->high
Remove AC: AC_IN-->low, CPU_PROCHOT-->low , H_PROCHOT#-->low
Remove AC and re-cove prochot: AC_IN-->low, CPU_PROCHOT--> high, H_PROCHOT#--> high
R157 *0_4R157 *0_4
For EMI
CLK_33M_KBC
+3VPCU
5/13: modify from EC request
+3V
FOR DIS ONLY
DGPU_PWR_EN_1
R431 100K_4R431 100K_4
R417 47K_4R417 47K_4
+3VPCU
5/23: modify for stuff SG
R432 10K_4R432 10K_4
+3VPCU
2
TOUCH PAD CONNECTOR & ON/OFF BOTTOM
+3VSUS
TPDATA
L41 PBY160808T-470Y-N/3A_6L41 PBY160808T-470Y-N/3A_6
TPCLK
L40 PBY160808T-470Y-N/3A_6L40 PBY160808T-470Y-N/3A_6
C693
C693 10P/50V_4
10P/50V_4
+3VSUS
+3VPCU
R143
R143 10K_4
10K_4
3
2
1
R390 *10_4R390 *10_4
R394 10K_4R394 10K_4 R479 4.7K_4R479 4.7K_4 R478 4.7K_4R478 4.7K_4
R472 4.7K_4R472 4.7K_4 R471 4.7K_4R471 4.7K_4 R658 *10K_4R658 *10K_4 R380 10K_4R380 10K_4
C511 *10P/50V_4C511 *10P/50V_4
9/26: MV Modify
R411 0_4R411 0_4
BLUELED
3920_RST#
APD_120W
adapter select for EC
PQ28
PQ28
*2N7002EPT_SC70
*2N7002EPT_SC70
NBSWON1# MBCLK MBDATA
MBCLK2 MBDATA2 GPIO33_E G_INT2#
DGPU_PWR_EN [10,42,43]
R440 *10K_4R440 *10K_4
CPU_PROCHOT_1
CPU_PROCHOTACIN
AD_TYPE
BLUELED [32,36]
C526 0.1U/10V_4C526 0.1U/10V_4
CN10
C696 0.1U/10V_4C696 0.1U/10V_4
TPDATA-1 TPCLK-1
C692
C692 10P/50V_4
10P/50V_4
R517 4.7K_4R517 4.7K_4
CN10 PWR BTN CONN
PWR BTN CONN
1 2 3 4 5 6
TPCLK
close conn
2
3
PQ27
PQ27
2N7002EPT_SC70
2N7002EPT_SC70
1
TPDATA
R160 *0_4/SR160 *0_4/S
3
PQ29
PQ29 2N7002EPT_SC70
2N7002EPT_SC70
1
R518 4.7K_4R518 4.7K_4
2
thermal shutdown circuit
3920_RST#
R48 4.7K_4R48 4.7K_4
2
Q8
Q8
13
MMBT3904-7-F
MMBT3904-7-F
9/26: MV stuff
+3VPCU
D11
D11 1SS355
1SS355
2 1
R93 10K_4R93 10K_4
C578
C578
0.1U/10V_4
0.1U/10V_4
5/7 modify from power support 230w
R7 100_4R7 100_4
R467
R467
12.1K/F_4
12.1K/F_4
1
57
H_PROCHOT# [3,40]
SI CHANGE POWER
C36 220P/50V_4C36 220P/50V_4
PV Remove BOM
adapter Type check
+1.05V
PV Change
PM_THRMTRIP# [3,10]
AD_ID [44]
C465
C465
100P/50V_4
100P/50V_4
Hi ==> 120W Low ==> 65W/90W
R440
SG/DIS UMA
NA10KR432 10K
NA
2
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
KB3926/ROM/TP
KB3926/ROM/TP
KB3926/ROM/TP
1
1A
1A
35 47Wednesday, October 13, 2010
35 47Wednesday, October 13, 2010
35 47Wednesday, October 13, 2010
1A
of
of
of
Change to RB500 as Current loss
SCI1# DNBSWON#1 KBSMI#1
D10 RB501V-40D10 RB501V-40 D12 RB500V-40D12 RB500V-40 D9 RB500V-40D9 RB500V-40
U26
SPI_3P
U26
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
*MX25L4005AM2C-12G
*MX25L4005AM2C-12G
BIOS_CS#
4
BIOS_SPI_CLK_I BIOS_WR# BIOS_RD#
21 21 21
5
SIO_EXT_SCI# [10]
DNBSWON# [7] SIO_EXT_SMI# [10]
512K byte SPI EC ROM
+3VPCU
8
SPI_7P
7 4
Socket:
DG008000031
MXIC AKE3KZP0001
INBOND AKE37ZN0N00
W
AMIT
AKE38ZN0800
3
PV Change BOM
A
Mini PCI-E Card 1 WLAN
FOR KBC DEBUG
D D
6/7 :DB2 modify
BT_OFF#[10,32]
+3V
+5V
EC debug pin
R749 0_4R749 0_4 R750 *4.7K_4R750 *4.7K_4
R344 *0_6R344 *0_6
6/7 :DB2 modify
PCIE_TXP1[9] PCIE_TXN1[9] PCIE_RXP1[9]
PCIE_RXN1[9]
+3V
BT_OFF#[10,32]
CLK_33M_DEBUG[9]
CLK_PCIE_WLANP[9]
CLK_PCIE_WLANN[9]
PCIE_CLKREQ_WLAN#[9]
BT_COMBO_EN#[9]
BT_DATA,BT_CHCLK,CLKREQ# internal pull-DOWN 100k ohm
C C
8/6 :PV modify
EC_DEBUG1[35]
R755 *4.7K_4R755 *4.7K_4 R751 *0_4R751 *0_4 R754 0_4R754 0_4
PLTRST#
MV Add
R705 *0_4R705 *0_4
MINICAR_PME#
PCIE_TXP1 PCIE_TXN1
PCIE_RXP1 PCIE_RXN1
CLK_PCIE_WLANP CLK_PCIE_WLANN
BT_COMBO_EN_M
51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17
15 13 11
CLK_33M_DEBUG
CN20
CN20
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved
GND REFCLK+ REFCLK-
9
GND
7
CLKREQ#
5
BT_CHCLK
3
BT_DATA
1
WAKE#
MINI PCIE H=9.0
MINI PCIE H=9.0
DFHD52MS029
DFHD52MS029
MIPCI-800055FB052GX00PL-52P-smt
MIPCI-800055FB052GX00PL-52P-smt
R366 *0_4R366 *0_4
for EMI request
B
+3.3V
GND
+1.5V LED_WPAN# LED_WLAN#
LED_WW AN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
Reserved Reserved Reserved Reserved Reserved
+1.5V
GND
+3.3V
C493 *33P/50V_4C493 *33P/50V_4
C
+3V
6/29: SI add
+1.5V
52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
16 14 12 10 8 6 4 2
5/6:modify from HP request
4/19 modify from EC request
R374 *10K_4R374 *10K_4 R375 *0_4R375 *0_4
MINI_BLED
R347 *0_4R347 *0_4 R774 0_4R774 0_4
R352 0_4R352 0_4
5/11 :stuff R9149
PLTRST#
LAD0 LAD1 LAD2 LAD3 LFRAME#
+3V
BLUELED
RF_LINK#
R348 10K_4R348 10K_4
USBP10+ [9] USBP10- [9]
PLTRST# [3,9,33,35,37] RF_OFF# [10]
LAD0 [8,35] LAD1 [8,35] LAD2 [8,35] LAD3 [8,35] LFRAME# [8,35]
BLED_COMBO [35] BLUELED [32,35]
RF_LINK# [35]
+3V
C487
C487
0.01U/25V_4
0.01U/25V_4
INTEL WLAN CARD PIN 20 W_DISABLE# have internal pull-up 110k ohm
C503
C503
0.1U/10V_4
0.1U/10V_4
+1.5V
D
C472
C472 10U/6.3VS_6
10U/6.3VS_6
E
+3V
C504
C19
C19
0.1U/10V_4
0.1U/10V_4
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,37,39,40,41,43,45,46,47] +5V [7,8,11,19,25,26,27,29,30,32,34,37,45] +1.5V [5,11,13,45] +3VPCU [7,8,25,32,34,35,37,38,39,40,42,44,45,47]
C491
C491
0.1U/10V_4
0.1U/10V_4
PCIE_WAKE#[7,33]
C504
0.1U/10V_4
0.1U/10V_4
C476
C476 10U/6.3VS_6
10U/6.3VS_6
+3VSUS
2
Q27
Q27 *PDTC144EU
*PDTC144EU
R391 *10K_4R391 *10K_4
13
MINICAR_PME#
58
CPU FAN
+3V
R386
R386
4.7K_4
4.7K_4
FAN1SIG[35]
C499
C499
2.2U/6.3V_6
2.2U/6.3V_6
+5V_FAN
C498
C498
0.1U/10V_4
0.1U/10V_4
B B
FANPWR = 1.6*VSET
+5V
VFAN[35]
THERM_OVER#
1234
1 4
Gnd shape
R370 10K_4R370 10K_4
+5V
+5V
C497
C497 1U/6.3V_4
1U/6.3V_4
A A
A
DFHD03MR008
U24
U24
VIN2VO
GND
/FON
GND GND
VSET
GND
G991PV11
G991PV11
5678
CN21
CN21
1
1
2
2
4
334
FAN CONN
FAN CONN
30 MIL
+5V_FAN
3 5 6 7 8
G995 layout notice
B
POWER BOTTON CONNECT
NBSWON1#
12
G1
G1 *SOLDERJUMPER-2
*SOLDERJUMPER-2
LID_EC#
C520
C520
0.1U/10V_4
0.1U/10V_4
C
NBSWON1#
C502
C502
0.1U/10V_4
0.1U/10V_4
PWR_LED#
C521
C521
0.1U/10V_4
0.1U/10V_4
+3VPCU
C509
C509
0.1U/10V_4
0.1U/10V_4
1. +3VPCU(LIDSWITCH PWR)
2. +3VPCU(LIDSWITCH PWR)
3. LIDSWITCH
4. NBSWON1#
4/20 DB add.
LID_EC#[25,35]
NBSWON1#[35]
PWR_LED#[32,35]
D
R373 *0_4/SR373 *0_4/S R382 *0_4/SR382 *0_4/S
PWR_LED#
5. PWRLED#
1
6. GND
2 3 4 5 6
7 8
CN5
CN5 PWR BTN CONN
PWR BTN CONN
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
MINI PCIE CONN/FAN
MINI PCIE CONN/FAN
MINI PCIE CONN/FAN
E
36 47Wednesday, October 13, 2010
36 47Wednesday, October 13, 2010
36 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
1
MG[DQCTF"RWNN/WR
RP18
RP18
10
MY1 MY4
9
MY5
8
MY0
7 4
MY9
*8.2K_10P8R_6
MY13 MY12 MY3 MY6
*8.2K_10P8R_6 RP19
RP19
10
9 8 7 4
*8.2K_10P8R_6
*8.2K_10P8R_6
R470 *8.2K_4R470 *8.2K_4 R469 *8.2K_4R469 *8.2K_4
+3VPCU
A A
1 2 3
56
1 2 3
56
MY2 MY7
MY8
MY14 MY11 MY10 MY15
8/6: PV del
MY16 MY17
clear ABS 758 resin for key cap.
7 LEDs for 15.4” (total LED current 140mA)
11 LEDs for 17” (Total LED current 220mA)
B B
KB backlight for 15"
R164
+12VALW
KB_LED_EN[35]
R164
*100K_4
*100K_4
2
R161 *1M_4R161 *1M_4
3
C274
C274 *0.01U/25V_4
*0.01U/25V_4
Q11
Q11 *2N7002K
*2N7002K
1
2
C679
C679
*0.1U/10V_4
*0.1U/10V_4
+5V
3
1
2
Q12
Q12 *AO3404
*AO3404
C678
C678
*0.1U/10V_4
*0.1U/10V_4
MY5 MY6 MY3 MY7
MY8 MY9 MY10
SI Add
140 mA
+5V_LED_KBLIGHT
C308 220P/50V_4C308 220P/50V_4 C301 220P/50V_4C301 220P/50V_4 C299 220P/50V_4C299 220P/50V_4 C303 220P/50V_4C303 220P/50V_4
C302 220P/50V_4C302 220P/50V_4 C314 220P/50V_4C314 220P/50V_4 C294 220P/50V_4C294 220P/50V_4 C295 220P/50V_4C295 220P/50V_4
R519 *200/F_6R519 *200/F_6
PDTC144EU
PDTC144EU
CN7
CN7
4 3 2 1
*KB LIGHT CONN
*KB LIGHT CONN
DFFC04FR042
DFFC04FR042
88513-0401-4p-l-smt
88513-0401-4p-l-smt
3
2
Q36
Q36
4.LEDVCC
3. LEDVCC
2. GND
1. GND
4
MY1
C307 220P/50V_4C307 220P/50V_4
MY2
C305 220P/50V_4C305 220P/50V_4
MY4
C304 220P/50V_4C304 220P/50V_4
MY0
C311 220P/50V_4C311 220P/50V_4
MX4
C313 220P/50V_4C313 220P/50V_4
MX6
C315 220P/50V_4C315 220P/50V_4
MX3
C309 220P/50V_4C309 220P/50V_4
MX2MY11
C310 220P/50V_4C310 220P/50V_4
+5V +5V
R505
R505 1K_4
1K_4
12
1 3
WIRELESS_ON_R WIRELESS_OFF_R
5
MX7 MX0 MX5 MX1
MY12 MY13 MY14 MY15 MY16 MY17
PV Change BOMPV Change BOM
R525 *200/F_6R525 *200/F_6
PDTC144EU
PDTC144EU
12
2
Q38
Q38
1 3
C316 220P/50V_4C316 220P/50V_4 C306 220P/50V_4C306 220P/50V_4 C312 220P/50V_4C312 220P/50V_4 C317 220P/50V_4C317 220P/50V_4
C298 220P/50V_4C298 220P/50V_4 C297 220P/50V_4C297 220P/50V_4 C296 220P/50V_4C296 220P/50V_4 C293 220P/50V_4C293 220P/50V_4 C292 220P/50V_4C292 220P/50V_4 C291 220P/50V_4C291 220P/50V_4
R531
R531 1K_4
1K_4
6
MY[0..17][35]
MX[0..7][35]
MUTE_LED#[29]
CAPSLED#[35]WIRELESS_ON#[35] WIRELESS_OFF#[35]
KEYLED_CN[35]
7
MY[0..17] MX[0..7]
WIRELESS_ON_R
WIRELESS_OFF_R
R533 200/F_4R533 200/F_4 R528 200/F_4R528 200/F_4
R415 1K_4R415 1K_4
+3V
R416
R416 100K_4
100K_4
MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17
KEYLED_CN_R
C300
C300
0.1U/10V_4
0.1U/10V_4
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
KB CONN
KB CONN
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CN9
CN9
8
59
MV Add
C C
H17
H17
H-C217D126P2
H-C217D126P2
1
H15
H15
*H-TC236BC354D130P2
*H-TC236BC354D130P2
H16
H16
H-C217D126P2
H-C217D126P2
1
H2
H2
*H-TC236BC354D130P2
*H-TC236BC354D130P2
H14
*H-TC315BC354D118P2
*H-TC315BC354D118P2
1
H13
H13
*H-TC315BC354D118P2
*H-TC315BC354D118P2
1
H11
H11
*H-TC315I138BC354D118P2
*H-TC315I138BC354D118P2
1
H3
H3
*H-TC315BC354D118P2
*H-TC315BC354D118P2
1
GPU CPU
H14
5/10: del H6,H7,H11,H12
1
H1
D D
H1
*H-TC315BC354D118P2
*H-TC315BC354D118P2
1
1
1
H10
H10
*H-TC315I138BC354D118P2
*H-TC315I138BC354D118P2
1
JQNG
H4
H4
*H-TC315BC354D118P2
*H-TC315BC354D118P2
1
2
H12
H12
*H-TC315I138BC354D118P2
*H-TC315I138BC354D118P2
1
H5
H5
*H-TC315I138BC354D118P2
*H-TC315I138BC354D118P2
1
3
5/4: add for PDC request
H9
*H-TC276I169BC217D150P2
*H-TC276I169BC217D150P2
1
H7
H7
*INTEL-CPU-BRACKET
*INTEL-CPU-BRACKET
3
2
4
1
4
H6
H6
*H-TC276I169BC217D150P2
*H-TC276I169BC217D150P2
1
PAD1
PAD1
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,39,40,41,43,45,46,47] +5V [7,8,11,19,25,26,27,29,30,32,34,36,45] +3VPCU [7,8,25,32,34,35,36,38,39,40,42,44,45,47] +3V_VGA [16,17,18,19,27,42] +12VALW [25,34,42,44,45] +1.0V_VGA [15,17,19,43] +1.5V_VGA [16,19,20,21,22,23,47] +1.8V_VGA [15,17,19,42]
H8
H8
*H-TC276I169BC217D150P2
*H-TC276I169BC217D150P2
*SPAD-RE118X197NP
*SPAD-RE118X197NP
1
SPAD-RE118X197NP
SPAD-RE118X197NP
1
PAD2
PAD2
1
5
*SPAD-RE118X197NP
*SPAD-RE118X197NP
SPAD-RE118X197NP
SPAD-RE118X197NP
PLTRST#[3,9,33,35,36]
DGPU_HOLD_RST#[9]
8/6 :PV Modify
6
R569 *330_4R569 *330_4
FOR DIS ONLY
PLTRST#[3,9,33,35,36]
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
DGPU_HIN_RST#
R753 0_4R753 0_4
7
H9
FOR SG ONLY
+3V
C770
4
C770
*0.1U/10V_4
*0.1U/10V_4
R570
R570 *100K_4
*100K_4
PEGX_RST# [15]
U41
U41
2 1
3 5
6/7 :DB2 Modify
PEGX_RST#PLTRST#
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
KB
KB
KB
PEGX_RST# [15]
37 47Wednesday, Octob er 13, 2010
37 47Wednesday, Octob er 13, 2010
37 47Wednesday, Octob er 13, 2010
8
of
of
of
1A
1A
1A
5
4
3
2
1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW
Value P/N
130k
Value
2.2uH
1.5uH
+5VPCU
+5V_ALWP
12
+
+
PC216
PC216
220U/6.3V_6X4.5ESR18
220U/6.3V_6X4.5ESR18
5VPCU setting
PR123
CS41332FB06133k
CS41302FB00
PL13
P/N
DC-22C0M000
DC-15G0M000
35W/45W CPU
PR202
PR202 *0_2/S
*0_2/S
PC221
PC221
0.1U/10V_4
0.1U/10V_4
PR125
PR125 *0_4
*0_4
PQ16/PQ13
No POP
PC38
No POP
PL13
PL13
1.5UH/16A
1.5UH/16A PR216
PR216
2.2_8
2.2_8
PC237
PC237
POP
POP
2200P/50V_4
2200P/50V_4
DB Change
12
+
+
PC286
PC286
100U/25V L-F
100U/25V L-F
DB Change 35W CPU NA
PQ16
PQ16 RJK03B9D
RJK03B9D
5
D
D
G
G
5V_DH
4
S
S
213
PQ13
PQ13 RJK03D3D
RJK03D3D
5
D
D
G
G
4
S
S
213
Rds(on) 5m ohm
+VIN
PD8
PD8
PR99
PR99
+VIN +VIN
12
+
+
PC285
PC285
100U/25V L-F
100U/25V L-F
5
D
D
S
S
213
5
D
D
S
S
213
Place these CAPs close to FETs
PC91
PC91
4.7U/25V_8
4.7U/25V_8
PQ47
PQ47 RJK03B9D
RJK03B9D
G
G
4
PQ46
PQ46 RJK03D3D
RJK03D3D
G
G
4
PC105
PC105
4.7U/25V_8
4.7U/25V_8
PC104
PC104
4.7U/25V_8
4.7U/25V_8
PC95
PC95
2200P/50V_4
2200P/50V_4
PR123
PR123 130K/F_4
130K/F_4
PC243
PC243
0.1U/25V_4
0.1U/25V_4
PC111
PC111
0.1U/25V_4
0.1U/25V_4
5V_FB1 PGOOD1 5V_DH
5V_LX
UDZ5V6B-7-F
UDZ5V6B-7-F
PC102
PC102
4.7U/6.3V_6
4.7U/6.3V_6
PR121
PR121
2_6
2_6
10 11 12 13 14 15 16 37 36 39 40
+5VALW
9
21
BYP OUT1 FB1 ILIM1 PGOOD1 ON1 DH1 LX1 PAD PAD PAD PAD
PAD
35
38
5V_BST1
5V_DL
1K_4
1K_4
+5VALW
PC97
PC97
PC94
PC94
8
LDOREFIN
BST117DL118VDD19N.C20AGND21PGND22DL223BST2
PAD33PAD34PAD
0.1U/25V_4
0.1U/25V_4
7
LDO
8206ON_LDO
12
*0.1U/10V_4
*0.1U/10V_4
5
6
IN
N.C
PU5
PU5
RT8206B
RT8206B
PR109
PR109
150K/F_4
150K/F_4
+5V_VCC1
PC240
PR100
PR100 *0_4
*0_4
PC86
PC86
REFIN2
ILIM2
OUT2
SKIP
PGOOD2
ON2 DH2
42
LX2
PAD41PAD
PR98
PR98
PC240
1U/6.3V_4
1U/6.3V_4
DB Change
+5V_VCC1
32 31
3V_FB2
30 29
PGOOD2
28 27
3V_DH
26
3V_LX
25
2_6
2_6
PR93
PR93 *0_4/S
*0_4/S
PV change
1 2
PC79
PC79
0.1U/25V_4
0.1U/25V_4
PR91
PR91 205K/F_4
205K/F_4
PQ48
PQ48 AON7702
AON7702
Rds(on) 14m ohm
PR108
PR108 0_4
0_4
0.1U/10V_4
0.1U/10V_4
2
4
3
1
REF
TON
VCC
ONLDO
24
3V_BST2 3V_DL
4
4
Place these CAPs close to FETs
PC100
PC100
0.1U/25V_4
0.1U/25V_4
52
PQ49
PQ49 AON7410
AON7410
3
1
52
PR222
PR222
2.2_8
2.2_8
PC246
PC246
3
1
2200P/50V_4
2200P/50V_4
PC106
PC106
PL17
PL17
2.2UH/8A
2.2UH/8A
PC96
PC96
4.7U/25V_8
4.7U/25V_8
2200P/50V_4
2200P/50V_4
+3.3V_ALWP
PR92
PR92 *0_4/S
*0_4/S
PV change
1 2
PR90
PR90 *0_4
*0_4
PC238
PC238
+3.3V +/- 5%
4.7U/25V_8
4.7U/25V_8
Countinue current:6A Peak current:7.5A OCP minimum 9A
+3VPCU
PR224
PR224
*0_2/S
*0_2/S
PC254
PC254
0.1U/10V_4
0.1U/10V_4
12
+
+
PC250
PC250
220U/6.3V_6X4.5ESR18
220U/6.3V_6X4.5ESR18
D D
35W CPU
45W CPU
35W CPU
45W CPU
C C
+5V +/- 5% Countinue current:9A/12A Peak current :12A/15A OCP minimum :15A/20A
B B
5:
PR124
PR124 *0_4/S
*0_4/S
PV change
1 2
PD11
PD11
BAS316/DG
BAS316/DG
21
PR129
+5VALW
A A
NTC need place under CPU Socket
CPU Thermal protection at 90 +/-3 degrreC
5
PR129
100K_4
100K_4
PC252
PC252
12
PC112
PC112
2.2U/6.3V_6
2.2U/6.3V_6
*0.22U/10V_6
*0.22U/10V_6
4
*576/F_4
*576/F_4
PC245
PC245
*0.1U/10V_4
*0.1U/10V_4
PR235
PR235
4
PU17
PU17
5
REF
3
NTC
*RT9726
*RT9726
PR237
PR237 *10K/F_NTC_0603
*10K/F_NTC_0603
+5VSUS
1
VIN
OT
2
GND
6
EN
SYSON
PC239
PC239 *0.1U/10V_4
*0.1U/10V_4
PR234
PR234 *100K/F_4
*100K/F_4
PR231
PR231 *0_4
*0_4
PC99
PC99
1U/6.3V_4
1U/6.3V_4
MAINON [35,39,41,43,44,45]
3
PGOOD2
PGOOD1
+3VPCU
PR131
PR88
PR88 *0_4/S
*0_4/S
2
PR131 10K_4
10K_4
+VIN [25,31,39,41,42,43,44,45] +3VPCU [7,8,25,32,34,35,36,37,39,40,42,44,45,47] +5VPCU [32,35,39,40,41,42,43,44,45]
HWPG [35,39,41,42,43]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
1A
1A
+5V/+3V (RT8206B)
+5V/+3V (RT8206B)
+5V/+3V (RT8206B)
1
38 47Wednesday, October 13, 2010
38 47Wednesday, October 13, 2010
38 47Wednesday, October 13, 2010
1A
of
of
of
5
4
3
2
1
5;
+5VPCU
PR58
PC110
PC110
PR58
10_6
10_6
RTVDD
1U/6.3V_4
1U/6.3V_4
2
PU16
PU16
10
VDD
CS
4
PGOOD
5
NC
15
EN/DEM
17
PAD
NC
14
RT8209A
RT8209A
GND6PGND
9
VDDP
7
RTBST_1
13
BST
PHASE
VOUT
1
PC226
PC226
1U/6.3V_4
1U/6.3V_4
PR215
PR215
RTBST
2_6
2_6
PC227
PC227
RTDH
12
DH
RTLX
11
PR220
PR220
RTTONRTTON
16
TON
DL FB
PR223
PR223
4.02K/F_4
4.02K/F_4 PC251
PC251
*100P/50V_4
*100P/50V_4
232K/F_4
232K/F_4
RTDL
8 3
RTFB
PR228
PR228
10K/F_4
10K/F_4
PR233
PR233
*10K/F_4
*10K/F_4
Vo=0.75(R1+R2)/R2
4
0.1U/25V_4
0.1U/25V_4
4
PQ41
PQ41 AON7702
AON7702
3
3
RDSon=14m ohm
PR232
PR232
2
*1K/F_4
*1K/F_4
PQ50
PQ50
1 3
*MMBT3904-7-F
*MMBT3904-7-F
H_VTTVID1=Low, 1V H_VTTVID1=High, 1.05V
PC191
PC191
52
2200P/50V_4
2200P/50V_4
PQ43
PQ43 AON7410
AON7410
1
52
PR162
PR162
2.2_8
2.2_8
PC190
PC190 1500P/50V_4
1500P/50V_4
1
H_VTTVID1 [6]
D D
PR229
PR229
PR227
PR227
100K_4
100K_4
12
*0_4/S
*0_4/S
+3V
PR217
PR217
10/F_4
10/F_4
PR213
PR213
RTILIM
11.3K/F_4
11.3K/F_4
HWPG_S2A
PC244
PC244
*0.33U/6.3V_4
*0.33U/6.3V_4
DB change
PD17
PD17
HWPG
2 1
BAS316/DG
1.05V_VTT_PWRGD[41]
MAINON[35,38,41,43,44,45]
C C
BAS316/DG
PV change
MAINON RTEN
DB change
B B
PC192
PC192
0.1U/25V_4
0.1U/25V_4
PC202
PC202
PL6
PL6
2.2UH/8A
2.2UH/8A
+VIN_1.05V_VTT
UPB201212T-800Y-N
UPB201212T-800Y-N
PC203
PC203
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
PR225
PR225 *0_4
*0_4
PL10
PL10
PR1
PR1 *0_2/S
*0_2/S
+VIN
PC214
PC214
0.1U/25V_4
0.1U/25V_4
600 mils
12
+
+
PR221
PR221 0_4
0_4
+1.05V Volt +/- 5% Countinue current:6A Peak current: 8A OCP minimum: 9A
+1.05V_VTT
+1.05VVTT_S2
12
+
PC24
PC24
330U_2.5V_7343
330U_2.5V_7343
+
VCCP_SENSE [5]
PC234
PC234
PC88
PC88
*0.1U/10V_4
*0.1U/10V_4
*330U_2.5V_7343
*330U_2.5V_7343
5/12: for EMI request
PV change
PC3
PC3
0.1U/10V_4
0.1U/10V_4
+3VPCU
+1.8V +/- 5% Countinue current:1.2A Peak current:2A
7
ADJ
1.8VADJ
PR207
PR207
VOUT
GND1
R1
100K/F_4
100K/F_4
5
NC
6
PC218
8 9
PR206
PR206
127K/F_4
127K/F_4
PC218
10U/6.3V_8
10U/6.3V_8
VO=(0.8(R1+R2)/R2) R2<120Kohm
PC53
PC53
+1.8V
PC215
PC215
0.1U/10V_4
0.1U/10V_4
10U/6.3V_8
10U/6.3V_8
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
+1.05V/+1.8V (RT8204C)
+1.05V/+1.8V (RT8204C)
+1.05V/+1.8V (RT8204C)
1
39 47Wednesday, October 13, 2010
39 47Wednesday, October 13, 2010
39 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
3
PC223
PC223
1U/6.3V_4
1U/6.3V_4
VIN
PU15
PU15 RT9025
RT9025
2
EN VDD4GND
1
PGOOD
12
PR208
PR208 *0_4/S
*0_4/S
R2
PC220
PC220
PC222
PC222
0.1U/10V_4
0.1U/10V_4
10U/6.3V_8
PC219
PC219
*0.33U/6.3V_4
*0.33U/6.3V_4
10U/6.3V_8
+5VPCU
PR205
MAINON
A A
PR205
10K/F_4
10K/F_4
PV change
HWPG[35,38,41,42,43]
5
4
PR2
PR2
*0_4/S
*0_4/S
1316AGND
5/12: Modify for DG
PR49 0_4PR49 0_4
+5VPCU
12
PR12
PR12 0_4
0_4
1316AGND
PR8
PR8
8.25K/F_4
8.25K/F_4
1316AGND
DB1_CORE
442K/F_4
442K/F_4
DCMDRP1
Discrete Only
2200P/50V_4
2200P/50V_4
change to 0ohm
1
PQ65
PQ65 ME2301
ME2301
DB1_CORE
3
PR294
PR294
PC213
PC213
2200P/50V_4
2200P/50V_4
5
5/12: change to 27.4k by power request
DB change
PR80 3.74K/F_4PR80 3.74K/F_4 PR79 39.2K/F_4PR79 39.2K/F_4 PR81 27.4K/F_4PR81 27.4K/F_4 PR77 32.4K/F_4PR77 32.4K/F_4 PR76 39.2K/F_4PR76 39.2K/F_4 PR70 32.4K/F_4PR70 32.4K/F_4 PR65 49.9K/F_4PR65 49.9K/F_4
+1.05V_VTT
+3V
PR174 10K_4PR174 10K_4
IREPORT_GFX
IREPORT_CORE
+1.05V_VTT
1316AGND
PR194
PR194
5.9K/F_4
5.9K/F_4
PR192 10K_4PR192 10K_4
PC13
PC13
*0.022U/25V_4
*0.022U/25V_4
PC11
PC11
0.022U/25V_4
0.022U/25V_4
PR165
PR165
12
PV change
TEMPSENSE
PR200
PR200
40.2K/F_4
40.2K/F_4
PUT COLSE TO VCORE HOT SPOT
PR46 *49.9/F_4PR46 *49.9/F_4
PR56
PR56
PR53 56_4PR53 56_4
130/F_4
130/F_4
1316AGND
PR21
PR21
10_6
10_6
DB change
1316AGND
Discrete Only NA
DB1_GFX
PR160
PR160
*97.6K/F_4
*97.6K/F_4
*51.1K/F_4
*51.1K/F_4
DCMDRP2
PC12
PC12
PR9
PR9 0_4
0_4
*2200P/50V_4
*2200P/50V_4
PR193
PR193
12
100K_4 NTC
100K_4 NTC
PR78
0.1U/10V_4
0.1U/10V_4
43
42
VDD3
R_SEL[6]44R_SEL[5]45R_SEL[2]
R_SEL[4]46R_SEL[3]
QFN
QFN
SENSE2+16NC
SENSE2-
17
15
18
PR78
178K/F_4
178K/F_4
f=1/N*(39.5n+R*2.09n/k) N=4 (1-phase & 2-phase) N=3 (3-phase)
PR75 *0_4PR75 *0_4
37
38
39
40
41
VDD3
DB1[0]
R_OSC
SPHASE1[2]
SPHASE1[1]
SPHASE1[0]
SPHASE2
TEMP_SENSE2 TEMP_SENSE1
IDES2_P
IDES2_N
R_REF2
IMON121R_REF122IDES1_P23IDES1_N
NC20DCMDRP2/STB19DCMDRP1
24
44.2K/F_4
44.2K/F_4
PC21
PC21
1000P/50V_4
1000P/50V_4
PR16
PR16
7.87K/F_4
7.87K/F_4
PR42
PR42
7.87K/F_4
7.87K/F_4 PC26
PC26
1000P/50V_4
1000P/50V_4
PC18
PC18
1000P/50V_4
1000P/50V_4
PR14
PR14
7.87K/F_4
7.87K/F_4
PR38
PR38
7.87K/F_4
7.87K/F_4 PC25
PC25
1000P/50V_4
1000P/50V_4
PC22
PC22
1000P/50V_4
1000P/50V_4
PR17
PR17
7.87K/F_4
7.87K/F_4
PR43
PR43
7.87K/F_4
7.87K/F_4 PC30
PC30
1000P/50V_4
1000P/50V_4
PC217
PC217
PR203
PR203
+3VPCU
10_6
10_6
1316AGND
PR41 *56_4PR41 *56_4
PC303
PC303
48
47
49
PU1
PU1
1316AGND
1
R_SEL[1]
GND_TAB
2
R_SEL[0]
3
GND
4
*0.1U/10V_4
*0.1U/10V_4
VDIO
5
VCLK
6
VR_ENABLE
7
ALERT#
8
VR1_READY
9
VR2_READY
10
VR_TT1#
11
GND
12
VDD5
PC27
PC27
VT1316MAF
VT1316MAF
0.1U/10V_4
0.1U/10V_4
IDES_N_CORE
IDES_P_CORE
SENSE1+13SENSE1-
14
CPU Core(VT1316M+VT317S)
D D
VR_SVID_DATA[5]
VR_SVID_CLK[5]
VRON[35]
VR_SVID_ALERT#[5]
IMVP_PWRGD[7]
GFX_HWPG[35]
H_PROCHOT#[3,35]
DB change
VGT_IMON[46]
DB change
C C
VCORE_IMON[46]
DB change
+1.05V_VTT
PR18
PR18
PR19
PR19
90.9K/F_4
90.9K/F_4
PR6
PR6
PC2
PC2
2.94K/F_4
2.94K/F_4
1316AGND
PV change
B B
VRON
PC301 0.01u/50V_4PC301 0.01u/50V_4
A A
PR103 0_4PR103 0_4
1 2
+5VPCU
PR291
PR291 200_4
200_4
2
H_PROCHOT#
*130K/F_4
*130K/F_4
DB1[1] DB1[2]
DB2[0] DB2[1] DB2[2]
IMON2
PR11
PR11
*0.022U/25V_4
*0.022U/25V_4
*0.022U/25V_4
*0.022U/25V_4
*0.022U/25V_4
*0.022U/25V_4
1316AGND
36 35 34 33 32 31 30 29 28 27
PR47 44.2K/F_4PR47 44.2K/F_4
26 25
DB change
PC208
PC208
PR185
PR185
*10K_4
*10K_4
PC196
PC196
PR175
PR175
*10K_4
*10K_4
PC198
PC198
PR186
PR186
*10K_4
*10K_4
35W CPU NA
DB change
4
SPHASE0_CORE SPHASE1_CORE SPHASE2_CORE
35W CPU 0ohm
PR60 0_4PR60 0_4
DB change
PR20
PR20
7.87K/F_4
7.87K/F_4
PR32
PR32
7.87K/F_4
7.87K/F_4
PR24
PR24
7.87K/F_4
7.87K/F_4
PR35
PR35
7.87K/F_4
7.87K/F_4
PR22
PR22
7.87K/F_4
7.87K/F_4
PR34
PR34
7.87K/F_4
7.87K/F_4
DB0_CORE DB1_CORE DB2_CORE
SPHASE_GFX DB0_GFX DB1_GFX DB2_GFX TEMPSENSE_GFX TEMPSENSE IDES_P _GFX IDES_N_ GFX
IREPORT_GFX
IDES_P_CORE IDES_N_CORE
IREPORT_CORE DCMDRP2
DCMDRP1
VCC_AXG_SENSE_1 VSS_AXG_SENSE_1 VSSSENSE_1 VCCSENSE_1
IDES_N_CORE0
4700PF/25V_4
4700PF/25V_4
IDES_P_CORE0
IDES_N_CORE1
4700PF/25V_4
4700PF/25V_4
IDES_P_CORE1
IDES_N_CORE2
4700PF/25V_4
4700PF/25V_4
IDES_P_CORE2
PR297
PR297 1K_4
1K_4
PC189
PC189
3
+5VPCU
PC16
PC16
PC186
PC186
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
C6
E6
G6
J6
VDDHC4VDDHC5VDDH
VDDHE4VDDHE5VDDH
A5
IDES_N
A4
IDES_P
A6
DB[0]
A1
DB[1]
B1
DB[2]
PU12
PU12 VT1317S
SPHASE AVDD
AVDD AVDD AVDD
AGND
B2
A2
VRON [35]
PC200
PC200
0.1U/10V_4
0.1U/10V_4
IDES_N IDES_P
DB[0] DB[1] DB[2]
SPHASE AVDD
AVDD AVDD AVDD
AGND
B2
A2
H_PROCHOT#
*130K/F_4
*130K/F_4
AGND
AGND
GNDJ1GNDJ2GND
J3
E6
VDDHE4VDDHE5VDDH
DB change
GNDJ1GNDJ2GND
J3
PR293
PR293
PC178
PC178
VT1317S
G3
VDDHC4VDDHC5VDDH
PU14
PU14 VT1317S
VT1317S
G3
B6 B5
B4 A3 B3
1U/6.3V_4
1U/6.3V_4
A5 A4
A6 A1 B1
B6 B5
B4 A3 B3
VX
VDDHG4VDDHG5VDDH
VDDHJ4VDDHJ5VDDH
VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX
GNDC2GNDC1GND
GNDE1GNDE2GND
GNDG1GNDG2GND
E3
C3
C6
G6
J6
VX
VDDHG4VDDHG5VDDH
VDDHJ4VDDHJ5VDDH
VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX
GNDC2GNDC1GND
GNDE1GNDE2GND
GNDG1GNDG2GND
E3
C3
PR170
PR170
TEMPSENSE_GFX
*2.49K/F_4
*2.49K/F_4
PR265
PR265
*59K/F_4
*59K/F_4
*2200P/50V_4
*2200P/50V_4
PUT COLSE TO V_GT HOT SPOT
PV change
+5VPCU_VCORE
12
+
+
PC38
PC38
PC8
PC8
10U/6.3V_8
10U/6.3V_8
220U/6.3V_7343
220U/6.3V_7343
DB change
Discrete Only 0ohm
9/29: MV modify
IDES_P_CORE
PR295
PR295 1K_4
1K_4
3
1
+5VPCU
PC7
PC7
PC195
PC195
PR171
PR171
3.09K/F_4
3.09K/F_4
PC193
PC193
PR173
PR173
3.09K/F_4
3.09K/F_4
10U/6.3V_8
10U/6.3V_8
DB change DB change
PC199
PC199
PR181
PR181
3.09K/F_4
3.09K/F_4
PC183
PC183
10U/6.3V_8
10U/6.3V_8
+5VPCU
PR296
PR296
10K_4
10K_4
+5VPCU_VCORE
2
PQ62
PQ62
DMN601K-7
DMN601K-7
3
PQ64
PQ64
DMN601K-7
DMN601K-7
PV change
PC182
PC182
10U/6.3V_8
10U/6.3V_8
+5VPCU_VCORE
PC4
PC4
PC180
PC180
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
IDES_N_ CORE0 IDES_P _CORE0
DB0_CORE DB1_CORE DB2_CORE
A1317AGND B1317AGND
SPHASE0_CORE
PR36
PR36
10_6
10_6
PC32
PC32
PR30
PR30
0.1U/10V_4
0.1U/10V_4
*0_4/S
*0_4/S
A1317AGND
1
2
PC302
PC302
200P/50V_4
200P/50V_4
PC187
PC187
PC9
PC9
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
IDES_N_ CORE2 IDES_P _CORE2
DB0_CORE DB1_CORE DB2_CORE
SPHASE2_CORE
PR26
PR26
10_6
10_6
PC31
PC31
0.1U/10V_4
0.1U/10V_4
PR27
PR27
*0_4/S
*0_4/S
C1317AGND
H6 H5 H4 H3 H2 H1 F6 F5 F4 F3 F2 F1 D6 D5 D4 D3 D2 D1
H6 H5 H4 H3 H2 H1 F6 F5 F4 F3 F2 F1 D6 D5 D4 D3 D2 D1
12
PR267
PR267
*100K_4 NTC
*100K_4 NTC
+5VPCU
PC181
PC181
PC5
PC5
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
DB change
SPHASE1_CORE
+5VPCU_VCORE
+5VPCU
PC283
PC283
*10U/6.3V_8
*10U/6.3V_8
IDES_N_GFX
IDES_P _GFX
Discrete Only NA
PC6
PC6
10U/6.3V_8
10U/6.3V_8
IDES_N_ CORE1 IDES_P_CORE1
DB0_CORE DB1_CORE DB2_CORE
PJP3
PJP3 *POWER_JP/S
*POWER_JP/S
1 2
PC276
PC276
*10U/6.3V_8
*10U/6.3V_8
+5VPCU_GFX
PC184
PC184
1U/6.3V_4
1U/6.3V_4
PR25
PR25
10_6
10_6
PC34
PC34
PR31
PR31
*0_4/S
*0_4/S
PC149
PC149 *10U/6.3V_6
*10U/6.3V_6
IDES_N_GFX1 IDES_P _GFX1
DB0_GFX DB1_GFX DB2_GFX
SPHASE_GFX
*2700P/50V_4
*2700P/50V_4
PC17
PC17
0.1U/10V_4
0.1U/10V_4
B1317AGND
PC280
PC280
PR141
PR141
PC267
PC267
PR256
PR256
*0_4/S
*0_4/S
PC266
PC266
PR258
PR258
*3.16K/F_4
*3.16K/F_4
PR257
PR257
*3.16K/F_4
*3.16K/F_4
PC265
PC265
*2700P/50V_4
*2700P/50V_4
1U/6.3V_4
1U/6.3V_4
A5 A4
A6 A1 B1
B6 B5
B4 A3 B3
+5VPCU_GFX
*1U/6.3V_4
*1U/6.3V_4
G1317AGNDC1317AGND
*10_6
*10_6
*0.1U/10V_4
*0.1U/10V_4
G1317AGND
*0.022U/25V_4
*0.022U/25V_4
PC188
PC188
IDES_N IDES_P
DB[0] DB[1] DB[2]
SPHASE AVDD
AVDD AVDD AVDD
PC274
PC274
PC148
PC148
PR140
PR140
*10K_4
*10K_4
2
0.1U/10V_4
0.1U/10V_4
AGND
AGND
B2
A2
*1U/6.3V_4
*1U/6.3V_4
A5 A4
A6 A1 B1
B6 B5
B4 A3 B3
DB change
E6
VDDHE4VDDHE5VDDH
DB change
GNDJ1GNDJ2GND
J3
PC271
PC271
*0.1U/10V_4
*0.1U/10V_4
IDES_N IDES_P
DB[0] DB[1] DB[2]
SPHASE AVDD
AVDD AVDD AVDD
AGND
B2
VDDHC4VDDHC5VDDH
PU13
PU13 VT1317S
VT1317S
G3
AGND
A2
*11.5K/F_4
*11.5K/F_4
*11.5K/F_4
*11.5K/F_4
C6
GNDG1GNDG2GND
E3
VDDHE4VDDHE5VDDH
J3
PR261
PR261
PR259
PR259
G6
VDDHG4VDDHG5VDDH
E6
PU20
PU20 *VT1317S
*VT1317S
GNDJ1GNDJ2GND
G3
J6
VDDHJ4VDDHJ5VDDH
GNDC2GNDC1GND
GNDE1GNDE2GND
C3
C6
VDDHC4VDDHC5VDDH
GNDG1GNDG2GND
E3
IDES_N_GFX1
*4700PF/25V_4
*4700PF/25V_4
IDES_P _GFX1
VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX
VDDHG4VDDHG5VDDH
PC268
PC268
PR260
PR260
*3.09K/F_4
*3.09K/F_4
G6
GNDE1GNDE2GND
H6 H5 H4 H3 H2 H1 F6 F5 F4 F3 F2 F1 D6 D5 D4 D3 D2 D1
VDDHJ4VDDHJ5VDDH
C3
VX0_CORE VX1_CORE
J6
VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX VX
GNDC2GNDC1GND
VX1_CORE VX0_CORE VX2_CORE
H6 H5 H4 H3 H2 H1 F6 F5 F4 F3 F2 F1 D6 D5 D4 D3 D2 D1
50nH/50A
50nH/50A
4
2 4
*50nH/50A
*50nH/50A
VX_GFX
12
PC78
PC78
*10U/6.3V_8
*10U/6.3V_8
PL14
PL14
3 12 56
1 3
PL15
PL15
VSS_SENSE[5,46]
VCC_SENSE[5,46]
PL19
PL19
12
*0.1uH_PCMC063T-R10MN
*0.1uH_PCMC063T-R10MN
VSS_AXG_SENSE[5,46]
VCC_AXG_SENSE[5,46]
1
12
12
12
12
PC232
PC232
PC229
PC229
*10U/6.3V_8
*10U/6.3V_8
12
PC228
PC228
*10U/6.3V_8
*10U/6.3V_8
DB change
UMA co-layout
12
PC75
PC75
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
PC231
PC231
2200P/50V_4
2200P/50V_4
PR178
PR178
0_4
0_4
PR177
PR177
0_4
0_4
12
12
PC236
PC236
+VCC_CORE
PC233
PC233
0.1U/10V_4
0.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
12
VSSSENSE_1
VCCSENSE_1
PC235
PC235
PC87
PC87
*10U/6.3V_8
*10U/6.3V_8
12
PC230
PC230
*10U/6.3V_8
*10U/6.3V_8
12
IGPU Power
+VCC_GFX
PC138
PC138
PC139
PC139
PC146
PC146
PC147
PC145
PC145
PC147
PC144
PC144
12
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*0.1U/10V_4
*0.1U/10V_4
*22U/6.3V_8
*2200P/50V_4
*2200P/50V_4
5/12: Add for GPU cap.
PR179
PR179
*0_4
*0_4
PR180
PR180
*0_4
*0_4
*22U/6.3V_8
*22U/6.3V_8
12
12
PC298
PC298
*22U/6.3V_8
*22U/6.3V_8
VSS_AXG_SENSE_1
VCC_AXG_SENSE_1
62
PC68
PC68
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
PC299
PC299
12
*10U/6.3V_8
*10U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
PC300
PC300
PR292
PR292 0_4
0_4
*22U/6.3V_8
*22U/6.3V_8
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev Custom
Custom
Custom
+VCC_CORE (ISL95831)
+VCC_CORE (ISL95831)
PD7
PD7
5
4
3
2
PD7
+VCC_CORE (ISL95831)
Date: Sheet of
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
40 47Wednesday, October 13, 2010
40 47Wednesday, October 13, 2010
40 47Wednesday, October 13, 2010
5
4
3
2
1
+5VPCU
PR37
PR37
62872VCC
PC197
PC197
1U/6.3V_4
62872EN
62872SET0
PR161
PR161 0_4
0_4
62872SET1
PR167
PR167
34.8K/F_4
34.8K/F_4
PR168
PR168 280K/F_4
280K/F_4
1U/6.3V_4
2
PGND
3
GND
4
EN
5
VID1
6
VID0
7
SREF
8
SET0
9
SET1
62872SET2
HWPG[35,38,39,42,43]
D D
PC185
12
*0_4/S
*0_4/S
PC185
*0.22U/10V_4
*0.22U/10V_4
PR172
PR172
+3V
100K_4
100K_4
PR166
1.05V_VTT_PWRGD[39]
PR166
PV change
PC176
PC176
0.068UF/10V_4
0.068UF/10V_4
62872VID0
PR230
PR230
VCCSA_SEL[5]
VCCSA_SEL
C C
0
0
1
0 0.9V
1
0 0.8V
11
12
*0_4/S
*0_4/S
VCCSA
0.8V
0.8V
10_6
10_6
19
15
NC
VCC
PU11
PU11
ISL62872
ISL62872
SET210PGOOD
62872PVCC
20
PVCC2
UGATE
BOOT
PHASE
LGATE
OCSET
VO
FB
11
62872PG
12
PR7
PR7 *0_4/S
*0_4/S
PV change
PC19
PC19 10U/6.3V_8
10U/6.3V_8
17
18
16
1
14
13
12
62872UPGATE
PR191
PR191
62872BOOT
1 2
2_6
2_6
62872PHASE
62872LGATE
62872_OCSET
62872VO
62872FB
PR176
PR176
4.12K/F_4
4.12K/F_4
PC211
PC211
62872BTRC
0.1U/25V_4
0.1U/25V_4
52
PQ8
PQ8 AON7410
4
4
PQ7
PQ7 AON7702
AON7702
AON7410
3
1
52
3
1
RDSon=14m ohm
PR189 18.7K/F_4PR189 18.7K/F_4
PR187
PR187
2.49K/F_4
2.49K/F_4
PR188
PR188
100/F_4
100/F_4
2700P/50V_4
2700P/50V_4
PC201
PC201
PR57
PR57
2.2_8
2.2_8
PC59
PC59
+VIN_VCCSA
PC76
PC76
PC71
PC71
0.1U/25V_4
0.1U/25V_4
2200P/50V_4
2200P/50V_4
PL16
PL16
2.2UH/8A
2.2UH/8A
PR209
PR209
PR204
PR204
*0_2/S
*0_2/S
*0_2/S
*0_2/S
PR190
PR190
18.7K/F_4
18.7K/F_4 PC209
PC209
1500P/50V_4
1500P/50V_4
0.01U/50V_4
0.01U/50V_4
62872FB_SENSE
PL3
PL3
UPB201212T-800Y-N
UPB201212T-800Y-N
PC65
PC65
4.7U/25V_8
4.7U/25V_8
PR214
PR214 100_4
100_4
500 mils
PR212
PR212 *0_2/S
*0_2/S
PR236
PR236
+VCCSA +/- 5% Countinue current:4A
+VIN
Peak current:6A OCP minimum 8A
PC72
PC72
+VCCSA
0.1U/25V_4
0.1U/25V_4
PV change
12
+
+
PC225
PC225
330U_2.5V_7343
330U_2.5V_7343
0_4
0_4
VCCUSA_SENSE [5]
PC241
PC241
0.1U/10V_4
0.1U/10V_4
63
+5VPCU
PR145
PR145
10_6
PC156
PC156
10_6
RTVDD1.05V
1U/6.3V_4
1U/6.3V_4
2
PU22
PU22
10
CS
4
PGOOD
5
NC
15
EN/DEM
17
PAD
9
VDD
VDDP
RT8209A
RT8209A
GND6PGND
NC
7
14
4
B B
PV change
HWPG[35,38,39,42,43]
MAINON[35,38,39,43,44,45]
A A
5
PR276
PR276 *0_4/S
*0_4/S
PR281
PR281
10/F_4
10/F_4
12
PR278
PR278
10.5K/F_4
10.5K/F_4
PR282
PR282 *1M/F_4
*1M/F_4
RTILIM1.05V HWPG_S2A1.05V
RTEN1.05V
PC289
PC289
1U/6.3V_4
1U/6.3V_4
RTBST_11.05V
13
DH
BST
PHASE
TON
DL FB
VOUT
1
PR279
PR279
4.02K/F_4
4.02K/F_4 PC292
PC292
*100P/50V_4
*100P/50V_4
5/12: modify footprint -SMT for Layout request
PR280
PR280
12
11 16 8 3
2_6
2_6
RTDH1.05V
RTLX1.05V
PR283
PR283
RTTON1.05VRTTON1.05V
232K/F_4
232K/F_4
RTDL1.05V
RTFB1.05V
10K/F_4
10K/F_4
RTBST1.05V
PC293
PC293
0.1U/25V_4
0.1U/25V_4
AON7702
AON7702
PR277
PR277
PQ58
PQ58
4
PQ59
PQ59 AON7410
AON7410
4
52
3
1
52
3
1
RDSon=14m ohm
Vo=0.75(R1+R2)/R2
PC162
PC162
2200P/50V_4
2200P/50V_4
PR284
PR284
2.2_8
2.2_8
PC294
PC294
+VIN_1.05V
UPB201212T-800Y-N
UPB201212T-800Y-N
PC295
PC295
PC161
PC161
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
PL21
PL21
2.2uH/8A
2.2uH/8A
1500P/50V_4
1500P/50V_4
3
PC163
PC163
*4.7U/25V_8
*4.7U/25V_8
PL22
PL22
500 mils
+VIN
+1.05V Volt +/- 5% Countinue current:4A Peak current: 6A
PC296
PC296
OCP minimum: 8A
+1.05V
0.1U/25V_4
0.1U/25V_4
PR275
PR275 *0_2/S
*0_2/S
+1.05V_S2
+
+
12
PC291
PC291
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
PV change
PC290
PC290
0.1U/10V_4
0.1U/10V_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
+1.05V_VTT (VT358)
+1.05V_VTT (VT358)
+1.05V_VTT (VT358)
1
41 47Wednesday, October 13, 2010
41 47Wednesday, October 13, 2010
41 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
1
[
2
3
4
5
6
7
8
VGA Core
+3VSUS
A A
PD13
HWPG[35,38,39,41,43]
DGPU_PWROK[9,10,35,43,47]
DGPU_PWR_EN[10,35,43]
BACO_EN[47]
B B
R35 0_4R35 0_4
R369 *0_4R369 *0_4
GFX_CORE_CNTRL1[17,18]
PD13
BAS316/DG
BAS316/DG
PR240 10K_4PR240 10K_4
+3VPCU
PR244
PR244 10K_4
10K_4
2
Park XT Setting
High
Low
CTRL0 CTRL1
00
01
㎏㎝𤏐
C C
弭鯱
1.12V
0.90V
Vo
1.12
0.9
PR187 PR188 PQ58 PQ59 PQ61 PQ25 PC122 PC121
PR190=6.81k ( CS26812FB01 ) PR195=9.09k ( CS29092FB02 ) PQ24=RJK03B9D( BAM03B90000 ) PQ60=RJK03D3D( BAM03D30000 )
21
3
1
PV change
GFX_CORE_CNTRL0[17,18]
PQ54
PQ54 *DMN601K-7
*DMN601K-7
5/10 NA
+3VPCU
PR242
PR242 10K_4
10K_4
0.1U/10V_4
0.1U/10V_4
PC255
PC255
PC125
PC125
1U/6.3V_4
1U/6.3V_4
PR253
PR253
8208CS1
7.87K/F_4
7.87K/F_4
8208RTPG1
PR243
PR243
12
*0_4/S
*0_4/S
8208RTEN1
2
PQ52
PQ52
DMN601K-7
DMN601K-7
GFX_CORE_CNTRL1
3
1
DMN601K-7
DMN601K-7
8208RTVDD1
PU19
PU19
10
4 15 17 14
RT8208A
RT8208A
+3VPCU
2
PQ53
PQ53
PR134
PR134
10_6
10_6
CS
PGOOD EN/DEM PAD G1
PR251
PR251 10K_4
10K_4
2
VDD
G0
7
3
1
+5VPCU
PD20
PD20
RB501V-40
RB501V-40
2 1
PC262
PC262 1U/6.3V_4
1U/6.3V_4
8208BST1_1
13
9
VOUT
1
8208VOUT1
PR238 2K/F_4PR238 2K/F_4 PC256 *100P/50V_4PC256 *100P/50V_4
VDDP
PHASE
FB
3
8208RTFB1
DH
BST
TON
DL D1
D0
6
8208RTD10
12
11 16 8 5
PR252
PR252
PR249
PR249
30K/F_4
30K/F_4
8208RTBST1
1_6
1_6
8208RTDH1
8208RTLX2 8208TON1 8208RTDL1 8208RTD11
Vo=0.75(R1+R2)/R2
Calpilano Pro Setting
High
Medium
Low
CTRL1 CTRL0
00
0
1
0
1
11
㎏㎝𤏐
PC122
弭鯱
PC120 PC121=CH733RM8831
+1.8V +/- 5% Countinue current:1.2A
PR239
PR239
232K/F_4
232K/F_4
PR247
PR247 10K/F_4
10K/F_4
6/11 change 15k to 10k
PR245
PR245
10K/F_4
10K/F_4
1.05V
0.95V
0.90V
Vo
1.05
1
0.95
0.9
PC261
PC261
5
G
G
0.1U/25V_4
0.1U/25V_4
4
213
5
G
G
4
213
PQ55
PQ55
RJK03D2D
RJK03D2D
RDSon=5m ohm
PQ24
PQ24 RJK03B9D
RJK03B9D
D
D
S
S
D
D
S
S
RJK03D2D
RJK03D2D
PQ56
PQ56
+VIN+VIN_VGACORE
PL4
PL4
UPB201212T-800Y-N
UPB201212T-800Y-N
PC120
PC120
PQ23
PQ23 RJK03B9D
RJK03B9D
5
D
D
G
G
4
S
S
213
5
D
D
G
G
4
S
S
213
2200P/50V_4
2200P/50V_4
PR241
PR241
2.2_8
2.2_8
PC253
PC253
2200P/50V_4
2200P/50V_4
DGPU_PWR_EN
PC127
PC127
PC128
PC128
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
PL18
PL18
0.36U28A(ETQP4LR36AFC)
0.36U28A(ETQP4LR36AFC)
PR254
PR254 *0_2/S
*0_2/S
2
PQ32
PQ32
PDTC144EU
PDTC144EU
1 3
+VIN
PC122
PC122
4.7U/25V_8
4.7U/25V_8
12
+
+
PR142
PR142 1M_4
1M_4
PR144
PR144 1M_4
1M_4
PC136
PC136
330U_2.5V_7343
330U_2.5V_7343
PC123
PC123
+3V_VGA
2
4.7U/25V_8
4.7U/25V_8
+
+
3
1
PC126
PC126
*4.7U/25V_8
*4.7U/25V_8
600 mils
12
PC134
PC134
330U_2.5V_7343
330U_2.5V_7343
PR143
PR143 *22_8
*22_8
PQ31
PQ31 *DMN601K-7
*DMN601K-7
+12VALW
2
+
+
12
PC135
PC135
3
1
PC117
PC117
+VGACORE +/- 5% Countinue current:19A Peak current:21A
0.1U/25V_4
0.1U/25V_4
OCP minimum 26A
+VGACORE
PC143
PC143
330U_2.5V_7343
330U_2.5V_7343
PR211
PR211 1M_4
1M_4
3VGFX_OND
PQ57
PQ57 DMN601K-7
DMN601K-7
12
PC151
PC151
*0.01U/25V_4
*0.01U/25V_4
3
PQ30
PQ30 ME3424D
ME3424D
0.1U/10V_4
0.1U/10V_4
+3VPCU
65241
PC150
PC150
0.24A
+3V_VGA
7/1 SI Add
0.1U/10V_4
0.1U/10V_4
C907
PC153
PC153
0.1U/10V_4
0.1U/10V_4
PC152
PC152
C907
*10U/6.3V_8
*10U/6.3V_8
*220P/50V_4
*220P/50V_4
64
Peak current:3A
PC247
PC247
10U/6.3V_8
10U/6.3V_8
+1.8V_VGA
PC288
PC288
10U/6.3V_8
10U/6.3V_8
PC248
PC248
0.1U/10V_4
0.1U/10V_4
+VIN [25,31,38,39,41,43,44,45] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,44,45,47] +5VPCU [32,35,38,39,40,41,43,44,45] +1.5VSUS [3,5,11,13,14,43,45] +3V_VGA [16,17,18,19,27] +VGACORE [19] +1.5V_VGA [16,19,20,21,22,23,47] +1.8V_VGA [15,17,19] +12VALW [25,34,37,44,45]
4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
6
Date: Sheet
7
GPU CORE(ISL6264)
GPU CORE(ISL6264)
GPU CORE(ISL6264)
42 47Wednesday, October 13, 2010
42 47Wednesday, October 13, 2010
42 47Wednesday, October 13, 2010
8
1A
1A
1A
of
of
of
VOUT
GND1
ADJ
7
1.2VADJ1.8V
R1
PR218
PR218
100K/F_4
100K/F_4
5
NC
6
8 9
PR226
PR226
VO=(0.8(R1+R2)/R2)
127K/F_4
127K/F_4
R2<120Kohm
3
3
PC258
PC258
1U/6.3V_4
1U/6.3V_4
VIN
PU18
PU18 RT9025
RT9025
2
EN VDD4GND
1
PGOOD
12
PR246
PR246 *0_4/S
*0_4/S
R2
PC259
PC259
PC257
PC257
PR250
DGPU_PR_EN
35,43,47]
D D
DGPU_PR_EN
PR250
20K/F_4
20K/F_4
9/29: MV modify
10U/6.3V_8
10U/6.3V_8
+5VPCU
PC260
PC260
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
PV change
DGPU_PWROK
1
2
1
2
3
4
5
+1.5VSUS
PR89
4
MODE
CS_GND
UGATE
VBST
PHASE
LGATE
PGND
VDDP
DEM
VDD
PR89
*0_4
*0_4
CS
23
21
22
20
19
18 17
15
16
6 14
1116DRVH
1116VBST
1116LL
1116DRVL
1116CS
V5FILT
PC50
PC50
*0.1U/50V_6
*0.1U/50V_6
PC77
PC77
1U/6.3V_4
1U/6.3V_4
PR86
PR86
7.5K/F_4
7.5K/F_4
PC80
PC80
1U/6.3V_4
1U/6.3V_4
+5VPCU
PR66
PR66
PC29
PQ44
PQ44
RJK03B9D
RJK03B9D
G
G
PQ38
PQ38
RJK03D3D
RJK03D3D
4
G
G
4
PC58
PC58
1 2
2_6
2_6
0.1U/25V_4
0.1U/25V_4
PR96
PR96 10_6
10_6
PC29
5
D
D
S
S
213
1U18A(PCMB103T-1R0MS)
1U18A(PCMB103T-1R0MS)
PR210
PR210
5
2.2_8
2.2_8
D
D
S
S
PC224
PC224
213
0.1U/25V_4
0.1U/25V_4
PL8
PL8
2200P/50V_4
2200P/50V_4
PR112
SUSON HWPG
1116TONSET
PC89
PC89
*100P/50V_4
*100P/50V_4
PR112
0_4
0_4
PU4
PU4
VTT24VLDOIN
2
VTTSNS
1
VTTGND
3
GND
25
GND
5
VTTREF
7
NC
10
S3
11
S5
13
PGOOD
12
TON
9
FB
8
VDDQSNS
RT8207AGQW
RT8207AGQW
( VTT/2A )
+0.75V_DDR_VTT
A A
PC61
PC61
PC70
PC70
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
( 3mA )
DDR_VTTREF[5,13,14]
PC82
PC82
0.033U/10V_4
+VIN
PR107
PR107
10K/F_4
10K/F_4
PR105
PR105
10K/F_4
10K/F_4
SUSON[35,45]
HWPG[35,38,39,41,42]
0.033U/10V_4
PR101
PR101
619K/F_4
619K/F_4
PD10
PD10
MAINON[35,38,39,41,44,45]
B B
RB501V-40
RB501V-40
PR106
PR106
100K_4
100K_4
0.1U/10V_4
0.1U/10V_4
PC90
PC90
21
SG & Discrete Only
PC212
PC212
4.7U/25V_8
4.7U/25V_8
+VIN_CHARGER
PC48
PC48
*4.7U/25V_8
*4.7U/25V_8
DB Change
PC205
PC205
2200P/50V_4
2200P/50V_4
12
+
+
PR61
PR61 *0_2/S
*0_2/S
+1.0V +/- 5%
PC66
PC66
330U_2.5V_7343
330U_2.5V_7343
+1.5V +/- 5% Countinue current:6A Peak current:12A OCP minimum 15A
+1.5VSUS+1.5VSUS_1
12
PC57
PC57
6/9: DB2 del PC297, PC298
0.1U/10V_4
0.1U/10V_4
65
Countinue current:1.7A Peak current:3A
C C
+1.5VSUS
+1.0V_VGA
3
PC129
PC129
1U/6.3V_4
1U/6.3V_4
VIN
PU7
PU7 RT9025
RT9025
2
EN VDD4GND
1
PGOOD
R2
PC124
10U/6.3V_8
10U/6.3V_8
+5VPCU
PC137
PC137
1U/6.3V_4
1U/6.3V_4
PC297
PC297
PR139
PR139
0_4
0_4
PR288
PR288
*0_4
*0_4
3
PC124
12
0.1U/10V_4
0.1U/10V_4
PC131
6/9: DB2 modify
PR255
DGPU_PWR_EN[10,35,42]
+3V
12
C442
C442 *0.1U/10V_4
*0.1U/10V_4
10/13 PV2 EMI request
8/16 PV EMI Request
D D
C483
C483
0.1U/10V_4
0.1U/10V_4
12
C481
C481
0.1U/10V_4
0.1U/10V_4
12
PV EMI Request
+3V +5VPCU
12
C439
C439
0.1U/10V_4
0.1U/10V_4
12
C448
C448 *0.1U/10V_4
*0.1U/10V_4
MV EMI Request
1
PR255
10K/F_4
10K/F_4
6/9: DB2 modify
DGPU_PR_EN [35,42,47]
DGPU_PWROK[9,10,35,42,47]
DGPU_PWROK_1[9]
6/9: DB2 modify
+3V [3,7,8,9,10,11,13,14,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,45,46,47] +VIN [25,31,38,39,41,42,44,45] +5VPCU [32,35,38,39,40,41,42,44,45] +1.5VSUS [3,5,11,13,14,45] +1.0V_VGA [15,17,19] +0.75V_DDR_VTT [13,14,45]
2
PC131
*0.33U/6.3V_4
*0.33U/6.3V_4
NC
VOUT
GND1
ADJ
7
1.2VADJ1.0V
R1
PR137
PR137 100K/F_4
100K/F_4
1 2
5
6
8 9
PR138
PR138
25.5K/F_4
25.5K/F_4
VO=(0.8(R1+R2)/R2) R2<120Kohm
PC133
PC133
10U/6.3V_8
10U/6.3V_8
PC132
PC132
10U/6.3V_8
10U/6.3V_8
PC130
PC130
0.1U/10V_4
0.1U/10V_4
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
Date: Sheet
DDR3 (RT8207)
DDR3 (RT8207)
DDR3 (RT8207)
5
43 47Wednesday, October 13, 2010
43 47Wednesday, October 13, 2010
43 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
TOP DC_JACK 65W/90W
6/28: SI modify footprint
CN18
CN18
DC-IN CONN
DC-IN CONN
2 1
PC67
PC67
*0.1U/25V_4
*0.1U/25V_4
PC92
PC92
PR94 1K/F_6PR94 1K/F_6
PC85
PC85
3
4
*0.1U/25V_4
*0.1U/25V_4
*0.1U/25V_4
*0.1U/25V_4
1 3
PQ15
PQ15 PDTC144EU
PDTC144EU
AD_ID
D D
AC_LED_ON
+5VPCU
MBATLED0
C C
VDD VDD
LED2
VDD
LED1 AD_ID
GND
GND
GND GND
PR285 *10K/F_6PR285 *10K/F_6
PR95 1K/F_6PR95 1K/F_6
2
PQ61
PQ61
1
*DMN601K-7
*DMN601K-7
2
PQ14
PQ14
1 3
PDTC144EU
PDTC144EU
7 9 10
PC47
PC47
5 6 8
+12VALW
2
0.1U/25V_4
0.1U/25V_4
PR286
PR286 *1M_4
*1M_4
+VA +5VPCU
6/11: DB2 modify for power request
+VA
+VAD_1
PD9
PD9 BAS316/DG
BAS316/DG
2 1
PR114
PR114 75K/F_4
75K/F_4
AD_AIR[35]
PC141
PC141
0.1U/10V_4
B B
0.1U/10V_4
Place this cap close to EC
PR113
PR113
12.4K/F_4
12.4K/F_4
5/12: Mpdify footprint -SMT for layout request
+VA
PL12
PL12
UPB201212T-800Y-N
UPB201212T-800Y-N
PL11
PL11
UPB201212T-800Y-N
UPB201212T-800Y-N
PC46
PC46
AC_LED_ON# [35]
MBATLED0#
2
3
PR287 *2.43K/F_6PR287 *2.43K/F_6
MBATLED0# [35]
MAINON[35,38,39,41,43,45]
5
0.1U/25V_4
0.1U/25V_4
PQ60
PQ60
*PDTC144EU
*PDTC144EU
13
+5VPCU
PR63
PR63
1M_4
1M_4
PR50
PR50 1M_4
1M_4
P4SMAJ20A
P4SMAJ20A
2 1
PQ39
PQ39 FDMC4435BZ
FDMC4435BZ
+VAD_1
8681_ACAV
PD16
PD16
4
IDEA_G
+VAD
Q2
Q2
1 2 3
ACOK_IN
4
3216 5
+VA
PD7
PD7
2 1
BAS316/DG
BAS316/DG PD19
PD19
2 1
BAS316/DG
BAS316/DG
PD18
PD18
2 1
BAS316/DG
BAS316/DG
+VAD
+VH28
PR48
PR48 220K_4
220K_4
PR51
PR51 220K_4
220K_4
UMT1N
UMT1N
Q1
Q1
PR62
PR62 1K_6
1K_6
4
321 6
PC204
PC204
0.1U/25V_4
0.1U/25V_4
PR15 *100_4PR15 *100_4
PR33 150K/F_4PR33 150K/F_4
PQ5
PQ5
5
+VAD
PR102
PR102
10_8
10_8
PQ19
PQ19 IMD2
IMD2
4
P0603BDG
P0603BDG
4 3
PC14
PC14
0.1U/50V_6
0.1U/50V_6
PR23
PR23
100_4
100_4
PQ1
PQ1
DMN601K-7
DMN601K-7
Do Not add test pad on BATDIS_G signal
+PRWSRC
PQ40
PQ40
PC20
PC20
1
0.22U/25V_8
0.22U/25V_8
BATDIS_G
8681_VDDP
3
1
ACIN[35,45]
PC81
PC81
1U/25V_8
1U/25V_8
PR28
PR28
PR29
PR29
+VAD
100K_4
100K_4
ACOK#
2
100K_4
100K_4
PR55
PR55 *100K_4
*100K_4
PQ2
PQ2
1 3
MBCLK
MBDATA
ACIN
PR52 *0_4/SPR52 *0_4/S
2 1
2
12
MMBT3904-7-F
MMBT3904-7-F
PR119
PR119
100K_4
100K_4
PD5
PD5 BAS316/DG
BAS316/DG
PR64
PR64 1M_4
1M_4
PC51
PC51 1U/6.3V_4
1U/6.3V_4
PR117
PR117
*0_4/S
*0_4/S
PR115
PR115
*0_4/S
*0_4/S
8681_ACAV
PR126
PR126
100K_4
100K_4
DCIN
12
1 2
8681COMP
PR120
PR120 0_4
0_4
ACOK_IN
10
11
9
1
8
PC114
PC114
0.47U/10V_4
0.47U/10V_4
ACIN
SCL
SDL
ACAV
VAC
COMP
PR195
PR195 *0_2/S
*0_2/S
10_4
10_4
RC2512-R010
RC2512-R010
CSIP
PR110
PR110
PC93
PC93
8681IACP
2
2.2U/10V_6
2.2U/10V_6
IACP
GND
17
PR196
PR196
CSIN
8681IACM
12
OZ8681
OZ8681
3
6/30:SI Add
21
8681_VDDA
PR201
PR201 *0_2/S
*0_2/S
PR111
PR111 10_4
10_4
3
IACM
PU6
PU6
IAC
7
8681IAC 8681IAC
12
PC107
PC107
0.01U/50V_4
0.01U/50V_4
8681_VDDA
6
VDDA
PC108
PC108
1U/10V_4
1U/10V_4
PR97
PR97 100_4
100_4
1 2
8681_VDDP
15
VDDP
BST
HDR
LDR
ICHP
ICHM
PR130
PR130
10_4
10_4
LX
+VIN
C905
C905
PV change
*10U/25V_0805
*10U/25V_0805
8681B_2
12
8681HDR
13
8681LX
14
8681LDR
16
5
4
PR104
PR104
2_6
2_6
PC103
PC103
12
8681_VDDP
21
8681B_1
0.1U/50V_6
0.1U/50V_6
1U/6.3V_4
1U/6.3V_4
PC98
PC98
0.01U/50V_4
0.01U/50V_4
PC264
PC264
0.01U/50V_4
0.01U/50V_4
PC83
PC83
12
1U/10V_4
1U/10V_4 PD6
PD6 RB501V-40
RB501V-40 PC84
PC84
8681ICHP 8681ICHM
SYS_I [35]
BATDIS_G
2 1
PQ42
PQ42 AON7410
AON7410
AON7702
AON7702
PD4
PD4
PQ37
PQ37
2
+BATCHG
PL9
PL9
UPB201212T-800Y-N
0.1U/25V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
8681LR
2
PC23
PC23
D/C#_S6A
UPB201212T-800Y-N
PL7
PL7 UPB201212T-800Y-N
UPB201212T-800Y-N
PC45
PC45
0.1U/25V_4
0.1U/25V_4
PC39
PC39
1000P/50V_4
1000P/50V_4
4.7U/25V_8
4.7U/25V_8
PR118 10_4PR118 10_4 PR116 10_4PR116 10_4
PC115
PC115 *10U/6.3V_8
*10U/6.3V_8
MBDATA[35]
MBCLK[35]
PC35
PC35
0.1U/25V_4
0.1U/25V_4
PC41
PC41
4.7U/25V_8
4.7U/25V_8
PR133
PR133
0_4
0_4 PD12
PD12
*BAS316/DG
*BAS316/DG
PC36
PC36
0.1U/25V_4
0.1U/25V_4 PR40
PD3
PD3
PC44
PC44
PR40 330_4
330_4
UDZ5V6B-7-F
UDZ5V6B-7-F
*100P/50V_4
*100P/50V_4
PR39
PR39 330_4
330_4
PR45
PR45 10K_4
10K_4
2 1
2 1
6/9: DB2 modify footprint
PC40
PC40
PC33
PC33
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
8681CSP 8681CSM
21
PQ45
PQ45
P1003EVG
P1003EVG
+VIN
PL2
PL2 UPB201212T-800Y-N
UPB201212T-800Y-N
+VIN_CHARGER
PC207
PC207
4.7U/25V_8
4.7U/25V_8
PL5
PL5
PR10
PR10
2.2_8
2.2_8
PC15
PC15 2200P/50V_4
2200P/50V_4
ACOK_IN
PQ18
PQ18
PDTC144EU
PDTC144EU
1 3
8 7 6 54
PC242
PC242
PC206
PC206
1 2 3
PL1
PL1
P4SMAJ20A
P4SMAJ20A
*UPB201212T-800Y-N
*UPB201212T-800Y-N
52
4
3
1
52
PCMC063T-6R8MN
PCMC063T-6R8MN
4
3
1
1
15.6" DFHD08MR094
17.3" DFHD08MR096
BATT+ SMD SMC
+3VPCU
B_TEMP_MBAT
PD2
PD2
PC28
PC28
UDZ5V6B-7-F
UDZ5V6B-7-F
PC43
PC43
*100P/50V_4
*100P/50V_4
PC210
PC210
4.7U/25V_8
4.7U/25V_8
D/C# [35]
66
CN17
CN17
2
1
2
3
3
10
4
4
9
5
5
7
6
6
PC140
PC140
0.01U/25V_4
0.01U/25V_4
PR199
PR199
0.02/F_1206
0.02/F_1206
1 2
8
TEMP_MBAT [35]
PR197
PR197 *0_2/S
*0_2/S
PD1
PD1
BP02083-B79B5-9H
BP02083-B79B5-9H
DFHD08MR096
DFHD08MR096
bat-bp02083-b6ab5-7h-8p-l-v
bat-bp02083-b6ab5-7h-8p-l-v
PR44
PR44 1K_4
1K_4
0.01U/25V_4
0.01U/25V_4
Place this cap close to EC
PR198
PR198 *0_2/S
*0_2/S
RB501V-40
RB501V-40
1 10 9 7 8
+BATCHG
2 1
PC118
PC118
0.1U/25V_4
0.1U/25V_4
A A
+VA [45] +VH28 [45] +VAD_1 [45] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,42,45,47] +5VPCU [32,35,38,39,40,41,42,43,45] +BATCHG [45]
5
4
3
2
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Charger (BQ24704)
Charger (BQ24704)
Charger (BQ24704)
1
44 47Wednesday, October 13, 2010
44 47Wednesday, October 13, 2010
44 47Wednesday, October 13, 2010
of
of
of
1A
1A
1A
5
+VA
+BATCHG
D D
LAN_POWER[35]
0.24A
+5VSUS
PQ22
PQ22 ME3424D
ME3424D
MAINON
MAINON
PR147
PR147 *0_6/S
*0_6/S
PV change
PC154
PC154
12
PC249
PC249
3
+VIN
1 3
MAINON[35,38,39,41,43,44]
SUSON[35,43]
52
3
1
12
PC121
PC121
2
*10U/6.3V_8
*10U/6.3V_8
PQ26
PQ26 *DMN601K-7
*DMN601K-7
S5_ON[35]
PQ35
PQ35 AON7410
AON7410
4
PC116
PC116
+3VLANVCC
PC173
PC173 2200P/50V_4
2200P/50V_4
+3VPCU
65241
0.1U/10V_4
0.1U/10V_4
PC119
PC119
0.1U/10V_4
0.1U/10V_4
2
PQ21
PQ21
PDTC144EU
PDTC144EU
+VIN
+3VPCU
PC158
PC158
0.1U/10V_4
0.1U/10V_4
12
PC159
PC159
PC165
PC165
0.1U/10V_4
0.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
0.1A
+3VSUS
3
1
C C
4.6A
+3V
+3VSUS
B B
PR132
PR132
*22_8
*22_8
PQ25
PQ25
*DMN601K-7
*DMN601K-7
A A
PR135
PR135
*1M_4
*1M_4
3
2
1
PR136
PR136
*1M_4
*1M_4
5
PD14
PD14
2 1
*RB501V-40
*RB501V-40 PD15
PD15
2 1
G5934DISC1
12
+5VPCU
65241
0.1U/10V_4
0.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
PR122
PR122 1M_4
1M_4
PR128
PR128 1M_4
1M_4
S5_ONG
4
*RB501V-40
*RB501V-40
PC160
PC160
1
2
3
4
5
MAIND3.3V
3
PQ33
PQ33 ME3424D
ME3424D
PC155
PC155
0.1U/10V_4
0.1U/10V_4
+5VS5
2
4
0.1U/25V_4
0.1U/25V_4
ON1
ON2
ON3
ON4
DISC1
PR54
PR54 22_8
22_8
3
PQ9
PQ9 DMN601K-7
DMN601K-7
1
+VAD
PR146
PR146
PR148
PR148
22_6
22_6
*22_6
*22_6
PC164
PC164
0.1U/25V_4
0.1U/25V_4
12
G5934CN
19
20
CN
VIN
DRIVER4
DRIVER3
12
11
SUSD
PC175
PC175 2200P/50V_4
2200P/50V_4
2
PV change
+3VS5
PR127
PR127 22_8
22_8
3
PQ20
PQ20 DMN601K-7
DMN601K-7
1
+3V
5/3: modify for leakage
18
8
G5934DISC4
12
G5934CP
CP
DISC4
2
PR152
PR152 *0_6/S
*0_6/S
+12VALW
+VH28
12
17
DRIVER1
9
LAN_ON
PC166
PC166 2200P/50V_4
2200P/50V_4
PR73
PR73 1M_4
1M_4
S5_OND
3
PQ6
PQ6 DMN601K-7
DMN601K-7
1
PR151
PR151 *0_4/S
*0_4/S
PV change
12
PC167
PC167 1U/35V_6
1U/35V_6
0.47u/25V_6
0.47u/25V_6
16
VOUT
D_CAP
VSENSE
DRIVER2
10
3
12
PC168
PC168
12
PG
REG
DISC3
DISC2
GND
21
PC169
PC169 2200P/50V_4
2200P/50V_4
+3VPCU
65241
PQ34
PQ34 ME3424D
ME3424D
PQ3
PQ3
DMN601K-7
DMN601K-7
PC52
PC52
2200P/50V_4
2200P/50V_4
3
G5934PG
15
PV change
G5934VSENSE
14
+12VALW
13
G5934DISC3
7
G5934DISC2
6
PU8
PU8 P2806
P2806
MAIND
PC142
PC142
0.1U/10V_4
0.1U/10V_4
PC157
PC157
+5VPCU
3
2
1 12
3
12
PR153
PR153 *0_4/S
*0_4/S
PC174
PC174 1U/16V_4
1U/16V_4
PV change
0.67A
+3VLANVCC
12
PC263
PC263
0.1U/10V_4
0.1U/10V_4
12
PC49
PC49
10mA
+5VS5
12
PC37
PC37
0.1U/10V_4
0.1U/10V_4
PR150
PR150 *0_6/S
*0_6/S PR149
PR149 *0_6/S
*0_6/S
*10U/6.3V_8
*10U/6.3V_8
0.1U/10V_4
0.1U/10V_4
PC42
PC42
+VAD_1
4
3
*10U/6.3V_8
*10U/6.3V_8
ACIN [35,44]
PR154
PR154 750K/F_4
750K/F_4
1 2
PR155
PR155 100K/F_4
100K/F_4
1 2
12
12
+5VPCU
52
3
+3VPCU
+5VSUS
+5V
1
65241
PQ17
PQ17 ME3424D
ME3424D
PQ36
PQ36 AON7410
AON7410
PC172
PC172
12
PC101
PC101
12
PC109
PC109
PC170
PC170
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
6A
+5V
12
0.17A
+3VS5
12
2
+VA [44] +5V [7,8,11,19,25,26,27,29,30,32,34,36,37] +VIN [25,31,38,39,41,42,43,44] +1.5V [5,11,13,36] +1.8V [5,8,11,39] +3VS5 [3,7,8,9,10,11] +5VS5 [11] +VH28 [44] +VAD_1 [44] +3VSUS [32,35,36,42] +5VSUS [25,38] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,42,44,47] +5VPCU [32,35,38,39,40,41,42,43,44] +12VALW [25,34,37,42,44] +BATCHG [44] +1.5VSUS [3,5,11,13,14,43] +3VLANVCC [33] +0.75V_DDR_VTT [13,14,43]
4/20 Del C982,C992 for dummy net
+5VSUS +1.5VSUS +1.5VSUS
C14
C454
C454 *0.1U/10V_4
*0.1U/10V_4
C14 *0.1U/10V_4
*0.1U/10V_4
PV EMI Request
5/13: reserve
+1.5VSUS
+1.5V +1.8V
3
2
1
MAIN_ONG
PC171
PC171
*10U/6.3V_8
*10U/6.3V_8
65241
PC60
PQ12
PQ12 *ME3424D
*ME3424D
PC64
PC64 *0.1U/10V_4
*0.1U/10V_4
MAIND [5]
PC60
0.5A
*0.1U/10V_4
*0.1U/10V_4
+1.5V
12
PC74
PC74
*10U/6.3V_8
*10U/6.3V_8
3
+VIN
PR84
PR84 1M_4
1M_4
3
PQ10
PQ10 DMN601K-7
DMN601K-7
2
PR83
PR83 1M_4
1M_4
1
6/29: SI add for EMI
+5VPCU+5VPCU+5VPCU+3VS5+VIN
C912
PC113
PC113
*10U/6.3V_8
*10U/6.3V_8
C912
8/16 : PV add for EMI
C899
C899
C900
C900
*0.1U/10V_4
*0.1U/10V_4
*0.1U/50V_6
*0.1U/50V_6
+5V +3VLANVCC
12
C910
C910
C908
C908
*0.1U/10V_4
*0.1U/10V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
2
C901
C901
C909
C909
*0.1U/10V_4
*0.1U/10V_4
C911
C911
12
C902
C902
C903
C903
*0.1U/10V_4
*0.1U/10V_4
*1500P/50V_4
*1500P/50V_4
7/1 : SI add for EMI
*220P/50V_4
*220P/50V_4
1
C13
C13 *0.1U/10V_4
*0.1U/10V_4
+0.75V_DDR_VTT
PR248
PR69
PR67
PR67 *22_8
*22_8
PQ4
PQ4 *DMN601K-7
*DMN601K-7
PR69 *22_8
*22_8
3
PQ11
PQ11 *DMN601K-7
*DMN601K-7
2
1
MAIN_ONG [3,5]
+1.5VSUS
C904
C904 *100P/50V_4
*100P/50V_4
1 2
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Dis-charge IC (P2806)
Dis-charge IC (P2806)
Dis-charge IC (P2806)
PR248 22_8
22_8
3
PQ51
PQ51 DMN601K-7
DMN601K-7
2
1
45 47Wednesday, October 13, 2010
45 47Wednesday, October 13, 2010
1
45 47Wednesday, October 13, 2010
67
of
of
of
1A
1A
1A
5
4
3
2
1
68
D D
PC179
PC179
*0.1U/10V_4
PR13
PR13 *45.3K/F_4
*45.3K/F_4
IMONAGND
IMONAGND
*0.1U/10V_4
PR164
PR164 *45.3K/F_4
*45.3K/F_4
4 3
IMONAGND
*0.1U/10V_4
*0.1U/10V_4
IMONAGNDIMONAGND
4 3
PR85
PR85 *30.1K/F_4
*30.1K/F_4
IMONAGND
-
-
+
+
*G1214AT11U
*G1214AT11U
5 2
PC177
PC177 *0.1U/10V_4
*0.1U/10V_4
PC56
PC56
PR59
PR59 *30.1K/F_4
*30.1K/F_4
-
-
+
+
5 2
PC54
PC54 *0.1U/10V_4
*0.1U/10V_4
1
PU10
PU10
1
PU3
PU3
*G1214AT11U
*G1214AT11U
GFX_VR_ICC [35]GFX_VR_VCC [35]
PR68
IMONAGND
PR74
PR74 *49.9K/F_4
VSS_SENSE[5,40]
VCC_SENSE[5,40]
C C
B B
*49.9K/F_4
PC63
PC63
*390P/50V_4
*390P/50V_4
PR82
PR82 *49.9K/F_4
*49.9K/F_4
VSS_AXG_SENSE[5,40]
VCC_AXG_SENSE[5,40]
PR182
PR182 *49.9K/F_4
*49.9K/F_4
PR183
PR183 *49.9K/F_4
*49.9K/F_4
PC73
PC73
*390P/50V_4
*390P/50V_4
IMONAGND
IMONAGND
PR68 *49.9K/F_4
*49.9K/F_4
IMONAGND IMONAGND
PC55
PC55 *1000P/50V_4
*1000P/50V_4
PR87
PR87 *49.9K/F_4
*49.9K/F_4
IMONAGND
4 3
PR184
PR184
*100K/F_4
*100K/F_4
IMONAGND
VCORE_IMON[40]
PR3
PR3
*0_4/S
*0_4/S
IMONAGND
IMONAGND1316AGND
PR4
PR4 *7.32K/F_4
*7.32K/F_4
PC1
PC1
IMONAGND
VGT_IMON[40]
-
-
4
1
+
+
PU2
PU2
3
*G1214AT11U
*G1214AT11U
5 2
+3V +3V
PC62
PC62 *0.1U/10V_4
*0.1U/10V_4
IMONAGND
PR163
PR163
*100K/F_4
*100K/F_4
-
-
1
+
+
PU9
PU9
*G1214AT11U
*G1214AT11U
5 2
+3V +3V
PC194
PC194 *0.1U/10V_4
*0.1U/10V_4
CPU_VCC [35] CPU_ICC [35]
*0.1U/10V_4
*0.1U/10V_4
PR5
PR5 *15K/F_4
*15K/F_4
PR169
PR169 *15K/F_4
*15K/F_4
PC10
PC10
*0.1U/10V_4
*0.1U/10V_4
PR72
PR72 *10K/F_4
*10K/F_4
PR71
PR71 *10K/F_4
*10K/F_4 PC69
PC69
*0.1U/10V_4
*0.1U/10V_4
A A
Vender EON Winbond
Socket
5
4
P/N
Size 128KB
AKE37ZN0Q01 (EN25F40-100HIP)
512KB 128KB
AKE35FN0N00 (W25X10BVSNIG) AKE37FN0N01 (W25X40BVSSIG)512KB DG008000031
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
1
IMON
IMON
IMON
46 47Wednesday, October 13, 2010
46 47Wednesday, October 13, 2010
46 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
5
4
3
2
BACO_EN [42] +1.5V_VGA [16,19,20,21,22,23] +3VPCU [7,8,25,32,34,35,36,37,38,39,40,42,44,45]
1
69
D D
1.5VVGA_SENSE-
9/29: MV modify
GNDC2GNDC1GND
C3
PR272 54.9K/F_4PR272 54.9K/F_4
VDES_1.5VVGA
A3
VDES
GNDE1GNDE2GND
PC284
PC284
2200P/50V_4
2200P/50V_4
VSENSE+
E3
OE_1.5VVGA
PC287
PC287 *0.47U/6.3V_4
*0.47U/6.3V_4
A5
OE
D1
VX
D2
VX
D3
VX
D4
VX
D5
VX
A4
PR268 5.11K/F_4PR268 5.11K/F_4
PR269 44.2K/F_4PR269 44.2K/F_4
R_SEL_1.5VVGA
BIAS_1.5VVGA
A1
AVDD
B3
BIAS
A2
R_SEL
PU21
PU21
VT357
VT357
AGND
B1
PR273
PR273 *0_4/S
PV change
PC275
PC275
PC279
PC279
0.1U/10V_4
0.1U/10V_4
*0_4/S
PR270
PR270
34.8K/F_4
34.8K/F_4
PR264
PR264 *0_4/S
*0_4/S
+3V_1.5VGA
PC277
PC277
0.01U/16V_4
0.01U/16V_4
IRIPL_1.5VVGA
STAT_1.5VVGA
12
PC272
PC272
10U/6.3V_8
10U/6.3V_8
B2
IRIPL
B4
TEMP
B5
STAT
E5
VDD
C5
VDD
C4
VDD
E4
VDD
PR266
PR266 10_6
10_6
AVDD_1.5VGA
10U/6.3V_8
10U/6.3V_8
PC281
PC281
0.22U/6.3V_4
0.22U/6.3V_4
C C
DGPU_PWROK[9,10,35,42,43]
PJP2
PJP2
*POWER_JP/S
*POWER_JP/S
12
+3VPCU
B B
PR271 8.2K_4PR271 8.2K_4
R87*0_4 R87*0_4
LX_1.5VVGA
0.22uH_PCMC063T-R22MN
0.22uH_PCMC063T-R22MN
VSENSE_1.5VVGA
1.5VVGA_SENSE-
BACO_EN
PL20
PL20
PR262
PR262
*0_2/S
*0_2/S
PR263
PR263
*0_2/S
*0_2/S
C35
C35
*0.1U/10V_4
*0.1U/10V_4
4
*TC7SH08FU
*TC7SH08FU
DGPU_PR_EN [35,42,43]
+3V
2 1
U5
U5
3 5
PC273
PC273
10U/6.3V_8
10U/6.3V_8
PC278
PC278
22U/6.3V_8
22U/6.3V_8
DGPU_PR_EN [35,42,43] PX_MODE [19]
PC282
PC282
PC269
PC269
22U/6.3V_8
22U/6.3V_8
6800P/50V_4
6800P/50V_4
+1.5V_VGA Volt +/- 5% Countinue current:8A Peak current: 12A OCP minimum: 16A
+1.5V_VGA
+1.5V_VGA_S1
PC270
PC270
0.1U/10V_4
0.1U/10V_4
PJP1
PJP1 *POWER_JP/S
*POWER_JP/S
1 2
A A
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
RTQLGEV"<"NZ517*Jwtqp"Tkxgt+
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Swcpvc"Eqorwvgt"Kpe0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
1
47 47Wednesday, October 13, 2010
47 47Wednesday, October 13, 2010
47 47Wednesday, October 13, 2010
1A
1A
1A
of
of
of
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