1
2
3
4
5
6
7
8
Intel Skylake-U Platform Block Diagram (Windows)
01
DDR4 Memory Down MA
A A
DDR4 SO-DIMM X1 MB
1866-2133 MT/s
PCIE Gen3*4
AMD dGPU
R16M-M1-30
S3
eDP Conn(30pin)
FHD support
HD Camera
eDP 2 Lanes
USB2.0 (480Mb/s)
DMIC
HDMI Conn
HDD
B B
ODD
HDMI (1.65Gb/s)
SATA Gen3 (6Gb/s)
SATA Gen3 (6Gb/s)
Skylake-U SoC
SATA Gen3 (6Gb/s)
M.2 NGFF SSD
PCIE Gen3 * 4
Intel
15W
BGA 1356
Size : 42x24(mm)
HP/Mic Audio
HDA
USB3.0 (5Gb/s)*2
USB2.0 (480Mb/s)*2
PCIE Gen2 *1(5Gb/s)
USB2.0 (480Mb/s)
USB2.0 (480Mb/s)
PCIE Gen2 (5Gb/s)
DP 4 Lanes
1G Ethernet
RTL8111H
Card Reader
RTS5170
4-in-1(SD/SDHC/SDXC/MMC) CONN
NGFF Slot WLAN+BT
Module
M.2 2230
DP SW
PS8338B
VRAM DDR3L
2Gb/4Gb *4
USB 3.0 Port*2
DP to VGA
RTD2166-CG
Combo Jack
AUDIO CODEC
Speaker L/R
ALC3240
USB3.0 (5Gb/s)
USB2.0 (480Mb/s)
Lenovo
Onelink+
Connector
C C
USB2.0 (480Mb/s)
Finger print Sensor
USB2.0 (480Mb/s)
SPI
SPI Flash(16MB)
W25Q128FWSSIG
USB2.0 (480Mb/s)
AOU5 Charger
TPS2546RTER
(Cable
Docking)
USB 2.0 Port*2
24MHz
SMBus
32.768KHz
Synaptics
4
T/P
PS/2
Hall Sensor
EM-1791
5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
6
7
Date: Sheet of
PROJECT :
RV310 Block Diagram
RV310 Block Diagram
RV310 Block Diagram
LV6
LV6
LV6
8
1A
1A
1A
1 61 Friday, March 11, 2016
1 61 Friday, March 11, 2016
1 61 Friday, March 11, 2016
TPM 1.2
ST33HTPM2E32AAB9
K/B
D D
Thermal Sensor
( 1local +2 remote)
W83773G
SCAN MATRIX
SMBus
WRST#
CPU PTC Circuit
Place near CPU
1
2
3
LPC
EC(ITE)
IT8886
Battery Charger
5
IN_D2# {26}
D D
HDMI
DOCK DP
+VCCIO
C C
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
IN_D2 {26}
IN_D1# {26}
IN_D1 {26}
IN_D0# {26}
IN_D0 {26}
IN_CLK# {26}
IN_CLK {26}
DOCK_DDI2_TXN0 {40}
DOCK_DDI2_TXP0 {40}
DOCK_DDI2_TXN1 {40}
DOCK_DDI2_TXP1 {40}
DOCK_DDI2_TXN2 {40}
DOCK_DDI2_TXP2 {40}
DOCK_DDI2_TXN3 {40}
DOCK_DDI2_TXP3 {40}
SDVO_CLK {26}
SDVO_DATA {26}
R175 24.9/F_4
+3V
TP7
4
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
DOCK_DDI2_TXN0
DOCK_DDI2_TXP0
DOCK_DDI2_TXN1
DOCK_DDI2_TXP1
DOCK_DDI2_TXN2
DOCK_DDI2_TXP2
DOCK_DDI2_TXN3
DOCK_DDI2_TXP3
R203 2.2K_4
EDP_RCOMP
U38A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
3
?
Need apply PN
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
? 1 OF 20
INT_EDP_TXN0
C47
INT_EDP_TXP0
C46
INT_EDP_TXN1
D46
INT_EDP_TXP1
C45
A45
B45
A47
B47
INT_EDP_AUXN
E45
INT_EDP_AUXP
F45
B52
G50
F50
DOCK_DDI2_AUXN
E48
DOCK_DDI2_AUXP
F48
G46
F46
PCH_HDMI_HPD
L9
PCH_DOCK_DP_HPD
L7
L6
N9
EDP_HPD
L10
PCH_LVDS_BLON
R12
PCH_DPST_PWM
R11
PCH_LCDVCC_EN
U13
2
INT_EDP_TXN0 {25}
INT_EDP_TXP0 {25}
INT_EDP_TXN1 {25}
INT_EDP_TXP1 {25}
INT_EDP_AUXN {25}
INT_EDP_AUXP {25}
DOCK_DDI2_AUXN {40}
DOCK_DDI2_AUXP {40}
PCH_HDMI_HPD {26}
PCH_DOCK_DP_HPD {40}
EDP_HPD {25}
PCH_LVDS_BLON {25}
PCH_DPST_PWM {25}
PCH_LCDVCC_EN {25}
1
+3V {4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+VCCIO {4,6,53,56}
+VCCSTPLL {4,5,6,9,45,53,56}
Reserve EDP_HPD opposites circuit!
+3V
R200
*10K_4
R199
100K_4
+VCCSTPLL
+VCCSTPLL
H_PROCHOT#
PM_THRMTRIP#_R
EDP_HPD
R590 1K_4
R583 1K_4
02
B2A
U38D
EC_PECI {36}
TP34
TP36
R601 *51_4
H_PROCHOT# {36,42,43,45}
PM_THRMTRIP# {36}
B B
H_PROCHOT#
+VCCIO
R596 499/F_4
R762 100/F_4
B2A
R278 49.9/F_4
R277 49.9/F_4
R620 GT3@49.9/F_4
R626 GT3@49.9/F_4
CATERR#
EC_PECI
PROCHOT#
PM_THRMTRIP#_R
TP49
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKL_ULT
REV = 1
SKL_ULT
CPU MISC
4 OF 20
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
PDC
?
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCK0
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_TCK1
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_TCK0
TP35
XDP_TMS
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
EC_PECI
R576 *51_4
R588 51_4
R581
R602 51_4
R603 *51_4
R792 KBY@330_4
*51_4
+VCCIO
PLACE NEAR CPU
Need apply PN
?
D3A
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 1/15 eDP/DDI/MISC
SKYLAKE 1/15 eDP/DDI/MISC
SKYLAKE 1/15 eDP/DDI/MISC
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
2 61 Friday, March 11, 2016
2 61 Friday, March 11, 2016
1
2 61 Friday, March 11, 2016
1A
5
4
3
2
1
SkyLake ULT Processor (DDR4)
Interleave
D D
?
U38B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
C C
B B
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
SKL_ULT
REV = 1
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
NIL-DDR CH A
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
M_A_DQSN0
AM70
M_A_DQSP0
AM69
M_A_DQSN1
AT69
M_A_DQSP1
AT70
M_B_DQSN0
AH66
M_B_DQSP0
AH65
M_B_DQSN1
AG69
M_B_DQSP1
AG70
M_A_DQSN2
BA64
M_A_DQSP2
AY64
M_A_DQSN3
AY60
M_A_DQSP3
BA60
M_B_DQSN2
AR66
M_B_DQSP2
AR65
M_B_DQSN3
AR61
M_B_DQSP3
AR60
M_A_ALERT#
AW50
M_A_PARITY M_B_ALERT#
AT52
AY67
AY68
BA67
AW67
?
M_A_CLKN0 {16}
M_A_CLKP0 {16}
TP21
TP16
M_A_CKE0 {16}
TP20
M_A_CS#0 {16}
TP18
M_A_ODT0_CPU {16}
TP12
M_A_A5 {16}
M_A_A9 {16}
M_A_A6 {16}
M_A_A8 {16}
M_A_A7 {16}
M_A_BG#0 {16}
M_A_A12 {16}
M_A_A11 {16}
M_A_ACT# {16}
TP52
M_A_A13 {16}
M_A_CAS# {16}
M_A_WE# {16}
M_A_RAS# {16}
M_A_BA#0 {16}
M_A_A2 {16}
M_A_BA#1 {16}
M_A_A10 {16}
M_A_A1 {16}
M_A_A0 {16}
M_A_A3 {16}
M_A_A4 {16}
M_A_ALERT# {16}
M_A_PARITY {16}
SM_VREF_CA {16}
TP55
SM_VREF_DQ1 {17}
DDR_PG_CTRL {17}
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51 M_B_DQSN6
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U38C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL_ULT
REV = 1
?
SKL_ULT
Need apply PN
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
NIL-DDR CH B
3 OF 20
PDC
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
M_A_DQSN[7:0] {16}
M_A_DQSP[7:0] {16}
M_A_DQ[63:0] {16}
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
M_A_DQSN4
BA38
M_A_DQSP4
AY38
M_A_DQSN5
AY34
M_A_DQSP5
BA34
M_B_DQSN4
AT38
M_B_DQSP4
AR38
M_B_DQSN5
AT32
M_B_DQSP5
AR32
M_A_DQSN6
BA30
M_A_DQSP6
AY30
M_A_DQSN7
AY26
M_A_DQSP7
BA26
AR25
M_B_DQSP6
AR27
M_B_DQSN7
AR22
M_B_DQSP7
AR21
AN43
M_B_PARITY
AP43
SM_DRAMRST#
AT13
SM_RCOMP_0
AR18
SM_RCOMP_1
AT18
SM_RCOMP_2
AU18
?
M_B_DQSN[7:0] {17}
M_B_DQSP[7:0] {17}
M_B_DQ[63:0] {17}
+1.2V_SUS {6,16,17,50}
M_B_CLKN0 {17}
M_B_CLKN1 {17}
M_B_CLKP0 {17}
M_B_CLKP1 {17}
M_B_CKE0 {17}
M_B_CKE1 {17}
M_B_CS#0 {17}
M_B_CS#1 {17}
M_B_ODT0_CPU {17}
M_B_ODT1_CPU {17}
M_B_A5 {17}
M_B_A9 {17}
M_B_A6 {17}
M_B_A8 {17}
M_B_A7 {17}
M_B_BG#0 {17}
M_B_A12 {17}
M_B_A11 {17}
M_B_ACT# {17}
M_B_BG#1 {17}
M_B_A13 {17}
M_B_CAS# {17}
M_B_WE# {17}
M_B_RAS# {17}
M_B_BA#0 {17}
M_B_A2 {17}
M_B_BA#1 {17}
M_B_A10 {17}
M_B_A1 {17}
M_B_A0 {17}
M_B_A3 {17}
M_B_A4 {17}
M_B_ALERT# {17}
M_B_PARITY {17}
R274 121/F_4
R276 80.6/F_4
R275 100/F_4
+1.2V_SUS
R358
470/F_4
03
DDR4_DRAMRST# {16,17}
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
SKYLAKE 2/15(DDR4 I/F)
SKYLAKE 2/15(DDR4 I/F)
SKYLAKE 2/15(DDR4 I/F)
LV6
LV6
LV6
3 61 Friday, March 11, 2016
3 61 Friday, March 11, 2016
1
3 61 Friday, March 11, 2016
1A
1A
1A
5
D D
PLTRST#
SYS_RESET#
RSMRST# {36}
EC_PWROK {29,36,37}
PCIE_WAKE# {19,30,33}
RSMRST#
C C
SYS_RESET#
PLTRST#
EC13
*E@220P/50V_4
R595 10K_4
C276 *0.1U/16V/X7R_4
R295 *0_4_S
TP50 R692 10K_4
B2A
TP15
EC9
*E@220P/50V_4
EC38
*E@220P/50V_4
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
EC_PWROK
DSWROK_EC_R
SUSWARN#
SUSACK#
PCIE_WAKE#
GPD2
4
?
U38K
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT
REV = 1
SKL_ULT
SYSTEM POWER MANAGEMENT
11 OF 20
3
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
2
+3V_DEEP_SUS {10,11,14,15,17}
+VCCSTPLL {2,5,6,9,45,53,56}
+3V_RTC_2 {13,15}
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
PCH_SLP_S0#
SLP_S5#
SLP_LAN#
DNBSWON#
AC_PRESENT_EC
PM_BATLOW_N_EC
INTRUDER#_R
EXT_PWR_GATE#
PCH_VRALERT#
R287 1M_4
PCH_SLP_S0# {36}
SUSB# {18,36}
SUSC# {36}
TP53
TP51
SLP_WLAN# {33}
TP13
DNBSWON# {36}
AC_PRESENT_EC {36}
PM_BATLOW_N_EC {36}
+3V_RTC_2
C3A
B2A
?
PCH Pull-high/low(CLG)
SUSWARN#
SUSACK#
PM_BATLOW_N_EC
GPD2
B2A
PCIE_WAKE#
AC_PRESENT_EC
DNBSWON#
SYS_RESET#
PCH_VRALERT#
B2A
RSMRST#
DSWROK_EC_R
EXT_PWR_GATE#
R297 10K_4
R293 *10K_4
R302 10K_4
R763 10K_4
R687 10K_4
R780 *10K_4
R196 10K_4
R764 10K_4
R688 10K_4
R288 100K_4
R251 1K_4
+3VS5 {10,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56}
+3V {2,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+5VS5 {34,35,38,39,41,42,44,45,48,50,51,53,54,56}
+VCCIO {2,6,53,56}
+3V_DEEP_SUS
+3VS5
+3V
1
04
C3A
+3VS5
RSMRST#
B B
R285 *0_4_S
PLTRST# {18,28,30,31,33,36,37}
PLTRST#(CLG)
SYS_PWROK {36}
R189
100K_4
A A
System PWR_OK(CLG)
5
DSWROK_EC_R
PLTRST#
R190 *0_4
+VCCIO +3VS5 +5VS5
+VCCIO
+VCCSTPLL
R591
1K_4
R437
100K_4
HWPG {36,49,50}
EC_PWROK SYS_PWROK
R192
100K_4
4
HWPG
2 1
D17 DB2J40600L
H_VCCST_PWRGD_R
C688
*10P/50V_4
3
R582
*1K_4
R597 60.4_4
H_VCCST_PWRGD
R569
15K_4
+1.0V_PWRGD_G1
C665
0.1U/16V/X7R_4
2
R565
100K_4
R559
100K_4
+1.0V_PWRGD_G2
2
Q38
METR3904-G
1 3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R558
10K_4
3
2
1
SKYLAKE 3/15(PowerManger)
SKYLAKE 3/15(PowerManger)
SKYLAKE 3/15(PowerManger)
HWPG
Q39
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
R557
100K_4
1
LV6
LV6
LV6
1A
1A
4 61 Friday, March 11, 2016
4 61 Friday, March 11, 2016
4 61 Friday, March 11, 2016
1A
5
Under CPU
C274
C256
C366
10U/6.3V_4
C333
22U/6.3V/X5R_6
C245
GT3@10U/6.3V_4
C661
C670
C329
22U/6.3V/X5R_6
C353
10U/6.3V_4
C158
22U/6.3V/X5R_6
Close CPU
C660
47U/6.3V_8
C666
10U/6.3V_4
22U/6.3V/X5R_6
47U/6.3V_8
10U/6.3V_4
10U/6.3V_4
10U/6.3V_4
C337
22U/6.3V/X5R_6
C673
47U/6.3V_8
C181
10U/6.3V_4
22U/6.3V/X5R_6
47U/6.3V_8
10U/6.3V_4
D D
+1.8V_DEEP_SUS +1.8V_PRIM
R163 GT3@0_6
C C
B B
C255
GT3@10U/6.3V_4
+VCC_CORE
+VCC_CORE
C317
C365
10U/6.3V_4
C150
22U/6.3V/X5R_6
+VCCOPC
+VCCOPC_SRC {49}
681_AGND {49}
C667
C169
C296
22U/6.3V/X5R_6
C367
10U/6.3V_4
C154
22U/6.3V/X5R_6
C657
47U/6.3V_8
C675
10U/6.3V_4
4
C292
22U/6.3V/X5R_6
C188
10U/6.3V_4
C319
22U/6.3V/X5R_6
+VCCOPC_SRC
681_AGND
+VCCOPC_SRC
681_AGND
C663
47U/6.3V_8
C656
10U/6.3V_4
C325
22U/6.3V/X5R_6
C207
10U/6.3V_4
R244 GT3@100/F_4
R246 GT3@0_4
R239 GT3@0_4
R237 GT3@100/F_4
R247 GT3@0_4
R248 GT3@0_4
C678
47U/6.3V_8
C671
10U/6.3V_4
+VCCOPC
+1.8V_PRIM
+VCCEOPIO
C684
47U/6.3V_8
C677
10U/6.3V_4
C270
22U/6.3V/X5R_6
3
?
SKL_ULT
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
G30
K32
P62
V62
H63
G61
U38L
CPU POWER 1 OF 4
VCC_A30
VCC_A34
33A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT
REV = 1
+VCCEOPIO
+VCCOPC
VCC_SENSE
VSS_SENSE
VIDALERT#
VCCSTG_G20
12 OF 20
C340 GT3@22U/6.3V/X5R_6
C322 GT3@1U/6.3V_4X
C323 GT3@1U/6.3V_4X
C324 GT3@22U/6.3V/X5R_6
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VIDSCK
VIDSOUT
PDC
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
?
+VCC_CORE +VCC_CORE
C705
1U/6.3V_4X
C253
1U/6.3V_4X
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_CPU_SVIDALRT#
VR_SVID_CLK_R
C235
1U/6.3V_4X
C195
1U/6.3V_4X
C194
1U/6.3V_4X
C208
1U/6.3V_4X C246
2
C344
C229
1U/6.3V_4X
1U/6.3V_4X
C383
C222
1U/6.3V_4X
1U/6.3V_4X
R187 100/F_4
R188 100/F_4
R599 220/F_4
R600 *0_4_S
C368
1U/6.3V_4X
C362
1U/6.3V_4X
+VCCSTPLL
+VCCSTPLL
R587
*54.9/F_4
+VCCSTPLL
R579
56.2/F_4
C689
*0.1U/16V/X7R_4
Under CPU
C219
1U/6.3V_4X
C261
1U/6.3V_4X
C819
1U/6.3V_4X
+VCC_CORE {46}
+VCCSTG {6}
+VCCSTPLL {2,4,6,9,45,53,56}
+VCCOPC {49}
C241
1U/6.3V_4X
+VCC_CORE
VCC_SENSE {45}
VSS_SENSE {45}
+VCCSTG
B2A
SVID ALERT
VR_SVID_ALERT# {45}
SVID CLK
VR_SVID_CLK {45}
1
+VCCSTPLL
05
100- ±1%
pull-up to VCC
near processor.
C682
0.1U/16V/X7R_4
R577
100/F_4
H_CPU_SVIDDAT
A A
5
4
3
2
R578 *0_4_S
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SVID DATA
VR_SVID_DATA {45}
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SKYLAKE 4/15 (POWER-1)
SKYLAKE 4/15 (POWER-1)
SKYLAKE 4/15 (POWER-1)
1
LV6
LV6
LV6
1A
1A
5 61 Friday, March 11, 2016
5 61 Friday, March 11, 2016
5 61 Friday, March 11, 2016
1A
5
D D
Under CPU
C409
C413
10U/6.3V_4
10U/6.3V_4
Close CPU
C431
C424
10U/6.3V_4
10U/6.3V_4
C C
+VCCIO
C420
10U/6.3V_4
R158 *0_4_S
R280 *0_6_S
R149 *0_6_S
C417
10U/6.3V_4
+VCCSTG
+VCCPLL_OC +1.2V_SUS
+VCCPLL +VCCSTPLL
+1.2V_SUS
C406
1U/6.3V_4X
+1.2V_SUS
*1U/6.3V_4X
C433
1U/6.3V_4X
C412
1U/6.3V_4X
Close CPU Under CPU
C387
10U/6.3V_4
4
C416
1U/6.3V_4X
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
SKL_ULT
U38N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
0.12A
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL_ULT
REV = 1
2A
0.04A
0.12A
14 OF 20
?
VCCIO
3.1A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
4.5A
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
3
+VCCSA
Under CPU
C371
1U/6.3V_4X
C299
1U/6.3V_4X
C312
10U/6.3V_4
C348
1U/6.3V_4X
C668
1U/6.3V_4X
C239
10U/6.3V_4
C350
1U/6.3V_4X
C343
1U/6.3V_4X
C330
10U/6.3V_4
VSSSA_SENSE {45}
VCCSA_SENSE {45}
+VCCSA
C351
10U/6.3V_4
C662
1U/6.3V_4X
C352
10U/6.3V_4
AK28
AK30
AL30
AL42
C349
AM28
1U/6.3V_4X
AM30
AM42
AK23
AK25
G23
G25
G27
C237
G28
1U/6.3V_4X
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
R153 100/F_4
H21
H20
R154 100/F_4
?
C369
10U/6.3V_4
C658
1U/6.3V_4X C407
C659
10U/6.3V_4
2
C382
1U/6.3V_4X
C332
1U/6.3V_4X
C275
10U/6.3V_4
Close CPU
C347
1U/6.3V_4X
Under CPU
C290
10U/6.3V_4
Close CPU
C370
1U/6.3V_4X
C318
10U/6.3V_4
+VCCIO
C346
1U/6.3V_4X
C321
10U/6.3V_4
+VCCIO {2,4,53,56}
+VCCSA {48}
+1.2V_SUS {3,16,17,50}
+VCCSTPLL {2,4,5,9,45,53,56}
+VCCSTG {5}
C238
10U/6.3V_4
C262
10U/6.3V_4
1
C669
10U/6.3V_4
C297
10U/6.3V_4
06
Close CPU Under CPU
+VCCSTG +VCCPLL_OC +VCCPLL +VCCSTPLL
B B
C203
1U/6.3V_4X
C379
1U/6.3V_4X
C187
1U/6.3V_4X
C293
1U/6.3V_4X
Close A18 Ball
+VCCSTPLL
C186
*1U/6.3V_4X
A A
5
C182
*22U/6.3V/X5R_6
+1.2V_SUS
C432
10U/6.3V/X5R_6X
C428
10U/6.3V/X5R_6X
4
C425
10U/6.3V/X5R_6X
C427
10U/6.3V/X5R_6X
C429
10U/6.3V/X5R_6X
Close to CPU
C430
10U/6.3V/X5R_6X
C386
1U/6.3V_4X
C421
1U/6.3V_4X
3
C408
1U/6.3V_4X
C414
1U/6.3V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 5/15 (POWER-2)
SKYLAKE 5/15 (POWER-2)
SKYLAKE 5/15 (POWER-2)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
6 61 Friday, March 11, 2016
6 61 Friday, March 11, 2016
1
6 61 Friday, March 11, 2016
1A
5
4
3
2
1
+VCCGT {47}
?
SKL_ULT
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
U38M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL_ULT
REV = 1
31A
PDC
13 OF 20
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
+VCCGT
C729
10U/6.3V_4
C750
10U/6.3V_4
C724
1U/6.3V_4X
C304
1U/6.3V_4X
+VCCGT
C726
10U/6.3V_4
C307
10U/6.3V_4
C752
1U/6.3V_4X
C302
1U/6.3V_4X
C306
C373
1U/6.3V_4X
C374
1U/6.3V_4X
C309
10U/6.3V_4
C372
10U/6.3V_4
C301
1U/6.3V_4X
C378
1U/6.3V_4X
VCCGT_SENSE {45}
VSSGT_SENSE {45}
10U/6.3V_4
C376
10U/6.3V_4
C375
1U/6.3V_4X
C308
1U/6.3V_4X
D D
C C
B B
C377
10U/6.3V_4
C731
10U/6.3V_4
C303
1U/6.3V_4X
C305
1U/6.3V_4X
R634 100/F_4
R642 100/F_4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
+VCCGT
Close CPU Under CPU
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
?
C758
47U/6.3V_8
C171
22U/6.3V/X5R_6
C338
22U/6.3V/X5R_6
+VCCGT
C743
GT3@22U/6.3V/X5R_6
C744
GT3@22U/6.3V/X5R_6
C277
GT3@10U/6.3V_4
C240
GT3@10U/6.3V_4
C759
47U/6.3V_8
C185
22U/6.3V/X5R_6
C342
22U/6.3V/X5R_6
C180
GT3@22U/6.3V/X5R_6
C209
GT3@22U/6.3V/X5R_6
C278
GT3@10U/6.3V_4
C674
GT3@10U/6.3V_4
C760
47U/6.3V_8
C298
22U/6.3V/X5R_6
C751
22U/6.3V/X5R_6
C761
47U/6.3V_8
C331
C316
22U/6.3V/X5R_6
22U/6.3V/X5R_6
C749
22U/6.3V/X5R_6
C193
GT3@22U/6.3V/X5R_6
C721
GT3@22U/6.3V/X5R_6
C676
GT3@10U/6.3V_4
C260
GT3@10U/6.3V_4
C722
47U/6.3V_8
C345
22U/6.3V/X5R_6
C748
GT3@22U/6.3V/X5R_6
C179
GT3@22U/6.3V/X5R_6
C273
GT3@10U/6.3V_4
C252
GT3@10U/6.3V_4
C762
47U/6.3V_8
C341
22U/6.3V/X5R_6
C227
22U/6.3V/X5R_6
07
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 6/15 (POWER-3)
SKYLAKE 6/15 (POWER-3)
SKYLAKE 6/15 (POWER-3)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
7 61 Friday, March 11, 2016
7 61 Friday, March 11, 2016
1
7 61 Friday, March 11, 2016
1A
5
4
3
2
1
08
D D
U38R
?
SKL_ULT
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
C C
B B
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
SKL_ULT
REV = 1
L18
VSS
L2
VSS
L20
VSS
L4
VSS
L8
VSS
N10
VSS
N13
VSS
N19
VSS
N21
VSS
N6
VSS
N65
VSS
N68
VSS
P17
VSS
P19
VSS
P20
VSS
P21
VSS
R13
VSS
R6
VSS
T15
VSS
T17
VSS
T18
VSS
T2
VSS
T21
VSS
T4
VSS
U10
VSS
U63
VSS
U64
VSS
U66
VSS
U67
VSS
U69
VSS
U70
VSS
V16
VSS
V17
VSS
V18
VSS
W13
VSS
W6
VSS
W9
VSS
Y17
VSS
Y19
VSS
Y20
VSS
Y21
VSS
?
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
U38P
?
SKL_ULT
GND 1 OF 3
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF1
VSS
VSS
VSS
VSS
AF2
VSS
AF4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK8
VSS
AL2
VSS
VSS
VSS
VSS
VSS
AL4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
SKL_ULT
REV = 1
AL65
VSS
AL66
VSS
AM13
VSS
AM21
VSS
AM25
VSS
AM27
VSS
AM43
VSS
AM45
VSS
AM46
VSS
AM55
VSS
AM60
VSS
AM61
VSS
AM68
VSS
AM71
VSS
AM8
VSS
AN20
VSS
AN23
VSS
AN28
VSS
AN30
VSS
AN32
VSS
AN33
VSS
AN35
VSS
AN37
VSS
AN38
VSS
AN40
VSS
AN42
VSS
AN58
VSS
AN63
VSS
AP10
VSS
AP18
VSS
AP20
VSS
AP23
VSS
AP28
VSS
AP32
VSS
AP35
VSS
AP38
VSS
AP42
VSS
AP58
VSS
AP63
VSS
AP68
VSS
AP70
VSS
AR11
VSS
AR15
VSS
AR16
VSS
AR20
VSS
AR23
VSS
AR28
VSS
AR35
VSS
AR42
VSS
AR43
VSS
AR45
VSS
AR46
VSS
AR48
VSS
AR5
VSS
AR50
VSS
AR52
VSS
AR53
VSS
AR55
VSS
AR58
VSS
AR63
VSS
AR8
VSS
AT2
VSS
AT20
VSS
AT23
VSS
AT28
VSS
AT35
VSS
AT4
VSS
AT42
VSS
AT56
VSS
AT58
VSS
?
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
U38Q
?
SKL_ULT
GND 2 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
VSS
VSS
VSS
BA2
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
17 OF 20
SKL_ULT
REV = 1
PDC
BA49
VSS
BA53
VSS
BA57
VSS
BA6
VSS
BA62
VSS
BA66
VSS
BA71
VSS
BB18
VSS
BB26
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB43
VSS
BB55
VSS
BB6
VSS
BB60
VSS
BB64
VSS
BB67
VSS
BB70
VSS
C1
VSS
C25
VSS
C5
VSS
D10
VSS
D11
VSS
D14
VSS
D18
VSS
D22
VSS
D25
VSS
D26
VSS
D30
VSS
D34
VSS
D39
VSS
D44
VSS
D45
VSS
D47
VSS
D48
VSS
D53
VSS
D58
VSS
D6
VSS
D62
VSS
D66
VSS
D69
VSS
E11
VSS
E15
VSS
E18
VSS
E21
VSS
E46
VSS
E50
VSS
E53
VSS
E56
VSS
E6
VSS
E65
VSS
E71
VSS
F1
VSS
F13
VSS
F2
VSS
F22
VSS
F23
VSS
F27
VSS
F28
VSS
F32
VSS
F33
VSS
F35
VSS
F37
VSS
F38
VSS
F4
VSS
F40
VSS
F42
VSS
BA41
VSS
?
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 7/15 (GND)
SKYLAKE 7/15 (GND)
SKYLAKE 7/15 (GND)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
8 61 Friday, March 11, 2016
8 61 Friday, March 11, 2016
1
8 61 Friday, March 11, 2016
1A
5
D D
R174 49.9/F_4
+1.0V_DEEP_SUS
C C
B B
R195 1K_4
4
CFG3
CFG4
CFG_RCOMP
R173 *0_4_S
AL25
AL27
BA70
BA68
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
U38S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT
REV = 1
SKL_ULT
RESERVED SIGNALS-1
PDC
?
19 OF 20
3
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
2
+1.0V_DEEP_SUS {13,15,51,53,54,56}
+VCCSTPLL {2,4,5,6,45,53,56}
+1.8V_DEEP_SUS {5,15,42,53,56}
BB68
BB69
AK13
AK12
BB2
BA3
AU5
TP5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
AY4
TP1
BB3
TP2
AY71
R700 *0_4_S
AR56
R238 *GT3@0_4
AW71
AW70
AP56
C64
?
R674 *0_4_S
Connon-U use, SKL-U
un-install.
+1.8V_DEEP_SUS
R211 *0_6
C314
Close to CPU
Placement are required for future platform
compatibility purpose only.
LPM_ZVM_N {49}
R598 *100K_4
+VCCSTPLL
*1U/6.3V_4X
AW69
AW68
AU56
AW48
U12
U11
H11
C7
U38T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
SKL_ULT
REV = 1
SKL_ULT
SPARE
?
20 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
1
09
F6
E3
C11
B11
A11
D12
C12
F52
?
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R611 *1K_4
R617 1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 8/15 (RSV)
SKYLAKE 8/15 (RSV)
SKYLAKE 8/15 (RSV)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
9 61 Friday, March 11, 2016
9 61 Friday, March 11, 2016
1
9 61 Friday, March 11, 2016
1A
5
PCH_SPI1_CLK {28}
PCH_SPI1_SO {28}
D D
C C
PCH_SPI1_SI {28}
PCH_SPI_CS2#_TPM {28}
SIO_EXT_SMI# {36}
CL_CLK {33}
CL_DATA {33}
CL_RST# {33}
EC_RCIN# {36}
EC_IRQ_SERIRQ {36}
4
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
PCH_SPI_CS2#_TPM
SIO_EXT_SMI#
PCI_SERR#
AW3
AW2
AW13
AY11
AV2
AV3
AU4
AU3
AU2
AU1
M2
M3
J4
V1
V2
M1
G3
G2
G1
U38E
SPI - FLASH
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
C LINK
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKL_ULT
REV = 1
SKL_ULT
LPC
3
?
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
PDC
5 OF 20
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
2
+3V_DEEP_SUS {4,11,14,15,17}
SMB_PCH_CLK
R7
SMB_PCH_DAT
R8
R10
SMLALERT#
SMB_ME0_CLK
R9
SMB_ME0_DAT
W2
W1
SML0ALERT#
SMB_ME1_CLK
W3
SMB_ME1_DAT
V3
GPP_B23
AM7
AY13
BA13
BB13
AY12
BA12
BA11
CLK_PCI_EC_R
AW9
CLK_PCI_LPC_R
AY9
AW11
CLKRUN#
?
R679 22/F_4
R676 22/F_4
D3A
EC_LPCCLK
DEBUG_LCLKOUT
TP11
SMLALERT# {11}
SML0ALERT# {11}
LPC_LAD0 {33,36}
LPC_LAD1 {33,36}
LPC_LAD2 {33,36}
LPC_LAD3 {33,36}
LPC_LFRAME# {33,36}
EC_LPCCLK {36}
DEBUG_LCLKOUT {33}
CLKRUN# {36}
+3V {2,4,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+3VS5 {4,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56}
EMI(near PCH)
DEBUG_LCLKOUT
EC_LPCCLK
1
EC37
*E@18P/50V_4
10
EC36
*E@18P/50V_4
GPIO Pull UP
EC_IRQ_SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
B B
R714 10K_4
R695 8.2K_4
R625 10K_4
R691 10K_4
R624 10K_4
+3V +3V_DEEP_SUS
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_ME0_CLK
SMB_ME0_DAT
R650 2.2K_4
R654 2.2K_4
R646 1K_4
R635 1K_4
R647 1K_4
R649 1K_4
SMBus/Pull-up(CLG)
+3V_DEEP_SUS
MBCLK_THRM {19,36,37,42}
MBDATA_THRM {19,36,37,42}
R648 4.7K_4
+3V
SMB_RUN_DAT {17,27}
A A
SMB_RUN_CLK {17,27}
5
+3V
R656 4.7K_4
Q41
5
2
6
*2N7002DW
Q42
4 3
1
SSM6N48FU
SMB_ME1_CLK
4 3
SMB_ME1_DAT
1
+3V
5
SMB_PCH_DAT
2
SMB_PCH_CLK
6
4
PCH SPI ROM(CLG)
R684 10K_4
+3VS5
C773 *1U/10V_4
Vender P/N
EON
Socket
3
Size
TP70
TP67
TP68
TP69
TP22
TP23
AKE3DZNKQ00(EN25QH128AHIP) 16MB
AKE3DF00Q00 (GD25B128CSIGR) GGD 16MB
DFHS08FS023
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
PCH_SPI_CS0# PCH_SPI_CS0#_R
PCH_SPI1_CLK
PCH_SPI1_SO
+3VSPI
PCH_SPI_IO2
R693 33_4
R690 33_4
R699 33_4
R694 33_4
R697 1K_4
R685 33_4
2
PCH_SPI1_CLK_R
PCH_SPI1_SI_R PCH_SPI1_SI
PCH_SPI1_SO_R
C769
22P/50V/NPO_4
PCH_SPI_CS0#_R {36}
PCH_SPI1_CLK_R {36}
PCH_SPI1_SI_R {36}
PCH_SPI1_SO_R {36}
R713 *0_4_S
U46
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q128FVSIQ
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VS5
8
+3VSPI
VDD
7
HOLD#
4
VSS
SKYLAKE 9/15(SPI/LPC/SM)
SKYLAKE 9/15(SPI/LPC/SM)
SKYLAKE 9/15(SPI/LPC/SM)
R698 1K_4
R689 33_4
HOLD#
PCH_SPI_IO3 BIOS_WP#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
10 61 Friday, March 11, 2016
10 61 Friday, March 11, 2016
1
10 61 Friday, March 11, 2016
C772
0.1U/16V/X7R_4
1A
1A
1A
5
4
3
2
+3V_DEEP_SUS {4,10,14,15,17}
1
+3V {2,4,10,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
11
D D
Functional Strap Definitions
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR {14,29}
C C
B B
GSPI1_MOSI {14}
ACZ_SPKR
SMLALERT#
GSPI1_MOSI
R683
*20K/F_4
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
+3V_DEEP_SUS
R657
1K/F_4
R653
*20K_4
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
ACZ_SDOUT {14}
EN_OVERRIDE {36}
GPP_B18 {14} SMLALERT# {10}
SML0ALERT# {10}
R710 1K_4
ACZ_SDOUT
ACZ_SDOUT
GPP_B18
SML0ALERT#
+3V_DEEP_SUS
R702
*4.7K_4
+3V
R291
*4.7K_4
+3V_DEEP_SUS
R290
10K_4
R651
*10K_4
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
R670
*20K_4
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
A A
5
4
3
R652
20K_4
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SKYLAKE 10/15(Strip)
SKYLAKE 10/15(Strip)
SKYLAKE 10/15(Strip)
1
LV6
LV6
LV6
1A
1A
11 61 Friday, March 11, 2016
11 61 Friday, March 11, 2016
11 61 Friday, March 11, 2016
1A
5
+3V
PEG_RXN0
PEG_RXP0
PEG_TXN0
PEG_TXP0
PEG_RXN1
PEG_RXP1
PEG_TXN1
PEG_TXP1
PEG_RXN2
PEG_RXP2
PEG_TXN2
PEG_TXP2
PEG_RXN3
PEG_RXP3
PEG_TXN3
PEG_TXP3
C3A
R608 100/F_4
R696 10K_4
C694 EV@0.22U/10V_4X
C693 EV@0.22U/10V_4X
C690 EV@0.22U/10V_4X
C698 EV@0.22U/10V_4X
C696 EV@0.22U/10V_4X
C697 EV@0.22U/10V_4X
C685 EV@0.22U/10V_4X
C691 EV@0.22U/10V_4X
C702 0.1U/16V/X7R_4
C703 0.1U/16V/X7R_4
C679 0.1U/16V/X7R_4
C683 0.1U/16V/X7R_4
TP4
TP6
TP40
TP37
TP74
TP77
TP76
TP75
PCIE_TXN5_LAN_C
PCIE_TXP5_LAN_C
PCIE_TXN6_WLAN_C
PCIE_TXP6_WLAN_C
PCIE_RCOMPN
PCIE_RCOMPP
PIRQA#
PEG_RXN0 {18}
PEG_RXP0 {18}
PEG_TXN0 {18}
D D
PEG
LAN
WLAN
C C
ODD
HDD
B B
SSD
PEG_TXP0 {18}
PEG_RXN1 {18}
PEG_RXP1 {18}
PEG_TXN1 {18}
PEG_TXP1 {18}
PEG_RXN2 {18}
PEG_RXP2 {18}
PEG_TXN2 {18}
PEG_TXP2 {18}
PEG_RXN3 {18}
PEG_RXP3 {18}
PEG_TXN3 {18}
PEG_TXP3 {18}
PCIE_RXN5_LAN# {30}
PCIE_RXP5_LAN {30}
PCIE_TXN5_LAN# {30}
PCIE_TXP5_LAN {30}
PCIE_RXN6_WLAN# {33}
PCIE_RXP6_WLAN {33}
PCIE_TXN6_WLAN# {33}
PCIE_TXP6_WLAN {33}
SATA_RXN7_ODD# {31}
SATA_RXP7_ODD {31}
SATA_TXN7_ODD# {31}
SATA_TXP7_ODD {31}
SATA_RXN8_HDD# {31}
SATA_RXP8_HDD {31}
SATA_TXN8_HDD# {31}
SATA_TXP8_HDD {31}
PCIE_RXN11_SSD {31}
PCIE_RXP11_SSD {31}
PCIE_TXN11_SSD {31}
PCIE_TXP11_SSD {31}
SATA_RXN_SSD# {31}
SATA_RXP_SSD {31}
SATA_TXN_SSD# {31}
SATA_TXP_SSD {31}
PCI-E Port Mapping Table
PCI-E Port
Function
Port1
Port2
Port3
dGPU
Port4
Port5
Port6
Port7
A A
Port8
Port9
Port10
Port11
Port12
LAN
WLAN
ODD
HDD
Un-used
DOCK
SSD
if Pcie Bus will lane reverse.
if SATA BUS is SATA2.
5
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
Function
dGPU
LAN
WLAN
DOCK
Un-used
SSD
PEG_TXN0_C
PEG_TXP0_C
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
4
U38H
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL_ULT
REV = 1
4
PCIE/USB3/SATA
3
?
SKL_ULT
PDC
SSIC / USB3
USB2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
8 OF 20
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2_COMP
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
PORT-2
PORT-3
USB3.0_R1
USB3.0_R2
USB3.0_DOCK
PORT-4
3
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_ID
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB30_RX1-_R1
USB30_RX1+_R1
USB30_TX1-_R1
USB30_TX1+_R1
USB30_RX2-_R2
USB30_RX2+_R2
USB30_TX2-_R2
USB30_TX2+_R2
USB30_RX3-_DOCK
USB30_RX3+_DOCK
USB30_TX3-_DOCK
USB30_TX3+_DOCK
USBP1-_R1
USBP1+_R1
USBP2-_R2
USBP2+_R2
USBP3-_DOCK
USBP3+_DOCK
USBP4-_L1
USBP4+_L1
USBP5-_L2
USBP5+_L2
USBP6-_FP
USBP6+_FP
USBP7-_Card
USBP7+_Card
USBP8-_BT
USBP8+_BT
USBP9-_CCD
USBP9+_CCD
USB2_COMP
R227 113/F_4
R236 *0_4_S
USB_Normal_OC0#_R
USB_Normal_OC1#
USB_SC_OC2#
USB_Normal_OC3#_L2
WLAN_OFF#
DEVSLP1_HDD
DEVSLP2_SSD
TPM_INT#
SSD_PEDET#
SATA_LED#_R
2
USB30_RX1-_R1 {34}
USB30_RX1+_R1 {34}
USB30_TX1-_R1 {34}
USB30_TX1+_R1 {34}
USB30_RX2-_R2 {34}
USB30_RX2+_R2 {34}
USB30_TX2-_R2 {34}
USB30_TX2+_R2 {34}
USB30_RX3-_DOCK {39}
USB30_RX3+_DOCK {39}
USB30_TX3-_DOCK {39}
USB30_TX3+_DOCK {39}
USBP1-_R1 {34}
USBP1+_R1 {34}
USBP2-_R2 {34}
USBP2+_R2 {34}
USBP3-_DOCK {39}
USBP3+_DOCK {39}
USBP4-_L1 {35}
USBP4+_L1 {35}
USBP5-_L2 {35}
USBP5+_L2 {35}
USBP6-_FP {38}
USBP6+_FP {38}
USBP7-_Card {32}
USBP7+_Card {32}
USBP8-_BT {33}
USBP8+_BT {33}
USBP9-_CCD {25}
USBP9+_CCD {25}
USB_Normal_OC0#_R {34}
USB_SC_OC2# {35}
USB_Normal_OC3#_L2 {35}
WLAN_OFF# {33}
DEVSLP1_HDD {31}
DEVSLP2_SSD {31}
TPM_INT# {28}
SSD_PEDET# {31}
SATA_LED#_R {38}
USB3.0_R1
USB3.0_R2
Onelink+_USB3.0
USB2.0_R1
USB2.0_R2
Onelink+_USB2.0
USB2.0_L1&SC
USB2.0_L2
Figure Printer
Cardreader
BT
CCD
HDD Device Sleep
SSD Device Sleep
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
2
USB2.0_R1
USB2.0_R2
USB2.0_DOCK
USB2.0_L1_S&C
USB2.0_L2
Figure Printer
Cardreader
BT
CCD
NC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+3V {2,4,10,11,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+3VS5 {4,10,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56}
SATA_LED#_R
DEVSLP1_HDD
DEVSLP2_SSD
SSD_PEDET#
USB_Normal_OC0#_R
USB_Normal_OC1#
USB_SC_OC2#
USB_Normal_OC3#_L2
WLAN_OFF#
SKYLAKE 11/15 (PCIE/USB)
SKYLAKE 11/15 (PCIE/USB)
SKYLAKE 11/15 (PCIE/USB)
R606 10K_4
R618 *10K_4
R614 *10K_4
R180 10K_4
R586 10K_4
R580 10K_4
R594 10K_4
R592 10K_4
R619 10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
1
12 61 Friday, March 11, 2016
12 61 Friday, March 11, 2016
12 61 Friday, March 11, 2016
12
+3V
+3VS5
1A
1A
1A
5
C3A
CLK_PCIE_VGAN {18}
CLK_PCIE_VGAP {18}
PCIE_CLK_VGA_REQ# {19}
CLK_PCIE_LAN# {30}
CLK_PCIE_LAN {30}
PCIE_CLK_LAN_REQ# {30}
CLK_PCIE_WLANN {33}
CLK_PCIE_WLANP {33}
PCIE_CLK_WLAN_REQ# {33}
TP72
TP73
TP38
TP39
CLK_PCIE_SSDN {31}
CLK_PCIE_SSDP {31}
PCIE_CLK_SSD_REQ# {31}
D D
PEG
LAN
WLAN
DOCK
SSD
CLK_REQ/Strap Pin(CLG)
C C
+3V
4
R289 10K_4
R712 10K_4
R706 10K_4
R715 10K_4
R704 10K_4
R705 10K_4
PCIE_CLK_VGA_REQ#
PCIE_CLK_LAN_REQ#
PCIE_CLK_WLAN_REQ#
PCIE_CLK_LAN_REQ#_DOCK
PCIE_CLKREQ4#
R568 *SSD@0_2_S
R570 *SSD@0_2_S
PCIE_CLK_SSD_REQ#
PCIE_CLK_LAN_REQ#_DOCK
PCIE_CLK_WLAN_REQ#
PCIE_CLK_LAN_REQ#
PCIE_CLK_VGA_REQ#
PCIE_CLKREQ4#
PCIE_CLK_SSD_REQ#
U38J
D42
CLKOUT_PCIE _N0
C42
CLKOUT_PCIE _P0
AR10
GPP_B5/SRCCLKREQ 0#
B42
CLKOUT_PCIE _N1
A42
CLKOUT_PCIE _P1
AT7
GPP_B6/SRCCLKREQ 1#
D41
CLKOUT_PCIE _N2
C41
CLKOUT_PCIE _P2
AT8
GPP_B7/SRCCLKREQ 2#
D40
CLKOUT_PCIE _N3
C40
CLKOUT_PCIE _P3
AT10
GPP_B8/SRCCLKREQ 3#
B40
CLKOUT_PCIE _N4
A40
CLKOUT_PCIE _P4
AU8
GPP_B9/SRCCLKREQ 4#
E40
CLKOUT_PCIE _N5
E38
CLKOUT_PCIE _P5
AU7
GPP_B10 /SRCCLKRE Q5#
SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U38I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
SKL_ULT
REV = 1
SKL_ULT
CLOCK SIGNALS
SKL_ULT
?
10 OF 20
?
PDC
9 OF 20
3
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIA SREF
SRTCRST#
TBT
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
RTCX1
RTCX2
RTCRST#
2
+3V_RTC_2 {4,15}
+3V {2,4,10,11,12,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+1.0V_DEEP_SUS {9,15,51,53,54,56}
VSTBY_FSPI {25,29,36,38,39}
F43
E43
PCH_SUSCLK_R
BA17
E37
E35
E42
AM18
AM20
AN18
AM16
?
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
CSI2_COMP
EMMC_RCOMP
R242 *SSD@0_4_S
R169 2.7K/F_4
R176 *60.4/F_4
R182 100/F_4
R672 200/F_4
PCH_SUSCLK {31}
+1.0V_DEEP_SUS
Co-lay 60ohm 1% to GND
for Connonlake-U use
1
13
B B
RTC Clock 32.768KHz (RTC)
<RTC>
B2B
C763 15P/50V/NPO_4
Y5
32.768KHz
C755 15P/50V/NPO_4
A A
5
RTC_X1
1 2
R669
10M_4
RTC_X2
RTC Circuitry (RTC)
+3V_RTC
R441 45.3K_4
R434 1K_4
1 2
CN21
94-0013-01
<RTC>
+3V_RTC_1 EC_RTC_RST
R436
*45.3K_4
4
RTC Power trace width 20mils.
R442
1.5K_4
2 1
D14 DB2J40600L
2 1
D13 DB2J40600L
C548
1U/6.3V_4X
+3V_RTC_2 VSTBY_FSPI
R294
20K/F_4
R300
20K/F_4
C415
1U/6.3V_4X
SRTC_RST#
C423
1U/6.3V_4X
EC14
*E@220P/50V_4
RTC_RST#
1 2
*JUMP
RTC_RST#
GRTC1
3
3
2
Q25
2N7002K
1
RTC_RST#
R309
10K_4
EC_RTC_RST {36}
External Crystal and Green Clock
C242 12P/50V_4
1
XTAL24_IN
XTAL24_OUT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
2
R177
24MHZ +-30PPM
1M_4
Y1
4
3
C243 12P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SKYLAKE 12/15 (CLK/EMMC)
SKYLAKE 12/15 (CLK/EMMC)
SKYLAKE 12/15 (CLK/EMMC)
1
LV6
LV6
LV6
1A
1A
13 61 Friday, March 11, 2016
13 61 Friday, March 11, 2016
13 61 Friday, March 11, 2016
1A
5
4
3
2
1
DGPU <VGA>
<CPU>
+3V
DGPU_PWR_EN
R281 EV@10K_4
DGPU_HOLD_RST#
R282 EV@10K_4
DGPU_PWROK
R680 *EV@10K_4
D D
+3V_DEEP_SUS
BT_RADIO_DIS#
R632 10K_4
PCH_TEMPALERT#
R631 10K_4
SIO_EXT_SCI#
R659 10K_4
UART2_TXD
R660 49.9K/F_4
UART2_RXD
+3V_DEEP_SUS
C C
Model
Sku
E42(R310_14)
0
E52(R310_15)
1
V310_14
2
V310_15
3
Tianyi310_14
B B
4
5
6
7
Tianyi310_15
Reserved
Reserved
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
On Board Memory
A A
BOARD_ID10
BOARD_ID9
BOARD_ID8
BOARD_ID11 Hi = Skylake Lo = Kaby lake
R664 49.9K/F_4
BOARD_ID0
R661 SKU@10K_2
BOARD_ID1
R658 SKU@10K_2
BOARD_ID2
R666 SKU@10K_2
BOARD_ID3
R222 IV@10K_2
BOARD_ID4
R218 NDK@10K_2
BOARD_ID5
R217 N2B@10K_2
BOARD_ID6
R304 NFP@10K_2
BOARD_ID7
R303 NSSD@10K_2
BOARD_ID8
R305 ONB@10K_2
BOARD_ID9
R306 ONB@10K_2
BOARD_ID10
R766 ONB@10K_2
BOARD_ID11
R768 SKL@10K_2
R662 SKU@10K_2
R663 SKU@10K_2
R665 SKU@10K_2
R223 EV@10K_2
R216 DK@10K_2
R212 2B@10K_2
R312 FP@10K_2
R311 SSD@10K_2
R313 ONB@10K_2
R314 ONB@10K_2
R765 ONB@10K_2
R767 KBY@10K_2
BOARD_ID1 BOARD_ID0 BOARD_ID2
0 0 0
0 0
0
0
1
1
1
1
1
1
0
0
1
1
Hi = UMA Lo = Discrete
Hi = wo Prolink Lo = w Prolink
Hi = wo 2nd Battery Lo = w 2nd Battery
Hi = wo Figure Printer Lo = w Figure Printer
Hi = wo SSD Lo = w SSD
[ 1, 1, 1 ] = Samsung K4A8G165WB-BCRC
[ 1, 1, 0 ] = Micro MT40A512M16JY-083E:B
[ 1, 0, 1 ] = SMART
[ 1, 0, 0 ] = Teikon
[ 0, 1, 1 ] = Samsung K4A8G165WB-BCPB
[ 0, 1, 0 ] = Micro MT40A512M16HA-083E:A
[ 0, 0, 1 ] = Hynix H5AN8G6NAFR-TFC
[ 0, 0, 0 ] = No Memory Down
5
1
0
1
0
1
0
1
D3A
B2A
C3A
B2A
CR_EN# {32}
DGPU_PWR_EN {18,56}
DGPU_HOLD_RST# {18}
GPP_B18 {11}
DGPU_PWROK {52}
GSPI1_MOSI {11}
LCD_BK_OFF {25}
CCD_EN {25}
UART2_RXD {34}
UART2_TXD {34}
SIO_EXT_SCI# {36}
ACZ_SDOUT {11}
ACZ_SDIN0 {29}
TP54
ACZ_SPKR {11,29}
4
TP48
DGPU_PWR_EN
DGPU_HOLD_RST#
GPP_B18
DGPU_PWROK
GSPI1_MOSI
UART2_RXD
UART2_TXD
SIO_EXT_SCI#
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0
ACZ_RST#
ACZ_SPKR
U38F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKL_ULT
REV = 1
LPSS ISH
U38G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SKL_ULT
3
Skylake (GPIO)
?
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
?
SKL_ULT
AUDIO
REV = 1
7 OF 20
ACZ_SYNC
ACZ_SYNC
ACZ_SDOUT
ACZ_BCLK
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
SDIO/SDXC
GPP_A17/SD_PWR_EN#/ISH_GP7
R703 *1K_4
R709 33_4
R711 33_4
R701 33_4
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
+3V_DEEP_SUS
ACZ_SYNC_AUDIO {29}
ACZ_SDOUT_AUDIO {29}
BIT_CLK_AUDIO {29}
C770
*10P/50V_4
2
?
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
+3V_DEEP_SUS {4,10,11,15,17}
+3V {2,4,10,11,12,13,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
14
TP47
TP46
TP45
BT_RADIO_DIS# {33}
PCH_TEMPALERT#
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
BOARD_ID11
B2A
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
R322 *0_4_S
R636 *0_4_S
GPP_A16
SD_RCOMP
R220 200/F_4
TP9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SKYLAKE 13/15 (HDA/GPIO)
SKYLAKE 13/15 (HDA/GPIO)
SKYLAKE 13/15 (HDA/GPIO)
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
GPP_A16 {34}
1
NUM_LED# {38}
CAP_LOCK_LED# {38}
LV6
LV6
LV6
14 61 Friday, March 11, 2016
14 61 Friday, March 11, 2016
14 61 Friday, March 11, 2016
1A
1A
1A
5
D D
C334 1U/6.3V_4X
+1.0V_DEEP_SUS
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
C C
B B
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+3VS5
+V3.3DX_1.5DX_ADO
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
R226 *0_4_S
C326 *1U/6.3V_4X
C754 1U/6.3V_4X
R627 *0_6_S
C202 1U/6.3V_4X
C177 47U/6.3V_8
R202 *0_4_S
L12 HCB1608KF-221T20_2A
R221 *0_6_S
R215 *0_6_S
C354 *1U/6.3V_4X
C389 0.1U/16V/X7R_4
C388 *0.1P/50V_4
R260 *0_6_S
R232 *0_6_S
R258 *0_6_S
R682 *0_6_S
R198 *0_6_S
C315 *1U/6.3V_4X
C279 1U/6.3V_4X
4
+VCCPRIM
+VCCMPHYAON_1P0
+VCCAMPHYPLL_1P0
C285 *1U/6.3V_4X
+VCCAPLL_1.0V
C289 0.1U/16V/X7R_4
+VCCPRIM
+V3.3DX_1.5DX_ADO_R
+VCCSPI
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
U38O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
SKL_ULT
REV = 1
SKL_ULT
CPU POWER 4 OF 4
2.899A
2.57A
1.714A
0.03A
0.09A
?
15 OF 20
3
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
2
+3V_DEEP_SUS {4,10,11,14,17}
+1.0V_DEEP_SUS {9,13,51,53,54,56}
+1.8V_DEEP_SUS {5,9,42,53,56}
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
?
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
+VCCRTC
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
C404 *1U/6.3V_4X
R633 *0_6_S
R655 *0_6_S C269 1U/6.3V_4X
R259 *0_6_S
R286 *0_4_S
C768 0.1U/16V/X7R_4
R150 *0_6_S
R161 *0_4_S
R673 *0_6_S
R201 *0_4_S
R157 *0_6_S
C196 *1U/6.3V_4X
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+1.0V_DEEP_SUS
TP14
TP10
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
+VCCRTCPRIM_3.3V +VCCATS_1.8V +VCCRTC
+VCCCLK2
+VCCCLK4
+VCCCLK5
+VCCAMPHYPLL_1P0
1
+3VS5 {4,10,12,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56}
+3V_RTC_2 {4,13}
+3V {2,4,10,11,12,13,14,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
R234 *0_4_S
R266 *0_4_S
R671 *0_4_S
R207 *0_4_S
R205 *0_4_S
R229 *0_4_S
R681 *0_4_S
C220 *10U/6.3V_4
C295 *10U/6.3V_4 R167 *0_4_S
C247 *10U/6.3V_4
C286 *10U/6.3V_4
15
+3V_DEEP_SUS
+1.8V_DEEP_SUS
+V3.3DX_1.5DX_ADO +1.0V_DEEP_SUS
L13 HCB1608KF-221T20_2A
A A
5
+3V
C213
*1U/6.3V_4X
4
C190
*22U/6.3V/X5R_6
R194 *0_6_S
R230 *0_6_S
3
+3V_DEEP_SUS +3VS5
C745
1U/6.3V_4X
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C398
*1U/6.3V_4X
2
C405
0.1U/16V/X7R_4
C756
*1U/6.3V_4X
C411
1U/6.3V_4X
C396
1U/6.3V_4X
1U/6.3V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C395
0.1U/16V/X7R_4
C291
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SKYPAKE 14/15(PCH POWER)
SKYPAKE 14/15(PCH POWER)
SKYPAKE 14/15(PCH POWER)
1
LV6
LV6
LV6
1A
1A
15 61 Friday, March 11, 2016
15 61 Friday, March 11, 2016
15 61 Friday, March 11, 2016
1A
<DDR>
5
(Memory Down)
4
3
2
1
16
+1.2V_SUS {3,6,17,50}
+2.5V_SUS {17,50}
+0.6V_DDR_VTT {17,50}
M_A_DQ[63:0] {3}
M_A_A[13:0] {3}
D D
M_A_BA#0 {3}
M_A_BA#1 {3}
M_A_BG#0 {3}
M_A_CLKP0 {3}
M_A_CLKN0 {3}
C C
DDR4_DRAMRST# {3,17}
B B
M_A_CKE0 {3}
M_A_ODT0_CPU {3}
M_A_CS#0 {3}
M_A_DQSP7 {3}
M_A_DQSP6 {3} M_A_DQSP4 {3}
M_A_DQSN7 {3}
M_A_DQSN6 {3}
M_A_ALERT# {3}
M_A_ACT# {3}
M_A_PARITY {3}
+SMDDR_VREF_DIMM
+2.5V_SUS
M_A_WE# {3}
M_A_CAS# {3}
M_A_RAS# {3}
DDR4_DRAMRST#
R377 240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_BG#0 M_A_BG#0 M_A_BG#0 M_A_BG#0
M_A_CLKP0
M_A_CLKN0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_DQSP7
M_A_DQSP6
M_A_DQSN7
M_A_DQSN6
DDR0_ALERT# DDR0_ALERT# DDR0_ALERT# DDR0_ALERT#
DDR0_PAR DDR0_PAR DDR0_PAR DDR0_PAR
M_A1_ZQ0
U19
M1
VREFCA
B1
VPP
R9
VPP
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
N2
BA0
N8
BA1
M2
BG0
K7
CK_t
K8
CK_c
K2
CKE
K3
ODT
L7
CS
G3
DQSL_t
B7
DQSU_t
F3
DQSL_c
A7
DQSU_c
E7
DML_n/DBIL_n
E2
DMU_n/DBIU_n
P1
RESET_n
F9
ZQ
N9
TEN
P9
ALERT_n
L3
ACT_n
T3
PAR
T7
NC
96-BALL
DDR4
MT40A512M16HA-083E:A
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B3
VDD#B9
VDD#D1
VDD#G7
VDD#J1
VDD#J9
VDD#L1
VDD#L9
VDD#R1
VDD#T9
VDDQ#A1
VDDQ#A9
VDDQ#C1
VDDQ#D9
VDDQ#F2
VDDQ#F8
VDDQ#G1
VDDQ#G9
VDDQ#J2
VDDQ#J8
VSS#B2
VSS#E1
VSS#E9
VSS#G8
VSS#K1
VSS#K9
VSS#M9
VSS#N1
VSS#T1
VSSQ#A2
VSSQ#A8
VSSQ#C9
VSSQ#D2
VSSQ#D8
VSSQ#E3
VSSQ#E8
VSSQ#F1
VSSQ#H1
VSSQ#H9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
M_A_DQ59
F7
M_A_DQ56
H3
M_A_DQ63
H7
M_A_DQ60
H2
M_A_DQ62
H8
M_A_DQ57
J3
M_A_DQ58
J7
M_A_DQ48
A3
M_A_DQ54
B8
M_A_DQ53
C3
M_A_DQ55
C7
M_A_DQ49
C2
M_A_DQ51
C8
M_A_DQ52
D3
M_A_DQ50
D7
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V_SUS
M_A_DQSP3 {3}
M_A_DQSN2 {3}
M_A_DQSN3 {3}
M_A_DQ61
G2
+SMDDR_VREF_DIMM
+2.5V_SUS
R380 240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_CLKP0
M_A_CLKN0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_DQSP2
M_A_DQSP3
M_A_DQSN2
M_A_DQSN3
DDR4_DRAMRST#
M_A2_ZQ0
DDRA_ACT# DDRA_ACT# DDRA_ACT#DDRA_ACT#
U17
M1
VREFCA
B1
VPP
R9
VPP
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
N2
BA0
N8
BA1
M2
BG0
K7
CK_t
K8
CK_c
K2
CKE
K3
ODT
L7
CS
G3
DQSL_t
B7
DQSU_t
F3
DQSL_c
A7
DQSU_c
E7
DML_n/DBIL_n
E2
DMU_n/DBIU_n
P1
RESET_n
F9
ZQ
N9
TEN
P9
ALERT_n
L3
ACT_n
T3
PAR
T7
NC
96-BALL
DDR4
MT40A512M16HA-083E:A
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B3
VDD#B9
VDD#D1
VDD#G7
VDD#J1
VDD#J9
VDD#L1
VDD#L9
VDD#R1
VDD#T9
VDDQ#A1
VDDQ#A9
VDDQ#C1
VDDQ#D9
VDDQ#F2
VDDQ#F8
VDDQ#G1
VDDQ#G9
VDDQ#J2
VDDQ#J8
VSS#B2
VSS#E1
VSS#E9
VSS#G8
VSS#K1
VSS#K9
VSS#M9
VSS#N1
VSS#T1
VSSQ#A2
VSSQ#A8
VSSQ#C9
VSSQ#D2
VSSQ#D8
VSSQ#E3
VSSQ#E8
VSSQ#F1
VSSQ#H1
VSSQ#H9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
M_A_DQ18
F7
M_A_DQ17
H3
M_A_DQ22
H7
M_A_DQ20
H2
M_A_DQ23
H8
M_A_DQ21
J3
M_A_DQ19
J7
M_A_DQ25
A3
M_A_DQ31
B8
M_A_DQ24
C3
M_A_DQ26
C7
M_A_DQ28
C2
M_A_DQ27
C8
M_A_DQ29
D3
M_A_DQ30
D7
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V_SUS
M_A_DQSP5 {3}
M_A_DQSN5 {3}
M_A_DQSN4 {3}
M_A_DQ16
G2
+SMDDR_VREF_DIMM
+2.5V_SUS
R376 240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_CLKP0
M_A_CLKN0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_DQSP5
M_A_DQSP4
M_A_DQSN5
M_A_DQSN4
DDR4_DRAMRST#
M_A3_ZQ0
U18
M1
VREFCA
B1
VPP
R9
VPP
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
N2
BA0
N8
BA1
M2
BG0
K7
CK_t
K8
CK_c
K2
CKE
K3
ODT
L7
CS
G3
DQSL_t
B7
DQSU_t
F3
DQSL_c
A7
DQSU_c
E7
DML_n/DBIL_n
E2
DMU_n/DBIU_n
P1
RESET_n
F9
ZQ
N9
TEN
P9
ALERT_n
L3
ACT_n
T3
PAR
T7
NC
96-BALL
DDR4
MT40A512M16HA-083E:A
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B3
VDD#B9
VDD#D1
VDD#G7
VDD#J1
VDD#J9
VDD#L1
VDD#L9
VDD#R1
VDD#T9
VDDQ#A1
VDDQ#A9
VDDQ#C1
VDDQ#D9
VDDQ#F2
VDDQ#F8
VDDQ#G1
VDDQ#G9
VDDQ#J2
VDDQ#J8
VSS#B2
VSS#E1
VSS#E9
VSS#G8
VSS#K1
VSS#K9
VSS#M9
VSS#N1
VSS#T1
VSSQ#A2
VSSQ#A8
VSSQ#C9
VSSQ#D2
VSSQ#D8
VSSQ#E3
VSSQ#E8
VSSQ#F1
VSSQ#H1
VSSQ#H9
M_A_DQ45
G2
M_A_DQ43
F7
M_A_DQ41
H3
M_A_DQ47
H7
M_A_DQ44
H2
M_A_DQ46
H8
M_A_DQ40
J3
M_A_DQ42
J7
M_A_DQ36
A3
M_A_DQ34
B8
M_A_DQ37
C3
M_A_DQ38
C7
M_A_DQ33
C2
M_A_DQ39
C8
M_A_DQ32
D3
M_A_DQ35
D7
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V_SUS
M_A_DQSP0 {3} M_A_DQSP2 {3}
M_A_DQSP1 {3}
M_A_DQSN0 {3}
M_A_DQSN1 {3}
+SMDDR_VREF_DIMM
+2.5V_SUS
+1.2V_SUS +1.2V_SUS +1.2V_SUS +1.2V_SUS
R375 240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_CLKP0
M_A_CLKN0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_DQSP0
M_A_DQSP1
M_A_DQSN0
M_A_DQSN1
DDR4_DRAMRST#
M_A4_ZQ0
U16
M1
VREFCA
B1
VPP
R9
VPP
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
N2
BA0
N8
BA1
M2
BG0
K7
CK_t
K8
CK_c
K2
CKE
K3
ODT
L7
CS
G3
DQSL_t
B7
DQSU_t
F3
DQSL_c
A7
DQSU_c
E7
DML_n/DBIL_n
E2
DMU_n/DBIU_n
P1
RESET_n
F9
ZQ
N9
TEN
P9
ALERT_n
L3
ACT_n
T3
PAR
T7
NC
96-BALL
DDR4
MT40A512M16HA-083E:A
BYTE2_16-23
BYTE3_24-31
G2
DQL0
F7
DQL1
H3
DQL2
H7
DQL3
H2
DQL4
H8
DQL5
J3
DQL6
J7
DQL7
A3
DQU0
B8
DQU1
C3
DQU2
C7
DQU3
C2
DQU4
C8
DQU5
D3
DQU6
D7
DQU7
B3
VDD#B3
B9
VDD#B9
D1
VDD#D1
G7
VDD#G7
J1
VDD#J1
J9
VDD#J9
L1
VDD#L1
L9
VDD#L9
R1
VDD#R1
T9
VDD#T9
A1
VDDQ#A1
A9
VDDQ#A9
C1
VDDQ#C1
D9
VDDQ#D9
F2
VDDQ#F2
F8
VDDQ#F8
G1
VDDQ#G1
G9
VDDQ#G9
J2
VDDQ#J2
J8
VDDQ#J8
B2
VSS#B2
E1
VSS#E1
E9
VSS#E9
G8
VSS#G8
K1
VSS#K1
K9
VSS#K9
M9
VSS#M9
N1
VSS#N1
T1
VSS#T1
A2
VSSQ#A2
A8
VSSQ#A8
C9
VSSQ#C9
D2
VSSQ#D2
D8
VSSQ#D8
E3
VSSQ#E3
E8
VSSQ#E8
F1
VSSQ#F1
H1
VSSQ#H1
H9
VSSQ#H9
M_A_DQ5
M_A_DQ3
M_A_DQ0
M_A_DQ6
M_A_DQ4
M_A_DQ7
M_A_DQ1
M_A_DQ2
M_A_DQ13
M_A_DQ15
M_A_DQ8
M_A_DQ14
M_A_DQ12
M_A_DQ10
M_A_DQ9
M_A_DQ11
+1.2V_SUS
+0.6V_DDR_VTT
+DDR_VTT_RUN_A M_A_A0
4
+0.6V_DDR_VTT
M_A_CLKN0 M_A_CLKP0
+1.2V_SUS
R413
49.9/F_4
DDR4_DRAMRST#
0.01U/50V/X7R_4
M_A_BS#0
R393 36/F_4
M_A_BS#1
R396 36/F_4
M_A_BG#0
R391 36/F_4
M_A_CKE0
R364 36/F_4
M_A_CS#0
R369 36/F_4
R397 36/F_4
M_A_A1
R402 36/F_4
M_A_A2
R415 36/F_4
M_A_A3
R388 36/F_4
M_A_A4
R384 36/F_4
M_A_A5
R409 36/F_4
M_A_A6
R405 36/F_4
M_A_A7
R416 36/F_4
M_A_A8
R420 36/F_4
M_A_A9
R414 36/F_4
M_A_A10
R385 36/F_4
M_A_A11
5
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_ODT0
DDR0_PAR
DDRA_ACT#
R424 36/F_4
R387 36/F_4
R426 36/F_4
R370 36/F_4
R389 36/F_4
R373 36/F_4
R363 36/F_4
R411 36/F_4
R367 36/F_4
A A
M_A_CLKP0
M_A_CLKN0
1023 change cap from
0.2pF to 3.3pF
R362 36/F_4
R361 36/F_4
C477 3.3p/50V_4
DDR0_ALERT#
C529 *0.1U/16V/X7R_4
Place these Caps near Channel A
+1.2V_SUS
C487 1U/6.3V_4X
C481 1U/6.3V_4X
C478 1U/6.3V_4X
C488 1U/6.3V_4X
C506 1U/6.3V_4X
C482 1U/6.3V_4X
C504 1U/6.3V_4X
C503 1U/6.3V_4X
C480 10U/6.3V/X5R_6X
C502 10U/6.3V/X5R_6X
C492 10U/6.3V/X5R_6X
C501 10U/6.3V/X5R_6X
C510 10U/6.3V/X5R_6X
C505 10U/6.3V/X5R_6X
C483 10U/6.3V/X5R_6X
C484 10U/6.3V/X5R_6X
+0.6V_DDR_VTT
EC28 E @120P/50V_4N
EC29 E @120P/50V_4N
+0.6V_DDR_VTT
+SMDDR_VREF_DIMM
+1.2V_SUS
3
C516 1U/6.3V_4X
C530 1U/6.3V_4X C479
C522 1U/6.3V_4X
C531 1U/6.3V_4X
C514 10U/6.3V/X5R_6X
C511 *0.1U/16V/X7R_4
C494 *2.2U/6.3V_4
EC22 E @120P/50V_4N
EC23 E @120P/50V_4N
EC26 E @120P/50V_4N
EC20 E @120P/50V_4N
EC25 E @120P/50V_4N
EC27 E @120P/50V_4N
EC24 E @120P/50V_4N
EC21 E @120P/50V_4N
+2.5V_SUS
C528 1U/6.3V_4X
C533 1U/6.3V_4X
C527 10U/6.3V_4
C526 10U/6.3V_4
+1.2V_SUS
R371
1.8K/F_4
SM_VREF_CA {3}
2
R372 2.7/F_6
C486
0.022U/16V/X7R_4
2 1
R366
24.9/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR4 MEMORY DOWN
DDR4 MEMORY DOWN
DDR4 MEMORY DOWN
Date: Sheet of
Date: Sheet of
Date: Sheet of
+SMDDR_VREF_DIMM
R382
1.8K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
LV6
LV6
LV6
16 61 Friday, March 11, 2016
16 61 Friday, March 11, 2016
16 61 Friday, March 11, 2016
1A
1A
1A
5
<DDR>
D D
C C
B B
A A
(STD)
+3V
R359
R352
R351
*10K_4
CHB_SA0 CHB_SA1 CHB_SA2
R350
10K_4
DDR4 SODIMM ODT GENERATION
DDR_PG_CTRL {3}
10K_4
R353
*10K_4
1.2V Level
*10K_4
R360
10K_4
R686 *0_4_S
5
DDR4_DRAMRST# {3,16}
M_B_ODT0_CPU {3}
M_B_ODT1_CPU {3}
SMB_RUN_CLK {10,27}
SMB_RUN_DAT {10,27}
M_B_A[13:0] {3}
M_B_WE# {3}
M_B_CAS# {3}
M_B_RAS# {3}
M_B_ACT# {3}
M_B_PARITY {3}
M_B_ALERT# {3}
M_B_BA#0 {3}
M_B_BA#1 {3}
M_B_BG#0 {3}
M_B_BG#1 {3}
M_B_CS#0 {3}
M_B_CS#1 {3}
M_B_CKE0 {3}
M_B_CKE1 {3}
M_B_CLKP0 {3}
M_B_CLKN0 {3}
M_B_CLKP1 {3}
M_B_CLKN1 {3}
+1.2V_SUS
+1.2V_SUS
NC1VCC
2
A
GND3Y
74AUP1G07GW
TP25
TP24
+1.2V_SUS
U45
5
4
(to power on VTT)
R341 240/F_4
+1.2V_SUS
1 2
C771
0.1U/16V/X7R_4
R344 240/F_4
R333 240/F_4
R346 240/F_4
R347 240/F_4
R345 240/F_4
R332 240/F_4
R348 240/F_4
R349 240/F_4
+3V_DEEP_SUS
R708
*2M_4
R707
10K_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_EVENT#
M_B_EVENT#
CHB_SA0
CHB_SA1
CHB_SA2
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
4
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
162
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
SM_VREF_DQ1 {3}
DDR_PG {50}
4
CON1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
8
DQ0
7
DQ1
20
DQ2
21
DQ3
4
DQ4
3
DQ5
16
DQ6
17
DQ7
28
DQ8
29
DQ9
41
DQ10
42
DQ11
24
DQ12
25
DQ13
38
DQ14
37
DQ15
50
DQ16
49
DQ17
62
DQ18
63
DQ19
46
DQ20
45
DQ21
58
DQ22
59
DQ23
70
DQ24
71
DQ25
83
DQ26
84
DQ27
66
DQ28
67
DQ29
79
DQ30
80
DQ31
174
DQ32
173
DQ33
187
DQ34
186
DQ35
170
DQ36
169
DQ37
183
DQ38
182
DQ39
195
DQ40
194
DQ41
207
DQ42
208
DQ43
191
DQ44
190
DQ45
203
DQ46
204
DQ47
216
DQ48
(260P)
215
DDR4 SODIMM 260 PIN
DQ49
228
DQ50
229
DQ51
211
DQ52
212
DQ53
224
DQ54
225
DQ55
237
DQ56
236
DQ57
249
DQ58
250
DQ59
232
DQ60
233
DQ61
245
DQ62
246
DQ63
13
DQS0
34
DQS1
55
DQS2
76
DQS3
179
DQS4
200
DQS5
221
DQS6
242
DQS7
97
DQS8
11
DQS#0
32
DQS#1
53
DQS#2
74
DQS#3
177
DQS#4
198
DQS#5
219
DQS#6
240
DQS#7
95
DQS#8
VREF CA DIMM1 Solution
R357
*0_4_S
R356 2/F_4
C455
0.022U/16V/X7R_4
1 2
R343
24.9/F_4
M_B_DQ12
M_B_DQ8
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ9
M_B_DQ10
M_B_DQ14
M_B_DQ1
M_B_DQ4
M_B_DQ7
M_B_DQ2
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ6
M_B_DQ21
M_B_DQ19
M_B_DQ23
M_B_DQ17
M_B_DQ16
M_B_DQ20
M_B_DQ22
M_B_DQ18
M_B_DQ24
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ25
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ33
M_B_DQ32
M_B_DQ34
M_B_DQ35
M_B_DQ37
M_B_DQ36
M_B_DQ39
M_B_DQ38
M_B_DQ41
M_B_DQ40
M_B_DQ42
M_B_DQ47
M_B_DQ44
M_B_DQ45
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ53
M_B_DQ54
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ51
M_B_DQ55
M_B_DQ56
M_B_DQ61
M_B_DQ58
M_B_DQ63
M_B_DQ60
M_B_DQ57
M_B_DQ59
M_B_DQ62
M_B_DQSP1
M_B_DQSP0
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSP8
M_B_DQSN1
M_B_DQSN0
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSN8
+1.2V_SUS
1K/F_4
VREF_CA_DIMM1
R355
1K/F_4
3
M_B_DQ[63:0] {3}
M_B_DQSP[7:0] {3}
M_B_DQSN[7:0] {3}
+1.2V_SUS
3
+1.2V_SUS
R335
240/F_4
M_B_DQSP8
+1.2V_SUS
R334
240/F_4
M_B_DQSN8
EC19 *E@3.3P/50V/C0G_4
C442 1U/6.3V_4X
C441 1U/6.3V_4X
C458 1U/6.3V_4X
C463 1U/6.3V_4X
C443 10U/6.3V_4
C440 10U/6.3V_4
C444 10U/6.3V_4
C457 10U/6.3V_4
C449 E@100P/50V_4
C462 10U/6.3V_4
C439 E@100P/50V_4
C461 10U/6.3V_4
C459 10U/6.3V_4
C460 1U/6.3V_4X
C445 1U/6.3V_4X
C438 1U/6.3V_4X
C456 1U/6.3V_4X
2250mA
+1.2V_SUS
Place these Caps near So-Dimm1
+0.6V_DDR_VTT
C470 *3.3P/50V/C0G_4
C475 *10U/6.3V_4
C469 *10U/6.3V_4
C471 1U/6.3V_4X
C472 1U/6.3V_4X R354
C473 1U/6.3V_4X
C474 1U/6.3V_4X
VREF_CA_DIMM1
C464 *0.047U/10V_4
C466 0.1U/16V/X7R_4
C465 2.2U/6.3V/X5R_4
2
+1.2V_SUS {3,6,16,50}
+3V {2,4,10,11,12,13,14,15,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+2.5V_SUS {16,50}
+0.6V_DDR_VTT {16,50}
+3V_DEEP_SUS {4,10,11,14,15}
CON1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
2
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
VREF_CA_DIMM1
+2.5V_SUS
+3V
+3V
0.5A
+2.5V_SUS
600mA
+0.6V_DDR_VTT
C437 1U/6.3V_4X
C447 1U/6.3V_4X
C446 10U/6.3V_4
C448 10U/6.3V_4
EC18 *E@3.3P/50V/C0G_4
C450 0.1U/16V/X7R_4
C467 2.2U/6.3V/X5R_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR4 DIMM1-RVS
DDR4 DIMM1-RVS
DDR4 DIMM1-RVS
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
17 61 Friday, March 11, 2016
17 61 Friday, March 11, 2016
1
17 61 Friday, March 11, 2016
1A
1A
1A
U34A
18
PEG_TXP0 {12}
PEG_TXN0 {12}
PEG_TXP1 {12}
PEG_TXN1 {12}
PEG_TXP2 {12}
PEG_TXN2 {12}
PEG_TXP3 {12}
PEG_TXN3 {12}
CLK_PCIE_VGAP {13}
CLK_PCIE_VGAN {13}
R164 EV@1K_4
DGPU_HOLD_RST# {14}
PLTRST# {4,28,30,31,33,36,37}
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
TEST_PG
PERST#_BUF
C294 EV@100P/50V_4
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
Y28
Y30
W31
W29
V28
V30
U31
U29
T28
T30
R31
R29
P28
P30
N31
N29
M28
M30
L31
L29
K30
AK30
AK32
N10
AL27
+3V
C339 E@0.1U/16V/X7R_4
U8
2
1
EV@TC7SH08FU(F)
3 5
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
NC#V30
NC#U31
NC#U29
NC#T28
NC#T30
NC#R31
NC#R29
NC#P28
NC#P30
NC#N31
NC#N29
NC#M28
NC#M30
NC#L31
NC#L29
NC#K30
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
EV@100-CG2633(216-0867030)
PERST#_BUF
4
PCI EXPRESS INTERFACE
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
NC#W24
NC#W23
NC#V27
NC#U26
NC#U24
NC#U23
NC#T26
NC#T27
NC#T24
NC#T23
NC#P27
NC#P26
NC#P24
NC#P23
NC#M27
NC#N26
CALIBRATION
PCIE_CALR_TX
PCIE_CALR_RX
R209
*EV@100K_4
AH30
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
C_PEG_RXP0
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
SUN_PCIE_CALRP
SUN_PCIE_CALRN
SUSB# {4,36}
C716 EV@0.22U/10V_4X
C713 EV@0.22U/10V_4X
C712 EV@0.22U/10V_4X
C710 EV@0.22U/10V_4X
C699 EV@0.22U/10V_4X
C704 EV@0.22U/10V_4X
C707 EV@0.22U/10V_4X
C709 EV@0.22U/10V_4X
R162 EV@1.69K/F_4
R168 EV@1K/F_4
D7 *EV@DB2J40600L
+0.95V_VGA
C3A
R208 *EV@0_4
PEG_RXP0 {12}
PEG_RXN0 {12}
PEG_RXP1 {12}
PEG_RXN1 {12}
PEG_RXP2 {12}
PEG_RXN2 {12}
PEG_RXP3 {12}
PEG_RXN3 {12}
dGPU power enable
+3V
R214
*EV@1K_4
DGPU_PWR_EN
DGPU_PWR_EN {14,56}
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
JET_S3_PCIE_Interface
JET_S3_PCIE_Interface
JET_S3_PCIE_Interface
LV6
LV6
LV6
18 61 Friday, March 11, 2016
18 61 Friday, March 11, 2016
18 61 Friday, March 11, 2016
1A
1A
1A
The SMBus slave ID is default 0x41
+3V_VGA
R191
EV@47K_4
DGPUT_DATA
1
Q19A
+3V_VGA
R186
EV@47K_4
DGPUT_CLK
Q19B
PU/PD
R185
*EV@10K_4
R155
EV@1K_4
3
Q14
*EV@2N7002K
2
1
+3V_VGA
3
Q16
*EV@2N7002K
R623
EV@1M/F_4
C311
M1@10U/6.3V/X5R_6X
M1 MLPS setting
M2 no mount
M1 ONLY: stuff Ra=> disable MLPS
MBDATA_THRM {10,36,37,42}
MBCLK_THRM {10,36,37,42}
+3V_VGA
R184 EV@10K_4
R178 *EV@10K_4
R562 *EV@10K_4
R560 *EV@10K_4
R556 *EV@10K_4
R156 *EV@10K_4
R567 EV@10K_4
R171 EV@10K_4
R159 *EV@5.1K/F_4
R563
R561 *EV@10K_4
SYS_SHDN# {36,37,55}
PCIE_CLK_VGA_REQ# {13}
C728 EV@8.2P/50V_4
C717 EV@8.2P/50V_4
+3V_VGA
6
EV@2N7002KDW
+3V_VGA
3 4
EV@2N7002KDW
DGPU_OPP#
OCP_L
DGPU_TDI
DGPU_TMS
DGPU_TDO
DGPU_TRSTB
PEX_CLKREQ#
VGA_ALERT
TESTEN
EV@10K_4
TEMP_FAIL
DGPU_TCK
EVGA-XTALI
2 3
Y4
EV@27MHZ_10
4 1
EVGA-XTALO
L11 EV@HCB1608KF-121T20_2A
+1.8V_VGA
1.8V(5mA TSVDD)
2
5
DGPU_OPP {36}
EV@2N7002K
R179 *EV@1K/F_4
OCP_L {52}
2
1
Ra
R575 *M1@10K_4
+3V_VGA
Rb
R574 M1@10K_4
C271
M1@0.1U/16V/X7R_4
stuff Rb=> enable MLPS
DGPU_OPP#
DGPU_OPP
+1.8V_VGA
+3V_VGA
C264
*EV@0.1U/16V/X7R_4
PEX_CLKREQ#
C283
M2@1U/10V/X5R_4
3
Q17
2
1
R585 M2@10K_4
R584 M2@10K_4
R571 *EV@10K_4
R572 *EV@10K_4
DGPUT_DATA
DGPUT_CLK
DGPU_OPP#
GPU_GPIO6
GPU_GPIO15
VGA_ALERT
TEMP_FAIL
GPU_GPIO20
DGPU_TRSTB
DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO
TESTEN
TP5
R170 EV@10K_4
R165 EV@10K_4
GPU_THERMDA
TP32
GPU_THERMDC
TP33
GPU_GPIO28
+1.8V_TSVDD
D3A
EVGA-XTALI
EVGA-XTALO
U34B
DVO
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC5
NC#AC5
AC6
N#CAC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1/BP_0
U3
NC#U3/BP_1
Y6
NC#Y6
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
U6
GPIO_0
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
PCC/GPIO_6
T7
NC_GPIO_7
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
NC_GPIO_11
N5
NC_GPIO_12
N3
NC_GPIO_13
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
W8
NC_GENERICB
W7
NC_GENERICD
AD10
NC_GENERICE_HPD4
AJ9
NC#AJ9
AL9
DBG_CNTL0
AB16
PX_EN
AC16
NC_DBG_VREFG
PLL/CLOCK
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
EV@100-CG2633(216-0867030)
U34G
AG15
NC_DP_VDDR#1
AG16
AF2
NC#AF2
AF4
NC#AF4
AG3
NC#AG3
NC#AG5
NC#AH3
NC#AH1
NC#AK3
NC#AK1
NC#AK5
NC#AM3
NC#AK6
NC#AM5
NC#AJ7
NC#AH6
NC#AK8
NC#AL7
NC#V4
NC#U5
NC#V2
NC#Y4
NC#W5
NC#Y2
NC#J8
DCM/NC_R
NC_AVSSN#AK26
NC_G
NC_AVSSN#AJ25
NC_B
NC_AVSSN#AG25
NC_HSYNC
NC_RSET
NC_AVDD
NC_AVSSQ
NC_VDD1DI
NC_VSS1DI
NC_GENLK_CLK
NC_SWAPLOCKA
NC_SWAPLOCKB
NC_DDC1CLK
NC_DDC1DATA
NC_AUX1P
NC_AUX1N
NC_AUX2P
NC_AUX2N
NC#AE16
NC#AD16
NC_DDCVGACLK
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
U5
V2
Y4
W5
Y2
J8
AA1
AA3
AM26
AK26
AL25
AJ25
AH24
AG25
AH26
AJ27
AD22
AG24
AE22
AE23
AD23
AM12
NC
AK12
AL11
AJ11
AL13
AJ13
AG13
AH12
AC19
PS_0
AD19
PS_1
AE17
PS_2
AE20
PS_3
AE19
TS_A
AE6
AE5
AD2
AD4
AD13
AD11
AE16
AD16
AC1
AC3
+0.95V_VGA
TP41
R604
M2@16.2K/F_4
PLL_ANALOG_OUT: Provide a pull-down
resistor on the PCB (DNI).FOR TOPAZ ONLY
+3V_VGA
R644
*M2@10K_4
PCIE_WAKE#_GPU
R616 M2@0_4
R621 M2@0_4
PS_0
PS_1
PS_2
PS_3
R630
*EV@0_4
+1.8V_VGA +1.8V_VGA
TP43
TP42
DPA
DPB
DPC
NC#AA1/PLL_ANALOG_IN
NC#AA3/PLL_ANALOG_OUT
I2C
DAC1
NC_VSYNC/WAKEb
NC_SVI2#1/GPIO_SVD
NC_SVI2#2/GPIO_SVT
NC_SVI2#3/GPIO_SVC
NC_GENLK_VSYNC
DAC2
DDC/AUX
THERMAL
NC_DDCVGADATA
+1.8V_VGA
Q20
PCIE_WAKE#
3
*EV@2N7002K
+1.8V_VGA
+3V_VGA
C284
EV@1U/10V/X5R_4
C259
EV@0.1U/16V/X7R_4
+1.8V_VGA
C230
M1@0.1U/16V/X7R_4
C258
M1@0.1U/16V/X7R_4
1
GPU_SVD_R
GPU_SVT
GPU_SVC_R
C300
EV@10U/6.3V/X5R_6X
C272
EV@1U/10V/X5R_4
2
C265
M1@0.1U/16V/X7R_4
C664
M1@10U/10V_8X
PCIeR Optimized Buffer Flush/Fill (OBFF)
on WAKEB FOR TOPAZ ONLY
R645
EV@4.7K_4
R639
*EV@10K_4
R16M-M2-50 R16M-M1-30
PS0[5:1] 11001
PS1[5:1]
PS2[5:1]
PS3[5:1]
R641
EV@8.45K/F_4
PS_0 PS_1
R640
EV@2K/F_4
11001
11001
11000
11xxx
C733
*EV@0.082U/16V_4X
11001
11000
11xxx
NC_DP_VDDR#2
AF16
NC_DP_VDDR#3
AG17
NC_DP_VDDR#4
AG18
NC_DP_VDDR#5
AG19
NC_DP_VDDR#6
AF14
DP_PVDD
AG20
NC_DP_VDDC#1
AG21
NC_DP_VDDC#2
AF22
NC_DP_VDDC#3
AG22
NC_DP_VDDC#4
AD14
DP_VDDC
AG14
NC_DP_VSSR#1
AH14
NC_DP_VSSR#2
AM14
NC_DP_VSSR#3
AM16
NC_DP_VSSR#4
AM18
NC_DP_VSSR#5
AF23
NC_DP_VSSR#6
AG23
NC_DP_VSSR#7
AM20
NC_DP_VSSR#8
AM22
NC_DP_VSSR#9
AM24
NC_DP_VSSR#10
AF19
NC_DP_VSSR#11
AF20
NC_DP_VSSR#12
AE14
DP_VSSR
AF17
NC_UPHYAB_DP_CALR
EV@100-CG2633(216-0867030)
PCIE_WAKE# {4,30,33}
R610
*M2@10K_4
R605
M2@10K_4
SVC SVD
0 0
001
1
1 1
R197
M2@10K_4
GPU_SVD_R
GPU_SVC_R
R193
*M2@10K_4
PS_3[3:1]
011
100 Hynix- 2G 256Mx16 *4, 900Mhz H5TC4G63CFR-N0C 4.53K 4.99K
101
R638
EV@8.45K/F_4
R637
EV@2K/F_4
GPU_SVT
C730
*EV@0.01U/50V_4X
NC/DP POWER DP POWER
AE11
NC#AE11
AF11
NC#AF11
AE13
NC#AE13
AF13
NC#AF13
AG8
NC#AG8
AG10
NC#AG10
AF6
NC#AF6
AF7
NC#AF7
AF8
NC#AF8
AF9
NC#AF9
AE1
NC#AE1
AE3
NC#AE3
AG1
NC#AG1
AG6
NC#AG6
AH5
NC#AH5
AF10
NC#AF10
AG9
NC#AG9
AH8
NC#AH8
AM6
NC#AM6
AM8
NC#AM8
AG7
NC#AG7
AG11
NC#AG11
AE10
NC#AE10
Output Voltage
1.1 Volts
1.0 Volts
0.9 Volts
R16M Boot
0.8 Volts
Level Shift
+3V_VGA
R573
R166
*M1@10K_4
M1@10K_4
GPU_GPIO15
GPU_GPIO20
R172
R566
M1@10K_4
*M1@10K_4
R622 *M2@SHORT_4
GPU_SVD_R
GPU_SVC_R
GPU_SVT_R {52}
GPU_SVD_R {52}
GPU_SVC_R {52}
Vendor Type Vendor P/N
Samsung- 2G
Micro- 2G
256Mx16 *4, 900Mhz
256Mx16 *4, 900Mhz
+1.8V_VGA
R629
*EV@0_4
PS_2
R628
EV@4.75K/F_4
+1.8V_VGA
GPU_SVD_R
+1.8V_VGA
GPU_SVC_R
C725
*EV@0.082U/16V_4X
1
VCCA
3
A
2
GND
M1@G2129TL1U
1
VCCA
3
A
2
GND
M1@G2129TL1U
K4W4G1646E-BC1A
VCCB
VCCB
B
OE
B
OE
U37
6
4
5
U7
6
4
5
19
+3V_VGA
GPU_GPIO15
R607 M1@10K_4
+3V_VGA
GPU_GPIO20
R3pu R3pd
6.98K 4.99K
3.24K 5.62K MT41J256M16LY-091G:N
00
01
10
11
+1.8V_VGA
C ( nF) BIT[5:4]
680
82
10
NC
Rpu Rpd BIT[3:1]
000
+1.8V_VGA +1.8V_VGA
R210
S2G@6.98K/F_4
PS_3 PS_3
R204
S2G@4.99K/F_4
R213
M2G@3.24K/F_4
R206
M2G@5.62K/F_4
C282
*EV@680P/50V_4X
+1.8V_VGA
R219
H2G@4.53K/F_4
PS_3
R224
H2G@4.99K/F_4
NC 4750
001
8450 2000
010
4530 2000
011
6980 4990
100
4530 4990
101
3240 5620
110
3400 10000
111
4750 NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
JET_S3_Main/DP PWR/Strap
JET_S3_Main/DP PWR/Strap
JET_S3_Main/DP PWR/Strap
LV6
LV6
LV6
19 61 Friday, March 11, 2016
19 61 Friday, March 11, 2016
19 61 Friday, March 11, 2016
1A
1A
1A
U34E
AA27
PCIE_VSS#1
AB24
PCIE_VSS#2
AB32
PCIE_VSS#3
AC24
PCIE_VSS#4
AC26
PCIE_VSS#5
AC27
PCIE_VSS#6
AD25
PCIE_VSS#7
AD32
PCIE_VSS#8
AE27
PCIE_VSS#9
AF32
PCIE_VSS#10
AG27
PCIE_VSS#11
AH32
PCIE_VSS#12
K28
PCIE_VSS#13
K32
PCIE_VSS#14
L27
PCIE_VSS#15
M32
PCIE_VSS#16
N25
PCIE_VSS#17
N27
PCIE_VSS#18
P25
PCIE_VSS#19
P32
PCIE_VSS#20
R27
PCIE_VSS#21
T25
PCIE_VSS#22
T32
PCIE_VSS#23
U25
PCIE_VSS#24
U27
PCIE_VSS#25
V32
PCIE_VSS#26
W25
PCIE_VSS#27
W26
PCIE_VSS#28
W27
PCIE_VSS#29
Y25
PCIE_VSS#30
Y32
PCIE_VSS#31
M6
GND#56
N11
GND#57
N13
GND#58
N16
GND#59
N18
GND#60
N21
GND#61
P6
GND#62
P9
GND#63
R12
GND#64
R15
GND#65
R17
GND#66
R20
GND#67
T13
GND#68
T16
GND#69
T18
GND#70
T21
GND#71
T6
GND#72
U15
GND#73
U17
GND#74
U20
GND#75
U9
GND#76
V13
GND#77
V16
GND#78
V18
GND#79
Y10
GND#80
Y15
GND#81
Y17
GND#82
Y20
GND#83
AA11
GND#86
M12
GND#87
V11
GND#88
EV@100-CG2633(216-0867030)
GND
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#84
GND#85
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
A32
AM1
AM32
U34F
LVDS CONTROL
NC_UPHYAB_TMDPA_TX0N
NC_UPHYAB_TMDPA_TX0P
NC_UPHYAB_TMDPA_TX1N
NC_UPHYAB_TMDPA_TX1P
NC_UPHYAB_TMDPA_TX2N
NC_UPHYAB_TMDPA_TX2P
NC_UPHYAB_TMDPA_TX3N
NC_UPHYAB_TMDPA_TX3P
NC_TXOUT_L3P
NC_TXOUT_L3N
TMDP
NC_UPHYAB_TMDPB_TX0N
NC_UPHYAB_TMDPB_TX0P
NC_UPHYAB_TMDPB_TX1N
NC_UPHYAB_TMDPB_TX1P
NC_UPHYAB_TMDPB_TX2N
NC_UPHYAB_TMDPB_TX2P
NC_UPHYAB_TMDPB_TX3N
NC_UPHYAB_TMDPB_TX3P
NC_TXOUT_U3P
NC_TXOUT_U3N
EV@100-CG2633(216-0867030)
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
All the ASIC supplies must reach their respective
nominal voltages within 20 ms of the start of the
ramp-up sequence, though a shorter ramp-up
duration is preferred. The maximum slew rate on
all rails is 50 mV/µ s.
It is recommended that the 3.3-V rail ramp up first
The 3.3-V, 1.8-V, and 1.0-V rails must reach their
ready state at least 10 µ s before VDDC, VDDCI,
and VMEMIO start to ramp up.
For power down, reversing the ramp-up sequence is
recommended.
Power Up/Down Sequence
+3V_VGA
+1.8V_VGA
+1.0V_VGA
+1.35V_VGA
20ms
10us
20ms
+VGA_CORE
20
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
JET_S3_GND/LVDS
JET_S3_GND/LVDS
JET_S3_GND/LVDS
LV6
LV6
LV6
20 61 Friday, March 11, 2016
20 61 Friday, March 11, 2016
20 61 Friday, March 11, 2016
1A
1A
1A
21
+1.35V_VGA
+0.95V_VGA
C624
EV@10U/6.3V/X5R_6X
C112
*EV@4.7U/6.3V_6X
C142
*EV@10P/50V_4C
+1.8V_VGA
+1.8V_VGA
1.35V ( DDR3, MVDDQ = 1.35V@1.2A)
C623
M1@10U/6.3V/X5R_6X
C111
M1@10U/6.3V/X5R_6X
C133
EV@2.2U/6.3V/X5R_4
L10 EV@BLM15PX181SN1D
Memory Phase Lock Loop Power :
1.8V @ 90mA
L8 EV@HCB1608KF-121T20_2A
Engine Phase Lock Loop Power :
analog power pin for engine PLL
1.8V @ 75mA
L9 EV@HCB1608KF-121T20_2A
Engine Phase Lock Loop Power :
digital power pin for engine PLL
0.95V @ 100mA
C176
*EV@4.7U/6.3V_6X
C132
M1@0.1U/16V/X7R_4
C140
EV@10P/50V_4C
C155
M1@0.1U/16V/X7R_4
C165
EV@2.2U/6.3V/X5R_4
C164
M1@0.1U/16V/X7R_4
C216
M2@1U/10V/X5R_4
U34D
Power VMEMIO
C640
EV@2.2U/6.3V/X5R_4
C174
M1@0.1U/16V/X7R_4
C166
M1@0.1U/16V/X7R_4
C131
*EV@10P/50V_4C
C215
M1@0.1U/16V/X7R_4 C746
C162
EV@1U/10V/X5R_4
C178
M1@10U/6.3V/X5R_6X
C128
EV@2.2U/6.3V/X5R_4
C168
*EV@10P/50V_4C
+1.8V_VGA
+3V_VGA
C251
M1@1U/10V/X5R_4
C223
EV@10U/6.3V/X5R_6X
C161
M1@0.1U/16V/X7R_4
+0.95V_VGA_SPV10
C172
EV@0.1U/16V/X7R_4
VDD_GPIO18 @13mA
C257
EV@1U/10V/X5R_4
VDD_GPIO33@25mA
C231
M1@1U/10V/X5R_4
MPV18
C224
EV@10U/6.3V/X5R_6X
SPV18
C157
EV@10U/6.3V/X5R_6X
C173
EV@1U/10V/X5R_4
C167
EV@2.2U/6.3V/X5R_4
C163
M1@0.1U/16V/X7R_4
C248
M1@0.1U/16V/X7R_4
C228
EV@1U/10V/X5R_4
MPV18
SPV18
MEM I/O
H13
VDDR1#1
H16
VDDR1#2
H19
VDDR1#3
J10
VDDR1#4
J23
VDDR1#5
J24
VDDR1#6
J9
VDDR1#7
K10
VDDR1#8
K23
VDDR1#9
K24
VDDR1#10
K9
VDDR1#11
L11
VDDR1#12
L12
VDDR1#13
L13
VDDR1#14
L20
VDDR1#15
L21
VDDR1#16
L22
VDDR1#17
LEVEL
TRANSLATION
AA20
VDD_CT#1
AA21
VDD_CT#2
AB20
VDD_CT#3
AB21
VDD_CT#4
I/O
AA17
VDDR3#1
AA18
VDDR3#2
AB17
VDDR3#3
AB18
VDDR3#4
V12
NC_VDDR4#1
Y12
NC_VDDR4#2
U12
NC_VDDR4#3
PLL
L8
MPLL_PVDD
H7
SPLL_PVDD
H8
SPLL_VDDC
J7
SPLL_PVSS
EV@100-CG2633(216-0867030)
PCIE_PVDD
PCIE
NC#AB23
NC#AC23
NC#AD24
NC#AE24
NC#AE25
NC#AE26
NC#AF25
NC#AG26
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDDC#1
CORE
VDDC#2
VDDC#3
POWER
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC/VARY_BL
VDDC/DIGON
VDDC/GENERICA
VDDC/GENERICC
VDDC/DDC2CLK
VDDC/DDC2DATA
VDDC/HPD1
VDDC/GPIO_1
VDDC/GPIO_2
VDDC/GPIO_18
VDDC/GPIO_14_HPD2
BIF_VDDC_1
BIF_VDDC_2
VDDCI#1
ISOLATED
VDDCI#2
CORE I/O
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
NC#W1/FB_VDDCI
NC#W3/FB_VSS
NC#FB_VDDC
NC#FB_VSS
PCIE_VDDR : 1.8V @ 100mA
AM30
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
AA12
M11
N12
U11
AB11
AB12
AB13
W9
AC11
AC13
AC14
U10
T10
W10
Y9
R21
U21
M13
M15
M16
M17
M18
M20
M21
N20
W1
W3
AC20
AD20
C280
EV@1U/10V/X5R_4
PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
C681
M1@10U/6.3V/X5R_6X
VDDC+VDDCI:0.85~1.1V(14.2A peak )( Ripple < 87.2mV)
C189
EV@2.2U/6.3V/X5R_4
C184
EV@2.2U/6.3V/X5R_4
C327
M2@10U/6.3V/X5R_6X
+0.95V_VGA
C234
M2@2.2U/6.3V/X5R_4
R589 *M2@SHORT_4
R593 *M2@SHORT_4
R181 *M2@SHORT_4
R183 *M2@SHORT_4
+1.8V_VGA
C281
M1@10P/50V_4C
C205
M1@1U/10V/X5R_4
C201
EV@2.2U/6.3V/X5R_4
C244
EV@2.2U/6.3V/X5R_4
C335
M2@10U/6.3V/X5R_6X
C217
M1@0.1U/16V/X7R_4
VDDC_SEN {52}
VDDC_RTN {52}
C313
EV@10U/6.3V/X5R_6X
C212
EV@1U/10V/X5R_4
C266
EV@2.2U/6.3V/X5R_4
C183
EV@2.2U/6.3V/X5R_4
C320
EV@10U/6.3V/X5R_6X
0.95V~1.1V(2A VDDCI)
C233
EV@1U/10V/X5R_4
+VGA_CORE
C288
M1@0.1U/16V/X7R_4
+0.95V_VGA
C210
EV@1U/10V/X5R_4
Power VDDC
C249
EV@2.2U/6.3V/X5R_4
C226
EV@2.2U/6.3V/X5R_4
EV@10U/6.3V/X5R_6X
C232
EV@1U/10V/X5R_4
C687
EV@1U/10V/X5R_4
+VGA_CORE
C267
EV@2.2U/6.3V/X5R_4
C268
EV@2.2U/6.3V/X5R_4
+VGA_CORE
C254
EV@1U/10V/X5R_4
C692
EV@1U/10V/X5R_4
C197
EV@2.2U/6.3V/X5R_4
C250
EV@2.2U/6.3V/X5R_4
C747
M2@10U/6.3V/X5R_6X
C214
M1@0.1U/16V/X7R_4
C211
EV@1U/10V/X5R_4
C200
EV@2.2U/6.3V/X5R_4
C198
EV@2.2U/6.3V/X5R_4
C328
EV@10U/6.3V/X5R_6X
C732
EV@10U/6.3V/X5R_6X
C221
EV@1U/10V/X5R_4
C192
EV@10U/6.3V/X5R_6X
C206
M1@0.1U/16V/X7R_4
C199
M2@2.2U/6.3V/X5R_4
C336
EV@10U/6.3V/X5R_6X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
JET_S3_Power
JET_S3_Power
JET_S3_Power
LV6
LV6
LV6
21 61 Friday, March 11, 2016
21 61 Friday, March 11, 2016
21 61 Friday, March 11, 2016
1A
1A
1A
VMA_ODT0 {23,24}
VMA_ODT1 {23,24}
VMA_RAS0# {23,24}
VMA_RAS1# {23,24}
VMA_CAS0# {23,24}
VMA_CAS1# {23,24}
VMA_WE0# {23,24}
VMA_WE1# {23,24}
VMA_CS00# {23}
VMA_CS01# {24}
VMA_CS10# {23}
VMA_CS11# {24}
VMA_CKE0 {23,24}
VMA_CKE1 {23,24}
VMA_CLK0 {23,24}
VMA_CLK0# {23,24}
VMA_CLK1 {23,24}
VMA_CLK1# {23,24}
VMA_WDQS[7..0] {23,24}
VMA_RDQS[7..0] {23,24}
VMA_DM[7..0] {23,24}
VMA_DQ[63..0] {23,24}
VMA_MA[14..0] {23,24}
VMA_BA0 {23,24}
VMA_BA1 {23,24}
VMA_BA2 {23,24}
C170
EV@1U/6.3V_4X
VMA_WDQS[7..0]
VMA_RDQS[7..0]
support 1Gbit
VRAM ( 64M X 16 )
+1.35V_VGA
R147
EV@40.2/F_4
R148
EV@100/F_4
MVREFS
C159
EV@1U/6.3V_4X
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_RAS1#
VMA_CAS0#
VMA_CAS1#
VMA_WE0#
VMA_WE1#
VMA_CS00#
VMA_CS01#
VMA_CS10#
VMA_CS11#
VMA_CKE0
VMA_CKE1
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
VMA_DM[7..0]
VMA_DQ[63..0]
VMA_MA[14..0]
VMA_BA0
VMA_BA1
VMA_BA2
MVREFD
+1.35V_VGA
R144
EV@40.2/F_4
R145
EV@100/F_4
R143 EV@120/F_4
Rd
C191
*EV@0.1U/16V/X7R_4
R151
*EV@51.1/F_4
U34C
VMA_DQ0
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K26
J26
J25
K25
L10
K8
L7
C672
*EV@0.1U/16V/X7R_4
DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
MVREFDA
MVREFSA
NC
MEM_CALRP0
DRAM_RST
CLKTESTA
CLKTESTB
EV@100-CG2633(216-0867030)
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
DRAM_RST VMA_WE1#
CLKTESTA
CLKTESTB
R564
*EV@51.1/F_4
MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8
MAA0_9
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7
MMA1_8
MAA1_9
WCKA0_0
WCKA0B_0
WCKA0_1
WCKA0B_1
WCKA1_0
WCKA1B_0
WCKA1_1
MEMORY INTERFACE
WCKA1B_1
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3
ADBIAO
ADBIA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
VMA_MA0
K17
VMA_MA1
J20
VMA_MA2
H23
VMA_MA3
G23
VMA_MA4
G24
VMA_MA5
H24
VMA_MA6
J19
VMA_MA7
K19
VMA_MA13
G20
L17
VMA_MA8
J14
VMA_MA9
K14
VMA_MA10
J11
VMA_MA11
J13
VMA_MA12
H11
VMA_BA2
G11
VMA_BA0
J16
VMA_BA1
L15
VMA_MA14
G14
L16
E32
E30
A21
C21
E13
D12
E3
F4
VMA_RDQS0
H28
VMA_RDQS1
C27
VMA_RDQS2
A23
VMA_RDQS3
E19
VMA_RDQS4
E15
VMA_RDQS5
D10
VMA_RDQS6
D6
VMA_RDQS7
G5
VMA_WDQS0
H27
VMA_WDQS1
A27
VMA_WDQS2
C23
VMA_WDQS3
C19
VMA_WDQS4
C15
VMA_WDQS5
E9
VMA_WDQS6
C5
VMA_WDQS7
H4
VMA_ODT0
L18
VMA_ODT1
K16
VMA_CLK0
H26
VMA_CLK0#
H25
VMA_CLK1
G9
VMA_CLK1#
H9
VMA_RAS0#
G22
VMA_RAS1#
G17
VMA_CAS0#
G19
VMA_CAS1#
G16
VMA_CS00#
H22
VMA_CS01#
J22
VMA_CS10#
G13
VMA_CS11#
K13
VMA_CKE0
K20
VMA_CKE1
J17
VMA_WE0#
G25
H10
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
25mm (max) 25mm (max) 5mm (max)
DRAM_RST
From GPU
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
R140 EV@10/F_4
R139
EV@4.99K/F_4
R141 EV@51_4
C152
EV@120P/50V_4N
22
DRAM_RST_M {23,24}
route 50ohms
single-ended/100ohms diff
and keep short
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
JET_S3_MEM_Interface
JET_S3_MEM_Interface
JET_S3_MEM_Interface
LV6
LV6
LV6
22 61 Friday, March 11, 2016
22 61 Friday, March 11, 2016
22 61 Friday, March 11, 2016
1A
1A
1A
DRAM_RST_M {22,24}
VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_MA[14..0]
VMA_DM[7..0]
VMA_BA0 {22,24}
VMA_BA1 {22,24}
VMA_BA2 {22,24}
VMA_CLK0 {22,24}
VMA_CLK0# {22,24}
VMA_CKE0 {22,24}
VMA_ODT0 {22,24}
VMA_CS00# {22}
VMA_RAS0# {22,24}
VMA_CAS0# {22,24}
VMA_WE0# {22,24}
Should be 240
Ohms +-1%
VREFC_U2004
VREFD_U2004
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_RDQS2
VMA_WDQS2
VMA_DM2
VMA_DM0
VMA_RDQS0
VMA_WDQS0
DRAM_RST_M
U32
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
VMA_BA0 VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CS00#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_U2004
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
R551
EV@243/F_4
J1
L1
J9
L9
EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VMA_DQ16
E3
VMA_DQ22
F7
VMA_DQ17
F2
VMA_DQ23
F8
VMA_DQ19
H3
VMA_DQ20
H8
VMA_DQ18
G2
VMA_DQ21
H7
VMA_DQ7
D7
VMA_DQ3
C3
VMA_DQ5
C8
VMA_DQ0
C2
VMA_DQ4
A7
VMA_DQ1
A2
VMA_DQ6
B8
VMA_DQ2
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_U2005
VREFD_U2005
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CS00#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_RDQS1
VMA_WDQS1
VMA_DM1
VMA_DM3
VMA_RDQS3
VMA_WDQS3
DRAM_RST_M
VMA_U2005
R523
EV@243/F_4
VMA_DQ[63..0] {22,24}
VMA_WDQS[7..0] {22,24}
VMA_RDQS[7..0] {22,24}
VMA_MA[14..0] {22,24}
VMA_DM[7..0] {22,24}
Channel A _Rank0: 2Gb/4Gb gDDR3L
U30
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VMA_DQ11
E3
VMA_DQ12
F7
VMA_DQ8
F2
VMA_DQ14
F8
VMA_DQ10
H3
VMA_DQ13
H8
VMA_DQ9
G2
VMA_DQ15
H7
VMA_DQ28
D7
VMA_DQ24
C3
VMA_DQ29
C8
VMA_DQ26
C2
VMA_DQ31
A7
VMA_DQ27
A2
VMA_DQ30
B8
VMA_DQ25
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_U2006
VREFD_U2006
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CS10#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS4
VMA_WDQS4
VMA_DM4
VMA_DM5
VMA_RDQS5
VMA_WDQS5
DRAM_RST_M
U33
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
VMA_U2006
RESET
L8
ZQ
R524
EV@243/F_4
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
23
U31
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
VMA_U2007
L8
R508
EV@243/F_4
J1
L1
J9
L9
EV@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ58
E3
VMA_DQ63
F7
VMA_DQ59
F2
VMA_DQ60
F8
VMA_DQ57
H3
VMA_DQ62
H8
VMA_DQ56
G2
VMA_DQ61
H7
VMA_DQ52
D7
VMA_DQ48
C3
VMA_DQ51
C8
VMA_DQ49
C2
VMA_DQ53
A7
VMA_DQ50
A2
VMA_DQ55
B8
VMA_DQ54
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_U2007
VREFD_U2007
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CS10#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS7
VMA_WDQS7
VMA_DM7
VMA_DM6
VMA_RDQS6
VMA_WDQS6
DRAM_RST_M
VMA_DQ32
E3
VMA_DQ36
F7
VMA_DQ33
F2
VMA_DQ39
F8
VMA_DQ35
H3
VMA_DQ37
H8
VMA_DQ34
G2
VMA_DQ38
H7
VMA_DQ47
D7
VMA_DQ42
C3
VMA_DQ46
C8
VMA_DQ43
C2
VMA_DQ44
A7
VMA_DQ40
A2
VMA_DQ45
B8
VMA_DQ41
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK1 {22,24}
VMA_CLK1# {22,24}
VMA_CKE1 {22,24}
VMA_ODT1 {22,24}
VMA_CS10# {22}
VMA_RAS1# {22,24}
VMA_CAS1# {22,24}
VMA_WE1# {22,24}
MEM Reference Voltage 1 MEM Reference Voltage 2 MEM Reference Voltage 3 MEM Reference Voltage 4
+1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA
C110
EV@4.7U/6.3V_6X
C94
EV@1U/6.3V_4X
C127
EV@1U/6.3V_4X
R519
EV@4.99K/F_4
R518
EV@4.99K/F_4
C109
EV@4.7U/6.3V_6X
C93
EV@1U/6.3V_4X
C99
EV@1U/6.3V_4X
C643
EV@0.1U/16V/X7R_4
C143
EV@4.7U/6.3V_6X
C91
EV@1U/6.3V_4X
C88
EV@1U/6.3V_4X
C126
EV@1U/6.3V_4X
R531
EV@4.99K/F_4
R530
EV@4.99K/F_4
C646
EV@0.1U/16V/X7R_4
R505
EV@4.99K/F_4
C604
R504
EV@0.1U/16V/X7R_4
EV@4.99K/F_4
CLK-A0 Termaination
CLK-A1 Termaination
VMA_CLK0
R554
EV@162/F_4
VMA_CLK0#
VMA_CLK1
R555
EV@162/F_4
VMA_CLK1#
R532
EV@4.99K/F_4
VREFC_U2006 VREFD_U2006
C647
R533
EV@0.1U/16V/X7R_4
EV@4.99K/F_4
R120
EV@80.6/F_4
VMA_CLK0_COMM
R121
EV@80.6/F_4
R526
EV@80.6/F_4
VMA_CLK1_COMM
R525
EV@80.6/F_4
C138
EV@0.01U/50V/X7R_4
C644
EV@0.01U/50V/X7R_4
R552
EV@4.99K/F_4
R553
EV@4.99K/F_4
+1.35V_VGA
+1.35V_VGA
+1.35V_VGA
+1.35V_VGA
C652
EV@0.1U/16V/X7R_4
C113
EV@4.7U/6.3V_6X
C106
EV@1U/6.3V_4X
C101
EV@1U/6.3V_4X
C98
M1@0.1U/16V/X7R_4
C146
EV@4.7U/6.3V_6X
C124
EV@1U/6.3V_4X
C100
EV@1U/6.3V_4X
C104
M1@0.1U/16V/X7R_4
R549
EV@4.99K/F_4
VREFC_U2004 VREFD_U2004
C651
R550
EV@0.1U/16V/X7R_4
EV@4.99K/F_4
VRAM De-Coupling VRAM De-Coupling
+1.35V_VGA
C145
EV@4.7U/6.3V_6X
+1.35V_VGA
C119
EV@1U/6.3V_4X
+1.35V_VGA
C118
EV@1U/6.3V_4X
+1.35V_VGA
C121
EV@0.1U/16V/X7R_4
C144
EV@4.7U/6.3V_6X
C89
EV@1U/6.3V_4X
C86
EV@1U/6.3V_4X
C90
M1@0.1U/16V/X7R_4
C108
EV@4.7U/6.3V_6X
C87
EV@1U/6.3V_4X
C95
EV@1U/6.3V_4X
C120
M1@0.1U/16V/X7R_4
C115
EV@4.7U/6.3V_6X
C122
EV@1U/6.3V_4X
C102
EV@1U/6.3V_4X
C123
EV@0.1U/16V/X7R_4
R506
EV@4.99K/F_4
VREFC_U2007 VREFD_U2007 VREFC_U2005 VREFD_U2005
R507
EV@4.99K/F_4
C148
EV@4.7U/6.3V_6X
C130
EV@1U/6.3V_4X
C96
EV@1U/6.3V_4X
R528
EV@4.99K/F_4
C612
EV@0.1U/16V/X7R_4
C147
EV@4.7U/6.3V_6X
C105
EV@1U/6.3V_4X
C125
EV@1U/6.3V_4X
R527
EV@4.99K/F_4
C114
EV@4.7U/6.3V_6X
C129
EV@1U/6.3V_4X
C103
EV@1U/6.3V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
JET_S3_VRAM_DDR3 BGA96
JET_S3_VRAM_DDR3 BGA96
JET_S3_VRAM_DDR3 BGA96
Date: Sheet of
Date: Sheet of
Date: Sheet of
C645
EV@0.1U/16V/X7R_4
C97
EV@1U/6.3V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
1A
1A
23 61 Friday, March 11, 2016
23 61 Friday, March 11, 2016
23 61 Friday, March 11, 2016
1A
DRAM_RST_M {22,23}
VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VMA_MA[14..0]
VMA_DM[7..0]
VMA_BA0 {22,23}
VMA_BA1 {22,23}
VMA_BA2 {22,23}
VMA_CLK0 {22,23}
VMA_CLK0# {22,23}
VMA_CKE0 {22,23}
VMA_ODT0 {22,23}
VMA_CS01# {22}
VMA_RAS0# {22,23}
VMA_CAS0# {22,23}
VMA_WE0# {22,23}
Should be 240
Ohms +-1%
VREFC_U2008
VREFD_U2008
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_RDQS2
VMA_WDQS2
VMA_DM2
VMA_DM0
VMA_RDQS0
VMA_WDQS0
DRAM_RST_M
U5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
VMA_BA0 VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CS01#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_U2008
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
R109
DR@243/F_4
J1
L1
J9
L9
DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VMA_DQ22
E3
VMA_DQ16
F7
VMA_DQ23
F2
VMA_DQ17
F8
VMA_DQ21
H3
VMA_DQ18
H8
VMA_DQ20
G2
VMA_DQ19
H7
VMA_DQ3
D7
VMA_DQ7
C3
VMA_DQ0
C8
VMA_DQ5
C2
VMA_DQ2
A7
VMA_DQ6
A2
VMA_DQ1
B8
VMA_DQ4
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_U2009
VREFD_U2009
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA1
VMA_BA2
VMA_CLK0
VMA_CLK0#
VMA_CKE0
VMA_ODT0
VMA_CS01#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#
VMA_RDQS1
VMA_WDQS1
VMA_DM1
VMA_DM3
VMA_RDQS3
VMA_WDQS3
DRAM_RST_M
VMA_U2009
R89
DR@243/F_4
VMA_DQ[63..0] {22,23}
VMA_WDQS[7..0] {22,23}
VMA_RDQS[7..0] {22,23}
VMA_MA[14..0] {22,23}
VMA_DM[7..0] {22,23}
Channel A _Rank1: DR@2Gb/4Gb gDDR3L
U3
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VMA_DQ12
E3
VMA_DQ11
F7
VMA_DQ14
F2
VMA_DQ8
F8
VMA_DQ15
H3
VMA_DQ9
H8
VMA_DQ13
G2
VMA_DQ10
H7
VMA_DQ24
D7
VMA_DQ28
C3
VMA_DQ26
C8
VMA_DQ29
C2
VMA_DQ25
A7
VMA_DQ30
A2
VMA_DQ27
B8
VMA_DQ31
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Should be 240
Ohms +-1%
VREFC_U2010
VREFD_U2010
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CS11#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS4
VMA_WDQS4
VMA_DM4
VMA_DM5
VMA_RDQS5
VMA_WDQS5
DRAM_RST_M
U6
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
VMA_U2010
L8
R136
DR@243/F_4
J1
L1
J9
L9
DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
24
U4
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
VMA_U2011
L8
R114
DR@243/F_4
J1
L1
J9
L9
DR@MICRON_gDDR3L _MT41K256M16HA-107G:E(FBGA)
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMA_DQ63
E3
VMA_DQ58
F7
VMA_DQ60
F2
VMA_DQ59
F8
VMA_DQ61
H3
VMA_DQ56
H8
VMA_DQ62
G2
VMA_DQ57
H7
VMA_DQ48
D7
VMA_DQ52
C3
VMA_DQ49
C8
VMA_DQ51
C2
VMA_DQ54
A7
VMA_DQ55
A2
VMA_DQ50
B8
VMA_DQ53
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK1 {22,23}
VMA_CS11# {22}
Should be 240
Ohms +-1%
VREFC_U2011
VREFD_U2011
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CLK1
VMA_CLK1#
VMA_CKE1
VMA_ODT1
VMA_CS11#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#
VMA_RDQS7
VMA_WDQS7
VMA_DM7
VMA_DM6
VMA_RDQS6
VMA_WDQS6
DRAM_RST_M
VMA_DQ36
E3
VMA_DQ32
F7
VMA_DQ39
F2
VMA_DQ33
F8
VMA_DQ38
H3
VMA_DQ34
H8
VMA_DQ37
G2
VMA_DQ35
H7
VMA_DQ42
D7
VMA_DQ47
C3
VMA_DQ43
C8
VMA_DQ46
C2
VMA_DQ41
A7
VMA_DQ45
A2
VMA_DQ40
B8
VMA_DQ44
A3
+1.35V_VGA
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.35V_VGA
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VMA_CLK1# {22,23}
VMA_CKE1 {22,23}
VMA_ODT1 {22,23}
VMA_RAS1# {22,23}
VMA_CAS1# {22,23}
VMA_WE1# {22,23}
MEM Reference Voltage 1 MEM Reference Voltage 2 MEM Reference Voltage 3 MEM Reference Voltage 4
+1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA +1.35V_VGA
R111
DR@4.99K/F_4
VREFC_U2008 VREFD_U2008 VREFC_U2009 VREFD_U2009 VREFC_U2010 VREFD_U2010 VREFC_U2011 VREFD_U2011
C135
R110
DR@0.1U/16V/X7R_4
DR@4.99K/F_4
R138
DR@4.99K/F_4
R137
DR@4.99K/F_4
C141
DR@0.1U/16V/X7R_4
R91
DR@4.99K/F_4
R90
DR@4.99K/F_4
C92
DR@0.1U/16V/X7R_4
R104
DR@4.99K/F_4
R105
DR@4.99K/F_4
C134
DR@0.1U/16V/X7R_4
VRAM De-Coupling VRAM De-Coupling
+1.35V_VGA
C622
DR@4.7U/6.3V_6X
+1.35V_VGA
C630
DR@1U/6.3V_4X
+1.35V_VGA
C629
DR@1U/6.3V_4X
+1.35V_VGA
C631
DR@0.1U/16V/X7R_4
C649
DR@4.7U/6.3V_6X
C603
DR@1U/6.3V_4X
DR@1U/6.3V_4X
C632
DR@0.1U/16V/X7R_4
DR@4.7U/6.3V_6X
C602
DR@1U/6.3V_4X
DR@1U/6.3V_4X
C633
DR@0.1U/16V/X7R_4
C621
DR@4.7U/6.3V_6X
C600
DR@1U/6.3V_4X
C601
DR@1U/6.3V_4X
C648
DR@4.7U/6.3V_6X
C605
DR@1U/6.3V_4X
C606
DR@1U/6.3V_4X
DR@4.7U/6.3V_6X
C607
DR@1U/6.3V_4X
C628
DR@1U/6.3V_4X
C608
DR@1U/6.3V_4X
+1.35V_VGA
R100 EV@100/F_4
R123 EV@100/F_4
R98 EV@100/F_4
R126 EV@100/F_4
R128 EV@100/F_4
R129 EV@100/F_4
R94 EV@100/F_4
R96 EV@100/F_4
R102 EV@100/F_4
R97 EV@100/F_4
R133 EV@100/F_4
R95 EV@100/F_4
R125 EV@100/F_4
R131 EV@100/F_4
R130 EV@100/F_4
R127 EV@100/F_4
R99 EV@100/F_4
R132 EV@100/F_4
R108 EV@100/F_4
R101 EV@100/F_4
R103 EV@100/F_4
R115 EV@100/F_4
R122 EV@100/F_4
R116 EV@100/F_4
R106 EV@100/F_4
R117 EV@100/F_4
R107 EV@100/F_4
R124 EV@100/F_4
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14
VMA_BA0
VMA_BA1
VMA_BA2
VMA_CKE0
VMA_CKE1
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_RAS1#
VMA_CAS0#
VMA_CAS1#
VMA_WE0#
VMA_WE1#
R134
DR@4.99K/F_4
R135
DR@4.99K/F_4
R515 EV@100/F_4
R538 EV@100/F_4
R513 EV@100/F_4
R541 EV@100/F_4
R543 EV@100/F_4
R544 EV@100/F_4
R509 EV@100/F_4
R511 EV@100/F_4
R517 EV@100/F_4
R512 EV@100/F_4
R548 EV@100/F_4
R510 EV@100/F_4
R539 EV@100/F_4
R546 EV@100/F_4
R545 EV@100/F_4
R542 EV@100/F_4
R514 EV@100/F_4
R547 EV@100/F_4
R522 EV@100/F_4
R516 EV@100/F_4 C639
R520 EV@100/F_4
R535 EV@100/F_4
R521 EV@100/F_4
R537 EV@100/F_4
R534 EV@100/F_4
R536 EV@100/F_4
R529 EV@100/F_4
R540 EV@100/F_4
C139
DR@0.1U/16V/X7R_4
R119
DR@4.99K/F_4
R118
DR@4.99K/F_4
C137
DR@0.1U/16V/X7R_4
+1.35V_VGA
C653
DR@4.7U/6.3V_6X
+1.35V_VGA
C642
DR@1U/6.3V_4X
+1.35V_VGA
C641
DR@1U/6.3V_4X
+1.35V_VGA
C613
DR@0.1U/16V/X7R_4
C627
DR@4.7U/6.3V_6X
C609
DR@1U/6.3V_4X
C616
DR@1U/6.3V_4X C638
C614
DR@0.1U/16V/X7R_4
R113
DR@4.99K/F_4
R112
DR@4.99K/F_4
C625
DR@4.7U/6.3V_6X C650
C637
DR@1U/6.3V_4X
C618
DR@1U/6.3V_4X
C634
DR@0.1U/16V/X7R_4
C626
DR@4.7U/6.3V_6X
C636
DR@1U/6.3V_4X
C611
DR@1U/6.3V_4X
C136
DR@0.1U/16V/X7R_4
C655
DR@4.7U/6.3V_6X C620
C635
DR@1U/6.3V_4X
C610
DR@1U/6.3V_4X
R92
DR@4.99K/F_4
R93
DR@4.99K/F_4
C654
DR@4.7U/6.3V_6X
C615
DR@1U/6.3V_4X
C619
DR@1U/6.3V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C107
DR@0.1U/16V/X7R_4
C617
DR@1U/6.3V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
JET_S3_Dual Rank VRAM
JET_S3_Dual Rank VRAM
JET_S3_Dual Rank VRAM
LV6
LV6
LV6
24 61 Friday, March 11, 2016
24 61 Friday, March 11, 2016
24 61 Friday, March 11, 2016
1A
1A
1A
5
LCDVCC
+3V
D D
+3V
PCH_LCDVCC_EN {2}
C581
*0.1U/16V/X7R_4
Back light
C C
EC_LID# {36}
80mil
C72
1U/6.3V_4X
R72 10K_4
U29
2
VIN1
3
VIN
FLG#5VOUT
4
EN
G547E1P81U
R486
100K/F_4
VSTBY_FSPI +3V
R70
10K_4
D1 DB 2J40600L
C71
0.1U/16V/X7R_4
VOUT2
VOUT1
8
7
6
1
GND
R66
*4.7K_4
D2 DB2J4 0600L
+LCDVCC_L
R78
100K_4
4
80mil
F10 0_6
C75
*47P/50V/NPO_4
+LCDVCC
DISPON
C76 10U/6.3V/X5R_6X
C590 *0.01U/50V/X7R_4
C593 0.1U/16V/X7R_4
+3V
3
R498 *100K_4
R497 *100K_4
eDP only
EDP_AUXN_C
EDP_AUXP_C
INT_EDP_AUXP {2}
INT_EDP_AUXN {2}
INT_EDP_TXP0 {2}
INT_EDP_TXN0 {2}
INT_EDP_TXP1 {2}
INT_EDP_TXN1 {2}
EDP_HPD {2}
+V3.3DX_CAMERA
USBP9-_CCD {12}
USBP9+_CCD {12}
DMIC_DATA1_C {29}
DMIC_CLK1_C {29}
+LCDVCC
+V3.3DX_AUDIO
GFX_PWR_SRC
C594 0.1U/16V/X7R_4
C596 0.1U/16V/X7R_4
C598 0.1U/16V/X7R_4
C599 0.1U/16V/X7R_4
C595 0.1U/16V/X7R_4
C597 0.1U/16V/X7R_4
R502 600_0.3A
R503 600_0.3A
F4 *SHORT_8
C3A
2
VSTBY_FSPI {13,29,36,38,39}
+3V {2,4,10,11,12,13,14,15,17,18,26,27,29,30,31,34,36, 37,38,40,41,42,45,49,52,53,54}
+VIN {42,43,44,45,46,47,48,49,50,51,52,56}
+V3.3DX_AUDIO {29}
+3VS5 {4,10,12,15,26,28 ,30,32,33,35,36,41,42,44,49,51,53,54,56}
+5VS5 {4,34,35,38,39,41,42,44,45,48,50,51,53,54,56}
CN7
30
30
+LCDVCC
EDP_AUXP_C
EDP_AUXN_C
EDP_TXP0_C
EDP_TXN0_C
EDP_TXP1_C
EDP_TXN1_C
EDP_HPD
DISPON
VADJ_PWM
+V3.3DX_CAMERA
USBP9-_CCD
USBP9+_CCD
R86 600_0.3A
DMIC_DATA1
DMIC_CLK1
+V3.3DX_AUDIO_E
GFX_PWR_SRC
DMIC_GND
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
51540-03001-V01
32
32
31
31
1
25
PCH_LVDS_BLON {2}
B B
GFX_PWR_SRC
PCH_DPST_PWM {2}
A A
+VIN GFX_PWR_SRC
5
R75 2.2K_4
R80
100K_4
F5 FUSE 2A
*10U/25V/X6S_12
R88 *0_4_S
C85
*47P/50V/NPO_4
40mil
C84
C73
*1U/10V/X7R_6
1 2
C117
0.1U/50V/X7R_6
VADJ_PWM
Q11
*LTC044EUBFS8TL
1 3
1 2
C116
0.1U/50V/X7R_6
R87
100K_4
2
LCD_BK_OFF {14}
4
CAMERA VCC Control
+CAM_VCC
Max Current : 800mA
CCD_EN {14}
3
+LCDVCC
3
2
1
For ESD
SC4 *ESD@0.1U/16V/X7R_4
C77 2.2U/10V/X7R_6
R85
10K_4
R83 100K_4
Q13
LU1L002SNFS8
+3V
1
2
3
C81
0.01U/50V/X7R_4
2
Q12
AO3413
+V3.3DX_CAMERA_R
+V3.3DX_CAMERA
F3
FUSE 1A
C79
0.1U/16V/X7R_4
DMIC_DATA1
SC7 ESD@PESD5V0V1BL
DMIC_CLK1
SC8 ESD@PESD5V0V1BL
+V3.3DX_CAMERA
USBP9-_CCD
USBP9+_CCD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
EC34 ESD@RCLAMP0 551P.TST
EC33 ESD@RCLAMP0 551P.TST
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LCD/CAMERA/MIC
LCD/CAMERA/MIC
LCD/CAMERA/MIC
1
EC2 E SD@RCLAMP0551P.TST
LV6
LV6
LV6
1A
1A
25 61 Friday, March 11, 2016
25 61 Friday, March 11, 2016
25 61 Friday, March 11, 2016
1A
A
B
C
D
E
26
IN_D0 {2}
IN_D1 {2}
IN_D2 {2}
SDVO_CLK {2}
<HDM>
C778 0.1U/16V/X7R_4
C777 0.1U/16V/X7R_4
C780 0.1U/16V/X7R_4
C779 0.1U/16V/X7R_4
C782 0.1U/16V/X7R_4
C781 0.1U/16V/X7R_4
C776 0.1U/16V/X7R_4
C775 0.1U/16V/X7R_4
<HDM>
R316 *0_4_S
TX0_HDMI+
TX0_HDMI-
TX1_HDMI+
TX1_HDMI-
TX2_HDMI+
TX2_HDMI-
TXC_HDMI+
TXC_HDMI-
+3VS5
R325 470/F_4
R321 470/F_4
R331 470/F_4
R327 470/F_4
R339 470/F_4
R337 470/F_4
R320 470/F_4
R317 470/F_4
+3V_HDMI
R340
100K_4
R298
*2.2K_4
R315
2.2K_4
+3V_HDMI
Q26A
SSM6N48FU
5
TX0_HDMI+_R1
TX0_HDMI-_R1
TX1_HDMI+_R1
TX1_HDMI-_R1
TX2_HDMI+_R1
TX2_HDMI-_R1
TXC_HDMI+_R1
TXC_HDMI-_R1
2N7002K
HDMI_SCLK
3 4
2
Q27
3
1
R310 2.2K_4
D20
DB2J40600L
TX2_HDMI+
TX2_HDMI-
TX1_HDMI+
TX1_HDMI-
TX0_HDMI+
TX0_HDMI-
TXC_HDMI+
TXC_HDMI-
HDMI_SDATA HDMI_SDATA
HDMI_SCLK HDMI_SCLK
HDMIC_5V HDMIC_5V
HDMI_HPD
U14
6
CH4
NC
7
CH3
NC
GND
9
CH2
NC
10
CH1
NC
ESD@PUSB3FR4
U13
6
CH4
NC
7
CH3
NC
GND
9
CH2
NC
10
CH1
NC
ESD@PUSB3FR4
U12
6
CH4
NC
7
CH3
NC
GND
9
CH2
NC
10
CH1
NC
ESD@PUSB3FR4
TX2_HDMI+
5
TX2_HDMI-
4
3
TX1_HDMI+
2
TX1_HDMI-
1
TX0_HDMI+
5
TX0_HDMI-
4
3
TXC_HDMI+
2
TXC_HDMI-
1
5
4
3
2
HDMI_HPD
1
For ESD Layout note:Place close to HDMI Conn
B2A
+5V
+5V
HDMIC_5V
HDMI_HPD
TX2_HDMI+
TX2_HDMI-
TX1_HDMI+
TX1_HDMI-
TX0_HDMI+
TX0_HDMI-
TXC_HDMI+
TXC_HDMI-
EC15 *ESD@RCLAMP0551P.TST
R769 *0_4_S
R770 *0_4_S
R771 *0_4_S
R772 *0_4_S
R773 *0_4_S
R774 *0_4_S
R775 *0_4_S
R776 *0_4_S
EC16 ESD@PESD5V0V1BL
F11 FUSE1.1A_8V_POLY
C426
0.1U/16V/X7R_4
+3V {2,4,10,11,12,13,14,15,17,18,25,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+5V {27,29,31,37,39,52,53}
C3A
EMI reserve for HDMI
TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMITXC_HDMI+
TXC_HDMI-
10
11
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
CN16
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
TX2_HDMI+_C
TX2_HDMI-_C
TX1_HDMI+_C
TX1_HDMI-_C
TX0_HDMI+_C
TX0_HDMI-_C
TXC_HDMI+_C
TXC_HDMI-_C
HDMI_SCLK
HDMI_SDATA
HDMIC_5V
HDMI_HPD
96-0026-01
SHELL1
GND
GND
SHELL2
R338
E@120/F_4
R330
E@120/F_4
R324
E@120/F_4
R319
E@120/F_4
20
23
22
21
HDMI Conn
4 4
HDMI-passive level shift
3 3
2 2
IN_D0# {2}
IN_D1# {2}
IN_D2# {2}
IN_CLK {2}
IN_CLK# {2}
+3V +3V_HDMI
R336 *0_6_S
+3VS5
R299
*2.2K_4
SDVO_DATA {2}
1 1
A
R296 *0_4_S R279 *0_4_S
R308
2.2K_4
+3V_HDMI
Q26B
SSM6N48FU
2
HDMI_SDATA
6 1
B
R307 2.2K_4
D19
DB2J40600L
+5V
C
PCH_HDMI_HPD {2}
+3VS5
D
R283
*1M_4
R284
1M_4
+3V_HDMI
2
Q24 2N7002K
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
3
HDMI_HPD
R301
20K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI CONN
HDMI CONN
HDMI CONN
E
LV6
LV6
LV6
1A
1A
26 61 Friday, March 11, 2016
26 61 Friday, March 11, 2016
26 61 Friday, March 11, 2016
1A
A
CRT Conn
<CRT>
B
C
+5V {26,29,31,37,39,52,53}
+3V {2,4,10,11,12,13,14,15,17,18,25,26,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
D
E
27
+5V
1 2
F6
4 4
CRT_R
CRT_G
CRT_B
R28
75/F_4
3 3
2 2
Layout Note:
Setting R,G,B trace
impedance to 50 ohm.
R22
R23
75/F_4
75/F_4
VGA_DDI1_HPD {40}
VGA_DP_AUXP {40}
VGA_DP_AUXN {40}
VGA_DDI2_TXP0_L {40}
VGA_DDI2_TXN0_L {40}
VGA_DDI2_TXP1_L {40}
VGA_DDI2_TXN1_L {40}
C42
22P/50V/NPO_4
VGA_SDA
VGA_SLK
C40 0.1U/16V/X7R_4
C37 0.1U/16V/X7R_4
C30 0.1U/16V/X7R_4
C29 0.1U/16V/X7R_4
C27 0.1U/16V/X7R_4
C25 0.1U/16V/X7R_4
C22 0.1U/16V/X7R_4
L22 BLM15BB470SN1D
L21 BLM15BB470SN1D
L20 BLM15BB470SN1D
C33
22P/50V/NPO_4
R25
100K_4
C26
22P/50V/NPO_4
+3V +CRT_VDDA33
L17 FCM1608KF-102T01
32
31
33
VCCK_V12
U1
1
AVCC_33
2
AUX_P
3
AUX_N
4
AVCC_12
5
LANE0_P
6
LANE0_N
7
LANE1_P
8
LANE1_N
RTD2166-CG
R15 4.7K_4
R11 4.7K_4
HPD
EPAD
EXT1.2V_CTRL
RTD2166
POL29POL1/SPI_CEB10SPI_CLK11SPI_SI12SPI_SO13VCC_3314VGA_SCL15VGA_SDA
TP2
+CRT_VDDA33
VGA_DP_AUXP_C
VGA_DP_AUXN_C
VGA_DDI2_TXP0_L_C
VGA_DDI2_TXN0_L_C
VGA_DDI2_TXP1_L_C
VGA_DDI2_TXN1_L_C
+3V
30
SMB_SCL
TP1
C708
22P/50V/NPO_4
29XI28
SMB_SDA
TP3
C566
*0.1U/16V/X7R_4
+3V
27
25
PVCC_3326VCCK_12
LDO_RSTB
VDD_DAC_33
HVSYNC_PWR
16
C714
22P/50V/NPO_4
C560
*2.2U/6.3V_4
C51 0.1U/16V/X7R_4
VCCK_V12
24
GND
23
RED_P
22
GREEN_P
21
BLUE_P
20
19
HSYNC
18
VSYNC
17
VGA_DDC_DAT_RT
VGA_DDC_CLK_RT
+3V
FUSE1.1A_8V_POLY
C175
0.1U/16V/X7R_4
C719
22P/50V/NPO_4
C46
0.1U/16V/X7R_4
C550
0.1U/16V/X7R_4
C50
2.2U/6.3V/X5R_4
CRT_R
CRT_G
CRT_B
C551
4.7U/6.3V_6X
CRT_VCC_R
CRT_R1
CRT_G1
CRT_B1
TP31
R14 33_4
R9 33_4
CRT_VCC_R
CRT_VCC_R
CRT_VCC_R
CRTHSYNC
CRTVSYNC
10
CRT_R1
CRT_B1
VGA_DDC_DAT_RT
CRTVSYNC
+CRT_VDDA33
16 17
6
7
2
8
3
9
4
5
U36
1
IO1
2
GND
IO23IO3
ESD@SRV05-4HTG
U35
1
IO1
2
GND
IO23IO3
ESD@SRV05-4HTG
C21
0.1U/16V/X7R_4
11 1
VGA_DDC_DAT_RT
12
13
CRTHSYNC
14
CRTVSYNC
VGA_DDC_CLK_RT
15
DHR4U-15K1202
CN10
6
IO4
5
REF
4
6
IO4
5
REF
4
C706 *470P/50V_4
C695 33P/50V_4N
C686 33P/50V_4N
C680 *470P/50V_4
CRT_G1
CRTHSYNC
VGA_DDC_CLK_RT
CRT_VCC_R
CRT_VCC_R
SMB_RUN_DAT {10,17}
SMB_RUN_CLK {10,17}
1 1
A
B
R32 *0_4
R33 *0_4
+CRT_VDDA33
+CRT_VDDA33
R458 *4.7K_4
R459 *4.7K_4
C
VGA_SDA
VGA_SLK
VGA_DDC_DAT_RT
VGA_DDC_CLK_RT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DP to CRT(RTD2166-CG)
DP to CRT(RTD2166-CG)
DP to CRT(RTD2166-CG)
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
+5V +5V
R12
R13
2.2K_4
2.2K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
27 61 Friday, March 11, 2016
27 61 Friday, March 11, 2016
27 61 Friday, March 11, 2016
E
1A
1A
1A
A
B
C
D
E
TPM
4 4
3 3
2 2
<TPM>
+3VS5 +VCC_TPM
R267 *TPM@0_4_S
PCH_SPI1_CLK {10}
PCH_SPI_CS2#_TPM {10}
PCH_SPI1_SO {10}
PCH_SPI1_SI {10}
TPM_INT# {12}
PLTRST# {4,18,30,31,33,36,37}
+VCC_TPM
R254 TPM@33_4
R261 TPM@33_4
R269 TPM@33_4
R265 TPM@33_4
R249 *TPM@0_4_S
R263 *TPM@4.7K_4
+VCC_TPM +VCC_TPM
D3A
R255
TPM@10K_4
SPI_TPM_CLK_R
PCH_SPI_CS2#_TPM_M
SPI_TPM_SO_R
SPI_TPM_SI_R
C397 TPM@100P/50V_4
R262
TPM@10K_4
U11
19
SCLK
20
CS#
24
MISO
21
MOSI
18
PIRQ
17
RST#
6
GPIO
TPM@ST33HTPM2E32AAD8
NC
NC4NC
NC5NC
NC
3
NC12NC
10
11
13
14
Thermal pad
NC
NC
NC
NC
NC
NC15NC26NC30NC
27
16
29
25
28
VDD
VDD
VDD
GND
GND
GND
GND
31
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
+3VS5 {4,10,12,15,26,30,32,33,35,36,41,42,44,49,51,53,54,56}
C394 TPM@0.1U/16V/X7R_4
1
8
22
2
9
23
32
33
TPM_PP
7
PP
+VCC_TPM
C400 TPM@10U/6.3V_4
C399 TPM@0.1U/16V/X7R_4
C403 TPM@0.1U/16V/X7R_4
R252
R256 TPM@4.7K_4
*TPM@0_4
28
1 1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
TPM
TPM
TPM
PROJECT :
E
LV6
LV6
LV6
1A
1A
1A
28 61 Friday, March 11, 2016
28 61 Friday, March 11, 2016
28 61 Friday, March 11, 2016
5
Codec (ALC3240)
D D
Analog
<ADO>
Digital
AGND
NB_MUTE# {36}
NB_MUTE#
AGND
AGND
C34
C32
+V3.3DX_AUDIO
AVDD2
40mil
C36
0.1U/16V/X7R_4
40mil
C35
0.1U/16V/X7R_4
R469 10K_4
+V5DX_AUDIO_PVDD
10U/6.3V/X5R_6X
+V5DX_AUDIO_PVDD
*10U/6.3V/X5R_6X
C C
C48 4.7U/6.3V_6X
C45 4.7U/6.3V_6X
+V5DX_AUDIO_PVDD
AUD_SPK_L+
AUD_SPK_LAUD_SPK_RAUD_SPK_R+
+V5DX_AUDIO_PVDD
NB_MUTE#
R464
*100K_4
DVDD
C567
1U/6.3V_4X
C577 1U/6.3V_4X
C574 4.7U/6.3V_6X
C56 1U/6.3V_4X
31
AVSS2
32
LDO2-CAP
33
AVDD2
34
PVDD1
35
SPK-L+
36
SPK-L-
37
SPK-R-
38
SPK-R+
39
PVDD2
40
PDB
41
GND
C568
0.1U/16V/X7R_4
AVDD2
25
26
27
28
29
30
CBP
CBN
CPVEE
CPVDD
HP-OUT-R
ALC3240
DVDD1GPIO0/DMIC-DATA122GPIO1/DMIC-CLK3SDATA-OUT4BIT-CLK5LDO3-CAP6SDATA-IN7DVDD-IO8SYNC9DC DET
Place close to pin 1
DMIC_DATA1_C {25}
DMIC_CLK1_C {25}
B B
A A
MIC2_VREFO
LINE1-VREFO
MIC2_R_C
HPOUT_R
MIC2_L_C
LINE1-R
LINE1-L
C573 1U/6.3V_4X
C57 1U/6.3V_4X
AGND
R463 *0_4_S
R465 *0_4_S
R480 *0_4_S
R479 *0_4_S
R472
4.7K_4
R492
R44
2.2K_4
4.7K_4
R34 47/F_4
R466 47/F_4
Grounding circuit for combo jack MIC R/L pin
Q35
R482 *1K_4
*2N7002K
2
C580
*0.1U/16V/X7R_4
EC_PWROK
EC_PWROK {4,36,37}
5
3
1
R491
2.2K_4
HP-OUT-L_1
HP-OUT-R_1
R467
*22K_4
HP-OUT-R_1
VSTBY_FSPI
*1M_4
L7 0_4
L4 0_4
L19 0_4
L6 0_4
R35
*22K_4
AGND
5
AGND
2
AGND
MIC2_R_C
3 4
Q36A
*SSM6N48FU
MIC2_L_C
6 1
Q36B
*SSM6N48FU
24
HP-OUT-L
C60
4.7U/6.3V_6X
LINE1-VREFO-L
22
23
MIC2-VREFO
C55
22P/50V/NPO_4
4
C63 1U/6.3V_4X
C67 4.7U/6.3V_6X
21
VREF
LDO1-CAP
AVDD1
AVSS1
LINE1-L
LINE1-R
VD33STB
MIC2-CAP
SLEEVE/MIC2-R
RING2/MIC2-L
HP/LINE1-JD(JD1)
PCBEEP
10
C576
*10U/6.3V/X5R_6X
ACZ_SYNC_AUDIO
HDA_SDIN0_R
ACZ_SDOUT_AUDIO
BIT_CLK_AUDIO
AGND
AGND AGND AGND
4
HPOUT_R
HPOUT_L
LINE1-VREFO
MIC2_VREFO
U2
20
19
18
17
16
15
14
13
12
11
C452 *UCLAMP0511P.TCT
C468 *UCLAMP0511P.TCT
AGND
C591 0.1U/16V/X7R_4
R24 0_4
R461 0_4
R476 0_4 R493
R81 *0_4
C592 0.1U/16V/X7R_4
R82 *0_4
R36 0_4
R31 0_4
AGND
AGND
2.2U/6.3V/X5R_4
AGND
C74 4.7U/6.3V_6X
C68 0.1U/16V/X7R_4
+V3.3DX_AUDIO
C579
0.1U/16V/X7R_4
Place close to pin 8
R47 33_4
For ESD
MIC2_R
HP-OUT-L_2 HPOUT_L
SENSE_HP
HP-OUT-R_2
MIC2_L
C453 *UCLAMP0511P.TCT
C454 *UCLAMP0511P.TCT
+V5DX_AUDIO_AVDD
C70
C69
0.1U/16V/X7R_4
AGND AGND
+V3.3DX_AUDIO
MIC2_R_C
Trace: 40mil
MIC2_L_C
BEEP_R BEEP_C BEEP_D
R69 20K_4
R76
10K_4
ACZ_SYNC_AUDIO
ACZ_SDOUT_AUDIO
SC1
HP-OUT-L_2 HP-OUT-R_2
C476
*UCLAMP0511P.TCT
LINE1-L
LINE1-R
R484 100K/F_4
R488 200K/F_4
DB2J40600L
BIT_CLK_AUDIO
SC3
*ESD@SURGE SUP
MIC2_R {35}
HP-OUT-L_2 {35}
SENSE_HP {35}
HP-OUT-R_2 {35}
MIC2_L {35}
AGND
ACZ_SYNC_AUDIO {14}
ACZ_SDIN0 {14}
ACZ_SDOUT_AUDIO {14}
BIT_CLK_AUDIO {14}
SC2
*ESD@SURGE SUP
*ESD@SURGE SUP
L15
*0.047uH
C451
*UCLAMP0511P.TCT
3
2
+V3.3DX_AUDIO {25}
1
+5V {26,27,31,37,39,52,53}
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
29
CODEC 5V POWER
+5V
+V3.3DX_AUDIO
SENSE_HP
D16 DB2J40600L
D15
BEEP {36}
ACZ_SPKR {11,14}
Analog
Digital
2.2U/6.3V/X5R_4
+3V
C571
+3V
1
2
+3.3V_AUDIO_CODEC
Max Current : 419mA
U27
VIN
GND
ON/OFF3NC
G9090-180T11U
2A
L1 0_8
VOUT
*0.1U/16V/X7R_4
+V5DX_AUDIO +V5DX_AUDIO_AVDD
20mil
L5 BLM15PX181SN1D
L2 BLM15PX181SN1D
C38
C31
10U/6.3V/X5R_6X
0.1U/16V/X7R_4
close U2004
R474 *0_6_S
5
4
+V3.3DX_AUDIO +3V
C572
0.1U/16V/X7R_4
+1.8V_AUDIO
+V3.3DX_AUDIO
C563
C562
1U/6.3V_4X
+V5DX_AUDIO_PVDD
AVDD2
L16 BLM15PX181SN1D
DVDD
R460 *0_4
L18 BLM15PX181SN1D
INT Speaker
L14
*0.047uH
SENSE_HP
C15 *680P/50V/X7R_4
For ESD
C19 *680P/50V/X7R_4
B2B C3A
R21 BLM18SG221TN1D
R16 BLM18SG221TN1D
R8 BLM18SG221TN1D
R3 BLM18SG221TN1D
For EMI
C1 *680P/50 V/X7R_4
C28 *680P/50V/X7R_4
2
C20 *680P/50V/X7R_4
C11 *680P/50V/X7R_4
For EMI
C4 *680P/50 V/X7R_4
C24 *680P/50V/X7R_4
AUD_SPK_R+
AUD_SPK_RAUD_SPK_LAUD_SPK_L+
SC5 *ESD@UCLAMP0511P.TCT
3
SPK_R+_OUT
SPK_R-_OUT
SPK_L-_OUT
SPK_L+_OUT
CN4
50278-00401-001
1
6
2
3
4 5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Audio(ALC3240)
Audio(ALC3240)
Audio(ALC3240)
1
LV6
LV6
LV6
29 61 Friday, March 11, 2016
29 61 Friday, March 11, 2016
29 61 Friday, March 11, 2016
1A
1A
1A
5
LAN LDO
D D
D3A
LANVCC
C C
<LAN>
+3VS5 {4,10,12,15,26,28,32,33,35,36,41,42,44,49,51,53,54,56}
1
2
2
1 3
+3VS5
C834 0.01U/50V/X7R_4
R268
4.7K_4
LTC044EUBFS8TL
R292 0_4
+LANVCC +3VS5
3
Q22
AO3413
R793
3.01K/F_4
Q23
C401
*0.01U/50V/X7R_4
LANVCC
Trace width>60mil,
Trace length<200mil
LAN_POWER {36}
40 mils (Iout=1A) 40 mils (Iout=1A)
C390
0.1U/16V/X7R_4
C393
10U/6.3V/X5R_6X
4
C361 *10P/50V/COG_4
VDD10
33
1
2
3
4
5
6
7
8
U10
GND
MDIP0
MDIN0
AVDD10(NC)
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10
MDI_3+
MDI_3-
RSET
10 mils
XTAL1
XTAL2
RJ45_ACTIVITY#
27
32
31
30
28
RSET
AVDD33
AVDD10
CKXTAL229CKXTAL1
RTL8111H-CG
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
AVDD33(NC)11MDIP3(NC)9MDIN3(NC)
12
10
C355 *10P/50V/COG_4
RJ45_LINKUP#
25
26
LED0
LED1/GPO
LED2(LED1)
VDDREG(VDD33)
DVDD10(NC)
LANWAKEB
16
R233 2.49K/F_4
+LANVCC
MDI_0+
MDI_0-
VDD10
MDI_1+
MDI_1MDI_2+
MDI_2- GPP_TX5N_LAN
VDD10
+LANVCC
PCIE_CLK_LAN_REQ# {13}
REGOUT
ISOLATEB
PERSTB
HSON
HSOP
TP8
24
23
22
21
20
19
18
17
GPP_TX5P_LAN
3
REGOUT
VDDREG/VDD33
VDD10
C391 0.1U/16V/X7R_4 C835 *0.01U/50V/X7R_4
C392 0.1U/16V/X7R_4
CLK_PCIE_LAN# {13}
CLK_PCIE_LAN {13}
PCIE_TXN5_LAN# {12}
PCIE_TXP5_LAN {12}
C359 10P/50V_4C
C360 10P/50V_4C
LAN_WAKE#
B2B
1
2
Y2
25MHZ +-30PPM
4
3
PCIE_RXN5_LAN# {12}
PCIE_RXP5_LAN {12}
XTAL2
XTAL1
C767
100P/50V_4
PCIE_WAKE# {4,19,33}
SIO_WAKE_SCI# {33,36}
2
PLTRST# {4,18,28,31,33,36,37}
C3A
+3V
R245
1K_4
R675
*15K_4
R272 0_4
R271 *0_4
3
2N7002K
Q21
1
30
+LANVCC +LANVCC
R240
2
10K_4
1
LAN_WAKE#
+LANVCC
40 mils (Iout=1A)
C358
0.1U/16V/X7R_4
Tramsformer
B B
1
2
MDI_2+
1
2
MDI_3-
10/100 non-stuff
Reserve for Surge
Line to GND TVS
U40
IO1
IO4
REF
GND
IO23IO3
ESD@SRV05-4HTG
U43
IO1
IO4
REF
GND
IO23IO3
ESD@SRV05-4HTG
EC12
E@0.01U/50V/X7R_4
MDI_0+
MDI_1-
A A
MDI_0-
6
5
MDI_1+
4
MDI_2-
6
5
MDI_3+
4
R667 *0_8_S
+LANVCC
+LANVCC
40 mils (Iout=1A)
EC11
E@0.01U/50V/X7R_4
C380
*0.1U/16V/X7R_4
EC10
E@0.01U/50V/X7R_4
MDI_3MDI_3+
MDI_2MDI_2+
MDI_1MDI_1+
MDI_0MDI_0+
C381
*4.7U/6.3V_6X
R264
1M_8
Reserve for EMI
5
4
REGOUT VDDREG/VDD33
Reserve for Surge
Line to Line TVS
U42
1
1
8
2
2
7
3
3
6
445
*ESD@UCLAMP2512T.TCT
U39
1
1
8
2
2
7
3
3
6
445
*ESD@UCLAMP2512T.TCT
Reserve for Surge
Line to Line TVS
40 mils (Iout=1A) 40 mils (Iout=1A)
8
7
6
5
8
7
6
5
U41
TD4-12MX4-
11
TD4+
10
TCT4
9
TCT3
8
TD3-
7
TD3+
6
TD2-
5
TD2+
4
TCT2
3
TCT1
2
TD1-
1
TD1+
NA0069R LF
R668 *0_8_S
C753
0.1U/16V/X7R_4
13
14
MX4+
15
MCT4
16
MCT3
17
MX3-
18
MX3+
19
MX2-
20
MX2+
21
MCT2
22
MCT1
23
MX1-
24
MX1+
LAN_MX3LAN_MX3+
LAN_MCT0
LAN_MCT1
LAN_MX2LAN_MX2+
LAN_MX1LAN_MX1+
LAN_MCT2
LAN_MCT3
LAN_MX0LAN_MX0+
3
C757
0.1U/16V/X7R_4
C765
0.1U/16V/X7R_4
R257 75/F_12
R250 75/F_12
R235 75/F_12
R228 75/F_12
C764
0.1U/16V/X7R_4
LANCT3
C766
0.1U/16V/X7R_4
C734
10P/3KV/NPO_1808
EC35 ESD@PESD5V0V1BL
+LANVCC
+LANVCC
D18
*BS201N-LV_1206
2
VDD10
D3A
R270 510_4
R273 510_4
RJ45 Connector
EMI:close RJ45
C402
RV1 ESD@PESD5V0V1BL
*0.1U/16V/X7R_4
RV3 ESD@PESD5V0V1BL
GREEN LED
LAN_GLED
RJ45_LINKUP#
LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX2+
LAN_MX2LAN_MX1LAN_MX3+
LAN_MX3-
LAN_OLED
RJ45_ACTIVITY#
Amber LED
RV4 ESD@PESD5V0V1BL
RV2 ESD@PESD5V0V1BL
C410
*0.1U/16V/X7R_4
EMI:close RJ45
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
9
10
1
2
3
4
5
6
7
8
11
12
LAN and Switch(TS3L500AE)
LAN and Switch(TS3L500AE)
LAN and Switch(TS3L500AE)
B2A C3A
CN14 2RJ1684-020111F
13
14
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
30 61 Friday, March 11, 2016
30 61 Friday, March 11, 2016
1
30 61 Friday, March 11, 2016
1A
1A
1A
1
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,34,36,37,38,40,41,42,45,49,52,53,54}
SATA HDD
B2A
A A
CN19
23
GND
GND1
RXP
RXN
GND2
TXN
TXP
GND3
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
24
GND
HDD@C166KF-122H9-L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
<HDD>
SATA_TXP_1ST_HDD_C
SATA_TXN_1ST_HDD#_C
SATA_RXN_1ST_HDD#_C
SATA_RXP_1ST_HDD_C
R722 *HDD@0_4
+5V_HDD1
C799
*HDD@0.1U/16V/X7R_4
D21 *HDD@AZ5725-01F
D22 *HDD@AZ5725-01F
C784 HDD@0.01U/50V/X7R_4
C785 HDD@0.01U/50V/X7R_4
C791 HDD@0.01U/50V/X7R_4
C792 HDD@0.01U/50V/X7R_4
DEVSLP1_HDD {12}
1A
C813
*HDD@10U/6.3V/X5R_6X
SATA_TXP_1ST_HDD_C
SATA_TXN_1ST_HDD#_C
R754 *SHORT_8
+
C815
*HDD@100U/6.3V_3528P_E45b
D23 *HDD@AZ5725-01F
D24 *HDD@AZ5725-01F
GND GND
SATA_TXP8_HDD {12}
SATA_TXN8_HDD# {12}
SATA_RXN8_HDD# {12}
SATA_RXP8_HDD {12}
+5V
SATA_RXN_1ST_HDD#_C
SATA_RXP_1ST_HDD_C
SATA ODD
CN11
14
GND14
1
GND1
2
RXP
3
RXN
4
GND2
5
TXN
6
TXP
7
GND3
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
15
GND15
ODD@RV14@6030D-13G39
CN12
19
GND19
18
GND
17
RXP
16
RXN
15
GND
14
TXN
13
TXP
12
GND
11
N.C
10
+5V
9
+5V
8
+5V
7
+5V
6
+5V
5
NC
4
GND
3
GND
2
ODD_DA
1
RRSNT
20
GND20
ODD@RV15@51625-01801-001
<ODD>
SATA_TXP7_ODD_C
SATA_TXN7_ODD#_C
SATA_RXN7_ODD#_C
SATA_RXP7_ODD_C
+5V_ODD
SATA_TXP7_ODD_C
SATA_TXN7_ODD#_C
SATA_RXN7_ODD#_C
SATA_RXP7_ODD_C
+5V_ODD
B2A
C723 ODD@0.01U/50V/X7R_4
C720 ODD@0.01U/50V/X7R_4
C718 ODD@0.01U/50V/X7R_4
C715 ODD@0.01U/50V/X7R_4
C204
ODD@0.1U/16V/X7R_4
C218
ODD@0.1U/16V/X7R_4
SATA_TXP7_ODD {12}
SATA_TXN7_ODD# {12}
SATA_RXN7_ODD# {12}
SATA_RXP7_ODD {12}
1.5A
C236
*ODD@10U/6.3V/X5R_6X
1.5A
C711
*ODD@10U/6.3V/X5R_6X
+5V
+5V
31
SSD M.2
<HDD>
HDD_DETECT# {36}
PCIE_RXN11_SSD {12}
PCIE_RXP11_SSD {12}
PCIE_TXN11_SSD {12}
PCIE_TXP11_SSD {12}
SATA_RXP_SSD {12}
SATA_RXN_SSD# {12}
SATA_TXN_SSD# {12}
SATA_TXP_SSD {12}
CLK_PCIE_SSDN {13}
CLK_PCIE_SSDP {13}
SSD_PEDET# {12}
SATA_RXP_SSD
SATA_RXN_SSD#
SATA_TXN_SSD#
SATA_TXP_SSD
DC Current rating: 3 A (MAX)
C742 SSD@0_4
C741 SSD@0_4
C740 SSD@0.22U/25V/X7R_4
C739 SSD@0.22U/25V/X7R_4
C738 SSD@0_4
C737 SSD@0_4
C736 SSD@0.22U/25V/X7R_4
C735 SSD@0.22U/25V/X7R_4
Q18
SSD@2N7002K
60 mil 1.5A
R231 *SSD@0_8_S
+3V
CN13
NGFF- Key M
1
GND_PRESENCE_IND
3
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3
15
GND
17
PERn2
19
PERp2
R643 *SSD@0_4_S
PCIE_RXN11_SSD_C
PCIE_RXP11_SSD_C
PCIE_TXN11_SSD_C
PCIE_TXP11_SSD_C
SATA_RXP_SSD_C
SATA_RXN_SSD#_C
SATA_TXN_SSD#_C
SATA_TXP_SSD_C
3
1
+3V
2
R225 SSD@10K_4
+V3DX_HDD
C357 SSD@10U/6.3V/X5R_6X
C384 SSD@0.1U/16V/X7R_4
C356 *SSD@10U/6.3V/X5R_6X
21
GND
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA-R+
43
PERp0/SATA-R-
45
GND
47
PETn0/SATA-T-
49
PETp0/SATA-T+
51
GND
53
REFCLKn
55
REFCLKp
57
GND
59
Key
61
Key
63
Key
65
Key
67
N/C
69
PEDET_OC-PCIE/GND-SATA
71
GND
73
GND
75
GND
1
DAS/DSS/LED#1(OD)
SUSCLK(32kHz)
SSD@NASM0-S6701-TSH4
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
DEVSLP
PERST#
CLKREQ#
PEWAKE#
3.3Vaux
3.3Vaux
3.3Vaux
2
4
6
N/C
8
N/C
10
12
14
16
18
20
N/C
22
N/C
24
N/C
26
N/C
28
N/C
30
N/C
32
N/C
34
N/C
36
N/C
38
40
N/C
42
N/C
44
N/C
46
N/C
48
N/C
SSD_PLTRST#
50
52
54
56
NC
58
NC
60
Key
62
Key
64
Key
66
Key
68
70
72
74
60 mil 1.5A
R615 *SSD@0_4_S
C385 SSD@100P/50V_4
R243 *SSD@0_4_S
R241 *SSD@0_2_S
+V3DX_HDD
+V3DX_HDD
DEVSLP2_SSD {12}
PLTRST# {4,18,28,30,33,36,37}
PCIE_CLK_SSD_REQ# {13}
PCH_SUSCLK {13}
+V3DX_HDD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
HDD/ODD/SSD
HDD/ODD/SSD
HDD/ODD/SSD
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
LV6
LV6
LV6
31 61 Friday, March 11, 2016
31 61 Friday, March 11, 2016
31 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
<CRD>Card Reader(RTS5170)
32
D D
TP62
TP61
TP59
C803 1U/10V/X5R_4
V18
XD_D7
SP14
SD_D2/MS_D5
SD_D3/MS_D4
SP11
24
22
23
U50
V18
+3V_CR
+3V_CR SD_CLK
C808
4.7U/6.3V_6X
C C
USBP7-_Card {12}
USBP7+_Card {12}
C807
0.1U/16V/X7R_4
R736 6.2K/F_4
C508
R403
0.1U/16V/X7R_4
*0_4
RREF
VCC_XD
SDREG
C806
1U/10V/X5R_4
1
2
3
4
5
6
25
RREF
DM
DP
3V3_IN
CARD_3V3
SDREG
GND
TP64
XD_D7
RTS5170
XD_CD#7SP18SP29SP310SP411SP5
XD_CD#
SD_WP/MS_D1
SP2
SD_D1/MS_D7
TP63
SD_D0/MS_D6
SP1119SP1220SP1321SP14
GPIO0
12
SP5
TP60
SP10
SP9
SP8
SP7
SP6
SD_CMD
18
17
GPIO0
16
SP9
15
14
SP7
SD_CDZ
13
TP56
TP57
TP58
SD_WP/MS_D1
SD_CDZ
SD_D2/MS_D5
SD_D1/MS_D7
SD_D0/MS_D6
SD_CLK
VCC_XD
SD_CMD
SD_D3/MS_D4
R425 *short_4
C532
4.7U/6.3V_6X
SD_CLK_R
C525
0.1U/16V/X7R_4
11
10
CN2
9
8
7
6
5
4
3
2
1
WP
CD
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3
GND
GND
GND12GND
14
13
16
NC
17
NC
156-1001902608
15
D3A
CR VCC Control
+3V_CR +3VS5
B B
+3VS5
A A
5
1
C842 0.01U/50V/X7R_4
R398
4.7K_4
2
LTC044EUBFS8TL
R794 0_4
3
Q31
AO3413
2
C843 *0.01U/50V/X7R_4
R404
3.01K/F_4
Q29
C512
*0.01U/50V/X7R_4
1 3
CR_EN# {14}
4
40 mils (Iout=1A)
C515
0.1U/16V/X7R_4
C841
10U/6.3V/X5R_6X
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Card Reader
Card Reader
Card Reader
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
32 61 Friday, March 11, 2016
32 61 Friday, March 11, 2016
32 61 Friday, March 11, 2016
1
1
NGFF WiFi/BT connector
M.2 2230
A A
B B
2
PCIE_CLK_WLAN_REQ# {13}
<WIF>
USBP8+_BT {12}
USBP8-_BT {12}
PCIE_TXP6_WLAN {12}
PCIE_TXN6_WLAN# {12}
PCIE_RXP6_WLAN {12}
PCIE_RXN6_WLAN# {12}
CLK_PCIE_WLANP {13}
CLK_PCIE_WLANN {13}
DEBUG_LCLKOUT {10}
LPC_LFRAME# {10,36}
3
R500 *NMP@0_4_S
R501 *NMP@0_4_S
MINICARD_PME#
DEBUG_LCLKOUT_L
LPC_LFRAME#_R
4
CN6
NGFF-KEY-E
1
GND
3
USB_D+
5
USB_D-
7
GND
9
SDIO CLK(O)(0/1.8V)
11
SDIO CMD(IO)(0/1.8V)
13
SDIO DAT0(IO)(0/1.8V)
15
SDIO DAT1(IO)(0/1.8V)
17
SDIO DAT2(IO)(0/1.8V)
19
SDIO DAT3(IO)(0/1.8V)
21
SDIO Wake(I)(0/1.8V)
23
SDIO Reset(O)(0/1.8V)
25
Key
27
Key
29
Key
31
Key
33
GND
35
PETp0
37
PETn0
39
GND
41
PERp0
43
PERn0
45
GND
47
REFCLKP0
49
REFCLKN0
51
GND
53
CLKREQ0#(0/3.3V)
55
PEWake0#(0/3.3V)
57
GND
59
Reserved/PETp1
61
Reserved/PETn1
63
GND
65
Reserved/PERp1
67
Reserved/PERn1
69
GND
71
RESERVED
73
RESERVED
75
GND
3.3Vaux
3.3Vaux
LED#1 (OD)
PCM_CLK (0/1.8V)
PCM_SYNC (0/1.8V)
PCM_IN (0/1.8V)
PCM_OUT (0/1.8V)
LED#2 (OD)
UART Wake(0/3.3V)
UART Rx (0/1.8V)
UART Tx (0/1.8V)
UART CTS (0/1.8V)
UART RTS (0/1.8V)
RESERVED
RESERVED
RESERVED
COEX3(?)(0/1.8V)
COEX2(?)(0/1.8V)
COEX1(?)(0/1.8V)
SUSCLK(32kHz)(0/3.3V)
PERST0#(0/3.3V)
W_Disable#2(0/3.3V)
W_Disable#1(0/3.3V)
I2C DATA(0/3.3)
I2C CLK(0/3.3)
ALERT(0/3.3)
RESERVED
RESERVED
RESERVED
RESERVED
3.3Vaux
3.3Vaux
NASE0-S6701-TS48
GND
5
+3.3V_NGFF_WLAN
2
4
6
8
10
12
14
16
18
20
22
24
Key
26
Key
28
Key
30
Key
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
6
R57 *0_4_S
R67 *0_4_S
R73 *0_4_S
WLANSUSCLK
PLTRST#
BT_OFF_R#
WLAN_OFF_R#
R494 *NMP@0_4_S
R495 *NMP@0_4_S
R496 *NMP@0_4_S
R499 *NMP@0_4_S
7
+3VS5 {4,10,12,15,26,28,30,32,35,36,41,42,44,49,51,53,54,56}
VSTBY_FSPI {13,25,29,36,38,39}
CL_RST# {10}
CL_DATA {10}
CL_CLK {10}
TP30
C78 100P/50V_4
LPC_LAD0 {10,36}
LPC_LAD1 {10,36}
LPC_LAD2 {10,36}
LPC_LAD3 {10,36}
8
33
PLTRST# {4,18,28,30,31,36,37}
+3.3V_NGFF_WLAN
C3A
PCIE_WAKE# {4,19,30}
C C
SIO_WAKE_SCI# {30,36}
R54 0_4
R60 *0_4
3
2N7002K
Q7
2
+3.3V_NGFF_WLAN
1
R39
10K_4
MINICARD_PME#
R79 10K_4
R77 10K_4
WLAN_OFF# {12}
BT_RADIO_DIS# {14}
D3 DB2J40600L
D6
DB2J40600L
WLAN_OFF_R#
BT_OFF_R#
+3.3V_NGFF_WLAN
D3A
+3.3V_ NGFF_WLAN
Max Current : 1000mA
1
C58 0.01U/50V/X7R_4
D D
SLP_WLAN# {4}
EC_WLAN_EN {36}
1
D4 DB2J40600L
D5 *DB2J40600L
+3VS5
2
R68
4.7K_4
2
LTC044EUBFS8TL
3
Q6
AO3413
2
C836 *0.01U/50V/X7R_4
R55
3.01K/F_4
Q8
1 3
3
C66
*0.01U/50V/X7R_4
+3.3V_NGFF_WLAN +3VS5
+3.3V_NGFF_WLAN
Place caps close to connector.
40 mils (Iout=1A) 40 mils (Iout=1A)
C52
4.7U/6.3V_6X
Wifi/BT NGFF
Wifi/BT NGFF
Wifi/BT NGFF
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
33 61 Friday, March 11, 2016
33 61 Friday, March 11, 2016
33 61 Friday, March 11, 2016
8
1A
1A
1A
C47
0.1U/16V/X7R_4
4
C838
10U/6.3V/X5R_6X
C39
0.1U/16V/X7R_4
5
6
C83
0.047U/25V/X7R_4
C44
0.1U/16V/X7R_4
C43
0.047U/25V/X7R_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
A
C786
<UB3>
1U/10V/X7R_6
+5VS5 USB3PWR
C787
U47
2
VIN1
3
VIN2
4
EN
1
GND
BD82047FVJ-GE2
OUT3
OUT2
OUT1
8
7
6
5
OC
USB 3.0 R-side
D D
ESD@PESD5V0V1BL
USB_Normal_EN# {35,36}
LOW ACTIVE
For ESD
C C
USBP1-_R
USBP1+_R
U49
2
IO1
3
GND
IO2
ESD@CM1224-02SR
USB3PWR
4
VIN
1
USB30_RX1-_C
USB30_RX1+_C
USB30_TX1-_C USB30_TX1-_C
USB30_TX1+_C
For ESD
USB30_RX2-_C
USB30_RX2+_C
USB30_TX2-_C USB30_TX2-_C
USB30_TX2+_C
GND
USB3PWR
4
VIN
1
USBP2+_C
USBP2-_C
B B
U53
2
IO1
3
IO2
ESD@CM1224-02SR
60 mils (Iout=1.5A)
U48
6
NC
7
NC
9
NC
10
NC
U52
6
NC
7
NC
9
NC
10
NC
B
C789
0.1U/16V/X7R_4
R716 *0_4_S
5
CH4
4
CH3
3
GND
2
CH2
1
CH1
ESD@PUSB3FR4
5
CH4
4
CH3
3
GND
2
CH2
1
CH1
ESD@PUSB3FR4
C788
0.1U/16V/X7R_4
USB_Normal_OC0#_R
USB30_RX1-_C
USB30_RX1+_C
USB30_TX1+_C
USB30_RX2-_C
USB30_RX2+_C
USB30_TX2+_C
+
C783
150U/6.3V/ESR25_3528
USB_Normal_OC0#_R {12}
C3A
USB30_RX1-_R1 {12}
USB30_RX1+_R1 {12}
USB30_TX1-_R1 {12}
USB30_TX1+_R1 {12}
C3A
USB30_RX2-_R2 {12}
USB30_RX2+_R2 {12}
USB30_TX2-_R2 {12}
USB30_TX2+_R2 {12}
C790
0.1U/16V/X7R_4
USBP1-_R1 {12}
USBP1+_R1 {12}
C821
*1.6P/50V_4C
C823
*1.6P/50V_4C
USBP2-_R2 {12}
USBP2+_R2 {12}
C825
*1.6P/50V_4C
C827
*1.6P/50V_4C
C
USBP1-_R1
USBP1+_R1
R783 *0_2_S
R784 *0_2_S
C822
*1.6P/50V_4C
R785 *0_2_S
R786 *0_2_S
C824
*1.6P/50V_4C
R787 *0_2_S
R788 *0_2_S
C826
*1.6P/50V_4C
R789 *0_2_S
R790 *0_2_S
C828
*1.6P/50V_4C
USBP1-_D
USBP1+_D
USB30_RX1-_R1_R
USB30_RX1+_R1_R
USB30_TX1-_R1_R
USB30_TX1+_R1_R
USB30_RX2-_R2_R
USB30_RX2+_R2_R
USB30_TX2-_R2_R
USB30_TX2+_R2_R
Near
R728
WIN7@0_2
R729 NWIN7@0_4
CML4
4 3
1
*E@DLW21SN121SQ2L
R724 NWIN7@0_4
R725
WIN7@0_2
Near
C794 0.1U/16V/X7R_4
C793 0.1U/16V/X7R_4
R743 *0_4_S
*E@DLW21SN121SQ2L
R744 *0_4_S
C798 0.1U/16V/X7R_4
C797 0.1U/16V/X7R_4
2
USB30_TX1-_M
USB30_TX1+_M
1
4 3
CML7
USB30_TX2-_M
USB30_TX2+_M
D
USBP1-_DL
R381
WIN7@0_2
R374
WIN7@0_2
USBP1+_DL
C3A
2
R723 *0_4_S
CML3
4 3
1
2
*E@DLW21SN121SQ2L
R721 *0_4_S
R718 *0_4_S
CML2
4 3
1
2
*E@DLW21SN121SQ2L
R717 *0_4_S
USBP2-_C
USBP2+_C
R735 *0_4_S
CML6
4 3
1
2
*E@DLW21SN121SQ2L
R734 *0_4_S
R733 *0_4_S
CML5
4 3
1
2
*E@DLW21SN121SQ2L
R732 *0_4_S
USB30_RX1-_C
USB30_RX1+_C
USB30_TX1-_C
USB30_TX1+_C
C804 150U/6.3V/ESR25_3528
USB30_RX2-_C
USB30_RX2+_C
USB30_TX2-_C
USB30_TX2+_C
E
+5VS5 {4,35,38,39,41,42,44,45,48,50,51,53,54,56}
34
USB3.0 PORT0
USB3PWR
USBP1-_R
USBP1+_R
USB3PWR
EC39 ESD@0.1U/16V/X7R_4
Close to connector
USB3.0 PORT1
USB3PWR
+
CN20
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
13
2UB4008-370101F
CN18
1
VBUS
1
2
D-
2
3
3
D+
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
13
2UB4008-370101F
11111010121213
11111010121213
USB3PWR
UART for DEBUG
USBP1-_D
GPP_A16 {14}
A A
+3V
R368 WIN7@10K_4
A
R365 *WIN7@0_4_S
+3V
USBP1+_D
<W7D>
U15
6
HSD2-
7
HSD2+
8
OE
9
VCC
10
SEL
WIN7@FSUSB42UMX
C485
WIN7@0.1U/16V/X7R_4
GND
HSDHSD+
D+
D-
USBP1-_DL
2
3
UART2_RXD
4
UART2_TXD
5
B
TP26
TP27
UART2_RXD {14}
UART2_TXD {14}
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
USB3x2
USB3x2
USB3x2
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
USBP1+_DL
1
EC40 *ESD@RCLAMP0551P.TST
Close to connector
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
34 61 Friday, March 11, 2016
34 61 Friday, March 11, 2016
E
34 61 Friday, March 11, 2016
1A
1A
1A
A
USB Sleep&Charger
<UBC>
B
<UB2>
C
USB0PWR
D
+5VS5 {4,34,38,39,41,42,44,45,48,50,51,53,54,56}
+3VS5 {4,10,12,15,26,28,30,32,33,36,41,42,44,49,51,53,54,56}
E
35
D D
C513 R@4.7U/10V/X5R_6
C509 R@0.1U/16V/X7R_4
+3VS5
USB_STATUS# {36}
USB_SC_OC2# {12}
+3VS5
USBCHR_ON {36}
USB_CTL1 {36}
USB_CTL3 {36}
C C
USB2.0 Power SW
USB_Normal_EN# {34,36}
B B
USB_Normal_OC3#_L2 {12}
USBCHR_ON
+3VS5
<UB2>
USB_Normal_EN#
USB_Normal_OC3#_L2
+5VS5
R392 R@10K_4
R390 R@0_4
R406 R@10K_4
R401 R@10K_4
R395 R@10K_4
+3VS5
R422
*V@10K_4
IC current limit is 1.6A
1
9
13
4
5
6
7
USBP4-_L1
USBP4+_L1
+5VS5
C519
V@1U/6.3V_4X
C520
ESD@0.1U/16V/X7R_4
U20
IN
STATUS
FAULT
ILIM_SEL
EN
CTL1
CTL2
CTL38DP_OUT
R@TPS2546RTER
R407 V@0_2
R408 V@0_2
ILIM_LO
ILIM_HI
GND
DM_IN
DP_IN
DM_OUT
OUT
PAD
80 mils (Iout=1.6A)
12
15
16
17
14
11
BUSBP1-
10
BUSBP1+
USBP4-_L1
2
USBP4+_L1
3
USBP4-_LR
USBP4+_LR
U22
2
3
4
1
V@BD82031FVJ-GE2
R378 V@0_2
R379 V@0_2
VIN1
OUT3
VIN2
OUT2
EN
OUT1
GND
OC
C489
0.1U/16V/X7R_4
R394 R@2M/F_4
R399 R@33K/F_4
8
7
6
5
USB0PWR
BUSBP1BUSBP1+
USB0PWR
2A
C498
*V@470P/50V_4X
C499
ESD@0.1U/16V/X7R_4
USBP4-_L1 {12}
USBP4+_L1 {12}
C495
0.1U/16V/X7R_4
Novo_Button# {36}
USBP5-_L2 {12}
USBP5+_L2 {12}
HP-OUT-L_2 {29}
HP-OUT-R_2 {29}
SENSE_HP {29}
MIC2_L {29}
MIC2_R {29}
USB3.0 ( with AOU5)
BUSBP1BUSBP1+
USBP5-_L2
USBP5+_L2
HP-OUT-L_2
HP-OUT-R_2
SENSE_HP
MIC2_L
MIC2_R
USB1PWR
USB0PWR
AGND
R342 0_6
CN17
202122
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
51519-02041-001
USB_Normal_EN#
USB_Normal_OC3#_L2
A
<UB2>
+3VS5
R421
*R@10K_4
C518
ESD@0.1U/16V/X7R_4
+5VS5
C517
R@1U/6.3V_4X
B
U21
2
VIN1
OUT3
3
VIN2
OUT2
4
EN
OUT1
1
GND
R@BD82031FVJ-GE2
USB1PWR
2A
8
7
6
5
OC
C496
*R@470P/50V_4X
C497
ESD@0.1U/16V/X7R_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
S&C/ USB2 (AOU5)
S&C/ USB2 (AOU5)
S&C/ USB2 (AOU5)
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
35 61 Friday, March 11, 2016
35 61 Friday, March 11, 2016
35 61 Friday, March 11, 2016
E
1A
USB2.0 Power SW
A A
5
<KBC>
EC
VSTBY_FSPI +3VPCU
R719 *0_8_S
VSTBY_FSPI_R
C491
0.1U/16V/X7 R_4
EC_LPCCLK
C809
15P/50V/NP O_4
RSMRST#
LID#
SC15
*ESD@SURGE SUP
S5_ON
C507
0.1U/16V/X7 R_4
SC10
*ESD@SURGE SUP
R737
*100K_4
Layout Note:
Place all capacitors close to IT8512.
C812
C536
0.1U/16V/X7 R_4
0.1U/16V/X7 R_4
PLTRST#
C805
100P/50V_4
For ESD
D3A
8512_SI
8512_SO
8512_SCE#
8512_SCK
C537
0.1U/16V/X7 R_4
PLTRST# {4 ,18,28,30,31 ,33,37}
EC_LPCCLK {10}
LPC_LFRAME # {10,33 }
HDD_DETECT# {3 1}
CLKRUN# {10}
SYS_PW ROK {4}
EC_IRQ_SERIRQ {10}
SIO_EXT_SMI# {10}
SIO_EXT_SCI# {14}
ADAPTER_ID {57}
USB_Norm al_EN# {34,35}
BAT_LV_ALE ART# {42}
C3A
Novo_Button# {35}
SUSON_DDR25 {50}
M/A# {42}
MY[0..17] {38}
LPC_LAD0 {10,3 3}
LPC_LAD1 {10,3 3}
LPC_LAD2 {10,3 3}
LPC_LAD3 {10,3 3}
SUSC# {4}
NB_MUTE# {29}
EC_PW ROK {4,29,37}
RSMRST# {4}
LID# {39}
ACAV_IN {43}
MX[0..7] {38}
VSTBY_FSPI_RR
Auto Load Code
Close to EEPROM
R749 33_4
R748 33_4
R750 33_4
R747 33_4
D D
VSTBY_FSPI_R
EMI suggestion:
Add a 15p bypass
CAP on CLK_PCI_8512
C C
FOR EC auto load code
B B
A A
VSTBY_FSPI
For EMI, Close EC. pin74
C800
*100P/50V/N PO_4
L24 FCM1 005VF-121T05
C818
0.1U/16V/X7 R_4
PLTRST#
HDD_DETECT#
R746 *0_4_S
D11 DB2J 40600L
D25 DB2J 40600L
WRST_851 2#
SUSC#
RSMRST#
Novo_Button#
PCH_SLP_S 0#
C3A
R791 *0_2
8512_SCE#
8512_SI
8512_SO
8512_SCK
MY16
MY17
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
PCH_SPI1_SI_R {10}
PCH_SPI1_SO_ R {10}
PCH_SPI_CS0 #_R {10}
PCH_SPI1_CLK _R {10}
SPI NOR FLASH
5
4
L23 10_6
ITE_AVCC
C802
C801
1U/6.3V_4X
1000P/50V/X 7R_4
+3V
+3.3V_RUN_ EC
C814
0.1U/16V/X7 R_4
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
R720
*0_6_S
LPC
FSPI
KBMX
R745
*0_4_S
10
LAD0/GPM0(X )
9
LAD1/GPM1(X )
8
LAD2/GPM2(X )
7
LAD3/GPM3(X )
22
LPCRST#/W UI4/GPD2(Up)
13
LPCCLK/GPM 4(X)
6
LFRAME#/GP M5(X)
17
TXD/SOUT0/LPCPD #/GPE6(Dn)
76
CLKRUN#/GPH 0/ID0
126
GA20/GPB5(X)
5
SERIRQ/GPM6(X )
15
ECSMI#/GPD4(U p)
23
ECSCI#/GPD3(Up )
14
WRST#
4
KBRST#/GPB6(X )
16
RXD/SIN0/PW UREQ#/B BO/SMCLK2 ALT/GPC7(Up)
122
CTX1/SOUT1/SMDA T3/GPH2/ID2
119
CRX1/SIN1/SM CLK3/GPH1/ID1
123
CTX0/TMA0/GPB2(D n)
113
CRX0/GPC0
33
GINT/CTS0#/GPD5(Up)
109
LID_SW#/ GPB1
108
AC_IN#/GPB0
35
RTS1#/WU I5/GPE5(Dn)
107
GPE4/BTN#
99
FDIO3/DSR0#/GPG6
100
FDIO2/DTR1#/SBUS Y/GPG1/ID7
101
FSCE#
102
FMOSI
103
FMISO
105
FSCK
56
KSO16/SMOS I/GPC3(Dn)
57
KSO17/SMISO/G PC5(Dn)
36
KSO0/PD0
37
KSO1/PD1
38
KSO2/PD2
39
KSO3/PD3
40
KSO4/PD4
41
KSO5/PD5
42
KSO6/PD6
43
KSO7/PD7
44
KSO8/ACK#
45
KSO9/BUSY
46
KSO10/PE
51
KSO11/ERR#
52
KSO12/SLCT
53
KSO13
54
KSO14
55
KSO15
Thermal reset function
PM_THRMTRIP# {2}
SYS_SHDN# {19,37,55}
4
VSTBY_FSPI
R756
VSTBY_FSPI_R
VSTBY_FSPI_RR
*0_4_S
106
11
114
121
VSTBY26VSTBY50VSTBY92VSTBY
VSTBY
VCC(1.8/3.3)
VHSPI (1.8V/3.3V)
ITE8886H
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
VSS
VSS27VSS
1
65
49
D8 *D B2J40600L
ITE_VSTBY
74
AVCC
VSS
VSS
91
104
3
ACDC_ID
MBCLK_THRM
MBDATA_THRM
WRST_851 2#
SC6 *ESD@SURGE SUP
L25 FCM1 005VF-121T05
C816
(For PLL Power)
82
EGAD/GPE1(Dn)
EGCS#/GPE2(Dn)83EGCLK/GPE3(Dn)
0.1U/16V/X7 R_4
20
19
SM BUS
L80LLAT/GPE7(Up)
SMDAT2/PECIRQT#/GP F7(Up)
L80HLAT/BAO/GPE0(Dn)
PS2CLK0/TMB 0/CEC/GPF0(Up )
PS/2
HSPI
PWM
A/D D/A
U51
IT8886HE/AX
PWRSW /GPB3
XLP_OUT/GPB4
SMCLK0/GPF 2
SMDAT0/GPF3
SMCLK1/GPC 1(X)
SMDAT1/GPC2(X )
SMCLK2/PE CI/GPF6(Up)
PS2DAT0/TMB1/GP F1(Up)
PS2CLK2/GP F4(Up)
PS2DAT2/GPF5(U p)
HMOSI/GPH6/ID6
TACH2/HDIO2/GPJ0
HDIO3/GPJ1
HSCE#/GPH3 /ID3(Dn)
HSCK/GPH4/ID4 (Dn)
HMISO/GPH5/ID5(Dn )
PWM0/ GPA0(Up)
PWM1/ GPA1(Up)
PWM2/ GPA2(Up)
PWM3/ GPA3(Up)
PWM4/ GPA4(Up)
PWM5/ GPA5(Up)
PWM6/ SSCK/GPA6 (Up)
PWM7/ RIG1#/GPA7(Up)
TACH0A/GPD6(Dn )
TACH1A/TMA1/GPD 7(Dn)
TMRI0/GPC4(Dn)
TMRI1/GPC6(Dn)
SSCE1#/GPG 0
SSCE0#/GPG 2
RI1#/GPD0(Up)
RI2#/GPD1(Up)
VSTBY0
ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
ADC4/GPI4(X)
ADC5/DCD1#/ WUI29/GPI5(X )
ADC6/DSR1# /WUI30/GP I6(X)
ADC7/CTS1#/W UI31/GPI7(X)
DAC2/TACH0B/G PJ2(X)
DAC3/TACH1B/G PJ3(X)
DAC4/DCD0#/ GPJ4(X)
DAC5/RIG0#/GPJ 5(X)
ITE_VSTBY
127
84
VSTBY(PLL)
GPIO
110
111
87
88
115
116
117
118
85
86
89
90
93
94
95
96
97
98
24
25
28
29
30
31
32
34
47
48
120
124
125
77
18
21
112
66
67
68
69
70
71
72
73
78
79
80
81
VSTBY_FSPI
BL/C#
SUSON_EC
NBSWON #_R
SMBCLK0
SMBDAT0
MBCLK_THRM
MBDATA_THRM
EC_PECI_L
HWPG
VRON_EC
H_PROCHOT_EC
S5_ON
SUSB#
SW_DOC K
DNBSW ON#_R
R751 43_4
D9
DB2J40600L
R757 *0_4_S
R726 *DK@0_4_S
R400 *DK@0_4_S
D10 DB2J 40600L
R779 *0_4
For ESD
TP65
VSTBY_FSPI
SC9 *ESD@220P/50V /X7R_4
SC13 *ESD@SURGE SUP
SC14 *ESD@SURGE SUP
EC_RTC_RST {13}
BL/C# {42}
EC_LID# {25 }
BATLED_AMB ER_LED_EC {38}
SMBCLK0 {42,43}
SMBDAT0 {4 2,43}
MBCLK_THRM {10,1 9,37,42}
MBDATA_THRM {10,1 9,37,42}
EC_PECI {2 }
DOCK_ATTACHED_ 3VPCU# {57}
D/C# {42}
HWPG {4,49,50 }
TP_PS2_CLK {38}
TP_PS2_DAT {38}
USB_STATUS# {35 }
ESC# {38}
USBCHR_ON {3 5}
USB_CTL1 {35}
DGPU_OPP {1 9}
USB_CTL3 {35}
PWRON_ LED {39}
FAN_PW M_R {37}
S5_PW R_PG {44,51}
MAINON {50,53 }
BEEP {29}
SIO_WAK E_SCI# {30,33}
PM_BATLOW _N_EC {4}
FANSIG_R {37}
EC_WL AN_EN {33}
IMVP_PW RGD {45}
LAN_POW ER {30}
S5_ON {44,51,53, 56}
SUSB# {4,18}
EN_OVERRIDE {11}
ACDC_ID_DOCK {39,57}
ACDC_ID {57}
AD_ID {43}
DOCK_DETECT1 {39}
TEMP_MBAT1 {42}
TEMP_MBAT2 {42}
DOCK_DETECT2 {39}
DC_IN_LED_EC {39}
DOCK_PW RON# {39}
DNBSW ON# {4}
AC_PRESE NT_EC {4}
C3A
2
GPJ7
3
GPH7
GPJ6
C811
0.1U/16V/X7 R_4
128
CLOCK
VCORE
AVSS
12
75
C810
*1U/6.3V_4X
D26 DB2J 40600L
DOCK_ATTACHED_ 3V# {39}
EC_RCIN# {10}
BATLED_GREE N_LED_EC {38}
PCH_SLP_S 0# {4}
POWER SWITCH
VSTBY_FSPI
R755
10K_4
C817
0.1U/16V/X7 R_4
R417
*4.7K_4
1 3
*METR3904-G
+3V
2
Q30
VSTBY_FSPI
TP28
R430
100K_4
WRST_851 2# NBSWON#_R
C524
R429
1U/6.3V_4X
*0_4_S
3
2
For ESD
SMBCLK0
SMBDAT0
SC12 *ESD@180P/50V/NPO_4
EC Reset (reserve)
C523
*0.1U/16V/X 7R_4
Delay time(ms)=88000 x CMR(uF)
+3VS5
U23
2
SUSB#
VRON_EC
1
TC7SH08FU(F)
3 5
R412 *0_4
+3VS5
PCH_SLP_S 0#
VRON
U54
2
1
*TC7SH08FU(F)
3 5
R781 0_4
2
SC11 *ESD@180P/50V/NPO_4
U24
1
MRDLY
2
GND
3
CD
C521
*G677L308A3 1U
*0.1U/16V/X 7R_4
H_PROCHOT_EC
tPLT17 and tPLT18
4
VRON
tCPU27 for KABY LAKE
VRON_Q
4
B2A
C820 *100P/50V_ 4
SW_DOC K {40}
VCC
RESET#
MR#
VRON {45,49}
VRON_Q {56}
1
+3V {2,4,10,11,12,13,14 ,15,17,18,25, 26,27,29,30,3 1,34,37,38,4 0,41,42,45,4 9,52,53,54}
VSTBY_FSPI {13,25,29,38,39}
HDD_DETECT#
S5_ON
MBCLK_THRM
MBDATA_THRM
SMBCLK0
SMBDAT0
TEMP_MBAT1
TEMP_MBAT2
Novo_Button#
HWPG
SW_DOC K
Novo_Button#
R428
*10K/F_4
6
5
4
NBSWON #
R410
*10K_4
H_PROCHOT#
3
Q28
2
1
R383
100K_4
SUSC#
SUSON_EC
R431 *22/F_4
C534 *4.7U/6.3V/X 5R_4
R427 *0_4
R418 *0_4_S
2N7002K
+3VS5
U25
2
1
TC7SH08FU(F)
3 5
R423 *0_4
R740 100K_4
R738 10K_4
R753 4.7K_4
R752 4.7K_4
R741 4.7K_4
R742 4.7K_4
R727 *100K_4
R731 *100K_4
R386 4.7K_4
R739 *10K_4
R730 10K_4
C490 1000P/50V/X 7R_4
H_PROCHOT# {2,42,43 ,45}
tPLT15
4
SUSON
C3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
KBC IT8886
KBC IT8886
KBC IT8886
PROJECT :
1
Size Docume nt Number Re v
Size Docume nt Number Re v
Size Docume nt Number Re v
Date: Sheet of
Date: Sheet of
Date: Sheet of
WRST_851 2#
NBSWON #_R
LV6
LV6
LV6
36
VSTBY_FSPI
+3V
VSTBY_FSPI
NBSWON # {39}
VSTBY_FSPI
SUSON {50,56}
36 61 Fri day, March 11 , 2016
36 61 Fri day, March 11 , 2016
36 61 Fri day, March 11 , 2016
1A
1A
1A
1
C287
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,38,40,41,42,45,49,52,53,54}
+5V {26,27,29,31,39,52,53}
+3V_THR
C310
0.1U/16V/X7R_4
37
FAN CONN
+5V
R146 *0_6_S
+3V
R142
10K_4
FANSIG_R {36}
FAN_PWM_R {36}
A A
+5V_FAN
C160
1U/10V/X7R_6
FANSIG_R
+5V_FAN
FAN_PWM_R
C151 *ESD@RCLAMP0551P.TST
C153
0.1U/16V/X7R_4
C156 ESD@PESD5V0V1BL
CN9
1
2
3
465
50281-0040N-001
Thermal Sensor
Placed near FAN
METR3904-G
Q44
METR3904-G
Q43
Placed near SSD
NOTE:
THS_FAN+
2
1 3
THS_FANTHS_SSD+
2
1 3
THS_SSD-
Place near IC Pin
C363
2200P/50V/X7R_4
C364
2200P/50V/X7R_4
Placed near charger circuit.
U9
1
D1+
SCLK
2
D1-
SDA
3
D2+
VDD
D2-4GND
W83773G
ADDRESS: 98H
+3V +3V_THR
R609 *0_4_S
8
7
6
5
SMB_THRM_CLK
SMB_THRM_DAT
10U/6.3V/X5R_6X
CPU PTC circuit
C225
0.1U/16V/X7R_4
Placed back of CPU
+3V
1 2
R152
10K_4
R160
470_6_PTC
2
SYS_SHDN-1#
Q15
PMST3904
1 3
(110 degree setting)
SYS_SHDN-1#
R432
18.7K/F_4
+3V
1
2
Q32
2N7002K
R433 0_4
R435 *0_4
3
D12 DB2J40600L
EC_PWROK {4,29,36}
PLTRST# {4,18,28,30,31,33,36}
SYS_SHDN# {19,36,55}
1
+3V_THR
+3V_THR
R612 4.7K_4
SMB_THRM_DAT
R613 4.7K_4
SMB_THRM_CLK
4 3
1
Q40
SSM6N48FU
+3V_THR
5
MBDATA_THRM {10,19,36,42}
2
6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thermal
Thermal
Thermal
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
To EC
MBCLK_THRM {10,19,36,42}
LV6
LV6
LV6
37 61 Friday, March 11, 2016
37 61 Friday, March 11, 2016
37 61 Friday, March 11, 2016
1A
1A
1A
5
INT KeyBoard <KBC>
R318 10K_4
VSTBY_FSPI
C434 *180P/50V_4
ESC# {36}
D D
CAP_LOCK_LED# {14}
For EMI request
CA4
220PX4
1
MX0
MY1
C C
MY5
MX3
MY13
MY12
MY3
MY6
MY8
MY7
MY4
MY2
MY16
MY17
2
3
4
5
6
7
8
CA2
220PX4
1
2
3
4
5
6
7
8
CA3
220PX4
1
2
3
4
5
6
7
8
C796 220P/50V_4
C795 220P/50V_4
C3A
NUM_LED# {14}
CA1
220PX4
7
5
3
1
CA5
220PX4
1
3
5
7
CA6
220PX4
1
3
5
7
R328 150_4
+3V
MY17 {36}
MY16 {36}
MX1 {36}
MX7 {36}
MX6 {36}
MY9 {36}
MX4 {36}
MX5 {36}
MY0 {36}
MX2 {36}
MX3 {36}
MY5 {36}
MY1 {36}
MX0 {36}
MY2 {36}
MY4 {36}
MY7 {36}
MY8 {36}
MY6 {36}
MY3 {36}
MY12 {36}
MY13 {36}
MY14 {36}
MY11 {36}
MY10 {36}
MY15 {36}
R326 150_4
+3V
8
6
4
2
2
4
6
8
2
4
6
8
R323 * 0_4_S
R329 3 3_4
MY15
MY10
MY11
MY14
MX4
MX5
MY0
MX2
MX1
MX7
MX6
MY9
KB_G
NBSWON#_C
NUM_LED#
VCC_3V_LED_N
MY17
MY16
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
CAP_LOCK_LED#
VCC_3V_LED
CN1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
6782K-Y32N-00L
CAP_LOCK_LED#
NUM_LED#
33
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
34
34
C436 *10P/50V/COG_4
C435 *10P/50V/COG_4
4
TP Control
+3V +3V_TP +3V
C542
0.1U/16V/X7R_4
<TPD>
normal Current : 1mA
C543
0.047U/25V/X7R_4
BTN_L
BTN_L
F9 FUSE 1A
SW1
1
3
RV15@TME-533B-Q-T/R
SW5
1
3
RV14@TME-533B-Q-T/R
TP_PS2_CLK {36}
TP_PS2_DAT { 36}
VR-15
2
4
5
6
V-14
R-14
2
4
5
6
3
R758 4 .7K_4
R761 4 .7K_4
R759 *0_4_S
R760 *0_4_S
BTN_R
BTN_R
BTN_R
SW2
1
3
RV15@TME-533B-Q-T/R
SW3
1
3
V14@TME-533B-Q-T/R
SW4
1
3
R14@TME-533B-Q-T/R
<FPD>Finger Print
USB INTERFACE
+3V +3V_FP
F7 *SHORT_8
C422
FP@0.1U/16V/X7R_4
C3A
C419
FP@0.047U/10V_4
2
1
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27 ,29,30,31,34,36,37,40,41,42,45,49 ,52,53,54}
+5V {26,27,29,31,37,39,52 ,53}
+5VS5 {4,34,35 ,39,41,42,44,45,48,50,51,53,54,5 6}
VSTBY_FSPI {13,25,29,36,39}
+3VS5 {4,10,12,15,26,28,30,32,33,35,36,41,42,44,49,51,53,54,56}
38
Touch pad
+3V_TP
TP_PS2_CLK_R
TP_PS2_DAT_R
BTN_L
BTN_R
2
4
5
6
2
4
5
6
2
4
5
6
+3V_FP
+3V_FP
U44
USBP6-_FP_C
USBP6+_FP_C
2
VIN
IO1
3
GND
IO2
ESD@CM1224-02SR
4
1
CN22
1
2
7
3
4
5
8
6
04 6811 606 090 846+
USBP6-_FP {12}
USBP6+_FP {12}
TP_PS2_CLK_R
TP_PS2_DAT_R
BTN_L
BTN_R
R678 *FP@0_4_S
CML1
4 3
1
*FP@DLW21SN121 SQ2L
R677 *FP@0_4_S
EC48 *ESD@RCLAMP0551 P.TST
EC49 *ESD@RCLAMP0551 P.TST
USBP6-_FP_C USBP6-_FP
2
USBP6+_FP_C USBP6+_FP
+3V_FP
EC47 ESD@PESD5V0V1BL
EC32 ESD@PESD5V0V1BL
1
2
3
4
5
6
FP@04 6811 606 090 846+
EC31 *ESD@RCLAMP0551 P.TST
EC45 ESD@PESD5V0V1BL
EC46 ESD@PESD5V0V1BL
EC30 *ESD@RCLAMP0551 P.TST
CN15
7
8
<UIF>LED
B B
HDD
A A
5
4
Battery
SATA_LED#_R {12}
BATLED_GREEN_LED# BATLED_GREEN_LED_C
BATLED_AMBER_LED# BATLED_AMBER_LED_C
SATA_LED#_R SATA_LED#_ C
R440 5 10_4
R443 200_6
R444 200_6
C545 *680P/50V/X7R_4
C546 *680P/50V/X7R_4
SATA_LED#_C
BATLED_GREEN_LED_C
BATLED_AMBER_LED_C
LED4
1 2
RV14@LTST-S320KGKT
LED2
1 2
RV15@LTST-S320KGKT
For 14
+3V
For 15
+3V
ORANGE
ORANGE
BATLED_GREEN_LED_EC {36}
BATLED_AMBER_LED_EC {36}
GREEN
GREEN
2
1
2
1
LED3
C2
C1
RV14@LTST-S326KGKFKT
LED1
C2
C1
RV15@LTST-S326KGKFKT
F3A
C547 *680P/50V/X7R_4
3
2
For 14
3
+5VS5
A
For 15
3
+5VS5
A
R438 300_4
R439 300_4
BATLED_GREEN_LED#
2
Q33
METR3904-G
1 3
BATLED_AMBER_LED#
2
Q34
METR3904-G
1 3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
KB/TP/FP/LED
KB/TP/FP/LED
KB/TP/FP/LED
1
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LV6
LV6
LV6
1A
1A
1A
38 61 Friday, March 11, 2016
38 61 Friday, March 11, 2016
38 61 Friday, March 11, 2016
A
<DOK>Prolink
R450 20K_4
VSTBY_FSPI
R449 20K_4
VSTBY_FSPI
4 4
DOCK_ATTACHED_3V# DOC K_PWRGOOD#
3 3
USBP3-_DOCK {12}
USBP3+_DOCK {12}
USB30_TX3-_DOCK {1 2}
USB30_TX3+_DOCK {12}
USB30_RX3-_DOCK {12}
USB30_RX3+_DOCK {12}
DOCK_DDI2_TXN3_L {40}
DOCK_DDI2_TXP3_L {40}
DOCK_PWR_CO NSUM {43}
DOCK_DDI2_TXN2_L {40}
DOCK_DDI2_TXP2_L {40}
DOCK_DETECT2 {36}
DOCK_DDI2_TXN1_L {40}
DOCK_DDI2_TXP1_L {40}
DOCK_PWRON# {36}
DOCK_DDI2_TXN0_L {40}
DOCK_DDI2_TXP0_L {40}
DOC_DP_AUXN {40}
DOC_DP_AUXP {40}
+5VS5
DOCKED2 {57}
ACDC_ID_DOCK {3 6,57}
DOCK_DETECT1 { 36}
R448 *DK@0_4_S
R446 *DK@0_4_S
F1 DK@FUSE 2A
VSTBY_FSPI {13,25,29,36,38}
DOCK-PWR20-IN { 57}
USBP3-_DOCK
USBP3+_DOCK
USB30_TX3-_DOCK
USB30_TX3+_DOCK
USB30_RX3-_DOCK
USB30_RX3+_DOCK
DOCK_DDI2_TXN3_L
DOCK_DDI2_TXP3_L
DOCK_DDI2_TXN2_L
DOCK_DDI2_TXP2_L
DOCK_DETECT2
DOCK_DDI2_TXN1_L
DOCK_DDI2_TXP1_L
DOCK_DDI2_TXN0_L
DOCK_DDI2_TXP0_L
DOC_DP_AUXN
DOC_DP_AUXP
+5VS5_DOCK
DOCK_HPD_L
DOCKED2
ACDC_ID_DOCK
DOCK_DETECT1
+5V {26,27,29,31 ,37,52,53}
+3V {2,4,10,11,12,13,14,15,17 ,18,25,26,27,29,30,31,34,36,37 ,38,40,41,42,45,49,52,53,54}
+5VS5 {4,34,35,38,41 ,42,44,45,48,50,51,53,54,56}
DOCK_DETECT1
DOCK_DETECT2
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
DK@51540-03001- V01
B
DP HPD SENSE
C3A
CN3
32
32
31
31
RE_DOCK_DP_HPD {40}
DOCK_ATTACHED_3V# {3 6}
R7
DK@100K_4
DOCK_ATTACHED_3V#
C
+5V
2
Q3 DK@2N7002K
3
1
R6 *DK@0_4
VSTBY_FSPI
R447
100K_4
DOCK_HPD_L
R10
DK@100K_4
D
Power board w LED <UIF>
DC_IN_LED_EC {36}
E
+3VPCU
DOCK-PWR20-IN
R29
100K_4
LID# {36}
PWRON_LED {36}
NBSWON# {36}
R42 300_4
DC_IN_LED#
+5VPCU
2
1 3
DC_IN_LED#
+3VPCU
+5VPCU
DC_IN_LED#
Q5
METR3904-G
CN8
1
2
3
4
RV15@51579-00401 -V01
CN5
14
13
12
11
10
9
8
7
6
5
4
3
2
1
51625-01401-00 1
39
C3A
2 2
1 1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Prolink
Prolink
Prolink
PROJECT :
E
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
LV6
LV6
LV6
1A
1A
1A
39 61 Friday, March 11, 2016
39 61 Friday, March 11, 2016
39 61 Friday, March 11, 2016
5
DP SWITCH
D D
<DPP>
+3V +3V_VCC
L3 DK@HCB160 8KF-221T20_2 A
C41
DK@0.47UF/10V_X5 R_4
C59
DK@1U/10V/X5R_4
C49
DK@0.01U/50V/X7R_ 4
From CPU side
+3V_VCC
+3V_VCC
+3V_VCC
+3V_VCC
C582 DK@0.1U/16 V/X7R_4
C583 DK@0.1U/16 V/X7R_4
C588 DK@0.1U/16 V/X7R_4
C589 DK@0.1U/16 V/X7R_4
C584 0.1 U/16V/X7R_4
C585 0.1 U/16V/X7R_4
C586 0.1 U/16V/X7R_4
C587 0.1 U/16V/X7R_4
DOCK_DDI2_TXN3 {2 }
DOCK_DDI2_TXP3 {2 }
DOCK_DDI2_TXN2 {2 }
DOCK_DDI2_TXP2 {2 }
DOCK_DDI2_TXN1 {2 }
DOCK_DDI2_TXP1 {2 }
DOCK_DDI2_TXN0 {2 }
DOCK_DDI2_TXP0 {2 }
C C
DPSW_PEQ
R50 DK@4.7K_4
R49 DK@4.7K_4
DPSW_PI1
R487 *DK@4.7K_4
DPSW_PI0
B B
PEQ 14.5dB
PI0
PI1LH
CFG0
A A
PCy0
(AUX Interception)
PCy1
(Swing)
R53 DK@4.7K_4
R485 *DK@4.7K_4
DPSW_CFG0
R51 DK@4.7K_4
R481 *DK@4.7K_4
L
H
M
LHAutomatic EQ enable (deafault)
M Auto test enable & input offset cancellation enable
L
H Automatic Switching Mode
L
H
M 400mV/ 0db
L
H
+3V_VCC
+3V_VCC
+3V_VCC
+3V_VCC
11.5dB (Default)
8.5dB
Automatic EQ disable
Auto test disable & input offset cancellation enable(default)
Auto test enable & input offset cancellation enable
Control Switching Mode (Default)
Link training (Default)
800mV/ 0db
Default
+20%
-16.7% M
5
DPSW_PC10
DPSW_PC11
DPSW_PC20
DPSW_PC21
DOCK_DDI2_TXN1
DOCK_DDI2_TXP1
DOCK_DDI2_TXN0
DOCK_DDI2_TXP0
R46 DK@4.7K_4
R477 DK@4.7K_4
R45 *DK@4.7K_4 R56 *DK@4.7K_4
R473 *DK@4.7K_4
R40 *DK@4.7K_4
R470 *DK@4.7K_4
R38 *DK@4.7K_4
R468 *DK@4.7K_4
DP_D3N_C
DP_D3P_C
DP_D2N_C
DP_D2P_C
DP_D1N_C
DP_D1P_C
DP_D0N_C
DP_D0P_C
4
I2C_CTRL_EN
R65 *DK@4.7K_4
R490 DK@0_4
+3V_VCC
SW_DOCK {36}
SW_DOCK
Low
High
Display Priority
VGA
Docking Station
PCH_DOCK_DP_HPD {2}
Hybrid DDC/AUX
DOCK_DDI2_AUXP {2}
DOCK_DDI2_AUXN {2}
4
DOCK_DDI2_AUXN
C578 0.1U/16V/X7R_4
C575 0.1U/16V/X7R_4
R483 *DK@0_4
R478 *DK@0_4
+3V_VCC
DPSW_PI1
I2C_CTRL_EN
PCH_DOCK_DP_HPD_R
IN_CA_DET
DP_D0P_C
DP_D0N_C
DPSW_PEQ
DP_D1P_C
DP_D1N_C
DP_D2P_C
DP_D2N_C
DP_D3P_C
DP_D3N_C
3
C65 DK @0.1U/16V/X7R_4
C64 DK@2.2U/6.3V_6
R48 DK@4.99K/F_ 4
R61 *0_4_S
DP_AUXP_SCL_R
DP_AUXN_SDA_R
IN_DDC_SCL
IN_DDC_SDA
3
+3V_VCC
C62
DK@0.1U/16V/X7R_4
DPSW_CFG0
DPSW_PI0
DPSW_PC10
DPSW_PC11
DPSW_PC20
DPSW_PC21
U28
1
PI1/SCL_CTL
2
I2C_CTL_EN
3
IN_HPD
4
IN_CA_DET
5
VDD33
6
IN_D0P
7
IN_D0N
8
PEQ
9
IN_D1P
10
IN_D1N
11
GND
12
IN_D2P
13
IN_D2N
14
PD
15
IN_D3P
16
IN_D3N
17
CEXT
18
SW
19
GND1
20
REXT
61
THERMAL_PAD
62
THERMAL_PAD1
63
THERMAL_PAD2
64
THERMAL_PAD3
65
THERMAL_PAD4
66
THERMAL_PAD5
67
THERMAL_PAD6
+3V_VCC +3V_VCC
C61
DK@0.1U/16V/X7R_4
PCH_DOCK_DP_HPD_R
R52
R74
*DK@10K_4
*DK@10K_4
1
1
*DK@AO3413_3A
*DK@AO3413_3A
2
2
Q10
Q9
3
3
56
57
59
60
CFG158CFG0
VDD334
PI0/SDA_CTL
VDD33121IN_DDC_SCL22IN_DDC_SDA23IN_AUXP24IN_AUXN25OUT1_AUXP_SCL26OUT1_AUXN_SDA27OUT2_AUXP_SCL28OUT2_AUXN_SDA29VDD332
IN_DDC_SCL
IN_DDC_SDA
DP_AUXP_SCL_R
DP_AUXN_SDA_R
R489
100K_4
+3V_VCC +3V_VCC +3V_VCC
R71
*DK@4.7K_4
3
Q37
IN_CA_DET DOCK_DDI2_AUXP
2
*DK@2N7002K
1
DK@PS8338BQFN60GTR-A1
51
52
PC2153PC2054PC1155PC10
GND2
VDD333
30
THERMAL_PAD12
THERMAL_PAD11
THERMAL_PAD10
THERMAL_PAD9
THERMAL_PAD8
THERMAL_PAD7
+3V_VCC
OUT1_D0P
OUT1_D0N
OUT1_HPD
OUT1_D1P
OUT1_D1N
OUT1_D2P
OUT1_D2N
OUT1_CA_DET
OUT1_D3P
OUT1_D3N
OUT2_D0P
OUT2_D0N
OUT2_HPD
OUT2_D1P
OUT2_D1N
OUT2_D2P
OUT2_D2N
OUT2_CA_DET
OUT2_D3P
OUT2_D3N
DOC_DP_AUXN_R
DOC_DP_AUXP_R
VGA_DP_AUXN
VGA_DP_AUXP
2
C54
DK@0.1U/16V/X7R_4
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
73
72
71
70
69
68
C53
DK@0.1U/16V/X7R_4
DOC_DP_AUXN_R
DOC_DP_AUXP_R
B2A
VGA_DP_AUXN
VGA_DP_AUXP
2
VGA_DDI2_TXP0_L
VGA_DDI2_TXN0_L
VGA_DDI2_TXP1_L
VGA_DDI2_TXN1_L
OUT2_CA_DET
DOCK_DDI2_TXP0_ R
DOCK_DDI2_TXN0_R
DOCK_DDI2_TXP1_ R
DOCK_DDI2_TXN1_R
DOCK_DDI2_TXP2_ R
DOCK_DDI2_TXN2_R
OUT1_CA_DET
DOCK_DDI2_TXP3_ R
DOCK_DDI2_TXN3_R
PCy0
DOCK_DDI2_TXP0
DOCK_DDI2_TXN0
DOCK_DDI2_TXP1
DOCK_DDI2_TXN1
PCH_DOCK_DP_HPD_R
DOCK_DDI2_AUXP
DOCK_DDI2_AUXN
R26 *DK@0_4_S
R452 DK@1M_4
C559 DK@0 .1U/16V/X7R_4
C558 DK@0 .1U/16V/X7R_4
C565 DK@0 .1U/16V/X7R_4
C564 DK@0 .1U/16V/X7R_4
C557 DK@0 .1U/16V/X7R_4
C556 DK@0 .1U/16V/X7R_4
R451 DK@1M_4
C555 DK@0 .1U/16V/X7R_4
C554 DK@0 .1U/16V/X7R_4
C569 D K@0.1U/16V/X7R_4
C570 D K@0.1U/16V/X7R_4
R63 NDK@0_2
R62 NDK@0_2
R59 NDK@0_2
R58 NDK@0_2
R64 NDK@0_2
R475 NDK@0_2
R471 NDK@0_2
VGA_DDI1_HPD
VGA_DDI2_TXP0_M
VGA_DDI2_TXN0_M
VGA_DDI2_TXP1_M
VGA_DDI2_TXN1_M
VGA_DDI1_HPD_M
VGA_DP_AUXP_M
VGA_DP_AUXN_M
1
+3V {2,4,10,11, 12,13,14,1 5,17,18,25 ,26,27,29 ,30,31,34, 36,37,38,4 1,42,45,49 ,52,53,54 }
VGA_DDI2_TXP0_L {27}
VGA_DDI2_TXN0_L {27}
VGA_DDI1_HPD {27}
VGA_DDI2_TXP1_L {27}
VGA_DDI2_TXN1_L {27}
DOCK_DDI2_TXP0_ L {39}
DOCK_DDI2_TXN0_L {3 9}
RE_DOCK_DP_HPD {39}
DOCK_DDI2_TXP1_ L {39}
DOCK_DDI2_TXN1_L {3 9}
DOCK_DDI2_TXP2_ L {39}
DOCK_DDI2_TXN2_L {3 9}
DOCK_DDI2_TXP3_ L {39}
DOCK_DDI2_TXN3_L {3 9}
R30 DK@100K_4
R37 DK@100K_4
DOC_DP_AUXN {39}
DOC_DP_AUXP {39}
VGA_DP_AUXN {27}
VGA_DP_AUXP {2 7}
R777 DK@100K_4
R778 DK@100K_4
R456 NDK@0_2
R455 NDK@0_2
R454 NDK@0_2
R453 NDK@0_2
R27 NDK@0_2
R43 NDK@0_2
R41 NDK@0_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DP SW(PS8338B)
DP SW(PS8338B)
DP SW(PS8338B)
Date: Sheet of
Date: Sheet of
Date: Sheet of
TO VGA
TO Onelink+
+3V_VCC
+3V_VCC
VGA_DDI2_TXP0_L
VGA_DDI2_TXN0_L
VGA_DDI2_TXP1_L
VGA_DDI2_TXN1_L
VGA_DDI1_HPD
VGA_DP_AUXP
VGA_DP_AUXN
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
LV6
LV6
LV6
40
40 61 Friday, March 11 , 2016
40 61 Friday, March 11 , 2016
40 61 Friday, March 11 , 2016
1A
1A
1A
5
HOLE
4
3
2
1
41
D D
H6
*H-TC197iBC146D146PT
1
H15
6 7
123
5
4
*HG-C236D98P2
8
9
C C
H7
*H-TC197iBC146D146PT
1
H2
6 7
8
9
5
4
123
*HG-TC268BC236D98P2
H10
*H-TC197iBC146D146PT
1
H14
6 7
8
9
5
4
123
*HG-TC268BC236D98P2
H11
*H-TC197iBC146D146PT
1
H1
*H-LV6-2
1
H8
*H-TC197iBC146D146PT
1
H16
*h-c236i118d98p2
1
H3
*H-TC197iBC146D146PT
1
H12
6 7
123
5
4
*HG-LV6-3
8
9
B2A
H19
*SPAD-C197
H20
*SPAD-C197
1
1
F3A
H22
*H-TC197iBC146D146PT
H23
*H-TC197iBC146D146PT
1
1
C3A C3A
H4
8
9
123
*hg-tc268ic268bc315d142p2
H17
H5
123
6 7
5
4
*HG-LV6-1
8
9
6 7
5
4
8
9
123
H9
6 7
5
4
*HG-C236D98P2
5032HB25-4011WC1
1
H18
SSD@4515HB25-3511WC1
1
B2A C3A
H13
*H-C83D83N
1
H21
*h-o102x94d102x94n
1
C3A C3A
B B
A A
<EMC>
+3VS5 +5VS5
C539 *1U/6.3V_4X
C538 *22U/6.3V/X5R_6
C535 *1U/6.3V_4X
C540 *22U/6.3V/X5R_6
C727 *1U/6.3V_4X
C500 *22U/6.3V/X5R_6
+3V
C774 *1U/6.3V_4X
C82 *1U/6.3V_4X
C149 *1U/6.3V_4X
5
F3A
+5VS5
C847 ESD@0.1U/16V/X7R_4
C848 ESD@0.1U/16V/X7R_4
C849 ESD@0.1U/16V/X7R_4
C850 ESD@0.1U/16V/X7R_4
C851 ESD@0.1U/16V/X7R_4
C852 ESD@0.1U/16V/X7R_4
C853 ESD@0.1U/16V/X7R_4
C854 *ESD@0.1U/16V/X7R_4
C855 *ESD@0.1U/16V/X7R_4
4
+3VS5
C3A
C493 *1U/6.3V_4X
C418 *1U/6.3V_4X
C80 1U/6.3V_4X
C829 0.1U/16V/X7R_4
C830 0.1U/16V/X7R_4
C831 0.1U/16V/X7R_4
+5VS5
C544 *1U/6.3V_4X
C263 *1U/6.3V_4X
C541 *1U/6.3V_4X
3
2
C3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EMC/Screw Hole
EMC/Screw Hole
EMC/Screw Hole
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
+5VPCU
C832 0.1U/16V/X7R_4
C833 0.1U/16V/X7R_4
LV6
LV6
LV6
1
1A
1A
1A
41 61 Friday, March 11, 2016
41 61 Friday, March 11, 2016
41 61 Friday, March 11, 2016
PJP5
C51113-10839-L
PWR1
PWR2
I2C_CLK
I2C_DATA
TS
RTC
D D
C C
B B
A A
GND2
GND2
PJP7
2B@BTS1L-7K8040
9
GND2
8
GND2
PWR1
PWR2
I2C_CLK
I2C_DATA
TEMP
GND2
GND2
5
PF2
fuse-10A-32VF_1206
1
2
3
4
5
6
7
8
1
ABAT
2
3
4
5
6
7
MBDATA_THRM {10,19,36,37}
1 2
MBAT
SMC_1
SMD_1
PR15
PR14
200/F_4
SMBDAT0 {36,43} SMBCLK0 {36,43}
2B@PDZ5.6B
+3VPCU
TEMP_MBAT2
PC53
2B@0.1U/16V/X7R_4
PD5
PDZ5.6B
1 2
SMC_2
SMD_2
PR75
2B@200/F_4
PD13
B2B
PR16
10K/F_4
5
+3VPCU
TEMP_MBAT1
PC3
0.1U/16V/X7R_4
PR101
10K/F_4
200/F_4
SMBCLK0 SMBDAT0
PD6
PDZ5.6B
2 1
2 1
TEMP_MBAT1 {36}
PF4
2B@fuse-10A-32VF_1206
PR66
2B@200/F_4
MBCLK_THRM MBDATA_THRM
PD12
2B@PDZ5.6B
2 1
2 1
TEMP_MBAT2 {36}
1 2
PC4
0.1U/50V/X7R_6
1 2
PC11
2B@0.1U/50V/X7R_6
HCB2012KF-800T50
HCB2012KF-800T50
4
PL2
PL1
PQ7
LTC044EUBFS8TL
2
ADISCHG
BL/C# D/C# M/A# Status
0 0 0 Chareg A batt
0 0 1 Charge M batt
0 1 0 Diccharge A batt
0 1 1 Discharge M batt
1 0 0 Free Dicharge
1 0 1 Free Dicharge
1 1 0 Free Dicharge
1 1 1 Free Dicharge
PL4
2B@HCB2012KF-800T50
PL3
2B@HCB2012KF-800T50
2B@LTC044EUBFS8TL
MDISCHG
MBCLK_THRM {10,19,36,37}
4
2
PQ14
1 3
ACHG
1 3
MCHG
MBAT+
123 4
6
PR19
10K/F_4
PQ9
IMD2AT108
5
ABAT+
123 4
5
6
SI-2 modify 4/15
TPCC8131
1
2
3
TPCC8131
2B@TPCC8131
2B@TPCC8105
1
2
3
PQ17
2B@IMD2AT108
PR32
2B@10K/F_4
4
4
PQ37
PQ38
PQ36
PQ42
PQ39
TPCC8131
5
5
5
321
*SHORTPAD
0.01U/50V/X7R_4
321
Vincent 1/28 D
5
PQ40
2B@TPCC8105
5
5
3
1
2
3
4
Vincent 1/28 D
4
PR25 *SHORT_4
BAT-V
PJP1
1 2
PC5
4
PR21
*SHORT_4
BAT-R
1
2
3
4
ADISCHG_1
3
MDISCHG_1
PR24
100K/F_4
1 2
PR22
2B@100K/F_4
1 2
1 3
PC6
2B@0.01U/50V/X7R_4
PR26
2B@100K/F_4
PR29
2B@20K/F_4
PQ15
2B@LTC044EUBFS8TL
2
1 3
PQ11
LTC044EUBFS8TL
2
1 3
PQ13
2B@LTC044EUBFS8TL
2
ACHG
ADISCHG
+3VPCU
PC1
1 2
0.1U/50V/X7R_6
PR28
100K/F_4
PR183
20K/F_4
PQ8
LTC044EUBFS8TL
1 3
MCHG
16
Y015Y114Y213Y312Y411Y510Y69Y7
VDD
CD74HC237PWR
A1B2C3GL4G16G2
BAT-R
2
PU1
MDISCHG
BL/C#
D/C#
M/A#
PJP2
*SHORTPAD
PC7
0.01U/50V/X7R_4
+1.8V_DEEP_SUS
7
GND
5
8
2
BAT-V
1 2
Battery mode = 6V
+VIN
+3V
Set +VIN=5.97~6.18V
+3VS5
BL/C# {36}
D/C# {36}
M/A# {36}
2
PD14
DA2J10100L
PC5398
0.1U/25V/X5R_4
PR3195
10K/F_4
PR3196
1 2
*0_4/S
+3VS5
2 1
DA2J10100L
PR3192 4.7M_4
+3V
PR3193
*75K/F_4
Remove PQ3,PQ4,PQ5,PR5,PR6
+3VS5
2N7002K
PD32
PR3197
*10K/F_4
PR180
95.3K/F_4
PR181
115K/F_4
PQ41
5
2 1
1
3
3
2
1
PR3202
348K/F_4
PR3201
2M/F_4
PR3199
10K/F_4
PR3198
*10K/F_4
PR3200
10K/F_4
+3V
5
PC5395
0.01U/50V/X7R_4
+3V
*10K/F_4
3 4
PQ73A
*2N7002KDW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
0.1U/16V/X7R_4
5
+
-
2
PC5397
0.9V
PR3191
10K/F_4
3 4
2
PR3204
*100K/F_4
+3VS5 +VIN
PC105
PR182
47K_4
4
PU6
1 2
G1363T11U
PR178
100K/F_4
BL/C#
+3V
PC5394
5
1
+
3
-
PU25
G1363T11U
2
PC5396
0.1U/16V/X7R_4
6 1
2
PQ71A
PR3203
100K/F_4
2N7002KDW
6 1
PQ73B
*2N7002KDW
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+5VS5
*100P/50V_4
PR3194
BATTERY SELECTOR
BATTERY SELECTOR
BATTERY SELECTOR
4
0.1U/16V/X7R_4
PR3205
1 2
*0_4/S
H_PROCHOT# {2,36,43,45}
PQ71B
2N7002KDW
BAT_LV_ALEART# {36}
LV6
LV6
LV6
42 61 Friday, March 11, 2016
42 61 Friday, March 11, 2016
42 61 Friday, March 11, 2016
42
1A
1A
1A
5
4
3
2
1
43
5
BATDIS_G
PR200
430K/F_2
PR59
71.5K/F_2
+3VPCU
+3VPCU
ACAV_IN
AD_ID
PC104
0.01U/50V/X7R_4
PC116
0.01U/50V/X7R_4
PQ18
TPCA8065-H
3
2
1
4
+VAD
Vincent 1/28 D
PR55 *0_2/S
PR50 *0_2/S
PR54 *0_2/S
PR46 *100K/F_2
PR45 *100K/F_2
REGN6V
PR197
10/F_2
PR198
10/F_2
+PRWSRC +VIN
0.01/1206/1%/1W
PC10
0.1U/50V/X7R_6
PR47
4.02K/F_4
PR190
10/F_8
PC117
100P/50V_2
PC114
100P/50V_2
PR43
4.02K/F_4
PC14
1U/25V/X7R_6
PC26
*1000P/50V_4
PR48
*0_2/S
PR49
100K/F_2
PR196
100K/F_2
+3VPCU
BQCMSRC
BQACDRV
BQVCC
BQACDET
BQPROCHOT
BQBATPRES
BQTB_STAT
PC20
0.1U/25V/X5R_4
28
11
12
10
15
16
BQIADP
BQIBAT
PR189
100K/F_2
43.2K/F_4
3
4
6
5
7
8
PR191
PR34
*0_2/S
PU2
CMSRC
ACDRV
VCC
ACDET
SDA
SCL
PROCHOT
BATPRES
TB_STAT
ACOK
IADP
IDCHG
BQ24780SRUYR
ILIM
21
BQILIM
4
+VAD
D D
PC9
2200P/50V/X7R_4
Do Not add test pad on
BATDIS_G signal
C C
ACDET=16.83V
SMBDAT0 {36,42}
SMBCLK0 {36,42}
H_PROCHOT# {2,36,42,45}
Vincent 12/30 C
Vsystem +VAD
2 1
PD10
*1N4448WS-7-F
PR63
*430K/F_2
SMBDAT0 BQDATA
SMBCLK0 BQCLK
H_PROCHOT#
B B
ACAV_IN {36}
AD_ID {36}
Place this cap
close to EC
VIDCHG = 8 or 16 × (VSRN – VSRP)
A A
Place this cap
close to EC
5
PR35
PC18
0.1U/25V/X5R_4
PR39
10/F_4
BQACP
2
ACP
CMPOUT
CMPIN
PMON
9
14
13
PR194
*0_2/S
PR193
*23.2K/F_4
Vincent 12/30 C
2 1
PR36
*0_2/S
PC15
BQACN_N
0.1U/25V/X5R_4
PR38
10/F_4
PR37
1K/F_2
PC16
*0.1U/25V/X5R_4
BQACN
1
ACN
24
REGN
26
HIDRV
25
BTST
27
PHASE
23
LODRV
22
GND
29
PAD
17
BATSRC
20
SRP
19
SRN
18
BATDRV
30
PAD
31
PAD
32
PAD
33
PAD
34
PAD
35
PAD
PAD36PAD37PAD
38
PR199
*0_2/S
BQBATDRV
Place this ZVS close to
Far-Far away +VIN
DOCK_PWR_CONSUM {39}
REGN6V
PD9
UDZVTE-178.2B
2 1
PC111
2.2U/10V/X7R_6
BQHIDRV
Vincent 1/28 D
BQB_2 BQB_1
PR33 *0_6S
BQPHASE
BQLODRV
BQBATSRC
PR192 10/F_6
BQSRP
PR40 *0_6S
BQSRN
PR41 *0_6S
BQBATDRV
PMON
PC115
*100P/50V_2
PMON {45}
3
5
PR31
4.02K/F_4
PC13
0.047U/25V/X7R_4
PC17
0.1U/25V/X5R_4
PC21
0.1U/25V/X5R_4
PQ16
TPCA8A10-H
4
PQ44
TPCC8067-H
PQ43
TPCC8067-H
+BAT_DIS
3
2
1
5 2
4
3
5 2
4
3
PC19
0.1U/25V/X5R_4
PC8
0.01U/50V/X7R_4
+VIN
PC112
1
4.7U/25V/H=0.85_8
3.3UH-PCMC063T3R3MN-6A
PR184
2.2_6
PC106
1
2200P/50V/X7R_4
CSOP
CSON
PC107
For EMI
EC5
1U/25V_4
+PRWSRC
EC4
1U/25V_4
EC6
1U/25V_4
EC3
1U/25V_4
C3A
For ISN
EC17
PC108
PC113
0.1U/25V/X5R_4
2200P/50V/X7R_4
4.7U/25V/H=0.85_8
+BAT_DIS
PL5
0.01/1206/1%/1W
PR185
*0_2/S
2
EC8
*10U/25V_8
*10U/25V_8
PR186
2 1
PC110
PC109
PR187
*0_2/S
10U/25V/X5R_8
10U/25V/X5R_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+VBATA - BQ24780SRUYR
+VBATA - BQ24780SRUYR
+VBATA - BQ24780SRUYR
Date: Sheet of
Date: Sheet of
Date: Sheet of
BAT-V
PC12
2 1
0.1U/25V/X5R_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
PD8
*RB501V-40
LV6
LV6
LV6
1A
1A
43 61 Friday, March 11, 2016
43 61 Friday, March 11, 2016
43 61 Friday, March 11, 2016
1A
5
4
3
2
1
44
+VIN
PJP15
D D
PC3060
PR3025
1 2
*0_4/S
S5_ON {36,51,53,56}
S5_PWR_PG {36,51}
+5VS5
C C
PR3026
5.1_6
2.2U/6.3V/X5R_4
LDO=5V/100mA
Double check value
B B
A A
with vendor
S5_PWR_PG
+VIN
S5_ON
1 2
*SHORTPAD
PR3023
1M_4
PR3011 0_4
PC3050
*0.1U/16V/X7R_4
S5_PWR_PG
1 2
+3VPCU
PR3033
*0_4
+V3P3A_LDO
Maximum current = 100mA
+5VPCU
VL
PC3016
4.7U/6.3V/X5R_4
SY8288CPG
Vih=0.8V
PR3012
499K/F_4
PR3016
0_4
PR3014
150K/F_4
SY8288CEN
PC3031
*0.1U/16V/X7R_4
PC3033
2.2U/6.3V/X5R_4
PC3049
PR3027*0_4_S
PR329 *0R_6/S
PU3001 SY8288CRAC
15
LDO
9
PGOOD
11
EN2
12
EN1
17
VCC
0.1U/25V/X5R_4
VCC=3.3V
Do Not add test pad on VCC & LDO pin
5
PC3047
10U/25V/X5R_8
PC3045
4.7U/10V/X5R_6
VIN
VIN
VIN
VIN
GND
BST
SW
SW
SW
NC
NC
VOUT
FB
GND8GND18GND
21
+V3P3A_VIN
PC3057
10U/25V/X5R_8
V3P3A_EN
V3P3A_PWRGD
V3P3A_VBYP
V3P3A_ENLDO
2
3
4
5
7
1
SY8288CBST
6
SY8288CSW
19
20
10
16
14
SY8288CVOUT
13
SY8288CFB
PC3055
2200P/50V/X7R_4
1
VIN
13
EN
4
PGOOD
3
VBYP
6
PR3013
*0R_6/S
ENLDO
LDO
AGND
PR330
PC3017
*0_4
0.1U/25V/X5R_4
PR3018
1K/F_4
PU3002
RT7290AGQUF
CLK5VCC
V3P3A_CLK
5VPCU_VIN
PC3018
10U/25V/X5R_8
SY8288CBST_S
12
14
Freq=600KHZ
4
PR3024
*0R_6/S
V3P3A_BOOT
10
BOOT
SW1
SW2
SW3
SW4
VOUT
PGND
11
+VCC_V3P3A
PC3058
1U/10V/X5R_4
PC3019
10U/25V/X5R_8
PC3023
0.1U/25V/X5R_4
V3P3A_BOOT_R
8
9
15
16
V3P3A_VOUT
7
2
PC3020
2200P/50V/X7R_4
PR3015
*4.7_6
PC3030
*680p/50V_6
PC3048
0.1U/25V/X5R_4
PC3042
*0.1u/10V_4
PC3021
PL3001
1.5uH_7X7X3
Idc=9A
PC3032
470P/50V/X7R_4
+3VPCU
+
PC3046
*150U/6.3V_3528
3.3 Volt +/- 5%
TDC : 4.702A
PEAK : 6.27A
Width : 200mil
PJP16
1 2
*SHORTPAD
PC3036
0.1U/50V/X7R_6
3
1
PC3037
0.1U/50V/X7R_6
PR3019
2
+3VS5
V3P3A_CLK
0_4
3
1
PC3035
0.1U/50V/X7R_6
+5VS5
PR3020
0_4
PC3038
0.1U/50V/X7R_6
PD24
1PS302
2
+VIN {25,42,43,45,46,47,48,49,50,51,52,56}
+3VPCU {36,39,42,43,57}
+3VS5 {4,10,12,15,26,28,30,32,33,35,36,41,42,49,51,53,54,56}
+5VS5 {4,34,35,38,39,41,42,45,48,50,51,53,54,56}
+15VPCU {55,56}
+5VPCU {39,41}
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
3/5VS5 - TPS51225B
3/5VS5 - TPS51225B
3/5VS5 - TPS51225B
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1
1A
1A
44 61 Friday, March 11, 2016
44 61 Friday, March 11, 2016
44 61 Friday, March 11, 2016
1A
PR3031
*2.2_6
+V3P3A_LX_R
PC3051
*150p/50V_4
PL3002
2.2uH_7X7X3
+V3P3A_LX
PC3041
PC3056
22U/6.3V/X5R_6
PC3028
PC3027
*22U/6.3V_8
*22U/6.3V_8
PC3025
22U/6.3V_8
PC3040
22U/6.3V/X5R_6
+5VPCU_SRC
PC3026
22U/6.3V_8
PR3028
1 2
*0_4/S
+VIN
PJP14
1 2
*SHORTPAD
PC3059
10U/25V/X5R_8
0.1U/25V/X5R_4
PC3024
PR3017
0_4
22U/6.3V_8
3
PC3044
22U/6.3V/X5R_6
22U/6.3V/X5R_6
+5VPCU
5 Volt +/- 5%
TDC : 7.35A
PEAK : 9.8A
Width : 300mil
+5VS5
PC3029
0.1U/16V/X7R_4
+V3P3A_OUT
PC3043
22U/6.3V/X5R_6
PJP10
*SHORTPAD
1 2
PC3053
+15VPCU
PC3054
22U/6.3V/X5R_6
0.1U/16V/X7R_4
PD23
1PS302
PR3021
*0R_6/S
2
5
4
3
2
1
Vincent 12/24 C
PR98
PC59
3.65K/F_4
PR99
3.65K/F_4
PR100
1K/F_2
PC57
PC142
1500P/50V/X7R_4
PC1460.1U/16V/X7R_4
PC1451000P/50V/X7R_4
PR226 57.6K/F_2
COMP_CORE
TSENSE_CORE
ILIM_CORE
34
31
30
27
ILIM_1a
IOUT_1a
COMP_1a
TSENSE_1ph
PSYS
TSENSE_2ph
VR_RDY42EN
50
11
41
TSENSE_GT
PMON
VR_EN
VR_RDY
PC126
0.1U/16V/X7R_4
PR211
24K/F_2
PR77
49.9/F_2
PR79 604/F_4
PR83 154K/F_2
program IccMax_2ph
VSN_CORE
29
VSP_2ph
51
VSP_GT
VSP_CORE
28
VSP_1a
VSN_1a
PU4
NCP81206
VSN_2ph
1
52
VSN_GT
PC31
470P/50V_2
PC58
CSP_CORE
CSN_CORE
33
32
CSN_1a
DIFFOUT_2ph/IccMax_2ph2FB_2ph3ILIM_2ph5CSCOMP_2ph
IOUT_2ph
IOUT_GT
DIFFOUT_GT
PC128 470P/50V_2
PC60
1000P/50V/X7R_4
PC141
IOUT_CORE
49
48
45
44
46
47
43
40
39
35
36
37
38
12
1000P/50V/X7R_4
3300P/50V/X7R_4
PR222
2K/F_2
PC140
15P/50V_2
PR224 100K/F_2
VSP_1b
VSN_1b
CSN_1b
CSP_1b
ILIM_1b
COMP_1b
IOUT_1b
PWM/ADDR_VBOOT
DRON
VR_HOT#
SDIO
ALERT#
SCLK
VRMP
PR206
1.27K/F_2
PC122
3300P/50V/X7R_4
4
Vincent 1/28 D
VCC_SENSE {5}
VSS_SENSE {5}
PR103
100/F_4
+VCCSTPLL
PR104
*110/F_4
PR105
45.3/F_4
PR102
*75/F_4
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK
D D
Vincent 1/28 D
CSN_SA {48}
PR89
14K/F_4
PR227
7.5K/F_2
PR213
1.5K_2
PWM_SA
DRON
IMVP_PWRGD
PR93 10K/F_4
PR85 *0_2/S
1000P/50V/X7R_4
PR86 *0_2/S
CSN_SA
1 2
PR229
100K/F_4 NTC
0.018U/16V/X7R_4
PC133
15P/50V_2
PC131
0.01U/50V/X7R_4
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK
+VIN
Vincent 1/28 D
PR111 10K/F_4
+3V
PC38
PC45
VCCSA_SENSE {6}
VSSSA_SENSE {6}
C C
SWN_SA {48}
VCCSA_SENSE
VSSSA_SENSE
Place close to
VCCSA Inductor
SWN_SA
Vincent 12/24 C
PWM_SA {48}
DRON {48}
H_PROCHOT# {2,36,42,43}
VR_SVID_DATA {5}
VR_SVID_ALERT# {5}
VR_SVID_CLK {5}
B B
IMVP_PWRGD {36}
VRON {36,49}
VRON
Vincent 12/7 B
VCCGT_SENSE {7}
VSSGT_SENSE {7}
PR246
*0_2/S
A A
PR245
5
VCCGT_SENSE
VSSGT_SENSE
TSENSE_GT TSENSE_CORE
PR247
1 2
61.9K/F_2
100K/F_4 NTC
place close to
GT MOSFET
VCC_SENSE
VSS_SENSE
PC61
0.1U/16V/X7R_4
H_PROCHOT#
PC41
1000P/50V/X7R_4
PR88
2.61K/F_4
PR87
1K/F_4
PC42
2200P/50V/X7R_4
PC44
2200P/50V/X7R_4
PR216 34K/F_4
PC136 1000P/50V/X7R_4
PC139
470P/50V/X7R_4
PR221 105K/F_4
PR92 51.1K/F_4
PR94 75/F_2
PR95 10/F_2
PR96 *0_2/S
PR97 49.9/F_2
PR208 1K/F_4
PMON {43}
PC268
0.1U/16V/X7R_4
PR209 *0_2/S
PR204 *0_2/S
Vincent 1/28 D
PR219
PR109 *0_2/S
PR108 *0_2/S
Vincent 12/24 C
470P/50V/X7R_4
VSP_SA
VSN_SA
CSN_SA
CSP_SA
ILIM_SA
COMP_SA
IOUT_SA
VR_HOT# H_PROCHOT#
SDIO
ALERT#
SCLK
VRMP
PC125
0.01U/50V/X7R_4
PR91 0_2
PMON
PR214 20K/F_2
PC134 *100P/50V_2
1000P/50V/X7R_4
PR217
*0_2/S
PR223
1 2
61.9K/F_2
100K/F_4 NTC
place close to
VCORE MOSFET
PC121
100K/F_4 NTC
PC55
0.022U/16V/X7R_4
0.01U/50V/X7R_4
BST_CORE
HG_CORE
25
24
26
HG3
BST3
CSP_1a
COMP_2ph
4
COMP_GT
FB_GT
ILIM_GT
PR207
15K/F_2
PC33 15P/50V_2
PR73
3.65K/F_4
Vincent 12/24 C
PR235
SW3
LG2/ICCMAX_1a
6
CSCOMP_GT
3300P/50V/X7R_4
HG_GT1
23
15
LG3/ICCMAX_1b
LG1/ROSC
CSP1_2ph
CSREF_2ph
CSP2_2ph
CSSUM_2ph
EPAD
53
13
PC28
Place close to
VCORE Inductor
1 2
PR107
14K/F_4
0.22U/25V/X7R_6
PR220
11K/F_4
HG1
14
BST1
16
SW1
17
21
HG2
22
BST2
20
SW2
19
10
8
9
7
18
PVCC
VCC
PR72
2.2_6
PC36
1U/6.3V_4X
3
PR110
7.5K/F_2
PC50
BST_GT1
BST_GT2
CSP_GT1
CSREF_GT
CSP_GT2
CSSUM_GT
PR244
1_6
0.22U/25V/X7R_6
0.22U/25V/X7R_6
+5VS5
PC132
2.2U/6.3V/X5R_4
PR228
1_6
HG_GT1_L
PC37
PR212
PR237
14K/F_4
PC43
1_6
PR215 22.6K/F_4
0.047U/25V/X7R_4
0.047U/25V/X7R_4
SWN_CORE
HG_CORE_L
SW_CORE
LG_CORE
PC127
0.1U/25V/X5R_4
PC119
PC123
SWN_CORE {46}
HG_CORE_L {46}
SW_CORE {46}
LG_CORE {46}
HG_GT1_L {47}
SW_GT1
LG_GT1
HG_GT2_L HG_GT2
SW_GT2
LG_GT2
PR78
4.75K/F_2
PR252
10/F_2
PR253
10/F_2
PR80
4.75K/F_2
SWN_GT1
CSN_GT1
CSN_GT2
SWN_GT2
SW_GT1 {47}
LG_GT1 {47}
HG_GT2_L {47}
SW_GT2 {47}
LG_GT2 {47}
PR67
73.2K/F_4
PR69
73.2K/F_4
PC32
1000P/50V/X7R_4
2
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,49,52,53,54}
+VIN {25,42,43,44,46,47,48,49,50,51,52,56}
+5VS5 {4,34,35,38,39,41,42,44,48,50,51,53,54,56}
+VCCSA {6,48}
+VCCGT {7,47}
+VCCSTPLL {2,4,5,6,9,53,56}
+VCC_CORE {5,46}
CSN_CORE {46}
SWN_GT1 {47}
SWN_GT2 {47}
CSN_GT1 {47}
CSN_GT2 {47}
Place close to
PR68
165K/F_4
PC35
*390P/50V_4
GT1 Inductor
PR240
75K/F_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PR242
1 2
220K/F_4 NTC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CPU VR IC - NCP81206
CPU VR IC - NCP81206
CPU VR IC - NCP81206
1
LV6
LV6
LV6
45
45 61 Friday, March 11, 2016
45 61 Friday, March 11, 2016
45 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
46
D D
Vincent 12/24 C
4
PC137
PC143
PC49
PC52
+VIN_VCC_CORE
PC54
PC56
2200P/50V/X7R_4
PG2
HCB2012KF-800T50
+VIN
PC124
0.1U/25V/X5R_4
+VCC_CORE
TDC : 21A
HG_CORE_L {45}
C C
B B
SW_CORE {45}
LG_CORE {45}
HG_CORE_L
SW_CORE
LG_CORE
1
2
8
5
6
7
PQ49
10
NTMFD4C86NT1G
4.7U/25V/H=0.85_8
PR106
2.2_6
PC62
2200P/50V/X7R_4
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
PL8
0.15UH-PCME064T-R15MS0R667-36A
1 2
3
4
CSN_CORE
SWN_CORE
DCR=0.66m ohm
1 2
+
CSN_CORE {45}
SWN_CORE {45}
Vincent 1/7 C
PC149
330U/2V/5X4.2/ESR=10/VLPB
ICC_MAX :29A
+VCC_CORE
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCCORE
VCCORE
VCCORE
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
1
46 61 Friday, March 11, 2016
46 61 Friday, March 11, 2016
46 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
47
D D
1 2
+
*47U/25V/6X6.1/NCC/ESR30/APXF_NEO
CSN_GT1 {45}
SWN_GT1 {45}
+VIN +VIN_VCCGT
1 2
PC213
+
*47U/25V/6X6.1/NCC/ESR30/APXF_NEO
PC182
Vincent 1/7 C
330U/2V/5X4.2/ESR=10/VLPB
+VCCGT
+VCCGT
TDC :A
ICC_MAX :64A
PG6
Vincent 12/24 C
PC180
4
PQ51
5
6
7
10
NTMFD4C86NT1G
HG_GT1_L {45}
SW_GT1 {45}
C C
LG_GT1 {45}
HG_GT1_L
SW_GT1
LG_GT1
1
2
8
PC181
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
PC72
*4.7U/25V/H=0.85_8
PR124
2.2_6
PC74
2200P/50V/X7R_4
PC73
PC71
0.1U/25V/X5R_4
*4.7U/25V/H=0.85_8
HCB2012KF-800T50
PC70
2200P/50V/X7R_4
PL10
0.15UH-PCME064T-R15MS0R667-36A
1 2
3
4
PC148
0.1U/25V/X5R_4
CSN_GT1
SWN_GT1
1 2
PC186
+
PG4
Vincent 12/24 C
B B
4
HG_GT2_L {45}
SW_GT2 {45}
LG_GT2 {45}
A A
5
HG_GT2_L
SW_GT2
LG_GT2
1
2
8
10
4
PQ50
NTMFD4C86NT1G
5
6
7
PC156
PC151
4.7U/25V/H=0.85_8
4.7U/25V/H=0.85_8
*4.7U/25V/H=0.85_8
PR121
2.2_6
PC75
2200P/50V/X7R_4
PC66
0.1U/25V/X5R_4
*4.7U/25V/H=0.85_8
PC64
PC63
HCB2012KF-800T50
PC68
2200P/50V/X7R_4
PL11
0.15UH-PCME064T-R15MS0R667-36A
1 2
3
4
3
PC177
0.1U/25V/X5R_4
CSN_GT2
SWN_GT2
1 2
+
+VIN +VIN_VCCGT_R
Vincent 1/7 C
PC190
330U/2V/5X4.2/ESR=10/VLPB
CSN_GT2 {45}
SWN_GT2 {45}
+VCCGT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCCGT
VCCGT
VCCGT
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
47 61 Friday, March 11, 2016
47 61 Friday, March 11, 2016
47 61 Friday, March 11, 2016
1
5
4
3
2
1
VCCSA
D D
PQ46
TPCC8067-H
+VIN_VCCSA +VIN
PC138
5 2
PC48
PC47
PG1
HCB2012KF-800T50
PC46
2200P/50V/X7R_4
PC120
0.1U/25V/X5R_4
48
VCCSA
TDC:3.7A
EDP:4.5A
HG_SA_L HG_SA
VGTA_BST1
1
SW_SA
7
LG_SA
5
PR210 *0_6S
PR74 *0_6S
C C
Vincent 12/30 C Vincent 1/28 D
PR201
*SHORT_4
PWM_SA {45}
DRON {45}
+5VS5
B B
PWM_SA
DRON
PC118
2.2U/6.3V/X5R_4
*SHORT_4
PR202
PU7
2
PWM
3
EN
4
VCC
PR203
100K/F_4
8
NCP81253
GND6PAD
9
DRVH
DRVL
BST
SW
4
PC34
0.1U/25V/X5R_4
PQ48
TPCC8065-H
4
PL7
0.1U/25V/X5R_4
+VCCSA
PR233
*0_2/S
CSN_SA
SWN_SA
PC171
22U/6.3V/X5R_6
CSN_SA {45}
SWN_SA {45}
PC170
22U/6.3V/X5R_6
PC163
22U/6.3V/X5R_6
PC167
22U/6.3V/X5R_6
PC160
22U/6.3V/X5R_6
PC154
22U/6.3V/X5R_6
4.7U/25V/H=0.85_8
3
1
5 2
PR90
2.2_6
3
1
PC51
2200P/50V/X7R_4
4.7U/25V/H=0.85_8
DCR=4.2m ohm
0.47UH-PCMC063T-R47MN-17.5A
PR231
*0_2/S
+VIN {25,42,43,44,45,46,47,49,50,51,52,56}
+5VS5 {4,34,35,38,39,41,42,44,45,50,51,53,54,56}
+VCCSA {6}
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCCSA - NCP81253
VCCSA - NCP81253
VCCSA - NCP81253
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
1
48 61 Friday, March 11, 2016
48 61 Friday, March 11, 2016
48 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
+3VS5
+VCCOPC Power only for 2+3e CPU
PR263
D D
PG5
+VIN
VRON {36,45}
C C
VRON
Vincent 1/28 D
LPM_ZVM_N {9}
HWPG {4,36,50}
LPM_ZVM_N
HWPG
GT3@HCB2012KF-800T50
PR259 1K_4
+3VS5
PR127
GT3@10K_4
PR126 *0_4
+VCCOPC_VIN
PC157
*GT3@10U/25V/X5R_8
PR123
*100K/F_4
1000P/50V/X7R_4
PC3062
PR260 *SHORT_4
PR250 *SHORT_4
PC166
GT3@10U/25V/X5R_8
PR125
GT3@100K/F_4
Vincent 12/30 C
PC69
PC67
+VCCOPC_EN
+VCCOPC_MODE
GT3@2200P/50V/X7R_4
+VCCOPC_LP#
1
VIN
5
EN
GT3@0.1U/25V/X5R_4
7
MODE
6
LP#
13
PG
Vincent 12/30 C
PR251
GT3@100K/F_4
B B
+3V
VR Rail Mode
VCCIO 0 ohm
*SHORT_4
10
3V3
PU9
GT3@NB681GD-Z
AGND
11
LP#
0
PC172
GT3@1U/10V/X5R_4
+VCCOPC_VBST
9
BST
+VCCOPC_SW
8
SW
12
VOUT
2
PGND
3
C1
4
C0
PR261
*0_6S
Vincent 12/30 C
681_AGND
Vo C0 C1
0V X X
Vincent 1/28 D
+VCCOPC_SRC
681_AGND {5}
PC176 GT3@0.1U/50V/X7R_6 PR129
*0_6S
PR256 GT3@10/F_4
+VCCOPC_SRC {5}
PR248 *SHORT_4
PR254 *SHORT_4
Vincent 12/30 C
PL12
GT3@0.68UH-PCMC063T-R68MN-15.5A
PC184
VCCOPC_VID1 VCCOPC_VID1_C
VCCOPC_VID0 VCCOPC_VID0_C
GT3@0.1U/16V/X7R_4
+3VS5
PR118
GT3@10K_4
PR116
*GT3@10K_4
PC187
GT3@22U/6.3V/X5R_6
PR120
*GT3@10K_4
PR119
GT3@10K_4
PC183
GT3@22U/6.3V/X5R_6
VCCOPC_VID0
VCCOPC_VID1
PR269 *Short_8
PR270 *Short_8
Vincent 1/28 D
PC185
GT3@22U/6.3V/X5R_6
49
+VCCOPC
TDC : 4.5A
PEAK : 6A
Width : 200mil
+VCCOPC
+VCCEOPIO
Floating
PRIMCORE (MSM)
EDRAM/EOPIO 100K
VCCEDRAM
1
1 0.95V
150K Other
A A
+VCCOPC {5}
+VIN {25,42,43,44,45,46,47,48,50,51,52,56}
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,52,53,54}
+3VS5 {4,10,12,15,26,28,30,32,33,35,36,41,42,44,51,53,54,56}
5
4
0 0
0.8V
1 0
1.0V 0 1 1
1 1 1 1.05V
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
PROJECT :
LV6
LV6
LV6
1
49 61 Friday, March 11, 2016
49 61 Friday, March 11, 2016
49 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
VR PAGE: +VDDQ
Fsw=500kHz
+VIN {25,42,43,44,45,46,47,48,49,51,52,56}
+5VS5 {4,34,35,38,39,41,42,44,45,48,51,53,54,56}
HWPG {4,36,49}
D D
SUSON {36,56}
DDR_PG {17}
MAINON {36,53}
SUSON
DDR_PG
MAINON
Vincent 12/30 C
+VDDQ_VTT_OUT
*SHORTPAD
+0.6V_DDR_VTT
DDR_VTTREF
C C
PC214
0.1U/25V/X5R_4
1 2
PC217
10U/6.3V/X5R_6X
PR299
100/F_4
0.033u/50V/X7R_6
+1.2V_SUS_P
+VDDQ_VTT
Imax_VTT = 200mA
HWPG
Vincent 1/28 D
PR290 *SHORT_4
PC211 *0.1U/16V/X7R_4
Vincent 1/28 D
PR296 *SHORT_4
PR297 *0_4
PC212 *0.1U/16V/X7R_4
+VDDQ_VTTREF
PC215
PC218
10U/6.3V/X5R_6X
+5VS5
20
VTT
2
VTTSNS
1
VTTGND
4
VTTREF
19
VLDOIN
PR301
*SHORT_4
PR300
*SHORT_4
Vincent 12/30 C
VDDQ_S5
VDDQ_S3
7
S58S3
PU12
RT8231BGQW
LPMB
VID
3
11
VDDQ_VID
VDDQ_LPMB
PR295
10K/F_4
10
PGOOD
PGND
14
PR303
191K/F_4
VDDQ_TON
VDDQ_CS
9
13
CS
TON
VDDQ
FB
5
6
VDDQ_REFIN
VDDQ_VDDQSNS
R2
PR298
620K/F_4
Vincent 1/28 D
VDDQ_DRVH
17
UGATE
VDDQ_VBST
18
BOOT1
+VDDQ_LX
16
PAD
21
PHASE
LGATE
PR294
7.68K/F_4
R1
VDDQ_DRVL
15
+VDDQ_V5IN
12
VDD
*SHORT_4
PC216
1U/6.3V_4X
PR302
Vincent 12/30 C
VID hi REF=0.675V low REF=0.75V
Vout =0.675(1+R1/R2) =1.1934V
PR304
VDDQ_VBST_R
*0_6S
+5VS5
Vincent 12/30 C
PR293
*SHORT_4
PQ58
TPCC8067-H
PC219
1 2
0.1U/50V/X7R_6
Place these CAPs
close to FETs
5 2
4
3
5 2
4
3
1
1
PQ59
TPCC8065-H
PC222
2200P/50V/X7R_4
PL15
1UH-PCMC063T-1R0MN-11A
PR306
2.2_8
DDR2
PC225
2200P/50V/X7R_4
PC223
0.1U/25V/X5R_4
B2A
1 2
+
PC220
10U/25V/X5R_8
PC243
*330U/2V/5X4.2/ESR=10/VLPB
B2B
+0.6V_DDR_VTT {16,17}
PC245
+1.2V_SUS {3,6,16,17}
PC221
10U/25V/X5R_8
22U/6.3V/X5R_6
+3V {2,4,10,11,12,13,14,15,17,18,25,26,27,29,30,31,34,36,37,38,40,41,42,45,49,52,53,54}
PG9
HCB2012KF-800T50
PC248
0.1U/25V/X5R_4
+VIN +VIN_VDDQ
PC224
0.1U/25V/X5R_4 PJP9
PJP12
*SHORTPAD
1 2
+1.2V_SUS
TDC:3.44A
EDP:5.5A
+1.2V_SUS +1.2V_SUS_P
50
B B
Vincent 12/30 C
+5VS5
PR317
*0_6S
PC246
4.7U/6.3V_6X
HWPG
PR316
10_6
PC244
0.1U/16V/X7R_4
PR309
0_4
+2.5V_PG
+2.5V_PVIN
+2.5V_SVIN
PC236
1U/10V/X5R_4
PU13
RT8068A
+2.5V_LX +2.5V_P
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
NC
LX
LX
NC
FB
EN
1
2
3
7
6
Vincent 12/08 B
+2.5V_EN
5
PC230
0.1U/16V/X7R_4
PL17
2.2UH-PHT25201B-2R2MS-1.85A
1 2
FB_+2.5V
PR313
47.5K/F_4
PC231
100P/50V_4
PR312
15K/F_4
R1
R2
PR308
*0_2/S
PC227
0.1U/16V/X7R_4
PC229
10U/6.3V/X5R_6X
PC228
10U/6.3V/X5R_6X
+2.5V_SUS
PJP11
*SHORTPAD
1 2
+2.5V +/- 5%
TDC:1A
EDP:2A
EC-DV-29
A A
SUSON_DDR25 {36}
5
4
SUSON
SUSON_DDR25
PR311
*0_4
PR310
0_4
3
Vout =0.6(1+R1/R2)
=2.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VDDQ - TPS51716
VDDQ - TPS51716
VDDQ - TPS51716
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
50 61 Friday, March 11, 2016
50 61 Friday, March 11, 2016
50 61 Friday, March 11, 2016
1
1A
5
4
3
2
1
V1P0A (RT8237CZQW)
D D
+5VS5
PR62
*0_6S
Vincent 12/30 C
+3VS5
PR82
PC29
100K/F_2
PR70
*100K/F_2
Vincent 12/30 C
PR81 *0_2/S
PR76 124K/F_2
PR57 470K/F_2
1
3
2
5
12
PGOOD
EN
TRIP
RT8237CZQW
TST
GND
GND13GND14GND15GND
51211V_EN 51211V_VBST
51211V_TRIP
51211V_TST
C C
S5_PWR_PG {36,44}
S5_ON {36,44,53,56}
B B
S5_PWR_PG
S5_ON
PR71 20K/F_2
0.1U/16V_2
OCP=A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=10-(1.555/2)*14mohm
=115.12mV
Rlimit=115.12mV/10uA*8=92.09Kohm
PC27
1U/10V/X5R_4
7
V5IN
DRVH
VBST
DRVL
GND
16
51211V_DRVH
Vincent 1/28 D
9
10
51211V_SW
8
SW
51211V_DRVL
6
11
FB
4
PR84
*0_6S PU3
51211V_FB
PQ45
TPCC8067-H
PC30
0.1U/50V/X7R_6
PQ47
TPCC8065-H
4
4
VFB=0.7V
PC130
5 2
4.7U/25V/H=0.85_8
3
1
5 2
PR225
4.7_6
Vincent 12/07 B
3
1
+VIN_1VS5 +VIN
PC129
PL6
1UH-PCMC063T-1R0MN-11A
100P/50V_4
PC144
150P/50V/NPO_4
PC269
PC39
0.1U/25V/X5R_4
4.7U/25V/H=0.85_8
PR65
4.3K/F_4
PR64
10K/F_4
PG3
HCB2012KF-800T50
PC40
2200P/50V/X7R_4
+1V_SRC
PC165
0.1U/50V/X7R_6
+
PC147
330u/2V_7343
PC135
0.1U/25V/X5R_4
PC153
22U/6.3V/X5R_6
+1V_S5
TDC : 9.1A
PEAK : 10A
PJP3
*SHORTPAD
1 2
PC158
22U/6.3V/X5R_6
Vincent 12/08 B
+1.0V_DEEP_SUS
51
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1V_DS - RT8237CZQW
+1V_DS - RT8237CZQW
+1V_DS - RT8237CZQW
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
51 61 Friday, March 11, 2016
51 61 Friday, March 11, 2016
51 61 Friday, March 11, 2016
1
1A
5
4
+5V
VGA-CORE
3
2
1
52
1 2
26
25
VDD
VDDP
PU5
EV@ISL62771HRTZ-T
ISUMN_GPU
15
PR281
*0_6S
PR157
EV@560/F_4
1Phase
OCP
40
39
ISUMP_NB
PC205
EV@1U/6.3V_4X
ISUMN_NB
34
LGATE_NB
33
PHASE_NB
32
UGATE_NB
31
BOOT_NB
30
BOOT2
29
UGATE2
28
PHASE2
27
LGATE2
24
LGATE1
23
PHASE1
22
UGATE1
21
BOOT1
41
EP
ISEN212ISEN113ISUMP14ISUMN
GFX_ISEN2
GFX_ISEN1
PC100
EV@0.22U/25V/X7R_6
PC209
EV@0.15U/10V/X5R_4
1Phase
RC time
constant
BOOT_2_GPU
UGATE_2_GPU
PHASE_2_GPU
LGATE_2_GPU
LGATE_1_GPU
PHASE_1_GPU
UGATE_1_GPU
BOOT_1_GPU
PC210
EV@0.047U/25V/X7R_4
PR156
EV@10K/F_4
PR155
EV@10K/F_4
+5V
Add 9 GND VIAs
for thermal pad
PC103
EV@0.22U/25V/X7R_6
VSUM-_GPU
VSUM+_GPU
PR287
EV@2.61K/F_4
PR159
PR273
EV@NTC_10K_4
EV@11K/F_4
1 2
PC99
EV@0.1U/16V/X7R_4
VSUM-_GPU
UGATE_2_GPU
BOOT_2_GPU
PHASE_2_GPU
LGATE_2_GPU
EV@2.2_6
PR151
EV@0.22U/25V/X7R_6
UGATE_1_GPU
BOOT_1_GPU
PHASE_1_GPU
LGATE_1_GPU
5
PQ56
EV@TPCA8064-H
4
PQ54
4
PC96
EV@0.22U/25V/X7R_6
213
5
213
VSUM+_GPU
VSUM-_GPU
EV@TPCA8064-H
PQ55
EV@TPCA8A10-H
PQ57
PC95
EV@TPCA8A10-H
PR152
EV@2.2_6
PR150
PC97
PGOOD_NB
PGOOD
SVC
VR_HOT_L
SVD
VDDIO
SVT
ENABLE
PWROK
NTC_NB
NTC
IMON_NB
IMON
PR282
EV@37.4K/F_4
EV@301R/F_4
EV@1.15K/F_4
PR285
PR286
EV@1_6
38
37
36
FB_NB
VSEN_NB
COMP_NB
VSEN16RTN
FB18COMP
17
19
VDDC_SEN
VDDC_RTN
62771_FB_GPU
VDDIO_SVI2
NTC_MVDDQ
NTC_GPU
IMON_MVDDQ
IMON_GPU
1 2
PR173
EV@133K/F_4
62771_COMP_GPU
PC203
EV@390P/50V/X7R_4
PC204
PC207
EV@1000P/50V/X7R_4
EV@1U/6.3V_4X
35
20
3
4
5
6
7
8
9
1
11
2
10
PC102
EV@0.1U/16V/X7R_4
PC206
EV@100P/50V_4
PR284
EV@2K/F_4
Load line setting
D D
PR169
VDDIO_SVI2
1 2
+3V_VGA
*EV@0R_4
+3V
PR153
EV@10K/F_4
OCP_L {19}
+1.8V_VGA
VGA1V35PG {54}
DGPU_PWROK
GPU_SVC_R
GPU_SVD_R
GPU_SVT_R
VGA1V35PG
DGPU_PWROK
Vincent 1/28 D
PR278
EV@470K_4/NTC
EV@9.76K/F_4
Place NTC close to the
GPUCORE Hot-Spot.
VDDC_SEN
VDDC_RTN
PR166 *EV@0R_4
PR280
+VGA_CORE
PR132
M1@10_4
PR133
M1@10_4
DGPU_PWROK {14}
GPU_SVC_R {19}
C C
B B
A A
GPU_SVD_R {19}
GPU_SVT_R {19}
PR160
EV@100K/F_4
Place NTC close to the
MVDDQ Hot-Spot.
VDDC_SEN {21}
VDDC_RTN {21}
Close to the GPU side.
BOM option:
For JET stuff 0 ohm resister.
For Topaz stuff 10 ohm resister.
1 2
PR167 * SHORT_4
PR168 * SHORT_4
PR170 * SHORT_4
PR171 * SHORT_4
PR172 * SHORT_4
PR279
EV@27.4K/F_4
1 2
1 2
PR158 *EV@0R_4
PR154 * SHORT_4
CORE_PWM_PROC HOT# OCP_L
1 2
PR161
PC101
EV@100K/F_4
*EV@0.1U/16V/X7R_4
PR283
*EV@0R_4
EV@680P/50V/X7R_4
PC208
EV@330P/50V/X7R_4
PC98
EV@0.01U/50V/X7R_4
( Near by IC side)
GPUVIN_L
PC91
PC199
PC200
EV@10U/25V/X5R_8
EV@2200P/50V/X7R_6
PHASE_2_GPU
PR146
*EV@2.2R/F_6
PC89
*EV@1000P/50V/X7R_4
EV@10U/25V/X5R_8
PR275
*EV@0R_2/S
PR291
EV@10K/F_4
GFX_ISEN2 GF X_ISEN1
PR292
EV@3.65K/F_6
PR162
EV@1_6
( Near by IC side)
5
4
213
5
4
213
GPUVIN_R
PC202
EV@2200P/50V/X7R_6
PHASE_1_GPU
PR149
*EV@2.2R/F_6
PC90
*EV@1000P/50V/X7R_4
VSUM+_GPU
VSUM-_GPU
PG7
EV@HCB2012KF-800T50
PC92
EV@0.1U/25V/X5R_4
PL13
EV@0.24UH_PCME064T-R2 4MS1R007
PR276
*EV@0R_2/S
PR163
*EV@10K/F_4
PC93
PC201
EV@10U/25V/X5R_8
EV@10U/25V/X5R_8
*EV@0R_2/S
PR289
EV@10K/F_4
GFX_ISEN1 GFX_ISEN2
PR288
EV@3.65K/F_6
PR165
EV@1_6
+VIN
PC83
EV@2200P/50V/X7R_6
PG8
EV@HCB2012KF-800T50
PC94
( Near by IC side)
EV@0.1U/25V/X5R_4
PL14
EV@0.24UH_PCME064T-R2 4MS1R007
PR274
PR277
*EV@0R_2/S
PR164
*EV@10K/F_4
PC85
EV@0.1U/25V/X5R_4
( Near by IC side)
+VGA_CORE
TDC : 35A
PEAK : 53A
OCP : 60A
+VGA_CORE
+
PC195
+
PC191
EV@330u/2V_7343
EV@330u/2V_7343
+VIN
+VGA_CORE
PC196
PC192
+
+
EV@330u/2V_7343
*EV@330u/2V_7343
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Date: Sheet o f
Date: Sheet o f
5
4
3
2
Date: Sheet o f
PROJECT :
GPU_CORE (ISL62771)
GPU_CORE (ISL62771)
GPU_CORE (ISL62771)
1
LV6
LV6
LV6
1A
1A
1A
52 61 Friday, Marc h 11, 2016
52 61 Friday, Marc h 11, 2016
52 61 Friday, Marc h 11, 2016
5
4
3
2
1
+3VS5
D D
C C
B B
Imax=5.26A
+3V +5V
Vincent 12/30 C
MAINON {36,50}
+3V_S2
PR324
*Short_8 PR322
PC256
*10U/6.3V/X5R_6X
+5VS5
MAINON MAINON
PR337
*SHORT_4
Vincent 12/30 C
+1.0V_DEEP_SUS
PC82
1U/6.3V_4X
VRON_G {56}
Vincent 1/28 D
VRON_G
PC263
0.1U/16V/X7R_4
PC260
0.1U/16V/X7R_4
PC265
0.1U/16V/X7R_4
PC266
*0.1U/16V/X7R_4
PQ30
TPCC8067-H
5 2
PR142
*SHORT_4
1
13
VOUT1
14
VOUT1
4
VBIAS
3
ON1
PC252
1000P/50V/X7R_4
4
PC84
*0.1U/16V/X7R_4
VIN12VIN1
PU15
RT9740AGQW
CT1
12
1
3
PR141
*SHORT_4
Vincent 12/30 C
7
VIN26VIN2
OUT2
OUT2
GND
GND
ON2
CT2
10
PC253
1000P/50V/X7R_4
PC86
0.1U/16V/X7R_4
+5VS5
PC262
0.1U/16V/X7R_4
8
9
11
15
5
PC264
*0.1U/16V/X7R_4
<= 65usec full
load ready
PC87
*10U/6.3V/X5R_6X
+5V_S2
PC258
0.1U/16V/X7R_4
Vincent 12/30 C
PR336
*SHORT_4
PJP4
*SHORTPAD
1 2
Imax=1.58A
*0_6S
PC254
*10U/6.3V/X5R_6X
+VCCIO
+VCCIO
TDC : 2A
PEAK : 3.8A
S5_ON {36,44,51,56}
+3VS5
PC193
2.2U/6.3V/X5R_4
SUSOND {56}
PR272
*SHORT_4
S5_ON
*0.1U/16V/X7R_4
Vincent 12/30 C
Vincent 1/28 D
SUSOND
1 2
PC198
PR138
*SHORT_4
PC81
1000P/50V/X7R_4
PU11
1
VIN
2
GND
3
ON/OFF
G9090-180T11U
AO3404
PQ29
0.1U/16V/X7R_4
+1.0V_DEEP_SUS
3
2
1
PC78
VOUT
NC
*0.1U/16V/X7R_4
1.8V_P
5
4
PC197
PC194
1U/6.3V_4X
PC80
0.1U/16V/X7R_4
TDC:0.16A
PR135
*0_6S
PC77
*10U/6.3V/X5R_6X
Vincent 12/30 C
1.8V_S5
TDP:167mA
+1.8V_DEEP_SUS
PR271 *0_6S
Vincent 12/30 C
<= 65usec full
load ready
+VCCSTPLL
53
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1.0V/+3V/+5V SW
+1.0V/+3V/+5V SW
+1.0V/+3V/+5V SW
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
53 61 Friday, March 11, 2016
53 61 Friday, March 11, 2016
53 61 Friday, March 11, 2016
1
1A
5
4
3
2
1
+1.8V_VGA(G9090-180T11U)
54
+1.35V_VGA(RT8068A)
D D
Max: 0.025A
+3V
3
*SHORT_4
DGPU_PWR_ENG {56}
C C
Vincent 1/28 D
2
PR131
+3V_VGA
1
PQ27
EV@AO3404
PC76
*EV@1000P/50V/X7R_4
+3V_VGA
0.95V_PWR_ENG {56}
+1.0V_DEEP_SUS
PC168
EV@1U/6.3V_4X
0.95V_PWR_ENG
Vincent 1/28 D
PQ52
EV@TPCC8067-H
5 2
PR265
*SHORT_4
1
3
4
PR262
*SHORT_4
Vincent 12/30 C
PC175
*EV@1000P/50V/X7R/5%
PC169
EV@0.1U/16V/X7R_4
Max:2A
+0.95V_VGA
PR255
*0_6S
PC164
*EV@10U/6.3V_6X
Vincent 12/30 C
PR339
EV@15K/F_4
PR338
EV@10K/F_4
+3V_VGA
+3VS5
PC189
EV@2.2U/6.3V/X5R_4
PR268 *SHORT_4
Vincent 12/30 C
PC188
EV@0.1U/16V/X7R_4
PU10
1
VIN
2
GND
3
1 2
ON/OFF
EV@G9090-180T11U
C3A
VOUT
NC
*EV@0.1U/16V/X7R_4
+1.35V_VGA +/- 5%
5
4
PC178
1.8V_R
PC179
EV@1U/6.3V_4X
TDC:1A
Vincent 12/30 C
PR258
EV@1K/F_4
PR257
*SHORT_4
VGA1V35PG {52}
+5VS5
Vincent 12/30 C
PR232
*0_6S
PC150
EV@4.7U/6.3V_6X
B B
VGA1V35PG
PR241
EV@10_6
PC161
EV@0.1U/16V/X7R_4
+1.35V_PG
+1.35V_PVIN
+1.35V_SVIN
PC152
EV@1U/10V/X5R_4
4
9
10
8
11
PU8
EV@RT8068A
PG
PVIN
PVIN
SVIN
GND
PL9
EV@2.2UH-PHT25201B-2R2MS-1.85A
+1.35V_LX +1.35V_P
1
NC
2
LX
3
LX
7
NC
6
FB
5
EN
1 2
PC155
EV@22P/50V/NPO_4
+1.35V_EN
FB_+1.35V
R1
PR243
*EV@0_2/S
PR236
EV@15K/F_4
PR234
EV@12K/F_4
PC174
PC159
R2
EDP:2A
PJP8
*EV@SHORTPAD
1 2
PC173
EV@10U/6.3V/X5R_6X
+1.35V_VGA
+1.8V_VGA
MAX:208mA
+1.8V_VGA
PR266
*0_6S
Vincent 12/30 C
+1.8V_VGA
PR249 EV@10K_4
PC162
A A
5
4
EV@0.1U/16V/X7R_4
Vout =0.6(1+R1/R2)
=1.35V
3
EV@10U/6.3V/X5R_6X
EV@0.1U/16V/X7R_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1.8V/+1.35V/+3V_VGA
+1.8V/+1.35V/+3V_VGA
+1.8V/+1.35V/+3V_VGA
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
54 61 Friday, March 11, 2016
54 61 Friday, March 11, 2016
54 61 Friday, March 11, 2016
1
5
4
3
2
1
55
D D
SYS_SHDN# {19,36,37}
2 1
PD21
R@DA2J10100L
PR334
R@100K_6
C C
PR335
R@10K_6
R@PMST3906
PQ64
PD20
*R@DA2J10100L
R@DA2J10100L
PR333
R@560K/F_4
2 1
2 1
PD19
1 2
Vsystem
+15VPCU
PR179
R@470_6_PTC
Vincent 2/1 D
1 2
PR238
R@470_6_PTC
ACIN V1P0A VCCSA
PR195
1 2
R@470_6_PTC
Charger VIN Batt IN
PR188
1 2
R@470_6_PTC
PR205
1 2
R@470_6_PTC
PR218
R@470_6_PTC
1 2
C3A
PQ63
R@PMST3904
B B
A A
5
2
1 3
PC255
R@1U/25V/X5R_6
1 2
1 2
PR305
R@470_6_PTC
+1.2V_SUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
Date: Sheet of
1 2
PR239
R@470_6_PTC
VCCGT VCC
PTC Circuit
PTC Circuit
PTC Circuit
2
1 2
PR230
R@470_6_PTC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
55 61 Friday, March 11, 2016
55 61 Friday, March 11, 2016
55 61 Friday, March 11, 2016
1
1A
1A
1A
5
4
3
2
1
DISCHARGE
+VCCIO +15VPCU
+VIN
D D
C3A
VRON_Q {36}
C C
DGPU_PWR_EN {14,18}
B B
S5_ON {36,44,51,53}
PQ33
LTC044EUBFS8TL
VRON_Q
2
EV@LTC044EUBFS8TL
DGPU_PWR_EN
LTC044EUBFS8TL
S5_ON
PQ35
PQ23
2
PR148
1M_4
VRON_R
5
PR147
3.3M/F_4
1 3
4 3
+VIN +15VPCU
PR112
EV@1M_4
2
1 3
PR115
EV@3.3M/F_4
1 3
+VIN
PR176
1M_4
S5_ON_R
PR175
3.3M/F_4
PR143
22_6
DIS1
2
+1.0V_DEEP_SUS
PR145
1M_4
VRON_G
6
PR144
*1M_4
PQ32
2N7002KDW
1
+1.35V_VGA +3V_VGA
PR117
EV@22_6
DIS4
2
5
4 3
+1.8V_DEEP_SUS
PR264
22_6
DIS12
DIS11
6
2
5
1
4 3
PR122
EV@300_6
DIS5
6
1
PR267
22_6
PC88
*2200P/50V/X7R_4
PQ25
EV@2N7002KDW
PQ53
2N7002KDW
VRON_G {53}
+1.8V_VGA
5
4 3
+3VS5
PR174
300_6
DIS14
5
4 3
PR130
EV@22_6
2
+5VS5
2
6
1
DIS15
6
1
PR113
EV@1M_4
PR177
300_6
EV@10K/F_4
PR346
EV@100K/F_4
DGPU_PWR_ENG
PQ24
EV@2N7002KDW
PQ34
2N7002KDW
+3V_VGA
PR345
PQ68
EV@LTC044EUBFS8TL
2
DGPU_PWR_ENG {54}
PC65
*EV@2200P/50V/X7R_4
+VIN
PR343
EV@1M_4
PR342
EV@3.3M/F_4
1 3
SUSON {36,50}
+0.95V_VGA
5
SUSON
PQ31
LTC044EUBFS8TL
+15VPCU
PR128
PR340
EV@22_6
EV@1M_4
DIS6
4 3
2
2
1 3
6
1
0.95V_PWR_ENG
PQ66
EV@2N7002KDW
+VIN
PR140
1M_4
DIS_+VDDQ
PR139
3.3M/F_4
PC270
EV@2200P/50V/X7R_4
+VCCSTPLL +15VPCU
PR134
22_6
DIS3
6
2
5
1
4 3
0.95V_PWR_ENG {54}
PR137
1M_4
SUSOND
PR136
1M_4
PQ28
2N7002KDW
SUSOND {53}
PC79
*2200P/50V/X7R_4
56
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Discharge
Discharge
Discharge
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
56 61 Friday, March 11, 2016
56 61 Friday, March 11, 2016
56 61 Friday, March 11, 2016
1
1A
5
4
3
2
1
57
DOCK-PWR20-IN
D D
C C
PF1
1 2
DK@0466005.NRHF
EC1
DK@1000P/50V/X7R_4
DOCK-PWR20-IN2
DK@HCB2012KF-800T50
DOCKED2 {39}
EL1
DK@HCB2012KF-800T50
EL2
DK@P4SMAFJ22A
DOCKED2
+3VPCU
PD3
2 1
PD2 DK@DA2J10100L
DOCK_ATTACHED_3VPCU#
2 1
PR3
100K_4
B2B
DOCK_ATTACHED_BT_OP#
DOCK-PWR20_P
B B
PC2
*DK@1000P/50V_4
A A
PR9
DK@150K/F_4
DOCK_ATTACHED
DK@51K/F_4
5
1 2
2
PR10
PR7 150K/F_4
1 2
3
PR8 51K/F_4
PQ6
DK@2N7002K
1
For Dock For System
Vsystem
DOCK-PWR20_P
+VAD
PR17
DK@220K_4
PR13
DK@220K_4
DOCK_ATTACHED_3VPCU# {36}
AD on Dock
AD on Sys
Power Source
PR4
DK@4.7K/F_8
PQ10
4
2 1
DK@MMDT2907A
4
DK@TPCC8131
5
Q2
Q1
PQ2
4
IDEA_GD
3
6 5
PR12
DK@1K_6
Case1
+VAD
1
2
3
PR11
DK@1M_4
PR18
DK@1M_4
System Adaptor
DOCK-PWR20_P
ACDC_ID {36}
Priority: Dock > DC_IN
Case2 Case3 Case4 Case5 Case6 Case7
1
0 Cable Dock
0
0
Batt
0
0
Batt
0
0
1
AD on
Sys
111
1
0
AD on
Dock
0
AD on
Sys
DC-IN
PJP6
ACDC_ID
0
0
1
AD on
Sys
AD-PWR20-IN
1
2
3
4
5
ACDC_ID
1 2
EC7 1000P/50V/X7R_4
EC50
PR23
VPORT0402L331V05
PF3
ADPIN2 Vsystem
0466005.NRHF
*0.1U/25V/X5R_4
+3VPCU +VAD
*0_4
PD7
PR20
750_6
PQ12A
SSM6N15FU
3 4
12
C3A
EL4
HCB2012KF-800T50
EL3
HCB2012KF-800T50
PD16
SMAJ22A
ADAPTER_ID_P
6 1
PQ12B
SSM6N15FU
SVAD
ADAPTER_ID
2
2 1
PR58
220K_4
PR51
220K_4
EC51
EC52
EC53
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
*0.1U/25V/X5R_4
PR30
1M_4
5
PR27
1M_4
Case8 Case9 Case10
1
1
0
AD on
Dock
1
0
1
AD on
Sys
1
1
1
AD on
Dock
1
1
1
AD on
Dock
3
PR42
PC24
4.7K/F_8
PQ22
4
Q2
2 1
Q1
MMDT2907A
ADAPTER_ID {36}
ACDC_ID_DOCK {36 ,39}
2
PQ20
TPCC8131
1
5
2
3
4
*0.1U/25V/X5R_4
PR61
IDEA_GD_R
1M_4
3
6 5
PR56
1K_6
PR1
*DK@0_4
ACDC_ID_DOCK
DK@VPORT0402L331V05
DK@750_6
PD1
PR2
PR52
1M_4
+3VPCU
3
1
12
Vsystem
PQ1
DK@2N7002K
ADAPTER_ID_P
2
PQ19
TPCA8109
1
5 2
3
PR53
100K_4
PR60
100K/F_4
4
PC23
PC25
*0.1U/25V/X5R_4
1 2
3
PR44
2
PQ21
2N7002K
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.1U/25V/X5R_4
0_4
DOCK_ATTACHED_BT_OP#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Source In Gate
Power Source In Gate
Power Source In Gate
1
+VAD Vsystem SVAD
PC22
DK@0.22U/25V/X7R_4
LV6
LV6
LV6
1A
1A
1A
57 61 Friday, March 11, 2016
57 61 Friday, March 11, 2016
57 61 Friday, March 11, 2016
5
4
3
2
1
G3 to S0 S0 S0 to S3 S4/S5
+3V_RTC
SRTC_RST#
RTC_RST#
D D
EC-GPO
S5_ON
T1
9 ms
+3VS5
+5VS5
+3V_DEEP_SUS(as +3VS5)
+1.8V_DEEP_SUS
+1.0V_DEEP_SUS
EC-GPI
S5_PWR_PG
>10mS
58
EC-GPO
C C
EC-GPO
RSMRST#
DSWROK_EC(Ignored in non-DS)
Tied together
tPCH03
>10ms
EC_SUSACK#(Ignored in non-DS) EC-GPO
EC-GPI
NBSWON#
SUSC# EC-GPI
EC-GPO
SUSON
+1.35VSUS
+VCCSTPLL
B B
EC-GPO
SUSB# EC-GPI
MAINON
+3V +5V +0.65V_DDR_VTT
tPCH28 >30 us
+1.0V(VCCIO)
EC-GPI
EC-GPO
HWPG
VRON
+VCORE
+VCCGT
A A
EC-GPI
EC-GPO
IMVP_PWRGD
EC_PWROK
PLTRST#
5
tPCH33
99 ms
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Power sequence2
Power sequence2
Power sequence2
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LV6
LV6
LV6
58 61 Friday, March 11, 2016
58 61 Friday, March 11, 2016
1
58 61 Friday, March 11, 2016
1A
1A
1A
5
4
3
2
1
59
PART
EC
EC
EC EC
NO.
NO.
D D
2015
NO. NO.
B2A
PG. DESCRIPTION
PG. PG.
2
DATE
DATE PG.
DATE DATE
12/7
R780
PART
PART PART
REFERENCE
REFERENCE
REFERENCE REFERENCE
DESCRIPTION
DESCRIPTION DESCRIPTION
Reserve PU 10K for
4
12/7
R763
4 12/7 R764
5 12/7 C819
14 12/7 R768, R767
26
C C
30
31
31
12/7
12/7
12/7
12/7
R769、 、、、R770、、、、R771、、、、R772、、、、R773、、、、R774
、
、R775 、、、、R776
、、
CN14
CN19
CN12
Add PU Res 10K for LAN_WAKE#.
Add PU Res 10K for VRALERT#.
Add Cap 1U for VCCSTG_G20.
Add Board ID for SKYLAKE/ KABYLAKE.
Add ohm for HDMI test
Modify LAN connect pin define for LED
Remove GND of stand pin for HDD connect
Modify ODD connect to match FFC pin define
SDV-STAGE
B2B
(R310)
30 CN14
4, 36 12/18
B B
12/18
D10、 、、、R779、、、、R780
C755、 、、、C763、、、、C359、、、、C360 13, 30 12/25
12/25 29
R21、 、、、R16、、、、R3、、、、R8
Modify LAN connect pin define for LED
Reserve DNBSWON# PU to +3VS5 and short 0 ohm
RTC CAP tuning
FOR EMI
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EC list 1
EC list 1
EC list 1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
59 61 Friday, March 11, 2016
59 61 Friday, March 11, 2016
59 61 Friday, March 11, 2016
1
2015
5
EC
EC
EC EC
NO.
NO.
NO. NO.
4
PART
PART
DATE
PG. DESCRIPTION
PG. PG.
DATE PG.
DATE DATE
1/8 C3A
R780 4
PART PART
REFERENCE
REFERENCE
REFERENCE REFERENCE
3
DESCRIPTION
DESCRIPTION DESCRIPTION
Reserve PU 10K for DNBSWON#
2
1
60
D D
4 U54、 、、、R781 1/8
12、 、、、13
、
、39
、、
1/8
C2、 、、、C3、、、、C5、、、、C6、、、、C7、、、、C8、、、、C9、、、、C10、、、、C12
、
、C13 、、、、C14 、、、、C16 、、、、C17 、、、、C18 、、、、C23 、、、、C549
、、
、
、C552 、、、、C553 、、、、C561 、、、、Q1 、、、、Q2 、、、、Q4 、、、、R1 、
、、
、
、、
Reserve PCH_SLP_S0# for power sequence
Remove DOCK LAN
R2 、、、、 R4 、、、、 R5 、、、、 R17 、、、、 R18 、、、、 R19 、、、、 R20 、、、、 R445
、
、R457 、、、、R462 、、、、TP29 、、、、U26 、、、、Y3 、、、、C700 、、、、C701
、、
25 、、、、 32 、
、
、、
1/8 F2 、、、、 F4 、、、、 F7 、、、、 F8
Change fuse to short pad
33、 、、、38
30 1/8 CN14
C C
34 1/8
C821、 、、、C822、、、、C823、、、、C824、、、、R783、、、、R784
、
、R785 、、、、R786 、、、、C825 、、、、C826 、、、、C827 、、、、C828
、、
、
、R787 、、、、R788 、、、、R789 、、、、R790
、、
36 1/8 R779
38 1/8 R323、 、、、R329
39 1/8 CN3
14 1/8
SIV-STAGE
41 1/8 C829、 、、、C830、、、、C831、、、、C832、、、、C833
43 1/8 EC3、 、、、EC4、、、、EC5、、、、EC6
B B
Modify LED control signal
Reserve EMI request
Reserve 0 ohm to jump diode for DNBSWON#
Mount keyboard RES
Change connect from 40 pin to 30 pin that remove DOCK LAN
No memory down config
Add CAP for EMI request
Add CAP for EMI request
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EC list 2
EC list 2
EC list 2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
60 61 Friday, March 11, 2016
60 61 Friday, March 11, 2016
60 61 Friday, March 11, 2016
1
5
EC
EC
EC EC
NO.
NO.
NO. NO.
PG. DESCRIPTION
PG. PG.
DATE
DATE PG.
DATE DATE
2015
D D
C C
4
PART
PART
PART PART
REFERENCE
REFERENCE
REFERENCE REFERENCE
3
DESCRIPTION
DESCRIPTION DESCRIPTION
2
1
61
SIT-STAGE
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EC list 3
EC list 3
EC list 3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LV6
LV6
LV6
1A
1A
1A
61 61 Friday, March 11, 2016
61 61 Friday, March 11, 2016
61 61 Friday, March 11, 2016
1