Page 1
5
www.schematic-x.blogspot.com
4
3
2
1
DIS (15")
D D
DDR4 2133MHz SODIMM1
8GB Max.
DDR4 2133MHz SODIMM2
8GB Max. DDR CHB
C C
B B
Intel SKL/KBL ULT Platform Block Diagram
PAGE 17
PAGE 18
M.2 2280-S3 SSD
PAGE 32
SATA HDD
2.5" 7.2/9.5mm
PAGE 29
System BIOS
SPI ROM
PAGE 10
DDR4 2133MHz
DDR4 2133MHz
6GB/s
PCIEx2 / SATAx1
6GB/s
DDR CHA
SATA
PCIE
SATA
SPI
LPC
SKL/KBL U
Processor
Processor : Daul Core
Power : 15 (Watt)
Package : BGA1356
Size : 40 X 24 (mm)
HDA
PAGE 2~16
PCIE
Azalia
USB3.0
USB2.0
PCIE Gen 1 x 1 Lane
PCIE
eDP
DDI
PCI-E
X4 Lane
eDP x2
USB2.0 CONN
Port 6
LCD Connector
DB PAGE 27
LG9
N16S-GTR-S
N16V-GTR1
25W, 23x23mm
PAGE 19~22
PAGE 25
USB3.0
CONN
Port 1 Port 1 Port 2 Port 2 Port 3 & 4 Port 4
PAGE 26
USB3.0
CONN
PAGE 26
Camera
Port 3
VRAM GDDR3 x 4pcs
256Mx16 900MHz
TOP
USB3.0 Type C
PAGE 25
HDMI
PCB 6L STACK UP
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : BOT
PAGE 23
PAGE 26
PAGE 28
01
Keyboard
Touch Pad
FAN
PAGE 29
PAGE 29
Embedded Controller
iTE 8987
Power :
Package : LQPF128
Size : 14 x 14 (mm)
PAGE 34
Audio Codec
ALC255-CG
Package : MQFN48
Size : 6 x 6 (mm)
PAGE 27
Card Reader
RTS5227S-GRT
Power :
Package :
Size :
PAGE 30
LAN Controller
RTL8111H-CG(Giga)
Power :
Package :
PAGE 33
NGFF Card
WLAN / BT Combo
Port 7
PAGE 34
PAGE 29
Speaker
A A
Combo Jack
5
4
3
PAGE 29
PAGE 27
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1
1 49Wednesday, July 20, 2016
1 49Wednesday, July 20, 2016
1 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 2
5
[4,10..13,15..21,25..27,29,30,32,33,35,41,45,46]
+3V
[4,6,16,34,35,40]
+1.0V
[4..6,9,13,40,41]
+VCCSTPLL
D D
C C
HDMI 1.4
0317 CQ
Del R868 & R869 2.2K PU +3V (
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 ohms
SDVO_CLK[26]
SDVO_DATA[26]
+1.0V
IN_D2#[26]
IN_D2[26]
IN_D1#[26]
IN_D1[26]
IN_D0#[26]
IN_D0[26]
IN_CLK#[26]
IN_CLK[26]
4
R3 24.9/F_4
3
?
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
)
EDP_RCOMP
U1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
*SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
Need apply PN
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
INT_EDP_TXN0
C47
INT_EDP_TXP0
C46
INT_EDP_TXN1
D46
INT_EDP_TXP1
C45
A45
B45
A47
need surport to FHD 2 Lane
B47
INT_EDP_AUXN
E45
INT_EDP_AUXP
F45
EDP_DISP_UTIL
B52
G50
F50
0224 CQ
E48
Del INT_HDMI_AUXN & INT_HDMI_AUXN
F48
HDMI 1.4
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
?1 OF 20
HDMI_HPD_CON
ULT_EDP_HPD
PCH_EDP_BLON
PCH_DPST_PWM
PCH_DISP_ON
2
INT_EDP_TXN0 [25]
INT_EDP_TXP0 [25]
INT_EDP_TXN1 [25]
INT_EDP_TXP1 [25]
INT_EDP_AUXN [25]
INT_EDP_AUXP
TP1
HDMI_HPD_CON
PCH_EDP_BLON [25]
PCH_DPST_PWM [25]
PCH_DISP_ON [25]
[25]
0309 CQ
HDMI_HPD_CON PU 10K +3V (R1) & PD 100K (R2)
ULT_EDP_HPD (
+3V
[26]
R1
*10K_4
R2
100K_4
ULT_EDP_HPD [25]
Reserve EDP_HPD opposites circuit!
1
02
)
Close to EC
+VCCSTPLL
Processor pull-up (CPU)
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
B B
R51K_4
PM_THRMTRIP#
EC_PECI[35]
H_PROCHOT#[35,41]
PM_THRMTRIP#[35]
XDP_BPM0[16]
XDP_BPM1[16]
+VCCSTPLL
R6 *49.9/F_4
R4 499/F_4
R8 49.9/F_4
R11 49.9/F_4
R12 49.9/F_4
R14 49.9/F_4
TP8504
TP8505
TP200
TP4
TP5
TP6
CATERR#
EC_PECI
PROCHOT#
PM_THRMTRIP#
3D_FW_GPIO_R
CPU_GP1
CPU_GP2
CPU_GP3
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
AT16
AU16
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
H66
H65
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
Rcomp < 600mil
A A
5
4
U1D
*SKL_ULT
REV = 1
SKL_ULT
CPU MISC
3
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
BOM
XDP_TCK0
B61
XDP_TDI_CPU
D60
XDP_TDO_CPU
A61
XDP_TMS_CPU
C60
XDP_TRST#_CPU
B59
JTAG_TCK_PCH
B56
JTAG_TDI_PCH
D59
JTAG_TDO_PCH
A56
JTAG_TMS_PCH
C59
XDP_TRST#_CPU
C61
JTAGX_PCH
A59
XDP_TCK0
XDP_TDI_CPU
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
XDP_TRST#_CPU
JTAGX_PCH
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
2
[16]
[16]
[16]
[16]
[2,16]
[16]
[16]
[16]
[16]
[2,16]
[16]
PLACE NEAR CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TDO_CPU
R10*51_4
R1351_4
R1551_4
R1651_4
R1851_4
Close to Chipset
+1.0V
R17 *51_4
R19 *51_4
R20 *51_4
H_PROCHOT#
XDP_TCK0
XDP_TRST#_CPU
R21 1K_4
R22 51_4
R23 51_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+1.0V
+1.0V
SKL-01 [eDP/DDI/MISC]
SKL-01 [eDP/DDI/MISC]
SKL-01 [eDP/DDI/MISC]
1
1A
1A
2 49Wednesday, July 20, 2016
2 49Wednesday, July 20, 2016
2 49Wednesday, July 20, 2016
1A
of
of
of
Page 3
5
[17]
M_A_DQSN[7:0]
[17]
M_A_DQSP[7:0]
[18]
M_B_DQSN[7:0]
[18]
M_B_DQSP[7:0]
[17]
M_A_DQ[63:0]
[18]
M_B_DQ[63:0]
[6,17,18,38,40,48]
D D
C C
B B
+1.2VSUS
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U1B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
*SKL_ULT
REV = 1
Need apply PN
?
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
NIL-DDR CH A
2 OF 20
4
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
3
2
SkyLake ULT Processor (DDR4)
Non-Interleave / side by side
?
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
M_A_A5
BA51
M_A_A9
BB54
M_A_A6
BA52
M_A_A8
AY52
M_A_A7
AW52
M_A_BG#0
AY55
M_A_A12
AW54
M_A_A11
BA54
BA55
AY54
M_A_A13
AU46
AU48
AT46
AU50
AU52
M_A_A2
AY51
AT48
M_A_A10
AT50
M_A_A1
BB50
M_A_A0
AY50
M_A_A3
BA50
M_A_A4
BB52
M_A_DQSN0
AM70
M_A_DQSP0
AM69
M_A_DQSN1
AT69
M_A_DQSP1
AT70
M_A_DQSN2
AH66
M_A_DQSP2
AH65
M_A_DQSN3
AG69
M_A_DQSP3
AG70
M_A_DQSN4
BA64
M_A_DQSP4
AY64
M_A_DQSN5
AY60
M_A_DQSP5
BA60
M_A_DQSN6
AR66
M_A_DQSP6
AR65
M_A_DQSN7
AR61
M_A_DQSP7
AR60
M_A_ALERT#
AW50
M_A_PARITY M_B_ALERT#
AT52
SM_VREF
AY67
SMDDR_VREF_DQ0_M3
AY68
SMDDR_VREF_DQ1_M3
BA67
DDR_VTT_CNTL
AW67
M_A_CLKN0 [17]
M_A_CLKP0 [17]
M_A_CLKN1 [17]
M_A_CLKP1 [17]
M_A_CKE0 [17]
M_A_CKE1 [17]
M_A_CS#0
M_A_CS#1
M_A_DIM0_ODT0
M_A_DIM0_ODT1
M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7
M_A_BG#0
M_A_A12
M_A_A11
M_A_ACT#
M_A_BG#1
M_A_A13
M_A_CAS#
M_A_WE#
M_A_RAS#
M_A_BS#0
M_A_A2
M_A_BS#1
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
M_A_ALERT#
M_A_PARITY
SM_VREF [17]
TP7
SMDDR_VREF_DQ1_M3 [18]
DDR_VTT_CNTL [4,18]
[17]
[17]
20mils width
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U1C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
*SKL_ULT
REV = 1
SKL_ULT
Need apply PN
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
NIL-DDR CH B
3 OF 20
BOM
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_PAR
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_A12
M_B_A11
M_B_A13
M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
M_B_DQSN0
M_B_DQSP0
M_B_DQSN1
M_B_DQSP1
M_B_DQSN2
M_B_DQSP2
M_B_DQSN3
M_B_DQSP3
M_B_DQSN4
M_B_DQSP4
M_B_DQSN5
M_B_DQSP5
M_B_DQSN6
M_B_DQSP6
M_B_DQSN7
M_B_DQSP7
M_B_PARITY
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
M_B_CLKN0
M_B_CLKN1
M_B_CLKP0
M_B_CLKP1
M_B_CKE0
M_B_CKE1
M_B_CS#0
M_B_CS#1
M_B_DIM0_ODT0
M_B_DIM0_ODT1
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_BG#0
M_B_A12
M_B_A11
M_B_ACT#
M_B_BG#1
M_B_A13
M_B_CAS#
M_B_WE#
M_B_RAS#
M_B_BS#0
M_B_A2
M_B_BS#1
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
M_B_ALERT#
M_B_PARITY
R25 121/F_4
R26 80.6/F_4
R27 100/F_4
DG 543016 page162
1
03
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
[18]
+1.2VSUS
R24
470/F_4
[18]
[18]
DDR4_DRAMRST# [17,18]
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SKL-02 [DDR4]
SKL-02 [DDR4]
SKL-02 [DDR4]
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
3 49Wednesday, July 20, 2016
3 49Wednesday, July 20, 2016
3 49Wednesday, July 20, 2016
1A
1A
1A
of
of
of
Page 4
5
+3V_DEEP_SUS[10..12,14..16,18]
SYS_PWROK[16]
SUSWARN#_EC[35]
DDR_VTT_CNTL[3,18]
+VCCSTPLL[2,5,6,9,13,40,41]
+3V_RTC_2
PLTRST#[16,19,30..33,35]
SYS_RESET#
EC_PWROK[16,35]
PCIE_WAKE#[30,31,33,35]
+3V
+3VS5[10,15,16,27,31,32,35,37..40,44,45,48]
+1.0V
DSWROK_EC_R
R29 *10K_4
C1 *0.1U/16V_4
R33 *0_4/S
R17755 *0_4
0701 CQ
Add R17755 0ohm (
[2,10..13,15..21,25..27,29,30,32,33,35,41,45,46]
[2,6,16,34,35,40]
[13,15,34]
D D
C C
B B
RSMRST#[35]
SUSWARN#
SUSACK#_EC[35]
PLTRST#(CLG)
Rise/Fall time less than 100ns
R34 *0_4/S
0713 CQ
Change F/P S0402
For DS3 -->Ra
Non-DS3 -->Rb
DSWROK_EC[35]
RSMRST#
R32*0_4
PLTRST#
R52
100K/F_4
EC1
*220P/50V_4
Rb
R42 0_4
R46 *0_4
Ra
0712 CQ
R42 for sequence
[16]
System PWR_OK(CLG)
R53 *0_4/S
EC_PWROKSYS_PWROK
R54
10K/F_4
4
PLTRST#
SYS_RESET#
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
EC_PWROK
DSWROK_EC_R
SUSWARN#
SUSACK#
PCIE_WAKE#
LAN_WAKE#
DDR_VTT_CNTL_R
)
U1K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSW ARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
*SKL_ULT
REV = 1
?
SKL_ULT
+1.0V +3VS5+5VS5
R43
15K_4
+1.0V_PWRGD_G1
C2
0.1U/16V_4
11 OF 20
R51
100K_4
HWPG[16,35,37..39]
2
Need apply PN
1 3
3
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW #
GPP_A11/PME#
GPP_B2/VRALERT#
R44
100K_4
+1.0V_PWRGD_G2
0317 CQ
Add Net name
Q2
METR3904-G
INTRUDER#
GPP_B11/EXT_PW R_GATE#
2
1
04
PCH_SLP_S0_N
AT11
AP15
BA16
AY16
SLP_SUS#_EC
AN15
AW15
BB17
GPD9
AN16
BA15
DNBSWON#
AC_PRESENT_EC
AY15
RF_OFF_PCH
AU13
AU11
INTRUDER#_R
AP16
AM10
GPP_B2
AM11
?
R45
10K_4
3
Q1
2
2N7002K
1
R49
100K_4
R305 1M_4
TP8
TP9
D1 MEK500V-40
PCH_SLP_S0_N [16,35]
[16,35]
SUSB#
[16,35]
SUSC#
[16]
SLP_S5#
SLP_SUS#_EC
[16]
SLP_A#
DNBSWON# [35]
AC_PRESENT_EC
RF_OFF_PCH
+3V_RTC_2
21
H_VCCST_PWRGD_R
[35]
[35]
[31]
PCH Pull-high/low(CLG)
SUSWARN#
SUSACK#
RF_OFF_PCH
PCIE_WAKE#
AC_PRESENT_EC
LAN_WAKE#
SYS_RESET#
RSMRST#
DSWROK_EC
+1.0V
+VCCSTPLL
R47
R48
1K_4
*1K_4
C3
*10P/50V_4
H_VCCST_PWRGD trace 0.3" - 1.5"
R28 *10K_4
R30 10K_4
R31 10K_4
R35 1K_4
R37 *10K_4
R38 *10K_4
R39 10K_4
R40 10K_4
R41 100K/F_4
R50 60.4/F_4
+3V_DEEP_SUS
+3VS5
+3V
H_VCCST_PWRGD
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
SKL-03 [PowerManger]
SKL-03 [PowerManger]
SKL-03 [PowerManger]
1
4 49Wednesday, July 20, 2016
4 49Wednesday, July 20, 2016
4 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 5
5
[43]
[2,4,6,16,34,35,40]
[6]
[2,4,6,9,13,40,41]
Under CPU
C9
C4
D D
C C
10U/6.3V_6
C19
10U/6.3V_4
C34
22U/6.3V_6
+VCC_EDRAM
+VCC_EDRAM
22U/6.3V_6
C20
10U/6.3V_4
C35
22U/6.3V_6
C292
*1U/6.3V_4
22U/6.3V_6
C21
10U/6.3V_4
C36
22U/6.3V_6
C291
*1U/6.3V_4
+VCC_EOPIO
+VCC_CORE
+1.0V
+VCCSTG
+VCCSTPLL
0508 CQ
Change C14 FP to R0805
C14
C5
47U/6.3VS_8
22U/6.3V_6
C22
C23
10U/6.3V_4
10U/6.3V_4
C38
C37
22U/6.3V_6
22U/6.3V_6
+1.8V_DEEP_SUS
C290
*1U/6.3V_4
C293
*1U/6.3V_4
C298
*10U/6.3V_4
C299
*10U/6.3V_4
R275 *0_4
0328 CQ
Add VID[0:1]_VCC_EDRAM to Power page
C16
22U/6.3V_6
C24
10U/6.3V_4
C39
22U/6.3V_6
VID0_VCC_EDRAM[44]
VID1_VCC_EDRAM[44]
[9,15,39]
[44]
[44]
C17
22U/6.3V_6
C25
10U/6.3V_4
VCCOPC_1.8
Close CPU
C295
C294
*1U/6.3V_4
*10U/6.3V_4
GT3e => Stuff
GT2 => Un-Stuff
C296
*1U/6.3V_4
C297
*1U/6.3V_4
+VCC_CORE
+VCC_CORE
C40
47U/6.3VS_8
+1.8V_DEEP_SUS
+VCC_EOPIO
+VCC_EDRAM
C18
22U/6.3V_6
C41
47U/6.3VS_8
4
?
SKL_ULT
A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
C42
47U/6.3VS_8
U1L
VCC_A30
VCC_A34
32A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
*SKL_ULT
REV = 1
C43
47U/6.3VS_8
+VCC_CORE +VCC_CORE
CPU POWER 1 OF 4
3.2A
50mA
2A
12 OF 20
C44
47U/6.3VS_8
Need apply PN
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
BOM
C46
C45
47U/6.3VS_8
47U/6.3VS_8
?
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
47U/6.3VS_8
3
C6
1U/6.3V_4
C26
1U/6.3V_4
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
C47
C7
1U/6.3V_4
C27
1U/6.3V_4
R55 100/F_4
R56 100/F_4
+VCCSTG
2
Under CPU
C8
1U/6.3V_4C10
C28
1U/6.3V_4
C11
1U/6.3V_4
C29
1U/6.3V_4
+VCC_CORE
VCC_SENSE [41]
VSS_SENSE [41]
C12
1U/6.3V_4
C30
1U/6.3V_4
C13
1U/6.3V_4
C31
1U/6.3V_4
Close CPU
C15
1U/6.3V_4
C32
1U/6.3V_4
100- ±1%
pull-up to VCC
near processor.
C33
1U/6.3V_4
Layout note: need routing together and ALERT need between CLK and DATA.
+VCCSTPLL
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
R58 220/F_4
R57
56.2/F_4
C48
*0.1U/16V_4
SVID ALERT
1
05
VR_SVID_ALERT# [41]
R61
100/F_4
+VCCSTPLL
R59
*54.9/F_4
SVID CLK
VR_SVID_CLK [41]
0713 CQ
Change F/P S0402
R62 *0_4/S
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
SVID DATA
VR_SVID_DATA [41]
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL-04 [POWER-1]
SKL-04 [POWER-1]
SKL-04 [POWER-1]
1
1A
1A
5 49Wednesday, July 20, 2016
5 49Wednesday, July 20, 2016
5 49Wednesday, July 20, 2016
1A
of
of
C54
C55
C52
10U/6.3V_4
C53
10U/6.3V_4
10U/6.3V_4
C49
B B
A A
5
10U/6.3V_4
C50
10U/6.3V_4
C51
10U/6.3V_4
4
10U/6.3V_4
C56
10U/6.3V_4
3
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
CLOSE TO CPU
PLACE THE PU RESISTORS
VR_SVID_CLK_R
H_CPU_SVIDDAT
2
R60 *0_4/S
+VCCSTPLL
Page 6
5
C61
10U/6.3V_6
C75
10U/6.3V_6
[2,4,5,9,13,40,41]
[41,43]
[3,17,18,38,40,48]
[9,15,16,39,40]
[2,4,16,34,35,40]
[13,29,31,34..37,44]
[40]
C62
1U/6.3V_4
C76
10U/6.3V_6
+VCCSTG
+VCCPLL_OC+1.2VSUS
+VCCPLL+VCCSTPLL
+1.2VSUS
C58
C57
1U/6.3V_4
1U/6.3V_4
*10U/6.3V_6
C91
1U/6.3V_4
C92
1U/6.3V_4
Close CPU Under CPU
+3VPCU
R71
20K/F_4
For 75 degree, 1.2v limit, (HW)
THER_CPU
R74
100K_4 NTC
C101
0.1U/16V_4
1 2
C59
+VCCSTPLL
+VCCSA
+1.2VSUS
+1.0V_DEEP_SUS
+1.0V
+3VPCU
+1.2V_VCCPLL_OC
Under CPU
D D
10U/6.3V_6
C60
10U/6.3V_6
C74
C73
10U/6.3V_6
Close CPU
+VCCSTPLL
+1.0V
+VCCIO
C C
+1.2V_VCCPLL_OC
R63 *0_4/S
R64 *0_4
R65 *0_4
0713 CQ
Change F/P S0402
R68 *0_4
R69 *0_4/S
R70 *0_4/S
Under CPU
+VCCSTG +VCCPLL_OC
C99
1U/6.3V_4
C100
1U/6.3V_4
Close A18 Ball
+VCCSTPLL
B B
C104
*1U/6.3V_4
C105
*22U/6.3V_6
4
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
THRM_MOINTOR2 [35]
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
SKL_ULT
U1N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
*SKL_ULT
REV = 1
Need apply PN
?
2.8A
60mA
20mA
120mA
130mA
14 OF 20
VCCIO
3.1A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
5.1A
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
3
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C63
1U/6.3V_4
+VCCSA
C77
1U/6.3V_4
C64
1U/6.3V_4
C78
1U/6.3V_4
C93
10U/6.3V_4
IO Thrm Protect
For PIPE USEFor CPU USE
+3VPCU
R73
20K/F_4
For 75 degree, 1.2v limit, (HW)
THER_PIPE
R76
100K_4 NTC
C103
0.1U/16V_4
1 2
2
Under CPU Close CPU
C68
C65
1U/6.3V_4
C66
10U/6.3V_4
C67
10U/6.3V_4
10U/6.3V_4
C69
1U/6.3V_4
Under CPU
C79
1U/6.3V_4
C80
1U/6.3V_4
C81
1U/6.3V_4
C82
1U/6.3V_4
C83
1U/6.3V_4
C84
10U/6.3V_4
Close CPU
C95
10U/6.3V_4
C96
10U/6.3V_4
C97
10U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C98
10U/6.3V_4
C94
10U/6.3V_4
VSSSA_SENSE [41]
VCCSA_SENSE [41]
THRM_MOINTOR1 [35]
C70
1U/6.3V_4
C85
10U/6.3V_4
R66 100/F_4
R67 100/F_4
C71
1U/6.3V_4
+VCCIO
C86
10U/6.3V_4
C72
1U/6.3V_4
+VCCIO
C87
10U/6.3V_4
C88
10U/6.3V_4
1
C89
10U/6.3V_4
C90
10U/6.3V_4
06
Close CPU
C107
1U/6.3V_4
C109
10U/6.3V_6
+VCCPLL
5
C110
10U/6.3V_6
C111
10U/6.3V_6
C112
10U/6.3V_6
C113
10U/6.3V_6
C114
1U/6.3V_4
C115
1U/6.3V_4
4
C116
1U/6.3V_4
C117
1U/6.3V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet of
SKL-05 [POWER-2]
SKL-05 [POWER-2]
SKL-05 [POWER-2]
1
6 49Wednesday, July 20, 2016
6 49Wednesday, July 20, 2016
6 49Wednesday, July 20, 2016
1A
1A
1A
of
of
+VCCSTPLL
C106
1U/6.3V_4
+1.2VSUS
A A
C108
10U/6.3V_6
Close to CPU
Page 7
5
[41,42]
+VCCGT
[5,43]
+VCC_CORE
[3,6,17,18,38,40,48]
+1.2VSUS
Under CPU
D D
C146
1U/6.3V_4
C152
C C
B B
1U/6.3V_4
C119
10U/6.3V_4
C130
10U/6.3V_4
C147
1U/6.3V_4
C153
1U/6.3V_4
C120
10U/6.3V_4
C131
10U/6.3V_4
C148
1U/6.3V_4
C154
1U/6.3V_4
C121
10U/6.3V_4
C137
10U/6.3V_4
C149
1U/6.3V_4
C155
1U/6.3V_4
4
?
SKL_ULT
57A
BOM
13 OF 20
7A
Need apply PN
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
U1M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
*SKL_ULT
REV = 1
+VCCGT
C118
10U/6.3V_4
C138
10U/6.3V_4
C150
1U/6.3V_4
C156
1U/6.3V_4
VCCGT_SENSE[41]
VSSGT_SENSE[41]
C128
10U/6.3V_4
C139
10U/6.3V_4
C151
1U/6.3V_4
C157
1U/6.3V_4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
3
+VCCGT
Close CPU
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
C122
47U/6.3VS_8
C129
22U/6.3V_6
C142
22U/6.3V_6
+VCCGTX
C300
*22U/6.3V_6
GT3e => Stuff
GT2 => Un-Stuff
C123
47U/6.3VS_8
C132
22U/6.3V_6
C143
22U/6.3V_6
C301
*22U/6.3V_6
R276 *0_8
R277 *0_8
C124
47U/6.3VS_8
C133
22U/6.3V_6
C144
22U/6.3V_6
C302
*22U/6.3V_6
+VCCGT+VCCGTX
C125
47U/6.3VS_8
C134
22U/6.3V_6
C145
22U/6.3V_6
C303
*22U/6.3V_6
2
C126
47U/6.3VS_8
C135
22U/6.3V_6
C304
*22U/6.3V_6
C127
47U/6.3VS_8
C136
22U/6.3V_6
C140
22U/6.3V_6
C141
22U/6.3V_6
1
07
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
SKL-06 [POWER-3]
SKL-06 [POWER-3]
SKL-06 [POWER-3]
1
7 49Wednesday, July 20, 2016
7 49Wednesday, July 20, 2016
7 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 8
5
4
3
2
1
08
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
A67
A70
AA2
AA4
AB8
AD8
AF1
AF2
AF4
AH6
AJ4
AK8
AL2
AL4
U1P
A5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 1 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
?
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
BA45
U1Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 2 OF 3
?
17 OF 20
Need apply PNNeed apply PN
BA49
VSS
BA53
VSS
BA57
VSS
BA6
VSS
BA62
VSS
BA66
VSS
BA71
VSS
BB18
VSS
BB26
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB43
VSS
BB55
VSS
BB6
VSS
BB60
VSS
BB64
VSS
BB67
VSS
BB70
VSS
C1
VSS
C25
VSS
C5
VSS
D10
VSS
D11
VSS
D14
VSS
D18
VSS
D22
VSS
D25
VSS
D26
VSS
D30
VSS
D34
VSS
D39
VSS
D44
VSS
D45
VSS
D47
VSS
D48
VSS
D53
VSS
D58
VSS
D6
VSS
D62
VSS
D66
VSS
D69
VSS
E11
VSS
E15
VSS
E18
VSS
E21
VSS
E46
VSS
E50
VSS
E53
VSS
E56
VSS
E6
VSS
E65
VSS
E71
VSS
F1
VSS
F13
VSS
F2
VSS
F22
VSS
F23
VSS
F27
VSS
F28
VSS
F32
VSS
F33
VSS
F35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F37
F38
F4
F40
F42
BA41
XGND
0720 CQ
Change J35 & F37 GND to XGND
BOM
?
U1R
?
D D
XGND
C C
B B
SKL_ULT
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
*SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
SKL-07 [GND]
SKL-07 [GND]
SKL-07 [GND]
1
8 49Wednesday, July 20, 2016
8 49Wednesday, July 20, 2016
8 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 9
5
+1.8V_DEEP_SUS[5,15,39]
+1.0V_DEEP_SUS[15,16,39,40]
TP8506
D D
C C
B B
TP8507
TP8508
TP8509
TP8511
TP8510
TP8512
TP8514
TP8513
TP8515
TP8517
TP8516
TP8518
TP8520
TP8519
TP8521
TP8523
TP8522
CFG0
CFG1
CFG2
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
+1.0V_DEEP_SUS
CFG0-19 need Reserve TP
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
R78 49.9/F_4
R79 *1K_4
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
4
3
2
1
09
?
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
AL25
AL27
BA70
BA68
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
U1S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
*SKL_ULT
REV = 1
SKL_ULT
RESERVED SIGNALS-1
BOM
19 OF 20
Need apply PN
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71
RSVD_TP_AW70
PROC_SELECT#
TP5
TP6
TP4
TP1
TP2
ZVM#
MSM#
?
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
R80 *0_4/S
D71
C70
C54
D54
0713 CQ
Change F/P S0402
AY4
BB3
AY71
R81 *0_4/S
AR56
AW71
0311 CQ
AW70
platform use SKL /KBL Iris CPU and merge +VCC_EDRAM and +VCC_EOPIO power design
SOC side control pin ZVM# need contact power IC side LP#
AP56
C64
R82 *100K/F_4
+VCCSTPLL
+1.8V_DEEP_SUS
R77 *0_4
LP#
C158
*1U/6.3V_4
Close to CPU
within 100mil
[44]
AW69
AW68
AU56
AW48
C7
U12
U11
H11
U1T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
*SKL_ULT
REV = 1
SKL_ULT
?
SPARE
20 OF 20
Need apply PN
F6
RSVD_F6
E3
RSVD_E3
C11
RSVD_C11
B11
RSVD_B11
A11
RSVD_A11
D12
RSVD_D12
C12
RSVD_C12
F52
RSVD_F52
?
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R83 *1K_4
R84 1K_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SKL-08 [RSV]
SKL-08 [RSV]
SKL-08 [RSV]
1
9 49Wednesday, July 20, 2016
9 49Wednesday, July 20, 2016
9 49Wednesday, July 20, 2016
1A
1A
1A
of
of
of
Page 10
5
+3V_DEEP_SUS [4,11,12,14..16,18]
+3V [2,4,11..13,15..21,25..27,29,30,32,33,35,41,45,46]
+5V [26,27,29,45]
+1.0V [2,4,6,16,34,35,40]
+3VS5 [4,15,16,27,31,32,35,37..40,44,45,48]
D D
C C
4
3
2
1
10
?
U1E
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
TP13
SIO_EXT_SMI#[35]
PCI_SERR#[35]
TP14
TP15
TP16
EC_RCIN#[35]
SERIRQ[30,35]
SPI1_CLK
SIO_EXT_SMI#
PCI_SERR#
SPI1_IO2
SPI1_IO3
SPI1_CS#
AW3
AW2
AW13
AY11
AV2
SPI0_CLK
SPI0_MISO
AV3
SPI0_MOSI
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
*SKL_ULT
REV = 1
SPI - FLASH
SPI - TOUCH
C LINK
SKL_ULT
LPC
PDC
5 OF 20
Need apply PN
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
?
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_PCH_CLK
SMB_PCH_DAT
SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
GPP_B23
CLK_PCI_EC_R
CLK_PCI_LPC_R
CLKRUN#
LAD0 [30,31,35]
LAD1 [30,31,35]
LAD2 [30,31,35]
LAD3 [30,31,35]
LFRAME# [30,31,35]
CLKRUN# [35]
SML0ALERT#
SML1ALERT#
TP12
R85 22/F_4
R86 33_4
[11]
[11]
EC2 33P/50V_4
EC3 33P/50V_4
CLK_24M_KBC [35]
CLK_PCI_TPM [30,31]
EMI(near PCH)
GPIO Pull UP
+3V +3V_DEEP_SUS
ACC_LED#[12]
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
R89 2.2K_4
R91 2.2K_4
R93 499/F_4
R95 499/F_4
R97 1K_4
R98 1K_4
R99 10K_4
SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
B B
R88 10K_4
R90 8.2K/F_4
R92 10K_4
R94 10K_4
R96 10K_4
PCH SPI ROM(CLG)
3/31 CQ
Fix ROM PN
Vender P/N
Winbond
Socket
Size
PCH_SPI_CS0#_R[35]
PCH_SPI1_CLK_R[35]
PCH_SPI1_SI_R[35]
PCH_SPI1_SO_R[35]
AKE3DZN0N01 - IC FLASH(8P) W25Q128FVSIQ(SOIC)16MB
AKE3DF00Q00 - IC FLASH(8P)GD25B128CSIGR(SOP)GGD 16MB
DFHS08FS023
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
need place to TOP
PCH_SPI_CS0#_R
TP17
PCH_SPI1_CLK_R
TP18
PCH_SPI1_SI_R
TP19
PCH_SPI1_SO_R
TP20
BIOS_WP#
TP21
HOLD#
TP22
SMBus/Pull-up(CLG)
Q3
[18,35]
MBCLK2
[18,35]
MBDATA2
A A
R110 4.7K_4
SMB_RUN_DAT
SMB_RUN_CLK
5
+3V
+3V
R111 4.7K_4
[16..18,29]
[16..18,29]
4 3
1
*2N7002DW
Q4
4 3
1
2N7002KDW
+3V
5
SMB_ME1_CLK
2
SMB_ME1_DAT
6
+3V
5
SMB_PCH_DAT
2
SMB_PCH_CLK
6
CPU heat pipe local thermal sensor
DDR thermal sensor
RTD2136
EC
Touch Pad
XDP
DDR4
4
3
PCH_SPI_CS0#
PCH_SPI1_CLK
R102/R103/R104/R105/R106/R107 close to U3 pin
C161 1U/6.3V_4
+3VSPI
PCH_SPI_IO2
R102 15/F_4
R103 15/F_4
R104 15/F_4
R106 15/F_4
R108 1K_4
R109 15/F_4
PCH SPI ROM(CLG)
+3V_DEEP_SUS
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_RPCH_SPI1_SO
C159
22P/50V_4
U3
1
CE#
6
SCK
5
SI
2
SO
3
WP#
WND 16M ROM
AKE3DZN0N01
SOCKET footprint
0713 CQ
PV use ROM P/N
2
+3VS5
HOLD#
VDD
VSS
R100 *0_4
R101 0_4
8
+3VSPI
7
HOLD#
4
PCH_SPI_IO3BIOS_WP#
R105 1K_4
R107 15/F_4
C160
0.1U/16V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SKL-09 [SPI/LPC/SM]
SKL-09 [SPI/LPC/SM]
SKL-09 [SPI/LPC/SM]
Date: Sheet of
Date: Sheet
Date: Sheet
1
10 49Wednesday, July 20, 2016
10 49Wednesday, July 20, 2016
10 49Wednesday, July 20, 2016
1A
1A
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Page 11
5
4
3
2
1
11
D D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR[14,27]
C C
B B
GSPI1_MOSI[14]
ACZ_SPKR
SML0ALERT#
GSPI1_MOSI
R112
*20K/F_4
+3V_DEEP_SUS
R115
1K_4
R117
*20K/F_4
R120
*20K/F_4
Functional Strap Definitions
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
[35]
ACZ_SDOUT[14]
GPIO33_EC
GPP_B18[14]SML0ALERT#[10]
SML1ALERT#[10]
ACZ_SDOUT
R114 1K_4
GPP_B18
+3V_DEEP_SUS
SML1ALERT#
+3V_DEEP_SUS
R113
*4.7K_4
ACZ_SDOUT
+3V
R116
*4.7K_4
R118
10K_4
R119
*10K_4
R121
20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
A A
5
4
+3V [2,4,10,12,13,15..21,25..27,29,30,32,33,35,41,45,46]
+3VS5 [4,10,15,16,27,31,32,35,37..40,44,45,48]
+3V_DEEP_SUS [4,10,12,14..16,18]
3
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SKL-10 [HDA]
SKL-10 [HDA]
SKL-10 [HDA]
1
11 49Wednesday, July 20, 2016
11 49Wednesday, July 20, 2016
11 49Wednesday, July 20, 2016
1A
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Page 12
5
+3V [2,4,10,11,13,15..21,25..27,29,30,32,33,35,41,45,46]
+3VS5 [4,10,15,16,27,31,32,35,37..40,44,45,48]
+3V_DEEP_SUS [4,10,11,14..16,18]
PEG_RXN1[19]
DIS only
PEG_RXP1[19]
PEG_TXN1[19]
D D
dGPU
0306 CQ
Cardreader PCIE net
LG9 use USB funciton
0311 CQ
PCIE Cardreafer
Cardreader
LAN
HDD
C C
0525 CQ
WLAN port9 move to port8
WLAN
0525 CQ
Add PICe SSD to 4ch
TP8524
TP8525
SSD PCIE x2
B B
A A
XDP_PRDY#_CPU
XDP_PREQ#_CPU
[32]
[32]
PEG_TXP1[19]
PEG_RXN2[19]
PEG_RXP2[19]
PEG_TXN2[19]
PEG_TXP2[19]
PEG_RXN3[19]
PEG_RXP3[19]
PEG_TXN3[19]
PEG_TXP3[19]
PEG_RXN4[19]
PEG_RXP4[19]
PEG_TXN4[19]
PEG_TXP4[19]
PCIE_RXN5_CARD[30]
PCIE_RXP5_CARD[30]
PCIE_TXN5_CARD[30]
PCIE_TXP5_CARD[30]
PCIE_RXN8_LAN[33]
PCIE_RXP8_LAN[33]
PCIE_TXN8_LAN[33]
PCIE_TXP8_LAN[33]
SATA_RXN0
[29]
SATA_RXP0
[29]
SATA_TXN0[29]
SATA_TXP0[29]
PCIE_RXN6_WLAN[31]
PCIE_RXP6_WLAN[31]
PCIE_TXN6_WLAN[31]
[31]
PCIE_TXP6_WLAN
PCIE_RXN9_SSD[32]
PCIE_RXP9_SSD[32]
PCIE_TXN9_SSD[32]
PCIE_TXP9_SSD[32]
PCIE_RXN10_SSD[32]
PCIE_RXP10_SSD[32]
PCIE_TXN10_SSD[32]
PCIE_TXP10_SSD[32]
0315 CQ
XDP_PRDY#_CPU
XDP_PREQ#_CPU
+3V_DEEP_SUS
PCIE_RXN11_SSD[32]
PCIE_RXP11_SSD[32]
PCIE_TXN11_SSD[32]
PCIE_TXP11_SSD[32]
PCIE_RXN12_SSD[32]
PCIE_RXP12_SSD[32]
PCIE_TXN12_SSD
PCIE_TXP12_SSD
5
Add Net name
[16]
[16]
0225 CQ
Del PCIE SSD port 11
0311 CQ
Add PCIE SSD port 11 for LG request
C162 0.22U/10V_4
C163 0.22U/10V_4
C164 0.22U/10V_4
C165 0.22U/10V_4
C167 0.22U/10V_4
C166 0.22U/10V_4
C168 0.22U/10V_4
C169 0.22U/10V_4
C170 0.1U/16V_4
C171 0.1U/16V_4
C174 0.1U/16V_4
C175 0.1U/16V_4
C172 0.1U/16V_4
C173 0.1U/16V_4
R131 100/F_4
R132 10K_4
PCIE_TXN5_CARD_C
PCIE_TXP5_CARD_C
PCIE_TXN8_LAN_C
PCIE_TXP8_LAN_C
PCIE_TXN6_WLAN_C
PCIE_TXP6_WLAN_C
PCIE_RXN9_SSD
PCIE_RXP9_SSD
PCIE_TXN9_SSD
PCIE_TXP9_SSD
PCIE_RXN10_SSD
PCIE_RXP10_SSD
PCIE_TXN10_SSD
PCIE_TXP10_SSD
PIRQA#
PCIE_RXN11_SSD
PCIE_RXP11_SSD
PCIE_TXN11_SSD
PCIE_TXP11_SSD
PCIE_RXN12_SSD
PCIE_RXP12_SSD
PCIE_TXN12_SSD
PCIE_TXP12_SSD
SSD SATA*1
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
PEG_TXN4_C
PEG_TXP4_C
PCIE_RCOMPN
PCIE_RCOMPP
BB11
H13
G13
B17
A17
G11
F11
D16
C16
H16
G16
D17
C17
G15
F15
B19
A19
F16
E16
C19
D19
G18
F18
D20
C20
F20
E20
B21
A21
G21
F21
D21
C21
E22
E23
B23
A23
F25
E25
D23
C23
F5
E5
D56
D61
E28
E27
D24
C24
E30
F30
A25
B25
4
?
U1H
PCIE/USB3/SATA
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP
PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP
PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
PCIE_RCOMPN
PCIE_RCOMPP
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
*SKL_ULT
PCI-E Port Mapping Table
PCI-E Port
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Function
dGPU
dGPU
dGPU
dGPU
CardReader
LAN
HDD
SKL_ULT
PDC
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
Port8
Port9
WLAN
Port10
Port11
Port12 SATA2
4
Need apply PN
SSIC / USB3
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB2
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
Function
VGA
NA
WLAN
LAN
CardReader
Un-used
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
? 8 OF 20REV = 1
3
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB30_RX1USB30_RX1+
USB30_TX1USB30_TX1+
USB30_RX2USB30_RX2+
USB30_TX2USB30_TX2+
USB30_RX3USB30_RX3+
USB30_TX3USB30_TX3+
USB30_RX4USB30_RX4+
USB30_TX4USB30_TX4+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
0225 CQ
Del IR Camera function (USB5- & USB5+)
USBP6USBP6+
USBP7USBP7+
0225 CQ
Del Touch screen function (USB8- & USB8+)
0311 CQ
Del CR USB net (USBP10- & USBP10+)
USB2_COMP
USB2_ID
USB2_VBUSSENSE
DGPU_HOLD_RST#
GPU_EVENT#
DGPU_PWR_EN
DGPU_PWROK
OCP_OC#
GC6_FB_EN
DEVSLP1
GPIO35_R
0309 CQ
Del ODD_PRSNT#_R & R128 (PU 10K +3V)
R130 113/F_4
R303 1K_4
R304 1K_4
R302 *0_4/S
R134 *0_4/S
0713 CQ
Change F/P S0402
Ra
TP35
USB30_RX1USB30_RX1+
USB30_TX1USB30_TX1+
USB30_RX2USB30_RX2+
USB30_TX2USB30_TX2+
USB30_RX3USB30_RX3+
USB30_TX3USB30_TX3+
USB30_RX4USB30_RX4+
USB30_TX4USB30_TX4+
USBP1- [26]
USBP1+ [26]
USBP2- [26]
USBP2+ [26]
USBP3- [25]
USBP3+ [25]
USBP4- [28]
USBP4+ [28]
USBP6- [26]
USBP6+ [26]
USBP7- [31]
USBP7+ [31]
DGPU_HOLD_RST#
GPU_EVENT#
DGPU_PWR_EN
DGPU_PWROK
GC6_FB_EN
DEVSLP1 [32]
DB modify
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
USB3.0 MB-1
PORT-2
PORT-3
PORT-4
3
USB3.0 TYPE C
USB3.0 TYPE C Cobime USB3.0 TYPE C
[26]
[26]
[26]
[26]
[26]
[26]
[26]
[26]
[28]
[28]
[28]
[28]
[28]
[28]
[28]
[28]
Modify 0922
DB modify swap
[20,22]
SATA_LED#SATA_LED#_R
2
USB3.0 (M/B-1)
USB3.0 (M/B-2)
USB3.0 TYPE C
0128 Add USB3.0 TYPE C
Combo USB3.0 MB-1
Combo USB3.0 MB-2
Camera
Cobime USB3.0 TYPE C
USB2.0 MB
WLAN
CardReader
PLACE 'Ra' WITHIN 500 MILS
[19]
[22]
[20,48]
[21,35,47]
ACC_LED# [10]
GPIO35 [32]
SATA_LED# [29]
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
If OTG is not implemented on the platform,
then USB2_ID and USB2_VBUSSENSE should both
be connected to ground.
GPIO35:
SSD SATA IF => High
SSD PCIE IF => Low
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
2
GPU_EVENT#
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PWROK
SATA_LED#
GC6_FB_EN
GPIO35
R122 *10K_4
R123 *10K_4
R124 10K_4
R125 10K_4
R126 10K_4
R127 *10K_4
R400 10K_4
1002 Pull high
DGPU_HOLD_RST#
Cobime USB3.0 MB-1
Cobime USB3.0 MB-2USB3.0 MB-2
Camera
NC
USB2.0 MB
WLAN
NC
NC
NC
R129 100K_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SKL-11 [PCIE/USB]
SKL-11 [PCIE/USB]
SKL-11 [PCIE/USB]
1
12
+3V
DIS ONLY
1A
1A
12 49Wednesday, July 20, 2016
12 49Wednesday, July 20, 2016
1
12 49Wednesday, July 20, 2016
1A
of
of
of
Page 13
5
4
3
2
1
+1.0V_DEEP_SUS [9,15,16,39,40]
+BAT_RTC [31]
+1.8V_DEEP_SUS [5,9,15,39]
+3V [2,4,10..12,15..21,25..27,29,30,32,33,35,41,45,46]
+3VPCU [6,29,31,34..37,44]
?
10 OF 20
?
PDC
9 OF 20
Need apply PN
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
TBT
Need apply PN
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
XTAL24_IN
XTAL24_OUT
SRTCRST#
U1J
0226 CQ
D D
Del CLK_PCIE_SSDN & CLK_PCIE_SSDP
Change net name PCIE_CLKREQ_SSD# to PCIE_CLKREQ1#
0311 CQ
Add CLK_PCIE_SSDN & CLK_PCIE_SSDP for LG request
Change net name PCIE_CLKREQ1# to PCIE_CLKREQ_SSD#
CLK_REQ/Strap Pin(CLG)
+3V
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ5#
C C
B B
R136 10K_4
R138 10K_4
R139 10K_4
R140 10K_4
R141 10K_4
R142 10K_4
VGA
SSD
WLAN
LAN
Cardreader
0307 CQ
Change net name PCIE_CLKREQ_CR#
to PCIE_CLKREQ4#
0311 CQ
Add CLK_PCIE_CRN & CLK_PCIE_CRP
Change net name PCIE_CLKREQ4# to PCIE_CLKREQ_CR#
CLK_VGA_N[19]
CLK_VGA_P[19]
PCIE_CLKREQ_VGA#[19]
CLK_PCIE_SSDN[32]
CLK_PCIE_SSDP[32]
PCIE_CLKREQ_SSD#[32]
CLK_PCIE_WLANN[31]
CLK_PCIE_WLANP[31]
PCIE_CLKREQ_WLAN#[31]
CLK_PCIE_LANN[33]
CLK_PCIE_LANP[33]
PCIE_CLKREQ_LAN#[33]
CLK_PCIE_CRN[30]
CLK_PCIE_CRP[30]
PCIE_CLKREQ_CR#[30]
CLK_VGA_N
CLK_VGA_P
PCIE_CLKREQ_VGA#
CLK_PCIE_SSDN
CLK_PCIE_SSDP
PCIE_CLKREQ_SSD#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
CLK_PCIE_CRN
CLK_PCIE_CRP
PCIE_CLKREQ_CR#
PCIE_CLKREQ5#
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
*SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U1I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
*SKL_ULT
SKL_ULT
CLOCK SIGNALS
SKL_ULT
REV = 1
0305 CQ
Change net name
CK_XDP_N_R to CK_XDP_N
CK_XDP_P_R to CK_XDP_P
0307 CQ
Add 0 ohm contact to page16 xDP
XDP_N & XDP_P
Del TP
F43
E43
BA17
E37
E35
E42
AM18
RTCX1
AM20
RTCX2
AN18
AM16
RTCRST#
?
C37
D37
C32
D32
C29
D29
B26
A26
E13
GPP_D4
B7
AP2
AP1
AP3
AN3
AN1
AN2
1001 Del TP
AM4
AM1
AM2
AM3
AP4
EMMC_RCOMP
AT1
CK_XDP_N
CK_XDP_P
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
R143 100/F_4
R144 200/F_4
R17731 *0_4/S
R17732 *0_4/S
TP203
TP38
TP39
0713 CQ
Change F/P S0402
RTC_RST# [16]
XDP_N [16]
XDP_P [16]
XCLK_BIASREF
1027 modify for eazy layout
+VCCSTPLL
R135
2.7K/F_4
R137
*60.4/F_4
13
1
Q7705
2N7002K
+3V_RTC_2[4,15,34]
R151
10K_4
2
2
EC_RTC_RST [35]
RTC_RST#
3
EC_SRTC_RST [35]
3
R8506
*10K_4
RTC Clock 32.768KHz
0301 CQ
Add GCLK XTALIN (CLKGEN_RTC_X1) & 0ohm
[34]
CLKGEN_RTC_X1
C177 12P/50V_4
32.768KHZ
C179 12P/50V_4
A A
R17724*0_4
RTC_X1
4
12
Y1
R147
10M_4
3
RTC_X2
5
RTC Circuitry(RTC)
Coin BAT -->Rb Rb Ra
Modify 0922
+3V_RTC_0
+3V_RTC_0
12
RTC Power trace width 20mils.
R150
1K_4
CN11
BAT_CONN
DFHS02FS080
bat-ap-aaa-bat-054-k01-2p-smt
4
+3VPCU
+3V_RTC_1
D2
BAT54CW-7-F
1U/6.3V_4
30mils
C181
+BAT_RTC+3V_RTC_2
R307
*0_4
R146
20K/F_4
R149
20K/F_4
R145 *0_6
RTC_RST#
C178
1U/6.3V_4
SRTC_RST#
C182
1U/6.3V_4
3
1
Q7706
*2N7002K
SRTC_RST#
0413 CQ
Change Q5 circuit (Follow G31 MV)
0523 CQ
Del Q5 , add Q7705 & Q7706 (Q7706
0526 CQ
Change Q7705 & Q7706 pin define
External Crystal
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-U
needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL
for Cannonlake-U.
TP51
C176 27P/50V_4
1
XTAL24_IN
XTAL24_OUT
0720 CQ
Del R17722 & R17723
Change 24M X'tal GND to XGND
Add R17757 contact XGND & GND
R148
1M_4
2
24MHZ +-20PPM
Y2
4
3
C180 27P/50V_4
TP52
)
2
XGND
0524 CQ
Change 24M X'tal P/N & F/P "BG624000112"
"xtl-2x1_6-1_35x1_05"
XGND
R17757
*0_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SKL-12 [CLK/EMMC]
SKL-12 [CLK/EMMC]
SKL-12 [CLK/EMMC]
Date: Sheet
Date: Sheet
Date: Sheet of
1
13 49Wednesday, July 20, 2016
13 49Wednesday, July 20, 2016
13 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 14
5
+3V [2,4,10..13,15..21,25..27,29,30,32,33,35,41,45,46]
+3V_DEEP_SUS [4,10..12,15,16,18]
D D
BT_OFF
PCH_TEMPALERT#
SIO_EXT_SCI#
UART2_RXD
UART2_TXD
C C
R154 10K_4
R155 10K_4
R156 10K_4
R157 49.9K/F_4
R158 49.9K/F_4
+3V_DEEP_SUS
0309 CQ
Del ACCEL_INTA# (GPP_C22) & R159 (PU 10K +3V)
LG9
G-sensor
HDA Bus(CLG)
HDA Bus(CLG)
B B
[11,27]
ACZ_SYNC
ACZ_SYNC
R168 33_4
R162 33_4
ACZ_SPKR
0324 CQ
Del TP
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
ACZ_SPKR
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
U1G
*SKL_ULT
+3V_DEEP_SUS
ACZ_SYNC_AUDIO[27]
BIT_CLK_AUDIO[27]
ACZ_SDOUT_AUDIO[27]
[11]
ACZ_SDOUT
ACZ_SDIN0[27]
ACZ_RST#_AUDIO[27]
A A
R160 *1K_4
R161 33_4
C183 *10P/50V_4
R165 33_4
ACZ_SDOUT
ACZ_SDIN0
5
AUDIO
SIO_EXT_SCI#[35]
4
GPP_B18[11]
GSPI1_MOSI[11]
REV = 1
4
SKL_ULT
3
Skylake (GPIO)
?
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5
GPP_G1 GPP_G2 GPP_G3 GPP_G4 GPP_G5GPP_G0
LG : 0
CB : 1
0
0324 CQ
Del TP
GPP_B18
0324 CQ
Del TP
GSPI1_MOSI
0324 CQ
Del TP
UART2_RXD
UART2_TXD
TP8612
SIO_EXT_SCI#
0324 CQ
Del TP
GPP_C22
Model
LG9 + UMA
U1F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
*SKL_ULT
REV = 1
LPSS ISH
BOARD_ID0
LG9 : 0
LG9A : 1
LG9 + dGPU + N16S-GTR 0 0 00
0
1
LG9A + dGPU + N16S-GTR 0
1
1
?
SDIO/SDXC
GPP_A17/SD_PWR_EN#/ISH_GP7
7 OF 20
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
GPP_A16
GPP_F23
3
1
1
1
0226 CQ
0520 CQ
Board ID 4 ,
TP8564
R183 200/F_4
TP100
LG & CB board ID
Need apply PN
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
N16V : 0
N16S : 1
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
UMA : 0
dGPU : 1
11
1
11
1
+3V_DEEP_SUS
R164*10K_4
R167*10K_4
R17010K_4
R17210K_4
R174*10K_4
R176*10K_4
R178*10K_4
R180*10K_4
R182*10K_4
?
2
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
LG9 : 0
LG9A : 1
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
2
GPP_D10
ISH_I2C0_SDA
ISH_I2C0_SCL
0324 CQ
Del TP
PCH_TEMPALERT#
SML0BDATA
SML0BCLK
SML0BALERT#
0324 CQ
Del TP
0 000LG9 + dGPU + N16V-GMR1
1
1
1
TP92
TP61
TP62
TP71
TP72
TP73
TP74
No Define
00000
000LG9A + UMA
00LG9A + dGPU + N16V-GMR1
R16310K_4
R16610K_4
R169*10K_4
R171*10K_4
R17310K_4
R17510K_4
R17710K_4
R17910K_4
R18110K_4
1
0309 CQ
Del SPK_ID & R401 (PU 10K +3V_DEEP_SUS)
BT_OFF
BOARD_ID6
GPP_G6
No Define
0
0
0
0
0
0
BOARD_ID7
GPP_G7
No Define
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
[31]
BT_OFF
BOARD_ID8
GPP_G8
No Define
0
0
0
0
0
0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL-13 [GPIO]
SKL-13 [GPIO]
SKL-13 [GPIO]
1
14
0
0
0
0
0
0
1A
1A
1A
of
of
14 49Wednesday, July 20, 2016
14 49Wednesday, July 20, 2016
14 49Wednesday, July 20, 2016
Page 15
5
4
+3V_DEEP_SUS[4,10..12,14,16,18]
+1.0V_DEEP_SUS[9,16,39,40]
+1.8V_DEEP_SUS[5,9,39]
+3VS5[4,10,16,27,31,32,35,37..40,44,45,48]
+3V_RTC_2[4,13,34]
3
2
1
15
D D
+VCCPRIM
C184 1U/6.3V_4
+1.0V_DEEP_SUS
Ca and Cb close to CPU less then 100 mils
PCH Internal VRM
C C
B B
0713 CQ
Change F/P S0402
+V3.3DX_1.5DX_ADO +1.0V_DEEP_SUS
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
R201 *0_4/S
+3VS5
+V3.3DX_1.5DX_ADO
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
R210 *0_4/S
Ca
C185 1U/6.3V_4
C187 1U/6.3V_4
R188 *0_4/S
C188 1U/6.3V_4
C189 1U/6.3V_4
C190 47U/6.3VS_8
R194 *0_6/S
C192 1U/6.3V_4
R196 *0_4/S
R199 *0_6/S
C193 1U/6.3V_4
C194 1U/6.3V_4
R205 *0_4/S
R206 *0_6/S
C196 1U/6.3V_4
R207 *0_4/S
R208 *0_6/S
R209 *0_4/S
C197 1U/6.3V_4
C203
*1U/6.3V_4
+3V
+VCCMPHYAON_1P0
22mA
+VCCAMPHYPLL_1P0
+VCCAPLL_1.0V
26mA
+VCCPRIM
+3VS5_AD17
+VCCSPI
11mA
+VCCSRAM_1.0V
700mA
+VCCPRIM_3.3V
75mA
+VCCPRIM_1.0V
700mA
+VCCAPLLEBB
33mA
C204
*22U/6.3V_6
0711 CQ
R211 100K change to 10K for 1.8V_DEEP_SUS issue
SLP_SUS_ON[35,39,40]
U1O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
*SKL_ULT
REV = 1
R211
10K_4
CPU POWER 4 OF 4
C210
*10P/50V_4
?
SKL_ULT
2.899A
2.57A
0.03A
C205
1U/6.3V_4
0.09A
Need apply PN
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
1.714A
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
15 OF 20
U4
5
IN
4
IN
3
ON/OFF
IC OTHER(5P) G5245AT11U
0409 CQ
Chagne P/N AL005245000 (RDC suggest)
?
OUT
GND
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
1
2
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
+3V_DEEP_SUS+3VS5
C209
0.1U/16V_4
6mA
1mA
Cb
C186 1U/6.3V_4
R187 *0_6/S
R190 *0_4/S
R192 *0_4/S
C191 0.1U/16V_4
R195 *0_4/S
R198 *0_4/S
R200 *0_4/S
R202 *0_4/S
R203 *0_4/S
R204 *0_4/S
C195 1U/6.3V_4
TP102
TP103
1U/6.3V_4
1U/6.3V_4
+VCCPGPPA
20mA
+VCCPGPPB
20mils
4mA
6mA
8mA
6mA
41mA
160mA
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+1.0V_DEEP_SUS
35mA
29mA
24mA
33mA
4mA
10mA
C200
1U/6.3V_4
+VCCRTCPRIM_3.3V+VCCATS_1.8V
C201
1U/6.3V_4
C208
1U/6.3V_4
+3V_RTC_2
C198
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C206
C199
0.1U/16V_4
1U/6.3V_4
C207
C202
0.1U/16V_4
+3V_DEEP_SUS
R184 *0_4/S
R185 *0_4/S
R186 *0_4/S
R189 *0_4/S
R191 *0_4/S
R193 *0_4/S
+1.8V_DEEP_SUS
R197 *0_4/S
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
SKL-14 [PCH Power]
SKL-14 [PCH Power]
SKL-14 [PCH Power]
1
15 49Wednesday, July 20, 2016
15 49Wednesday, July 20, 2016
15 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 16
5
0322 CQ
Del repeat TP
D D
TP8546
TP8547
TP8548
TP8549
TP8550
TP8551
TP8552
TP8553
TP8558
CFG4
ON/OFFBTN_KBC#
XDP_P
XDP_N
SMB_RUN_DAT
SMB_RUN_CLK
XDP_TRST#
JTAG_TMS_PCH EC_PWROK
HWPG
4
[12]
[12]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[16]
[10,17,18,29]
[10,17,18,29]
XDP_PREQ#_CPU
XDP_PRDY#_CPU
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
ON/OFFBTN_KBC#
CFG7
SMB_RUN_DAT
SMB_RUN_CLK
[2]
XDP_TCK0
3
CN12
1
51
1
51
50
2
50
2
3
R212 *1K_4
R213 *1K_4
10
R214 *1K_4
CFG0
[13]
XDP_P
[13]
XDP_N
PWR_DEBUG
XDP_DBRESET_N
XDP_TDO
XDP_TRST#
XDP_TDI
JTAG_TMS_PCH
XDP_TCK0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
49
3
49
4
48
4
48
5
47
5
47
6
46
6
46
7
45
7
45
8
44
8
44
9
43
9
43
42
10
42
41
11
41
40
12
40
39
13
39
38
14
38
37
15
37
36
16
36
35
17
35
XDP_TCK1
34
18
34
SYS_PWROK
33
19
33
XDP_RST
32
20
32
31
21
31
30
22
30
29
23
29
28
24
28
27
25
27
26
525253
*FH26W-51S-0.3SHW(05)
53
XDP_RST
2
+1.0V_DEEP_SUS
XDP_BPM0
XDP_BPM1
CFG17
CFG16
CFG8
CFG9
CFG10
CFG11
CFG19
CFG18
CFG12
CFG13
CFG14
CFG15
EC_PWROK
SYS_PWROK
[9,15,16,39,40]
[2]
[2]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[9]
[4,35]
[4]
R2241K_4
TP8557
PLTRST#
1
16
[4,19,30..33,35]
C C
XDP_DBRESET_N
+3V_DEEP_SUS
+3VS5
APS
CN3
1
1
2
2
3
B B
[6,40]
[9,15,16,39,40]
[4,10..12,14,15,18]
[4,10,15,27,31,32,35,37..40,44,45,48]
[2,4,10..13,15,17..21,25..27,29,30,32,33,35,41,45,46]
A A
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*ACES_88511-180N
R221 *0_4
TP8573
TP8574
TP8575
TP8576
+VCCIO
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+3VS5
+3V
R217 1K_4
C213
0.1U/16V_4
0310 CQ
SUSB#
SLP_S5#
SUSC#
SLP_A#
SUSB# [4,16,35]
SLP_S5# [4]
SUSC# [4,35]
SLP_A# [4]
RTC_RST# [13]
ON/OFFBTN_KBC# [16]
SYS_RESET# [4]
PCH_SLP_S0_N [4,35]
SUSB# [4,16,35]
APS
+3VS5
SYS_PWROK
+3V +3V_DEEP_SUS
R218 *1K_4 R219
C214
0.1U/16V_4
HWPG[4,35,37..39]
+3V
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST#
C215
0.1U/16V_4
U5
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
C211
0.1U/16V_4
DPAD
GND
C212
0.1U/16V_4
1B
2B
3B
4B
+1.0V_DEEP_SUS
3
6
8
11
15
7
150/F_4
R220
*10K_4
XDP_TDO_CPU [2]
XDP_TDI_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
[2,4,6,34,35,40]
0713 CQ
Change F/P S0402
[2]
JTAGX_PCH
[2]
JTAG_TMS_PCH
[2]
JTAG_TDI_PCH
[2]
JTAG_TDO_PCH
[2]
JTAG_TCK_PCH
PWR_DEBUG
[2]
[2]
[2]
+1.0V
+VCCIO
TP8562
TP8561
TP8560
TP8563
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
R222 51_4
R223 *0_4
R17733 *0_4/S
R17734 *0_4/S
R17735 *0_4/S
R17736 *0_4/S
R225 *0_4
R226 *0_4
R17737 *0_4/S
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
SKL-15 [XDP/APS]
SKL-15 [XDP/APS]
SKL-15 [XDP/APS]
1
16 49Wednesday, July 20, 2016
16 49Wednesday, July 20, 2016
16 49Wednesday, July 20, 2016
1A
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of
Page 17
5
4
3
2
1
M_A_A[13:0][3]
D D
M_A_WE#[3]
M_A_CAS#[3]
M_A_RAS#[3]
[3]
DDR4_DRAMRST#[3,18]
+1.2VSUS
M_A_ACT#
[3]
M_A_PARITY
[3]
M_A_ALERT#
M_A_BS#0[3]
M_A_BS#1[3]
M_A_BG#0[3]
M_A_BG#1[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CLKP0[3]
M_A_CLKN0[3]
M_A_CLKP1[3]
M_A_CLKN1[3]
M_A_DIM0_ODT0[3]
M_A_DIM0_ODT1[3]
SMB_RUN_CLK
SMB_RUN_DAT
R235 *240/F_4
R238 *240/F_4
R239 *240/F_4
R240 *240/F_4
R241 *240/F_4
R242 *240/F_4
R243 *240/F_4
R244 *240/F_4
R230
*10K_4
R233
10K_4
R228 240/F_4
PM_EXTTS#0
R231
*10K_4
R234
10K_4
5
[10,16,18,29]
[10,16,18,29]
+1.2VSUS
PM_EXTTS#0[18]
C C
+3V
R229
*10K_4
CHA_SA0 CHA_SA1 CHA_SA2
R232
10K_4
Follow reference board
DIMM0 SA0,1,2=LLL
B B
A A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
C216 *0.1U/16V_4
SMB_RUN_CLK
SMB_RUN_DAT
CHA_SA0
CHA_SA1
CHA_SA2
+1.2VSUS
TP105
TP106
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
ddr4-addr0107-p005a-rvs-smt
4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246
13
34
55
76
179
200
221
242
97
11
32
53
74
177
198
219
240
95
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ8
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ13
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ21
M_A_DQ16
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ22
M_A_DQ23
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ3
M_A_DQ5
M_A_DQ1
M_A_DQ2
M_A_DQ6
M_A_DQ53
M_A_DQ49
M_A_DQ54
M_A_DQ50
M_A_DQ48
M_A_DQ52
M_A_DQ55
M_A_DQ51
M_A_DQ33
M_A_DQ36
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ32
M_A_DQ34
M_A_DQ35
M_A_DQ45
M_A_DQ40
M_A_DQ47
M_A_DQ42
M_A_DQ41
M_A_DQ44
M_A_DQ46
M_A_DQ43
M_A_DQ57
M_A_DQ56
M_A_DQ63
M_A_DQ58
M_A_DQ61
M_A_DQ60
M_A_DQ62
M_A_DQ59
M_A_DQSP3
M_A_DQSP1
M_A_DQSP2
M_A_DQSP0
M_A_DQSP6
M_A_DQSP4
M_A_DQSP5
M_A_DQSP7
M_A_DQSP8
M_A_DQSN3
M_A_DQSN1
M_A_DQSN2
M_A_DQSN0
M_A_DQSN6
M_A_DQSN4
M_A_DQSN5
M_A_DQSN7
M_A_DQSN8
M_A_DQSP[7:0]
M_A_DQSN[7:0]
M_A_DQ24
8
M_A_DQ[63:0]
+2.5VSUS
+3V
+1.2VSUS
DDR_VTT [18,38]
+SMDDR_VREF_DIMM
[3]
M_A_DQSP8 M_A_DQSN8
1uF/10uF 4pcs on each side of connector
[3]
+1.2VSUS DDR_VTT
3
[3]
[18,38]
[2,4,10..13,15,16,18..21,25..27,29,30,32,33,35,41,45,46]
[3,6,18,38,40,48]
+1.2VSUS +1.2VSUS
R236
240/F_4
R237
240/F_4
Place these Caps near So-Dimm0.
C217 1U/6.3V_4
C219 1U/6.3V_4
C221 1U/6.3V_4
C223 1U/6.3V_4
C225 1U/6.3V_4
C227 1U/6.3V_4
C229 1U/6.3V_4
C230 1U/6.3V_4
C233 10U/6.3V_6
C235 10U/6.3V_6
C237 10U/6.3V_6
C239 10U/6.3V_6
C241 10U/6.3V_6
C243 10U/6.3V_6
C244 10U/6.3V_6
C246 10U/6.3V_6
+SMDDR_VREF_DIMM
C218 1U/6.3V_4
C220 1U/6.3V_4
C222 1U/6.3V_4
C224 1U/6.3V_4
C226 10U/6.3V_6
C228 10U/6.3V_6
C231 *0.1U/16V_4
C232 *2.2U/10V_4
+2.5VSUS
C236 1U/6.3V_4
C238 1U/6.3V_4
C240 10U/6.3V_6
C242 10U/6.3V_6
+3V
C245 0.1U/16V_4
C247 2.2U/10V_4
2.48A
+1.2VSUS
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
1
5
9
15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93
99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
2
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
ddr4-addr0107-p005a-rvs-smt
VDDSPD
VREF_CA
(260P)
DDR4 SODIMM 260 PIN
VREF DQ0 M1 Solution
SM_VREF[3]
2 1
255
257
VPP1
259
VPP2
258
VTT
164
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
R246 2/F_6
C234
0.022U/25V_4
R248 24.9/F_4
17
+3V
+2.5VSUS
DDR_VTT
+SMDDR_VREF_DIMM
+1.2VSUS
R245
1K/F_4
+SMDDR_VREF_DIMM
R247
1K/F_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
DDR4 DIMM0
DDR4 DIMM0
DDR4 DIMM0
1
17 49Wednesday, July 20, 2016
17 49Wednesday, July 20, 2016
17 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 18
5
M_B_A[13:0][3]
D D
C C
+3V
R250
*10K_4
CHB_SA0 CHB_SA1 CHB_SA2
R253
10K_4
Follow reference
board DIMM1
SA0,1,2=LHL
B B
R251
10K_4
R254
*10K_4
R252
*10K_4
R255
10K_4
[10,16,17,29]
[10,16,17,29]
[3]
[3]
[3]
DDR4_DRAMRST#[3,17]
M_B_WE#[3]
M_B_CAS#[3]
M_B_RAS#[3]
M_B_ACT#
M_B_PARITY
M_B_ALERT#
PM_EXTTS#0[17]
M_B_BS#0[3]
M_B_BS#1[3]
M_B_BG#0[3]
M_B_BG#1[3]
M_B_CS#0[3]
M_B_CS#1[3]
M_B_CKE0[3]
M_B_CKE1[3]
M_B_CLKP0[3]
M_B_CLKN0[3]
M_B_CLKP1[3]
M_B_CLKN1[3]
M_B_DIM0_ODT0[3]
M_B_DIM0_ODT1[3]
SMB_RUN_CLK
SMB_RUN_DAT
+1.2VSUS
R256 *240/F_4
R257 *240/F_4
R258 *240/F_4
R259 *240/F_4
R260 *240/F_4
R262 *240/F_4
R263 *240/F_4
R264 *240/F_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP107
TP108
C248 *0.1U/16V_4
CHB_SA0
CHB_SA1
CHB_SA2
+1.2VSUS
PM_EXTTS#0
M_B_ODT0
M_B_ODT1
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
JDIM2A
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
162
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
ddr4-addr0107-p005a-rvs-smt
Co-lay for ODT
From Intel MOW, ODT directly connection to CPU
+1.2VSUS +3V_DEEP_SUS
R268
*47K/F_4
A A
[3,4]
DDR_VTT_CNTL
5
R269
*47K/F_4
2
1 3
Q6
*DRC5144E0L
R270
*47K/F_4
DDR_VTT_PG_CTRL
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
R274 *0_4
4
(260P)
DDR4 SODIMM 260 PIN
[3,6,17,38,40,48]
[17,38]
4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246
13
34
55
76
179
200
221
242
97
11
32
53
74
177
198
219
240
95
M_B_DQ1
M_B_DQ5
M_B_DQ3
M_B_DQ7
M_B_DQ4
M_B_DQ0
M_B_DQ2
M_B_DQ6
M_B_DQ17
M_B_DQ20
M_B_DQ23
M_B_DQ19
M_B_DQ16
M_B_DQ21
M_B_DQ18
M_B_DQ22
M_B_DQ10
M_B_DQ9
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ15
M_B_DQ8
M_B_DQ11
M_B_DQ43
M_B_DQ42
M_B_DQ44
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ41
M_B_DQ45
M_B_DQ28
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ29
M_B_DQ25
M_B_DQ26
M_B_DQ31
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ35
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ34
M_B_DQ52
M_B_DQ48
M_B_DQ55
M_B_DQ54
M_B_DQ49
M_B_DQ53
M_B_DQ50
M_B_DQ51
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ63
M_B_DQSP0
M_B_DQSP2
M_B_DQSP1
M_B_DQSP5
M_B_DQSP3
M_B_DQSP4
M_B_DQSP6
M_B_DQSP7
M_B_DQSP8
M_B_DQSN0
M_B_DQSN2
M_B_DQSN1
M_B_DQSN5
M_B_DQSN3
M_B_DQSN4
M_B_DQSN6
M_B_DQSN7
M_B_DQSN8
DDR_VTT_PG_CTRL_R [38]
+2.5VSUS[17,38]
+3V_DEEP_SUS[4,10..12,14..16]
+5VPCU[37,45,48]
+1.2VSUS
DDR_VTT
+5VS5[4,26,32,37..43,45..48]
+3V[2,4,10..13,15..17,19..21,25..27,29,30,32,33,35,41,45,46]
3
2.48A
+1.2VSUS
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
ddr4-addr0107-p005a-rvs-smt
VREF_CA
(260P)
DDR4 SODIMM 260 PIN
[3]
M_B_DQSP[7:0]
[3]
M_B_DQSN[7:0]
M_B_DQ[63:0]
M_B_DQSP8
M_B_DQSN8
R261
240/F_4
R265
240/F_4
[3]
+1.2VSUS
+1.2VSUS
Local Thermal Sensor
U6
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*EMC1412-1-ACZL-TR
Need Check PN(EOD)
VCC
DXP
DXN
GND
R273 *10K/F_4
+3V
MBCLK2
MBDATA2
PM_EXTTS#0
MBCLK2[10,35]
MBDATA2[10,35]
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
2nd:AL000431014 TMP431ADGKR(98h)
3
1
2
3
5
C279 *0.01U/25V_4
DDR_THERMDA
C281
*2200P/50V_4
DDR_THERMDC
DDR4 Thermal Sensor
+3V
2
VDDSPD
VPP1
VPP2
VTT
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND
GND
1 3
2
255
257
259
258
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
*METR3904-G
Q7
2
+3V
+2.5VSUS
DDR_VTT
SMDDR_VREF_DQ1_M1
[3]
SMDDR_VREF_DQ1_M3
1
18
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C249 1U/6.3V_4
C251 1U/6.3V_4
C253 1U/6.3V_4
C254 1U/6.3V_4
C255 1U/6.3V_4
C257 1U/6.3V_4 C258 1U/6.3V_4
C259 1U/6.3V_4
C261 1U/6.3V_4
C263 10U/6.3V_6
C265 10U/6.3V_6
C267 10U/6.3V_6
C268 10U/6.3V_6
C269 10U/6.3V_6
C272 10U/6.3V_6
C274 10U/6.3V_6
VREF DQ1 M1 Solution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
SMDDR_VREF_DQ1_M1
C250 *0.1U/16V_4
C252 *2.2U/10V_4
DDR_VTT
C256 1U/6.3V_4
C260 1U/6.3V_4
C262 1U/6.3V_4
C264 10U/6.3V_6
C266 10U/6.3V_6
+3V
C271 0.1U/16V_4C270 10U/6.3V_6
C273 2.2U/10V_4
+2.5VSUS
C275 1U/6.3V_4
C276 1U/6.3V_4
C277 10U/6.3V_6
C278 10U/6.3V_6
+1.2VSUS
R266
1K/F_4
R267 2/F_6
C280
0.022U/25V_4
2 1
R272
24.9/F_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR4 DIMM1
DDR4 DIMM1
DDR4 DIMM1
SMDDR_VREF_DQ1_M1SMDDR_VREF_DQ1_M3
R271
1K/F_4
1
18 49Wednesday, July 20, 2016
18 49Wednesday, July 20, 2016
18 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 19
1
+1.05V_GFX
A A
Near GPU
C1025 22U/6.3V_6
C1001 *22U/6.3VS_6
C1002 10U/6.3V_6
C1003 *10U/6.3VS_6
C1004 *4.7U/6.3V_6
C1027 1U/6.3V_4
C1009 *1U/6.3V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A
+1.05V_GFX
PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA
B B
[46]
C C
0713 CQ
Change F/P S0603
+1.05V_GFX
D D
VGPU_CORE_SENSE
[46]
R1008 *0_6/S
Near GPU
Under GPU
1
C1014 *22U/6.3VS_6
C1016 *22U/6.3VS_6
C1019 *10U/6.3VS_6
C1020 4.7U/6.3V_6
Near GPU
Under GPU
C1024 *1U/6.3V_4
C1041 *1U/6.3V_4
C1052 0.1U/16V_4
C1053 4.7U/6.3V_6
C1054 4.7U/6.3V_6
Near GPU
VSS_GPU_SENSE
PEX_TSTCLK
R1007*200/F_4
PEX_TSTCLK#
CX300T30001 Change to 0ohm
PEX_PLLVDD
C10574.7U/6.3V_6
C10581U/6.3V_4
C10590.1U/16V_4
PEX_PLLVDD = 130mA
10K/F_4
R1010
R10112.49K/F_4
+3V_AON
TESTMODE
PEX_TERMP
AA22
AB23
AC24
AD25
AE26
AE27
AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27
AF22
AE22
AA14
AA15
AF25
AA8
AA9
AB8
F2
F1
AD9
2
U1001A
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLL_HVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_PLLVDD
PEX_PLLVDD
TESTMODE
PEX_TERMP
2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119GF117
COMMONbga595-nvidia-n13p- gv2-s-a2
3
0713 CQ
Change F/P S0402
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
3
VGA_RST#
PEX_CLKREQ#
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP4_C
PEG_RXN4_C
C1000 *0.1U/16V_4
R1001 *0_4/S
R1002 10K/F_4
C1030 0.22U/10V_4
C1011 0.22U/10V_4
C1017 0.22U/10V_4
C1037 0.22U/10V_4
C1039 0.22U/10V_4
C1023 0.22U/10V_4
C1044 0.22U/10V_4
C1046 0.22U/10V_4
PLTRST#[4,16,30..33,35]
DGPU_HOLD_RST#[12]
4
+3V_AON
MC74VHC1G08DFT2G
4
PEGX_RST# [22]
CLK_VGA_P [13]
CLK_VGA_N [13]
PEG_RXP1
PEG_RXN1
PEG_TXP1 [12]
PEG_TXN1 [12]
PEG_RXP2
PEG_RXN2
PEG_TXP2 [12]
PEG_TXN2 [12]
PEG_RXP3
PEG_RXN3
PEG_TXP3 [12]
PEG_TXN3 [12]
PEG_RXP4
PEG_RXN4
PEG_TXP4 [12]
PEG_TXN4 [12]
+3V
U1002
2
1
5
NVDD = 32.22 ~ 26.66 A
Under GPU
C1005 1U/6.3V_4
C1026 1U/6.3V_4
C1006 1U/6.3V_4
C1028 1U/6.3V_4
C1007 4.7U/6.3V_6
C1033 4.7U/6.3V_6
C1029 4.7U/6.3V_6
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
C1008 4.7U/6.3V_6
C1034 4.7U/6.3V_6
C1012 4.7U/6.3V_6
C1013 4.7U/6.3V_6
C1032 4.7U/6.3V_6
C1018 4.7U/6.3V_6
C1038
*330u_2.5V_3528
C1043 22U/6.3V_6
C1045 47U/6.3VS_8
C1047 4.7U/6.3V_6
C1048 4.7U/6.3V_6
C1049 4.7U/6.3V_6
C1050 4.7U/6.3V_6
C1051 4.7U/6.3V_6
+VGACORE
12
+
Near GPU
C1056
0.1U/16V_4
4
3 5
SYS_PEX_RST_MON#
R1085*10K_4
Ra
Db
GPU_PEX_RST_HOLD#[22]
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
if stuff Da,Db,Ra,Rb
do not stuff Ua,Ub,Ca,Cb,Rc,Rd
5
U1001E
11/14 NVVDD
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
L11
VDD
L13
VDD
L15
VDD
L17
VDD
M10
VDD
M12
VDD
M14
VDD
M16
VDD
M18
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
P10
VDD
P12
VDD
P14
VDD
P16
VDD
P18
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
T10
VDD
T12
VDD
T14
VDD
T16
VDD
T18
VDD
U11
VDD
U13
VDD
U15
VDD
U17
VDD
V10
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
bga595-nvidia-n13p- gv2-s-a2
COMMON
SYS_PEX_RST_MON#
+3V
2
1
Da
6
[22]
4
U8508
3 5
MC74VHC1G08DFT2G
6
U1001C
14/14 XVDD/VDD33
AD10
NC
AD7
NC
B19
NC
3V3AUX_NC
F11
V5
FERMI_RSVD1_NC
V6
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
G1
XPWR_G1
G2
XPWR_G2
G3
XPWR_G3
G4
XPWR_G4
G5
XPWR_G5
G6
XPWR_G6
G7
XPWR_G7
V1
XPWR_V1
V2
XPWR_V2
W1
XPWR_W1
W2
XPWR_W2
W3
XPWR_W3
W4
XPWR_W4
bga595-nvidia-n13p- gv2-s-a2 COMMON
0305 CQ
NV AND Gate
Same as U1002
C8606
0.1U/16V_4
PEGX_RST#
PEX_CLKREQ#
DRC5144E0L
7
2
Q1002
7
+1.05V_GFX[20,21,48]
+3V_GFX[21,22,46..48]
+3V_AON[22,34,48]
+1.5V_GFX[20,23,24,47]
+3V[2,4,10..13,15..18,20,21,25..27,29,30,32,33,35,41,45,46]
+VGACORE[46]
VDD33 = 56mA
G10
VDD33
VDD33
VDD33
VDD33
G12
G8
G9
+3V_AON
C1010 0.1U/16V_4
C1035 4.7U/6.3V_6
C1015 1U/6.3V_4C1031 4.7U/6.3V_6
+3V_GFX
Near GPU
C1021 4.7U/6.3V_6
C1022 1U/6.3V_4
C1040 0.1U/16V_4
C1042 0.1U/16V_4
Under GPU
Near GPU
Under GPU
Power up
sequence
ALL 3.3V
+3VGFX & +3V3_AON
+VGACORE
PEX_VDD
+1.05V_GFX
FBVDDQ
+1.5V_GFX
+3V_GFX
R1009
4.7K_4
CLKREQ_C1
1 3
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
t>0NVVDD
t>=0
2
Q1001
DRC5144E0L
1 3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
N16x [PCIE]
N16x [PCIE]
N16x [PCIE]
8
19
t>=0
PCIE_CLKREQ_VGA#
of
of
19 49Wednesday, July 20, 2016
19 49Wednesday, July 20, 2016
19 49Wednesday, July 20, 2016
8
[13]
1A
1A
1A
Page 20
1
R1012 10K/F_4
0305 CQ
NV check , GDDR5
FBA_CMD2 , FBA_CMD18 , FBA_CMD3 ,
FBA_CMD5 , FBA_CMD19 pull down 10K
A A
0324 CQ
DDR3 , 10K PD
FBA_ODT_L
FBA_ODT_H
FBA_RST#
FBA_CKE_L
FBA_CKE_H
B B
C C
0305 CQ
NV check GDDR5 is 1.35V setting
0324 CQ
DDR3 use 1.5V setting
0223 CQ
Add for GDDR5 USE
0324 CQ
Del for DDR3
FBA_CMD2
FBA_CMD18
FBA_CMD5
FBA_CMD3
FBA_CMD19
0223 CQ
GDDR5 need add
0324 CQ
DDR3 Del FBA_CMD31
+1.5V_GFX
VMA_CLK0[23]
VMA_CLK0#[23]
VMA_CLK1[24]
VMA_CLK1#[24]
PS_FB_CLAMP
R1014 10K/F_4
R1016 10K/F_4
R1013 10K/F_4
R1017 10K/F_4
R1015 10K/F_4
FBA_CMD0[23]
FBA_CMD1[23]
FBA_CMD2[23]
FBA_CMD3[23]
FBA_CMD4[23,24]
FBA_CMD5[23,24]
FBA_CMD6[23,24]
FBA_CMD7[23,24]
FBA_CMD8[23,24]
FBA_CMD9[23,24]
FBA_CMD10[23,24]
FBA_CMD11[23,24]
FBA_CMD12[23,24]
FBA_CMD13[23,24]
FBA_CMD14[23,24]
FBA_CMD15[23,24]
FBA_CMD16[24]
FBA_CMD17[24]
FBA_CMD18[24]
FBA_CMD19[24]
FBA_CMD20[23,24]
FBA_CMD21[23,24]
FBA_CMD22[23,24]
FBA_CMD23[23,24]
FBA_CMD24[23,24]
FBA_CMD25[23,24]
FBA_CMD26[23,24]
FBA_CMD27[23,24]
FBA_CMD28[23,24]
FBA_CMD29[23,24]
FBA_CMD30[23,24]
R1021 *60.4/F_4
R1022 *60.4/F_4
FB_PLLAVDD = 55mA
Add La (0402) for co-lay
D D
+1.05V_GFX
L1001 *PBY160808T-300Y-N
L1002 HCB1005KF-330T30
La
C1069 22U/6.3VS_6
C1070 0.1U/16V_4
C1071 0.1U/16V_4
C1072 0.1U/16V_4
FB_DLLAVDD = 15mA
1
+FB_PLLAVDD
2
F3
C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26
F22
J22
D24
D25
N22
M22
D18
C18
D17
D16
T24
U24
V24
V25
F16
P22
H22
2
U1001B
FB_CLAMP
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DEBUG0
FBA_DEBUG1
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD
bga595-nvidia-n13p- gv2-s-a2
GF119NC
GF117
GF119
GF117FB_PLLAVDD
3
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FB_VREF_PROBE
3
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
COMMON
4
VMA_DQ0
E18
VMA_DQ1
F18
VMA_DQ2
E16
VMA_DQ3
F17
VMA_DQ4
D20
VMA_DQ5
D21
VMA_DQ6
F20
VMA_DQ7
E21
VMA_DQ8
E15
VMA_DQ9
D15
VMA_DQ10
F15
VMA_DQ11
F13
VMA_DQ12
C13
VMA_DQ13
B13
VMA_DQ14
E13
VMA_DQ15
D13
VMA_DQ16
B15
VMA_DQ17
C16
VMA_DQ18
A13
VMA_DQ19
A15
VMA_DQ20
B18
VMA_DQ21
A18
VMA_DQ22
A19
VMA_DQ23
C19
VMA_DQ24
B24
VMA_DQ25
C23
VMA_DQ26
A25
VMA_DQ27
A24
VMA_DQ28
A21
VMA_DQ29
B21
VMA_DQ30
C20
VMA_DQ31
C21
VMA_DQ32
R22
VMA_DQ33
R24
VMA_DQ34
T22
VMA_DQ35
R23
VMA_DQ36
N25
VMA_DQ37
N26
VMA_DQ38
N23
VMA_DQ39
N24
VMA_DQ40
V23
VMA_DQ41
V22
VMA_DQ42
T23
VMA_DQ43
U22
VMA_DQ44
Y24
VMA_DQ45
AA24
VMA_DQ46
Y22
VMA_DQ47
AA23
VMA_DQ48
AD27
VMA_DQ49
AB25
VMA_DQ50
AD26
VMA_DQ51
AC25
VMA_DQ52
AA27
VMA_DQ53
AA26
VMA_DQ54
W26
VMA_DQ55
Y25
VMA_DQ56
R26
VMA_DQ57
T25
VMA_DQ58
N27
VMA_DQ59
R27
VMA_DQ60
V26
VMA_DQ61
V27
VMA_DQ62
W27
VMA_DQ63
W25
VMA_DM0
D19
VMA_DM1
D14
VMA_DM2
C17
VMA_DM3
C22
VMA_DM4
P24
VMA_DM5
W24
VMA_DM6
AA25
VMA_DM7
U25
VMA_WDQS0
E19
VMA_WDQS1
C15
VMA_WDQS2
B16
VMA_WDQS3
B22
VMA_WDQS4
R25
VMA_WDQS5
W23
VMA_WDQS6
AB26
VMA_WDQS7
T26
VMA_RDQS0
F19
VMA_RDQS1
C14
VMA_RDQS2
A16
VMA_RDQS3
A22
VMA_RDQS4
P25
VMA_RDQS5
W22
VMA_RDQS6
AB27
VMA_RDQS7
T27
0223 CQ
Del VMA_RDQS[7:0 ]
GDDR5 NO USE
0324 CQ
Add for DRR3 use VMA_RDQS[7:0 ]
VMA_DQ[63:0]
FBVDDQ + FBVDD = 3.116A
VMA_DM[7:0]
VMA_RDQS[7:0] [23,24]
D23
4
C1060 0.1U/16V_4
C1061 0.1U/16V_4
C1062 1U/6.3V_4
C1065 1U/6.3V_4
C1066 4.7U/6.3V_6
C1063 4.7U/6.3V_6
C1067 10U/6.3V_6
C1064 22U/6.3V_6
[23,24]
[23,24]
VMA_WDQS[7:0]
5
VMA_DQ[63:0]
[23,24]
0305 CQ
NV check GDDR5 is 1.35V setting
0324 CQ
+1.5V_GFX
DDR3 use 1.5V setting
U1001D
B26
C25
E23
E26
F14
F21
G13
G14
G15
G16
G18
G19
G20
G21
H24
H26
J21
K21
L22
L24
L26
M21
N21
R21
T21
V21
W21
bga595-nvidia-n13p- gv2-s-a2
COMMON
if stuff Da,Ra, do
not stuff Ua,Ca,Rb,Rc
For support GC6 2.0
DGPU_PWR_EN[12,48]
DGPU_VC_EN[46,48]
GC6_FB_EN[12,22]
0713 CQ
Change F/P S0402
5
12/14 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FB_CAL_PD_VDDQ
FB_CALTERM_GND
GC6_FB_EN
DGPU_VC_EN
R1023 *0_4
R1024 *0_4/S
FB_CAL_PU_GND
NL17SZ32DFT2G
Rc
0322 CQ
GDDR5 need change to 40.2 ohm
0324 CQ
DDR3 use 42.2 ohm
FB_CAL_PD_VDDQ
D22
FB_CAL_PU_GND
C24
FB_CAL_TERM_GND
B25
0223 CQ
GDDR5 need change to 60.4 ohm
0324 CQ
DDR3 use 51.1 ohm
D1004
*BAT54CW-7-F
Da
Ua
U1003
R1123
*100K/F_4
+3V
C1068
0.1U/16V_4
2
1
3 5
6
DGPU_FB_EN
Ra
Ca
4
Rb
6
R1018 40.2/F_4
+1.5V_GFX
R1019 42.2/F_4
R1020 51.1/F_4
SI 1127 CHANGE TO OR GATE
[47]
R1025
100K/F_4
DGPU_FB_EN
7
U1001F
13/14 GND
A2
GND
AB17
GND
AB20
GND
AB24
GND
AC2
GND
AC22
GND
AC26
GND
AC5
GND
AC8
GND
AD12
GND
AD13
GND
A26
GND
AD15
GND
AD16
GND
AD18
GND
AD19
GND
AD21
GND
AD22
GND
AE11
GND
AE14
GND
AE17
GND
AE20
GND
AB11
GND
AF1
GND
AF11
GND
AF14
GND
AF17
GND
AF20
GND
AF23
GND
AF5
GND
AF8
GND
AG2
GND
AG26
GND
AB14
GND
B1
GND
B11
GND
B14
GND
B17
GND
B20
GND
B23
GND
B27
GND
B5
GND
B8
GND
E11
GND
E14
GND
E17
GND
E2
GND
E20
GND
E22
GND
E25
GND
E5
GND
E8
GND
H2
GND
H23
GND
H25
GND
H5
GND
K11
GND
K13
GND
K15
GND
K17
GND
L10
GND
L12
GND
L14
GND
L16
GND
L18
GND
L2
GND
L23
GND
L25
GND
L5
GND
M11
GND
bga595-nvidia-n13p- gv2-s-a2 COMMON
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
7
20
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
N16x [Memory]
N16x [Memory]
N16x [Memory]
8
+1.05V_GFX[19,21,48]
+3V_GFX[19,21,22,46..48]
+3V_AON[19,22,34,48]
+1.5V_GFX[23,24,47]
+3V[2,4,10..13,15..19,21,25..27,29,30,32,33,35,41,45,46]
1A
1A
1A
of
of
20 49Wednesday, July 20, 2016
20 49Wednesday, July 20, 2016
20 49Wednesday, July 20, 2016
8
Page 21
1
U1001G
4/14 IFPAB
GF117GF119
NC
NC
GF117
GF117
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF119
AA6
IFPAB_RSET
V7
IFPAB_PLLVDD
W7
A A
B B
C C
IFPAB_PLLVDD
W6
IFPA_IOVDD
Y6
IFPB_IOVDD
IFPAB
bga595-nvidia-n13p-gv2-s-a2
U1001H
5/14 IFPC
T6
IFPC_RSET
M7
IFPC_PLLVDD
N7
IFPC_PLLVDD
P6
IFPC_IOVDD
bga595-nvidia-n13p-gv2-s-a2
U1001I
6/14 IFPD
GF119
U6
IFPD_RSET
T7
IFPD_PLLVDD
R7
IFPD_PLLVDD
GF119
IFPD
D D
R6
IFPD_IOVDD
1
GF119
GF117
NC
2
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DVI/HDMI DP
I2CW_SDA
NC
I2CW_SCL
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
2
GF119
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
GPIO14
COMMON
AC4
AC3
Y3
Y4
AA2
AA3
AA1
AB1
AA5
AA4
AB4
AB5
AB2
AB3
AD2
AD3
AD1
AE1
AD5
AD4
B3
IFPC
GF119GF117
IFPC_AUX
IFPC_AUX
GF119
IFPC_L3
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
GPIO15
COMMON
DPDVI/HDMI
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
GPIO17
COMMONbga595-nvidia-n13p-gv2-s-a2
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
Add Lb (0402) for co-lay
I2CX_SDA
I2CX_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
3
U1001J
J7
K7
K6
7/14 IFPEF
GF119
IFPEF_PLLVDD
IFPEF_PLLVDD
IFPEF_RSET
IFPE
GF119
H6
IFPE_IOVDD
J6
IFPF_IOVDD
IFPF
N5
N4
N3
N2
R3
R2
R1
T1
T3
T2
C3
bga595-nvidia-n13p-gv2-s-a2
PLLVDD = 38mA
L1003 *PBY160808T-300Y-N
+1.05V_GFX
L1004
SP_PLLVDD = 17mA
Lb
+1.05V_GFX
HCB1005KF-330T30
C1073 0.1U/16V_4
C1074 22U/6.3VS_6
La
L1005 HCB1005KF-330T30
*HCB1608KF-301T20(300,2A)
L1000
C1076 0.1U/16V_4
C1077 0.1U/16V_4
C1078 10U/6.3V_6
C1079 47U/6.3VS_8
VID_PLLVDD = 41mA
P4
[34]
CLK_27M_XTAL_IN
P3
0301 CQ
R5
R4
Add GCLK XTALIN (CLK_27M_XTAL_IN)
& 0ohm
T5
T4
U4
U3
V4
V3
D4
3
4
GF117
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF117
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
R1028 10K/F_4
R17725*0_4
4
DVI-DL
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_ENC
DVI-DL
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
DVI-SL/HDMI
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_E
GF119
DVI-SL/HDMI
I2CZ_SDA
I2CZ_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_F
GF119
5
DP
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
GPIO18
DP
IFPF_AUX
IFPF_AUX
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
GPIO19
COMMON
J3
J2
J1
K1
K3
K2
M3
M2
M1
N1
C2
H4
H3
J5
J4
K5
K4
L4
L3
M5
M4
F7
6
U1001K
3/14 DACA
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
bga595-nvidia-n13p-gv2-s-a2
GF119
Add La (0402) for co-lay
NV_PLLVDD
U1001M
SP_PLLVDD
XTAL_SSIN
27M_XTAL_IN_R 27M_XTAL_OUT
9/14 XTAL_PLL
L6
PLLVDD
M6
SP_PLLVDD
N6
VID_PLLVDD
A10
XTALSSIN
C11
XTALIN
bga595-nvidia-n13p-gv2-s-a2
GF119
NC
GF117
Y1000
4 1
+1.05V_GFX
23
27MHZ +-10PPM
C1075
12P/50V_4
XTALOUTBUFF
C1080
12P/50V_4
XTALOUT
COMMON
R1032 4.7K_4
C10
BXTALOUT
B10
1223 change cap to 12P
5
6
GF117
NC
TSEN_VREF
NC
DGPU_POK4
2
C1081
*1000P/50V_4
R1029 10K/F_4
GF117
DGPU_PGOK-1
Q1003
METR3904-G
1 3
7
8
21
GF119
NC
NC
DACA_HSYNC
NC
DACA_VSYNC
NC
NC
NC
NC
DACA_RED
DACA_GREEN
DACA_BLUE
7
I2CA_SCL
B7
A7
AE3
AE4
I2CA_SDA
R1026 1.8K_4
R1027 1.8K_4
I2CA_SCL
I2CA_SDA
AG3
AF4
AF3
COMMON
+3V +3V_GFX
R1031
*4.7K_4
R1033
4.7K_4
2
Q1004
DRC5144E0L
C1082
1000P/50V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
1 3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
N16x [Display]
N16x [Display]
N16x [Display]
DGPU_PWROK
R1034
100K/F_4
+1.05V_GFX[19,20,48]
+3V_GFX[19,22,46..48]
+3V_AON[19,22,34,48]
+1.5V_GFX[20,23,24,47]
+3V[2,4,10..13,15..20,25..27,29,30,32,33,35,41,45,46]
21 49Wednesday, July 20, 2016
21 49Wednesday, July 20, 2016
21 49Wednesday, July 20, 2016
of
of
8
[12,35,47]
1A
1A
1A
Page 22
1
+3V_AON
R1044
R1043
*10K/F_4
*10K/F_4
A A
R1052
*45.3K/F_4
R1051
*4.99K/F_4
GPU STRAP
ROM_SO
STRAP0
B B
C C
STRAP1
STRAP2
STRAP3
STRAP4 NU
R1042
*30.1K/F_4
R1050
*15K/F_4
1 2
N16S-GTR/
N16V-GMR1
RVLROM_SI
PD 4.99KΩ
PD 4.99KΩROM_SCLK
PU 49.9KΩ
NU
NU
NU
R1041
*10K/F_4
R1049
*45.3K/F_4
R1040
49.9K/F_4
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R1048
*24.9K/F_4
TP1003
TP1004
TP1005
TP1006
TP1007
TP1008
TP1001
TP1000
2
U1001L
10/14 MISC2
E10
VMON_IN0
F10
VMON_IN1
D1
STRAP0
STRAP0
D2
STRAP1
STRAP1
E4
STRAP2
STRAP2
E3
STRAP3
STRAP3
D3
STRAP4
STRAP4
GF119
C1
R1053 40.2K/F_4
F6
F4
F5
E12
THERM-
F12
THERM+
JTAG_TCK
AE5
JTAG_TMS
AD6
JTAG_TDI
AE6
JTAG_TDO
AF6
JTAG_TRST# GPU_GPIO0
AG4
R1070
10K/F_4
GF117
STRAP5_NC
NC
MULTISTRAP_REF0_GND
GF119
MULTISTRAP_REF1_GND
MULTISTRAP_REF2_GND
bga595-nvidia-n13p-gv2-s-a2 COMMON
U1001N
8/14 MISC1
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
bga595-nvidia-n13p-gv2-s-a2
GF117
NC
NC
GF117
3
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
BUFRST
PGOOD
CEC
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
GF119
I2CB_SCL
NC
I2CB_SDA
NC
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
OVERT
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GF117
GF119
GPIO16
NC
GPIO20
NC
GPIO21
NC
COMMON
ROM_CS
D12
ROM_SI
B12
ROM_SO
A12
ROM_SCLK
C12
0224 CQ
Defult Samsung 256M*32
0x0 PD 4.99K
0324 CQ
DDR3 Defult Hynix 256M*16
D11
0x5 PD 30.1K
D10
SYS_PEX_RST_MON#
E9
R1003 *10K_4
GPUT_CLK_L
D9
GPUT_DATA_L
D8
DGPU_EDIDCLK
A9
DGPU_EDIDDATA
B9
N12E_SCL
C9
N12E_SDA
C8
C6
B2
D6
C7
F9
+3V_MAIN_EN
A3
GPU_EVENT#_GPU
A4
B6
VGA_OVT#
A6
F8
R1065 10K/F_4
ALERT
C5
E7
PWR_LEVEL
D7
B4
PSI
GPU_GPIO16
D5
E6
GPU_PEX_RST_HOLD#
C4
PU
TP1002
R1056 1.8K_4
R1058 1.8K_4
R1059 1.8K_4
R1060 1.8K_4
R1061 *0_4/S
R1068 10K/F_4
TP1009
ROM_SI
ROM_SO
ROM_SCLK
SYS_PEX_RST_MON#
+3V_MAIN_EN [46,48]
R1037
*10K/F_4
R1045
30.1K/F_4
+3V_AON
0713 CQ
Change F/P S0402
+3V_AON
[19]
R1038
*4.99K/F_4
R1046
4.99K/F_4
4
+3V_GFX
R1057 4.7K_4
R1055 4.7K_4
R1064
100K/F_4
+3V_AON
R1062
10K/F_4
R1039
SIZE
*4.99K/F_4
128Mx16
R1047
256Mx16
4.99K/F_4
Q1005B
GPUT_CLK_L
GPUT_DATA_L
2N7002KDW
2
5
Q1005A
2N7002KDW
R1069 10K/F_4
0224 CQ
DG define 100K
+3V_AON
R1067
10K/F_4
GPU_EVENT#
2 1
D1001 MEK500V-40
0317 CQ
GPIO 10 add Ner contact to GDDR5 GPIO10_VREF
Add PD 100K (R17752)
0324 CQ
R1066
R1063
Del GPIO10_VREF & R17752
10K/F_4
10K/F_4
2 1
D1002 MEK500V-40
5
Vendor Mfr. P/N
Quanta P/N
Samsung
AKD5MGST511
AKD5MZDTW04
AKD5PGDT502
AKD5PZDTW00
[12]
1
K4W2G1646Q-BC1A
H5TC2G63FFR-11C
H5TC4G63CFR-N0C
[35]
GPUT_CLK
[35]
GPUT_DATA
GC6_FB_EN
2
3
Q1006
2N7002K
Hynix
Samsung K4W4G16 46E-BC1A
Hynix
Dual
GPUT_CLK
61
Dual
GPUT_DATA
34
GPU_EVENT#
0x8 PU 4.99K
0x6 PD 34.8K
0x4 PD 24.9K
0x5 PD 30.1K
4.99k CS24992FB26
10k CS31002FB26
15k CS31502FB24
20k CS32002FB29
24.9k CS32492FB16
30.1k CS33012FB18
34.8k CS33482FB06
45.3k CS34532FB18
GC6_FB_EN [12,20]
[19]
PEGX_RST#
DGPU_OVT# [35]
GPU_VID [46]
DGPU_PROCHOT_EC#
PSI [46]
GPU_PEX_RST_HOLD# [19]
6
7
8
22
[35,46]
+3V_GFX [19,21,46..48]
D D
+3V_AON [19,34,48]
+1.5V_GFX [20,23,24,47]
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
N16x [GPIO/Straps]
N16x [GPIO/Straps]
N16x [GPIO/Straps]
Date: Sheet
Date: Sheet
1
2
3
4
5
6
7
Date: Sheet
8
1A
1A
1A
of
of
of
22 49Wednesday, July 20, 2016
22 49Wednesday, July 20, 2016
22 49Wednesday, July 20, 2016
Page 23
5
VREFC_VMA1
VREFD_VMA1
FBA_CMD9[20,24]
FBA_CMD11[20,24]
FBA_CMD8[20,24]
FBA_CMD25[20,24]
FBA_CMD10[20,24]
FBA_CMD24[20,24]
FBA_CMD22[20,24]
FBA_CMD7[20,24]
D D
C C
B B
FBA_CMD21[20,24]
FBA_CMD6[20,24]
FBA_CMD29[20,24]
FBA_CMD23[20,24]
FBA_CMD28[20,24]
FBA_CMD20[20,24]
FBA_CMD4[20,24]
FBA_CMD14[20,24]
FBA_CMD12[20,24]
FBA_CMD27[20,24]
FBA_CMD26[20,24]
VMA_CLK0[20]
VMA_CLK0#[20]
FBA_CMD3[20]
FBA_CMD2[20]
FBA_CMD0[20]
FBA_CMD30[20,24]
FBA_CMD15[20,24]
FBA_CMD13[20,24]
VMA_WDQS1[20]
VMA_RDQS1[20]
VMA_DM1[20]
VMA_DM2[20]
VMA_WDQS2[20]
VMA_RDQS2[20]
FBA_CMD5[20,24]
GND
FBA_CMD1[20]
GND
stuff R1124 for
Hynix 8Gb DDP VRAM
R1072243_4
R1124243_4
FBA_ZQ0
FBA_CMD2
FBA_CMD1
FBA_CMD3
FBA_ZQ2
U1004
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
VDD#D9
VDD#G7
BA2
VDD#N1
CK
VDD#N9
CK
VDD#R1
CKE
VDD#R9
VDDQ#A1
ODT
CS
VDDQ#A8
RAS
VDDQ#C1
CAS
VDDQ#C9
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
DQSL
VDDQ#H2
DQSL
VDDQ#H9
DML
DMU
DQSU
DQSU
VSS#M1
VSS#M9
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
NC#J1
VSSQ#E8
NC#L1
VSSQ#F9
NC#J9
VSSQ#G1
VSSQ#G9
NC#L9
96-BALL
SDRAM DDR3
VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#K2
VDD#K8
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#P1
VSS#P9
VSS#T1
VSS#T9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
reserve for Hynix 8Gb DDP VRAM
4
+1.5V_GFX
+1.5V_GFX
VMA_DQ11 [20]
VMA_DQ14 [20]
VMA_DQ8 [20]
VMA_DQ13 [20]
VMA_DQ10 [20]
VMA_DQ12 [20]
VMA_DQ9 [20]
VMA_DQ15 [20]
VMA_DQ17 [20]
VMA_DQ21 [20]
VMA_DQ18 [20]
VMA_DQ22 [20]
VMA_DQ19 [20]
VMA_DQ23 [20]
VMA_DQ16 [20]
VMA_DQ20 [20]
C10844.7U/6.3V_6
C10850.1U/16V_4
C10860.1U/16V_4
C10904.7U/6.3V_6
C10910.1U/16V_4
C10920.1U/16V_4
GND
GND
3
Rank0
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
VMA_CLK0
VMA_CLK0#
+1.5V_GFX +1.5V_GFX
R1073
1.33K/F_4
VREFC_VMA1 VREFD_VMA1
R1076
1.33K/F_4
C1096
0.01U/50V_4
R1071
162_4
R1074
1.33K/F_4
R1077
1.33K/F_4
C1097
0.01U/50V_4
VMA_WDQS0[20]
VMA_RDQS0[20]
VMA_DM0[20]
VMA_DM3[20]
VMA_WDQS3[20]
VMA_RDQS3[20]
GND
GND
stuff R1125 for
Hynix 8Gb DDP VRAM
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
FBA_CMD5
R1075243_4
R1125243_4
2
VREFC_VMA1
VREFD_VMA1
FBA_ZQ1
FBA_CMD2
FBA_CMD1
FBA_CMD3
FBA_ZQ3
U1005
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
1
18
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ1 [20]
VMA_DQ4 [20]
VMA_DQ3 [20]
VMA_DQ6 [20]
VMA_DQ0 [20]
VMA_DQ7 [20]
VMA_DQ2 [20]
VMA_DQ5 [20]
VMA_DQ25 [20]
VMA_DQ28 [20]
VMA_DQ24 [20]
VMA_DQ29 [20]
VMA_DQ26 [20]
VMA_DQ30 [20]
VMA_DQ27 [20]
VMA_DQ31 [20]
C10874.7U/6.3V_6
C10880.1U/16V_4
C10890.1U/16V_4
C10934.7U/6.3V_6
C10940.1U/16V_4
C10950.1U/16V_4
GND
GND
+1.5V_GFX
C1098 10U/6.3V_6
C1099 10U/6.3V_6
+1.5V_GFX
C1103 1U/6.3V_4
C1106 1U/6.3V_4
C1108 1U/6.3V_4
C1111 1U/6.3V_4
A A
5
4
+1.5V_GFX
C1104 1U/6.3V_4
C1107 1U/6.3V_4
C1109 1U/6.3V_4
C1112 1U/6.3V_4
3
C1100 10U/6.3V_6
C1101 0.1U/16V_4
C1102 0.1U/16V_4
C1105 0.1U/16V_4
C1110 0.1U/16V_4
C1113 0.1U/16V_4
C1114 0.1U/16V_4
+1.5V_GFX[20,24,47]
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
VRAM1 DDR3 - RANK0
VRAM1 DDR3 - RANK0
VRAM1 DDR3 - RANK0
Date: Sheet
Date: Sheet
2
Date: Sheet of
1
23 49Wednesday, July 20, 2016
23 49Wednesday, July 20, 2016
23 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 24
5
VREFC_VMA3
VREFD_VMA3
FBA_CMD9[20,23]
FBA_CMD11[20,23]
FBA_CMD8[20,23]
FBA_CMD25[20,23]
FBA_CMD10[20,23]
FBA_CMD24[20,23]
D D
C C
B B
FBA_CMD22[20,23]
FBA_CMD7[20,23]
FBA_CMD21[20,23]
FBA_CMD6[20,23]
FBA_CMD29[20,23]
FBA_CMD23[20,23]
FBA_CMD28[20,23]
FBA_CMD20[20,23]
FBA_CMD4[20,23]
FBA_CMD14[20,23]
FBA_CMD12[20,23]
FBA_CMD27[20,23]
FBA_CMD26[20,23]
VMA_CLK1[20]
VMA_CLK1#[20]
FBA_CMD19[20]
FBA_CMD18[20]
FBA_CMD16[20]
FBA_CMD30[20,23]
FBA_CMD15[20,23]
FBA_CMD13[20,23]
VMA_WDQS5[20]
VMA_RDQS5[20]
VMA_DM5[20]
VMA_DM7[20]
VMA_WDQS7[20]
VMA_RDQS7[20]
FBA_CMD5[20,23]
GND
FBA_CMD17[20]
GND
stuff R1124 for
Hynix 8Gb DDP VRAM
R1079243_4
R1126243_4
FBA_ZQ4
FBA_CMD18
FBA_CMD17
FBA_CMD19
FBA_ZQ6
U1006
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
4
+1.5V_GFX
+1.5V_GFX
VMA_DQ41 [20]
VMA_DQ47 [20]
VMA_DQ42 [20]
VMA_DQ45 [20]
VMA_DQ40 [20]
VMA_DQ46 [20]
VMA_DQ43 [20]
VMA_DQ44 [20]
VMA_DQ60 [20]
VMA_DQ59 [20]
VMA_DQ63 [20]
VMA_DQ58 [20]
VMA_DQ61 [20]
VMA_DQ56 [20]
VMA_DQ62 [20]
VMA_DQ57 [20]
C11154.7U/6.3V_6
C11160.1U/16V_4
C11170.1U/16V_4
C11214.7U/6.3V_6
C11220.1U/16V_4
C11230.1U/16V_4
3
2
Rank0
1114SWAP 1114SWAP
1114SWAP
GND
GND
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
VMA_CLK1
VMA_CLK1#
+1.5V_GFX +1.5V_GFX
R1081
1.33K/F_4
VREFC_VMA3 VREFD_VMA3
R1083
1.33K/F_4
C1127
0.01U/50V_4
R1078
162_4
R1082
1.33K/F_4
R1084
1.33K/F_4
C1128
0.01U/50V_4
VMA_WDQS4[20]
VMA_RDQS4[20]
VMA_DM4[20]
VMA_DM6[20]
VMA_WDQS6[20]
VMA_RDQS6[20]
GND
GND
stuff R1124 for
Hynix 8Gb DDP VRAM
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
FBA_CMD5
FBA_ZQ5
R1080243_4
FBA_CMD18
FBA_CMD17
FBA_CMD19
FBA_ZQ7
R1127243_4
U1007
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
G3
E7
D3
C7
B7
T2
L8
J1
L1
J9
L9
VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
1
VMA_DQ34 [20]
VMA_DQ37 [20]
VMA_DQ33 [20]
VMA_DQ39 [20]
VMA_DQ32 [20]
VMA_DQ38 [20]
VMA_DQ35 [20]
VMA_DQ36 [20]
VMA_DQ54 [20]
VMA_DQ49 [20]
VMA_DQ55 [20]
VMA_DQ48 [20]
VMA_DQ52 [20]
VMA_DQ50 [20]
VMA_DQ53 [20]
VMA_DQ51 [20]
1114SWAP
+1.5V_GFX
C11184.7U/6.3V_6
C11190.1U/16V_4
C11200.1U/16V_4
GND
+1.5V_GFX
C11244.7U/6.3V_6
C11250.1U/16V_4
C11260.1U/16V_4
GND
20
+1.5V_GFX
C1129 10U/6.3V_6
C1130 10U/6.3V_6
+1.5V_GFX
C1134 1U/6.3V_4 C1135 1U/6.3V_4
C1137 1U/6.3V_4
C1139 1U/6.3V_4
C1142 1U/6.3V_4
A A
+1.5V_GFX[20,23,47]
5
4
3
+1.5V_GFX
C1138 1U/6.3V_4
C1140 1U/6.3V_4
C1143 1U/6.3V_4
2
C1131 10U/6.3V_6
C1132 0.1U/16V_4
C1133 0.1U/16V_4
C1136 0.1U/16V_4
C1141 0.1U/16V_4
C1144 0.1U/16V_4
C1145 0.1U/16V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
VRAM2 DDR3 - RANK0
VRAM2 DDR3 - RANK0
VRAM2 DDR3 - RANK0
Date: Sheet of
Date: Sheet
Date: Sheet
1
of
of
24 49Wednesday, July 20, 2016
24 49Wednesday, July 20, 2016
24 49Wednesday, July 20, 2016
1A
1A
1A
Page 25
1
2
3
4
5
6
7
8
25
0219 CQ
Re-draw & Compare OK
A A
+3V
60mil
C7028
1U/6.3V_4
PCH_DISP_ON[2]
B B
0226 CQ
Del +3V & +5V change +3V_TS & +5V_TS
C C
+3V
R7011 *1K_4
R7012 *1K_4
PCH_DPST_PWM
PCH_EDP_BLON
R7016
100K/F_4
[27]
[27]
PCH_DPST_PWM[2]
0409 CQ
Chagne P/N AL005245000 (RDC suggest)
U7000
INT_eDP_AUXP[2]
INT_eDP_AUXN[2]
INT_eDP_TXN0[2]
INT_eDP_TXP0[2]
INT_eDP_TXN1[2]
INT_eDP_TXP1[2]
ULT_EDP_HPD[2]
[12]
USBP3-
[12]
USBP3+
DIGITAL_CLK
DIGITAL_D1
5
IN
4
IN
3
ON/OFF
IC OTHER(5P) G5245AT11U
+3V
OUT
GND
R7006 *0_4/S
USBP3USBP3+
0307 CQ
Filter
0401 CQ
Mirror vertically L7523 (Jason suggest)
PCH_DPST_PWM
1
+3VLCD
2
C7027 0.1U/16V_4
C7026 0.1U/16V_4
C7017 0.1U/16V_4
C7016 0.1U/16V_4
C7019 0.1U/16V_4
C7018 0.1U/16V_4
R7009 *0_4/S
L7523
1
4 3
MCM2012B900GBE
L7002 FCM1005KF-301T03
L7003 FCM1005KF-301T03
R7008
C7021 33P/50V_4
R7010 100K/F_4
L7004
TI160808U600
USBP3-_C
2
USBP3+_C
1K/F_4
INT_eDP_AUXP_C
INT_eDP_AUXN_C
INT_eDP_TXN0_C
INT_eDP_TXP0_C
INT_eDP_TXN1_C
INT_eDP_TXP1_C
0713 CQ
Change F/P S0402
60mil
C7029
0.01U/50V_4
2 1
VADJ1
+3VLCD_CON
C7030
0.1U/16V_4
2 1
C7000
*0.01U/50V_4
C7007
*10P/50V_4
C7031
10U/6.3V_6
2 1
+3V_CAM
C7022
*4.7U/6.3V_6
C7008
*10P/50V_4
60mil
C7003
0.047U/25V_4
1 2
0226 CQ
Del pin 14,15,16 TS circuit
1 2
+VIN_BLIGHT
C7002
0.047U/25V_4
INT_eDP_AUXP_C
INT_eDP_AUXN_C
INT_eDP_TXN0_C
INT_eDP_TXP0_C
INT_eDP_TXN1_C
INT_eDP_TXP1_C
ULT_EDP_HPD_R
+3V_CAM
USBP3-_C
USBP3+_C
DIGITAL_CLK_L
DIGITAL_D1_L
VADJ1
BLON_CON
30mil
eDP Conn.
CN7000
LCD connector 30p
DFFC30FR150
51519-0300t-v01-30p-l
0706 CQ
PN change DFFC30FR150 (GF) , FP keep
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
31 32
EMU_LID[35]
LID Switch
D D
1
2
PCH_EDP_BLON[2]
+VIN
3
R7001 *0_4/S
R7003 1K/F_4
R7005 100K/F_4
L7000 *0_6/S
C7010
0.1U/25V_4
PN_BLON BLON_CON
500mA
4
D7000 MEK500V-40
+VIN_BLIGHT
R7002
100K/F_4
5
C7001
22P/50V_4
+3V_CAM
+3VS5[4,10,15,16,27,31,32,35,37..40,44,45,48]
+5VS5[4,26,32,37..43,45..48]
+3VPCU[6,13,29,31,34..37,44]
C7005 0.1U/25V_4
C7006 0.01U/50V_4
C7014 4.7U/25V_6
EC7000 *12P/50V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
+3V[2,4,10..13,15..21,26,27,29,30,32,33,35,41,45,46]
+5V[26,27,29,45]
+VIN[36..39,41..44,46,47,49]
6
7
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
eDP
eDP
eDP
of
of
25 49Wednesday, July 20, 2016
25 49Wednesday, July 20, 2016
25 49Wednesday, July 20, 2016
8
1A
1A
1A
Page 26
1
0301 CQ
Del HDMI 2.0 circuit , Change to HDMI 1.4
Use TWL circuit
0305 CQ
Del TWL HDMI circuit , change to G31 circuit
A A
B B
2
C_TX1_HDMI+
C_TX1_HDMI- C_TX1_HDMI-
C_TXC_HDMI+
C_TXC_HDMI- C_TXC_HDMI-
*AZ1043-04F.R7G
C_TX2_HDMI+
C_TX2_HDMI- C_TX2_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
*AZ1043-04F.R7G
HDMI SMBus Isolation
R7707
+3V
SDVO_CLK[2]
SDVO_DATA[2]
2.2K_4
R7715
+3V
2.2K_4
U8502
1
IN1
2
IN2
3
GND
4
IN3
5
IN4
11/23 Reserve ESD chip
U8503
1
IN1
2
IN2
3
GND
4
IN3
5
IN4
HDMI_HPD_CON[2]
Q7702
4 3
1
2N7002KDW
+3V
5
2
6
3
NC
NC
GND
NC
NC
NC
NC
GND
NC
NC
HDMI_SCLK
HDMI_SDATA
C_TX1_HDMI+
10
9
8
C_TXC_HDMI+
7
6
C_TX2_HDMI+
10
9
8
C_TX0_HDMI+
7
C_TX0_HDMI-
6
+3V
R7701
1M_4
2
HDMI_HPD
1
Q7701
2N7002K
3
Close to HDMI connector
2N7002K
+3V
1 2
R7713 100K/F_4
C7713 0.1U/16V_4
Close to Q33
4
C_TX2_HDMI+
C_TX1_HDMI+
C_TX0_HDMI+
C_TXC_HDMI+
0106 EMI Solution 120
R7702 20K/F_4
DGPU_CL_HDMIP
3
Q7703
2
1
EMI Solution
R7766 120/F_4
R7763 120/F_4
R7764 120/F_4
R7765 120/F_4
+5V_HDMIC
R7705 470/F_4
R7706 470/F_4
R7708 470/F_4
R7709 470/F_4
R7710 470/F_4
R7711 470/F_4
R7712 470/F_4
R7714 470/F_4
C_TX2_HDMI+
C_TX2_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
C_TXC_HDMI+
C_TXC_HDMI-
5
C_TX2_HDMIC_TX1_HDMIC_TX0_HDMIC_TXC_HDMI-
D7700 BAT54AW-L
2
3
1
5V_HSMBCK
R7703 2.2K_4
5V_HSMBDT
SSM14 spec is 40V 1A
30 mils
+5V
IN_D0[2]
IN_D0#[2]
IN_D1[2]
IN_D1#[2]
IN_D2[2]
IN_D2#[2]
IN_CLK[2]
IN_CLK#[2]
F7700 FUSE1A6V_POLY
V7700
*TVM0G5R5M220R
6
IN_D0
IN_D0#
IN_D1
IN_D1#
IN_D2
IN_D2#
IN_CLK
IN_CLK#
0714 CQ
Change 0 ohm to 220 ohm
C7710
C7709
*10P/50V_4
*10P/50V_4
H=1.4mm(Max)
12
C7701 0.1U/16V_4
C7702 0.1U/16V_4
C7703 0.1U/16V_4
C7704 0.1U/16V_4
C7705 0.1U/16V_4
C7706 0.1U/16V_4
C7707 0.1U/16V_4
C7708 0.1U/16V_4
HDMI_SCLK
HDMI_SDATA
C7711
0.1U/16V_4
C_TX0_HDMI+
C_TX0_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX2_HDMI+
C_TX2_HDMI-
C_TXC_HDMI+
C_TXC_HDMI-
R17752 220_4
R17753 220_4R7704 2.2K_4
1
2
C8631 AZ5315-02F.R7GR
3
0714 CQ
C8631
HDMI_HPD
VC7701
*TVM0G5R5M220R
7
C_TX2_HDMI+
C_TX2_HDMI-
C_TX1_HDMI+
C_TX1_HDMI-
C_TX0_HDMI+
C_TX0_HDMI-
C_TXC_HDMI+
C_TXC_HDMI-
HDMI_SCLK_C
HDMI_SDATA_C
+5V_HDMIC
[27,29,45]
C7712
220P/50V_4
0308 CQ
+5V
[4,32,37..43,45..48]
+5VS5
CN7700
20
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
8
9
10
11
12
13
14
15
16
17
18
19
hdmi-2he1748-000211f-19p
DFHD19MR449
23
D0+
SHELL2
D0 Shield
D0CK+
CK Shield
22
CK-
SHELL2
CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
21
SHELL2
HDMI CONN
0706 CQ
PN change DFHD19MR449 (GF) , FP keep
net name , HDMI_DET_C
8
26
0305 CQ
C7508
1U/6.3V_4
79
4
6
5
100 mils (Iout=2.5A)
U7501
2
VIN1
OUT3
3
VIN2
OUT2
4
EN
OUT1
1
GND
OC
BD82047FVJ-GE2(MSOP)
Active Low
[12]
USBP2-
[12]
USBP2+
[12]
USB30_RX2-
[12]
USB30_RX2+
[12]
USB30_TX2-
[12]
USB30_TX2+
USB 3.0
1
2
3
4
5
6
7
8
9
8
7
6
5
0706 CQ
USB3 PN change DFHS09FR707 (GF) , FP keep
CN30
USB3.0 CONN
DFHS09FR707
ub3-tcra2-9u6391-9p
VBUS
1
D-
2
D+
3
4
GND
SSRX-
5
6
SSRX+
7
GND
8
SSTXSSTX+
9
11111010131312
12
USBPW_ON#[26,35]
C8513
C8512
22U/6.3V_6
22U/6.3V_6
L7502
1
2
4 3
MCM2012B900GBE
C7526 0.1U/16V_4
C7525 0.1U/16V_4
0330 CQ
Fix USB2 FP usb-usb-04hjab-4p
PN DFHS04FR693
USBP6+[12]
USBP6-[12]
0509 CQ
Swap + & - , Pin define error
C8628 4.7U/6.3V_6
C8629 100P/50V_4
C8514
C8516
*22U/6.3V_6
*22U/6.3V_6
0524 CQ
L7502 mirror Vertically(layout request)
USBP2-_C
USBP2+_C
USB30_TX2-_C
USB30_TX2+_C
0412 CQ
SWAP
U8509
2
VIN1
3
VIN2
4
EN
1
GND
BD82047FVJ-GE2(MSOP)
+5V_USBP2+5VS5 +5V_USBP2
C8515
C8517
*22U/6.3V_6
*22U/6.3V_6
D7904
2
10
1
4 3
1
2
L7524 MCM2012B900GBE
+5V_USBP3+5VS5
8
OUT3
7
OUT2
6
OUT1
5
OC
0409 CQ
U7501
*SP3010-04UTG
3
C8625
*470P/50V/04
(OC : 3.2A)
C7524
0.1U/16V_4
Follow TWL USB Charger IC circuit
0305 CQ
Need check EC pin
USB_CHARGER_ON[35]
MAINON[35,38,40,45]
EC_USB_CTRL2[35]
EC_USB_CTRL3[35]
[12]
USBP1-
[12]
USBP1+
C C
D D
0713 CQ
Change F/P S0402
R359 *0_4/S
EC_USB_CTRL2
EC_USB_CTRL3
R365
*10K/F_4
U16
5
EN
6
CTL1
7
CTL2
8
CTL3
11
DM_IN
10
DP_IN
2
DM_OUT
3
DP_OUT
TPS2546
High Active
IC current limit is 2A
Ios = 48000/RILIM0
USBP1-_CHA
USBP1+_CHA
USB30_RX1-[12]
USB30_RX1+[12]
USB30_TX1-[12]
USB30_TX1+[12]
C586 0.1U/16V_4
C581 0.1U/16V_4
1
IN
12
OUT
14
GND
9
/STATUS
17
PADGND
16
ILIM_HI
15
ILIMI_LO
4
ILIM_SEL
13
/FAULT
L24 MCM2012B900GBE
4 3
1
2
R381 0_4
R380 0_4
USB3_1-
R369 0_4
USB3_1+
R366 0_4
0307 CQ
+5VS5+5VS5
R345
R375
10K/F_4
10K/F_4
R358
R378
80.6K/F_4
*0_4
0525 CQ
L24 mirror Vertically(layout request)
Short pad
1
C8607 *AZ5315-02F.R7GR
0312 CQ
0525 CQ
C8607 pin net swap (layout request)
3
USB net EDS part
C595 4.7U/6.3V_6
C549 0.1U/16V_4
R364
22K/F_4
2
USBPW_ON#[26,35]
VC7500
*AVLC5S_4
+5V_USBP1
C543 150U/6.3V(H1.9)
C542 *150U/6.3V(H1.9)
C559 470P/50V_4
+
0523 CQ
Change USB singel ESD part to SP3010-04UTG
Del C8608,C8609,C8524,C8525 , Add D7904,D7905
0524 CQ
Change D7904,D7905 netlayout request
D7905 swap pin net 5.6pin to R369 , 4.7pin to R366 (layout request)
80 mils (Iout=2A)
12
12
+
C548 0.1U/16V_4
C547 470P/50V_4
VC4 *AVLC 5S_4
C560 1000P/50V_4
+5V_USBP1
USBP1-_C
USBP1+_C
USB30_RX1-_C
USB30_RX1+_C
USB30_TX1-_C
D7905
2
10
1
USB30_TX1+_C
*SP3010-04UTG
3
0318 CQ
Add USB2.0 circuit
1
2
3
4
5
6
7
USB 2.0/3.0 Combo
2A
C7527
C7523
470P/50V_4
79
4
6
5
1
2
C8630 *AZ5315-02F.R7GR
3
+5V_USBP3
C8624
C8627
0.1U/10V_4
1000P/50V_4
0413 CQ
C8624,C8626 change PN CH4103K1B08 RDC suggest)
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet of
VC7504
1000P/50V_4
*AVLC5S_4
1
2
C8522 *AZ5315-02F.R7GR
3
11/23 Reserve ESD chip
0524 CQ
C8255 pin net swap (layout request)
0305 CQ
USB3 cricuit Change Page 28 to 26
USBP6+_C
USBP6-_C
0701 CQ
BOT
DFHS04FR506 & usb-uarc6-4k1926-4p-r
12
+
C8623
C8626
150U 6.3V(+-20%,3528,H1.9)
0.1U/10V_4
0706 CQ
Change C8623 CH7151M8601 , FP cc3528-2h
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
HDMI / USB3 / USB2
HDMI / USB3 / USB2
HDMI / USB3 / USB2
USB 3.0
CN7502
USB3.0 CONN
DFHS09FR707
ub3-tcra2-9u6391-9p
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
CN7708
44GND
3
3
GND
2
2
GND
1
1
GND
USB CONN
usb-uarc6-4k1926-4p-r
DFHS04FR506
26 49Wednesday, July 20, 2016
26 49Wednesday, July 20, 2016
26 49Wednesday, July 20, 2016
8
VBUS
DD+
GND
SSRX-
SSRX+
GND
SSTXSSTX+
12
5
6
7
8
11111010131312
1A
1A
1A
of
of
Page 27
A
B
C
D
E
+5V_AVDD +5V
C766
C763
*0.1U/16V_4
*2.2U/6.3V_6
C795
0.1U/16V_4
+3V_DVDD
L36 HCB1005KF-181T15_4
+3V
C791
1U/6.3V_4
C796
10U/6.3VS_6
Close to PIN1
0713 CQ
Change F/P S0402
DIGITAL_D1
TO Digital MIC
20150209A-Change POWER
from +1.5V to +3V.
+5V_AVDD
R580
10K_4
C767 0.1U/16V_4
3
ACZ_SPKR[11,14]
1 1
2
Q29
2N7002K
1
AGND
[25]
ACZ_SDOUT_AUDIO[14]
BIT_CLK_AUDIO[14]
[14]
L34 *HCB1005KF-181T15_4
+1.5V
L35 HCB1005KF-181T15_4
+3V
ACZ_SYNC_AUDIO[14]
ACZ_RST#_AUDIO[14]
AMP_BEEP_R2
R576 10K/F_4
DIGITAL_CLK[25]
ACZ_SDIN0
INT. Speaker
CN7705
INT SPEAKER CONN
DFHD04MR211
50281-00401-001-4p-l
L_SPK+_R
1
L_SPK-_R
2
R_SPK-_R
3
R_SPK+_R
4
30mil 40mil
+1.5V
+1.5V_AUDIO
+1.5V_AVDD
+3V
+3V_DVDD
+3V_DVDD-IO
+3VS5
+5V
+5V_AVDD
+5V_DVDD
+5VS5
FOR EMI
ACZ_SDIN0
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
BIT_CLK_AUDIO
+1.5V
+1.5V_AUDIO
+1.5V_AVDD
[2,4,10..13,15..21,25,26,29,30,32,33,35,41,45,46]
+3V
+3V_DVDD
+3V_DVDD-IO
[4,10,15,16,31,32,35,37..40,44,45,48]
+3VS5
[26,29,45]
+5V
+5V_AVDD
+5V_DVDD
[4,26,32,37..43,45..48]
+5VS5
A
0330 CQ
PN DFHD04MR211
與FAN共用
EC75 *33P/50V_4
EC78 *10P/50V_4
EC74 *10P/50V_4
EC76 *33P/50V_4
C792 10P/50V_4
R593 *0_4/S
R592 100/F_4
C788 10P/50V_4
R591 *0_4/S
R587 33_4
+3V_DVDD-IO
C780
0.1U/16V_4
R579
C773
2K/F_4
0.1U/16V_4
AGND
Close to Pin 34,35,36
C603 1000P/50V_4
C602 1000P/50V_4
C604 1000P/50V_4
Digital power for HDA link.
(Digital VCC (3.3V or 1.5V)
C782
10U/6.3VS_6
C777
*0.1U/16V_4
AMP_BEEP_L
+3V_DVDD
Close to Speaker
L28 PBY160808T-600Y-N
L27 PBY160808T-600Y-N
L26 PBY160808T-600Y-N
L25 PBY160808T-600Y-N
C605 1000P/50V_4
Speaker
P/N : DN003009000 ( 4Ω , Normal 1.5W, Max 2W )
8Ω , 10mil < Trace Width < 20mil.
4Ω , 20mil < Trace Width < 40mil.
Make the trace length/ Speaker wire length of
SPKL+/L-/R+/R- be the same as possible as you can.
+5V
C774 0.1U/16V_4
C787
1U/6.3V_4
C789
4.7U/6.3V_6
L37 HCB1005KF-181T15_4
ACZ_SDOUT_AUDIO
C785 10U/6.3VS_6
Close to PIN7
ACZ_SYNC_AUDIO
AMP_BEEP
C790 1U/6.3V_4
+5V_DVDD
15~20mil3.3Vx0.51mA
Class-D power supply
for intel HSW ULT
Q7
BA039040000
BA039040020
ACZ_RST#_AUDIO
VOLMUTE#[35]
0413 CQ
Change PN BCEK500VZ00 (RDC suggest)
B
+1.5V
R594
*2.2K_4
2
Q30
*METR3904-G
1 3
21
D12 MEK500V-40
20mil3.3Vx0.51mA
DMIC0
DMIC_CLK_R
HD_BCLK
HD_SDIN0
CAPCAP+
+3V_DVDD
20mil3.3Vx0.0012mA
L_SPK+
L_SPKR_SPKR_SPK+
+5V_DVDD
C800 0.1U/16V_4
C798 10U/6.3VS_6
Close to Pin 41
C801 0.1U/16V_4
C797 10U/6.3VS_6
Close to Pin 46
1
2
3
4
5
6
7
8
9
10
11
12
34
35
37
36
42
43
44
45
25mil
25mil
+3V_DVDD
U29
ALC255-CG
DVDD
D0@3.3Vx0.51mW
GPIO0/ DMIC-DATA
GPIO1 / DMIC-CLK
DVSS
SDATA-OUT
BCLK
LDO3-CAP
SDATA-IN
DVDD-IO
D0@1.5Vx0.005mW
SYNC
RESETB
PCBEEP
CPVEE
CBN
CBP
CPVDD
D0@3.3Vx0.0012mW
D0@5Vx0.0012mW
SPK-L+
SPK-LSPK-RSPK-R+
PVDD1
NC
41
49
5Vx0.001mA
R595
*1K/F_4
PD#
R597
*10K_4
PVDD246SPDIF-OUT/GPIO2
>40mils trace
AVDD1
AVDD2
AVSS1
AVSS2
LDO1-CAP
LDO2-CAP
VREF
Analog
HPOUT-L
HPOUT-R
LINE2-L
LINE2-R
LINE1-L
LINE1-R
VD33 STB
MIC CAP
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-R (PORTF)
MIC2-L (PORTF)
MIC2-VREFO
MONO-OUT
JD1
JD2
13
15
14
SENSE_A_1
COMBO_GPI
0413 CQ
Use 1.5V circuit (power
+3VS5
C758
2.2U/6.3V_4
+3V
Digital
PDB
47
D0@5Vx4.81mW
D0@1.5Vx13.42mW
48
C
JD3/GPIO3
2013/07/05 Reserve for 1.5V power supply
AGND
Close to PIN26
C775
10U/6.3VS_6
8~20mil5Vx4.81mA
26
40
25
38
27
39
28
32
33
24
23
22
21
20
19
31
30
18
17
29
16
8mil
1.5Vx13.42mA
AGND
C783 0.1U/16V_4
C784 2.2U/10V_6
HPOUT_L
HPOUT_R
0409 CQ
Chagne P/N CH5222K1906 (RDC suggest)
C768 *4.7U/6.3V_6
C769 *4.7U/6.3V_6
C770 10U/6.3VS_6
R588 *4.7K_4
R590 *4.7K_4
MIC_R1
MIC_L1
VREFOUT_C
0720 CQ
Change C768,C769,R588,R590 non-stuff
+3V
0309 CQ
Del Pin 30 MUTE_LED_CNTL
Del Pin 15 R637 20K
R581
100K/F_4
R582 200K_4
R583 *39.2K/F_4
R596 *22K/F_4
C799
*10U/6.3V_6
AGND
U28
1
VIN
2
GND
ON/OFF3NC
G9090-150T11U
C776
0.1U/16V_4
AGND
+1.5V_AVDD
AGND
R586 100K_4
C781 10U/6.3VS_6
C793 10U/6.3VS_6
Close to PIN28
+3VS5
C771 0_6
C772 *2.2U/6.3V_6
R578 *0_4/S
Close to codec
1.5V)
20mil
5
VOUT
4
C757
*0.1U/16V_4
L33 HCB1005KF-181T15_4
L38 HCB1005KF-181T15_4
C794
10U/6.3VS_6
AGND
AGND
C601
*1U/6.3V_4
DGNDAGND
0309 CQ
New add
20150713A-PV-R for
record issue.
R577 *0_4/S
AGND
R589 2.2K_4
C786
*1U/6.3V_4
AGND
SENSE_A
EXT_MIC_L
GND
C765
*1U/6.3V_4
U17
*TPS793475DBVR
5
1
Vout
Vin
4
BYP
3
GND2EN
HPA01091DBVR
Close to PIN40
AGND
Close to PIN27 & 39
AGND SHIELD
AGND SHIELD
AGND SHIELD
R379
*10K_4
Vset=1.242V
20150604A-R379 change to NU.
+5V
12
C764
*AZ2015-01H
20150216AAVDD2 must connect with +1.5V,
+1.5V
so cancel power source of +3V.
0319 CQ :
Change MIC_R1 from PIN 20 to PIN 18 for ALC255-CG suggest
Change MIC_L1 from PIN 19 to PIN 17 for ALC255-CG suggest
Change VREFOUT_C from PIN 31 to PIN 29 for ALC255-CG suggest
R17745 30/F_4
R17744 30/F_4
ESD part for LG project only
0330 CQ
FP audio-2sj3127-003111f-6p (0412)
PN DFTJ06FR701
R341
*22K/F_4
AGND
+1.5V_AVDD+1.5V_AUDIO
AGND
L31
HCB1005KF-181T15_4
L32
*HCB1005KF-181T15_4
D
+3V_DVDD-IO
C591
0.1U/16V_4
HPOUT_L1
HPOUT_R1
12
C587
Clamp-Diode
VC2 *AVLC 5S_4
C8618 100P/50V_4
C590
0.047U/25V_4
0412 CQ :
Use 0603 0 ohm first (Vic suggest)
L2 0_6
L3 0_6
100P/50V_4
12
12
C8619
C588
Clamp-Diode
Clamp-Diode
AGND AGNDAGND
AGND
0713 CQ
Change F/P S0805
C589
1U/6.3V_4
AUDIO COMBO JACK
AGND
EARP_L1
EARP_R1
C8617
C8616
100P/50V_4 VC1
AGND
4
CN7706
Audio jack
DFTJ06FR701
audio-2sj3127-003111f-6p
40pin
Audio Jack
Close to CODEC
AGND
PCIE type
SENSE_A
0311 CQ
CardReader
Connector
0316 CQ
Reversion DB conn pin define (Jason request)
0316 CQ
EC79 1000P/50V_4
EC65 1000P/50V_4
EC77 1000P/50V_4
EC54 1000P/50V_4
EC73 1000P/50V_4
AGND
R385 *0_8/S
AGND
place to near Audio Chip or under Audio Chip.
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Azalia ALC255-CG
Azalia ALC255-CG
Azalia ALC255-CG
Date: Sheet of
Date: Sheet
Date: Sheet
E
56321
C8615
100P/50V_4
EXT_MIC_1EXT_MIC_1EARP_R1 EARP_L1
0331 CQ
Change symbol to 6 pin
*AVLC 5S_4
HCB1608KF-601T10
of
of
27 49Wednesday, July 20, 2016
27 49Wednesday, July 20, 2016
27 49Wednesday, July 20, 2016
L1
1A
1A
1A
27
Page 28
5
4
3
2
1
UCB 3.0 / TYPE C
28
USBP4+[12]
USBP4-[12]
D D
[12]
USB30_RX4-
[12]
USB30_RX4+
USBP4+
USBP4-
USB30_RX4USB30_RX4+
TP8614
TP8615
TP8616
TP8617
TP8613
0310 CQ
EC
ID2
To EC
ID2 [35]
[12]
USB30_TX4+
[12]
USB30_TX4-
C C
[12]
USB30_RX3-
[12]
USB30_RX3+
[12]
USB30_TX3+
[12]
USB30_TX3-
B B
USB30_TX4+
USB30_TX4-
USB30_RX3USB30_RX3+
USB30_TX3+
USB30_TX3-
TP8618
TP8619
TP8620
TP8621
TP8622
TP8623
0412 CQ
TypeC
USB & ID2
A A
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Type C
Type C
Type C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
1
28 49Wednesday, July 20, 2016
28 49Wednesday, July 20, 2016
28 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 29
A
[35]
MY[0..17]
[35]
MX[0..7]
MY[0..17]
MX[0..7]
KEYBOARD Con.
4 4
0307 CQ
Del CAPSLED# & MUTE_LED_CNTL cricuit
(Use TWL KB)
3 3
2 2
0411 Dennis
Swap KB Pin define for ME request
KEYBOARD PULL-UP
RP6500
+3VPCU
+3VPCU
+3VPCU
0406 CQ
Swap pin for layout
0412 CQ
Swap pin for layout again
10
9
MY6
8
MY3
7 4
MY12
MY13
*10P8R-8.2K
RP6501
10
MY2 MY5
MY4
MY7
MY8
9
8
7 4
*10P8R-8.2K
R6506 *8.2K_4
R6507 *8.2K_4
1
MY15
2
MY10
3
MY11
MY14
56
1
MY1
2
3
MY0
MY9
56
MY16
MY17
need check pin define
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
MY16
MY17
MY5
MY6
MY3
MY7
MY8
MY9
MY10
MY11
MY1
MY2
MY4
MY0
MX4
MX6
MX3
MX2
MX7
MX0
MX5
MX1
MY12
MY13
MY14
MY15
MY16
MY17
196319-32021-3-32p-l
DFFC32FR025
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KB Connector
CN6500
C6500 220P/50V_4
C6501 220P/50V_4
C6502 220P/50V_4
C6503 220P/50V_4
C6504 220P/50V_4
C6505 220P/50V_4
C6506 220P/50V_4
C6507 220P/50V_4
C6508 220P/50V_4
C6509 220P/50V_4
C6510 220P/50V_4
C6511 220P/50V_4
C6512 220P/50V_4
C6513 220P/50V_4
C6514 220P/50V_4
C6515 220P/50V_4
C6516 220P/50V_4
C6517 220P/50V_4
C6518 220P/50V_4
C6519 220P/50V_4
C6520 220P/50V_4
C6521 220P/50V_4
C6522 220P/50V_4
C6523 220P/50V_4
C6524 220P/50V_4
C6525 220P/50V_4
KB LIGHT CONN
0307 CQ
Del KB LIGHT circuit
1 1
A
B
HDD
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0316 CQ
Add LED circuit
(
MBATLED0#[35]
0713 CQ
Change F/P S0402
)
HD4600
10
9
8
7
6
5
4
3
2
1
SATA HDD
51625-01001-001-10p-l
DFFC10FR110
61
2
R17751 *0_4/S
FAN
+3VSUS
TPDATA[35]
TPCLK[35]
B
R6602 4.7K_4
R6603 4.7K_4
L6600 HCB1005KF-330T3
L6601 HCB1005KF-330T3
C
0706 CQ
PN change DFFC10FR110 (GF) , FP keep
+3VPCU
R17749
*10K_4
Q7704B
*2N7002KDW
SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
60mil
34
5
R17750
*10K_4
BATLOW#_L
Q7704A
*2N7002KDW
C4600 0.01U/50V_4
C4601 0.01U/50V_4
C4602 0.01U/50V_4
C4603 0.01U/50V_4
+5V
+5V
C4604 *10U/6.3VS_6
C4605 10U/6.3VS_6
C4606 0.1U/16V_4
0508 CQ
Change LED1 . LED2 , LED3 F/P ledltw-110uc5-3p
BAT LED
LED3
3P WHITE LED
C8622 *AVLC 5S_4
1116 DB modify pindefine
[35]
FAN1SIG
+3V
R7201 4.7K_4
EC
[35]
FAN1_PWM
Touch Pad Connector
15 mils
TPDATA-1
TPCLK-1
TP_SMB_CLK
TP_SMB_DATA
TPCLK
TPDATA
C6601 10P/50V_4
C6602 10P/50V_4
C
+3VSUS
21
+5V
C6600 0.1U/16V_4
CN6600
TP Connector
DFFC06FR192
88513-0601-6p-l-smt
0412 CQ
Swap pin (TP
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
R17748 330_6
C7200 10U/6.3VS_6
C7201 0.1U/16V_4
1
2
3
4
5
6
D
[2,4,10..13,15..21,25..27,30,32,33,35,41,45,46]
[6,13,31,34..37,44]
[26,27,45]
[45]
[25]
[25,36..39,41..44,46,47,49]
[12]
[12]
0307 CQ
[12]
[12]
SATA LED
0226 CQ
Del IR CAM circuit
SATA_LED#[12]
0517 CQ
Add PWR BTN LED
0518 CQ
Change LED3002 P/N & FP
+3VPCU
DEEP_PWRLED#[29,31]
PWR LED
DEEP_PWRLED#[29,31]
1
2
3
4
FAN7201
FAN CONN
DFHD04MR211
50281-00401-001-4p-l
)
D
FAN1_PWM
FAN1SIG
0330 CQ
PN DFHD04MR211
FP 50281-00401-001-4p-l (0408)
[10,16..18]
[10,16..18]
+3V
+3VPCU
+5V
+3VSUS
+3V_CAM
+VIN
circuit
SATA LED
C8620 *AVLC 5S_4
LED3002
3P WHITE LED
C8632 *AVLC 5S_4
LED2
3P WHITE LED
C8621 *AVLC 5S_4
C7202 *220P/50V_4
C7203 *220P/50V_4
SMB_RUN_CLK
+3V +3VSUS
SMB_RUN_DAT
E
29
21
LED1
3P WHITE LED
PWR BTN LED
21
21
Q6600A
2N7002KDW
Dual
5
2
Q6600B
2N7002KDW
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
HDD/ TP / KB / FAN / LED
HDD/ TP / KB / FAN / LED
HDD/ TP / KB / FAN / LED
1 2
R17746 330_6
R17754 330_6
R17747 330_6
TP_SMB_CLK
34
R6600 4.7K_4
R6601 4.7K_4
TP_SMB_DATA
61
E
+3VPCU
+3VPCU
29 49Wednesday, July 20, 2016
29 49Wednesday, July 20, 2016
29 49Wednesday, July 20, 2016
of
of
+3V
1A
1A
1A
Page 30
5
4
3
2
1
TPM (2.0)
0713 CQ
Change F/P S0402
R6000 *0_4/S
[10,31,35]
[10,31,35]
D D
[10,31,35]
[10,31,35]
[10,31,35]
C C
CLK_PCI_TPM[10,31]
LFRAME#
PCIE_WAKE#[4,31,33,35]
PLTRST#
PCIE_CLKREQ_CR#[13]
PCIE_TXP5_CARD[12]
PCIE_TXN5_CARD[12]
CLK_PCIE_CRP[13]
CLK_PCIE_CRN[13]
PCIE_RXP5_CARD[12]
PCIE_RXN5_CARD[12]
LAD0
LAD1
LAD2
LAD3
LAD0
LAD1
LAD2
LAD3
LFRAME#
PLTRST#[4,16,19,30..33,35]
[10,35]
R6003 *0_4/S
R6001 *0_4/S
R6004 *0_4/S
R6002 *0_4/S
R6006 *0_4/S
SERIRQ
R330 *0_4/S
R339 *0_4/S
C545 0.1U/16V_4
C551 0.1U/16V_4
LAD0_T
LAD1_T
LAD2_T
LAD3_T
CLK_PCI_TPM_R
LFRAME#_T
SERIRQ
Zdiff = 100 ohm
B B
RTS5237_RREF : W > 12mil, L < 200mil.
Power Budget ~ 1.2A ( W > 40mil )
PN:AL009665K01
U6000
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
28
LPCPD#
27
SERIRQ
9
TEST/BADD
15
CLKRUN#
1
NC
3
NC
12
NC
*SLB9665 T2.0
PCIE_CLKREQ_CR#_R
PCIE_RXP5_CARD_C
PCIE_RXN5_CARD_C
Please add 9 GND VIAs
connection with thermal PAD
Colse to Chip
R352
6.2K/F_4
+3V +3VCARD
C577
10U/10V_8
C553
*100P/50V_4
1 2
C579
0.1U/16V_4
VDD
VDD
VDD
VSB
GND
GND
GND
GND
GPIO
GPIO2
PP
TESTI
XTALI/32K IN
XTALO
U15
RTS5227S-GRT
RTS5237_RREF
0518 CQ
Change F/P S0603
R356 *0_6/S
33
10
19
24
5
4
11
18
25
6
2
7
8
13
14
1
2
3
4
5
6
7
8
PERST#
CLKREQ#
HSIP
HSIN
REFCLKP
REFCLKN
HSOP
HSON
GND
+3V
C6000 0.1U/16V_4
C6003
0.1U/16V_4
R6007 4.7K_4
TPM_PP
32
30
31
WAKE#
MS_INS#
RTS5227S-GRT
RREF93V3_IN11DV12S14SP115SP2
AV1210CARD_3V312NC
29
SD_CD#
28
SP7
GPIO
13
RTS5237_GPIO
RTS5237_3Vaux
27
26
NC25NC
3V3aux
16
RTS5237_DV12SRTS5237_AV12
C6001
0.1U/16V_4
NC
NC
NC
SP6
SP5
SP4
DV33_18
SP3
+3V
C6002
0.1U/16V_4
+3V
0518 CQ
Change F/P S0603
24
23
22
21
20
19
18
17
SD_D0_R
SD_D1_R
TPM_PP
R331 10K_4
R333 *0_6/S
C525 0.1U/16V_4
C524 4.7U/6.3V_6
Resister close to chip.
SD_D2_R
SD_D3_R
SD_CMD_R
DV33_18
SD_CLK_R
R338 33_4
R340 33_4
R343 0_4
DV33_18 : W > 20mil, L < 200mil.
R350 22_4
R353 33_4
R363 33_4
0413 CQ
Chagne P/N CH-5606TB01 (RDC suggest)
16V
Output capability is 800mA.
Current protection is 950mA.
( W > 40mil )
+3V
R6005
*4.7K_4
R6008
*0_4/S
+3V
+3V
C550
1U/10V_4
20140821A-EMI request.
50V
RTS5237_GPIO
Imax = 15mA
RTS5237_3Vaux :
Power Budget ~ 375mA
( W > 30mil )
C575
5.6P/50V_4
30
0307 CQ
Del G-sensor circuit
0316 CQ
Add Card reader circuit (
SD_D2
SD_D3
SD_CMD
SD_CD#
SD_CLK
SD_D0
SD_D1
SD_WP
0330 CQ
SD_D3
SD_D1
SD_D2
EC59 *5.6P/16V_4
EC58 *5.6P/16V_4
CLOSE CONN
C576 4.7U/6.3V_6
C564 *0.1U/16V_4
C563 0.1U/16V_4
EC61 *5.6P/16V_4
FP sdcard-psdbr6-11glbs1nn4h2-11p (0407)
SD_D0
PN DFHS11FR200
EC62 *5.6P/16V_4
Reserve for EMI
CN7707
CARDREADER CONN
1
DAT2
2
DAT3
3
CMD
4
C/D
5
VSS1
6
VDD
7
CLK
8
VSS2
9
DAT0
10
DAT1
11
W/P
12
GND
13
GND
14
GND
15
GND
sdcard-psdbr6-11glbs1nn4h2-11p
DFHS11FR200
)
W > 20mil
R360 *0_4/S
C582
0.1U/16V_4
A A
5
4
C584
*4.7U/6.3V_6
20140811A-Realtek recommand to remove C454 4.7uF.
Base on Rev:A test result to discuss on Rev:B.
C583
0.1U/16V_4
C585
4.7U/6.3V_6
3
[2,4,10..13,15..21,25..27,29,32,33,35,41,45,46]
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
<Title>
<Title>
<Title>
TPM / CardReader 1A
Custom
TPM / CardReader 1A
Custom
TPM / CardReader 1A
+3V
2
Custom
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
30 49Wednesday, July 20, 2016
30 49Wednesday, July 20, 2016
30 49Wednesday, July 20, 2016
1
Page 31
A
Mini Card
+3VS5+3VPCU +3V_WLAN_P +3V_WLAN_P
WLAN/BT(Option)
R5001
10K_4
Q5002
2
R5003 200K_4
3
2N7002K
1
C5005
0.022U/25V_4
+3V_WLAN_P
4 4
[35]
EC_AOCS
Support Wake Function(Reserve)
2
3 3
PCIE_WAKE#[4,30,33,35]
13
Q5000 *DRC5144E0L
1
2
3
R5008 *10K_4
MINICAR_PME#
Q5001
AO3409
+3V_AOCS
80mil
C5000
*0.1U/16V_4
PCIE_CLKREQ_WLAN#[13]
B
C5001
0.1U/16V_4
0413 CQ
Add Q5004 , R5009 (G31 Add for MV change)
PCIE_WAKE#
C5002
0.1U/16V_4
+3V_WLAN_P
2
3
R5005 0_4
EC5002 *220P/50V_4
C5003
0.1U/16V_4
R5009 *10K_4
Q5004
*2N7002K
1
C5004
10U/6.3VS_6
PCIE_TXP6_WLAN[12]
PCIE_TXN6_WLAN[12]
PCIE_RXP6_WLAN[12]
PCIE_RXN6_WLAN[12]
CLK_PCIE_WLANP[13]
CLK_PCIE_WLANN[13]
C
0329 CQ
改FP ngff-apci0136-p001a-75p-ke (0418)
PN DFHS75FR326
USBP7+[12]
USBP7-[12] RF_LINK#
REQ_WLAN#
MINICAR_PME# INT_RF_OFF#
CLK_PCI_TPM[10,30]
LFRAME#[10,30,35]
LFRAME#
CN5000
1
GND
3
USB_D+
5
USB_D-
7
GND
9
SDIO CLK(O)
11
SDIO CMDIO)
13
SDIO DAT0(IO)
15
SDIO DAT1(IO)
17
SDIO DAT2(IO)
19
SDIO DAT3(IO)
21
SDIO Wake(I)
23
SDIO Reset
25
KEY1
27
KEY2
29
KEY3
31
KEY4
33
GND
35
PETp0
37
PETn0
39
GND
41
PERp0
43
PERn0
45
GND
47
REFCLKP0
49
REFCLKN0
51
GND
53
CLKREQ0#
55
PEWake0#
57
GND
59
PETp1
61
PETn1
63
GND
65
PERp1
67
PERn1
69
GND
71
Reserved1
73
Reserved2
75
GND
NGFF
D
3.3Vaux
3.3Vaux
LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
GND
UART Wake
UART Rx
Key 5
Key 6
Key 7
Key 8
UART Tx
UART CTS
UART RTS
Clink RESET
CLink DATA
CLink CLK
COEX3
COEX2
COEX1
SUSCLK(32KHz)
PERST0#
W_DISABLE2#
W_DISABLE1#
NFC I2C SM DATA
NFC I2C SM CLK
ALERT#
RESERVED
UIM_SWP/PERST1#
UIM_POWER_SNK
UIM_POWER_SRC
3.3Vaux
3.3Vaux
GND76GND
WLAN_NGFF CONN (E-Key)
77
ngff-apci0136-p001a-75p-ke
DFHS75FR326
+3V_WLAN_P
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
[4,10,15,16,27,32,35,37..40,44,45,48]
80mil
WLAN_LED#
INT_BT_OFF#
LAD0
LAD1
LAD2
LAD3
R5002 4.7K_4
R5004 *0_4/S
0713 CQ
Change F/P S0402
4 3
1
PLTRST# [4,16,19,30,32,33,35]
LAD0 [10,30,35]
LAD1 [10,30,35]
LAD2 [10,30,35]
LAD3 [10,30,35]
Q5003
2N7002KDW
+3VS5
+3V_WLAN_P
5
INT_BT_OFF#
2
INT_RF_OFF#
6
E
R5006 10K_4
R5007 10K_4
31
0310 CQ
EC
BT_OFF [14]
RF_OFF_PCH [4]
+3V_WLAN_P
PAD/HOLE
H1
*H-TC315IC182BC197D150P2
1
H5
*H-TC276IBC197D150P2
2 2
1
H7
*h-tc236ibc197d98p2
1
H11
*H-C118D87P2
0707 CQ
1
Change H11 H-C118D87P2
H15
*O-LG9-4
1 1
1
H2
*H-TC315IC182BC197D150P2
H6
*H-TC276IBC197D150P2
H8
*H-LG9-H8
H12
H-TC217IC217D110PT
H16
*h-tc315ibc236d98p2
0518 CQ
Change F/P H16 h-tc315ibc236d98p2
0328 CQ
Add H1~H6 follow G31
H3
*H-TC315IC182BC197D150P2
1
0526 CQ
1
Change H9 FP h-tic150bc197d110p2 (Layout request)
1
1
1
A
1
0706 CQ
Change H8 FP H-LG9-H8
H9
h-tic150bc197d110p2
1
H13
*O-LG9-2
1
H17
*O-LG9-1
1
H4
*H-TC315IC182BC197D150P2
1
0508 CQ
Add H9 & H12 nut P/N (MBT01001010 , MBG34001010)
0518 CQ
Change F/P H7 h-tc236ibc197d98p2
Change F/P H8 h-tc158ibc118d98x87p2
Change F/P H9 h-tc197ibc150d110p2
H10
*h-tc315ibc138d87p2
1
H14
*O-LG9-3
1
H18
*SPAD-C197NP
1
Change F/P H10 h-tc315ibc138d87p2
Change F/P H11 h-c118d87x98p2
Change F/P H16 h-tc315ibc236d87p2
Add PAD1 spad-re232x169np
Add PAD2 spad-re236x59np
0518 CQ
Add PAD3 spad-re232x169np
H20
*SPAD-RE213X114NP
H19
*SPAD-C197NP
1
B
0602 CQ
Add H20 for EMI GND PAD
0707 CQ
Change H20 FP SPAD-RE213X114NP
1
[35]
PWR_LED#
PAD1
*spad-re232x169np
1
0408 CQ
Add H7~H19
0418 CQ
Final Hole
H1 / H2 / H3 / H4 => H-TC315IC182BC197D150P2
H5 / H6 => H-TC276IBC197D150P2
H11 => H-C118D87P2
H13 => O-LG9-2
H14 => O-LG9-3
H15 => O-LG9-4
PAD2
*spad-re236x59np
PWR_LED#
1
H7 => H-TC236IBC197D87P2 (0418E
0509 CQ
Q5106 2N7002K change to DRC5144E0L
Add 0.1u/16V (Follow G34)
PAD3
*spad-re232x169np
1
)
+3VPCU
2
C8508
0.1U/16V_4
PAD4
*SPAD-RE265X180NP
1
C
R5140
0307 CQ
Set net name DEEP_PWRLED#
10K_4
Q5106
DRC5144E0L
1 3
+3VPCU
PAD5
*SPAD-RE630X55NP
1
DEEP_PWRLED#
SW7900
5 6
sw-tme-533b-q-tr-6p
+BAT_RTC
D7903
2 1
MEK500V-40
0713 CQ
Add PAD3,PAD4 SPAD-RE265X180NPSPAD-RE630X55NP
20mils
31
42
2
VDD
S
1
N
GND
3
DEEP_PWRLED#
OUT
HE7900
APX9132H AI-TRG
D
R7900
1K_4
[29]
NBSWON1#
C7902
0.1U/16V_4
0307 CQ
Change net name to LID_EC#
0311 CQ
LID# (power )
LID_EC#
0509 CQ
Change net name to LID_EC#
C7900
*2.2U/10V_6
C7901
*AVLC 5S
LID_EC#
NBSWON1# [35]
[35]
+BAT_RTC
[13]
[6,13,29,34..37,44]
+BAT_RTC
+3VPCU
20mils
C7903
0.1U/16V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
C7904
*2.2U/10V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
WLAN / Lid / PwrSW / Hole
WLAN / Lid / PwrSW / Hole
WLAN / Lid / PwrSW / Hole
E
31 49Wednesday, July 20, 2016
31 49Wednesday, July 20, 2016
31 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 32
5
0226 CQ
Del PCIE port11
0311 CQ
Add PCIE SSD function for LG request
PCIE_RXN9_SSD[12]
PCIE_RXP9_SSD[12]
D D
0525 CQ
Add PICe SSD to 4ch
C C
PCIE_TXN9_SSD[12]
PCIE_TXP9_SSD[12]
PCIE_RXN10_SSD[12]
PCIE_RXP10_SSD[12]
PCIE_TXN10_SSD[12]
PCIE_TXP10_SSD[12]
PCIE_RXN11_SSD[12]
PCIE_RXP11_SSD[12]
PCIE_TXN11_SSD[12]
PCIE_TXP11_SSD[12]
PCIE_RXP12_SSD
[12]
PCIE_RXN12_SSD
[12]
[12]
PCIE_TXN12_SSD
[12]
PCIE_TXP12_SSD
CLK_PCIE_SSDN[13]
CLK_PCIE_SSDP[13]
GPIO35[12]
0315 CQ
Remove 0 ohm & Net name
R17739 & R17740
PCIE_RXN11_SSD_C & PCIE_RXP11_SSD_C
0713 CQ
Change F/P S0402
R4930 *0_4/S
Q4901
2N7002K
R4931 *0_4
3
4
C8634 0.22U/10V_4
C8633 0.22U/10V_4
C8636 0.22U/10V_4
C8635 0.22U/10V_4
C4919 0.22U/10V_4
C4920 0.22U/10V_4
R8557 *0_4/S
R8558 *0_4/S
C8519 0.22U/10V_4
C8520 0.22U/10V_4
2
PCIE_TXN9_SSD_DC_R
PCIE_TXP9_SSD_DC_R
PCIE_TXN10_SSD_DC_R
PCIE_TXP10_SSD_DC_R
SATA_TXN1_C
SATA_TXP1_C
PCIE_RXP12_SSD_DC_R
PCIE_RXN12_SSD_DC_R
PCIE_TXN12_SSD_DC_R
PCIE_TXP12_SSD_DC_R
+3V
PEDET
R4927
100K/F_4
PEDET
3
CN4901
SSD_NGFF_CONN_75P_M-KEY
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
NGFF
CONFIG3/GND
GND
PERN3
PERP3
GND
PETN3
PETP3
GND
PERN2
PERP2
CONFIG0/GND
PETN2
PETP2
GND
PERN1
PERP1
GND
PETN1
PETP1
GND
SATA RX+/PERN0
SATA RX-/PERP0
GND
SATA TX-/PETN0
SATA TX+/PETP0
GND
REFCLKN
REFCLKP
GND
KEY
KEY
KEY
KEY
N/A
PEDET(NC-PCIE/GND-SATA)
GND
GND
GND
ngff-apci0020-p002a-75p-km-smt
DAS/DSS#(O)(OD)
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
3.3Vaux
DEVSLP
PERST#
CLKREQ#
PEWAKE#/NC
MFGDAT
MFGCLK
SUSCLK
3.3Vaux
3.3Vaux
3.3Vaux
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
KEY
KEY
KEY
KEY
80mil
+3V_SSD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
PCIE_CLKREQ_SSD#_C
52
54
56
58
60
62
64
66
68
70
72
74
0706 CQ
改FP ngff-apci0020-p002a-75p-km-smt
2
0525 CQ
Change Symbol & Add pin12,14,16,18 to +3V_SSD (Rico request)
C4915
0.01U/50V_4
TP4901
+3V
R4914 *0_4
1005 Add DEVSLP0 PU R8505 10K to +3V
R17741 *0_4/S
R17742 *0_4/S
R4926 *0_4
+3V_SSD
80mil
EC4903
470P/50V_4
R8505
10K_4
C4916
0.1U/16V_4
0523 CQ
由25V改成16V
DEVSLP1 [12]
EC4904
10U/6.3V_6
R4911 *0_8/S
C4913
4.7U/6.3V_6
EC4905
10U/6.3V_6
+3V
PLTRST# [4,16,19,30,31,33,35]
PCIE_CLKREQ_SSD# [13]
1
32
1
B B
EC7018
*0.1U/16V_4
EC7020
*0.1U/16V_4
EMI
EC7019
*0.1U/16V_4
EC7021
*0.1U/16V_4
1230 PV
[2,4,10..13,15..21,25..27,29,30,33,35,41,45,46]
EC7024
*0.1U/16V_4
4
EC7025
*0.1U/16V_4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet
3
2
Date: Sheet
NGFF (PCIE/SATA)
NGFF (PCIE/SATA)
NGFF (PCIE/SATA)
+3V
1A
1A
1A
of
of
32 49Wednesday, July 20, 2016
32 49Wednesday, July 20, 2016
32 49Wednesday, July 20, 2016
1
+5VS5
EC7015
0.1U/16V_4
+3VS5 +3V
A A
EC7022
*0.1U/16V_4
5
EC7017
0.1U/16V_4
EC7023
*0.1U/16V_4
Page 33
5
4
3
2
1
LAN & RJ45
33
D D
Place Cc,Cd,Ce,Cf close to each VDD10 pin-- 3,8,22,30
Place Cg & Ch close to each VDD10 pin22
RTL8111GS stuff Lx,Cy, Cz
C8537 0.1U/16V_4
C8549 1U/6.3V_4
Cf
Close Pin-22
C8542 *4.7U/6.3V_6
Close Pin-32
(SWR mode need stuff Cx & Cz)
C8544 0.1U/16V_4
C8532 0.1U/16V_4
Cd
Ce
Close Pin-8
Close Pin-11
Cc
Close Pin-22
Close Pin-30
CbCaCc
C8543 0.1U/16V_4
C8536 0.1U/16V_4
C8530 *4.7U/6.3V_6
Close Pin-32
Close Pin-11
0306 CQ
RTL8111H unstuff (or remove)
Cc , Cd for LDO mode
>60mil
C8545 0.1U/16V_4
Cz
SWR, Close Lx
Cd
C8529 *4.7U/6.3V_6
SWR, Close Pin-23
SWR, Close Pin-23
+1.0V_LAN
C8531 0.1U/16V_4
Cg
Ch
Close Pin-3
C C
RTL8111GS stuff Cc, Cd
Remove For Not Using SWR mode
Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32
Place Cc and Cd close to each VDD33 pin-- 23
B B
Close Pin-22
+3VLANVCC
Differential Impedance : 100Ω
Differential Impedance : 100Ω
A A
5
Power trace Layout W > 60mil
Trace<30 mil
Width > 60 mil
0713 CQ
Change F/P S0805
Lx : SWR
L7 *4.7UH,+-20%,650MA_1210
C8533 *0.1U/16V_4
C8539 *4.7U/6.3V_6
Cy
R8572 *0_8/S
Rx : LDO
LDO Mode:Stuff Rx
Switch Mode:Stuff Lx
SWR, Close Lx
0306 CQ
RTL8111H stuff C1017
(LDO mode)
Unstuff C132 , C133
C8538 *0.1U/16V_4
[4,30,31,35]
PCIE_WAKE#
Pin-21 LANWAKEB : O/D, Low Active,
PU via 1KΩ to +3VS5 on CPU side.
20150316ARich Power recommend to
change power for S0 state.
if ISOLATEB pin pull-low,the LAN
chip will not drive it's PCI-E outputs
( excluding PCIE_WAKE# pin )
PLTRST#[4,16,19,30..32,35]
[12]
PCIE_RXN8_LAN
[12]
PCIE_RXP8_LAN
[13]
[13]
[12]
[12]
PCIE_CLKREQ_LAN#[13]
+1.0V_LAN
+1.0V_LAN_REGOUT
+3V
+3VLANVCC
C8534 0.1U/16V_4
+1.0V_LAN
C8540 0.1U/16V_4
C8552 0.1U/16V_4
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_TXN8_LAN
PCIE_TXP8_LAN
Pin-12 CLKREQB : O/D, PU via
10KΩ to +3V on CPU side.
[2,4,10..13,15..21,25..27,29,30,32,35,41,45,46]
[34,45]
R3006 *0_4/S
0713 CQ
Change F/P S0402
+3V
R8570
1K_4
ISOLATEB
R8569
15K/F_4
1 2
PCIE_RXN8_LAN_L
PCIE_RXP8_LAN_L
RTL8111HS (SWR Mode) Pin-24 REGOUT : Switching Regulator 1.0V Output.
RTL8111H (LDO Mode) Pin-24 REGOUT : LDO Regulator 1.0V Output.
+1.0V_LAN_REGOUT
[34]
LAN_AMBLED#
LAN_WLED#
REGOUT(NC)
VDDREG(VDD33)
DVDD10(NC)
LANWAKEB
ISOLATEB
PERSTB
HSON
HSOP
LAN_CLKRQ
LAN_XTAL25_IN
LAN_XTAL1
For EMI 0 ~ 22 ohm
R8559 0_4
XTAL2
XTAL1
27
25
28
26
LED0
CKXTAL229CKXTAL1
LED1/GPO
LED2(LED1)
RTL8111H-CG
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
16
12
1
2
4
3
R8568 2.49K/F_4
RSET
32
31
30
RSET
AVDD33
AVDD10
AVDD10(NC)
MDIP2(NC)
MDIN2(NC)
MDIP3(NC)9MDIN3(NC)
AVDD33(NC)
10
11
U8505
RTL8111H-CG
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_TXN8_LAN
PCIE_TXP8_LAN
R8571 *0_4/S
4
+1.0V_LAN_REGOUT
>60mil
PCIE_WAKE#_R
TP8565
TP11
TP10
24
23
22
21
20
19
18
17
GND
+3VLANVCC
R17721*0_4
33
1
2
3
4
5
6
7
8
3
C8551
10P/50V_4
Y1001
25MHZ +-10PPM
C8528
10P/50V_4
Please add 9 GND VIAs
connection with thermal PAD
MDIP0
MDIN0
MDIP1
MDIN1
AVDD10
0301 CQ
Add GCLK XTALIN (LAN_XTAL25_IN) & 0ohm
Change default use X'TAL
+1.0V_LAN
+3VLANVCC
+1.0V_LAN
MDI3+
MDI3-
MDI0+
MDI0-
MDI1+
MDI1-
MDI2+
MDI2-
0523 CQ
Change U8504 P/N to DB0LL1LAN00 (Reco suggest)
Change Symbol , Change net
2
3
5
6
8
9
11
TRA_V_DAC
C8546
0.01U/50V_4
1
4
7
10
U8504
TD1+
TD1TD2+
TD2TD3+
TD3TD4+
TD4-12MX4-
TCT1
TCT2
TCT3
TCT4
NS892407
MX1+
MX1-
MX2+
MX2-
MX3+
MX3-
MX4+
MCT1
MCT2
MCT3
MCT4
+3VLANVCC
R3017300_4
0104 change to 300 ohm
+3VLANVCC
R3018360_4
LED3000
2 1
ORANGE(LTST-S320KFKT)
VC3000 *AVLC5S_4
LED3001
2 1
3P WHITE LED
VC3001 *AVLC5S_4
LAN_AMBLED#
LAN_WLED#
1015(check fp)
LAN CONN
RJ45
CN3000
MDI0+_1
23
MDI0-_1
22
MDI1+_1
20
MDI1-_1
19
MDI2+_1
17
MDI2-_1
16
MDI3+_1
14
MDI3-_1
13
24
21
18
15
LAN_MCTG3
LAN_MCTG2
R8560 75/F_4
R8563 75/F_4
C8535 *0.01U/100V_06
C8541 *0.01U/100V_06
2
LAN_MCTG1
C8548 *0.01U/100V_06
R8567 75/F_4
MDI3-_1 MDI3-_1
MDI3+_1 MDI3+_1
MDI1-_1 MDI1-_1
MDI2-_1 MDI2-_1
MDI2+_1 MDI2+_1
MDI1+_1 MDI1+_1
MDI0-_1 MDI0-_1
MDI0+_1 MDI0+_1
LAN_MCTG0
R8564 75/F_4
C8550 *0.01U/100V_06
LAN_MCTG
C8553 10P/3KV_1808
RTL8111GS : Switching Regulater
RTL8111G : LDO Regulater
8
RX1-
7
RX1+
6
RX0-
5
TX1-
4
TX1+
3
RX0+
2
TX0-
1
TX0+
GND1
GND2
GND3
GND4
RJ45_CONN
DFTJ08FR473
rj45-2rj1754-000211f-8p
0706 CQ
FP rj45-2rj1754-000211f-8p (keep)
PN DFTJ08FR473 (GF)
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet of
R3013
*0_6/S
9
10
11
12
R3015
*0_6/S
LAN RTL8111H-CG
LAN RTL8111H-CG
LAN RTL8111H-CG
1
33 49Wednesday, July 20, 2016
33 49Wednesday, July 20, 2016
33 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 34
5
4
3
2
1
0226 CQ
32
Use TWL GCLK circuitry
D D
[33]
LAN_XTAL25_IN
LAN
[13]
PCH_XTAL24_IN
PCH
C C
[13]
CLKGEN_RTC_X1
R17728 *33_4
C367
*10P/50V_4
20150713A3-PV-R
20150727A1-PV-R change for crystal.
R17729 *22/F_4
C341
*10P/50V_4
RTC
+3VLANVCC
+1.0V
+3V_AON
R17730 *22_4
C328
*10P/50V_4
[21]
CLK_27M_XTAL_IN
GPU
20150209A-Change POWER
from +1.05V to +1.0V.
B B
LAN_XTAL25_IN_R
PCH_XTAL24_IN_R
20140922A-For SLG3NB3455V,
R209 change to 0Ω.
CLK_27M_XTAL_IN_R
20141002A-Without clock
output by PIN-12.
C323 *0.1U/16V_4
C336 *0.1U/16V_4
C343 *0.1U/16V_4
Green CLK Circuitry
+3VPCU
R17743
*5.1/F_6
C8604 *0.1U/16V_4
U10
*SLG3NB3455
6
25M
5
24M
9
32Khz
12
27Mhz/NC
VDD_RTC_OUT
8
VDDIO_25M
VDDIO_24M3GND
11
VDDIO_27/NC
16
XTAL_OUT
1
XTAL_IN
+V3.3A
VDD
VBAT
GND
GND
GND
15
2
10
14
7
13
4
17
+3V_RTC_R
+3V_RTC_G
20mils width(min)
+3V_RTC_0,+3V_RTC_R,+3V_RTC..
+3V_RTC voltage has 3V when current from RTC battery through D6.
But voltage down around 2.5V when current from G-CLK.
So has more ΔV for G-CLK. Doesn't recommand +3V_RTC through G-CLK.
+3V_RTC_2+3VLANVCC +3V_RTC_0
R17726
*360_4
C370 *0.1U/16V_4
C8605 *22U/10VS_8
0328 CQ
+3V_RTC change to +3V_RTC_0
+3V_RTC_0 change to +3V_RTC_2
R17727
*0_6
0315 CQ
GCLK pin 2 reserve 5 ohm for FAE request
0508 CQ
Change R17743 PN to CS-5112FB06 (R0402)
C315 *2.2U/6.3V_6
Iout : 2.5 ~ 6uA
C306 *15P/50V_4
4
3
1
2
C305 *12P/50V_4
A A
5
GEN_XTAL25_OUT
Y3
*25MHZ +-10PPM
GEN_XTAL25_IN
4
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet
3
2
Date: Sheet
GCLK-SLG3NB3455
GCLK-SLG3NB3455
GCLK-SLG3NB3455
1
34 49Wednesday, July 20, 2016
34 49Wednesday, July 20, 2016
34 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 35
5
C5103 0.1U/16V_4
D5102 MEK500V-40
Close to BIOS
5
LAD0
LAD1
LAD2
LAD3
PLTRST#
CLK_24M_KBC
LFRAME#
PCIE_WAKE#
SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
EC_WRST
EC_RCIN#
GPUT_CLK
BATSHIP
LID_EC#
[31]
TPDATA
TPCLK
SUSB#
DSWROK_EC
SLP_SUS#_EC
RSMRST#
MAINON
KB_LED_EN#
USBPW_ON#
BIOS_SPI_CLK
BIOS_RD#
BIOS_WR#
BIOS_CS#
S5_ON
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
126
113
123
119
108
109
125
105
103
102
101
100
128
[10,30,31]
[10,30,31]
[10,30,31]
[10,30,31]
D D
[10,30,31]
[4,30,31,33]
[10,30]
[10]
[22]
For Touch-Pad
C C
0307 CQ
KB_LED
B B
A A
PCH_SPI1_CLK_R[10]
PCH_SPI1_SO_R[10]
PCH_SPI1_SI_R[10]
PCH_SPI_CS0#_R[10]
S5_ON[37]
0309 CQ
Del Pin2 ZERO_PWR_ODD & TP8569
0328 CQ
Add net name ID2 for TypeC use
L5101 HCB1608KF-181T15_S0_6
LAD0
LAD1
LAD2
LAD3
PLTRST#[4,16,19,30..33]
CLK_24M_KBC[10]
LFRAME#
PCIE_WAKE#
SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#[14]
EC_RCIN#[10]
GPUT_CLK
[36]
BATSHIP
LID_EC#
TPDATA[29]
TPCLK[29]
[4,16]
SUSB#
DSWROK_EC[4]
[4]
SLP_SUS#_EC
SLP_SUS_ON[15,39,40]
[4]
RSMRST#
MAINON[26,38,40,45]
GPIO33_EC[11]
TP8572
TP
USBPW_ON#[26]
R5110 15/F_4
R5111 15/F_4
R5112 15/F_4
R5116 15/F_4
[29]
MY0
[29]
MY1
[29]
MY2
[29]
MY3
[29]
MY4
[29]
MY5
[29]
MY6
[29]
MY7
[29]
MY8
[29]
MY9
MY10[29]
MY11[29]
MY12[29]
MY13[29]
MY14[29]
MY15[29]
[29]
MX0
[29]
MX1
[29]
MX2
[29]
MX3
[29]
MX4
[29]
MX5
[29]
MX6
[29]
MX7
[37]
5VS5_ON
ID2[28]
[4,10,15,16,27,31,32,37..40,44,45,48]
[2,4,10..13,15..21,25..27,29,30,32,33,41,45,46]
[6,13,29,31,34,36,37,44]
U5100
10
LAD0
9
LAD1
8
LAD2
7
LAD3
22
LPCRST#/WUI4/GPD2
13
LPCCLK
6
LFRAME#
17
LPCPD#/WUI6/GPE6
GA20/GPB5
5
SERIRQ
15
ECSMI#/GPD4
23
ECSCI#/GPD3
14
WRST#
4
KBRST#/GPB6
16
PWUREQ#/BBO/GPC7
CRX0/GPC0
TMA0/GPB2
86
PS2DAT0/TMB1/GPF1
85
PS2CLK0/TMB0/GPF0
88
PS2DAT1/RTS0#/GPF3
87
PS2CLK1/DTR0#/GPF2
90
PS2DAT2/WUI21/GPF5
89
PS2CLK2/WUI20/GPF4
DSR0#/GPG6
33
GINT/CTS0#/GPD5
RXD/SIN0/GPB0
TXD/SOUT0/GPB1
SSCE1#/GPG0
FSCK/GPG7
FMISO/GPG5
FMOSI/GPG4
FSCE#/GPG3
SSCE0#/GPG2
36
KSO0/PD0
37
KSO1/PD1
38
KSO2/PD2
39
KSO3/PD3
40
KSO4/PD4
41
KSO5/PD5
42
KSO6/PD6
43
KSO7/PD7
44
KSO8/ACK#
45
KSO9/BUSY
46
KSO10/PE
51
KSO11/ERR#
52
KSO12/SLCT
53
KSO13
54
KSO14
55
KSO15
58
KSI0/STB#
59
KSI1/AFD#
60
KSI2/INIT#
61
KSI3/SLIN#
62
KSI4
63
KSI5
64
KSI6
65
KSI7
GPJ6
2
GPJ7
AJ089870F01
IT8987E/BX
+3VS5
+3V
+3VPCU
+3V +3VPCU
11
114
VCC
VSTBY26VSTBY50VSTBY92VSTBY
IT8987
106
121
VSTBY
VSTBY_FSPI
LPC
PS/2
UART
FLASH
KBMX
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
CLOCK
VSS
VSS27VSS
VSS
1
49
91
4
C5101 0.1U/16V_4
C5102 0.1U/16V_4
+3V_VSTBY
+3V_ECACC
127
74
EGCLK/WUI27/GPE3
AVCC
EGCS#/WUI26/GPE2
VSTBY
EGAD/WUI25/GPE1
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5
L80HLAT/BAO/W UI24/GPE0
L80LLAT/WUI7/GPE7
GPIO
DTR1/SBUSY/GPG1/ID7
HMOSIGPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/WUI19/GPH3/ID3
CTX1/WUI18/GPH2/SMDAT3/ID2
CRX1/WUI17/GPH1/SMCLK3/ID1
CLKRUN#/WUI16/GPH0/ID0
SMCLK2/WUI22/GPF6/PECI
SMDAT2/WUI23/GPF7
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/SSCK/GPA6
PWM7/GPA7
TACH0/GPD6
TACH1/TMA1/GPD7
DAC1/GPJ1
DAC0/GPJ0
TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
PWRSW /GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
WUI5/GPE5
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/WUI28/GPI4
ADC5/WUI29/GPI5
ADC6/WUI30/GPI6
ADC7/WUI31/GPI7
DAC5/RIG0#/GPJ5
DAC4/DCD0#/GPJ4
DAC3/GPJ3
DAC2/GPJ2
VCORE
12
C5114
0.1U/16V_4
Need to CLOSE to EC pin
4
THRM_MOINTOR1
THRM_MOINTOR2
104
IT8502_AGNDIT8502_AGND
VSS
SM_BUS
PWM
WAKE UP
A/D D/A
AVSS
75
C5104 0.1U/16V_4
C5105 0.1U/16V_4
C5107 0.1U/16V_4
C5106 0.1U/16V_4
EC_AOCS
84
83
VRON
SUSACK#_EC
82
56
MY16
57
MY17
19
CRY1
EC_PWROK
20
PCH_SLP_S0_N_R PCH_SLP_S0_N
122
PCI_SERR#
99
98
HWPG
97
ACIN
96
0310 CQ
95
G-sensor , Del MBDATA3 & MBCLK3
94
93
CLKRUN#
SUSWARN#_EC
3
GPH7
EC_PECI_R
117
GPUT_DATA
118
110
111
115
116
PWR_LED#
24
25
MBATLED0#
AC_LED_ON#
28
TS_ON
29
FAN1_PWM
30
31
32
VOLMUTE#
34
47
FAN1SIG
48
DGPU_PROCHOT#
77
EC_USB_CTRL3
76
TEMP_MBAT
120
H_PROCHOT#_EC
124
107
NBSWON1#
18
SUSC#
21
DNBSWON#
35
SUSON
LAN_POWER
112
66
67
SYS_I
68
AD_AIR
69
70
R5139 *0_4/S
71
THRM_MOINTOR1
72
EC_USB_CTRL2
73
EMU_LID
81
THRM_ALERT_HW#1
80
79
USB_CHARGER_ON
78
0310 CQ
Add net USB_CHARGER_ON
C5117
0.1U/16V_4
R5103 *0_4/S
R5108 33_4
C5118
0.1U/16V_4
1 2
+3V_ECACC
+3V_VSTBY
1 2
+3VPCU
EC_AOCS [31]
[41,44]
VRON
SUSACK#_EC [4]
MY16 [29]
MY17 [29]
AC_PRESENT_EC [4]
*10K_4
R17738
R5100 *0_4
PCI_SERR# [10]
[4,16,37..39]
HWPG
[10]
CLKRUN#
SUSWARN#_EC
EC_PECI (50ohm)
Trace Length: <0.5 iches
EC_PECI
GPUT_DATA
[36]
MBCLK
[36]
MBDATA
[10,18]
MBCLK2
[10,18]
MBDATA2
PWR_LED#
MBATLED0# [29]
TP8624
TP8571
FAN1_PWM [29]
VOLMUTE#
0311 CQ
Del CAPSLED#
[29]
FAN1SIG
DGPU_PROCHOT#
EC_USB_CTRL3
TEMP_MBAT
NBSWON1#
[4,16]
SUSC#
DNBSWON#
SUSON [38,40,45]
LAN_POWER [45]
R5113 *0_4/S
SYS_I [36]
[36]
AD_AIR
THRM_MOINTOR2
THRM_MOINTOR1
EC_USB_CTRL2
[25]
EMU_LID
USB_CHARGER_ON
C5113
1U/6.3V_4
C5120
0.1U/16V_4
CLK_24M_KBC
HWPG
3
0310 CQ
EC member request
Change Pin 126 PCH_SLP_S0_N change to Pin 122
Follow G31 MV circuit Del DC_PROCHOT_OFF_R & DC_PROCHOT_OFF & R5104
Follow G31 reserve 10K PD at PCH_SLP_S0_N_R (R17738)
[4,16]
EC_PWROK
VC5100 *AVLC5S_4
TP5100
[4]
[2]
For GPU thermal
[22]
PCH_SLP_S0_N [4,16]
[36]
ACIN
DGPU_PROCHOT_EC# [22,46]
for Battery charge/charge
for DDR Thermal IC
0418 CQ
[31]
AC_LED_ON#
0307 CQ
[27]
[46]
[26]
0311 CQ
[36]
Change EC side net name
PCH_SLP_S0_EC to EC_USB_CTRL3 (Del TP5102)
[31]
[4]
0315 CQ
PIN48 EC_RTC_RST change to PIN67 (EC request)
[6]
[26]
0311 CQ
Change net name ADAPTER_SEL_EC to EC_USB_CTRL2
[26]
L5100
C5115
1000P/50V_4
L5102
C5119 0.1U/16V_4
3
TP
TP
EC_RTC_RST [13]
THRM_MOINTOR2
EC_SRTC_RST [13]
0413 CQ
Del THRM_MOINTOR3 , change to EC_SRTC_RST
HCB1608KF-181T15_S0_6
HCB1608KF-181T15_S0_6
R5137*10_4
[6]
C5100*10P/50V_4
+3VPCU
+3VPCU
2
EC_WRST
1 3
Q5101
METR3904-G
2
R5101 4.7K_4
2 1
D5101 MEK500V-40
R5105 10K_4
THRM_ALERT_HW#1
+3V
EC_PWROKOVT_DETC
+3VPCU
Open Drain need pu high
3
Q5102
*2N7002K
R5107 4.7K_4
2
Q5103
METR3904-G
2
C5109 220P/50V_4
13
1
DGPU_OVT#
DGPU_PWROK
+1.0V
PM_THRMTRIP#
[22]
[12,21,47]
[2]
H_PROCHOT#_EC
R5109
*10K_4
2
0311 CQ
Del ADAPTER_SEL_EC & AD_TYPE circuit
R5120 *10K_4
+3V
R5121 4.7K_4
R5123 4.7K_4
R5126 4.7K_4
R5128 4.7K_4
R5130 4.7K_4
R5132 100K_4
R5135 100K_4
R5136 100K_4
BOM:DIS only
2
GPIO33_EC
GPUT_CLK
GPUT_DATA
DGPU_PROCHOT_EC#
MBCLK2
MBDATA2
VRON
MAINON
SUSON
0509 CQ
Need PU (G31 power
+3VPCU
+3VS5
0711 CQ
Add R17756 10K for 1.8V_DEEP_SUS issue
PROJECT : LG9
PROJECT : LG9
PROJECT : LG9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
1
+3VPCU
R5102
100K_4
C5108
1U/6.3V_4
H_PROCHOT#
3
Q5104
2N7002K
1
CB
R5122 10K_4
R5124 4.7K_4
R5125 4.7K_4
R5129 47K/F_4
R5131 10K_4
R17756 10K_4
R5133 10K_4
EC (IT8987)
EC (IT8987)
EC (IT8987)
1
EC_WRST
C5110
*47P/50V_4
34
H_PROCHOT# [2,41]
)
NBSWON1#
MBCLK
MBDATA
LID_EC#
S5_ON
5VS5_ON
DNBSWON#
35 49Wednesday, July 20, 2016
35 49Wednesday, July 20, 2016
35 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 36
5
+3VPCU [6,13,29,31,34,35,37,44]
+5VPCU [37,45,48]
+BAT_RTC [13,31]
+VIN [25,37..39,41..44,46,47,49]
D D
+VA
CN2
1
J1-1
IN
2
IN
3
GND
4
GND
50300-00441-001
C C
PL34
*0_8/S
PL35
*0_8/S
PC341
0.1U/25V_4
PR324
0_4/P
PR327
0_4/P
+VAD
PQ54
EMB20P03V
6
7
8
PC343
0.1U/25V_4
PQ57
4
Q2
2 1
Q1
MMDT2907A
PV stage
B B
Place this ZVS close to
Diode away +VIN
15
2
3
4
IDEA_G
PR323
1M_4
3
65
PR3176
*0_4/P
1
2
PC349
0.1U/25V_4
PQ7705
AO3413
PR321
750K/F_4
VIN>22.5V (AC OVP)
VIN>17.2V (Enable Charging)
VIN>15.2V (AC present)
PR3173
*0_4/S
21
PD13
*1N4448WS-7-F
PR345
*75K/F_4
AD_AIR[35]
PC373
A A
*0.1U/16V_4
Place this cap
close to EC
PR353
*12.4K/F_4
5
Notes:
+VA+VA_AIR
For 4S pack
Stuff Block A + Ra
Ra = 69.8K (P/N:CS36982FB11)
+PRWSRC
MIN. BATV=7.2V
+VA_AIR
P4SMAFJ20A
2 1
3
+VAD
PV stage
4
PD6
H=1.1mm
PR326
2K_6
PR3175
240K/F_4
PV stage
PR340
22_8
+VAD
PR3171
1M_4
PR20
75K/F_4
4
+VAD
PQ56
AP0203GMT-HF
5
PC344
2200P/50V_4
BATDIS_G
+VA
PC366
0.47U/25V_6
PR346
430K/F_4
PR347
Ra
69.8K/F_4
PR18
1M_4
2
PR21
3.9K/F_4
Do Not add test pad on
BATDIS_G signal
3
D
S
2
1
G
4
PC345
0.1U/50V_6
PR330
4.02K/F_4
REGN6V
ACIN[35]
Vacdet=2.4V
2
PQ72
METR3904-G
1 3
PR334
100K/F_4
PR336
100K/F_4
PR341
*0_4/S
MBDATA BQDATA
MBCLK BQCLK
PR343
*0_4/S
PR13
88.7K/F_4
3
PQ3
2N7002K
1
+PRWSRC
PR331
4.02K/F_4
BQCMSRC
BQACDRV
ACIN
BQVCC
PC370
*0.1U/50V_6
+3VPCU
PR328
*0_2/S
PC357
0.1U/25V_4
3
4
5
20
8
9
CMSRC
ACDRV
ACPRES
VCC
SDA
SCL
PR350
100K/F_4
BQBATDRV
PR322
RC1206-R010
CSIP
2
0.1U/25V_4
ACP
ACDET
6
10
3
BQ24738H
ILIM
PR349
43.2K/F_4
3
CSIN
1
PU22
21
ACN
PR329
*0_2/S
PR318
4.02K/F_4
REGN6V
PC353
0.1U/25V_4
SI stage
D
5
PQ55
TPCA8064-H
BATDIS_ID_DOD
+VIN
PD8
*P4SMAFJ20A
2 1
H=1.1mm
Place this ZVS close to
Far-Far away +VIN
PC359
1U/16V_4
16
18
HIDRV
REGN
BQB_2 BQB_1
17
BTST
19
PHASE
15
LODRV
14
GND
21
GND
22
GND
23
GND
24
GND
25
GND
13
BQSRP
SRP
12
BQSRN
SRN
11
BQBATDRV
BATDRV
IOUT
7
BQIOUT
PR351
300_4
PC371
100P/50V_4
+BATCHG
3
S
2
1
G
BQHIDRV
BQPHASE
BQLODRV
Place this R&C
close to EC
4
PR333
1_6
PC372
2200P/50V_4
PC346
0.01U/50V_4
PD11
MEK500V-40
PR342
10/F_6
PR344
5.6/F_6
SYS_I [35]
21
PC360
0.047U/25V_4
PQ61
EMB20N03V
PC367
0.1U/25V_4
PC369
0.1U/25V_4
REGN6V
2
PC342
0.1U/25V_4
35241
35241
PC368
0.1U/25V_4
2
PL33
*0_8/S
PL36
*0_8/S
678
678
PC347
0.1U/25V_4
MBDATA[35]
MBCLK[35]
PC350
*100P/50V_4
PC355
4.7U/25V_8PC358
PQ59
EMB20N03V
PR337
*2.2_6
PC365
*2200P/50V_4
PR319
330_4
PD9
*PDZ5.6B
PL37
4.7uH/5.5A
2 1
2 1
PC356
0.1U/25V_4
BQLR
CSOP
CSON
1
7
8
BATT+
3
SMD
4
SMC
PR320
330_4
PD10
*PDZ5.6B
+VIN
RC1206-R010
PR338
*0_2/S
NB5
NB5
NB5
PC351
*100P/50V_4
PC354
2200P/50V_4
B_TEMP_MBAT
PR315
200K/J_4
PR316
1K/F_4
PC340
0.01U/50V_4
PR335
21
PR339
*0_2/S
BATSHIP[35]
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
5
+3VPCU
SI: For battery in detect
PC339
0.01U/50V_4
Place this cap
close to EC
PC361
PC362
10U/25V_8
10U/25V_8
+BATCHG
PR352
470_8
3
2
PQ62
2N7002K
1
Charger(BQ24738H)
Charger(BQ24738H)
Charger(BQ24738H)
1
36
15"
CN1
50458-00801-V02
BATT+
BATT+
SMD
SMC
TS
GND
B/I6GND
PR3174 *0_4/S
PV stage
TEMP_MBAT [35]
+BATCHG
PC363
0.1U/25V_4
1
2
2 1
36 49Wednesday, July 20, 2016
36 49Wednesday, July 20, 2016
36 49Wednesday, July 20, 2016
PD12
*MEK500V-40
of
of
1A
1A
1A
Page 37
5
DC/DC +3VS5/+5VS5
4
3
2
1
+VIN [25,36,38,39,41..44,46,47,49]
+3VS5 [4,10,15,16,27,31,32,35,38..40,44,45,48]
+5VS5 [4,26,32,38..43,45..48]
+3VPCU [6,13,29,31,34..36,44]
+5VPCU [45,48]
D D
HWPG[4,16,35,38,39]
+3VPCU
PD5
C C
B B
*UDZVTE-173.6B
PR156
*4.99K/F_4
PR157
*4.02K/F_4
2 1
SY8208CEN
2
PQ10
*METR3904-G
1 3
PV stage: support USB charge
5VS5_ON[35]
S5_ON[35]
USB Charge Support
A A
VINE (No support)
ENVY (Support)
5
Do Not add test pad on VCC & LDO pin
+3VS5
PV stage
PR288
10K/F_4
PV stage
+VIN
S5_ON
PR285
*0_4/S
PR284
499K/F_4
PR290
1M_4
PR286
*0_4/S
PC313
2.2U/10V_4
SY8208BPGHWPG
SY8208BEN
PR283
150K/F_4
+3VPCU
PC310
*0.1U/16V_4
Do Not add test pad on VCC & LDO pin
PC309
2.2U/10V_4
PV stage
PR280
*0_4/S
SY8208CPGHWPG
PR278
1K/F_4
Rb
PR277
Ra
*1K/F_4
PR279
1M_4
SY8208CEN
PC305
*0.1U/16V_4
2.2U/10V_4
RbRa
Stuff NA
NA Stuff
4
PU19
5
LDO
2
PGOOD
1
EN1
7
EN2
SY8208B
+5VPCU
PC307
PU18
7
LDO
2
PGOOD
1
EN
5
VCC
SY8208C
Do Not add test pad
on VCC & LDO pin
GND
VOUT
BST
+3.3 Volt +/- 5%
TDC:8A
EDP:9A
+3VS5
PC304
PC141
0.1U/16V_4
*22U/6.3V_8
+5 Volt +/- 5%
TDC:8A
EDP:9A
+5VS5
PC285
PC287
0.1U/16V_4
*22U/6.3V_8
PJP3
*POWER_JP/S
1 2
PC142
22U/6.3V_8
PJP2
*POWER_JP/S
1 2
PC139
22U/6.3V_8
PC143
PC140
22U/6.3V_8
22U/6.3V_8
PC138
PC288
22U/6.3V_8
22U/6.3V_8
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet
Date: Sheet
3/5VPCU(RT8243A)
3/5VPCU(RT8243A)
3/5VPCU(RT8243A)
1
PC303
4.7U/25V_8
PR289
0_6
SY8208BBST_S
PC298
0.1U/25V_4
PR282
0_6
+VIN_3VS5
PC302
4.7U/25V_8
PR287
1K/F_4
PC295
4.7U/25V_8
SY8208CBST_S
PR281
1K/F_4
3
PC301
2200P/50V_4
0.1U/25V_4
8
VIN
PC300
9
0.1U/25V_4
6
SY8208BBST
10
SY8208BSW
SW
4
SY8208BVOUT
3
GND
BST
VOUT
SY8208BFBSY8208BLDOEN
8
VIN
9
6
SY8208CBST
10
SY8208CSW
SW
4
SY8208CVOUT
3
SY8208CFB
FB
FB
PL8
*0_8/S
PC314
+VIN_5VS5
PC144
4.7U/25V_8
PC308
0.1U/25V_4
+VIN
PC147
EC22
0.1U/25V_4
PL30
2.2uH/8A(PCMC063T-2R2MN)
7x7x3mm
PR274
*2.2_6
PC297
*2200P/50V_4
PC312
0.01U/50V_4
+VIN
PL7
*0_8/S
PC299
2200P/50V_4
PL29
2.2uH/8A(PCMC063T-2R2MN)
7x7x3mm
PR155
*2.2_6
PC145
*2200P/50V_4
6800P/50V_4
*1000P/50V_4
PC306
PC146
0.1U/25V_4
PR154
*0_2/S
PR153
*0_2/S
12
+
+5VS5_S
12
+
+3.3VS5_S
PC296
*150U/6.3V_3528
PC292
*150U/6.3V_5X3.8 ESR20
2
37
37 49Wednesday, July 20, 2016
37 49Wednesday, July 20, 2016
37 49Wednesday, July 20, 2016
of
of
1A
1A
1A
Page 38
1
+VIN [25,36,37,39,41..44,46,47,49]
+5VS5 [4,26,32,37,39..43,45..48]
+1.2VSUS [3,6,17,18,40,48]
DDR_VTT [17,18]
PR303
HWPG[4,16,35,37,39]
A A
PV:For 2.5VSUS sequence
SUSON[35,40,45]
DDR_VTT_PG_CTRL_R[18]
MAINON[26,35,40,45]
PR309
*0_4
PR305
*0_4/S
*0_4/S
PR308
75K/F_4
PD27 MEK500V-40
PC334
*0.1U/16V_4
PV stage
DDR_VTT
PC329
10U/6.3V_6
( 3mA )
B B
DDR_VTTREF
PR301
100/F_4
PC332
0.1U/16V_4
PC330
0.033U/25V_4
+1.2VSUS
21
2
PV stage
PC333
0.1U/16V_4
20
2
1
4
19
PC328
*10U/6.3V_6
+5VS5
VTT
VTTSNS
VTTGND
VTTREF
VLDOIN
PR300
*0_2/S
PR302
*0_2/S
1P35V_S3
7
LPMB
3
1P35V_S5
1P35V_PGOOD
10
S58S3
PU21
G5619RZ1U
VID
14
11
1P35V_VID
PGOOD
PGND
1P35V_CS
13
CS
FB
6
1P35V_FB
PR299
243K/F_4
1P35V_TON
9
TON
PAD
VDDQ
5
21
1P35V_VDDQ
UGATE
BOOT1
PHASE
LGATE
VDD
17
18
16
15
12
PR304
499K/F_4
1P35V_UGATE
1P35V_BOOT
1P35V_PHASE
1P35V_LGATE
1P35V_VDD
PC331
1U/6.3V_4
PR298
2.2_6
+5VS5
3
4
5
38
+VIN+VIN_DDR
PC327
0.1U/25V_4
PQ49
EMB20N03V
PQ48
AON7752
Rds(on) 14m ohm
35241
35241
PL9
PC326
678
0.1U/25V_4
678
PR166
*2.2_6
PC171
*2200P/50V_4
PC176
PC324
4.7U/25V_8
4.7U/25V_8
PL32
1uH/11A(PCMC063T-1R0MN)
7x7x3mm
*0_8/S
PC325
2200P/50V_4
PC173
0.1U/25V_4
+1.2VSUS_S
PR297
*0_2/S
+1.2VSUS +/- 5%
Countinue current:6A
Peak current:8A
OCP minimum:12A
+1.2VSUS
PJP4
*POWER_JP/S
1 2
PC321
PC319
PC323
22U/6.3V_8
22U/6.3V_8
0.1U/16V_4
PC320
*22U/6.3V_8
PC322
*22U/6.3V_8
PR307
PR306
10K/F_4
C C
7.87K/F_4
+2.5VSUS +/- 3%
+3VS5
PV stage
PR3163
*0_4/S
SUSON
*0.1U/16V_4
D D
PC5371
PC5370
10U/6.3V_6
HWPG
0.1U/16V_4
+5VS5
PC5368
1U/6.3V_4
PC5369
PR3164
*0_4/S
PU23
3
VIN
YB1282PSP
2
EN
VDD4GND
1
PGD
ADJ
7
VOUT
GND1
R1
R2
PR3162
100K/F_4
NC
5
6
8
9
PR3161
215K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PV stage
1
2
3
Countinue current:2A
Peak current:3A
OCP minimum:4A
+2.5VSUS
PC5367
*10U/6.3V_6
PC5372
0.1U/16V_4
4
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
NB5
Date: Sheet of
Wednesday, July 20, 2016
Date: Sheet of
Wednesday, July 20, 2016
Date: Sheet of
Wednesday, July 20, 2016
DDR3 (RT8231B)/1.8VS5
DDR3 (RT8231B)/1.8VS5
DDR3 (RT8231B)/1.8VS5
5
38 49
38 49
38 49
1A
1A
1A
Page 39
5
+VIN [25,36..38,41..44,46,47,49]
+3VS5 [4,10,15,16,27,31,32,35,37,38,40,44,45,48]
+5VS5 [4,26,32,37,38,40..43,45..48]
+1.0V_DEEP_SUS [9,15,16,40]
+1.8V_DEEP_SUS [5,9,15]
D D
PV stage
HWPG[4,16,35,37,38]
SLP_SUS_ON[15,35,40]
C C
PV stage
HWPG
PR259
*0_4/S
+5VS5
PR257
*0_2/S
PR260
*0_4/S
4
PC277
4.7U/6.3V_4
SI stage
1237PFMPCH
1237ENPCH
1237SSPCH
PR261
*0_4
1237PGPCH
PC280
*0.1U/16V_4
PC281
0.1U/16V_4
PU16
7
NC
21
VCC
1
PGOOD
3
PFM
2
EN
23
SS
AOZ2260QI-18
3
2
1
39
PR262
84.5K/F_4
6
8
IN
9
TON
IN
22
BST
PGND
PGND
PGND
PGND
PGND
AGND
IN
LX
LX
LX
LX
LX
FB
20
1237BSTPCH
10
11
16
17
18
12
13
14
15
19
4
5
1237FBPCH
1237LX
PR251
0_6
PC279
0.1U/25V_4
PR264
10K/F_4
PC136
1237BSTPCH_S
PR263
2.61K/F_4
4.7U/25V_8
PC135
4.7U/25V_8
PC269
0.1U/25V_4
1237FBPCH_S
+VIN_0.95V +VIN
PL6
*0_8/S
PC278
2200P/50V_4
1uH/11A (PCMC063T-1R0MN)
PR249
*2.2_6
PC267
*2200P/50V_4
7x7x3mm
PC137
0.1U/25V_4
PL28
PR252
*0_2/S
(V1.00A+V1.00_MODPHY+VccPRIM_CORE)
+1.0VS5 Volt +/- 5%
Countinue current:6A
Peak current:9A
+1.0V_DEEP_SUS
PC272
PC263
0.1U/16V_4
22U/6.3V_8
PC273
22U/6.3V_8
PC274
*22U/6.3V_8
PC271
*22U/6.3V_8
+
PC266
*220u/2V_7343
+1.8V_DEEP_SUS +/- 5%
+3VS5
B B
SLP_SUS_ON
PV stage
PR3159
*0_4/S
PC5365
*0.1U/16V_4
PC5364
10U/6.3V_6
HWPG
0.1U/16V_4
+5VS5
PC5362
1U/6.3V_4
PC5363
PR3160
*0_4/S
PU20
3
VIN
YB1282PSP
2
EN
VDD4GND
1
PGD
ADJ
7
VOUT
GND1
R1
R2
PR3158
100K/F_4
NC
5
6
8
9
PR3157
127K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PV stage
A A
5
4
Countinue current:1.0A
Peak current:3A
+1.8V_DEEP_SUS
3
PC5366
0.1U/16V_4
PC5361
*10U/6.3V_6
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
2
Date: Sheet of
+1.1VS5 (RT8228)/2.5V
+1.1VS5 (RT8228)/2.5V
+1.1VS5 (RT8228)/2.5V
1
39 49Wednesday, July 20, 2016
39 49Wednesday, July 20, 2016
39 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 40
5
+1.0V [2,4,6,16,34,35]
+3VS5 [4,10,15,16,27,31,32,35,37..39,44,45,48]
+5VS5 [4,26,32,37..39,41..43,45..48]
+VCCIO [6,16]
+1.2VSUS [3,6,17,18,38,48]
+VCCSTPLL [2,4..6,9,13,41]
+1.0V_DEEP_SUS [9,15,16,39]
+1.2V_VCCPLL_OC [6]
MAINON [26,35,38,40,45]
4
3
2
1
40
Volume Segment
Vcc_STG: 0.04A
D D
+1.0V_DEEP_SUS +VCCSTPLL
PC131
0.1U/16V_4
C C
Volume Segment
Vcc_ST: 0.12A
Vcc_PLL: 0.12A
<= 10ms, full load ready
(Vcc_ST+Vcc_PLL)
Imax:0.24A
PR143
*0_6/S
PC130
*10U/6.3V_6
[26,35,38,40,45]
MAINON
MAINON
+1.0V_DEEP_SUS
PC284
1U/6.3V_4
+3VS5
PC291
0.1U/16V_4
PR276
*0_4/S
PV stage
PU17
AOZ1335DI
1
2
9
3
4
PC294
*0.1U/16V_4
VIN
VIN
VIN
VBIAS
ON
VOUT
GND
8
5
Imax:3.4A
PC290
0.1U/16V_4
Vcc_IO: 3.4A
<= 10ms full load ready
+VCCIO
PC293
*10U/6.3V_6
PR268
*0_6/S
Imax:0.04A
+1.0V
2015/10/26 updated
+3VS5
1
2
3 5
PC275
0.1U/16V_4
PR255
47K/F_4
4
PU15
MC74VHC1G08DFT2G
PC276
*1000P/50V_4
PV stage
PR244
SUSON[35,38,45]
SLP_SUS_ON[15,35,39]
B B
A A
5
*0_4/S
PR247
*0_4/S
4
2
PQ44B
*2N7002KDW
3
+1.2VSUS
2
61
3
1
+5VS5
PC268
0.1U/16V_4
PQ45
DMG3414U-7
PC270
0.1U/16V_4
+1.2V_VCCPLL_OC
PR253
*1M_4
5
PR254
*2M_4
<= 240us, full load ready
+1.2V_VCCPLL_OC
PR240
*0_6/S
PC265
*10U/6.3V_6
PR243
*22_8
34
PQ44A
*2N7002KDW
TDC:0.26A
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
2
Date: Sheet of
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
+1.0V/+VCCSTPLL
1
40 49Wednesday, July 20, 2016
40 49Wednesday, July 20, 2016
40 49Wednesday, July 20, 2016
1A
1A
1A
of
of
Page 41
5
+3V [2,4,10..13,15..21,25..27,29,30,32,33,35,45,46]
+5V [26,27,29,45]
+VIN [25,36..39,42..44,46,47,49]
+5VPCU [37,45,48]
+VCCSA [6,43]
+VCCGT [7,42]
+VCCSTPLL [2,4..6,9,13,40]
D D
+VCCSA
VCCSA_SENSE[6]
VSSSA_SENSE[6]
+VCCGT
VCCGT_SENSE[7]
VSSGT_SENSE[7]
C C
Place close to
GT Inductor
Re
U22 N/A
U23e
210K
GT_CSP1[42]
GT_CSP2[42]
GT_CSN1[42]
GT_CSN2[42]
B B
A A
U22 N/A
U23e
10-ohm
U22 0-ohm
U23e
U22 N/A
U23e
Rf
Rf
Rb
N/A Rb
Rc
4.02K Rc
5
Rd
U22 143K
U23e
210K
SI stage
PR72
Rd
143K/F_4
PR73
Re
*210K/F_4
PR81
10/F_4
PR82
*10/F_4
PC86
0.01U/50V_4 PC90
PV stage
+5VS5
GT_CSP2
GT_CSP1
PR74
165K/F_4
PC76
0.022U/25V_4
PR71 *0_4/S
PR77 *4.02K/F_4
PR76
4.02K/F_4
Ca
PC77
*0.022U/25V_4
PR231
1 2
220K_4 NTC
PR75
73.2K/F_4
PC78
470P/50V_4
PR145
100/F_4
PR146
100/F_4
PR265
100/F_4
PR267
100/F_4
1 2
U22 N/A
U23e
PMON
U22Ra14K
U23e
PC81
*1000P/50V_4
PR83
PR219
13K/F_4
100K/F_4 NTC
place close to
GT MOSFET
Ca
0.022U
4
PV stage
PR101
*0_4/S
PR106
*0_4/S
PR95 *0_4/S
PV stage
PR92 *0_4/S
49.9/F_4
270P/25V_4
Ra
16.2K
PC87
10P/50V_4
PR87
*0_4/S
PV stage
4
PC97
1000P/50V_4
*100P/50V_4
PR89
*0_4
PR79
PC80
PR84
14K/F_4
+VIN
0.1U/16V_4
this +VIN net should
tie to input CAP
+5VS5
PC83
PR90
25.5K/F_4
PC94
1000P/50V_4
VSNN_2ph
PR85
1K/F_4
PR78
3K/F_4
PC79
2200P/50V_4
3
PC95
1000P/50V_4
VSPP_1b
PR97
2.74K/F_4 PR137
PC99
1000P/50V_4
PR93
1K/F_4
PC91
1000P/50V_4
U22
U23e
PR80
30.1K/F_4
IOUT_2ph
10
11
12
PC89
0.01U/50V_4
U22 48.7K
U23e
PR105
1K/F_4
Rk
30.1K
25.5K
PC88
470P/50V_4
1
IOUT_2ph
2
DIFFOUT_2ph
3
FB_2ph
4
COMP_2ph
5
ILIM_2ph
6
CSCOMP_2ph
7
CSSUM_2ph
8
CSREF_2ph
9
CSP2_2ph
CSP1_2ph
TSENSE_2ph
VRMP
81208_VCC
PC92
1U/6.3V_4
PR91
30.1K/F_4
100K
PSYS_81208
VSN_2ph
VSP_2ph
47
48
46
49
TAB
PSYS
VSP_2ph
VSN_2ph
13
ROSC_SAUS
ROSC_COREGT
PR96
30.1K/F_4
Rg
VSNN_1b
CSREF_2ph
TSENSE_2ph
PR86
1K/F_4
Rk
DIFFOUT_2ph
FB_2ph
COMP_2ph
ILIM_2ph
CSCOMP_2ph
CSSUM_2ph
CSP_2ph
CSP_1ph
PR88
2.2_6
VSP_1b
VSN_1b
COMP_1b
44
45
43
VSP_1b
VSN_1b
PU7
NCP81208
PWM2_2ph17PWM1_2ph
16
ICCMAX_2ph
PR111
34K/F_4
CSP_1b_N
ILIM_1b
41
40
42
ILIM_1b
CSP_1b
CSN_1b
COMP_1b
ADDR_VBOOT21ICCMAX_1b20ICCMAX_1a19ICCMAX_2ph18RSOC_SAUS15ROSC_COREGT14VCC
ICCMAX_1a
ICCMAX_1b
ADDR_VBOOT
Rg Rh
PR98
48.7K/F_4
3
0.01U/50V_4
PC109
0.015U/25V_4
39
IOUT_1b
PWM_1a22TSENSE_1ph
PC102
PC105
1000P/50V_4
VR_RDY
VREN
38
37
EN
VR_RDY
PWM_1b
DRVON
ALERT#
VR_HOT#
IOUT_1a
CSP_1a
CSN_1a
ILIM_1a
COMP_1a
VSN_1a
VSP_1a
23
24
VSP_1a
TSENSE_1ph
PR102
90.9K/F_4
U22
U23e
PC101
15P/50V_4
SI stage
PV stage
PC120
*0.1U/16V_4
36
35
34
SCLK
33
32
SDIO
31
30
29
28
27
26
25
PR103
15.8K/F_4
Rh
90.9K
100K
PR107
1K/F_4
PC108
2200P/50V_4
PR123
100K/F_4
PC115
470P/50V_4
SCLK
ALERT#
SDIO
VR_HOT#
IOUT_1a
ILIM_1a
COMP_1a
VSN_1a
Ri
PR112
2K/F_4
PR109
10K/F_4
PWM2_2ph [42]
PWM1_2ph [42]
1 2
PR116
14K/F_4
PR132
*0_4/S
PR131 49.9/F_4
PR130 *0_4/S
PR129 10/F_4
PR128 75/F_4
PC116
1000P/50V_4
PR121
1K/F_4
PR115
1.27K/F_4
PC107
1000P/50V_4
PR110 *0_4/S
PC104
0.1U/16V_4
PWM_1a [43]
CSN_1b [43]
PR236
100K/F_4 NTC
Place close to
VCCSA Inductor
PR117
7.5K/F_4
PR125
*0_4/S
VRON [35,44]
PV stage
PV stage
PC122
470P/50V_4
SW_1b [43]
PR141
37.4K/F_4
SI stage
U22
U23e
PR122
*0_4/S PR124
PC111
1000P/50V_4
PR120
*0_4/S
PV stage
PR113
13K/F_4
1 2
2
PR126
10K/F_4
IMVP_PWRGD
PWM_1b [43]
DRVON [42,43]
VR_SVID_CLK [5]
VR_SVID_ALERT# [5]
VR_SVID_DATA [5]
H_PROCHOT# [2,35]
Rh
37.4K
??K
PV stage
VSS_SENSE [5]
VCC_SENSE [5]
PV stage
PR229
100K/F_4 NTC
place close to
VCORE MOSFET
2
+3V
IMVP_PWRGD [44]
PC121
*0.033U/25V_4
PC112
15P/50V_4
PC124
0.015U/25V_4
+VCCSTPLL
PR135
100/F_4
PR140
7.5K/F_4
PR142
14K/F_4
1
PR136
*75/F_4
PC110
0.01U/50V_4
1K/F_4
NB5
NB5
NB5
PR134
PC123
*75/F_4
45.3/F_4
SW_1a [43]
Place close to
VCORE Inductor
PR235
100K/F_4 NTC
1 2
Rj
PR127
17.4K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
0.1U/16V_4
VR_SVID_DATA
VR_SVID_ALERT#
VR_SVID_CLK
H_PROCHOT#
CSN_1a [43]
PC114
1000P/50V_4
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
CPU VR IC (NCP81206)
CPU VR IC (NCP81206)
CPU VR IC (NCP81206)
1
41
41 49Wednesday, July 20, 2016
41 49Wednesday, July 20, 2016
41 49Wednesday, July 20, 2016
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of
2A
2A
2A
Page 42
5
+5V [26,27,29,45]
+VIN [25,36..39,41,43,44,46,47,49]
+5VPCU [37,45,48]
+VCCGT [7,41]
4
3
2
1
42
+VIN_VCCGT +VIN
D D
PC126
PR67
1_6
GT_HG GT_HGR
8
PV stage
PR60
*0_4/S
+5VS5
PC74
2.2U/10V_4
DRVON[41,43]
PR59
*0_4/S
PWM1_2ph[41]
PC64
*0.1U/16V_4
PV stage
C C
PU5
1
DRVH
NCP81151
GND6PAD
9
DRVL
BST
7
SW
5
2
PWM
3
EN
4
VCC
GT_BST1
GT_SW
GT_LG
PC75
0.1U/25V_6
PQ66
FDPC5030SG
PC5383
4
D1
G1
1
S1
2
G2
8
S2
PC5381
GT_HGR
SW
5
GT_SW
6
7
*FDPC5030SG
10
PC5382
PQ67
G1
1
S1
2
G2
8
PC5378
D1
PC241
4
4.7U/25V_8
SW
5
GT_SW
6
7
PR217
*2.2_6
S2
PC217
10
*2200P/50V_4
PC5377
PC5379
PC127
4.7U/25V_8
4.7U/25V_8
DCR=1.9m-ohm+/-7%
+VCCGT
PL21
7x7x3mm
PR224
*0_2/S
PC5380
0.15uH/26A(PCMS063T-R15MN1R9)
PC237
PC238
0.1U/25V_4
*4.7U/25V_8
PR227
*0_2/S
GT_CSN1 [41]
GT_CSP1 [41]
H/W side output CAP list
47U/6.3V_0805 X 6
22U/6.3V_0603 X 12 (GTX+5)
10U/6.3V_0402 X 10
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
1U/6.3V_0402 X 12
For U23e --> Add These Components
+VIN_VCCGT_S2
PC85
PC84
PC221
B B
8
PU6
PWM
EN
VCC
*NCP81151
GND6PAD
9
DRVH
DRVL
2
3
4
DRVON
PR61
*0_4
PWM2_2ph[41]
PC66
*0.1U/16V_4
PR62
*0_4
+5VS5
PC70
*2.2U/10V_4
PR70
*1_6
GT_HG2 GT_HGR2
PC71
*0.1U/25V_6
GT_BST2
1
BST
GT_SW2
7
SW
GT_LG2
5
*FDPC5030SG
PQ68
4
D1
G1
1
S1
2
G2
8
GT_HGR2
SW
5
GT_SW2
6
7
*FDPC5030SG
S2
10
PQ69
D1
G1
1
S1
2
G2
8
PC222
4
*4.7U/25V_8
*4.7U/25V_8
*4.7U/25V_8
DCR=1.9m-ohm+/-7%
SW
5
6
7
S2
10
*0.15uH/26A(PCMS063T-R15MN1R9)
GT_SW2
PR216
*2.2_6
PC215
*2200P/50V_4
7x7x3mm
PR223
*0_2/S
PL20
PC93
*4.7U/25V_8
*0.1U/25V_4
PR228
*0_2/S
PC239
2200P/50V_4
PL3
*0_8/S
PC225
*2200P/50V_4
PC235
0.1U/16V_4
GT_CSN2 [41]
GT_CSP2 [41]
PL5
*0_8/S
PC119
0.1U/25V_4
12
+
PC243
220U/2.5V_5X3.8H
ESR=12m-ohm ESR=12m-ohm
+VCC_GT
U-line 22 (15W)
TDC:18A(22)
Icc max:31A(22)
L/L=3.1mV/A
U-line 23e(28W)
TDC:35A(23e)
Icc max =64A(GT+GTx)
L/L=2mV/A
+VIN
PC82
0.1U/25V_4
+VCCGT
12
+
PC245
*220U/2.5V_5X3.8H
ESR=12m-ohm
+VCCGT
12
+
PC244
*220U/2.5V_5X3.8H
+
PC382
*330u_2.5V_7343_h=1.4
A A
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
+VCCSA (NCP81253)
+VCCSA (NCP81253)
+VCCSA (NCP81253)
1
42 49Wednesday, July 20, 2016
42 49Wednesday, July 20, 2016
42 49Wednesday, July 20, 2016
2A
2A
2A
of
of
Page 43
5
CPU CORE
+VIN [25,36..39,41,42,44,46,47,49]
+5VPCU [37,45,48]
+VCCSA [6,41]
+VCC_CORE [5]
D D
PV stage
PR138
PC118
*0.1U/16V_4
*0_4/S
+5VS5
PC117
2.2U/10V_4
DRVON[41,42]
PWM_1a[41]
PR133
*0_4/S
PV stage
C C
PU8
2
PWM
3
EN
4
VCC
NCP81253
GND6PAD
9
4
PR139
1_6
VCORE_HGRVCORE_HG
8
1
DRVH
BST
7
SW
5
DRVL
VCORE_BST
VCORE_SW
VCORE_LG
PC125
0.1U/25V_6
PQ1
FDPC5030SG
4
D1
G1
1
S1
2
G2
8
VCORE_HGR
SW
5
VCORE_SW
6
7
*FDPC5030SG
S2
10
3
+VIN
12
+
PC5385
*15U/25V_H=4.5
+VIN_VCC_CORE +VIN
PC98
PC229
4
PQ65
D1
G1
1
S1
2
G2
8
S2
4.7U/25V_8
4.7U/25V_8
SW
5
VCORE_SW
6
7
PR230
2.2_6
10
PC234
2200P/50V_4
12
+
PC5384
*15U/25V_H=4.5
PC103
PC231
4.7U/25V_8
*4.7U/25V_8
DCR=1.9m-ohm+/-7%
0.15uH/26A(PCMS063T-R15MN1R9)
PL23
7x7x3mm
PR233
*0_2/S
PC232
0.1U/25V_4
12
+
PC5387
*15U/25V_H=4.5
PR232
*0_2/S
PC106
2200P/50V_4
2
Reserve for Acoustic
12
+
PC5386
*15U/25V_H=4.5
PL4
*0_8/S
PC113
0.1U/25V_4
+
PC383
*330u_2.5V_7343_h=1.4
CSN_1a [41]
SW_1a [41]
PC5375
22U/6.3V_8
12
+
+
PC5389
*15U/25V_H=4.5
For Acoustic
12
+
PC242
*15U/25V_H=4.5
12
PC236
*220U/2.5V_5X3.8H
PC5373
22U/6.3V_8
12
+
PC5388
*15U/25V_H=4.5
12
+
PC240
15U/25V_H=4.5
+VCC_CORE
+VCC_CORE
PC5374
*22U/6.3V_8
12
+
PC250
*220U/2.5V_5X3.8H
PC5376
*22U/6.3V_8
1
43
+VCC_CORE
U-line 22(15W)
TDC:21A
Icc max:29A
L/L=2.4mV/A
U-line 23e(28W)
TDC:23A
Icc max:32A
L/L=2.4mV/A
VCCSA
+VIN_VCCSA +VIN
B B
PR237
1_6
PV stage
PR242
PC262
*0_4/S
+5VS5
PC258
2.2U/10V_4
2
3
4
PWM_1b[41]
DRVON
PR241
*0_4/S
*0.1U/16V_4
PV stage
A A
5
PU14
PWM
EN
VCC
NCP81253
GND6PAD
9
4
8
VCCSA_BST
1
DRVH
BST
VCCSA_SW
7
SW
VCCSA_LG
5
DRVL
VCCSA_HGRVCCSA_HG
PC257
0.1U/25V_6
PQ43
AON7752
35241
35241
678
678
PC253
PQ42
EMB20N03V
PR248
*2.2_6
PC264
*2200P/50V_4
PC129
4.7U/25V_8
4.7U/25V_8
DCR=4.2m ohm(max)
PL27
0.47uH/17.5A(PCMC063T-R47MN)
7x7x3mm
PR239
*0_2/S
3
PC252
0.1U/25V_4
PC128
2200P/50V_4
PR238
*0_2/S
PL26
*0_8/S
PC256
22U/6.3V_8
CSN_1b [41]
SW_1b [41]
PC251
0.1U/25V_4
PC261
22U/6.3V_8
PC260
*22U/6.3V_8
+VCCSA
U-line 22&23e
TDC:5A
Icc max:5A
L/L=10.5mV/A
PC259
PC254
*22U/6.3V_8
*22U/6.3V_8
2
+VCCSA
PC255
*22U/6.3V_8
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet of
+VCORE/VCCSA (NCP81253)
+VCORE/VCCSA (NCP81253)
+VCORE/VCCSA (NCP81253)
1
43 49Wednesday, July 20, 2016
43 49Wednesday, July 20, 2016
43 49Wednesday, July 20, 2016
of
of
Page 44
5
4
3
2
1
+VIN [25,36..39,41..43,46,47,49]
+3VPCU [6,13,29,31,34..37]
+VCC_EOPIO [5]
+VCC_EDRAM [5]
+3VS5 [4,10,15,16,27,31,32,35,37..40,45,48]
D D
+VCC_EDRAM +/- 5%
Countinue current:4.5A
44
Peak current:6A
PR100
*0_4/S
+3VS5
+3VPCU+3VPCU
PR218
*10K/F_4
C C
PR118
*10K/F_4
EDRAM_LP#EDRAM_C1
VRON[35,41]
[9]
[5]
VID1_VCC_EDRAM
[5]
VID0_VCC_EDRAM
IMVP_PWRGD[41]
PR108
*0_4
LP#
NB681_3V3_EDRAM
PR104
*1M/F_4
PC96
*0.1U/16V_4
NB681EN_EDRAM
PR119 *0_4
PR220 *10K/F_4
PR221 *10K/F_4
PR94
*0_4
PC230
*1U/6.3V_4
PR99
*0_4/S
EDRAM_LP#
EDRAM_C1
EDRAM_C0
PR222
*10K/F_4
PU13
10
3V3
11
AGND
5
EN
6
LP#
3
C1
4
C0
13
PG
*NB681AGD-Z
PGND
MODE
VOUT
VIN
BST
SW
NB681_VIN_EDRAM
1
PC227
*0.1U/25V_4
2
NB681BST_EDRAM
9
NB681SW_EDRAM
8
*100K/F_4
7
NB681VOUT_EDRAMNB681PG_EDRAM
12
PC226
*4.7U/25V_8
PR226
*0_6
PC233
*0.22U/25V_6
PC223
*4.7U/25V_8
*1uH/11A(PCMC063T-1R0MN)
PR114
*2.2_6
PC100
*2200P/50V_4PR225
PC228
*2200P/50V_4
PL22
PR234
PL19
*0_6/S
*0_2/S
+VIN
PC220
0.1U/25V_4
PC249
0.1U/16V_4
PC246
*22U/6.3V_6
PC247
*22U/6.3V_6
+VCC_EDRAM +VCC_EOPIO
PR3172
*POWER_JP/S
1 2
PC248
*22U/6.3V_6
VCC_EDRAM
LP# C1 C0 Vout
B B
0
1
1
1
1
A A
5
4
X
0
0
1
1
X
0
1
0
1
0
0.8
0.95
1.0
1.05
MODE
VR rail Resistor
M1
M2
M3
M4
3
VCCIO
0
PRIMCORE Float
EDRAM/EOPIO
other
100K
150K
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
2
Date: Sheet of
+VCC_EDRAM (NB681)_23E
+VCC_EDRAM (NB681)_23E
+VCC_EDRAM (NB681)_23E
1
44 49Wednesday, July 20, 2016
44 49Wednesday, July 20, 2016
44 49Wednesday, July 20, 2016
of
of
Page 45
5
+3V [2,4,10..13,15..21,25..27,29,30,32,33,35,41,46]
+5V [26,27,29]
+VIN [25,36..39,41..44,46,47,49]
+3VS5 [4,10,15,16,27,31,32,35,37..40,44,48]
+5VS5 [4,26,32,37..43,46..48]
+3VSUS [29]
+5VPCU [37,48]
+3VLANVCC [33,34]
D D
4
3
2
1
45
PC159
*10U/6.3V_6PC160
PR158
*0_4/S
PV stage
+5VS5
PC158
0.1U/16V_4
PC154
0.1U/16V_4
PC148
0.1U/16V_4
13
14
4
3
PC150
*0.1U/16V_4
220P/50V_4PC167
VOUT1
VOUT1
VBIAS
ON1
PC169
1
VIN12VIN1
PU10
APL3523A
CT1
12
+3VS5
C C
+3V +3VLANVCC
+3V_S2
PR162
*0_8/S
*10U/6.3V_6
+5VPCU
MAINON[26,35,38,40]
PR160
*0_4/S
PV stage
B B
PC162
0.1U/16V_4
PC152
0.1U/16V_4
PC155
0.1U/16V_4
13
14
4
3
PC153
*0.1U/16V_4
220P/50V_4
VOUT1
VOUT1
VBIAS
ON1
1
APL3523A
VIN12VIN1
PU11
CT1
12
7
VIN26VIN2
CT2
10
PC166
1000P/50V_4
OUT2
OUT2
GND
GND
ON2
+3VS5
8
9
11
15
5
PC156
0.1U/16V_4
PV stage
PC151
*0.1U/16V_4
PR159
*0_4/S
+3VLANVCC_S2
PC161
0.1U/16V_4
0.67A5.2A
PR163
*0_6/S
*10U/6.3V_6
LAN_POWER [35]
PR165
*0_8/S
+5V_S2
+5VPCU
MAINON
+5V +3VSUS
7
VIN26VIN2
CT2
10
PC168
1000P/50V_4
OUT2
OUT2
GND
GND
ON2
+3VS5
8
9
11
15
5
PC157
0.1U/16V_4
PV stage
PC149
*0.1U/16V_4
PR161
*0_4/S
PC164
0.1U/16V_4
+3VSUS_S2
PR164
*0_6/S
PC165
*10U/6.3V_6PC163
SUSON [35,38,40]
0.04A5.1A
A A
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Dis-charge IC (SLG55448)
Dis-charge IC (SLG55448)
Dis-charge IC (SLG55448)
1
45 49Wednesday, July 20, 2016
45 49Wednesday, July 20, 2016
45 49Wednesday, July 20, 2016
1A
1A
1A
of
of
of
Page 46
5
4
3
2
1
VGA Core
46
RT8813CGQW
PU2
D D
+5VS5
+VIN_VGACORE
DGPU_VC_EN[20,48]
+3V_GFX
+3V_MAIN_EN[22,48]
C C
B B
A A
for VGA sequence
GPU_VID[22]
2700P/50V_4
PSI[22]
PC27
8813VREF
1 2
10K/F_4 NTC
PR34
1_6
PC35
1U/25V_6
+3V
PD3
PV stage
8813VREF
PR211
PR51
*0_6/S
PR43
10K/F_4
MEK500V-40
PR23
47K/F_4
PR30
*0_4/S
PR28
*0_4/S
PR32
20K/F_4
PR27
20K/F_4
PR31
2K/F_4
PR25
18K/F_4
PR26
0_4/P
PR44
324/F_4
PR45
0_4/P
PR35
499K/F_4
PR29
*10K/F_4
21
8813PVCC
PC40
2.2U/10V_4
8813TON
8813EN
PC28
*2200P/50V_4
8813PSI
8813VID
8813VREF
PC34
0.1U/16V_4
8813REFADJ
8813REFIN
PC31
*0.01U/50V_4
8813ISEN3
PC47
100P/50V_4
21
9
16
3
4
5
8
6
7
13
PVCC
TON
PGOOD
EN
PSI
VID
VREF
REFADJ
REFIN
TSNS/ISEN3
UGATE1
BOOT1
PHASE1
LGATE1
VCC/ISEN1
UGATE2
BOOT2
PHASE2
LGATE2
TALERT/ISEN2
VSNS
RGND
GND/PWM3
GND
PR24
1_6
PC30
0.22U/25V_6
PR47
1_6
PC45
0.22U/25V_6
PC46
56P/50V_4
PR36
*0_4/S
8813UGATE1_1
PR50
10K/F_4
PC49
0.22U/10V_4
PR42
30K/F_4
+5VS5
8813UGATE2_1
8813PHASE2
DGPU_PROCHOT_EC# [22,35]
+3V
DGPU_PROCHOT# [35]
PV stage
Ra
PQ13
TPCA8A10-H
PR33
14.7K/F_4
PQ27
TPCA8A10-H
PC42
*100P/50V_4
PC26
SI stage
5
D
G
4
G
4
G
4
G
4
8813UGATE1_1
S
PQ19
213
TPCA8064-H
5
D
S
213
5
213
5
213
PR39
*0_4/S
PR38
*0_4/S
*TPCA8A10-H
SI stage
D
8813UGATE2_1
S
PQ24
TPCA8064-H
D
S
*TPCA8A10-H
+3V [2,4,10..13,15..21,25..27,29,30,32,33,35,41,45]
+VIN [25,36..39,41..44,47,49]
+5VS5 [4,26,32,37..43,45,47,48]
+3V_GFX [19,21,22,47,48]
+VGACORE [19]
PQ14
PQ28
4
4
4
4
PR40
100/F_4
PR37
100/F_4
5
G
213
5
G
213
5
G
213
5
G
213
PC21
D
PQ16
*AON6414A
PR188
*2.2_6
4.7U/25V_8
S
D
S
PC184
*2200P/50V_4
PC55
D
S
4.7U/25V_8
PQ21
*AON6414A
PR214
*2.2_6
D
S
PC213
*2200P/50V_4
+VGACORE
VGPU_CORE_SENSE [19]
VSS_GPU_SENSE [19]
4.7U/25V_8
PC56
4.7U/25V_8
0.33uH/20A(PCMC063T-R33MN)
DCR=4.2mohm(max)
2
8813UGATE1
1
8813BOOT1
24
8813PHASE1
23
8813LGAT1
15
8813ISEN1
17
8813UGATE2
18
8813BOOT2
19
20
8813LGAT2
PR49
*0_4
14
8813ISEN2
PR46 *0_4/S
11
8813VOUT1
PC43
56P/50V_4
10
8813RGN
PC39
56P/50V_4
12
8813SS
SS
22
8813PWM3
25
+VIN_VGACORE
PC25
PC22
4.7U/25V_8
*4.7U/25V_8
PL15
0.33uH/20A(PCMC063T-R33MN)
DCR=4.2mohm(max)
7x7x3mm
+VIN_VGACORE_1
PC57
PC62
4.7U/25V_8
7x7x3mm
PL17
PC207
*4.7U/25V_8
PC193
0.1U/25V_4
PC24
0.1U/25V_4
+VIN
12
+
PC210
*15U/25V_H=4.5
For Acoustic
12
+
PC214
15U/25V_H=4.5
PL1
*0_8/S
PC190
0.1U/25V_4
2200P/50V_4
+VGACORE
12
+
PC33
*330u_2.5V_7343_h=1.4
N16S-GT (23/18W)
+VIN
PC208
2200P/50V_4
*0_8/S
PL2
+
12
PC211
*220U/2.5V_5X3.8H
+VGACORE
12
+
ESR=12m-ohm
EDP: 26A
EDP peak: 51A
OCP minimum 56A
12
+
PC189
PC212
220U/2.5V_5X3.8H
220U/2.5V_5X3.8H
ESR=12m-ohm
ESR=12m-ohm
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
+VGACORE (RT8813A)
+VGACORE (RT8813A)
+VGACORE (RT8813A)
1
46 49Wednesday, July 20, 2016
46 49Wednesday, July 20, 2016
46 49Wednesday, July 20, 2016
2A
2A
2A
of
of
Page 47
5
+VIN [25,36..39,41..44,46,49]
+5VS5 [4,26,32,37..43,45,46,48]
[20,23,24]
+1.5V_GFX
D D
+5VS5
PR196
*0_4/S
21
+3V_GFX
DGPU_PWROK[12,21,35]
*MEK500V-40
PD26
PR199
30K/F_4
C C
DGPU_FB_EN[20]
PC196
4.7U/6.3V_4
SI stage
PR197
*0_2/S
1237EN1.5V
PC199
0.047U/25V_4
4
PR203
*0_4
PV stage
1237PG1.5V
1237PFM1.5V
1237SS1.5V
PC197
2200P/50V_4
PU12
7
NC
21
VCC
1
PGOOD
3
PFM
2
EN
23
SS
AOZ2260QI-18
3
2
1
47
PR205
127K/F_4
6
8
IN
9
TON
IN
22
PGND
PGND
PGND
PGND
PGND
AGND
BST
LX
LX
LX
LX
LX
FB
IN
20
1237BST1.5V
10
1237LX1.5V
11
16
17
18
12
13
14
15
19
4
5
1237FB1.5V
PC205
0.1U/25V_4
PR195
1237BST1.5V_S
0_6
PR204
10.5K/F_4
PR201
R2
12K/F_4
+VIN_1.5VGA +VIN
PC50
4.7U/25V_8
PC194
0.1U/25V_4
1237FB1.5V_S
PC203
2200P/50V_4
PR191
*2.2_6
PC192
*2200P/50V_4
PC54
4.7U/25V_8
R1
Vout1=(1+R1/R2)*0.8
PL18
*0_8/S
PC204
0.1U/25V_4
PL16
1uH/11A(PCMC063T-1R0MN)
7x7x3mm
PR200
*0_2/S
PC202
0.1U/16V_4
+1.5V_GFX_S
PC201
22U/6.3V_8
+1.5V Volt +/- 5%
Countinue current:6A
Peak current:8A
OCP minimum:12A
+1.5V_GFX
PC36
PC44
PC198
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
PR198
*POWER_JP/S
1 2
12
+
PC195
*390U/2.5V_5X5.8ESR10
+1.5V_GFX
+5VS5
B B
PV stage
PR206
DGPU_FB_EN
A A
5
4
3
*0_4/S
PC206
*0.47U/10V_4
2
3
2
1
PQ22
2N7002K
PR208
100K/F_4
PR207
1M_4
2
NB5
NB5
NB5
PR202
22_8
3
PQ23
2N7002K
1
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
+1.35V_VGA(AOZ1237)
+1.35V_VGA(AOZ1237)
+1.35V_VGA(AOZ1237)
1
1A
1A
47 49Wednesday, July 20, 2016
47 49Wednesday, July 20, 2016
47 49Wednesday, July 20, 2016
1A
of
of
Page 48
1
+VIN [25,36..39,41..44,46,47,49]
+3VS5 [4,10,15,16,27,31,32,35,37..40,44,45]
+5VS5 [4,26,32,37..43,45..47]
+3V_GFX [19,21,22,46,47]
+3V_AON [19,22,34]
+1.2VSUS [3,6,17,18,38,40]
+1.05V_GFX [19..21]
2
3
4
5
6
7
8
48
+3VS5
+3VS5
OUT2
OUT2
GND
GND
ON2
8
9
11
15
5
PC59
0.1U/16V_4
PC60
*0.1U/16V_4
PR57
*0_4/S
PC61
0.1U/16V_4
+3V_AON_S2
PC58
*10U/6.3V_6
PV stage
0.5A
+3V_AON
PR56
*0_6/S
DGPU_PWR_EN [12,20]
PC69
0.1U/16V_4
PC65
0.1U/16V_4
PC68
*0.1U/16V_4
PC73
0.1U/16V_4
13
14
4
3
*1000P/50V_4
VOUT1
VOUT1
VBIAS
ON1
PC67
1
VIN12VIN1
PU4
APL3523A
CT1
12
7
VIN26VIN2
CT2
10
PC63
*1000P/50V_4
A A
0.3A
+3V_MAIN_EN[22,46]
PR65
*0_6/S
+3V_GFX_S2+3V_GFX
PC72
*10U/6.3V_6
+5VPCU
PR63
*0_4/S
PV stage
B B
3.6A
+1.05V_GFX
+1.2VSUS +1.05V_GFX_S
PC32
0.1U/16V_4
PR213
PC52
0.1U/16V_4
10K/F_4
3
4
1
G9336
PU3
PGD
EN
VCC
GND
2
C C
+3VS5
PR55
10K/F_4
PV stage
PR212
DGPU_VC_EN[20,46]
*0_4/S
PC209
*0.1U/16V_4
+5VS5
PQ4
EMB20N03V
5
6
7
8
PC29
10U/6.3V_6
2 1
PD4
1SS355
6
DRV
5
ADJ
R2 Vout1=(1+R1/R2)*0.5
9336ADJ
4
9336DRV
PR58
110/F_4
PR53
100/F_4
1
2
3
PR52
47/F_4
PC37
R1
10U/6.3V_6
PC53
0.01U/50V_4
PC41
PC38
0.1U/16V_4
10U/6.3V_6
PR41
*POWER_JP/S
1 2
+
PC51
*220u/2V_7343
2N7002K
PQ25
+5VS5
PR48
22_8
3
1
PR209
100K/F_4
2
PR210
1M_4
3
PQ26
2N7002K
2
1
D D
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet of
7
1.05V_VGA/3V_VGA
1.05V_VGA/3V_VGA
1.05V_VGA/3V_VGA
48 49Wednesday, July 20, 2016
48 49Wednesday, July 20, 2016
48 49Wednesday, July 20, 2016
8
1A
1A
1A
of
of
Page 49
1
2
3
4
5
6
7
8
49
A A
EC7003
*10U/25V_8
+VIN
EC7001
*10U/25V_8
EC7004
*22U/25V_8
EMI request for ISN
EC7006
*22U/25V_8
EC7007
*10U/25V_8
+PRWSRC
EC7005
*22U/25V_8
EC7008
*10U/25V_8
EMI request for ISN
EC7002
*10U/25V_8
B B
C C
D D
PROJECT : X1Q
PROJECT : X1Q
PROJECT : X1Q
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet of
7
EMI solution
EMI solution
EMI solution
1A
1A
49 49Wednesday, July 20, 2016
49 49Wednesday, July 20, 2016
49 49Wednesday, July 20, 2016
8
1A
of
of
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