QUANTA KW3 Schematics

1

2

3

4

5

6

7

8

KW3 BLOCK DIAGRAM

CPU THERMAL
SENSOR

A A

CPU Yonah/Merom

479 Pins (uPGA)

PG 4,5

FSB

533M/667M

CRT port

PG 10

LCD Panel

B B

PG 18

R.G,B

LVDS X1

Calistoga

945GM/940GML

1466 FCBGA

PG 6,7,8,9,10,11

DDRII 533,667 MHz

DDRII 533,667 MHz

MAX6648

SBLINKCLK, SBLINKCLK#

NBSRCCLK, NBSRCCLK#

Channel A

Channel B

CPUCLK,
CPUCLK#

HTREFCLK

OSC14M

PG 23

DDRII-SODIMM1

DDRII-SODIMM2

DMI X4

IDE - ODD

PG 26

32.768KHz

NBSRCCLK, NBSRCCLK#

Calistoga / Yonah /ICH7-M

CPU CORE MAX8736
POWER VCORE 1.2V /44A

SYSTEM MAX8734
POWER(3/5V)

SYSTEM POWER TPS51124
(VCC1.5/VCCP)

SYSTEM POWER TPS51116
(1.8VSUS/0.9V SMDDR_VREF)

BATT CHARGER
MAX8724ETI+

BATTERY CONNECTOE

PG 12,13

PG 12,13

14.318MHz

CLOCK GEN

ICS954206
56pins

MiniCard /
WLAN

PG3

USB6

New Card

1

PG31

PG32

PG33

PG34

PG35

PG36

PG 23 PG 21

PATA - HDD
SATA - HDD

PG 26

USB PORT 1
USB PORT 3
USB PORT 5

FP/B

C C

Finger print

PG25

USB PORT 7
USB PORT 0

Finger print
USB PORT 2

Bluetooth
USB PORT 4

Docking

USB PORT 6
PCI_E USB

PC87383

D D

Parallel

PORT

PG24 PG24

PG24

SERIAL

PORT

Port Replicator

1

2

ATA 66/100/133

SATA 150MB

PG 29
PG 29
PG 29
PG 29

PG 25

PG 25

PG 24

PG 21

TPM1.2

PG24

USB 2.0

PG25

ICH7-M

652 BGA

PG 14,15,16,17

LPC

PC87541

TQFP 176pins

FAN Touch

PAD Board

PG23 PG25 PG29 PG30

3

32.768KHz

Key FLASH

4

PCI-Express

33MHZ, 3.3V PCI

PG 30

ROM

Azalia

PWRCLKP
PWRCLKN
DIB_DATAN
DIB_DATAP

MDC

PG25

RJ11

PG22

WIRE

Azalia

AUDIO CODEC
ALC262

MIC

PG27 PG28

5

AMP

MAX9710

INT SPK

PG28

PG27

AMP

MAX4411
PG28

6

25MHz

RTL8110SCL
RTL8100CL

PG 22

RJ45

PG 22

PCB 8L M/B:DA0KW3MB8C7

HP

PG27

24.576MHz

CARDBUS R5C843

PG 20,21

PCMCIA

PG 21

4 IN 1

IEEE 1394

PG 20PG 21

Config KW3:

31KW3MB0021 945GM

DAKW3TB28D5

F/B:

DA0KW3TR8C1

T/P:
S/W:

DAKW3TB18C1

DAKW3MB16C9PCB 6L M/B:

DAKW3TB26C2

F/B:
T/P:

DA0KW3TR6B9

S/W:

DAKW3TB16B8

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SYSTEM BLOCK DIAGRAM A

SYSTEM BLOCK DIAGRAM A

SYSTEM BLOCK DIAGRAM A

Date: Sheet

Date: Sheet of

Date: Sheet of

7

31KW3MB0055 940GML

Config KW3DC2:

31KW3MB0047 945GM
31KW3MB0039 940GML

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

of

136Tuesday, May 16, 2006

136Tuesday, May 16, 2006

136Tuesday, May 16, 2006

8

1

2

3

4

5

6

7

8

Voltage Rails

Voltage Rails ON S0~S2

VCC_CORE
GMCH_VTT
SMDDR_VREF 0.9V for DDR2 Termination voltage
VMEM_VTT

A A

RVCC3

VCC1.5
VCC1.8
VCC2.5
VCC3
VCC5

1.8VSUS
3VSUS

B B

5VSUS

3VPCU
5VPCU
9VPCU

Core voltage for Processor
Core voltage for CPU / NB

1.25V for VRAM Termination voltage

X
X
X
X

X

X
X
X
X
X

X
X
X

X
X
X

ACIN POWER ON TIMING

ACIN

5VPCU/3VPCU

NBSWON#

PWRBTN#

RVCC_ON

C C

RSMRST#

SUSB#,SUSC#

SUSON

MAINON

VSUS,VCC

VR_ON

GMCH_VTT
/1.05V

VCORE_CPU

CK410_PWRGD

PWROK

D D

/IMVP_PWRGD

PLTRST#
\PCIRST#

H_PWRGD

H_CPURST#

1

99ms < t 214

2ms

2

ON S3 ON S4 ON S5

XX

X
X
X

X
X
X

To ICH6

To ICH6

From ICH6

From 87541

From 87541

From 87541

To clock generator

To GMCH/other
PCI device

From ICH6 to CPU

Form GMCH to CPU

X
X
X

Hub interface "CPU
Reset Complete"
message

STPCLK#,CPUSLP#,
STP_CPU#,STP_PCI#
SLP_S1#,C3_STAT#

Frequency
Straps

PCIRST#

SUS_STAT#

PWROK,
VGATE

Vcc3_3, Vcc1_5,
VCCHI, V_CPU_IO

LAN_PWROK

VccLAN3_3,
VccLAN1_5

SLP_S3#

SLP_S4#

SLP_S5#

SUSCLK

RSMRST#

VccSus3_3,
VccSus1_5

V5RefSus

RTCRST#

VccRTC

3

V5Ref

Ctl Signal

VR_ON
MAINON
MAINON
MAINON

RVCCD

MAINON
MAINON
MAINON
MAIND
MAIND

SUSON
SUSD
SUSD

X
X
X

VL
VL

5VPCU

Power Sequencing and Reset Signal Timings

0ms

0ms

5ms

4

PCB STACK UP

LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 6 : SVCC
LAYER 6 : BOT

PCI DEVICES IRQ ROUTING

IDSEL#

RTL Lan INT D#

R5C843 INT A/B/C#

1~2RTC

110ms

110ms

10ms

AD16

AD23 REQ1# / GNT1#

0ms

1~2RTC

REQ# / GNT#

REQ0# / GNT0#

32~38RTC

99ms

0ms

0ms

10ms

5

InterruptsK3W PCI DEVICE

Strap Values Normal

2~3RTC

Operation]

6

VID
VR_ON
Vcc-core
CPU_UP
Vccp
Vccp_UP
Vccgmch
GMCHPWRGD
CLK_ENABLE#
IMVP4_PWRGD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

CPU Power On Sequence

Tsft_star_vcc

Tboot

Tcpu_up

Tvccp_up

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

SYSTEM INFORMATION A

SYSTEM INFORMATION A

SYSTEM INFORMATION A

7

Vboot
Tboot-vid-tr

Tgmch_pwrgd

236Tuesday, May 16, 2006

236Tuesday, May 16, 2006

236Tuesday, May 16, 2006

2

Tcpu_pwrgd

8

A

FSC FSB FSA CPU SRC PCI

1 0 1 100 100 33

0 0 1 133 100 33

Default

0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33

4 4

1 1 0 400 100 33
1 1 1 200 100 33

SEL2 SEL1 SEL0

L14

L14
ACB2012L-120-T

25 mils

VCC3

3 3

2 2

ACB2012L-120-T

120 ohms@100Mhz

PDAT_SMB(16)

PCLK_SMB(16)

BSEL strappings need to be set for 533MHz Moby Dick (Intel?915GM - Calistoga Interposer)
(if Calistoga is designed for 667MHz board).

R43 2.2/FR43 2.2/F

R47 1R47 1

Q7

Q7

RHU002N06

RHU002N06

3

Q8

Q8

RHU002N06

RHU002N06

3

VDD_PCI

C58

C58

0.1U/10V

0.1U/10V

VCC3

2

VCC3

2

VDD_48

VDD_REF

R56

R56
10K

10K

SMbus address D2 /IDT

C51

C51

0.1U/10V

0.1U/10V

C63

C63

0.1U/10V

0.1U/10V

C60

C60

0.1U/10V

0.1U/10V

R58

R58
10K

10K

CGDAT_SMB

1

CGCLK_SMB

1

C50

C50
10U

10U

C47

C47
10U

10U

C55

C55
10U

10U

CLKUSB_48(16)

Iref=5mA,
Ioh=4*Iref

DREFCLK(8)
DREFCLK#(8)

VR_PWRGD_CK410#(16,31)

Use 1% R

B

33P/0402

33P/0402
C564

C564

33P/0402

33P/0402
C563

C563

PM_STPPCI#(16)

PM_STPCPU#(16)

CGCLK_SMB(13,23)
CGDAT_SMB(13,23)

CLKUSB_48

CPU_BSEL0
CPU_BSEL1

CPU_BSEL2

DREFCLK
DREFCLK#

Close to IC <500mils

CG_XIN

21

CL=20 - 22P

Y6

Y6

14.318MHZ

14.318MHZ

R55 *10KR55 *10K

VCC3

VR_PWRGD_CK410#

PM_STPPCI#
PM_STPCPU#

CGCLK_SMB
CGDAT_SMB

R57 33R57 33
R440 8.2KR440 8.2K
R428 8.2KR428 8.2K

VDD_REF
VDD_SRC_CPU

VDD_PCI

VDD_SRC_CPU

VDD_48

RP58

RP58

33X2

33X2

IREF

2
4

R62 475/FR62 475/F

1
3

C

L15

L15
ACB2012L-120-T

VCC3

ACB2012L-120-T

120 ohms@100Mhz

VCC3(8,9,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32)

GMCH_VTT(4,5,6,9,10,14,17,33)

U34

U34

50

CG_XOUT R_HCLK_CPU

R_DOT96
R_DOT96#

XTAL_IN

49

XTAL_OUT

10

Vtt_PwrGd#/PD

55

PCI/SRC_STOP#

54

CPU_STOP#

46

SCLK

47

SDATA

12

FSA/USB_48MHz

16

FSB/TEST_MODE

53

FSC/REF1

48

VDD_REF

42

VDD_CPU

1

VDD_PCI_1

7

VDD_PCI_2

21

VDD_SRC0

28

VDD_SRC1

34

VDD_SRC2

11

VDD_48

39

IREF

14

DOT96MHz

15

DOT96MHz#

ICS954206AG-T

ICS954206AG-T

IDT CV140 /56pins
ICS954206AGT /56pins

VDD_A

25 mils

R69 2.2/FR69 2.2/F

37

VDDA

CK-410M

CK-410M

GND_REF

GND_PCI_26GND_SRC29GND_CPU

GND_PCI_1

GND_48

2

51

13

VDD_SRC_CPU

C83

C83

C74

C74

0.1U/10V

0.1U/10V

0.1U/10V

0.1U/10V

VDD_A

38

REF0

GNDA

CPU0

CPU0#

CPU1

CPU1#

CPU2_ITP/SRC7

CPU2#_ITP/SRC7#

SRC6

SRC6#

SRC5

SRC5#

SRC4_SATA

SRC4#_SATA

SRC3

SRC3#

SRC2

SRC2#

SRC1

SRC1#

SRC0/DREFSSCLK

SRC0#/DREFSSCLK#

PCI5
PCI4
PCI3
PCI2

PCIF1/100_96M#

PCIF0/ITP_EN

45

C82

C82

0.1U/10V

0.1U/10V

C73

C73

0.1U/10V

0.1U/10V

Place these termination to close CK410M.

52
44

43
41

40
36

35
33

32
31

30
26

27
24

25
22

23
19

20
17

18
5

4
3
56
9
8

C64

C64

0.1U/10V

0.1U/10V

C80

C80
10U

10U

14M_REF

R_HCLK_CPU#

R_HCLK_MCH
R_HCLK_MCH#

T46T46
T47T47

RCLK_PCIE_MINI
RCLK_PCIE_MINI#

RPCIE_MCH
RPCIE_MCH#

RPCIE_SATA
RPCIE_SATA#

CLK_PCIE_NEW
CLK_PCIE_NEW#

RPCIE_ICH
RPCIE_ICH#

R_DREFSSCLK
R_DREFSSCLK#

R_PCLK_541
R_PCLK_R5C841
R_PCLK_LAN
PCLK_MINI_LPC
R_PCLK_ICH
R_PCLK_SIO

D

C87

C87
10U

10U

1
3

RP36 33X2RP36 33X2

1
3

RP37 33X2RP37 33X2

1
3

RP39

RP39

1
3

RP42 33X2RP42 33X2

3
1

RP43

RP43

3
1

RP40

RP40

RP38

RP38

3
1

DREFSSCLK Frequency Select.
"0" : 96MHz

2
4

2
4

2
4

2
4

4
2

4
2

T1T1

T2T2

4
2

R49 10KR49 10K

R51 *10KR51 *10K
R50 10KR50 10K

"1" : 100MHz

33X2

33X2

33X2

33X2

33X2

33X2

33X2

33X2

R430 33R430 33
R427 33R427 33
R424 33R424 33
R425 12.1/FR425 12.1/F
R436 33R436 33

R423 12.1/FR423 12.1/F

R433 33R433 33

VCC3

VCC3

HCLK_CPU (4)
HCLK_CPU# (4)

HCLK_MCH (6)
HCLK_MCH# (6)

CLK_PCIE_MINI (23)
CLK_PCIE_MINI# (23)

CLK_PCIE_MCH (8)
CLK_PCIE_MCH# (8)

CLK_PCIE_SATA (14)
CLK_PCIE_SATA# (14)

CLK_PCIE_ICH (15)
CLK_PCIE_ICH# (15)

DREFSSCLK (8)
DREFSSCLK# (8)

Use 1% R

R434 12.1/FR434 12.1/F
R431 12.1/FR431 12.1/F

Place these termination
to close CK410M.

HCLK_CPU
HCLK_CPU#

HCLK_MCH
HCLK_MCH#

CLK_PCIE_MINI
CLK_PCIE_MINI#

CLK_PCIE_MCH
CLK_PCIE_MCH#

CLK_PCIE_SATA
CLK_PCIE_SATA#

PCLK_541 (30)
PCLK_R5C841 (20)
PCLK_LAN (22)
PCLK_LPC_DEBUG (18,23)
PCLK_ICH (15)

PCLK_TPM (25)
PCLK_SIO (24)

CLK_PCIE_ICH
CLK_PCIE_ICH#

DREFCLK
DREFCLK#

C572

C572
*10P

*10P

DREFSSCLK
DREFSSCLK#

E

14M_SIO (24)

14M_ICH (16)

C570

C570
*10P

*10P

R437 49.9/F/BR437 49.9/F/B
R439 49.9/F/BR439 49.9/F/B

R441 49.9/F/BR441 49.9/F/B
R444 49.9/F/BR444 49.9/F/B

R445 49.9/F/BR445 49.9/F/B
R446 49.9/F/BR446 49.9/F/B

R448 49.9/F/BR448 49.9/F/B
R450 49.9/F/BR450 49.9/F/B

R71 49.9/F/BR71 49.9/F/B
R72 49.9/F/BR72 49.9/F/B

R67 49.9/F/BR67 49.9/F/B
R70 49.9/F/BR70 49.9/F/B

R466 49.9/F/BR466 49.9/F/B
R465 49.9/F/BR465 49.9/F/B

R119 49.9/F/BR119 49.9/F/B
R117 49.9/F/BR117 49.9/F/B

3

GMCH_VTT

R443 *56/FR443 *56/F

CPU_BSEL0(4,8)

GMCH_VTT

R59 *1KR59 *1K

CPU_BSEL1(4,8)

Stuff 0 ohm for 533MHz, NC for 667MHz

1 1

CPU_BSEL2(4,8)

A

CPU_BSEL0

CPU_BSEL1

R442*0_4 R442*0_4

CPU_BSEL2

R46*0_4 R46*0_4

B

C

PCLK_541
PCLK_R5C841
PCLK_LAN

PCLK_LPC_DEBUG

PCLK_ICH
PCLK_TPM
PCLK_SIO

PCLK_541 (30)
PCLK_R5C841 (20)
PCLK_LAN (22)

PCLK_LPC_DEBUG (18,23)
PCLK_ICH (15)
PCLK_TPM (25)
PCLK_SIO (24)

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

*0.1U/10V

C571

C571

C566

C566

C573

C573

C568

C568

C565

C565

C567

C567

C569

C569

D

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CLOCK GENERATOR A

CLOCK GENERATOR A

CLOCK GENERATOR A

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

336Tuesday, May 16, 2006

336Tuesday, May 16, 2006

336Tuesday, May 16, 2006

E

5

U35A

H_A#[31:3](6)

D D

H_ADSTB#0(6)
H_REQ#[4:0](6)

H_A#[31:3](6)

C C

H_ADSTB#1(6)

H_A20M#(14)
H_FERR#(14)

H_IGNNE#(14)

H_STPCLK#(14)

H_INTR(14)

H_NMI(14)

H_SMI#(14)

B B

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

XDP_TMS

XDP_TDI

U35A

J4

A[3]#

L4

A[4]#

M3

A[5]#

K5

A[6]#

M1

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L1

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

L2

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L5

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U2

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W3

A[27]#

W5

A[28]#

Y4

A[29]#

W2

A[30]#

Y1

A[31]#

V4

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

AA1

RSVD[01]#

AA4

RSVD[02]#

AB2

RSVD[03]#

AA3

RSVD[04]#

M4

RSVD[05]#

N5

RSVD[06]#

T2

RSVD[07]#

V3

RSVD[08]#

B2

RSVD[09]#

C3

RSVD[10]#

B25

RSVD[11]#

PZ47903-2741-01

PZ47903-2741-01

R422 54.9/FR422 54.9/F

R52 54.9/FR52 54.9/F

ADDR GROUP 0

ADDR GROUP 0

DEFER#

DRDY#
DBSY#

CONTROL

CONTROL

LOCK#

RESET#

TRDY#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

XDP/ITP SIGNALSTHERMH CLK

XDP/ITP SIGNALSTHERMH CLK

PROCHOT
THERMDA
THERMDC

THERMTRIP#

BCLK[0]
BCLK[1]

RSVD[12]#

RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#

RESERVED

RESERVED

RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#

GMCH_VTT

XDP PU_R < 0.2"

XDP_BPM#5

A A

Why BMP5 need PH ?

5

XDP_TCK

XDP_TRST#

R417 54.9/FR417 54.9/F

R426 54.9/FR426 54.9/F

R48 54.9/FR48 54.9/F

ADS#
BNR#

BPRI#

BR0#

IERR#

INIT#

RS[0]#
RS[1]#
RS[2]#

HIT#

HITM#

TCK

TDI
TDO
TMS

DBR#

4

T4 PADT4 PAD

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
B1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20
D21

A24
A25

C7

A22
A21

T22

D2
F6
D3
C1
AF1
D22
C23
C24

XDP_TCK PD 27.4/1% ?
XDP_TRST PD 510ohm /5% ?
XDP_TDI PU 150ohm /1.05V
XDP_TMS PU 39.2/1%?
XDP_TDO PU 54.9ohm?
For ITP700

4

H_ADS# (6)
H_BNR# (6)
H_BPRI# (6)

H_DEFER# (6)
H_DRDY# (6)
H_DBSY# (6)

H_BREQ#0 (6)

H_INIT# (14)
H_LOCK# (6)

H_TRDY# (6)
H_HIT# (6)

H_HITM# (6)

T45 PADT45 PAD

H_THERMDA (23)
H_THERMDC (23)

PM_THRMTRIP# (8,14)

T6 PADT6 PAD

HCLK_CPU (3)
HCLK_CPU# (3)

T7 PADT7 PAD

R76 0R76 0

GMCH_VTT

H_RS#[2:0] (6)

H_PROCHOT#

GMCH_VTT

R77

R77
56/F

56/F

R111

R111
*51

*51

C Modify

SYS_RST# (16)

GMCH_VTT

R78

R78
75/F

75/F

GMCH_VTT

R419

R419
1K/F

1K/F

20/15mils

R418

R418
2K/F

2K/F

3

GMCH_VTT (3,5,6,9,10,14,17,33)

H_D#[63:0](6)

H_CPURST# (6)

H_DSTBN#0(6)
H_DSTBP#0(6)
H_DINV#0(6)
H_D#[63:0](6)

H_DSTBN#1(6)
H_DSTBP#1(6)
H_DINV#1(6)

H_GTLREF

CPU_BSEL0(3,8)
CPU_BSEL1(3,8)
CPU_BSEL2(3,8)

3

R454

R454
R45351R453

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

*1K/F

*1K/F
51

E22
F24
E26
H22
F23

G25

E25
E23
K24

G24

H26
F26
K22
H25
H23

G22

N22
K25
P26
R23
L25
L22
L23

M23

P25
P22
P23
T24
R24
L26
T25
N24

M24

N25

M26

AD26

C26
D25

B22
B23
C21

J24
J23

J26

U35B

U35B

D[0]#
D[1]#
D[2]#

DATA GRP 0 DATA GRP 1

DATA GRP 0 DATA GRP 1

D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

MISC

MISC

TEST1
TEST2

BSEL[0]
BSEL[1]
BSEL[2]

PZ47903-2741-01

PZ47903-2741-01

2

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#

DATA GRP 2

DATA GRP 2

D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

DATA GRP 3

DATA GRP 3

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

2

H_D#32

AA23

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

W25

H_D#37

U23

H_D#38

U25

H_D#39

U22

H_D#40

AB25

H_D#41

W22

H_D#42

Y23

H_D#43

AA26

H_D#44

Y26

H_D#45

Y22

H_D#46

AC26

H_D#47

AA24
W24
Y25
V23

H_D#48

AC22

H_D#49

AC23

H_D#50

AB22

H_D#51

AA21

H_D#52

AB21

H_D#53

AC25

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AD24

H_D#58

AE21

H_D#59

AD21

H_D#60

AE25

H_D#61

AF25

H_D#62

AF22

H_D#63

AF26
AD23
AE24
AC20

R26
U26
U1
V1

E5
B5
D24
D6
D7
AE6

COMP0
COMP1
COMP2
COMP3

27.4/F

27.4/F

ICH_DPRSTP# (14)
H_DPSLP# (14)

TO VRD

H_PWRGD is CMOS driving by ICH

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

4

H_D#[63:0] (6)

H_DSTBN#2 (6)
H_DSTBP#2 (6)
H_DINV#2 (6)
H_D#[63:0] (6)

H_DSTBN#3 (6)
H_DSTBP#3 (6)
H_DINV#3 (6)

R432

R432
R42954.9/F R42954.9/F
R43827.4/F R43827.4/F
R43554.9/F R43554.9/F

PADT3PAD

T3

H_CPUSLP# (6,14)
PSI# (31)

CPU(HOST BUS) A

CPU(HOST BUS) A

CPU(HOST BUS) A

T5
PADT5PAD

H_DPWR# (6)
H_PWRGD (14)

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

436Tuesday, May 16, 2006

436Tuesday, May 16, 2006

436Tuesday, May 16, 2006

of

of

1

of

5

U35C

U35C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

D D

C C

B B

GMCH_VTT

C81

C75

C75

0.1U

0.1U

C68

C68

0.1U

0.1U

C85

C85

0.1U

0.1U

C81

0.1U

0.1U

C53

C53

C62

C62

0.1U

0.1U

0.1U

0.1U

GMCH_VTT

+

+

C587

C587

C67

A A

330U/2.5V/7343/R=12

330U/2.5V/7343/R=12

C67

0.1U

0.1U

5

A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18
F20
AA7

AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20

AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

B7
B9

C9

D9

E7
E9

F7
F9

VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]

VCC[100]
VCC[034]
VCC[035]

VCCP[01]
VCC[036]

VCCP[02]
VCC[037]

VCCP[03]
VCC[038]

VCCP[04]
VCC[039]

VCCP[05]
VCC[040]

VCCP[06]
VCC[041]

VCCP[07]
VCC[042]

VCCP[08]
VCC[043]

VCCP[09]
VCC[044]

VCCP[10]
VCC[045]

VCCP[11]
VCC[046]

VCCP[12]
VCC[047]

VCCP[13]
VCC[048]

VCCP[14]
VCC[049]

VCCP[15]
VCC[050]

VCCP[16]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]

VCCSENSE
VCC[066]
VCC[067]

VSSSENSE

PZ47903-2741-01

PZ47903-2741-01

VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]

VCCA

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

4

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26

AD6
AF5
AE5
AF4
AE3
AF2
AE2

AF7
AE7

4

3

U35D

CPU_CORECPU_CORE

GMCH_VTT
CPU_CORE
VCC1.5

GMCH_VTT (3,4,6,9,10,14,17,33)
CPU_CORE (31)

VCC1.5 (9,10,15,17,23,32,33)

GMCH_VTT

ESR :12m ohm

VCC1.5 VCC1.5

12

C588

C588

C589

H_VID0 (31)
H_VID1 (31)
H_VID2 (31)
H_VID3 (31)
H_VID4 (31)
H_VID5 (31)
H_VID6 (31)

Use 1% R

CPU_CORE

R38

R38
100/F

100/F

R39

R39
100/F

100/F

C589

10U

10U

0.01U

0.01U

VCCSENSE (31)
VSSSENSE (31)

Connect to PWM , special layout

3

U35D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

A26

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3

VSS[081]

PZ47903-2741-01

PZ47903-2741-01

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

2

CPU_CORE

C574

C576

C576

C84

C84

10U

10U

10U

10U

C79

C79

10U

10U

C56

C56

10U

10U

C583

C583

C61

C61

10U

10U

10U

10U

C578

C578

10U

10U

C65

C65

10U

10U

C581

C581

10U

10U

CPU_CORE

C582

C582

10U

10U

CPU_CORE

C78

C78

10U

10U

CPU_CORE

C72

C72
10U

10U

C580

C580

C574

10U

10U

C86

C86

10U

10U

10U

10U

C575

C575

10U

10U

C577

C577

C579

C579

10U

10U

C71

C71

10U

10U

10U

10U

C66

C66

1

10U

10U

5

10U/6.3V/X5R
CH61001KA94

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CPU(POWER) A

CPU(POWER) A

CPU(POWER) A

Date: Sheet

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

536Tuesday, May 16, 2006

536Tuesday, May 16, 2006

536Tuesday, May 16, 2006

of

of

1

of

5

H_XRCOMP

R84

R84

24.9/F/B

24.9/F/B

D D

GMCH_VTT

R88

R88

54.9/F/B

54.9/F/B

GMCH_VTT

15 mils/10mils

H_XSCOMP

H_D#[63:0](4)

Use 1% R

R90

R90
221/F/B

221/F/B

H_XSWING

C C

B B

A A

R91

R91
100/F/B

100/F/B

GMCH_VTT

R89

R89

54.9/F/B

54.9/F/B

GMCH_VTT

R87

R87
221/F/B

221/F/B

R85

R85
100/F/B

100/F/B

R86

R86

24.9/F/B

24.9/F/B

C110

C110

0.1U/10V

0.1U/10V

H_YSCOMP

H_YSWING

C108

C108

0.1U/10V

0.1U/10V

H_YRCOMP

15 mils/10mils

Use 1% R

HCLK_MCH(3)
HCLK_MCH#(3)

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

Short Stub < 100mils
extract from same point

4

U39A

K11
T10

W11

U11
T11

AB7
AA9

Y10

AB8
AA4

AA7
AA2
AA6

AA10

AA1
AB4

AC9
AB11
AC11

AB3

AC2

AD1

AD9

AC1

AD7

AC6

AB5
AD10

AD4

AC8

AG2

AG1

F1

J1

H1

J6
H3
K2

G1
G2

K9
K1
K7

J8
H4

J3

G4

T3
U7
U9

W9

T1
T8
T4

W7

U5
T9

W6

T5

W4
W3

Y3
Y7

W5

W2

Y8

E1

E2

E4

Y1
U1

W1

U39A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

H_CLKIN
H_CLKIN#

Calistoga

Calistoga

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

3

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_ADS#

H_VREF_0

H_BNR#

H_BPRI#

H_BREQ#0

H_CPURST#

H_DBSY#

H_DEFER#

H_DPWR#

H_DRDY#

H_VREF_1

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_HIT#

H_HITM#

H_LOCK#

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

H_SLPCPU#

H_TRDY#

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

J7
W8
U3
AB10

K4
T7
Y5
AC4

K3
T6
AA5
AC5

D3
D4
B3

D8
G8
B8
F8
A8

B4
E6
D6

E3
E7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

R94 0R94 0

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

H_A#[31:3] (4)

H_ADS# (4)
H_ADSTB#0 (4)
H_ADSTB#1 (4)

H_BNR# (4)
H_BPRI# (4)
H_BREQ#0 (4)
H_CPURST# (4)
H_DBSY# (4)
H_DEFER# (4)
H_DPWR# (4)
H_DRDY# (4)

H_DINV#[3:0] (4)

H_DSTBN#[3:0] (4)

H_DSTBP#[3:0] (4)

H_HIT# (4)
H_HITM# (4)
H_LOCK# (4)

H_REQ#[4:0] (4)

H_RS#[2:0] (4)

H_CPUSLP# (4,14)
H_TRDY# (4)

GMCH_VTT

C119

C119

0.1U/10V

0.1U/10V

C118

C118

0.1U/10V

0.1U/10V

GMCH_VTT

R99

R99
100/F/B

100/F/B

R98

R98
200/F/B

200/F/B

GMCH_VTT (3,4,5,9,10,14,17,33)

< 0.1"
Use 1% R
H_VREF :10 mils/20 mils space

H_VREF

H_VREF

1

6

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH HOST(1 OF 6 ) A

GMCH HOST(1 OF 6 ) A

GMCH HOST(1 OF 6 ) A

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

636Tuesday, May 16, 2006

636Tuesday, May 16, 2006

636Tuesday, May 16, 2006

of

of

1

of

5

4

3

2

1

7

M_B_DQ[63:0](13)

D D

M_A_DQ[63:0](13)

C C

B B

A A

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5

AJ35

AJ34
AM31
AM33

AJ36
AK35

AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12

AK9
AN7
AK8
AK7
AP9
AN9
AT5

AL5

AY2

AW2

AP1
AN2
AV2
AT3
AN1

AL2

AG7

AF9

AG4

AF6

AG9

AH6
AF4
AF8

U39D

U39D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

Calistoga

Calistoga

AU12

SA_BS_0

AV14

SA_BS_1

BA20

SA_BS_2

AY13

SA_CAS#

AJ33

SA_DM_0

AM35

SA_DM_1

AL26

SA_DM_2

AN22

SA_DM_3

AM14

SA_DM_4

AL9

SA_DM_5

AR3

SA_DM_6

AH4

SA_DM_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9

SA_RAS#

SA_WE#

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

AW14
AK23
AK24
AY14

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_10

SA_MA_11

SA_MA_12

SA_MA_13

SA_RCVENIN#

SA_RCVENOUT#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CAS#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP_MA_RCVENIN#
TP_MA_RCVENOUT#

M_A_BS#0 (12,13)
M_A_BS#1 (12,13)
M_A_BS#2 (12,13)
M_A_CAS# (12,13)

M_A_DM[7:0] (13)

M_A_DQS[7:0] (13)

M_A_DQS#[7:0] (13)

M_A_A[13:0] (12,13)

M_A_RAS# (12,13)

T16

T16

PAD

PAD

T17

T17

PAD

PAD

M_A_WE# (12,13)

3

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK39

AJ37
AP39
AR41

AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40

AW38

AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31

AW31

AV29

AW29

AM19

AL19
AP14

AN14
AN17
AM16

AP15
AL15

AJ11

AH10

AJ9

AN10

AK13

AH11

AK10

AJ8

BA10

AW10

BA4

AW4
AY10

AY9

AW5

AY5
AV4
AR5
AK4
AK3
AT4
AK5

AJ5
AJ3

U39E

U39E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

Calistoga

Calistoga

AT24

SB_BS_0

AV23

SB_BS_1

AY28

SB_BS_2

AR24

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

2

SB_WE#

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH DDR(2 OF 6) A

GMCH DDR(2 OF 6) A

GMCH DDR(2 OF 6) A

Date: Sheet

Date: Sheet

Date: Sheet

AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

AU23
AK16
AK18
AR27

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

TP_MB_RCVENIN#
TP_MB_RCVENOUT#

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

M_B_BS#0 (12,13)
M_B_BS#1 (12,13)
M_B_BS#2 (12,13)
M_B_CAS# (12,13)
M_B_DM[7:0] (13)

M_B_DQS[7:0] (13)

M_B_DQS#[7:0] (13)

M_B_A[13:0] (12,13)

M_B_RAS# (12,13)

T11 PADT11 PAD
T15 PADT15 PAD

M_B_WE# (12,13)

736Tuesday, May 16, 2006

736Tuesday, May 16, 2006

736Tuesday, May 16, 2006

1

of

of

of

5

U39B

CLK_MCH_OE#

T22PADT22PAD

D D

CPU_BSEL0(3,4)
CPU_BSEL1(3,4)

CPU_BSEL2(3,4)

PAD

PAD

T14

T14

T9PAD T9PAD

PADT8PAD

T8

MCH_CFG_13(9)

T10PAD T10PAD
T12PAD T12PAD

T13PAD T13PAD

C C

PLT_RST-R#(15)

MCH_ICH_SYNC(15)

B B

1.8VSUS VCC3

A A

DELAY_VR_PWRGOOD(16,31)

VCC3

R92

R92

80.6/F/B

80.6/F/B

M_RCOMP#
M_RCOMP

R93

R93

80.6/F/B

80.6/F/B

PM_THRMTRIP#(4,14)

PM_BMBUSY#(16)
PM_EXTTS#0(13)
PM_EXTTS#1(16)

R491

R491

100/F/B

100/F/B

T18PAD T18PAD
T20PAD T20PAD

R135 *10K/F/BR135 *10K/F/B

5

MCH_CFG_3
MCH_CFG_4

MCH_CFG_5
MCH_CFG_6
MCH_CFG_7

MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13

MCH_CFG_14

MCH_CFG_15

MCH_CFG_16

MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

RST IN# MCH

U39B

H32
T32
R32

F3
F7

AG11

AF11

H7

J19

K30

J29
A41
A35
A34
D28
D27

K16
K18

J18
F18
E15
F15
E18
D19
D16

G16

E16
D15

G15

K15
C15
H16

G18

H15

J25
K27

J26

G28

F25
H26

G6
AH33
AH34

H28
H27
K28

D1

C41

C1
BA41
BA40
BA39

BA3
BA2
BA1

B41

B2
AY41

AY1

AW41

AW1

A40

A4

A39

A3

R118 10K/FR118 10K/F
R115 *10K/FR115 *10K/F

RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#

SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

PM_EXTTS#0
PM_EXTTS#1

CFGRSVD

CFGRSVD

PM

PM

MISC

MISC

NC

NC

Calistoga

Calistoga

SM_OCDCOMP_0
SM_OCDCOMP_1

DDR MUXINGCLKDMI

DDR MUXINGCLKDMI

D_REFSSCLKIN#

SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3

SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3

SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP#

SM_RCOMP

SM_VREF_0
SM_VREF_1

G_CLKIN#

G_CLKIN

D_REFCLKIN#

D_REFCLKIN

D_REFSSCLKIN

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

MCH_CFG_5(9)

MCH_CFG_6(9)

MCH_CFG_7(9)

MCH_CFG_9(9)

MCH_CFG_10(9)

MCH_CFG_11(9)

MCH_CFG_12(9)

MCH_CFG_13(9)

MCH_CFG_16(9)

MCH_CFG_18(9)

MCH_CFG_19(9)

MCH_CFG_20(9)

4

AY35
AR1
AW7
AW40

AW35
AT1
AY7
AY40

AU20
AT20
BA29
AY29

AW13
AW12
AY21
AW21

AL20
AF10

BA13
BA12
AY20
AU21

AV9
AT9

AK1
AK41

AF33
AG33
A27
A26
C40
D41

DMI_TXN0

AE35

DMI_TXN1

AF39

DMI_TXN2

AG35

DMI_TXN3

AH39

DMI_TXP0

AC35

DMI_TXP1

AE39

DMI_TXP2

AF35

DMI_TXP3

AG39

DMI_RXN0

AE37

DMI_RXN1

AF41

DMI_RXN2

AG37

DMI_RXN3

AH41

DMI_RXP0

AC37

DMI_RXP1

AE41

DMI_RXP2

AF37

DMI_RXP3

AG41

MCH_CFG_5

MCH_CFG_6

MCH_CFG_7

MCH_CFG_9

MCH_CFG_10

MCH_CFG_11

MCH_CFG_12

MCH_CFG_13

MCH_CFG_16

MCH_CFG_18

MCH_CFG_19

MCH_CFG_20

4

M_OCDCOMP_0
M_OCDCOMP_1

M_RCOMP#
M_RCOMP

SMDDR_VREF_MCH

DMI_RXN[3:0] (15)

DMI_RXP[3:0] (15)

M_CLK_DDR0 (13)
M_CLK_DDR1 (13)
M_CLK_DDR2 (13)
M_CLK_DDR3 (13)

M_CLK_DDR#0 (13)
M_CLK_DDR#1 (13)
M_CLK_DDR#2 (13)
M_CLK_DDR#3 (13)

M_CKE0 (12,13)
M_CKE1 (12,13)
M_CKE2 (12,13)
M_CKE3 (12,13)

M_CS#0 (12,13)
M_CS#1 (12,13)
M_CS#2 (12,13)
M_CS#3 (12,13)

M_ODT0 (12,13)
M_ODT1 (12,13)
M_ODT2 (12,13)
M_ODT3 (12,13)

R492 0/BR492 0/B

CLK_PCIE_MCH# (3)
CLK_PCIE_MCH (3)
DREFCLK# (3)
DREFCLK (3)
DREFSSCLK# (3)
DREFSSCLK (3)

DMI_TXN[3:0] (15)

DMI_TXP[3:0] (15)

CRT_BLUE(19)

CRT_GREEN(19)

CRT_RED(19)

*40.2/F/B

*40.2/F/B

VGAHSYNC(19)

VGAVSYNC(19)

R96

R96

VCC3

DDCDATA(19)

DDCCLK(19)

BLON(18)

LVDS_CLK(18)
LVDS_DAT(18)

PAD

PAD

DIGON(18)

R109

R109

*40.2/F/B

*40.2/F/B

SMDDR_VREF

3

R460 10K/FR460 10K/F
R461 10K/FR461 10K/F

T128

T128

L_IBG

R463

R463

1.5K/F/B

1.5K/F/B

R468 150/FR468 150/F
R469 150/FR469 150/F
R467 150/FR467 150/F

R479 255/FR479 255/F

3

T19PAD T19PAD

L_CLKCTLA
L_CLKCTLB

L_VBG
L_VREFH

L_VREFL

TXLCLKOUT-(18)
TXLCLKOUT+(18)
TXUCLKOUT-(18)
TXUCLKOUT+(18)

TXLOUT0-(18)
TXLOUT1-(18)
TXLOUT2-(18)

TXLOUT0+(18)
TXLOUT1+(18)
TXLOUT2+(18)

TXUOUT0-(18)
TXUOUT1-(18)
TXUOUT2-(18)

TXUOUT0+(18)
TXUOUT1+(18)
TXUOUT2+(18)

R470 4.99K/F/BR470 4.99K/F/B

CRTIREF

L_IBG

TVIREF

U39C

U39C

D32

L_BKLTCTL

J30

L_BKLTEN

H30

L_CLKCTLA

H29

L_CLKCTLB

G26

L_DDC_CLK

G25

L_DDC_DATA

B38

L_IBG

C35

L_VBG

F32

L_VDDEN

C33

L_VREFH

C32

L_VREFL

A33

LA_CLK#

A32

LA_CLK

E27

LB_CLK#

E26

LB_CLK

C37

LA_DATA#_0

B35

LA_DATA#_1

A37

LA_DATA#_2

B37

LA_DATA_0

B34

LA_DATA_1

A36

LA_DATA_2

G30

LB_DATA#_0

D30

LB_DATA#_1

F29

LB_DATA#_2

F30

LB_DATA_0

D29

LB_DATA_1

F28

LB_DATA_2

A16

TV_DACA_OUT

C18

TV_DACB_OUT

A19

TV_DACC_OUT

J20

TV_IREF

B16

TV_IRTNA

B18

TV_IRTNB

B19

TV_IRTNC

E23

CRT_BLUE

D23

CRT_BLUE#

C22

CRT_GREEN

B22

CRT_GREEN#

A21

CRT_RED

B21

CRT_RED#

C26

CRT_DDC_CLK

C25

CRT_DDC_DATA

G23

CRT_HSYNC

J22

CRT_IREF

H23

CRT_VSYNC

Calistoga

Calistoga

+V1.5_PCIE
VCC3
SMDDR_VREF

1.8VSUS

2

+V1.5_PCIE(10)

EXP_A_COMPX

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8

EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11

LVDS

LVDS

TV

TV

VGA

VGA

+V1.5_PCIE (10)
VCC3 (3,9,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32)
SMDDR_VREF (13,34)

1.8VSUS (9,13,32,34)

2

EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

EXP_A_RXP_0

EXP_A_RXP_1

EXP_A_RXP_2

EXP_A_RXP_3

EXP_A_RXP_4

EXP_A_RXP_5

EXP_A_RXP_6

EXP_A_RXP_7

EXP_A_RXP_8

EXP_A_RXP_9

EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

EXP_A_TXN_0

EXP_A_TXN_1

EXP_A_TXN_2

EXP_A_TXN_3

EXP_A_TXN_4

EXP_A_TXN_5

EXP_A_TXN_6

EXP_A_TXN_7

EXP_A_TXN_8

EXP_A_TXN_9

EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15

EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8

EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

D40
D38

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

R153

R153

24.9/F_4

24.9/F_4

GMCH DMI VEDIO(3 OF 6) A

GMCH DMI VEDIO(3 OF 6) A

GMCH DMI VEDIO(3 OF 6) A

1

8

+V1.5_PCIE

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

of

836Tuesday, May 16, 2006

836Tuesday, May 16, 2006

836Tuesday, May 16, 2006

1

GMCH_VTT

D D

C C

B B

A A

5

C171

C171

330U/2.5V/ESR-9/POS

330U/2.5V/ESR-9/POS

+

+

5

AA33

W33

P33
N33

AA32

Y32

W32

V32
P32
N32

M32

AA31

W31

V31
T31
R31
P31
N31

M31

AA30

Y30

W30

V30
U30
T30
R30
P30
N30

M30

AA29

Y29

W29

V29
U29
R29
P29

M29

AB28
AA28

Y28
V28
U28
T28
R28
P28
N28

M28

P27
N27

M27

P26
N26

N25

M25

P24
N24

M24
AB23
AA23

Y23
P23
N23

M23
AC22

AB22

Y22

W22

P22
N22

M22
AC21

AA21

W21

N21

M21
AC20

AB20

Y20

W20

P20
N20

M20
AB19

AA19

Y19
N19

M19

N18

M18

P17
N17

M17

N16

M16

U39G

U39G

VCC_0
VCC_1
VCC_2
VCC_3

L33

VCC_4

J33

VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

L32

VCC_13

J32

VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32

L30

VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41

L29

VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52

L28

VCC_53
VCC_54
VCC_55
VCC_56

L27

VCC_57
VCC_58
VCC_59

L26

VCC_60
VCC_61
VCC_62

L25

VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72

L23

VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80

L22

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86

L21

VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94

L20

VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100

L19

VCC_101
VCC_102
VCC_103

L18

VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109

L16

VCC_110

VCC

VCC

Calistoga

Calistoga

VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8

VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99

4

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

25mils

4

25mils

VCC_SM1
VCC_SM2

VCC_SM106
VCC_SM107

GMCH_VTT

330U/2.5V/ESR-9/POS

330U/2.5V/ESR-9/POS

C640 0.47UC640 0.47U
C639 0.47UC639 0.47U

1.8VSUS

12

C173

C173
10U

10U

C160

C160

place C93 on BA23 Ball

0.47U

0.47U

+

+

C189

C189
330U

330U

2.5V

2.5V

C124

C124

0.47U

0.47U

120mils

12

C132

C132
10U

10U

place C439 on AJ23 Ball

MCH_CFG_6 shall be PH !!
depopulate R2504 if use
Calistoga

Have to review again
ADD Matrix in silkscreen

place C51 on BA15 Ball

C600

C600

0.47U

0.47U

25mils

C101 0.47UC101 0.47U
C102 0.47UC102 0.47U

MCH_CFG_5(8)

MCH_CFG_6(8)

MCH_CFG_7(8)

MCH_CFG_9(8)

MCH_CFG_10(8)

MCH_CFG_11(8)

MCH_CFG_12(8)

MCH_CFG_13(8)

MCH_CFG_16(8)

MCH_CFG_18(8)

MCH_CFG_19(8)

MCH_CFG_20(8)

3

C99

C99

12

C100

C100

C103

C103

+

+

10U

10U

10U

10U

C153

C153

0.47U

0.47U

< 0.1" . 15mils/15mils space
use 1% R

GMCH Strap pin

MCH_CFG_5

MCH_CFG_6

MCH_CFG_7

MCH_CFG_9

MCH_CFG_10

MCH_CFG_11

MCH_CFG_12

MCH_CFG_13

MCH_CFG_16

MCH_CFG_18

MCH_CFG_19

MCH_CFG_20

3

12

C1141UC114
1U

GMCH_VTT(3,4,5,6,10,14,17,33)

1.8VSUS(8,13,32,34)

Depopulate R2504 for Calistoga-Allen

R100 *2.2K_4R100 *2.2K_4

R106 *2.2K_4R106 *2.2K_4

R108 *2.2K_4R108 *2.2K_4

R102 *2.2K_4R102 *2.2K_4

R107 *2.2K_4R107 *2.2K_4

R97 *2.2K_4R97 *2.2K_4

R103 *2.2K_4R103 *2.2K_4

R104 *2.2K_4R104 *2.2K_4

R105 *2.2K_4R105 *2.2K_4

R112 *1K/F_4R112 *1K/F_4

R129 *1K/F_4R129 *1K/F_4

R124 *1K/F_4R124 *1K/F_4

C205

C205

0.1U/10V

0.1U/10V

GMCH_VTT

1.8VSUS

C206

C206

0.1U/10V

0.1U/10V

C117

C117

0.1U/10V

0.1U/10V

VCC3

VCC3

2

U39F

U39F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

VCC3

2

NCTF

NCTF

Calistoga

Calistoga

1.MCH_CFG_5 Low = DMI X2, High=DMIX4

2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)

3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU

4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility

5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility

6.MCH_CFG_11: Low=Calistoga, High=Reserved

7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
High=Dynamic ODT Enabled.

8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V

9.MCH_CFG_19 DMI LANE Reversal:Low=Normal,High=LANES Reversed.

10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only SDVO
or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1 are
operation simultaneously via the PEG port.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH PW & STRAP(4 OF 6) A

GMCH PW & STRAP(4 OF 6) A

GMCH PW & STRAP(4 OF 6) A

Date: Sheet

Date: Sheet

Date: Sheet

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

1

9

VCC1.5

100mils

of

of

of

936Tuesday, May 16, 2006

936Tuesday, May 16, 2006

936Tuesday, May 16, 2006

1

5

4

3

2

1

10

GMCH_VTT

VCC2.5

VCC1.5

D D

+V1.5_PCIE

12

C249

C249

C238

C238

10U

10U

10U

GMCH_VTT
VCC1.5
+V1.5_PCIE
VCC2.5
VCC3

10U

C C

B B

L28 FCM2012C-121L28 FCM2012C-121

30mils

Oreginal FCM2012C-181
"CX000181008"

12

GMCH_VTT (3,4,5,6,9,14,17,33)
VCC1.5 (5,9,15,17,23,32,33)
+V1.5_PCIE (8)
VCC2.5 (32,34)
VCC3 (3,8,9,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32)

12

C107

C107
10U

10U

+

+

C294

C294
330U

330U

60mils

C230

C230

0.1U/10V

0.1U/10V

R1560R156
0

RC0805

VCC1.5

C109

C109

0.1U/10V

0.1U/10V

0.1U/10V

0.1U/10V

VCC3

C134

C134

0.1U/10V

0.1U/10V

+V1.5_DPLLA

C176

C176

C139

C139

0.1U/10V

0.1U/10V

+V1.5_TVDAC

C144

C144

0.1U/10V

0.1U/10V

C156

C156

0.1U/10V

0.1U/10V

C146

C146
10U

10U

VCC3

12

C204

C204

0.1U/10V

0.1U/10V

VCC2.5

C125

C125

0.1U/10V

0.1U/10V

0.1U/10V

0.1U/10V

VCC1.5

C157

C157

0.1U/10V

0.1U/10V

C155

C155

0.1U/10V

0.1U/10V

60mils

R110 0R110 0

C226

C226

VCC2.5

C208

C208

0.1U/10V

0.1U/10V

VCC1.5

RC0805

C218

C218
10U

10U

C246

C246

0.1U/10V

0.1U/10V

12

VCC1.5

VCC1.5

12

C259

C259

10U

10U

40mils

C121

C121

0.1U/10V

0.1U/10V

VCC2.5

VCC1.5

+V1.5_TVDAC

+V1.5_PCIE

C198

C198

0.1U/10V

0.1U/10V

+V1.5_DPLLA

VCC3

+V1.5_DPLLA

AC33

AC31

AH30
AG30

AD30
AC30
AG29

AD29
AC29
AG28

AH22
AH21
AH20

AH19

AH15
AH14

AG14

AD12

AJ41
AB41

AK31
AF31
AE31

AL30
AK30
AJ30

AF30
AE30

AF29
AE29

AF28
AE28

AJ21
AJ20

AF14
AE14

AF13
AE13
AF12
AE12

H22

C30
B30
A30

Y41
V41
R41
N41
L41

G41

H41

F21
E21

G21

B26
C39
AF1

A38

B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
A23

B23
B25

H19

P19
P16

P15

Y14

U39H

U39H

VCCSYNC
VCC_TXLVDS0

VCC_TXLVDS1
VCC_TXLVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

VCCA_LVDS
VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC
VCC_HV0

VCC_HV1
VCC_HV2

VCCD_QTVDAC
VCCAUX0

VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

POWER

POWER

Calistoga

Calistoga

VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

2.2U/6.3V

330U/2.5V/ESR-9/POS

330U/2.5V/ESR-9/POS

2.2U/6.3V

+

C169

+

C169

C104

C104

4.7U

4.7U

C131

C131

C203

C203

0.22U

0.22U

0.22U

0.22U

C111

C111

0.47U

0.47U

C105

C105

0.47U

0.47U

C120

C120

C106

C106

0.22U

0.22U

C112

C112

0.1U/10V

0.1U/10V

C147

C147

0.47U

0.47U

GMCH_VTT

GMCH_VTT

C127

C127

0.47U

0.47U

12

C175

C175
10U

10U

A A

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH POWER (5 OF 6) A

GMCH POWER (5 OF 6) A

GMCH POWER (5 OF 6) A

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

10 36Tuesday, May 16, 2006

10 36Tuesday, May 16, 2006

10 36Tuesday, May 16, 2006

of

of

1

of

5

U39I

U39I

AC41

VSS_0

AA41

VSS_1

W41

VSS_2

T41

VSS_3

P41

VSS_4

M41

VSS_5

J41

VSS_6

F41

VSS_7

AV40

VSS_8

D D

C C

B B

A A

5

AP40
AN40
AK40

AJ40
AH40
AG40

AF40
AE40

AY39

AW39

AV39
AR39
AN39

AJ39
AC39
AB39
AA39

W39

R39
N39

M39

H39
G39

D39

AT38
AM38
AH38
AG38

AF38
AE38

C38
AK37
AH37
AB37
AA37

W37

R37

N37

M37

H37

G37

D37
AY36

AW36

AN36
AH36
AG36

AF36
AE36
AC36

C36

BA35
AV35
AR35
AH35
AB35
AA35

W35

R35
N35

M35

H35
G35

D35

AN34

B40

Y39
V39

T39
P39

L39
J39

F39

Y37
V37

T37
P37

L37
J37

F37

B36

Y35
V35

T35
P35

L35
J35

F35

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

Calistoga

Calistoga

VSS

VSS

4

VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179

4

AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23

3

U39J

U39J

AT23

VSS_180

AN23

VSS_181

AM23

VSS_182

AH23

VSS_183

AC23

VSS_184

W23

VSS_185

K23

VSS_186

J23

VSS_187

F23

VSS_188

C23

VSS_189

AA22

VSS_190

K22

VSS_191

G22

VSS_192

F22

VSS_193

E22

VSS_194

D22

VSS_195

A22

VSS_196

BA21

VSS_197

AV21

VSS_198

AR21

VSS_199

AN21

VSS_200

AL21

VSS_201

AB21

VSS_202

Y21

VSS_203

P21

VSS_204

K21

VSS_205

J21

VSS_206

H21

VSS_207

C21

VSS_208

AW20

VSS_209

AR20

VSS_210

AM20

VSS_211

AA20

VSS_212

K20

VSS_213

B20

VSS_214

A20

VSS_215

AN19

VSS_216

AC19

VSS_217

W19

VSS_218

K19

VSS_219

G19

VSS_220

C19

VSS_221

AH18

VSS_222

P18

VSS_223

H18

VSS_224

D18

VSS_225

A18

VSS_226

AY17

VSS_227

AR17

VSS_228

AP17

VSS_229

AM17

VSS_230

AK17

VSS_231

AV16

VSS_232

AN16

VSS_233

AL16

VSS_234

J16

VSS_235

F16

VSS_236

C16

VSS_237

AN15

VSS_238

AM15

VSS_239

AK15

VSS_240

N15

VSS_241

M15

VSS_242

L15

VSS_243

B15

VSS_244

A15

VSS_245

BA14

VSS_246

AT14

VSS_247

AK14

VSS_248

AD14

VSS_249

AA14

VSS_250

U14

VSS_251

K14

VSS_252

H14

VSS_253

E14

VSS_254

AV13

VSS_255

AR13

VSS_256

AN13

VSS_257

AM13

VSS_258

AL13

VSS_259

AG13

VSS_260

P13

VSS_261

F13

VSS_262

D13

VSS_263

B13

VSS_264

AY12

VSS_265

AC12

VSS_266

K12

VSS_267

H12

VSS_268

E12

VSS_269

AD11

VSS_270

AA11

VSS_271

Y11

VSS_272

3

VSS

VSS

Calistoga

Calistoga

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

2

1

11

PROJECT : K3W

PROJECT : K3W

PROJECT : K3W

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH GND(6 OF 6) A

GMCH GND(6 OF 6) A

GMCH GND(6 OF 6) A

Date: Sheet

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

11 36Tuesday, May 16, 2006

11 36Tuesday, May 16, 2006

11 36Tuesday, May 16, 2006

of

of

1

of