Quanta KL8 Schematic

1

www.schematic-x.blogspot.com

KL8 Intel Huron River Platform

2

3

4

5

6

7

8

01

A A

B B

C C

DDRIII-SODIMM1 H 4.0

DDRIII-SODIMM2 H 8.0

Speaker

PG 20

(Internal MIC)

PG 20

Head-Phone Jack

PG 20

PG 14

PG 15

Dual Channel DDR3 1333MHz 1.5V

SSD - HDD

PG 24

SATA - HDD

PG 22

SATA - CD-ROM

PG 22

USB+eSATA

PG 26

AUDIO CODEC

ALC272Audio Jack

PG 20

6$7$0%

6$7$0%

6$7$0%

6$7$0%

,+'$

32.768KHz

EC

IT8518

<MCH Process> SandyBridge 0.61

rPGA 988

DDR SYSTEM MEMORY

PG 4,5,6,7

)',;

CougarPoint 0.7

PG 8,9,10,11,12,13

FDI

PCH

DMI

DMIFDI

/3&

'0,;

FAN / THERMAL EMC2103-2

Graphics Interfaces

INT_HDMI

+'0,&21

INT_CRT

INT_LVDS

/&'&211

86%

3RUW 3RUW 3RUW 3RUW 3RUW

USB2.0 Ports X2

BlueTooth

PG 25 PG 32

Finger Print

PG 32

&57

PG 30

PG 16

PG 17

PG 18

CAMERA

PG 29

3&,(

USB 3.0

PG 27

25MHz

LAN

,QWHO

*/$1

:*/0

PAGE 19

Card Reader

JMB385/387

Mini PCI-E Card X2

:/$166'

PG 21

PAGE 23

REGULATOR (DDR3)

1.5VSUS, 0.75VSMDDR_VTERM,1.5V

1.5V_GPU,1.5V_CPU

REGULATOR

+1.05V_VTT,+1.8V

DC/DC

3VPCU, 5VPCU, +15V

CPU Core

PG 39

PG 43

PAGE 34

G-SENSOR

PG 28

D D

1

K/B

PG 31

2

T/P

PG 31

Battery

PG 36

2'nd Battery

PG 44

3

Charger

PG 37

TPM

4

PG 32

25MHz

5

5-IN-1 Card Reader CONN

PG 21

6

352-(&7./

Quanta Computer Inc.

Documen t Number

Block Diagram

Tuesday, Januar y 04, 2011

Date: Sheet of

7

KL8

144

8

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

5VPCU

ADP IN

BAT

D D

Charger Circuit

ISL88731A

VIN

MAX17020ETJ+

1a

1

HWPG(3/5VPCU)

3VPCU

4

S5_ON

3VPCU

2

WRST_8512#

470K

R

0.1U

C

3

NBSWON#

WRST#

EC

ITE-8518

HWPG(All Power GOOD)

12

DELAY 99mS

AO6402A

6

SIO_PWRBTN#

7

8a

PM_SLP_S4#

8b

PM_SLP_S3#

ECPWROK

13

12a

VRON

5VPCU

3VPCU

RSMST#

5

3V_S5

RSMRST#

PWRBTN#

5V_S5

15

DRAMPWROK

PCH

SYS_PWROK

PLTRST#

GPIO

SYS_PWROK

PWROK

MEPWROK

GPIO

HWPG(All Power GOOD)

12

PM_DRAM_PWRGD

16

H_PWRGOOD

17

PLTRST#

18

DGPU_HOLD_RST#

25

15

SYS_PWROK

DGPU_PWR_EN#

19a

GFXPG_RGPIO

24

VIN

C C

9a

SUSON

TPS51116REGR

LDO

5VPCU

AO6402A

10a

+1.5V_SUS

10d

0.75VSMDDR_VTERM

10c

+1.5VCPU_PG

5VSUS

3VPCU

10a

AO6402A

9b

B B

MAINON

3VSUS

VIN

20a

GFXPG_1V_EN

GFX_CORE

1.5VSUS

LDO RT9018B

21a

+1V_GFX_PCIE

19a

DGPU_PWR_EN#

19c

19b

MAX8792

20b

Huron River

VTTPWRGOOD

SM_DRAMPWROK

UNCOREPWRGOOD

RSTIN#

14

IMVP_PWRGD

VR1_READY

VIN

OZ8115

VIN

OZ8115

VIN

OZ8115

VIN

OZ8115

5VPCU

AON7410

3VPCU

5VPCU

VT1316M

+

VT1317S

VRON

R

1a

10a

10b

11b

10b

11b

10b

11b

10b

11b

10b

GPU_RST#

26

13

+VCC_CORE

+VCC_GFX

13

0ohm

HWPG(3/5VPCU)

HWPG(+1.5VSUS)

+1.05V_VTT

HWPG(+1.05V_VTT)

+1.05_PCH

HWPG(+1.05V_VTT)

+1.8V

HWPG(+1.8V)

+0.85V

HWPG(+0.85V)

+5V

+3V

02

Madison

GPU_RST#

HWPG(All Power GOOD)

AON7410

+1V_PCIE_PG

4

+3V

AO6402A

1.5VSUS

TPCA8030-H

+1.8V

AO6402A

+3.3V_DELAY

22a

+1.5V_GPU

23a 12

+1.8V_GPU

Delay

DGPU_PWROK

23b

HWPG

1.5VSUS

10b

+1.5V

AO6402A

1.5VSUS

10b

+1.5VCPU

AO6402A

GFXPG_R

24

3

Delay

10c

2

+1.5VCPU_PG

352-(&7./

Quanta Computer Inc.

Document Numb er 1A

Date: Sheet of

POWER SEQUENCE DIAGRAM

Tuesday, January 04, 2011 442

1

RevSize

21b

A A

5

CLK Gen(CLK)

5

4

3

2

1

03

D D

C C

02/20 DEL for Pre-ES1

CPU_CLK select(CLK)

B B

02/20 DEL for Pre-ES1

352-(&7./

A A

CPU_SEL

01

CPU0/1=133MHz (default)

5

CPU0/1=100MHz

Document Number

Tuesday, January 04, 2011 3 44

Date: Sheet of

4

3

2

Date: Sheet of

352-(&7./

Quanta Computer Inc.

Clock Generator

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

Sandy Bridge Processor (CLK,MISC,JTAG)

+1.05V_PCH

04

RevSize

1A

RevSize

1A

RevSize

1A

Sandy Bridge Processor (DMI,PEG,FDI)

DMI_TXN08 DMI_TXN18 DMI_TXN28

D D

C C

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.

B B

FDI Disable

A A

DMI_TXN38 DMI_T XP08

DMI_T XP18 DMI_T XP28 DMI_T XP38

DMI_RXN08 DMI_RXN18 DMI_RXN28 DMI_RXN38

DMI_RXP08 DMI_RXP18 DMI_RXP28 DMI_RXP38

FDI_TXN08 FDI_TXN18 FDI_TXN28 FDI_TXN38 FDI_TXN48 FDI_TXN58 FDI_TXN68 FDI_TXN78

FDI_TXP08 FDI_TXP18 FDI_TXP28 FDI_TXP38 FDI_TXP48 FDI_TXP58 FDI_TXP68 FDI_TXP78

FDI_FSYNC08 FDI_FSYNC18

FDI_INT8

FDI_LSYNC08 FDI_LSYNC18

eDP_COMP INT_eDP_HPD_Q

5

U21A

B27 B25 A25 B24

B28 B26 A24 B23

G21 E22 F21 D21

G22 D22 F20 C21

A21 H19 E19 F18 B21 C20 D18 E17

A22 G19 E20 G18 B20 C19 D19 F17

J18 J17

H20 J19

H17

A18 A17 B16

C15 D15

C17 F16 C16 G15

C18 E16 D16 F15

U21A

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]

FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]

FDI0_FSYNC FDI1_FSYNC

FDI_INT FDI0_LSYNC

FDI1_LSYNC

eDP_COMPI O eDP_ICOMPO eDP_HPD

eDP_AUX eDP_AUX#

eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]

eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]

CPU-989P-rPGA

DMI

Intel(R) FDI

PCI EXPRESS* - GRAPHICS

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG x16 (UMA Non-stuff)

08/11 Del PEG trace

4

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.

PEG_COM P

PEG_COMP connect to PIN J21 W:12mils/S:15mils /L: 5 00mils.

PLTRST#10,19,23,27,32

U9

1 2

IN GND3OUT

74LVC1G07GW

SNB_IVB# N.A at SNB EDS #27637 0.7v1

H_SNB_IVB#9

EC_PECI33

+1.05V_PCH

CPU_PLTRST#

C58

0.1U/10V_4

R151 56/J_4R151 56/J_4

R122 *0_4SR122 *0_4S

R133 *0_4SR133 *0_4S R132 10K/J_4R132 10K/J_4

R138 75/J_4R138 75/J_4 R139 43/J_4R139 43/J_4

H_PROCHOT#33,43

PM_THRM TRIP#11

PM_SYNC8

H_PWRGOOD11

CPU_PLTRST#

+3V_S5

VCC5NC

4

DP & PEG Compensation

+1.05V_PCH

PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms

A36

+1.05V_PCH

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

3

SKTOCC#

TP7TP7

TP_CATERR#

TP51TP51

H_PROCHOT#_R

PM_SYNC_R

H_PWRGOOD_R

C525 *0.1U/10V_4C525 *0.1U/10V_4

PM_DRAM_PWRGD_R

CPU_PLTRST#_R

SYS_PWROK8,38

PM_DRAM_PWRGD8

PM_DRAM_PWRGD_Q

R459 24.9/F_4R459 24.9/F_4

R461 10K_4R461 10K_4

R460 24.9/F_4R460 24.9/F_4

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

AR33

RV10 *EGA-0402RV10 *EGA-0402

PEG_COM P

INT_eDP_HPD_Q

eDP_COMP

U21B

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

V8

SM_DRAMPWROK

RESET#

CPU-989P-rPGA

R203 *0/J_4R203 *0/J_4

R202

R202 0/F_4

0/F_4

R201 *3K/F_4R201 *3K/F_4

BCLK#

MISCTHERMALPWR MANAGEMENT

+3V_S5

2 1

3 5

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

C141

C141 *0.1U/10V_4

*0.1U/10V_4

U13

4

*TC7SH08

R215 39/J_4R215 39/J_4

PRDY#

PREQ#

TRST#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

EC-B12,EC-C04

Processor pull-up(CPU)

2

A28

BCLK

A27

CLK_DPLL_SSCLKP_R

A16

CLK_DPLL_SSCLKN_R

A15

R8

SM_RCOMP_0

R469 140/F_4R469 140/F_4

SM_RCOMP_1

R204 26.1/F_4R204 26.1/F_4

SM_RCOMP_2

R205 200/F_4R205 200/F_4

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils, SM_RCOMP[1] W:20mils/S:20mils/L: 500mils, SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,

XDP_PRDY # XDP_PREQ #

XDP_TCLK XDP_TMS XDP_TRST #

XDP_TDI _R XDP_TDO

XDP_DBR ST#

1

2

DBR#

TCK TMS

TDI

TDO

+1.5VC PU

AK1 A5 A4

AP29 AP27

AR26 AR27 AP30

AR28 AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

R214

R214 200/F_4

200/F_4 R211 130/F_4R211 130/F_4

3

Q21 2N7002KQ21 2N7002K

CLK_CPU_BCLKP 10 CLK_CPU_BCLKN 10

CPU_DRAMRST# 5

TP10TP10 TP12TP12

TP52TP52 TP50TP50 TP9TP9

TP49TP49 TP53TP53

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

MAINON# 35

EC-B18

XDP_DBR ST# 8

CLK_DPLL_SSCLKP 10 CLK_DPLL_SSCLKN 10

A36

H_PROCHOT#

R150 62/F_4R150 62/F_4

XDP_TDO

R456 51/J_4R456 51/J_4

XDP_TMS

R452 51/J_4R452 51/J_4

XDP_TDI _R

R451 51/J_4R451 51/J_4

XDP_PREQ #

R153 *51/J_4R153 *51/J_4

XDP_TCLK

R453 51/J_4R453 51/J_4

XDP_TRST #

R140 51/J_4R140 51/J_4

352-(&7./

Quanta Computer Inc.

Document Number

Tuesday, January 04, 2011 4 44

Date: Sheet of

Sandy Bridge 1/4

1

5

4

3

2

1

Sandy Bridge Processor (DDR3)

U21D

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

D10

K10

AP3

AP2 AP5

AT5 AT6 AP6

AT8 AT9

AA9 AA7

AB8 AB9

J10

C9 A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2

J7 J8

K9

J9

K8 K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

U21D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

DDR SYSTEM MEMORY B

M_B_CLKP0 14 M_B_CLKN0 14 M_B_CKE0 14

M_B_CLKP1 14 M_B_CLKN1 14 M_B_CKE1 14

M_B_CS#0 14 M_B_CS#1 14

M_B_ODT0 14 M_B_ODT1 14

U21C

AB6

SA_CLK[0]

M_A_DQ[63:0]15

D D

C C

B B

M_A_BS#015 M_A_BS#115 M_A_BS#215

M_A_CAS#15 M_A_RAS#15 M_A_WE#15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M10

AG6 AG5

AH5 AH6

AH8 AH9

AP11 AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

AD9

F10 G10

N10

AK6 AK5

AJ5 AJ6 AJ8 AK8 AJ9 AK9

AL9 AL8

AE8 AF9

C5 D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7 K4 K5 K1

J1

J5

J4

J2 K2 M8

N8 N7

M9 N9 M7

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0] SA_ODT[1]

RSVD_TP[9]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLKP0 15 M_A_CLKN0 15 M_A_CKE0 15

M_A_CLKP1 15 M_A_CLKN1 15 M_A_CKE1 15

M_A_CS#0 15 M_A_CS#1 15

M_A_ODT0 15 M_A_ODT1 15

M_A_DQSN[7:0] 15

M_A_DQSP[7:0] 15

M_A_A[15:0] 15

M_B_DQ[63:0]14

M_B_BS#014 M_B_BS#114 M_B_BS#214

M_B_CAS#14 M_B_RAS#14 M_B_WE#14

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

05

M_B_DQSN[7:0] 14

M_B_DQSP[7:0] 14

M_B_A[15:0] 14

CPU-989P-rPGA

+1.5V_SUS

R200 *0/J_4R200 *0/J_4

R216

R216 1K/F_4

A A

5

R217 1K/F_4R217 1K/F_4

DRAMRST_CNTRL_PCH10

CPU_DRAMRST#_R

4

1K/F_4

R212 *0_4sR212 *0_4s

3

Q20

Q20 2N7002K

2N7002K

2

C137

0.047U/10V_4

1

R210

4.99K/F_4

CPU_DRAMRST# 4DDR3_DRAMRST#14,15

3

CPU-989P-rPGA

352-(&7./

Quanta Computer Inc.

Documen t Number

Tuesday, January 04, 2011 5 44

Date: Sheet of

2

Date: Sheet of

Sandy Bridge 2/4

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

Sandy Bridge Processor (POWER)

CPU Core Power

SNB 45W:55A 22uF x 32

C384

C384 22U/6.3V_8

22U/6.3V_8

C381

C381 22U/6.3V_8

22U/6.3V_8

C77

C77 22U/6.3V_8

22U/6.3V_8

C389

C389 22U/6.3V_8

22U/6.3V_8

C87

C87 22U/6.3V_8

22U/6.3V_8

22uF x 3 (Non-stuff)

C383

C382

22U/6.3V_8

C388

C78

22U/6.3V_8

C75

C76

22U/6.3V_8

C61

C390

22U/6.3V_8

C395

C394

22U/6.3V_8

D D

C C

Delete C80,C81 for ESD

C371

C371 22U/6.3V_8

22U/6.3V_8

B B

C372

C372 22U/6.3V_8

22U/6.3V_8

C66

C66 22U/6.3V_8

22U/6.3V_8

C373

C373 22U/6.3V_8

22U/6.3V_8

C48

C48 22U/6.3V_8

22U/6.3V_8

C376

C376 22U/6.3V_8

22U/6.3V_8

C47

C47 22U/6.3V_8

22U/6.3V_8

Reserved

C45

C62

C63

C63 22U/6.3V_8

22U/6.3V_8

A A

22U/6.3V_8

C79

C79 22U/6.3V_8

22U/6.3V_8

C64

C64 22U/6.3V_8

22U/6.3V_8

C369

C369 22U/6.3V_8

22U/6.3V_8

C46

C46 22U/6.3V_8

22U/6.3V_8

C49

C49 22U/6.3V_8

22U/6.3V_8

C74

C74 22U/6.3V_8

22U/6.3V_8

C370

C370 22U/6.3V_8

22U/6.3V_8

C65

C65 22U/6.3V_8

22U/6.3V_8

+VCC_CORE

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

U21F

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

CPU-989P-rPGA

POWER

PEG AND DDR

CORE SUPPLY

SENSE LINES SVID

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

+1.05V_PCH

+1.05V_VTT_40

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

CPU VTT

SNB 45W:8.5A 22uF x 10 22uF x 6 (Non-stuff)

C104

C107

22U/6.3V_8

10U/6.3V_6

C405

C406

*22U/6.3V_8

22U/6.3V_8

22uF (Reserved)

C401

C402

*22U/6.3V_8

22U/6.3V_8

R458 *0/short_4R458 *0/short_4

VTT_SENSE 42

TP56TP56

C105

C105 22U/6.3V_8

22U/6.3V_8

C407

C407 22U/6.3V_8

22U/6.3V_8

C403

C403 *22U/6.3V_8

*22U/6.3V_8

R124 100/J_4R124 100/J_4

R136 100/J_4R136 100/J_4

SMDDR_VREF14,15,38

C103

C103 22U/6.3V_8

22U/6.3V_8

C108

C108 10U/6.3V_6

10U/6.3V_6

MAINON_15V35,38

C102

C102 22U/6.3V_8

22U/6.3V_8

C100

C100 10U/6.3V_6

10U/6.3V_6

C404

C404 22U/6.3V_8

22U/6.3V_8

EMI reserve

+1.05V_PCH

CPU VCCPL

SNB 45W:3A 330uF/7mohm x 1 10uF x 1 1uF x 2

+VCC_CORE

VCC_SENSE 43 VSS_SENSE 43

C101

C101 22U/6.3V_8

22U/6.3V_8

C106

C106 22U/6.3V_8

22U/6.3V_8

C425

C425 *1U/6.3V_4

*1U/6.3V_4

R473 *0/J_8R473 *0/J_8

3

CPU VGT

SNB 45W:22A 22uF x 12 22uF x 4 (Reserved)

+VCC_GFX

SV15 *EGA-0402SV15 *EGA-0402

ESD reserve

+1.8V

10U/6.3V_6

+VDDR_REF_CPU

1

Q39

Q39 2N7002K

2N7002K

2

C387

C387 22U/6.3V_8

22U/6.3V_8

C84

C84 22U/6.3V_8

22U/6.3V_8

C92

C92 22U/6.3V_8

22U/6.3V_8

C399

C399 22U/6.3V_8

22U/6.3V_8

SC28

0.1U

SC33

SC33 68p

68p

C413

R470

R470 100K/J_4

100K/J_4

EC-A-06

5

4

3

Sandy Bridge Processor (GRAPHIC POWER)

POWER

C391

C391 22U/6.3V_8

22U/6.3V_8

C88

C88 22U/6.3V_8

22U/6.3V_8

C400

C400 22U/6.3V_8

22U/6.3V_8

C378

C378 22U/6.3V_8

22U/6.3V_8

SC29

SC30

0.1U

SC34

SC35

0.1U

C412

C412 1U/6.3V_4

1U/6.3V_4

Layout note: need routing together and ALERT nee d between CLK and DATA

Place PU resistor close to CPU

C385

C396

22U/6.3V_8

C95

C91

22U/6.3V_8

C96

C97

22U/6.3V_8

C398

C377

22U/6.3V_8

SC31

SC32

0.1U

SC36

SC37

0.1U

+

C417

C411

330U/2V_7343

1U/6.3V_4

H_CPU_SVIDCLK

H_CPU_SVIDDAT

R170 *0/short_4R170 *0/short_4

+1.05V_PCH +1.05V_PCH

R174

R174 130/F_4

130/F_4

Place PU resistor close to CPU

H_CPU_SVIDALRT#

R163 43/J_4R163 43/J_4

U21G

AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18

AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17

AH24

AH23

AH21

AH20

AH18

AH17

B6 A6 A2

CPU-989P-rPGA

R169 *0/short_4R169 *0/short_4

+1.05V_PCH

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL1 VCCPLL2 VCCPLL3

R156

R156 75/J_4

75/J_4

R157 *0/short_4R157 *0/short_4

POWER

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

SVID CLK

Close to VR

R175

54.9/F_4

SVID DATA

Close to VR

R162

R162 *130/F_4

*130/F_4

SVID ALERT

2

VCCSA_VID1

VR_SVID_CLK 43

VR_SVID_DATA 43

VR_SVID_ALERT# 43

1.8V RAIL

+1.05V_PCH

SM_VREF

AK35 AK34

+VDDR_REF_CPU

AL1

CAD Note: +VDDR_REF_CPU should have 10 mil trace width

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

H23

H_FC_C22

C22

FC_C22

C24

TP4TP 4

TP48TP48

C127

10U/6.3V_6

C125

10U/6.3V_6

C85

10U/6.3V_6

R158 10K/J_4R158 10K/J_4

VCCSA_SEL 41

R159 10K/J_4R159 10K/J_4

R123 100/J_4R123 100/J_4

R135 100/J_4R135 100/J_4

+VDDR_REF_CPU

C136

10U/6.3V_6

+

C134

C133

*330U/2V_7343

C86

10U/6.3V_6

VCCUSA_SENSE 41

+VCC_GFX

VCC_AXG_SENSE 43 VSS_AXG_SENSE 43

CPU MCH

SNB 45W: 5A 330uF/6mohm x 1 10uF x 6

C126

C128

10U/6.3V_6

C140

C140 22U/6.3V_8

22U/6.3V_8

+1.5VCPU

C142

C142 22U/6.3V_8

22U/6.3V_8

22uF (Reserved)

+0.85V

C380

C379

*10U/6.3V_6

CPU SA

SNB 45W: 6A 330uF/7mohm x 1 10uF x 3

352-(&7./

Quanta Computer Inc.

Document Number

Tuesday, January 04, 2011 6 44

Date: Sheet of

Sandy Bridge 3/4

1

06

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

Sandy Bridge Processor (GND)

U21H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

D D

C C

B B

AT10

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

AT7 AT4 AT3

AR7 AR4 AR2

AP7 AP4 AP1

AN7 AN4

AL7 AL4 AL2

AK7 AK4

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34

H33 H30 H27 H24 H21 H18 H15 H13 H10

G35 G32 G29 G26 G23 G20 G17 G11

U21I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

SMDDR_VREF_DQ0_M315 SMDDR_VREF_DQ1_M314

Sandy Bridge Processor (RESERVED, CFG)

U21E

L7

RSVD28

AG7

RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

KEY

AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

Reserved for Intel Debug

AT2 AT1 AR1

B1

R207

R207 *1K/J_4

*1K/J_4

CFG0CFG0 CFG2 CFG4CFG4

CFG5 CFG6 CFG7CFG7

TP11TP11

TP13TP13

SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3

02/20 Add for Pre-ES1

TP55TP55

R206

R206 *1K/J_4

*1K/J_4

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

CPU-989P-rPGA

RESERVED

07

TP6TP6 TP5TP5

For rPGA socket, RSVD59 pin sh ould be left NC

CPU-989P-rPGA

Processor Strapping

The CFG signals have a default value of '1' if not terminated on t he board.

10

CFG2

A A

(PEG Static Lane Reversal)

CFG4 (DP Presence Strap)

CFG7 (PEG Defer Training)

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP

PEG train immediately following xxRESETB de assertion

5

CPU-989P-rPGA

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

CFG2 CFG4 CFG7

R167 1K/F_4R167 1K/F_4 R173 *1K/F_4R173 *1K/F_4 R146 *1K/F_4R146 *1K/F_4

3

CFG5 CFG6

R154 *1K/F_4R154 *1K/F_4 R147 *1K/F_4R147 *1K/F_4

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

352-(&7./

Quanta Computer Inc.

Documen t Number

Tuesday, Januar y 04, 2011 7 44

Date: Sheet of

2

Date: Sheet of

Sandy Bridge 4/4

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

Cougar Point (LVDS,DDI)

U8D

LVD_IBG

Deep sleep option

SUS_PWR_ACK

DPWROK

SLP_SUS

+3V_S5

+3VPCU

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

CougarPoint_R1P0

To PCH SUSACK#

(Pop R597) DSWPWRGD (Pop Q54, R663, Q55, R677)

EC

+3V_DSW

D6

*RB500V-40D6*RB500V-40 D5

*RB500V-40D5*RB500V-40

2

Q10

Q10 *PDTC144EU

*PDTC144EU

2

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

Not supportSupport

EC or NC (Non-pop R597) RSMRST (Pop R639)

+3VPCU

R33

R33 *10K_4

*10K_4

3

2

1 3

1

Cougar Point (DMI,FDI,PM)

U8C

D D

C C

C900 *1U/10V_4C900 *1U/10V_4

EC_PWROK33

PM_DRAM_PWRGD4

B B

SUS_PWR_ACK33

SIO_PWRBTN#33

+1.05V_PCH

SUS_PWR_ACK_R

XDP_DBRST#4

SYS_PWROK

EC_PWROK_R

RSMRST#33

AC_PRESENT33

DMI_RXN04 DMI_RXN14 DMI_RXN24 DMI_RXN34

DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34

DMI_TXN04 DMI_TXN14 DMI_TXN24 DMI_TXN34

DMI_TXP04 DMI_TXP14 DMI_TXP24 DMI_TXP34

R128 49.9/F_4R128 49.9/F_4 R450 750/F_4R450 750/F_4

R365 *0_4SR365 *0_4S

R386 *0_4SR386 *0_4S R370 *0/J_4R370 *0/J_4

R360 *0_4SR360 *0_4S

R376 *0_4SR376 *0_4S

R366 *0_4SR366 *0_4S

R357 *0_4SR357 *0_4S

DMI_COMP

DMI_RBIAS

XDP_DBRST#

SYS_PWROK_R

EC_PWROK_R

APWROK_R

PM_DRAM_PWRGD

RSMRST#

SUS_PWR_ACK_R

AC_PRESENT_R

PM_BATLOW#

PM_RI#

U8C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

+3V

CLKRUN# / GPIO32

+3V_S5

SUS_STAT# / GPIO61

+3V_S5

SUSCLK / GPIO62

+3V_S5

SLP_S5# / GPIO63

System Power Management

+3V_S5

DSW

+3V_S5

SLP_LAN# / GPIO29

FDI_RXP7

FDI_IN T FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16 AV12 BC10 AV14 BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

R359 *0_4SR359 *0_4S

PCIE_WAKE#

CLKRUN#

LPC_PD#

PCH_SUSCLK

SLP_LAN#

R38 *0_4SR38 *0_4S

SLP_S5#

SLP_A#

DPWROK

FDI_TXN0 4 FDI_TXN1 4 FDI_TXN2 4 FDI_TXN3 4 FDI_TXN4 4 FDI_TXN5 4 FDI_TXN6 4 FDI_TXN7 4

FDI_TXP0 4 FDI_TXP1 4 FDI_TXP2 4 FDI_TXP3 4 FDI_TXP4 4 FDI_TXP5 4 FDI_TXP6 4 FDI_TXP7 4

FDI_INT 4 FDI_FSYNC0 4 FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_LSYNC1 4

RSMRST#

PCIE_WAKE# 23,27

CLKRUN# 32,33

LPC_PD# 32

T12T12

T10T10

PM_SLP_S4# 33

SIO_SLP_S3# 33

T11T11

T7T7

PM_SYNC 4

T9T9

SLP_LAN# 19

PCH Pull-high/low(CLG) System PWR_OK(CLG)

+3V

CLKRUN#

R86 8.2K/J_4R86 8.2K/J_4

XDP_DBRST#

R72 10K/J_4R72 10K/J_4

R73 *1K/J_4R73 *1K/J_4

RSMRST# SYS_PWROK

R47 10K/J_4R47 10K/J_4

A A

PM_RI# PM_BATLOW# PCIE_WAKE# SLP_LAN# SUS_PWR_ACK AC_PRESENT

PM_DRAM_PWRGD

R57 10K/J_4R57 10K/J_4 R375 8.2K/J_4R375 8.2K/J_4 R59 10K/J_4R59 10K/J_4 R356 *10K/J_4R356 *10K/J_4 R362 10K/J_4R362 10K/J_4 R340 10K/J_4R340 10K/J_4

R349 *200/F_4R349 *200/F_4

3/16 Change topology; 200ohm PU to + 3V _S 5

5

+3V_S5

C23

C23 *0.1U/10V_4

*0.1U/10V_4

U4

SYS_PWROK

SYS_PWROK4,38

4

TC7SH08U4TC7SH08

4

2 1

3 5

R26

R26 100K/J_4

100K/J_4

IMVP_PWRGD 43

EC_PWROK

INT_LVDS_BLON18

INT_LVDS_VDDEN18

C310

C311

*0.1U/10V_4

C310

*0.1U/10V_4

EC-A-18 RF reserved.close to PCH

INT_CRT_HSYNC17 INT_CRT_VSYNC17

R place close to PCH

R78 150/F_4R78 150/F_4 R83 150/F_4R83 150/F_4 R88 150/F_4R88 150/F_4

DSWVREN

On Die DSW VR Enable

High = Enable (Default)

Low = Disable

+3V_RTC+3V_S5

3

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

R39

R39 330K/J_4

330K/J_4

R45

R45 *330K/J_4

*330K/J_4R377 100K/J_4R377 100K/J_4

LVDS_BRIGHT_PWM18

A9

R393 33/J_4R393 33/J_4 R399 33/J_4R399 33/J_4

20ohm for SW; 33ohm for UMA

INT_EDIDCLK18 INT_EDIDDAT18

+3V

R426 2.37K/F_4R426 2.37K/F_4

INT_TXLCLKOUTN18 INT_TXLCLKOUTP18

INT_TXLOUTN018 INT_TXLOUTN118 INT_TXLOUTN218

INT_TXLOUTP018 INT_TXLOUTP118 INT_TXLOUTP218

INT_CRT_BLU17 INT_CRT_GRE17 INT_CRT_RED17

INT_DDCCLK17 INT_DDCDAT17

INT_EDIDCLK INT_EDIDDAT

R418 2.2K/J_4R418 2.2K/J_4 R417 2.2K/J_4R417 2.2K/J_4

T13T13

INT_TXLCLKOUTN INT_TXLCLKOUTP

INT_TXLOUTN0 INT_TXLOUTN1 INT_TXLOUTN2

INT_TXLOUTP0 INT_TXLOUTP1 INT_TXLOUTP2

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

INT_CRT_HSYNC_R INT_CRT_VSYNC_R

DAC_IREF

R415

R415 1K/F_4

1K/F_4

DPWROK FOR DSW

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

NC

R32

R32 *10K_4

*10K_4

Q9 *2N7002Q9*2N7002

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

DPWROK

C21

C21 *0.1U/10V_4

*0.1U/10V_4

add cap to timing tune

EC-A-18 RF reserved.close to PCH

INT_HDMI_HPD_Q

DDPC_HPD_PU

DDPD_HPD_PU

INT_HDMI_HPD_Q

A33

C341 *0.1U/10V_4

*0.1U/10V_4

1

R444

R444 *100K/J_4

*100K/J_4

C346

C346 *0.1U/10V_4

*0.1U/10V_4

+5V

2

DDPC_HPD_PU DDPD_HPD_PU

C341

Follow PDG eDP disable guide

INT_EDIDCLK INT_EDIDDAT

352-(&7./

Quanta Computer Inc.

Document Number

Tuesday, January 04, 2011 8 44

Date: Sheet of

INT_HDMI_SCL 16 INT_HDMI_SDA 16

INT_HDMI_TXDN2 16 INT_HDMI_TXDP2 16 INT_HDMI_TXDN1 16 INT_HDMI_TXDP1 16 INT_HDMI_TXDN0 16 INT_HDMI_TXDP0 16 INT_HDMI_TXCN 16 INT_HDMI_TXCP 16

3

Q35

Q35 2N7002K

2N7002K

Cougar Point 1/6

1

08

INT_HDMI_HPD 16

R439

R439 100K/J_4

100K/J_4

R438 10K/J_4R438 10K/J_4 R448 10K/J_4R448 10K/J_4

R416 2.2K/J_4R416 2.2K/J_4 R75 2.2K/J_4R75 2.2K/J_4

INT. HDMI

+3V

RevSize

1A

RevSize

1A

RevSize

1A

5

RTC Circuitry(RTC)

20mils

R283 *0/J_6R283 *0/J_6

+3V_DSW

+3VPCU

R282 *0/_6sR282 *0/_6s

+3V_RTC_2 +3V_RTC_1

20MIL

R308

D D

R308 1K/J_4

1K/J_4

20MIL

+3V_RTC_0

12

BT1

BT1 BAT_CONN

BAT_CONN

HDA Bus(CLG)

ACZ_BITCLK20

ACZ_SYNC20

ACZ_RST#20

ACZ_SDOUT20

PCH JTAG Debug (CLG)

C C

R352 33/J_4R352 33/J_4 R22 33/J_4R22 33/J_4 R363 33/J_4R363 33/J_4 R335 33/J_4R335 33/J_4

PCH Dual SPI (CLG)

PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI

B B

PCH_SPI_SO

A A

R56 33/J_4R56 33/J_4 R53 33/J_4R53 33/J_4 R61 33/J_4R61 33/J_4

+3V_PCH_SPI

+3V_S5

PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R

C28

C28 *22P/50V_4

*22P/50V_4

R43 3.3K/J_4R43 3.3K/J_4

R71 *0_4sR71 *0_4s

R66 *0R_4R66 *0R_4

+3V_RTC

D22

R339 20K/J_4R339 20K/J_4

C307

BAT54C

ACZ_BITCLK_R

ACZ_SYNC_CODEC

ACZ_RST#_R ACZ_SDOUT_R

30mils

R348 20K/J_4R348 20K/J_4

C267

C267 1U/6.3V_4

1U/6.3V_4

C307 1U/6.3V_4

1U/6.3V_4

C308

C308 1U/6.3V_4

1U/6.3V_4

To Separate Codec Sync by PD3

ACZ_SYNC_CODEC

R900

R900 1M/J_4

1M/J_4

EC-B25

MX25L3205DM2I-12G: AKE39FP0Z00

W25X32VSSIG: AKE39ZP0N00

Socket: DG008000031

U6

1 6 5 2

3

+3V_PCH_SPI+3V

MX25L1605A

CE# SCK SI SO

WP#

HOLD#

A8

VDD

VSS

8

R60 3.3K/J_4R60 3.3K/J_4

7 4

12

J2

*SHORT_ PAD1

SRTC_RST#

12

J1

*SHORT_ PAD1

2

1

Q8 2N7002Q8 2N7002

+3V_PCH_SPI

RTC_RST#

C29

0.1U/10V_4

ACZ_SYNC_R

3

4

PCH2(CLG)

C26 18P/50V_4C26 18P/50V_4

C25 18P/50V_4C25 18P/50V_4

+5V

PCH Strap Table

Pin Name

SPKR

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GPIO19

HDA_SDO

DF_TVS

GPIO28

HDA_SYNC On-Die PLL VR Volt age Select RSMRST

GPIO8

SPI_MOSI

NV_ALE

Strap description

No reboot mode setting PWROK

Top-Block Swap Override

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

Integrated Clock Chip Enable

iTPM function Disable APWROK

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm )

A32

12

Y1

Y1 XTAL_32.768KHZ

XTAL_32.768KHZ

+3V_RTC

INTEL_BT_SW#23

+3VPCU

3

R54

R54 10M/J_4

10M/J_4

R358 1M/J_4R358 1M/J_4

SPKR20

ACZ_SDIN020

TP3TP3 TP36TP36 TP38TP38 TP2TP2

PCH_SPI_CLK33

PCH_SPI_CS0#33

R87 *10K/J_4R87 *10K/J_4

PCH_SPI_SI33

PCH_SPI_SO33

Sampled

PWROK

RSMRST

PWROK

RSMRST#

Cougar Point (HDA,JTAG,SATA)

U8A

GNT0#GNT1#

11 00

U8A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

Boot Location

SPI

*

LPC

RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

ACZ_BITCLK_R ACZ_SYNC_R SPKR ACZ_RST#_R

TP35TP35

ACZ_SDOUT_R

TP42TP42

PCH_JTAG_TCK_R PCH_JTAG_TMS_R PCH_JTAG_TDI_R PCH_JTAG_TDO_R

PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#

PCH_SPI_SI PCH_SPI_SO

Configuration

0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode

0 = "top-block swap" mode 1 = Default (weak pull-up 20K)

0 = Overri de 1 = Default (weak pull-up 20K)

0 = Set to Vss 1 = Set to Vcc (weak pu ll-down 20K)

0 = Disable 1 = Enable (Default)

0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V

Should be pull-down (weak pull-up 20K)

0 = Default (weak pull-down 20K) 1 = Enable

2

C38

FWH0 / LAD0

A38

FWH1 / LAD1

B37

FWH2 / LAD2

C37

FWH3 / LAD3

LPC

FWH4 / LFRAME#

+3V

LDRQ1# / GPIO23

RTCIHDA

+3V

SATA

+3V_S5

JTAG

SATA3RCOMPO

SPI

+3V

SATA0GP / GPIO21

+3V

SATA1GP / GPIO19

+3V

+3V_RTC

Default weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]

+3V_S5

R402 *1K/J_4R402 *1K/J_4

+3V_S5

+3V

LDRQ0#

SERIRQ

SATA0RXN

SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN

SATA2RXP SATA2TXN SATA2TXP

SATA3RXN

SATA3RXP SATA3TXN SATA3TXP

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

R420 *1K/J_4R420 *1K/J_4

R374 *1K/J_4R374 *1K/J_4

R46 330K/J_4R46 330K/J_4

R367 *1K/J_4R367 *1K/J_4 R82 *1K/J_4R82 *1K/J_4

R336 *1K/J_4R336 *1K/J_4

R126 2.2K/J_4R126 2.2K/J_4 R127 4.7K/J_4R127 4.7K/J_4

R27 1K/J_4R27 1K/J_4

R52 *1K/J_4R52 *1K/J_4

D36 E36

K36 V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11 Y10

AB12 AB13

AH1

P3 V14 P1

LPC_DRQ#0

LCD_BK_OFF

SATA_TXN0_C SATA_TXP0_C

SATA_TXN1_C SATA_TXP1_C

SATA_TXN3_C SATA_TXP3_C

SATA_TXN4_C SATA_TXP4_C

SATA_COMP

SATA3_COMP

SATA3_RBIAS

BBS_BIT0

SPKR

PCH_INVRMEN

BBS_BIT1 10

BBS_BIT0

ACZ_SDOUT_R

+1.8V

PLL_ODVR_EN 11

PCH_SPI_SI

PCI_GNT3# 10

C358 0.01U/25V_4C358 0.01U/25V_4 C356 0.01U/25V_4C356 0.01U/25V_4

C360 0.01U/25V_4C360 0.01U/25V_4 C359 0.01U/25V_4C359 0.01U/25V_4

C40 0.01U/25V_4C40 0.01U/25V_4 C38 0.01U/25V_4C38 0.01U/25V_4

C35 0.01U/25V_4C35 0.01U/25V_4 C36 0.01U/25V_4C36 0.01U/25V_4

R423 37.4/F_4R423 37.4/F_4

R425 49.9/F_4R425 49.9/F_4

R109 750/F_4R109 750/F_4

SATA_ACT# 29

ODD_PRSNT# 22

DF_TVS 11 H_SNB_IVB# 4

ACZ_SYNC_R

LPC_LAD0 23,32,33 LPC_LAD1 23,32,33 LPC_LAD2 23,32,33 LPC_LAD3 23,32,33

LPC_LFRAME# 23,32,33 LPC_DRQ#0 23

LCD_BK_OFF# 18 IRQ_SERIRQ 23,32,33

+1.05V_PCH

SATA_RXN0 24 SATA_RXP0 24 SATA_TXN0 24 SATA_TXP0 24

SATA_RXN1 22 SATA_RXP1 22 SATA_TXN1 22 SATA_TXP1 22

SATA_RXN3 22 SATA_RXP3 22 SATA_TXN3 22 SATA_TXP3 22

SATA_RXN4 26 SATA_RXP4 26 SATA_TXN4 26 SATA_TXP4 26

1

IRQ_SERIRQ ODD_PRSNT# LCD_BK_OFF# SATA_ACT# INTEL_BT_SW#

R424 8.2K/J_4R424 8.2K/J_4 R414 *10K/J_4R414 *10K/J_4 R347 10K_4R347 10K_4 R89 10K_4R89 10K_4 R48 10K/J_4R48 10K/J_4

SSD HDD(Mini card)

SATA HDD

SATA ODD

ESATA

09

+3V

A32

352-(&7./

Quanta Computer Inc.

Document Number

Tuesday, January 04, 2011 9 44

Date: Sheet of

5

4

3

2

Date: Sheet of

Cougar Point 2/6

1

RevSize

1A

RevSize

1A

RevSize

1A

5

Cougar Point-M (PCI,USB,NVRAM)

U8E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

BOARD_ID3 BOARD_ID4

BT_DIS

CLK_LPC_TPM_C

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

RSVD

TP21 TP22 TP23 TP24

TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PME# PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

CougarPoint_R1P0

RSVD

+3V +3V +3V

+3V +3V +3V +3V

PCI

B21

M20 AY16 BG46

BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

K40 K38 H38 G38

C46 C44 E40

D47 E42 F46

G42 G40 C42 D44

K10

A15

C6

H49 H43 J48 K42 H40

D D

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

BOARD_ID311

RF_ON29

BOARD_ID411

BBS_BIT1

C C

CLK_LPC_TPM32

CLK_LPC_DEBUG23

CLK_PCI_851233

BBS_BIT19

BT_DIS32

PCI_GNT3#

PCI_GNT3#9

TP37TP37

TP1TP1

R387 22_4R387 22_4 R70 22/J_4R70 22/J_4 R361 22/J_4R361 22/J_4 R364 22/J_4R364 22/J_4

MPC_PWR_CTRL# EXTTS_SNI_DR V0_PCH

EXTTS_SNI_DR V1_PCH

PCI_PLTRST#

CLK_PCI_LPC_R CLK_PCI_EC_R

ODD_MDDA#22,33

A37

CLK_PCI_FB CLK_PCI_FB_R

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5

USB

RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25 RSVD26

RSVD27 RSVD28

RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8 RSVD9

4

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

NV_ALE

AV5 AV10

AT8 AY5

BA2 AT12

BF3

USBP0-

C24

USBP0+

A24

USBP1-

C25

USBP1+

B25

USBP2-

C26

USBP2+

A26

USBP3-

K28

USBP3+

H28 E28 D28

USBP5-

C28

USBP5+

A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

USB_BIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB30_EXT_SMI#

D14

USB_OC7#

C14

TP47TP47

USBP0- 26 USBP0+ 26 USBP1- 25 USBP1+ 25 USBP2- 29 USBP2+ 29 USBP3- 23 USBP3+ 23

USBP5- 32 USBP5+ 32

USBP8- 27 USBP8+ 27 USBP9- 25 USBP9+ 25 USBP10- 21 USBP10+ 21 USBP11- 32 USBP11+ 32 USBP12- 24 USBP12+ 24

R34 22.6/F_4R34 22.6/F_4

USB_OC0# 26 USB_OC1# 25 USB_OC2# 27

USB_OC4# 25

USB# 0/e SATA C omb o

USB#1-> (External L side) CCD WLAN

BlueTooth

USB #2 (USB3.0/2.0) USB#3 (External R side) Card Reader Figer Print SSD

USB_OC0# -->USB Port#0 ESATA OC pin USB_OC1# -->USB Port#1 OC pin USB_OC2# -->Reserved USB_OC3# -->USB Port #3 OC pin

USB30_EXT_SMI# 27

A11

   

EC-C10

EHCI1

EHCI2

LAN

WLAN

USB3.0

3

Cougar Point-M (PCI-E,SMBUS,CLK)

BG34

BJ34 AV32

AU32

PCIE_RXN2_LA N19 PCIE_RXP2_LAN19 PCIE_TXN2_LAN19 PCIE_TXP2_LAN19

PCIE_RXN527 PCIE_RXP527

PCIE_TXN527 PCIE_TXP527

C362 0.1U/10V_4C362 0.1U/ 10V_4 C363 0.1U/10V_4C363 0.1U/ 10V_4

PCIE_RXN323 PCIE_RXP323

C366 0.1U/10V_4C366 0.1U/ 10V_4

PCIE_TXN323

C365 0.1U/10V_4C365 0.1U/ 10V_4

PCIE_TXP323

C367 0.1U/16V_4C367 0.1U/16V_4 C368 0.1U/16V_4C368 0.1U/16V_4

PCIECLKRQ8#

CLKOUT_PCIE0N CLKOUT_PCIE0P

LAN

PCIECLKRQ0#

CLKOUT_PCIE1N CLKOUT_PCIE1P

WLAN

PCIECLKRQ1#

PCIECLKRQ2#

CLKOUT_PCIE3N CLKOUT_PCIE3P

USB3.0

PCIECLKRQ3#

CLK_PCH_ITPN_R

TP45TP45

CLK_PCH_ITPP_R

TP44TP44

PCIE_TXN2_LAN _C PCIE_TXP2_LAN_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN5_C PCIE_TXP5_C

PCIECLKRQ5#

PCIECLKRQ6#

PCIECLKRQ7#

BE34 BF34 BB32 AY32

BG36

BJ36 AV34

AU34

BF36 BE36 AY34 BB34

BG37 BH37

AY36 BB36

BJ38 BG38 AU36

AV36 BG40

BJ40

AY40

BB40

BE38 BC38 AW38

AY38

AB49

AB47

AA48

AA47

AB42

AB40

AK14

AK13

U8B

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46 CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

CougarPoint_R1P0

2

+3V_S5

PCI-E*

+3V_S5

+3V

+3V_S5

CLOCKS

+3V_S5

SMBALERT# / GPIO11

SMBDATA

+3V_S5

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SML0CLK

SML0DATA

CL_DATA1

CL_RST1#

REFCLK14IN

XTAL25_IN

XTAL25_OUT

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

+3V

SMBCLK

CL_CLK1

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DRAMRST_CNTRL_PCH

A12

SMB_CLK_ME0

C8

SMB_DATA_ME0

G12

SML1ALERT#_R

C13

SMB_ME1_CLK

E14

SMB_ME1_DAT

M16

CL_CLK1

M7

CL_DAT1

T11

CL_RST#

P10

M10

AB37 AB38

AV22 AU22

AM12 AM13

CLK_BUF_PCIE_3GPLLN

BF18

CLK_BUF_PCIE_3GPLLP

BE18

CLK_BUF_BCLKN

BJ30

CLK_BUF_BCLKP

BG30

CLK_BUF_DREFCLKN

G24

CLK_BUF_DREFCLKP

E24

CLK_BUF_DREFSSCLKN

AK7

CLK_BUF_DREFSSCLKP

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43

CLK_27M_VGA_1

F47

CLK_25M

H47

CLK_48M_CARD_C

K49

1

DRAMRST_CNTRL_PCH 5

SMB_CLK_ME0 19

SMB_DATA_ME0 19

For EC

TP40TP40

TP43TP43

TP41TP41

PEG_CLKREQ#

CLK_CPU_BCLKN 4 CLK_CPU_BCLKP 4

CLK_DPLL_SSCLKN 4 CLK_DPLL_SSCLKP 4

R91 90.9/F_4R91 90.9/F_4

27Mz support DIS only

R65 *0_4R65 *0_4

R85 22_4R85 22_4

+1.05V_PCH

TP39TP39

TP34TP34

PCH_CLK25M 27 CLK_48M_CARD 21

R96

R96 1M/J_4

1M/J_4

For LAN

C37 27P/ 50V_4C37 27P/50V_4

21

Y2 25MHzY225MHz

C32 27P/ 50V_4C32 27P/50V_4

10

DGPU Power ON

B B

PEG CLK detect

PLTRST#(CLG)

PCI_PLTRST#

A A

GPU RST#(CLG)

+3V_S5

2 1

3 5

TC7SH08FUU5TC7SH08FU

R24 *0_4R24 *0_4

PCI/USBOC# Pull-up(CLG)

+3V_S5

R55

C24

0.1U/10V_4

PLTRST#

4

R25

R25 100K/J_4

100K/J_4

PLTRST#

PLTRST# 4,19,23,27,32

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

RF_ON

USB_OC4# USB_OC1# USB_OC2# USB_OC3#

MPC_PWR_CTRL# BT_DIS

ODD_MDDA#

R55

10

9 8 7 4

10KX8

+3V

R41

10

9 8 7 4

10KX8

R392 8.2K/J_4R 392 8.2K/J_4 R395 8.2K/J_4R 395 8.2K/J_4 R343 8.2K/J_4R 343 8.2K/J_4 R344 8.2K/J_4R 344 8.2K/J_4

R378 *100K/J_4R378 *100K/J_4

USB_OC7#

1

USB_OC0#

2

USB30_EXT_SMI#

3

USB_OC5#

56

EXTTS_SNI_DRV0_PCH

1

EXTTS_SNI_DRV1_PCH

2 3

56

+3V

LAN

WLAN

USB3.0

CLK_PCIE_LANN19 CLK_PCIE_LANP19

PCIE_CLKRE Q_LAN#19

CLK_PCIE_WLANN23 CLK_PCIE_WLANP23

PCIE_CLKREQ_WLAN#23

CLK_PCIE_USB30N27 CLK_PCIE_USB30P27

PCIE_CLKREQ_USB30#

SW:Stuff UMA:Non-stuff

MPC Switch Control

08/11 UMA setting

MPC_PWR_CTRL#

5

4

CLKOUT_PCIE0N CLKOUT_PCIE0P

R77 *0_4SR77 *0_4S

CLKOUT_PCIE1N CLKOUT_PCIE1P

R407 *0_4SR407 *0_4S

CLKOUT_PCIE3N CLKOUT_PCIE3P

R63 *0_4SR63 *0_4S

Low = MPC ON High = MPC OFF (Default)

R382 *1K/J_4R382 *1K/J_4

3

PCIECLKRQ0#

PCIECLKRQ1#

PCIECLKRQ3#

SMBus(CLK)

SMB_PCH_DAT SMB_RUN_DAT

SMB_PCH_CLK

CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)

+3V

+3V_S5

PCIE_CLKREQ_WLAN#

R403 10K/J_4R403 10K/J_4 R76 10K/J_4R76 10K/J_4

R379 10K/J_4R379 10K/J_4U5 R398 10K/J_4R398 10K/J_4 R431 10K/J_4R431 10K/J_4 R441 10K/J_4R441 10K/J_4 R561 10K/J_4R561 10K/J_4 R562 10K/J_4R562 10K/J_4 R563 10K/J_4R563 10K/J_4

CLK_BUF_BCLKN CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_PCH_14M

CLOCK TERMINATION for FCIM

PCIE_CLKRE Q_LAN#

PCIE_CLKREQ_USB30# PCIECLKRQ2# PCIECLKRQ5# PCIECLKRQ6# PCIECLKRQ7# PCIECLKRQ8#

PEG_CLKREQ #

R129 10K /J_4R129 10K/J_4 R130 10K /J_4R130 10K/J_4

R446 10K /J_4R446 10K/J_4 R447 10K /J_4R447 10K/J_4 R372 10K /J_4R372 10K/J_4 R371 10K /J_4R371 10K/J_4 R432 10K /J_4R432 10K/J_4 R430 10K /J_4R430 10K/J_4 R400 10K /J_4R400 10K/J_4

+3V

R168

4.7K/J_4

2

3

1

Q15

Q15 2N7002K

2N7002K

+3V

R165

4.7K/J_4

2

3

1

Q14

Q14 2N7002K

2N7002K

+3V_S5

R350 1K/J_4R350 1K/J_4 R351 10K/J_4R351 10K/J_4

R148 2.2K/J_4R 148 2.2K/J_4 R149 2.2K/J_4R 149 2.2K/J_4

2

R353 10K/J_4R353 10K/J_4

SMB_RUN_CLK

MB_CLK130,33,37

MB_DATA130,33,37

SMB_RUN_DAT 14,15

SMB_RUN_CLK 14,15

3

DRAMRST_CNTRL_PCH SMBALERT#

SMB_PCH_CLK SMB_PCH_DAT

SML1ALERT#_R

+3V_S5

R436

2.2K/J_4

2

SMB_ME1_CLK

1

Q33

Q33 2N7002K

2N7002K

+3V_S5

R443

2.2K/J_4

2

SMB_ME1_DAT

1

Q34

Q34 2N7002K

2N7002K

352-(&7./

Quanta Computer Inc.

Document Number

Date: Sheet of

Cougar Point 3/6

Tuesday, January 04, 2011 10 44

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

Cougar Point (GPIO,VSS_NCTF,RSVD)

U8F

S_GPIO

R410 100_4R410 100_4

WLAN_OFF#23

SDD_DA_DSS24

PLL_ODVR_EN_R

EC_EXT_SMI# BOARD_ID0 EC_EXT_SCI#

SYSTEM_ID LAN_DISABLE# HOST_ALERT#1_R

DGPU_PWROK

BIOS_REC

SDD_DA_DSS

GPIO27

STP_PCI#

BT_ON# DMI_OVRVLTG FDI_OVRVLTG MFG_MODE

TEST_SET_UP

SV_DET

EC_EXT_SMI#33

D D

LAN_DISABLE#19

PLL_ODVR_EN9

C C

R404 *0_4SR404 *0_4S

SV36 *EGA-0402SV36 *EGA-0402

EC_EXT_SCI#33

EC-B16

TEMP_ALERT#30,33

TP60TP60

BT_ON#32

TP61TP61

TP59TP59

EC-A-10

B B

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

D40

E16

V13

A44 A45 A46

B47

BD1

BD49

BE1

BE49

BF1

BF49

+3V_S5

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

+3V_S5

GPIO15

U2

SATA4GP / GPIO16

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

DSW

GPIO27

P8 K1 K4 V8 M5 N2 M3

V3 D6

A4

A5 A6 B3

+3V_S5

GPIO28 STP_PCI# / GPIO34

+3V

GPIO35 SATA2GP / GPIO36 SATA3GP / GPIO37 SLOAD / GPIO38 SDATAOUT0 / GPIO39 SDATAOUT1 / GPIO48 SATA5GP / GPIO49

+3V_S5

GPIO57

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

CougarPoint_R1P0

+3V

+3V_S5

+3V

+3V_S5

GPIO

NCTF

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

NC_1

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

BOARD_ID1

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14 AY1

AH8 AK11 AH10 AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

SGPIO

R560 1.5K/F_4R560 1.5K/F_4

BOARD_ID2

EC_RCIN#

PCH_THRMTRIP#

3/16 Connected to GND DG rev0.9

S_GPIO

TP46TP46

R442 390/J_4R442 390/J_4

R412 10K/J_4R412 10K/J_4 R411 *0/J_4R411 *0/J_4

SSD_DETECT# 24

EC-B26

Board ID

KL7

KL8

KL8A

KL9

KL9A

+3V

Intel ME Crypto Transport Layer Security (TLS) cipher suite

EC_A20GATE 33

EC_RCIN# 33 H_PWRGOOD 4 PM_THRMTRIP# 4

DF_TVS 9

ID2 GPIO71

0

1

0

SV_SET_UP

High = Strong (Default)

TEST_SET_UP

HOST_ALERT#1_R

R401 10K/J_4R401 10K/J_4 R406 *0/J_4R406 *0/J_4

R385 1K/J_4R385 1K/J_4

ID1 GPIO68

00

1

0

ID0 GPIO6

0

11

0

11

+3V

+3V_S5

R49 10K/J_4R49 10K/J_4 R346 *10K/J_4R346 *10K/J_4 R50 10K/J_4R50 10K/J_4

R369 10K/J_4R369 10K/J_4 R355 10K/J_4R355 10K/J_4

BOARD_ID310 BOARD_ID410

+3V_S5

R381 *10K/J_4R381 *10K/J_4

GPIO Pull-up/Pull-down(CLG)

LAN_DISABLE#

EC_EXT_SMI# EC_EXT_SCI# SSD_DETECT# STP_PCI# EC_A20GATE EC_RCIN# TEMP_ALERT# BT_ON# DGPU_PWROK WLAN_OFF#

GPIO27

BOARD_ID0 BOARD_ID1 BOARD_ID2

BOARD_ID3 BOARD_ID4

SYSTEM_ID

BOARD_ID3 BOARD_ID4

SV_DET

R35 *10K/J_4R35 *10K/J_4 R337 10K/J_4R337 10K/J_4 R36 *10K/J_4R36 *10K/J_4

R368 *10K/J_4R368 *10K/J_4 R341 *10K/J_4R341 *10K/J_4

R62 *10K/J_4R62 *10K/J_4R58 10K/J_4R58 10K/J_4

Low = Disable (Default)

A A

FDI TERMINATION VOLTAGE OVERRIDE

FDI_OVRVLTG DMI_OVRVLTG BIOS_REC

R391 *1K/F_4R391 *1K/F_4R397 100K/J_4R397 100K/J_4

LOW - Tx, Rx terminated to same voltage

5

DMI TERMINATION VOLTAGE OVERRIDE

R498 200K/F_4R498 200K/F_4

Low = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)

4

+3V+3V +3V

R421 10K/J_4R421 10K/J_4 R413 *0/J_4R413 *0/J_4

BIOS RECOVERY

High = Disable (Default)

Low = Enable

3

High = Enable

MFG-TEST

MFG_MODE

R80 10K/J_4R80 10K/J_4 R81 *0/J_4R81 *0/J_4

2

352-(&7./

+3V

Document Number

Date: Sheet of

Quanta Computer Inc.

Cougar Point 4/6

Tuesday, January 04, 2011 11 44

Cougar Point 4/6

1

11

R64 10K/J_4R64 10K/J_4

R37 10K/J_4R37 10K/J_4 R345 10K/J_4R345 10K/J_4 R51 10K/J_4R51 10K/J_4 R74 10K/J_4R74 10K/J_4 R405 10K/J_4R405 10K/J_4 R408 10K/J_4R408 10K/J_4 R95 10K/J_4R95 10K/J_4 R390 10K/J_4R390 10K/J_4 R342 10K/J_4R342 10K/J_4 R396 10K/J_4R396 10K/J_4

R373 10K/J_4R373 10K/J_4

R380 100K/J_4R380 100K/J_4

+3V_S5

+3V

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

PCH5(CLG)

+5V_S5 +3V_S5

+5V +3V

+3V_S5

+3V

+1.05V_PCH

12

COUGAR POINT (POWER)

POWER

U8G

+1.05V_PCH +1.05V_PCH_VCC

D D

+1.05V_PCH_VCCDPL L_EXP+1.05V_PCH

R114 *0_6SR114 *0_6S

EC-C07

+1.05V_PCH +1.05V_VCCIO

C C

B B

VccCORE =1.3 A(60mils)

C349

C342

1U/6.3V_4

TP69TP69

VccIO =2.925 A(140mils)

C350

C351

1U/6.3V_4

C357

C357 1U/6.3V_4

1U/6.3V_4

R449 *0_8SR449 *0_8S

+VCCAFDI_VRM

EC-C07

+1.05V_PCH

R98 0/J_6R9 8 0/J_6

+1.5V

R93 *0/J_6R93 *0 /J_6

+1.05V_PCH

C44

C337

10U/6.3V_6

1U/6.3V_4

+1.05V_VCCAPLL_EXP

C352

C352 1U/6.3V_4

1U/6.3V_4

C516

C68

C68 10U/6.3V_6

10U/6.3V_6

100P/50V/X7R_4

+3V_VCC_EXP+3V

C374

0.1U/10V_4

+VCCAFDI_VRM

+1.05V_VCCAPLL_FDI

TP66TP66

R115 *0_8SR115 *0_8S

+1.05V_VCCDPLL _FDI

+1.05V_PCH

+VCCAFDI_VRM

VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1

1.5V (Mobile)

C429

C429 *0.1U/10V_4

*0.1U/10V_4

AA23 AC23 AD21 AD23

AF21

AF23 AG21 AG23 AG24 AG26 AG27 AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16 AN17

AN21 AN26 AN27

AP21

AP23

AP24

AP26

AT24

AN33 AN34

BH29

AP16

BG6

AP17

AU20

U8G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24]

VCCIO[25] VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

CRTLVDS

VCC CORE

DMI

VCCIO

DFT / SPI HVCMOS

FDI

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

U48

U47

AK36 AK37

AM37 AM38 AP36 AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

EC-C06

VccADAC =1mA(8mils)

C324

R409

0.01U/25V_4

*0/J_6

VccALVDS=1mA(8mils)

VccTX_LVDS=60mA(10mils)

C354

0.01U/25V_4

R419 *0_6SR4 19 *0_6S

C322

0.1U/10V_4

+VCCAFDI_VRM

C333

C333 1U/6.3V_4

1U/6.3V_4

+VCCAFDI_VRM

C43

C43 *10U/6.3V_6

*10U/6.3V_6

R120 *0_8SR120 *0_8S

C348

0.1U/10V_4

C33

C33 1U/6.3V_4

1U/6.3V_4

A33

+VCCA_DAC_1_2

C323

0.1U/10V_4

C375

C355

22U/6.3V_8

0.01U/25V_4

+3V+3V_VCC_GIO

L3 *10uH_8L3 *10uH_8

+1.8V+VCCP_NAND

VCCPNAND = 190 mA(15mils)

R92 0/J_6R9 2 0/J_6

R97 *0/J_6R97 *0 /J_6

L17 180ohm/5AL17 180ohm/5A

C327

C327 10U/6.3V_6

10U/6.3V_6

+VCCALVDS +3V

R440 *0_4sR440 *0_4s

L19 SW@0.1uH_8L19 SW@0.1uH_8

VCCDMI = 42mA(10mils)

+VCC_DMI_CCI +1.05V_PCH+1.1V_VCC_DMI_CCI

+3V+3V_VCCME_SPI

+3V_S5

+1.05V_PCH+1.1V_VCC_DMI

R435 *0_4SR435 *0_4S

C353

C353 1U/6.3V_4

1U/6.3V_4

VCCCLKDMI = 20mA(8mils)

R116 *1/F_4R116 *1/F_4 R117 0/J_4R117 0/J_4

VCCSPI = 20mA(8mils)

VCCRTC<1mA(8mils)

+3V

+1.8V+VCC_TX_LVDS

VCCME(+1.05V) = ??A(??mils)

+1.05V_PCH

1mA(8mils)

EC-C07

+1.05V_PCH

R137 *0_4SR137 *0_4S

+3V_RTC

+3V_S5

+3V_DSW

R103 *0_6SR103 *0_6S

R434 *0_6SR434 *0_6S

R437 *0_6SR437 *0_6S

R31 *0/J_6R31 *0 /J_6

R429 0/J_4R429 0/J_4 R427 *0/J_4R427 *0/J_4

TP68TP68

+1.05V_PCH

+1.05V_VCCEPW

VccASW =1.01 A(60mils)

C331

C331 1U/6.3V_4

1U/6.3V_4

C338

C338 1U/6.3V_4

1U/6.3V_4

C343

C343 1U/6.3V_4

1U/6.3V_4

C344

C344 1U/6.3V_4

1U/6.3V_4

C318

C318 *1U/6.3V_4

*1U/6.3V_4

C67

4.7U/6.3V_6

C22

C22 1U/6.3V_4

1U/6.3V_4

TP67TP67

EC-C07

VCCDSW3_3= 3mA

C320

0.1U/10V_4

R445 *0_6SR445 *0_6S

C332

C336

1U/6.3V_4

C52

C53

22U/6.3V_8

C312 0.1U/10V_4C312 0.1U/10V_4

+VCCAFDI_VRM

65mA(10mils)

8mA(8mils)

VCCDIFFCLKN= 55mA(10mils)

VCCSSC= 95mA(10mils)

C321 0.1U/10V_4C321 0.1U/10V_4

C55

0.1U/10V_4

C20

0.1U/10V_4

C60

0.1U/10V_4

C27

0.1U/10V_4

C330

0.1U/10V_4

C340

C340 *1U/6.3V_4

*1U/6.3V_4

100P/50V/X7R_4

C518

+VCCACLK

+VCCPDSW

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL +1.05V_VCCA_B_DPL

+VCCDIFFCLK +VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

+V1.05M_VCCSUS

+VTT_VCCPCPU

Cougar Point-M (POWER)

POWER

U8J

AD49

T16

V12

T38

BH23

AL29

AL24

AA19 AA21 AA24

AA26

AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29

AD31

W21 W23 W24 W26 W29 W31 W33

N16

Y49

BD47

BF47

AF17

AF33 AF34 AG34

AG33

V16

T17

V19

BJ8

A22

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2 VCCIO[14]

DCPSUS[3]

VCCASW[1] VCCASW[2] VCCASW[3] VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] VCCASW[13] VCCASW[14] VCCASW[15] VCCASW[16] VCCASW[17] VCCASW[18] VCCASW[19] VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoin t_R1P0

Clock and Miscellaneous

PCI/GPIO/LPCMISC

SATA USB

CPURTC

HDA

VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SU S

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

VCCVRM= 114mA(15mils)

AF11

AC16 AC17 AD17

T21

V21

T19

P32

+3V_VCCPUSB

+3V_VCCAUBG

+VCCAUPLL

+5V_PCH_VCC5REFSUS

+VCCA_USBSUS +3V_VCCPSUS

+5V_PCH_VCC5REF

+3V_VCCPSUS

+3V_VCCPCORE

+3V

C328

0.1U/10V_4

+V1.05S_SATA3

+V1.1LAN_VCCAPLL

+VCCAFDI_VRM

+1.05V_VCCIO1

C335

C335 1U/6.3V_4

1U/6.3V_4

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C309

C309 *1U/6.3V_4

*1U/6.3V_4

R42 *0_6SR42 *0_6S

C347

C347 *1U/6.3V_4

*1U/6.3V_4

L2 *10uH/100mA_8L2 *10uH/100mA_8 C42

C42 *10U/6.3V_6

*10U/6.3V_6

R108 *0_6SR108 *0_6S

VCCME = 1.01A(60mils)

R338 *0/J_4R338 *0/J_4 R354 0/J_4R354 0/J_4

C317

0.1U/10V_4

+1.05V_PCH+1.05V_VCCUSBCORE

R29 *0_8SR29 *0_8S

C319

C319 1U/6.3V_4

1U/6.3V_4

VCCSUS3_3 = 119mA(15mils)

+3V_S5

R44 *0_6SR44 *0_6S

C326

0.1U/10V_4

R40 *0_6SR40 *0_6S

C314

0.1U/10V_4

+1.05V_PCH

VCC5REFSUS=1mA

R23 10/F_4R23 10/F_4

D3 RB500 V-40D3 RB500V-40

C316

0.1U/10V_4

V5REF= 1mA

R28 10/F_4R28 10/F_4

D4 RB500 V-40D4 RB500V-40

C313

C313 1U/6.3V_4

1U/6.3V_4

R30 *0_6SR30 *0_6S

VCCSUS3_3 = 119mA(15mils)

C315

C315 1U/10V_4

1U/10V_4

R100 *0_6SR100 *0_6S

VCCPCORE = 28mA(10mils)

C329

0.1U/10V_4

+3V

C345

0.1U/10V_4

0.1U/10V_4 R119 *0_8SR119 *0_8S

C339

C339 1U/10V_4

1U/10V_4

??mA(??mils)

+1.05V_PCH

+1.5V_SUS +3V_S5

VCCSUSHDA= 10mA(8mils)

L7 10uH/100mAL7 10uH/100mA

+1.05V_PCH

+3V

R422 *0/J_6R422 *0/J_6 R428 1/F_4R428 1/F_4

A A

5

4

+3V_SUS_CLKF33_R +3V_SUS_CLKF33

3

L18 10uH/100mA_8L18 10uH/100mA_8

C334

C334 10U/6.3V_6

10U/6.3V_6

C325

C325 1U/10V_4

1U/10V_4

2

L6 10uH/100mAL6 10uH/100mA

+

C70

C70 *220U/2.5V_3528

*220U/2.5V_3528

+

C69

C69 *220U/2.5V_3528

*220U/2.5V_3528

+1.05V_VCCA_A_DPL

C361

C361 1U/6.3V_4

1U/6.3V_4

+1.05V_VCCA_B_DPL

C364

C364 1U/6.3V_4

1U/6.3V_4

352-(&7./

Quanta Computer Inc.

Document Number

Cougar Point 5/6

Tuesday, January 04, 2011 12 44

Date: Sheet of

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

PCH6(CLG)

13

U8I

AY4

VSS[159]

IBEX PEAK-M (GND)

D D

U8H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

C C

B B

A A

5

AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD40 AD42 AD43 AD45 AD46

AF10

AF12 AD14 AD16

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF42

AF46

AG19

AG2 AG31 AG48 AH11

AH36 AH39 AH40 AH42 AH46

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

AD4

AD8 AE2 AE3

AF4

AF5 AF7 AF8

AH3

AH7

AK3

VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

CougarPoint_R1P0

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

AY42 AY46

BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB46 BC14 BC18

BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BE22

BE26

BE40

BF10

BF12

BF16

BF20

BF22

BF24

BF26

BF28

BF30

BF38

BF40 BG17

BG21 BG33 BG44

BH11 BH15 BH17 BH19

BH27 BH31 BH33 BH35 BH39 BH43

AY8

BB4

BC2

BD5

BD3

BF8

BG8

H10

BH7 D12

D16 D18 D22 D24 D26 D30 D32 D34 D38 D42

G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34

B11 B15 B19 B23 B27 B31 B35 B39

B7

F45

D3

D8 E18 E26

F3

VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

CougarPoint_R1P0

3

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

352-(&7./

Quanta Computer Inc.

Document Number

Tuesday, January 04, 2011 13 44

Date: Sheet of

2

Date: Sheet of

Cougar Point 6/6

1

RevSize

1A

RevSize

1A

RevSize

1A

5

4

3

2

1

DDR_RVS(DDR)

M_B_A[15:0]5

D D

M_B_BS#05 M_B_BS#15 M_B_BS#25 M_B_CS#05 M_B_CS#15 M_B_CLKP05 M_B_CLKN05 M_B_CLKP15 M_B_CLKN15 M_B_CKE05 M_B_CKE15 M_B_CAS#5 M_B_RAS#5

R259 10K/J_4R259 10K/J_4 R266 10K/J_4R266 10K/J_4

+3V

M_B_WE#5

SMB_RUN_CLK10,15 SMB_RUN_DAT10,15 SMDDR_VREF_DQ1_M37

M_B_ODT05 M_B_ODT15

02/23 Remove 0ohm to GND

C C

M_B_DQSP[7:0]5

M_B_DQSN[7:0]5

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=4_STD_MLX

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

M_B_DQ4

7

M_B_DQ3

15

M_B_DQ2

17

M_B_DQ0

4

M_B_DQ1

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ12

21

M_B_DQ13

23

M_B_DQ14

33

M_B_DQ10

35

M_B_DQ8

22

M_B_DQ9

24

M_B_DQ11

34

M_B_DQ15

36

M_B_DQ20

39

M_B_DQ21

41

M_B_DQ18

51

M_B_DQ22

53

M_B_DQ17

40

M_B_DQ16

42

M_B_DQ19

50

M_B_DQ23

52

M_B_DQ25

57

M_B_DQ30

59

M_B_DQ27

67

M_B_DQ26

69

M_B_DQ28

56

M_B_DQ24

58

M_B_DQ31

68

M_B_DQ29

70

M_B_DQ37

129

M_B_DQ36

131

M_B_DQ34

141

M_B_DQ35

143

M_B_DQ33

130

M_B_DQ32

132

M_B_DQ39

140

M_B_DQ38

142

M_B_DQ40

147

M_B_DQ47

149

M_B_DQ43

157

M_B_DQ42

159

M_B_DQ45

146

M_B_DQ41

148

M_B_DQ44

158

M_B_DQ46

160

M_B_DQ51

163

M_B_DQ53

165

M_B_DQ54

175

M_B_DQ55

177

M_B_DQ48

164

M_B_DQ50

166

M_B_DQ52

174

M_B_DQ49

176

M_B_DQ63

181

M_B_DQ57

183

M_B_DQ61

191

M_B_DQ62

193

M_B_DQ60

180

M_B_DQ56

182

M_B_DQ58

192

M_B_DQ59

194

M_B_DQ5

5

M_B_DQ[63:0] 5

SMDDR_VREF_DQ1_M1 SMDDR_VREF_DQ1_M3

DDR3_DRAMRST#5,15

R260 0/J_6R260 0/J_6 R258 *0/J_6R258 *0/J_6

2.48A

R249 10K/J_4R249 10K/J_4

+3V

PM_EXTTS#015

+SMDDR_VREF_DIMM

+1.5V_SUS

+3V

+SMDDR_VREF_DQ1

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4_STD_MLX

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

14

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

VREF DQ1 M2 Solution

Place these Caps near So-Di mm1.

+1.5V_SUS

C236

C236 10u/6.3V_6

10u/6.3V_6

B B

+3V

C230

C230 10U/6.3V_6

10U/6.3V_6

C237

C237 10U/6.3V_6

10U/6.3V_6

C235

C235 10U/6.3V_6

10U/6.3V_6

C188

C188 10U/6.3V_6

10U/6.3V_6

C189

C189 10U/6.3V_6

10U/6.3V_6

+0.75V_DDR_VTT

C190

C190 *10U/6.3V_6

*10U/6.3V_6

C233

C233 1U/10V_4

1U/10V_4

C234

C234 1U/10V_4

1U/10V_4

C185

C185 1U/10V_4

1U/10V_4

C187

C187 1U/10V_4

1U/10V_4

C232

C232 10U/6.3V_8

10U/6.3V_8

C186

C186 10U/6.3V_8

10U/6.3V_8

+SMDDR_VREF_DIMM

C192

0.1u/10V_4

2.2U/6.3V_6

C195

+SMDDR_VREF_DQ1

C217

0.1u/10V_4

C229

2.2U/6.3V_6

6/22 Remove M2 Solution by MOW26

C226

C231

R267 *0/J_6R267 *0/J_6

SV37 EGA-0402SV37 EGA-0402

5

C231 1U/6.3V_4

1U/6.3V_4

+1.5V_SUS

C239

C228

0.1u/10V_4

2.2U/6.3V_6

VREF DQ1 M1 Solution

SMDDR_VREF6,15,38

A A

C240

C240 1U/6.3V_4

1U/6.3V_4

R269

R269 1K/F_4

1K/F_4

SMDDR_VREF_DQ1_M1

R268

R268 1K/F_4

1K/F_4

C194

C194 1U/6.3V_4

1U/6.3V_4

C248

0.1u/10V_4

C193

C193 1U/6.3V_4

1U/6.3V_4

C226

C517

STD 4H

C517

100P/50V/X7R_4

STD 8H

C181

10U/6.3V_6

*10U/6.3V_6

FOX

LTK

DGMK4000004

DGMK4000097

SUY

MLX

DGMK4000011

DGMK4000080

Standard 8H type:DDR-C-2013310-204p-1

4

A16

352-(&7./

Quanta Computer Inc.

Document Number

DDRIII SO-DIMM-0

Date: Sheet of

3

2

Date: Sheet of

14 44Tuesday, January 04, 2011

1

RevSize

1ACustom

RevSize

1ACustom

RevSize

1ACustom

Quanta KL8 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual