Quanta KL6B Block Diagram

1

2

3

4

5

6

7

8

01

FAN /THERMAL

EMC2103-2

Page32

A A

Note :DDR3 1.35V support 1066~1333 MHz

DDR3 1.5V support 1066~1600 MHz

DDR III

SO-DIMM 0 SO-DIMM 1

Memory size MAX is 16GB per channel

RealTek

RTL8105

B B

X'TAL 25MHz

Page31

Transformer

PCIEx1

GPP PCIE0

PCIEx1

GPP PCIE1

Mini Card

Wlan/WiFi

Dual Channel

1333/1600 MHz

PCI-Express Gen1

RJ45

USB 2.0

HDD (SATA)

ODD (SATA)

eSATA/USB Port x 1

C C

USB 3.0/2.0 Combo X1

Reserved

USB 2.0 X3

Bluetooth

USB 2.0

USB 3.0/2.0

USB 2.0

SATA0

SATA1

SATA3

Azalia ( HDA bus )

%/2&.',$*5$0

Note :DP means Display Port Interface

DP0/TXPN[0:3]

35W TDP

DP4_DP5/PCI-E 8_11

UMI

FCH

DP2/PCI-E 0_3

DP1/TXPN[0:3]

DP1

DP to VGA

RTCUSB2.0

PCI-E

LPC

2.5GT/s

6Gbit/s

3Gbit/s

USB 2.0

AMD

Support 45W/

Socket FS1-LIano APU ( CPU + GPU )

uPGA 722 pin

DDR SYSTEM MEMORY

GPP PCIEX1

X4 UMI interface

2.5GT/s

SATA Gen3

SATA Gen2

AMD

Hudson-M3

USB3.0/2.0

FCBGA 656 pin

HDA

LPC

SPI

DP0

DP2

PCI-Express Gen2

5GT/s

PCIE X8

VGA

X'TAL

32.768KHz

ANX3110

DP to LVDS

HDMI

ATI GPU

Seymour XT M2

X'TAL

27.0MHz

VGA

LVDS

VRAM

512M/1G

Discharge Charge DDR3/0.75V

(RT8207)

3V/5V

(RT8206)

1.1V/+1.0V_GPU

+1.2V_VDDPR/+2.5

VDD/+VDDNB_CORE

GFX_CORE

(OZ8117)

+1.8V_GPU

(HPA00835RTER)

Page37

Page38

Page39

Page40

Page41

Page42

Page43

Page44

Page45

CCD

CardReader RTS5139

7-IN-1 Card read CONN

D D

1

USB 2.0

Audio CODEC

USB 2.0

HP Jack MIC Jack DMIC

RTL ALC269Q-VB6-GR

2

Page29

SPK

3

SPI ROM

EC (ITE 8518E)

X'TAL

32.768KHz

SPI ROM Touch Pad Keyboard

4

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Date: Sheet

5

6

Date: Sheet

7

Quanta Computer Inc.

System Block Diagram

149Thursday, April 28, 2011

8

1A

of

5

4

3

2

+1.2V_VDDPR[4,5,9,23,38,43]

1

02

D D

U32F

PCI EXPRESS

AA8

P_GFX_RXP0

AA9

P_GFX_RXN0

Y7

P_GFX_RXP1

Y8

P_GFX_RXN1

W5

P_GFX_RXP2

W6

P_GFX_RXN2

W8

P_GFX_RXP3

W9

P_GFX_RXN3

V7

P_GFX_RXP4

V8

P_GFX_RXN4

U5

P_GFX_RXP5

U6

P_GFX_RXN5

U8

P_GFX_RXP6

U9

P_GFX_RXN6

T7

P_GFX_RXP7

T8

AC5 AC6 AC8 AC9 AB7 AB8 AA5 AA6

AF8 AF7 AE6 AE5 AE9 AE8 AD8 AD7

R5 R6 R8 R9

P7

P8 N5 N6 N8 N9 M7 M8

L5

L6

L8

L9

K5

P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15

P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3

P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3

P_ZVDDP

PEG_RXP8[14] PEG_RXN8[14] PEG_RXP9[14]

C C

LAN

WLAN

B B

PEG_RXN9[14] PEG_RXP10[14] PEG_RXN10[14] PEG_RXP11[14] PEG_RXN11[14] PEG_RXP12[14] PEG_RXN12[14] PEG_RXP13[14] PEG_RXN13[14] PEG_RXP14[14] PEG_RXN14[14] PEG_RXP15[14] PEG_RXN15[14]

PCIE_RXP2_LAN[32] PCIE_RXN2_LAN[32]

PCIE_RXP3[28] PCIE_RXN3[28]

UMI_RXP0[8] UMI_RXN0[8] UMI_RXP1[8] UMI_RXN1[8] UMI_RXP2[8] UMI_RXN2[8] UMI_RXP3[8] UMI_RXN3[8]

+1.2V_VDDPR

PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_TXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15

R215 196/F_6R215 196/F_6

PCI EXPRESS

GRAPHICS

GPP

UMI-LINK

P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9

P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

AA2 AA3 Y2 Y1 Y4 Y5 W2 W3 V2 V1 V4 V5 U2 U3 T2 T1 T4 T5 R2 R3 P2 P1 P4 P5 N2 N3 M2 M1 M4 M5 L2 L3

AD4 AD5 AC2 AC3 AB2 AB1 AB4 AB5

AF1 AF2 AF5 AF4 AE3 AE2 AD1 AD2

K4

PEG_HDMI_TXDP2 PEG_HDMI_TXDN2 PEG_HDMI_TXDP1 PEG_HDMI_TXDN1 PEG_HDMI_TXDP0 PEG_HDMI_TXDN0 PEG_HDMI_TXCP PEG_HDMI_TXCN

PEG_TXP8_C PEG_TXN8_C PEG_TXP9_C PEG_TXN9_C PEG_TXP10_C PEG_TXN10_C PEG_TXP11_C PEG_TXN11_C PEG_TXP12_C PEG_TXN12_C PEG_TXP13_C PEG_TXN13_C PEG_TXP14_C PEG_TXN14_C PEG_TXP15_C PEG_TXN15_C

PCIE_TXP2_C PCIE_TXN2_C PCIE_TXP3_C PCIE_TXN3_C

UMI_TXP0_C UMI_TXN0_C UMI_TXP1_C UMI_TXN1_C UMI_TXP2_C UMI_TXN2_C UMI_TXP3_C UMI_TXN3_C

P_ZVSSP_ZVDDP

C652 0.1U/10V_4XC652 0.1U/10V_4X C651 0.1U/10V_4XC651 0.1U/10V_4X C649 0.1U/10V_4XC649 0.1U/10V_4X C647 0.1U/10V_4XC647 0.1U/10V_4X

C643 DIS@0.1U/10V_4XC643 DIS@0.1U/10V_4X C633 DIS@0.1U/10V_4XC633 DIS@0.1U/10V_4X C641 DIS@0.1U/10V_4XC641 DIS@0.1U/10V_4X C631 DIS@0.1U/10V_4XC631 DIS@0.1U/10V_4X C639 DIS@0.1U/10V_4XC639 DIS@0.1U/10V_4X C629 DIS@0.1U/10V_4XC629 DIS@0.1U/10V_4X C637 DIS@0.1U/10V_4XC637 DIS@0.1U/10V_4X C627 DIS@0.1U/10V_4XC627 DIS@0.1U/10V_4X

C655 0.1u/10V_4XC655 0.1u/10V_4X

C2980.1u/10V_4X C2980.1u/10V_4X

C668 0.1u/10V_4XC668 0.1u/10V_4X C707 0.1u/10V_4XC707 0.1u/10V_4X C664 0.1u/10V_4XC664 0.1u/10V_4X C657 0.1u/10V_4XC657 0.1u/10V_4X

R216 196/F_6R216 196/F_6

C653 0.1U/10V_4XC653 0.1U/10V_4X C650 0.1U/10V_4XC650 0.1U/10V_4X C648 0.1U/10V_4XC648 0.1U/10V_4X C646 0.1U/10V_4XC646 0.1U/10V_4X

C642 DIS@0.1U/10V_4XC642 DIS@0.1U/10V_4X C632 DIS@0.1U/10V_4XC632 DIS@0.1U/10V_4X C640 DIS@0.1U/10V_4XC640 DIS@0.1U/10V_4X C630 DIS@0.1U/10V_4XC630 DIS@0.1U/10V_4X C638 DIS@0.1U/10V_4XC638 DIS@0.1U/10V_4X C628 DIS@0.1U/10V_4XC628 DIS@0.1U/10V_4X C636 DIS@0.1U/10V_4XC636 DIS@0.1U/10V_4X C626 DIS@0.1U/10V_4XC626 DIS@0.1U/10V_4X

C654 0.1u/10V_4XC654 0.1u/10V_4X

C2970.1u/10V_4X C2970.1u/10V_4X C671 0.1u/10V_4XC671 0.1u/10V_4X C703 0.1u/10V_4XC703 0.1u/10V_4X C660 0.1u/10V_4XC660 0.1u/10V_4X C658 0.1u/10V_4XC658 0.1u/10V_4X

PEG_TXP8 PEG_TXN8

PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15

PCIE_TXP2 PCIE_TXN2 PCIE_TXP3 PCIE_TXN3

UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3

HDMI_TX2+ [25] HDMI_TX2- [25] HDMI_TX1+ [25] HDMI_TX1- [25] HDMI_TX0+ [25] HDMI_TX0- [25] HDMI_CLK+ [25] HDMI_CLK- [25]

PEG_TXP8 [14] PEG_TXN8 [14] PEG_TXP9 [14] PEG_TXN9 [14] PEG_TXP10 [14] PEG_TXN10 [14] PEG_TXP11 [14] PEG_TXN11 [14] PEG_TXP12 [14] PEG_TXN12 [14] PEG_TXP13 [14] PEG_TXN13 [14] PEG_TXP14 [14] PEG_TXN14 [14] PEG_TXP15 [14] PEG_TXN15 [14]

PCIE_TXP2_LAN [32] PCIE_TXN2_LAN [32] PCIE_TXP3 [28] PCIE_TXN3 [28]

UMI_TXP0 [8] UMI_TXN0 [8] UMI_TXP1 [8] UMI_TXN1 [8] UMI_TXP2 [8] UMI_TXN2 [8] UMI_TXP3 [8] UMI_TXN3 [8]

HDMI

P_GFX_TXP/N[3:0] correspond to DisplayPort 2.

LAN

WLAN

Llano APU

A A

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Llano PCIE/UMI/GPP

1

249Thursday, April 28, 2011

of

1A

5

4

3

2

+1.5V_SUS[4,5,6,9,10,12,13,37,38,40,42]

1

03

U32A

M_A_A[15:0][12]

D D

M_A_BS#[2..0][12]

M_A_DM[7..0][12]

M_A_DQSP0[12] M_A_DQSN0[12] M_A_DQSP1[12]

1K/F_4

1K/F_4 R356

R356

M_A_DQSN1[12] M_A_DQSP2[12] M_A_DQSN2[12] M_A_DQSP3[12] M_A_DQSN3[12] M_A_DQSP4[12] M_A_DQSN4[12] M_A_DQSP5[12] M_A_DQSN5[12] M_A_DQSP6[12] M_A_DQSN6[12] M_A_DQSP7[12] M_A_DQSN7[12]

M_A_CLKP0[12] M_A_CLKN0[12] M_A_CLKP1[12] M_A_CLKN1[12]

M_A_CKE0[12] M_A_CKE1[12]

M_A_ODT0[12] M_A_ODT1[12]

M_A_CS#0[12] M_A_CS#1[12]

M_A_RAS#[12] M_A_CAS#[12] M_A_WE#[12]

M_A_RST#[12]

R303 39.2/F_4R303 39.2/F_4

C C

+1.5V_SUS +1.5V_SUS

B B

M_A_EVENT#[12]

+M_VREF

+1.5V_SUS

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BS#0 M_A_BS#1 M_A_BS#2

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

+M_ZVDDIO

Place close to APU within 1"

U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22

AA25

U24 U21

E14 E21

AD27 AC23 AD19 AC15

G14 H14 G18

AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15

AA27

AA26

W24 W23

W20 W21

L24 L21

L20

L23

J17 F25

H18 J21 H21 E27 E26

T21 T22 R23 R24

H28 H27

Y25

V22

V21

H25 T24

U32A

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1

MA_CKE0 MA_CKE1

MA_ODT0 MA_ODT1

MA_CS_L0 MA_CS_L1

MA_RAS_L MA_CAS_L MA_WE_L

MA_RESET_L MA_EVENT_L

M_VREF M_ZVDDIO

MEMORY CHANNEL A

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7

MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15

MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23

MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31

MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39

MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47

MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55

MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

E13 J13 H15 J15 H13 F13 F15 E15

H17 F17 E19 J19 G16 H16 H19 F19

H20 F21 J23 H23 G20 E20 G22 H22

G24 E25 G27 G26 F23 H24 E28 F27

AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25

Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21

AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17

AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7

M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23

M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39

M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55

M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

Soldermask openings for all bottom si de vias/TPs under FS 1

Llano APU

M_A_DQ[0..63] [12] M_B_DQ[0..63] [13]

M_B_EVENT#[13]

M_B_A[15:0][13]

M_B_BS#[2..0][13]

M_B_DM[7..0][13]

R355

R355 1K/F_4

1K/F_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BS#0 M_B_BS#1 M_B_BS#2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP0[13] M_B_DQSN0[13] M_B_DQSP1[13] M_B_DQSN1[13] M_B_DQSP2[13] M_B_DQSN2[13] M_B_DQSP3[13] M_B_DQSN3[13] M_B_DQSP4[13] M_B_DQSN4[13] M_B_DQSP5[13] M_B_DQSN5[13] M_B_DQSP6[13] M_B_DQSN6[13] M_B_DQSP7[13] M_B_DQSN7[13]

M_B_CLKP0[13] M_B_CLKN0[13] M_B_CLKP1[13] M_B_CLKN1[13]

M_B_CKE0[13] M_B_CKE1[13]

M_B_ODT0[13] M_B_ODT1[13]

M_B_CS#0[13] M_B_CS#1[13]

M_B_RAS#[13] M_B_CAS#[13] M_B_WE#[13]

M_B_RST#[13]

U32B

T27 P24

P25 N27 N26 M28 M27 M24 M25

L26

U26

L27

K27

W26

K25

K24

U27

T28

K28

D14

A18

A22

C25

AF25 AG22 AH18 AD14

C15 B15 E18 D18 E22 D22 B26

A26 AG24 AG25 AG21

AF21 AG17 AG18 AH14 AG14

R26 R27 P27 P28

J26 J27

W27

Y28 V25

Y27 V24

V27 V28

J25 T25

Llano APU

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1

MB_CKE0 MB_CKE1

MB_ODT0 MB_ODT1

MB_CS_L0 MB_CS_L1

MB_RAS_L MB_CAS_L MB_WE_L

MB_RESET_L MB_EVENT_L

MEMORY CHANNEL B

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7

MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15

MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23

MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31

MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39

MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47

MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55

MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

A14 B14 D16 E16 B13 C13 B16 A16

C17 B18 B20 A20 E17 B17 B19 C19

C21 B22 C23 A24 D20 B21 E23 B23

E24 B25 B27 D28 B24 D24 D26 C27

AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24

AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20

AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16

AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7

M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15

M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23

M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31

M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39

M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47

M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55

M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

+1.5V_SUS

+M_VREF

A A

5

R349

R349 1K/F_4

1K/F_4

R348

R348 1K/F_4

1K/F_4

C416

C416 1000P/50V_4X

1000P/50V_4X

4

C417

0.1u/10V_4X

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

Quanta Computer Inc.

Llano DDR3 MEM I/F

1

349Thursday, April 28, 2011

1A

of

5

INT_LVDS_TXP0[23]

R554

R554 300/J_4

300/J_4

APU_VDDNB_RUN_FB_L[44] APU_VDD_RUN_FB_L[44] APU_VDDNB_RUN_FB_H[44] APU_VDD_RUN_FB_H[44]

+1.5V_SUS

R563

R563 1K/J_4

1K/J_4

R301

R301 10K/J_4

10K/J_4

1 3

MMBT3904-7-F_200MA

INT_LVDS_TXN0[23] INT_LVDS_TXP1[23]

INT_LVDS_TXN1[23]

APU_DP_TXP0[9] APU_DP_TXN0[9]

APU_DP_TXP1[9] APU_DP_TXN1[9]

APU_DP_TXP2[9] APU_DP_TXN2[9]

APU_DP_TXP3[9] APU_DP_TXN3[9]

CLK_APU_HCLKP[8] CLK_APU_HCLKN[8]

CLK_DP_NSSCP[8] CLK_DP_NSSCN[8]

SVC[6] SVD[6]

+1.5V_SUS

TP51TP51 TP52TP52 TP18TP18 TP45TP45 TP40TP40

APU_THERMTRIP#_VDDIO

+1.5V_SUS

+3V

R300

R300 10K/J_4

10K/J_4

2

Q26

TP46TP46 TP42TP42

These TP near the APU

R297

R297 1K/F_4

1K/F_4

DP0 to LVDS

D D

DP1 to Hudson-M3 VGA output

Note: CLK_APU_HCLKP/N is 100MHZ SSC

+1.5V

R555

R555 300/J_4

300/J_4

APU_RST#[6,8] APU_PWRGD[6,8]

C C

B B

APU_THERMTRIP#[7]

H_PROCHOT#[36,44]

APU_PROCHOT#_VDDIO[8]

FCH_PROCHOT#[9]

A A

Note: CLK_DP_NSSCP/N is 100MHZ non-SSC

R589

R589 10K/J_4

10K/J_4

2

13

Q52

Q52 MMBT3904-7-F_200MA

MMBT3904-7-F_200MA

APU_PROCHOT#

APU_PROCHOT#_VDDIO

R296 *0/J_4R296 *0/J_4

5

C269 0.1U/10V_4XC269 0.1U/10V_4X C270 0.1U/10V_4XC270 0.1U/10V_4X

C279 0.1U/10V_4XC279 0.1U/10V_4X C280 0.1U/10V_4XC280 0.1U/10V_4X

C278 0.1U/10V_4XC278 0.1U/10V_4X C277 0.1U/10V_4XC277 0.1U/10V_4X

C268 0.1U/10V_4XC268 0.1U/10V_4X C267 0.1U/10V_4XC267 0.1U/10V_4X

C264 0.1U/10V_4XC264 0.1U/10V_4X C263 0.1U/10V_4XC263 0.1U/10V_4X

C265 0.1U/10V_4XC265 0.1U/10V_4X C266 0.1U/10V_4XC266 0.1U/10V_4X

R588 1K/F_4R588 1K/F_4

R541 *0_4_shortR541 *0_4_short R547 *0_4_shortR547 *0_4_short

4

INT_LVDS_TXN0_C INT_LVDS_TXP1_C

INT_LVDS_TXN1_C

APU_DP_TXP0_C APU_DP_TXN0_C

APU_DP_TXP1_C APU_DP_TXN1_C

APU_DP_TXP2_C APU_DP_TXN2_C

APU_DP_TXP3_C APU_DP_TXN3_C

APU_SIC APU_SID

APU_RST# APU_PWRGD

APU_PROCHOT#_VDDIO APU_THERMTRIP#_VDDIO APU_ALERT

APU_VDDP_FB_H APU_VDDNB_RUN_FB_H APU_VDDIO_RUN_FB_H APU_VDD_RUN_FB_H APU_VDDR_FB_H

VSS_SENSE

MB_CLK1[22,33,35,36]

MB_DAT A1[22,33,35,36]

4

AH11 AG11

AF10 AE10

AD10 AG12 AH12

AC11

F2 F1

E3 E2

D2 D1

C2 C3

K2 K1

J3 J2

H2 H1

G2 G3

AH7 AH6

AH4 AH3

B8 A8

C12 A12 A11 D12 B12 B11 C11

E8

K21

B9 C8 A9

B10

C9

A10

U32C

ANALOG/DISPLAY/MISC

DP0_TXP0 DP0_TXN0

DP0_TXP1 DP0_TXN1

DP0_TXP2 DP0_TXN2

DP0_TXP3 DP0_TXN3

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

CLKIN_H CLKIN_L

DISP_CLKIN_H DISP_CLKIN_L

SVC SVD

SIC SID

RESET_L PWROK

PROCHOT_L THERMTRIP_L ALERT_L

TDI TDO TCK TMS TRST_L DBRDY DBREQ_L

RSVD_1 RSVD_2 RSVD_3

VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE

Llano APU

DISPLAY

PORT 0

DISPLAY

PORT 0

DISPLAY PORT

DISPLAY

PORT 1

DISPLAY

PORT 1

DP_AUX_ZVSS

TEST

JTAG CTRL SER. CLK

RSVD

DMAACTIVE_L

SENSE

Q50

MMBT3904-7-F_200MA

D31

SDM10K45-7-F_100MA

MMBT3904-7-F_200MA

DP0_AUXP DP0_AUXN

DP1_AUXP DP1_AUXN

DP2_AUXP DP2_AUXN

DP3_AUXP DP3_AUXN

DP4_AUXP DP4_AUXN

DP5_AUXP DP5_AUXN

MISC.

DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD

DP_BLON

DP_DIGON

DP_VARY_BL

TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L

TEST32_H

TEST32_L

+1.5V_SUS

INT_LVDS_AUXN_C

D5

APU_DP_AUXP_C

E5

APU_DP_AUXN_C

E6

INT_HDMI_SCL

J5

INT_HDMI_SDA

J6 H4

H5 G5

G6 F4

F5 D7

E7 J7 H7 G7 F7

C6 C5 C7

DP_AUX_ZVSS

D8 AA10

TEST6

G10

TEST9

H10

TEST10

H12

TEST12

D9

TEST14

E9

TEST15

G9

TEST16

H9

TEST17

H11

TEST18

G11

TEST19

F12

TEST20

E11

TEST21

D11

TEST22

F10

TEST23

G12

TEST24

AH10 AH9 K7 K8 AA12 AB12 K22

TEST31

AB11 AA11 D10

TEST35

Y11

FS1R1

AB10 AE12

TEST4

AD12

TEST5

R590

R564

2K/F_4

2

13

21

2

Q53

13

21

D32 SDM10K45-7-F_100MAD32 SDM10K45-7-F_100MA

INT_LVDS_AUXP_CINT_LVDS_TXP0_C

D4

3

APU_BLEN APU_DIGON DP_VARY_ BL

APU_TEST6 APU_TEST9 APU_TEST10 APU_TEST12_SCANSHIFTEND APU_TEST14_BP0 APU_TEST15_BP1 APU_TEST16_BP2 APU_TEST17_BP3 APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST21_SCANEN APU_TEST22_SCANSHIFTEN APU_TEST23 APU_TEST24_SCANCLK1 APU_TEST25_H APU_TEST25_L APU_TEST28_H APU_TEST28_L ANATSTIN_H ANATSTIN_L M_TEST APU_TEST32_H APU_TEST32_L APU_TEST35

FS1R1 DMAACTIVE_L

APU_TEST4 APU_TEST5

3

C260 0.1U/10V_4XC260 0.1U/10V_4X C272 0.1U/10V_4XC272 0.1U/10V_4X

C275 0.1U/10V_4XC275 0.1U/10V_4X C276 0.1U/10V_4XC276 0.1U/10V_4X

TP39TP39

R261 150/F_4R261 150/F_4

+1.5V_SUS

R565

R565 1K/F_4

1K/F_4

APU_DP_AUXP APU_DP_AUXN

FCH_LVDS_HPD [23] VGA_HPD_Q [9 ] INT_HDMI_HPD [25]

TP10TP10

Remove APU_TEST6

TP15TP15 TP22TP22 TP43TP43 TP44TP44 TP12TP12 TP8TP8 TP55TP55 TP56TP56 TP20TP20 TP19TP19 TP54TP54 TP16TP16 TP23TP23

TP53TP53 TP50TP50 TP9TP9 TP11TP11 TP17TP17 TP21TP21

TP13TP13 TP14TP14

TP26TP26 TP27TP27

R586

R586 1K/F_4

1K/F_4

APU_SIC

R496 *0/J_4R496 *0/J_4

APU_SID

R497 *0/J_4R497 *0/J_4

M_TEST

M_TEST CONNECTION TBD

APU_BLEN [24] APU_DIGON [24]

+3VPCU

R299

R299 10K/J_4

10K/J_4

INT_LVDS_AUXP [23] INT_LVDS_AUXN [23]

APU_DP_AUXP [9] APU_DP_AUXN [9]

INT_HDMI_SCL [25] INT_HDMI_SDA [25]

+1.5V

R293

R293 1K/J_4

1K/J_4

R320

R320 *39.2/F_4

*39.2/F_4

R302

39.2/F_4

2

LVDS

VGA

HDMI

DMAACTIVE_L [8]

SMB_LV_CLK [7]

SMB_LV_DAT [7]

B_EC_05

APU_TEST35

TEST35 PU FOR INTERNAL TEST35 PD FOR CUSTOMER

2

1

+3V[6,7,8,9,10,11,12,13,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +5V[9,19,23,25,26,29,30,33,34,35,36,37,38,39,44] +3VPCU[8,10,24,29,32,34,35,36,38,39,40,41,43,46] +1.5V_SUS[3,5,6,9,10,12,13,37,38,40,42] +1.5V[6,8,9,23,25,28,29,42]

+1.5V

2

DP_VARY_ BL

EC_A_01

+1.5V_SUS+1.5V_SUS

R569

R569 300/J_4

300/J_4

R568

R568 *300/J_4

*300/J_4

1

DMN5L06K-7

INT_LVDS_AUXP_C INT_LVDS_AUXN_C APU_DP_AUXP_C APU_DP_AUXN_C

APU_DP_AUXN INT_LVDS_AUXN

APU_DP_AUXP INT_LVDS_AUXP

INT_HDMI_SCL INT_HDMI_SDA

APU_TEST25_L

APU_TEST12_SCANSHIFTEND APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST21_SCANEN APU_TEST22_SCANSHIFTEN APU_TEST24_SCANCLK1

APU_TEST25_H APU_TEST9

Size Document Number Rev

Date: Sheet

DVDD33

R648

2.2K/J_4

*220P/50V/X7R_4

Q61

R649

4.7K/J_4

C824

3

R210 1.8K/J_4R210 1.8K/J_4 R209 1.8K/J_4R209 1.8K/J_4 R220 1.8K/J_4R220 1.8K/J_4 R221 1.8K/J_4R221 1.8K/J_4

R197 100K/J_4R197 100K/J_4 R202 100K/J_4R202 100K/J_4

R196 100K/J_4R196 100K/J_4 R191 100K/J_4R191 100K/J_4

R272

R272 *1.8K/J_4

*1.8K/J_4

R548 510/J_4R548 510/J_4

R282 1K/J_4R282 1K/J_4 R274 1K/J_4R274 1K/J_4 R285 1K/J_4R285 1K/J_4 R289 1K/J_4R289 1K/J_4 R273 1K/J_4R273 1K/J_4 R576 1K/J_4R576 1K/J_4 R281 1K/J_4R281 1K/J_4

R549 510/J_4R549 510/J_4

R260 *0/J_4R260 *0/J_4

PROJECT : KL6B/C

Quanta Computer Inc.

Llano Display/Misc

1

APU_VARY_ BL [23]

R271

R271 *1.8K/J_4

*1.8K/J_4

+1.2V_VDDPR

449Thursday, April 28, 2011

04

+3V

of

1A

5

4

3

2

1

+VDD_CORE[37,44] +VDDNB_CORE[44] +1.5V_SUS[3,4,6,9,10,12,13,37,38,40,42]

+1.2V_VDDPR

+2.5V_VDDA[38,43] +1.2V_VDDPR[2,4,9,23,38,43]

+VDD_CORE +VDD_CORE

U32D

APU POWER TABLE

PIN NAME

NET NAME +VDD_CORE +VDDNB_CORE +1.5VSUS +1.2V_VDDP +1.2V_VDDR +2.5V_VDDA

VOLTAGE

+1.1V

?? +1.5V +1.2VVDDP

+2.5V

+VDDNB_CORE +VDDNB_CORE

VDD

D D

C C

VDDNB VDDIO

VDDR +1.2V VDDA

VDDP_A + VDDP_B = 3.5A

C293

0.22U/6.3V_4X

C349

0.22U/6.3V_4X

C350

180P/50V_4N

VDDA = 0.75A

C369

0.22U/6.3V_4X

1.75A

C294

180P/50V_4N

C348

1.5A

C364

C364 3300P/50V_4X

3300P/50V_4X

+1.2V_VDDR_A

C336

C336 1000P/50V_4

1000P/50V_4

C351

4.7U/6.3V_6X

L40

+1.2V_VDDP_A

C292

C292 10U/6.3V_8X

10U/6.3V_8X

C291

C291 10U/6.3V_8X

10U/6.3V_8X

C337

C337 1000P/50V_4X

1000P/50V_4X

C339

4.7U/6.3V_6X

C338

0.22U/6.3V_4X

180P/50V_4N

+VDDA

C370

4.7U/6.3V_6X

+1.2V_VDDPR

B B

R222 0/J_8R222 0/J_8

R279 0/J_8R279 0/J_8

+2.5V_VDDA

BLM21PG221SN1D(220,100M,2A)_8

C1 D3 D6

E1 F3 F6

F8 G1 H3 H6 H8

J1

K3

K6

L1

L11 L19

M3 M6

M10 M18

N1

N11 N19

P3

P6

P10 P18

R1

R11 R19

T3

J9

J10 J11 J12 J14 J16

K9

K10 G28

H26

J28 K20 K23 K26

L22

L25

L28 M20 M23 M26 N22 N25 N28 P20 P23 P26

AG2 AG3 AG4 AG5

AG6 AG7 AG8 AG9

AE11 AF11

C368

*180P/50V_4N

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8

VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18

VDDP_A_1 VDDP_A_2 VDDP_A_3 VDDP_A_4

VDDR_1 VDDR_2 VDDR_3 VDDR_4

VDDA_1 VDDA_2

Llano APU

VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63

VDDNB_9 VDDNB_10 VDDNB_11 VDDNB_12 VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16

VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36

VDDP_B_1 VDDP_B_2 VDDP_B_3 VDDP_B_4

VDDR_5 VDDR_6 VDDR_7 VDDR_8

T6 T10 T18 U1 U11 U19 V3 V6 V10 V18 W1 W11 W13 W15 W17 W19 Y3 Y6 Y10 Y12 Y14 Y16 Y18 Y20 AA1 AB3 AB6 AC1 AD3 AD6 AE1

K11 K12 K13 K14 K16 K17 K18 L18

R22 R25 R28 T20 T23 T26 U22 U25 U28 V20 V23 V26 W22 W25 W28 Y24 Y26 AA28

A3 A4 B3 B4

A5 A6 B5 B6

+1.5V_SUS+1.5V_SUS

+1.2V_VDDP_B

C271

C271 10U/6.3V_8X

10U/6.3V_8X

+1.2V_VDDR_B

C286

C286 1000P/50V_4X

1000P/50V_4X

C666

4.7U/6.3V_6X

1.75A

C274

0.22U/6.3V_4X

1.5A

C284

C284 1000P/50V_4X

1000P/50V_4X

C661

4.7U/6.3V_6X

180P/50V_4N

C287

0.22U/6.3V_4X

C288

180P/50V_4N

C656

R195 0/J_8R195 0/J_8

C285

0.22U/6.3V_4X

C662

180P/50V_4N

+1.2V_VDDPR

R211 0/J_8R211 0/J_8

U32E

A7

VSS_1

A13

VSS_2

A15

VSS_3

A17

VSS_4

A19

VSS_5

A21

VSS_6

A23

VSS_7

A25

VSS_8

B7

VSS_9

C4

VSS_10

C10

VSS_11

C14

VSS_12

C16

VSS_13

C18

VSS_14

C20

VSS_15

C22

VSS_16

C24

VSS_17

C26

VSS_18

C28

VSS_19

D13

VSS_20

D15

VSS_21

D17

VSS_22

D19

VSS_23

D21

VSS_24

D23

VSS_25

D25

VSS_26

D27

VSS_27

E4

VSS_28

E10

VSS_29

E12

VSS_30

F9

VSS_31

F11

VSS_32

F14

VSS_33

F16

VSS_34

F18

VSS_35

F20

VSS_36

F22

VSS_37

F24

VSS_38

F26

VSS_39

F28

VSS_40

G4

VSS_41

G8

VSS_42

G13

VSS_43

G15

VSS_44

G17

VSS_45

G19

VSS_46

G21

VSS_47

G23

VSS_48

G25

VSS_49

J4

VSS_50

J8

VSS_51

J18

VSS_52

J20

VSS_53

J22

VSS_54

J24

VSS_55

K19

VSS_56

L4

VSS_57

L7

VSS_58

L10

VSS_59

M9

VSS_60

M11

VSS_61

M19

VSS_62

N4

VSS_63

N7

VSS_64

N10

VSS_65

N18

VSS_66

P9

VSS_68

P11

VSS_67

P19

VSS_69

R4

VSS_70

R7

VSS_71

R10

VSS_72

R18

VSS_73

T9

VSS_74

Llano APU

VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149

T11 T19 U4 U7 U10 U18 V9 V11 V19 W4 W7 W10 W12 W14 W16 W18 Y9 Y22 AA4 AA7 AB9 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AC4 AC7 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC26 AC28 AD9 AD11 AE4 AE7 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 AF3 AF6 AF9 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AH5 AH8 AH13 AH15 AH17 AH19 AH21 AH23 AH25

05

+VDD_CORE

C342

C342 22U/6.3V_8X

22U/6.3V_8X

+VDDNB_CORE

C341

C352

22U/6.3V_8X

A A

+1.5V_SUS

C375

C374

22U/6.3V_8X

If the VSS plane is cut to create a VDDIO plane, ceramic capacitors are connected across the VDDIO and VSS plane split as follows

5

BOTTOM SIDE DECOUPLING

C345

C356

C344

C344 22U/6.3V_8X

22U/6.3V_8X

C353

C353 22U/6.3V_8X

22U/6.3V_8X

C380

4.7U/6.3V_6X

22U/6.3V_8X

C355

C355 22U/6.3V_8X

22U/6.3V_8X

C426

4.7U/6.3V_6X

C362

0.22U/6.3V_4X

C421

4.7U/6.3V_6X

C361

C361 22U/6.3V_8X

22U/6.3V_8X

C343

C343 22U/6.3V_8X

22U/6.3V_8X

C335

0.22U/6.3V_4X

C377

4.7U/6.3V_6X

C358

C358 22U/6.3V_8X

22U/6.3V_8X

C363

180P/50V_4N

EMI reserve

C415

0.22U/6.3V_4X

4

C347

0.22U/6.3V_4X

C357

180P/50V_4N

C373

0.22U/6.3V_4X

C360

180P/50V_4N

C381

0.22U/6.3V_4X

C329

0.22U/6.3V_4X

C371

C330

180P/50V_4N

0.22U/6.3V_4X

C346

C334

0.01U/25V_4X

180P/50V_4N

C378

C359

C372

0.22U/6.3V_4X

C359

180P/50V_4N

EMI reserve

3

C331

0.01U/25V_4X

EMI reserve

C367

180P/50V_4N

C332

0.01U/25V_4X

DECOUPLING between PROCESSOR and DIMMs

Across VDDIO and VSS sp lit

+1.5V_SUS

C412

C414

0.22U/6.3V_4X

C413

0.22U/6.3V_4X

2

C428

180P/50V_4N

C412

180P/50V_4N

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Date: Sheet of

Quanta Computer Inc.

Llano POWER/GND

1

549Thursday, April 28, 2011

of

1A

5

4

3

2

1

VID Override Circuit

SVC SVD

D D

SVC[4] SVD[4] APU_PWRGD[4,8]

APU_PWRGD have pull up 300ohm to +1.5V

C C

Note: To override VID,Remove Rd, Re, Rf, install Rc set VID via SVC & SVD option RES.

+1.5V +1.5V

R530

R530 1K/J_4

1K/J_4

SVC SVD APU_PWRGD

R543

R543 1K/J_4

1K/J_4

Rd

R535 *0_4_shortR535 *0_4_short

Re

R537 *0_4_shortR537 *0_4_short

Rf

R556 *0_4_shortR556 *0_4_short

for normal operation open Ra , Rb,Rc

R532

R539

R539 *1K/J_4

*1K/J_4

R538

R531

*220/J_4

Ra Rb Rc

R551

R551 *2.2K/J_4

*2.2K/J_4

APU_SVC APU_SVD APU_PWRGD_SVID_REG

R550

R550 *220/J_4

*220/J_4

000

1

BOOT VOLTAGE

VFIX_+VDD =VCC/GND

1.1 1.1

1

0

1

1.0 1.2

0.9 1.0

0.8 0.8

APU_SVC [44] APU_SVD [44] APU_PWRGD_SVID_REG [44]

VFIX_+VDD =OPEN

06

+1.5V[4,8,9,23,25,28,29,42] +1.5V_SUS[3,4,5,9,10,12,13,37,38,40,42]

HDT+ Connector

Debug only

B B

A A

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Thursday, April 28, 2011 6 49

Date: Sheet

Thursday, April 28, 2011 6 49

Date: Sheet

Thursday, April 28, 2011 6 49

5

4

3

2

Date: Sheet

Llano DEBUG&OTHER

1

of

1A

5

+3V_S5

NC,no install by default

R526 *2.2K/J_4R526 *2.2K/J_4

R524 *2.2K/J_4R524 *2.2K/J_4

R517 *2.2K/J_4R517 *2.2K/J_4

D D

C C

B B

A A

+3V

R513 2.2K/J_4R513 2.2K/J_4 R514 2.2K/J_4R514 2.2K/J_4 R295 *1K/J_4R295 *1K/J_4

*SHORT_PAD

+3V_S5

R518 *10K/J_4R518 *10K/J_4 R529 10K/J_4R529 10K/J_4 R536 10K/J_4R536 10K/J_4 R574 10K/J_4R574 10K/J_4 R575 10K/J_4R575 10K/J_4 R582 10K/J_4R582 10K/J_4 R581 10K/J_4R581 10K/J_4

+3V_S5

R546 4.7K/J_4R546 4.7K/J_4 R553 10K/J_4R553 10K/J_4 R525 10K/J_4R525 10K/J_4 R259 10K/J_4R259 10K/J_4 R534 10K/J_4R534 10K/J_4

+3V

R325 4.7K/J_4R325 4.7K/J_4 R540 *10K/J_4R540 *10K/J_4 R308 *10K/J_4R308 *10K/J_4

+3V_S5

R288 10K/J_4R288 10K/J_4 R294 2.2K/J_4R294 2.2K/J_4

Note:LLB#, WAKE# and PWR_BTN need pull up to 3.3V_S5+ only if S5+ mode is support ed

RSMRST#_EC[36]

RSMRST_GATE# from EC

12

G1

R164

R164 0/J_4

0/J_4

FCH_TEST0

FCH_TEST1

FCH_TEST2

SMB_RUN_CLK SMB_RUN_DAT SYS_RST#

VGA_PD SCL1 SDA1 SCL2 SDA2 SCL3_LV SDA3_LV

ODD_PRSNT# EC_EXT_SCI# EC_EXT_SMI#

+3V_S5

R163 *22K/J_4R163 *22K/J_4

R165

R165 *20K/J_4

*20K/J_4

RSMRST_GATE#

5

APU_THERMTRIP#

USB_OC1# USB_OC0#

USB_OC2# USB_OC6#

PCIE_WAKE#

DNBSWON#

EC_A_15

C207

*2.2U/6.3V_6X

2

remove pull hi ( chip internal have pull hi )

VGA_PD for power control

3

Q21

Q21 *DISR@2N7002E

*DISR@2N7002E

1

RSMRST#

FCH_PCIE_PEG_CLKREQ#[15]

)RU%VWDJHIRU SDVVZRUG

APU_THERMTRIP#[4]

PCIE_CLKREQ_LAN#[32]

B_EC_08

SMB_RUN_CLK[12,13] SMB_RUN_DAT[12,13]

PCIE_CLKREQ_WLAN#[28]

LCD_BK_OFF[24]

USB_OC6#[31] AC_PRESENT[36]

ODD_MDDA#[ 29,36] ODD_PRSNT#[29] USB_OC2#[29]

USB_OC1#[31] USB_OC0#[31]

HD audio interface is +3V_S5 voltage

*SHORT_PAD

DNBSWON#[36] FCH_PWRGD[11]

EC_A20GATE[36] EC_KBRST#[36] EC_EXT_SCI#[36] EC_EXT_SMI#[36]

PCIE_WAKE#[28,32]

VGA_PD[10] SPI_HOLD#[9]

4

T124T124 T121T121

SLP_S3#[36] SLP_S5#[36]

12/15 add

BT_ON#[31] CCD_ON#[35]

SPKR[30]

G3

4

3

U15A

B_EC_01

GEVENT#7

KSO_0 KSO_1 KSO_2 KSO_3 KSO_4 KSO_5 KSO_6 KSO_7 KSO_8 KSO_9 KSO_10 KSO_11 KSO_12 KSO_13 KSO_14 KSO_15 KSO_16 KSO_17

U15A

AB6

PCIE_RST2#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

HUDSON-M2

Part 4 of 5

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVENT2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO 62

AG22

CLK_REQ1#/FANOUT4/GPIO 6 1

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

PS2M_DAT/GPIO191

C22

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/XDB0/GPIO223

B17

KSO_15/XDB1/GPIO224

A24

KSO_16/XDB2/GPIO225

D17

KSO_17/XDB3/GPIO226

Hudson-M3

Part 4 of 5

USBCLK/14M_25M_48M_OSC

USB_FSD1P/GPIO186

USB

MISC

USB

MISC

USB_FSD0P/GPIO185

USB

1.1

USB

1.1

ACPI / WAKE UP

EVENTS

ACPI / WAKE UP

EVENTS

USB

GPIO

USB

OC

USB

OC

HD

AUDIO

HD

AUDIO

EMBEDDED

EMBEDDED CTRL

CTRL

3

USB

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198

EC_PWM2/EC_TIMER2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER3/GPIO200

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

2.0

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

USBSS_CALRP USBSS_CALRN

USB_SS_TX3P USB_SS_TX3N

USB_SS_RX3P USB_SS_RX3N

USB_SS_TX2P USB_SS_TX2N

USB_SS_RX2P USB_SS_RX2N

USB_SS_TX1P

3.0

USB_SS_TX1N USB_SS_RX1P

USB_SS_RX1N USB_SS_TX0P

USB_SS_TX0N USB_SS_RX0P

USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

G8

USB_RCOMP_SB

B9 H1

H3 H6

Note: USB P/N pairs with trace lengths up to 10"

H5 H10

G10 K10

J12 G12

F12 K12

K13

USBP9+

B11

USBP9-

D11

USBP8+

E10

USBP8-

F10

USBP7+

C10

USBP7-

A10

USBP6+

H9

USBP6-

G9

USBP5+

A8

USBP5-

C8 F8

E8

USBP3+

C6

USBP3-

A6

USBP2+

C5

USBP2-

A5 C1

C3

USBP0+

E1

USBP0-

E3

USBSS_CALRP

C16

USBSS_CALRN

A16 A14

C14 C12

A12 D15

B15 E14

F14

USB3_TXP1

F15

USB3_TXN1

G15

USB3_RXP1

H13

USB3_RXN1

G13 J16

H16 J15

K15

SCL2

H19

SDA2

G19

SCL3_LV

G22

SDA3_LV

G21 E22 H22

EC_PWM2

J22 H21

No need for GPIO200

USB_BUS_SW2

K21

USB_BUS_SW3

K22 F22 F24 E24 B23 C24 F18

SLP_S3# SLP_S5#

T120T120

T78T78

T122T122

+3V

T77T77

T65T65

+3V_S5

R313

R313 *10K/J_4

*10K/J_4

KSO_5

12

R287 *0_4_s hortR287 *0_4_short

R545 *0_4_s hortR545 *0_4_short R176 10K/F_4R176 10K/F_4

RSMRST#

R468 *0_4_shortR468 *0_4_short

R169 *0_4_shortR169 *0_4_short

SMB_RUN_CLK SMB_RUN_DAT

R521 *0_4_shortR521 *0_4_short

R506 *0/J_4R506 *0/J_4

R533 *0_4_shortR533 *0_4_short R256 *0_4_shortR256 *0_4_short

R317 *0_4_shortR317 *0_4_short R258 *0_4_shortR258 *0_4_short R552 *0_4_shortR552 *0_4_short R528 *0_4_shortR528 *0_4_short

R237 *10K/F_4R237 *10K/F_4 R241 *10K/F_4R241 *10K/F_4

R240 *10K/F_4R240 *10K/F_4 R249 *10K/F_4R249 *10K/F_4 R252 *10K/F_4R252 *10K/F_4

Provided test points from checklist

T76T76 T80T80 T123T123

FCH_TEST1

T125T125 T127T127

T93T93 T84T84 T89T89 T91T91 T88T88

T128T128 T130T130 T133T133 T86T86 T131T131 T94T94 T90T90 T81T81 T92T92 T85T85 T87T87 T83T83

DNBSWON#

FCH_PWRGD FCH_TEST0 FCH_TEST2

SYS_RST#

FCH_THERMTRIP# WD_PWRGD

SCL1 SDA1

ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R ACZ_SYNC_R ACZ_RST#_R

2

R321 11.8K/F_6R321 11.8K/F_6

USBP9+ [31] USBP9- [31]

USBP8+ [31] USBP8- [31]

USBP7+ [27] USBP7- [27]

USBP6+ [31] USBP6- [31]

USBP5+ [31] USBP5- [31]

USBP3+ [28] USBP3- [28]

USBP2+ [35] USBP2- [35]

USBP0+ [29] USBP0- [29]

R315 USB3@1K/F_4R315 USB3@1K/F_4 R314 USB3@1K/F_4R314 USB3@1K/F_4

If USB 3.0 not implemented, left unconected

USB3_TXP1 [31] USB3_TXN1 [31]

USB3_RXP1 [31] USB3_RXN1 [31]

SMB_LV_CLK [4]

SMB_LV_DAT [4]

EC_PWM2 [11]

T82T82 T134T134

INTEL_BT_OFF# [28]

2

USB#1 Daughter Board

USB#2 Right

Card Reader

USB 3.0 x1

Blue Tooth

EC_A_10

WLAN

CCD

ESATA

+FCH_VDD_11_SSUSB_S

USB 3.0 x1

1

+3V[4,6,8,9,10,11,12,13,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +3VPCU[4,8,10,24,29,32,34, 35,36,38,39,40,41,43,46] +3V_S5[9,10,11,28,35,38]

+FCH_VDD_11_SSUSB_S[10]

Note: USB 3.0 1:1 MAP to USB2.0 PORT As Below:

SSUSB0+USB10 USB3.0 PORT 0

SSUSB1+USB11 USB3.0 PORT 1

SSUSB2+USB12 USB3.0 HEADER SSUSB3+USB13 EXPRESSCARD

ACZ_SDOUT_R

ACZ_SYNC_R

ACZ_BCLK_R

ACZ_RST#_R

ACZ_SDIN0

Size Document Number Rev

Size Document Nu mb e r Rev

Date: Sheet

To Azalia

R231 33/J_4R231 33/J_4

R212 33/J_4R212 33/J_4

R236 33/J_4R236 33/J_4

C307

R201 33/J_4R201 33/J_4

PROJECT : KL6B/C

Quanta Computer Inc.

Hudson-M3 GPIO/USB/AZ/RGMII

Thursday, April 28, 2011 7 49

1

*22P/50V_4N

07

ACZ_SDOUT [30]

ACZ_SYNC [30]

ACZ_BITCLK [30]

ACZ_RST# [30]

ACZ_SDIN0 [30]

of

1A

5

APU_PCIE_RST#[14,23]

APU_PCIE_RST# is for APU PCIE devices reset

D D

Note: CLK_FCH_SRCP/N is 100MHZ SSC ( Pop RP9 if use external CLK gen )

C C

Note: CLK_DP_NSSCP/N is 100MHZ non-SSC

Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC

Note: CLK_APU_HCLKP/N is 100MHZ SSC

Note: CLK_PCIE_VGAP/N is 100MHZ SSC

Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable

Note: For external CLK gen mode, depop RP10/RP11/RP12/RP13/RP14/RP15/RP16

B B

APU_PCIE_RST#

PLACE C181~C188 CLOSE TO U5

NOTE: The 0R serial resistor on FC H C LK pair

must share Pad with the serial resistor close to

EXT CLOCK GEN

For EMI

C726 15P/50V_4CC726 15P/50V_4C

A A

FCH_GPP DEVICE CLKREQ# GFX_CLK MXM3.0(via x16 slot)CLK_REQG# 0 EXPRESS 0 1 PE0 1 2 PE2 2 3 LAN 3 4 PE1 4 5 X1DT 5 6 NA NA 7 USB3.0 7 8 1394 8

CLK_48M_CARD

C273

150P/50V_4N

CLK_DP_NSSCP[4] CLK_DP_NSSCN[4]

CLK_PCIE_TRAVISP[23] CLK_PCIE_TRAVISN[23]

CLK_APU_HCLKP[4] CLK_APU_HCLKN[4]

CLK_PCIE_VGAP[14] CLK_PCIE_VGAN[14]

CLK_PCIE_WLANP[28] CLK_PCIE_WLANN[28]

CLK_PCIE_LANP[32] CLK_PCIE_LANN[32]

Card Reader

5

R205 33/J_4R205 33/J_4

PLTRST#[28,32]

UMI_R XP0[2] UMI_RXN0[2] UMI_R XP1[2] UMI_RXN1[2] UMI_R XP2[2] UMI_RXN2[2] UMI_R XP3[2] UMI_RXN3[2]

UMI_TXP0[2] UMI_TXN0[2] UMI_TXP1[2] UMI_TXN1[2] UMI_TXP2[2] UMI_TXN2[2] UMI_TXP3[2] UMI_TXN3[2]

+1.1V_ PCIE_VDD R

ALL CLOCK TEST POINT PLACE CLOSE TO DEVICE SIDE

CLK_48M_CARD[27]

C295 150P/50V_4NC295 150P/50V_4N

UMI_R XP1 UMI_RXN1 UMI_R XP2 UMI_RXN2 UMI_R XP3 UMI_RXN3

+1.1V_ CKVDD

RP12, PR18~RP23 need close to connect node

C387

27P/50V_4N

25MHZ_30Y325MHZ_30

C386

27P/50V_4N

EC_B_14

PCIE_RST#_R

R213 33/J_4R213 33/J_4 C290 0.1U/10V_4XC 290 0.1U/10V_4X

C283 0.1U/10V_4XC 283 0.1U/10V_4X C296 0.1U/10V_4XC 296 0.1U/10V_4X C289 0.1U/10V_4XC 289 0.1U/10V_4X C306 0.1U/10V_4XC 306 0.1U/10V_4X C301 0.1U/10V_4XC 301 0.1U/10V_4X C311 0.1U/10V_4XC 311 0.1U/10V_4X C305 0.1U/10V_4XC 305 0.1U/10V_4X

R206 590/F_4R206 590/F_4 R204 2K/F_4R204 2K/F_4

R306 2K/F_4R306 2K/F_4

TP24TP24 TP25TP25

RP8 0X2RP8 0X2

241

241 241

241

TP48TP48 TP47TP47

TP41TP41 TP49TP49

21

3

3 3

3

R557 22/J_4R557 22/J_4

R304

R304 1M/F_4

1M/F_4

RP4 UMA@0X2RP4 UMA@0X2

RP7 0X2RP7 0X2

RP3 DIS@0X2RP3 DIS@0X2

RP5 0X2RP5 0X2

RP6 0X2RP6 0X2

Y3

4

A_RST#

UMI_RXP0_CUMI_R XP0 UMI_RXN0_CUMI_RXN0 UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C

PCIE_CALRP_FCH PCIE_CALRN_FCH

INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN

INT_CLK_DP_NSSCP INT_CLK_DP_NSSCN

INT_CLK_PCIE_TRAVISP INT_CLK_PCIE_TRAVISN

INT_CLK_APU_HCLKP INT_CLK_APU_HCLKN

INT_CLK_PCIE_VGAP INT_CLK_PCIE_VGAN

INT_CLK_PCIE_WLANP INT_CLK_PCIE_WLANN

INT_CLK_PCIE_LANP INT_CLK_PCIE_LANN

CLK_PCIE_USB3P_R CLK_PCIE_USB3N_R

4

CLK_48M_CARD_R

TP29TP29

25M_X1

25M_X2

TP28TP28

AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32

AB33 AB31 AB28 AB29

AB26 AB27 AA24 AA23

AA27 AA26

AF29 AF31

U15E

AE2 AD5

Y33 Y31 Y28 Y29

V33

V31 W30 W32

W27

V27

V26 W26 W24 W23

F27

G30

G28

R26

T26

H33

H31

T24

T23

J30

K29

H27

H28

J27

K26

F33

F31

E33

E31

M23

M24

M27

M26

N25

N26

R23

R24

N27

R27

J26

C31

C33

Hudson-M3

PCIE_RST# A_RST#

UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N

UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N

PCIE_CALRP PCIE_CALRN

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N

CLK_CALRN

PCIE_RCLKP PCIE_RCLKN

DISP_CLKP DISP_CLKN

DISP2_CLKP DISP2_CLKN

APU_CLKP APU_CLKN

SLT_GFX_CLKP SLT_GFX_CLKN

GPP_CLK0P GPP_CLK0N

GPP_CLK1P GPP_CLK1N

GPP_CLK2P GPP_CLK2N

GPP_CLK3P GPP_CLK3N

GPP_CLK4P GPP_CLK4N

GPP_CLK5P GPP_CLK5N

GPP_CLK6P GPP_CLK6N

GPP_CLK7P GPP_CLK7N

GPP_CLK8P GPP_CLK8N

14M_25M_48M_OSC

25M_X1

25M_X2

HUDSON-M2

Part 1 of 5

PCI

CLKS

PCI

CLKS

PCI EXPRESS

INTERFACES

PCI EXPRESS

INTERFACES

REQ2#/CLK_REQ8# /G P IO41 REQ3#/CLK_REQ5# /G P IO42

GNT3#/CLK_REQ7#/GPIO46

CLOCK

GENERATOR

CLOCK

GENERATOR

LDRQ1#/CLK_REQ6# /G P IO49

S5

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27

PCI

INTERFACE

PCI

INTERFACE

AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

STOP# PERR# SERR# REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44

GNT2#/SD_LED/GPO45

CLKRUN#

LOCK#

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1

LPC

LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ/GPIO48

DMA_ACTIVE#

PROCHOT#

APU_PG

APU

LDT_STP#

APU_RST#

32K_X1 32K_X2

S5_CORE_EN

RTCCLK

INTRUDER_ALERT#

PLUS

VDDBT_RTC_G

3

PCI_CL K0

AF3

PCI_CL K1_R PCI_CL K1

AF1

PCI_CL K2

AF5

PCI_CL K3_R PCI_CL K3

AG2

PCI_CL K4_R PCI_CL K4

AF6 AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10

PAR

AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28 E26 G26 F26

G2 G4 H7

F1 F3 E6

T71T71 T72T72 T44T44 T57T57

T45T45 T38T38

T51T51 T43T43 T56T56 T55T55 T50T50 T70T70 T37T37 T69T69 T52T52 T58T58 T67T67 T39T39 T41T41 T60T60

PCI_AD 23 PCI_AD 24 PCI_AD 25 PCI_AD 26 PCI_AD 27

HUDSON_MEMHOT# _R

T113T113 T116T116 T63T63 T49T49 T40T40 T114T114 T46T46 T48T48 T68T68 T42T42 T115T115 T64T64 T54T54 T62T62 T73T73 T53T53 T47T47 T59T59 T117T117

T66T66 T61T61

INTE#

T110T110

INTF#

T109T109

INTG#

T119T119

INTH#

T111T111

LPC_CLK0_R LPC_CLK1_R LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# LDRQ#0 LDRQ#1 IRQ_SERIRQ

DMAACTIVE_L APU_PROCHOT#_VDDI O APU_PWRGD APU_STOP# APU_RST#

32K_X1 32K_X2 S5_CORE_EN

RTC_CLK INTRUDER_ALERT#

+3V_RTC

20MIL

3

R200 *0_4_shortR200 *0_4_short R183 *0_4_shortR183 *0_4_short

R189 22/J_4R189 22/J_4

BT_DIS [31]

DIS_BULE_LED [35] RF_ON [35]

R504 *0/J_4R504 *0/J_4

T112T112

+3V

R502

R502 DIS@10K/J_4

DIS@10K/J_4

PE_GPIO0

CLKRUN#

R310 DEBUG@22/J_4R310 DEBUG@22/J_4 R311 22/J_4R311 22/J_4

R309 22/J_4R309 22/J_4 R312 22/J_4R312 22/J_4

T126T126 T129T129

12

G2

G2 *SHORT_ PAD1

*SHORT_ PAD1

2

T75T75

PCI_CLK1 [11]

T74T74

PCI_CLK3 [11] PCI_CLK4 [11]

PCIE_RST#_TRAVIS [23]

PCI_AD23 [11] PCI_AD24 [11] PCI_AD25 [11] PCI_AD26 [11] PCI_AD27 [11]

dGPU_1. 8V_PG [46 ]

EC_A_03

dGPU_RST# [14] dGPU_PWREN [46]

CLKRUN# [36 ]

PCLK_DEBUG

test pad can trigger

RTC_CLK [11]

+3V_RTC

INTRUDER_ALERT# Left not connected

C732

(FCH has 50-kohm internal pull-up to

0.1U/10V_4X

VBAT).

PCLK_591

LPC_CLK0 [11] LPC_CLK1 [11] LPC_LAD0 [28, 36] LPC_LAD1 [28, 36] LPC_LAD2 [28, 36] LPC_LAD3 [28, 36] LPC_LFRAME# [28,36]

LPC_DRQ#0 [28]

T118T118

IRQ_SERIRQ [28,36]

DMAACTIVE_L [4]

APU_PROCHOT#_VDDIO [4]

APU_PWRGD [4,6] APU_RST# [4,6]

T132T132

2

LPC_CLK0 LPC_CLK1

S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation

RTC Circuitry(RTC)

+3V_RTC

20MIL

C511

C511 1U/10V_4X

1U/10V_4X

PCLK_DEBUG [28] PCLK_591 [36]

For EMI

PCLK_DEBUG PCLK_591

R425 510/F_6R425 510/F_6

C391 15P/50V_4CC391 15P/50V_4C C392 15P/50V_4CC392 15P/50V_4C

1

+3V[4,6,7,9,10,11,12,13,19, 23,24,25,26,27,28,29,30,31,32,33,35,36, 37,38,39,40,42,43,44,45,46]

+1.5V[4,6,9,23,25, 28,29,42]

+1.1V_ PCIE_VDD R[10]

+1.1V_ CKVDD[10]

20mils

D25

SDM10K45-7-F_100MA

R427 *0_6_s hortR427 *0_6_short

21

+3VRTC

20MIL

21

D26

SDM10K45-7-F_100MA

20MIL

R439

R439 1K/F_4

1K/F_4

20MIL

+BAT +VCCRTC_2

12

Change +1.5V_RUN to +1.5v

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

Size Document Number Rev

Size Document Nu mb e r Rev

Thursday, April 28, 2011 8 49

Date: Sheet

Thursday, April 28, 2011 8 49

Date: Sheet

Thursday, April 28, 2011 8 49

Date: Sheet

+1.5V

R559

R559 *20K/J_4

*20K/J_4

APU_STOP#

FOR CHIPSET AUTOMATION

R560

R560 *10K/F_4

*10K/F_4

32K_X1

EC_B_14

R298

Y2

20M/J_4

32.768KHZY232.768KHZ

32K_X2

PROJECT : KL6B/C

Quanta Computer Inc.

Hudson-M2 ACPI/PCI/CLOCK

4 1

1

08

+3VPCU

CN12

CN12 RTC_BAT(RTC SOCKET-2032)

RTC_BAT(RTC SOCKET-2032)

C365 15P/50V_4CC365 15P/50V_4C

23

C366 15P/50V_4CC366 15P/50V_4C

of

1A

5

PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3

SATA_TXP0[29] SATA_TXN0[29]

C240

0.1U/10V_4

+3V

2

R170

R170 *10K/F_4

*10K/F_4

13

SATA_RXN0[29] SATA_RXP0[29]

SATA_TXP1[29] SATA_TXN1[29]

SATA_RXN1[29] SATA_RXP1[29]

SATA_TXP3[29] SATA_TXN3[29]

SATA_RXN3[29] SATA_RXP3[29]

R198

R198 10K/F_4

10K/F_4

+3V

R179

R179 10K/F_4

10K/F_4

PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3

R199 1K /F _4R199 1K/F_4

+1.1V_AVDD_SATA

R190 1K /F _4R190 1K/F_4

LAN_DISABLE#[28]

ODD_PWR[29]

SATA_CALRP SATA_CALRN

SB_SATA_LED#

Integrated Clock Mode: Leave unconnected.

LAN_DISABLE# FCH_PROCHOT#_CFCH_PROCHOT#

BOARD_ID1 BOARD_ID2 BOARD_ID3 FCH_VGA_HPD

BOARD_ID4 BOARD_ID5 BOARD_ID6 TEMPIN3

R278 10K/J_4

10K/J_4

SATA HDD/SSD

D D

SATA PORTS DISTRIBUTION: 0, 2.5 INCH DISK DRIVER 1, SATA ODD 2, 2.5 INCH DISK DRIVER 3, eSATA 4-7, NOT USED

C C

SATA_ACT#[35]

B B

FCH_PROCHOT#[4]

A A

U12

U12 TC7SH08FU

TC7SH08FU

4

SATA ODD

ESATA#1

+3V

2 1

3 5

Q24

*MMBT3904-7-F_200MA

5

4

U15B

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

Hudson-M3

4

HUDSON-M2

SD

CARD

SD

CARD

SERIAL

ATA

SERIAL

ATA

SPI

VGA

HW

HW MONITOR

MONITOR

Part 2 of 5

SD_CLK/SCLK_0/GPIO73

SD_CMD/SLOAD_0/GPIO74

SD_CD#/GPIO75

SD_WP/GPIO76

SD_DATA0/SDATI_0/GPIO77

SD_DATA1/SDATO_0/GPIO78

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_MDCK

GBE_RXCLK

GBE_RXCTL/RXDV

GBE_RXERR

GBE

ROM

DAC

MAINLINK

GBE_TXCLK

LAN

GBE_TXCTL/TXEN

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_GREEN

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

VGA_DAC_RSET AUX_VGA_CH_P

AUX_VGA_CH_N

ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

ML_VGA_HPD/GPIO229

VIN0/GPIO175 VIN1/GPIO176

VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

GBE_COL

GBE_CRS GBE_MDIO GBE_RXD3

GBE_RXD2 GBE_RXD1 GBE_RXD0

GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0

VGA_RED

VGA_BLUE

AUXCAL

3

WINBOND(4M): AKE391P0N00

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

GBE_COL GBE_CRS

GBE_MDIO

FCH_SPI_SI FCH_SPI_SO FCH_SPI_CLK FCH_SPI_CS0# FCH_SPI_WP

FCH_CRT_RED

FCH_CRT_GRE

FCH_CRT_BLU

INT_DDCDAT INT_DDCCLK

VIN0 VIN1 VIN2

VIN_VDDIO VIN_VDDR VIN7

R223 10K/J_4R223 10K/J_4 R224 10K/J_4R224 10K/J_4

R515 10K/J_4R515 10K/J_4

R217 10K/J_4R217 10K/J_4

R516 10K/J_4R516 10K/J_4

T79T79

R263 *0_4_shortR263 *0_4_short R254 *0_4_shortR254 *0_4_short R247 *0_4_shortR247 *0_4_short

R544 715/F_4R544 715/F_4

R523 100/F_4R523 100/F_4

R267 10K/J_4R267 10K/J_4 R277 10K/J_4R277 10K/J_4 R283 10K/J_4R283 10K/J_4

R268 10K/J_4R268 10K/J_4

BOARD ID SETTING

UMA SKU

VGA SKU

Reserve

+3V_S5

+FCH_VDDAN _11_MLDAC

,' ,'%RDUG,' ,'

H

L

AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8

GBE_RXERR

AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7

GBE_PHY_INTR

W9

V6 V5 V3 T6 V1

L30 L32 M29

M28 N30

M33 N32

K31 V28

V29 U28 T31

T33 T29 T28 R32 R30 P29 P28

C29 N2

M3 L2 N4 P1 P3 M1 M5

AG16

NC1

AH10

NC2

A28

NC3

G27

NC4

L4

NC5

Reserve

3

MAX(4M): AKE39FP0Z02

Socket: DFHS08FS023

FCH_SPI_CS0#

R594 33/J_4R594 33/J _4

FCH_SPI_SO FCH_SPI1_SO_R

R593 33/J_4R593 33/J _4 R592 33/J_4R592 33/J _4

EC_A_03

R251 3.3K/J_4R251 3.3K/J_4

+3V_S5

FCH_SPI_SI [36] FCH_SPI_SO [36] FCH_SPI_CLK [36] FCH_SPI_CS0# [36]

INT_CRT_RED [26]

INT_CRT_GRE [26]

INT_CRT_BLU [26]

INT_CRT_HSYNC [26]

INT_CRT_VSYNC [26]

INT_DDCDAT [26]

INT_DDCCLK [26]

APU_DP_AUXP [4]

APU_DP_AUXN [4]

APU_DP_TXP0 [4] APU_DP_TXN0 [4] APU_DP_TXP1 [4] APU_DP_TXN1 [4] APU_DP_TXP2 [4] APU_DP_TXN2 [4] APU_DP_TXP3 [4] APU_DP_TXN3 [4]

H

L

B_EC_06

+3V

R307

R307 *10K/F_4

*10K/F_4

FCH_VGA_HPD

,'

,'

,'

H

L

H

L

H

L

R place close to PCH

FCH_CRT_RED

FCH_CRT_GRE

FCH_CRT_BLU

H

L

2

FCH_SPI1_CLK_RFCH_SPI_CLK FCH_SPI1_SI_RFCH_SPI_SI

C742

C742 *22P/50V_4N

*22P/50V_4N

FCH_SPI_WP

R264 UMA@150/F_4R264 UMA@150/F_4 R255 UMA@150/F_4R255 UMA@150/F_4 R248 UMA@150/F_4R248 UMA@150/F_4

Change +1.5 V_ RUN to +1.5v

VGA_HPD_Q[4]

2

U17

1

CE#

6

SCK

5

SI

2

SO

3

WP#

SPI Flash Socket

+1.5V

Q48

2N7002K_300MA

3

1

+3V

HOLD#

R561

R561 10K/J_4

10K/J_4

VDD

VSS

2

+3V_S5

8

7 4

+5V

3

Q49

1

2N7002K_300MA

R173 *10K/J_4R173 *10K/J_4R278 R171 *10K/J_4R171 *10K/J_4 R172 *10K/J_4R172 *10K/J_4 R280 *10K/J_4R280 *10K/J_4 R292 *10K/J_4R292 *10K/J_4 R286 *10K/J_4R286 *10K/J_4

B_EC_03

R591

R591 10K/J_4

10K/J_4 R469 *0/J_4R469 *0/J _4

C739

B_EC_04

0.1U/10V_4X

INT_DDCDAT INT_DDCCLK

LAN_DISABLE#

R178 10K/J_4R178 10K/J_4

R266

R266 1K/F_4

1K/F_4

VIN_VDDIO VIN_VDDR

R265

R265 1K/F_4

1K/F_4

R566

R566 10K/J_4

10K/J_4

CRT Hot-plug

2

R567

R567 100K/J_4

100K/J_4

BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5 BOARD_ID6

Size D ocument Number Rev

Size Document Number Rev

Date: Sheet

1

09

+3V[4,6,7,8,10,11,12,13,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +3V_S5[7,10,11,28,35,38] +5V[19,23,25,26,29,30,33,34,35,36,37,38,39,44]

+1.2V_VDDPR[2,4,5,23,38,43]

+1.5V_SUS[3,4,5,6,10,12,13,37,38,40,42]

SPI_HOLD# [7]

R270 UMA@4.7K/J_4R270 UMA@4.7K/J _4 R269 UMA@4.7K/J_4R269 UMA@4.7K/J _4

C328

0.1U/10V_4X

R182 *10K/J_4R182 *10K/J_4 R180 *10K/J_4R180 *10K/J_4 R181 *10K/J_4R181 *10K/J_4 R284 *10K/J_4R284 *10K/J_4 R291 *10K/J_4R291 *10K/J_4 R290 *10K/J_4R290 *10K/J_4

PROJECT : KL6B/C

Quanta Computer Inc.

Thursday, April 28, 2011 9 49

+1.1V_AVDD_SATA[10]

+5V

+3V_S5

12/15 add

+1.2V_VDDPR+1.5V_SUS

R276

R276 1K/F_4

1K/F_4

R275

C340

1K/F_4

0.1U/10V_4X

Hudson-M2 SATA/HWM/SPI

1

of

1A

5

+3.3V_FCH_R

R168 0/J_8R168 0/J_8

+3V

L24

+3V

D D

PBY160808T-221Y-N(220,2A)

L53

+3V

PBY160808T-221Y-N(220,2A)

+FCH_VDDAN_11_MLDAC

+3V_S5 +FCH_VDDPL_33_SSUSB_S

L55

PBY160808T-221Y-N(220,2A)

C C

+3V_AVDD_USB

L41

PBY160808T-221Y-N(220,2A)

B B

+1.1V_DUAL

L56

*PBY160808T-221Y-N(220,2A)

C681

C681 1U/10V_4X

1U/10V_4X

TRACE WIDTH >=15mil

C253

2.2U/6.3V_4X

TRACE WIDTH >=15mil

C672

2.2U/6.3V_4X

L43

PBY160808T-221Y-N(220,2A)

C384

2.2U/6.3V_6X

+FCH_VDDPL_33_SUSB_S

C388

2.2U/6.3V_6X

L42

+3V_S5

PBY160808T-221Y-N(220,2A)

+FCH_VDD_11_SSUSB_S

C722

C705

*1U/10V_4X

*0.1U/10V_4X

C675

C684

1U/10V_4X

C258

C258 *0.1U/10V_4X

*0.1U/10V_4X

C673

C673 *0.1U/10V_4X

*0.1U/10V_4X

R327 0/J_8R327 0/J_8 R326 0/J_8R326 0/J_8

C725

0.1U/10V_4X

C379

C379 1U/10V_4X

1U/10V_4X

EMI

L35

+1.1V_DUAL

PBY160808T-221Y-N(220,2A)

L37

+1.1V_DUAL

PBY160808T-221Y-N(220,2A)

R335 *0/J _8R335 *0/J _8

R339 *0/J _8R339 *0/J _8

C710

C710 0/J_4

0/J_4

C719

0.1U/10V_4X

VDDQ--3.3V I/O power

C667

C237

1U/10V_4X

22U/6.3V_8X

+VDDPL_3.3V

+FCH_VDDPL_33_MLDAC +FCH_VDDAN_33_DAC_R

+FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S

+FCH_VDDAN_11_DAC +FCH_VDDAN_11_ML

C699

2.2U/6.3V_4

R338 0/J_8R338 0/J_8

+FCH_VDDAN_33_DAC_R

C398

C382

10U/6.3V_8X

22U/6.3V_8X

+FCH_VDDAN_11_USB_S

C700

0.1U/10V_4X

C714

C404

*1U/10V_4X

*10U/6.3V_8X

C683

0.1U/10V_4X

R329 0/J_8R329 0/J_8 R328 0/J_8R328 0/J_8

+1.5V_SUS

C691

C691 1U/10V_4X

1U/10V_4X

TRACE WIDTH >=50mil

C390

C390 10U/6.3V_8X

10U/6.3V_8X

C694 0.1U/10V_4XC694 0.1U/10V_4X

+FCH_VDDCR_11_USB_S

C704

C704 *0.1U/10V_4X

*0.1U/10V_4X

+FCH_VDDAN_11_SSUSB_S_R

+FCH_VDDCR_11_SSUSB_S

102mA

C674

C682

0.1U/10V_4X

+VDDPL_33_DAC +VDDPL_33_ML

+FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA

R542 *0/J _4R542 *0/J_4

C717 *2.2U/6.3V_4XC717 *2.2U/6.3V_4X

C689

4.7U/6.3V_6X

+FCH_VDDPL_33_MLDAC

C403

2.2U/6.3V_6X

+3V_AVDD_USB

C713

C713 1U/10V_4X

1U/10V_4X

TRACE WIDTH >=20mil

2.2U/6.3V_6XC319 2.2U/6.3V_6XC319

TRACE WIDTH >=15mil

C326

C326 10U/6.3V_8X

10U/6.3V_8X

C718

C716

*0.1U/10V_4X

*1U/10V_4X

C693

0.1U/10V_4X

C399

0.1U/10V_4X

470mA

C729

C729 1U/10V_4X

1U/10V_4X

140mA

42mA

282mA

424mA

47mA 20mA 12mA 200mA 11mA 14mA 11mA 12mA

7mA

226mA

C708

C708 0/J_4

0/J_4

C7490,C7447 0.1uF to Oohm for M2 FCH

R250 0/J_8R250 0/J_8

+VDDIO_AZ

C312

2.2U/6.3V_6X

5

L54

PBY160808T-221Y-N(220,2A)

C313

C313 1U/10V_4X

1U/10V_4X

+3V_S5

A A

Checklist request one 1uF capacitor

+VDDPL_1.1V+1.1V_DUAL

C724

C383

2.2U/6.3V_6X

0.1U/10V_4X

4

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

U15C

HUDSON-M2

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

H24

VDDPL_33_SYS

V22

VDDPL_33_DAC

U22

VDDPL_33_ML

T22

VDDAN_33_DAC

L18

VDDPL_33_SSUSB_S

D7

VDDPL_33_USB_S

AH29

VDDPL_33_PCIE

AG28

VDDPL_33_SATA

M31

LDO_CAP

V21

VDDPL_11_DAC

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

G7

VDDAN_33_USB_S_1

H8

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

Hudson-M3

L39

PBY160808T-221Y-N(220,2A)

4

+VDDAN_3.3V_HWM+3V_S5

PCI/GPIO I/O

CLKGEN

PCI

EXPRESS

PCI

EXPRESS

MAIN

LINK

MAIN

LINK

GBE

LAN

GBE

LAN

SERIAL

ATA

SERIAL

ATA

POWER

C354

2.2U/6.3V_6X

Part 3 of 5

CORE

S0

CORE

S0

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7

I/O

VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDAN_11_SATA_10

3.3V_S5 I/O

USB

VDDPL_11_SYS_S

VDDAN_33_HWM_S

USB

SS

USB

SS

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

C723

0.1U/10V_4X

1007mA

T14 T17 T20 U16 U18 V14 V17 V20 Y17

340mA

H26 J25 K24 L22 M22 N21 N22 P22

1088mA

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27

1337mA

AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

S5_3.3--3.3v standby power

59mA

N18 L19 M18 V12 V13 Y12 Y13 W11

5mA

G24

113mA

N20

TRACE WIDTH >=15mil

M20 J24

+VDDPL_1.1V

70mA

12mA

M8

+VDDAN_3.3V_HWM

26mA

AA4

+VDDIO_AZ

Trace width >=20 mil

L58

PBY160808T-221Y-N(220,2A)

TRACE WIDTH >=100mil

C698

C702

0.1U/10V_4X

TRACE WIDTH >=30mil

C706

C711

1U/10V_4X

TRACE WIDTH >=100mil

C679

C252

0.1U/10V_4X

TRACE WIDTH >=50mil

C676

C686

1U/10V_4X

TRACE WIDTH >=20mil

C321

C690

2.2U/6.3V_6X

*0.1U/10V_4X

+VDDXL_3.3V

+VDDCR_1.1V

+VDDPL_3.3V+3V

C397

2.2U/6.3V_6X

3

VDD-- S/B CORE power

+1.1V_VCC_FCH_R

C695

C701

1U/10V_4X

+1.1V_CKVDD

C720

C712

0.1U/10V_4X

+1.1V_PCIE_VDDR

C677

C677 1U/10V_4X

1U/10V_4X

C678

0.1U/10V_4X

+VDDIO_33_S

C322

2.2U/6.3V_6X

S5_1.1V--1.1V standby power

C709

C709 1U/10V_4X

1U/10V_4X

C727

0.1U/10V_4X

C663

C663 1U/10V_4X

1U/10V_4X

+1.1V_AVDD_SATA

C680

0.1U/10V_4X

C688

C688 1U/10V_4X

1U/10V_4X

R585 0/J_6R585 0/J_6

C715

C721

1U/10V_4X

2.2U/6.3V_4

3

PCIE_VDDR--PCIE I/O power

C400

C400 10U/6.3V_8X

10U/6.3V_8X

CKVDD_1.1V-Internal clock Generator I/O power

C405

C405 22U/6.3V_8X

22U/6.3V_8X

C251

C251 22U/6.3V_8X

22U/6.3V_8X

C741

C741 1U/10V_4X

1U/10V_4X

C740

C740 1U/10V_4X

1U/10V_4X

C659

C659 1U/10V_4X

1U/10V_4X

C737

2.2U/6.3V_4

AVDD_SATA--SATA phy power

C254

C241

1U/10V_4X

22U/6.3V_8X

C696

C696 1U/10V_4X

1U/10V_4X

VGA_PD is generated from FCH

+1.1V_DUAL

VGA_PD[7]

C697

C697 1U/10V_4X

1U/10V_4X

C687

C687 1U/10V_4X

1U/10V_4X

C731

C731 *0.1U/10V_4X

*0.1U/10V_4X

VGA_PD

R358

2.2K/J_4

R342 0/J_8R342 0/J_8

C738

2.2U/6.3V_4

L59

BLM18PG181SN1D(180,1.5A)_6

L28

BLM18PG181SN1D(180,1.5A)_6

L18

BLM18PG181SN1D(180,1.5A)_6

S5 plus mode

R519 *0/J_6R519 *0/J_6

R522 0/J_6R522 0/J_6

L57

L57 PBY160808T-221Y-N(220,2A)

C429

C429 1U/10V_4X

1U/10V_4X

PBY160808T-221Y-N(220,2A)

C734

C734 1U/10V_4X

1U/10V_4X

VIN

2

C396

2.2U/6.3V_6X

+1.1V

+3VPCU

+3V_S5

R343

R343 1M/J_4

1M/J_4

R344 100K/F_4R344 100K/F_4

3

Q33

Q33 DISR@2N7002E

DISR@2N7002E

1

2

+3V_S5

2

C423

C423 *1U/10V_4X

*1U/10V_4X

2

+FCH_VDDAN_11_MLDAC

2

3

Q32

Q32 DIS@AO3404

DIS@AO3404

1

+1.1V

3

Q29

Q29 DIS@AO3404

DIS@AO3404

1

233 mA Max

U15D

A3

VSS_1

A33

VSS_2

B7

VSS_3

B13

VSS_4

D9

VSS_5

D13

VSS_6

E5

VSS_7

E12

VSS_8

E16

VSS_9

E29

VSS_10

F7

VSS_11

F9

VSS_12

F11

VSS_13

F13

VSS_14

F16

VSS_15

F17

VSS_16

F19

VSS_17

F23

VSS_18

F25

VSS_19

F29

VSS_20

G6

VSS_21

G16

VSS_22

G32

VSS_23

H12

VSS_24

H15

VSS_25

H29

VSS_26

J6

VSS_27

J9

VSS_28

J10

VSS_29

J13

VSS_30

J28

VSS_31

J32

VSS_32

K7

VSS_33

K16

VSS_34

K27

VSS_35

K28

VSS_36

L6

VSS_37

L12

VSS_38

L13

VSS_39

L15

VSS_40

L16

VSS_41

L21

VSS_42

M13

VSS_43

M16

VSS_44

M21

VSS_45

M25

VSS_46

N6

VSS_47

N11

VSS_48

N13

VSS_49

N23

VSS_50

N24

VSS_51

P12

VSS_52

P18

VSS_53

P20

VSS_54

P21

VSS_55

P31

VSS_56

P33

VSS_57

R4

VSS_58

R11

VSS_59

R25

VSS_60

R28

VSS_61

T11

VSS_62

T16

VSS_63

T18

VSS_64

N8

VSSAN_HWM

K25

VSSXL

H25

VSSPL_SYS

Hudson-M3

*PB160808T-221Y-N(220,2A)

+FCH_VDDAN_33_DAC

PBY160808T-221Y-N(220,2A)

HUDSON-M2

Part 5 of 5

GROUND

L44

L45

VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128

VSSPL_DAC

VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

1

+3V[4,6,7,8,9,11,12,13,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +1.1V[42] +3VPCU[4,8,24,29,32,34,35,36,38,39,40,41,43,46]

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

+3V_S5[7,9,11,28,35,38] +1.1V_DUAL[38,42] VIN[24,37,39,40,41,42,43,44,45]

+FCH_VDDAN_33_DAC_R+3V

10

32 mA Max

C407

C409

2.2U/6.3V_6X

0.1U/10V_4X

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Num ber Rev

Date: Sheet

Hudson-M2 POWER/GND

Thursday, April 28, 2011 10 49

1

of

1A

5

OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.

+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5

STRAPS PINS

R185

R186

R186 10K/J_4

ALLOW PCIE Gen2

DEFAULT

FORCE PCIE Gen1

10K/J_4

R187

R187 *10K/J_4

*10K/J_4

--------

D D

--------

PCI_CL K1 PCI_CL K3 PCI_CL K4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK

PCI_CL K1[8] PCI_CL K3[8] PCI_CL K4[8] LPC_CLK0[8] LPC_CLK1[8] EC_PWM2[7] RTC_CLK[8]

C C

REQUIRED STRAPS

PULL HIGH

PULL LOW

R185

R184

*10K/J_4

R174

R193

10K/J_4

PCI_CLK3 PCI_CLK4

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

R331

R331 *10K/J_4

*10K/J_4

EC_A_04

R334

R334 10K/J_4

10K/J_4

non_Fusion CLOCK MODE

FUSION CLOCK MODE

DEFAULT

4

R333

R333 10K/J_4

10K/J_4

R332

R332 *10K/J_4

*10K/J_4

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

R572

R572 *10K/J_4

*10K/J_4

R573

2.2K/J_4

LPC_CLK1

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLED

R324

R324 10K/J_4

10K/J_4

R316

R316 *2.2K/J_4

*2.2K/J_4

EC_PWM2

LPC ROM

SPI ROM

DEFAULT

RTC_CLKPCI_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

3

VR_PW RGD[44]

EC_PWROK[36]

+1.2V_ PWRPG[43]

2

BAT54A

D19

1

D18 *BAS316D18 *BAS316

1

+3V[4,6,7,8,9,10,12,13,19, 23,24,25,26,27,28,29,30,31,32,33,35,36, 37,38,39,40,42,43,44,45,46] +3V_S5[7,9,10,28,35,38]

+3V+3V

R345

R345 10K/J_4

10K/J_4

3

C410

*2.2U/6.3V_6X

U19

2 4

3 5

R352

0/J_4

C408

0.1U/10V_4X

R353 *0/J_4R353 *0/J_4

*74AUP1G17GW

FCH_PWRGD [7]

11

DEBUG STRAPS

FCH HAS 15K INTERNAL P U FOR PCI_AD[27:23]

B B

PCI_AD 27[8] PCI_AD 26[8] PCI_AD 25[8] PCI_AD 24[8] PCI_AD 23[8]

PCI_AD 27 PCI_AD 26 PCI_AD 25 PCI_AD 24 PCI_AD 23

R512

R512 *2.2K/J_4

*2.2K/J_4

R503

R503 *2.2K/J_4

*2.2K/J_4

R511

R511 *2.2K/J_4

*2.2K/J_4

R510

R510 *2.2K/J_4

*2.2K/J_4

R507

R507 *2.2K/J_4

*2.2K/J_4

FCH PWRGD CKT

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

PCI_AD25 PCI_AD24

USE FC

USE DEFAULT

PLL

PCIE STRAPS

DEFAULT

USE EEPROM

BYPASS FC

PCIE STRAPS

PLL

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

4

3

2

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Size Document Nu mb e r Rev

Date: Sheet

Hudson-M2 STRAP/PWRGD

Thursday, April 28, 2011 11 49

1

of

1A

PCI_AD27 PCI_AD26

A A

5

PULL HIGH

PULL LOW

USE PCI PLL

DEFAULT

BYPASS PCI PLL

5

DDR_STD(DDR)

M_A_A[15:0][3]

D D

M_A_BS#0[3] M_A_BS#1[3] M_A_BS#2[3] M_A_CS#0[3] M_A_CS#1[3] M_A_CLKP0[3] M_A_CLKN0[3] M_A_CLKP1[3] M_A_CLKN1[3] M_A_CKE0[3] M_A_CKE1[3] M_A_CAS#[3] M_A_RAS#[3]

R380 10K/J_4R380 10K/J_4 R379 10K/J_4R379 10K/J_4

C C

M_A_WE#[3]

SMB_RUN_CLK[7,13] SMB_RUN_DAT[7,13]

M_A_ODT0[3] M_A_ODT1[3]

M_A_DM0[3] M_A_DM1[3] M_A_DM2[3] M_A_DM3[3] M_A_DM4[3] M_A_DM5[3] M_A_DM6[3] M_A_DM7[3]

M_A_DQSP[7:0][3]

M_A_DQSN[7:0][3]

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=8_STD_MLX

JDIM1A

PC2100 DDR3 SDRAM SO-DIMM

4

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

3

M_A_DQ0

5

M_A_DQ1

7

M_A_DQ2

15

M_A_DQ3

17

M_A_DQ4

4

M_A_DQ5

6

M_A_DQ6

16

M_A_DQ7

18

M_A_DQ8

21

M_A_DQ9

23

M_A_DQ10

33

M_A_DQ11

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ14

34

M_A_DQ15

36

M_A_DQ16

39

M_A_DQ17

41

M_A_DQ18

51

M_A_DQ19

53

M_A_DQ20

40

M_A_DQ21

42

M_A_DQ22

50

M_A_DQ23

52

M_A_DQ24

57

M_A_DQ25

59

M_A_DQ26

67

M_A_DQ27

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ30

68

M_A_DQ31

70

M_A_DQ32

129

M_A_DQ33

131

M_A_DQ34

141

M_A_DQ35

143

M_A_DQ36

130

M_A_DQ37

132

M_A_DQ38

140

M_A_DQ39

142

M_A_DQ40

147

M_A_DQ41

149

M_A_DQ42

157

M_A_DQ43

159

M_A_DQ44

146

M_A_DQ45

148

M_A_DQ46

158

M_A_DQ47

160

M_A_DQ48

163

M_A_DQ49

165

M_A_DQ50

175

M_A_DQ51

177

M_A_DQ52

164

M_A_DQ53

166

M_A_DQ54

174

M_A_DQ55

176

M_A_DQ56

181

M_A_DQ57

183

M_A_DQ58

191

M_A_DQ59

193

M_A_DQ60

180

M_A_DQ61

182

M_A_DQ62

192

M_A_DQ63

194

M_A_DQ[0..63] [3]

+0.75V_VREF_DQ

R394 *0_6_shortR394 *0_6_short

+1.5V_SUS

R393

R393 1K/F_4

1K/F_4

R396

R396 1K/F_4

1K/F_4

+0.75V_VREF_DQ +0.75V_VREF_CA

C474

C474 470P/50V_4X

470P/50V_4X

M_A_EVENT#[3]

M_A_RST#[3]

2

2.48A

+3V

+3V[4,6,7,8,9,10,11,13,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +1.5V_SUS[3,4,5,6,9,10,13,37,38,40,42]

+0.75V_DDR_VTT[13,38,40]

+1.5V_SUS

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8_STD_MLX

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

1

12

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

B B

+0.75V_VREF_CA +1.5V_SUS

R419

Place these Caps near So-Dimm0.

+1.5V_SUS

C454

C452

10U/6.3V_6X

C456

C456 10U/6.3V_6X

10U/6.3V_6X

A A

+3V

C443

2.2U/6.3V_6X

10U/6.3V_6X

C437

C437 10U/6.3V_6X

10U/6.3V_6X

C434

0.1u/10V_4X

5

C451

C451 10U/6.3V_6X

10U/6.3V_6X

C439

C439 10U/6.3V_6X

10U/6.3V_6X

+0.75V_DDR_VTT

C433

C433 1U/6.3V_4X

1U/6.3V_4X

C436

C436 *10U/6.3V_6X

*10U/6.3V_6X

C441

C441 1U/10V_4X

1U/10V_4X

C440

C440 1U/10V_4X

1U/10V_4X

C442

C442 1U/6.3V_4X

1U/6.3V_4X

C453

C453 1U/10V_4X

1U/10V_4X

C460

C460 1U/6.3V_4X

1U/6.3V_4X

C455

C455 1U/10V_4X

1U/10V_4X

+

C431

C431 *330U/2V_7343P_E6b

*330U/2V_7343P_E6b

C450

C444

1U/6.3V_4X

10U/6.3V_6X

4

C435

C435 10U/6.3V_8X

10U/6.3V_8X

C463

*10U/6.3V_6X

C438

C438 10U/6.3V_8X

10U/6.3V_8X

+0.75V_VREF_CA

C458

0.1u/10V_4X

+0.75V_VREF_DQ

C447

0.1U/10V_4X

C457

C457 1000P/50V_4X

1000P/50V_4X

C446

C446 1000P/50V_4X

1000P/50V_4X

3

SMDDR_VREF[40]

R366 *0/J_4R366 *0/J_4

R416 0/J_6R416 0/J_6

2

R419 1K/F_4

1K/F_4

C498

R420

470P/50V_4X

1K/F_4

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Date: Sheet

DDRIII SO-DIMM-0

Thursday, April 28, 2011 12 49

1

of

1A

5

DDR_RVS(DDR)

M_B_A[15:0][3]

D D

M_B_BS#0[3] M_B_BS#1[3] M_B_BS#2[3] M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP0[3] M_B_CLKN0[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CKE0[3] M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3]

R410 10K/J_4R410 10K/J_4

+3V

R411 10K/J_4R411 10K/J_4

C C

M_B_WE#[3]

SMB_RUN_CLK[7,12] SMB_RUN_DAT[7,12]

M_B_ODT0[3] M_B_ODT1[3]

M_B_DM0[3] M_B_DM1[3] M_B_DM2[3] M_B_DM3[3] M_B_DM4[3] M_B_DM5[3] M_B_DM6[3] M_B_DM7[3]

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM0_H=4_STD_LTS

JDIM2A

PC2100 DDR3 SDRAM SO-DIMM

4

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

3

M_B_DQ0

5

M_B_DQ1

7

M_B_DQ2

15

M_B_DQ3

17

M_B_DQ4

4

M_B_DQ5

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ8

21

M_B_DQ9

23

M_B_DQ10

33

M_B_DQ11

35

M_B_DQ12

22

M_B_DQ13

24

M_B_DQ14

34

M_B_DQ15

36

M_B_DQ16

39

M_B_DQ17

41

M_B_DQ18

51

M_B_DQ19

53

M_B_DQ20

40

M_B_DQ21

42

M_B_DQ22

50

M_B_DQ23

52

M_B_DQ24

57

M_B_DQ25

59

M_B_DQ26

67

M_B_DQ27

69

M_B_DQ28

56

M_B_DQ29

58

M_B_DQ30

68

M_B_DQ31

70

M_B_DQ32

129

M_B_DQ33

131

M_B_DQ34

141

M_B_DQ35

143

M_B_DQ36

130

M_B_DQ37

132

M_B_DQ38

140

M_B_DQ39

142

M_B_DQ40

147

M_B_DQ41

149

M_B_DQ42

157

M_B_DQ43

159

M_B_DQ44

146

M_B_DQ45

148

M_B_DQ46

158

M_B_DQ47

160

M_B_DQ48

163

M_B_DQ49

165

M_B_DQ50

175

M_B_DQ51

177

M_B_DQ52

164

M_B_DQ53

166

M_B_DQ54

174

M_B_DQ55

176

M_B_DQ56

181

M_B_DQ57

183

M_B_DQ58

191

M_B_DQ59

193

M_B_DQ60

180

M_B_DQ61

182

M_B_DQ62

192

M_B_DQ63

194

M_B_DQ[0..63] [3]

M_B_EVENT#[3]

M_B_RST#[3]

+0.75V_VREF_DQ +0.75V_VREF_CA

2.48A

+3V

2

+1.5V_SUS

+3V[4,6,7,8,9,10,11,12,19,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38,39,40,42,43,44,45,46] +1.5V_SUS[3,4,5,6,9,10,12,37,38,40,42]

+0.75V_DDR_VTT[12,38,40]

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

JDIM2B

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

DDR3-DIMM0_H=4_STD_LTS

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

1

13

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

B B

+1.5V_SUS

C469

C469 10U/6.3V_6X

10U/6.3V_6X

A A

Place these Caps near So-Dimm1.

C492

C493

10U/6.3V_6X

C473

C473 10U/6.3V_6X

10U/6.3V_6X

C493 10U/6.3V_6X

10U/6.3V_6X

C471

C471 *10U/6.3V_6X

*10U/6.3V_6X

+0.75V_DDR_VTT

C476

C476 1U/6.3V_4X

1U/6.3V_4X

+3V

C479

2.2U/6.3V_6X

C491

C491 10U/6.3V_6X

10U/6.3V_6X

C494

C494 10U/6.3V_6X

10U/6.3V_6X

5

C467

0.1u/10V_4X

C470

C470 1U/10V_4X

1U/10V_4X

C466

C466 1U/6.3V_4X

1U/6.3V_4X

C489

C489 1U/10V_4X

1U/10V_4X

C472

C472 1U/10V_4X

1U/10V_4X

C490

C490 1U/10V_4X

1U/10V_4X

C487

C487 1U/6.3V_4X

1U/6.3V_4X

C468

C468 10U/6.3V_8X

10U/6.3V_8X

C496

C496 1U/6.3V_4X

1U/6.3V_4X

4

C488

C488 10U/6.3V_8X

10U/6.3V_8X

C480

10U/6.3V_6X

C497

*10U/6.3V_6X

+0.75V_VREF_CA

C486

0.1u/10V_4X

+0.75V_VREF_DQ

C465

0.1U/10V_4X

3

C495

C495 1000P/50V_4X

1000P/50V_4X

C475

C475 1000P/50V_4X

1000P/50V_4X

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

2

Date: Sheet

Quanta Computer Inc.

DDRIII SO-DIMM-1

Thursday, April 28, 2011 13 49

1

of

1A

5

5GT/s bit rate

PEG_TXP8[2]

PEG_TXN8[2]

PEG_TXP9[2]

D D

C C

B B

CLK_PCIE_VGAP[8] CLK_PCIE_VGAN[8]

For M97 only Madison and Park the PWRGOOD ball is for test purposes and must be conneccted to ground

PEG_TXN9[2]

PEG_TXP10[2]

PEG_TXN10[2]

PEG_TXP11[2]

PEG_TXN11[2]

PEG_TXP12[2]

PEG_TXN12[2]

PEG_TXP13[2]

PEG_TXN13[2]

PEG_TXP14[2]

PEG_TXN14[2]

PEG_TXP15[2]

PEG_TXN15[2]

CLK_PCIE_VGAP CLK_PCIE_VGAN

R476 DIS@10K_4R476 DIS@10K_4

GPU_RST#

4

AA38

W36

W38

V37

V35 U36

U38

R36

R38 P37

P35 N36

N38

M37

M35

H35 G36

G38

E37

AB35 AA36

AJ21

AK21

AH16

AA30

Y37

Y35

T37

T35

L36

L38 K37

K35 J36

J38 H37

F37

F35

U30A

PCIE_RX0P PCIE_RX0N

PCIE_RX1P PCIE_RX1N

PCIE_RX2P PCIE_RX2N

PCIE_RX3P PCIE_RX3N

PCIE_RX4P PCIE_RX4N

PCIE_RX5P PCIE_RX5N

PCIE_RX6P PCIE_RX6N

PCIE_RX7P PCIE_RX7N

PCIE_RX8P PCIE_RX8N

PCIE_RX9P PCIE_RX9N

PCIE_RX10P PCIE_RX10N

PCIE_RX11P PCIE_RX11N

PCIE_RX12P PCIE_RX12N

PCIE_RX13P PCIE_RX13N

PCIE_RX14P PCIE_RX14N

PCIE_RX15P PCIE_RX15N

CLOCK

PCIE_REFCLKP PCIE_REFCLKN

NC#1 NC#2 PWRGOOD

PERSTB

DIS@Seymour_M2

3

PEG_RXP8_C

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP PCIE_CALRN

Y33 Y32

W33 W32

U33 U32

U30 U29

T33 T32

T30 T29

P33 P32

P30 P29

N33 N32

N30 N29

L33 L32

L30 L29

K33 K32

J33 J32

K30 K29

H33 H32

Y30 Y29

PEG_RXN8_C

PEG_RXP9_C PEG_RXN9_C

PEG_RXP10_C PEG_RXN10_C

PEG_RXP11_C PEG_RXN11_C

PEG_RXP12_C PEG_RXN12_C

PEG_RXP13_C PEG_RXN13_C

PEG_RXP14_C PEG_RXN14_C

PEG_RXP15_C PEG_RXN15_C

PCIE_CALRP PCIE_CALRN

C226 DIS@0.1U/10V_4XC226 DIS@0.1U/10V_4X C227 DIS@0.1U/10V_4XC227 DIS@0.1U/10V_4X

C248 DIS@0.1U/10V_4XC248 DIS@0.1U/10V_4X C249 DIS@0.1U/10V_4XC249 DIS@0.1U/10V_4X

C224 DIS@0.1U/10V_4XC224 DIS@0.1U/10V_4X C225 DIS@0.1U/10V_4XC225 DIS@0.1U/10V_4X

C247 DIS@0.1U/10V_4XC247 DIS@0.1U/10V_4X C246 DIS@0.1U/10V_4XC246 DIS@0.1U/10V_4X

C223 DIS@0.1U/10V_4XC223 DIS@0.1U/10V_4X C222 DIS@0.1U/10V_4XC222 DIS@0.1U/10V_4X

C221 DIS@0.1U/10V_4XC221 DIS@0.1U/10V_4X C220 DIS@0.1U/10V_4XC220 DIS@0.1U/10V_4X

C245 DIS@0.1U/10V_4XC245 DIS@0.1U/10V_4X C244 DIS@0.1U/10V_4XC244 DIS@0.1U/10V_4X

C243 DIS@0.1U/10V_4XC243 DIS@0.1U/10V_4X C242 DIS@0.1U/10V_4XC242 DIS@0.1U/10V_4X

R132 DIS@1.27K/F_4R132 DIS@1.27K/F_4 R129 DIS@2K/F_4R129 DIS@2K/F_4

2

1

+1V_GPU[15,17,18,38,40]

14

PEG_RXP8 [2] PEG_RXN8 [2]

PEG_RXP9 [2] PEG_RXN9 [2]

PEG_RXP10 [2] PEG_RXN10 [2]

PEG_RXP11 [2] PEG_RXN11 [2]

PEG_RXP12 [2] PEG_RXN12 [2]

PEG_RXP13 [2] PEG_RXN13 [2]

PEG_RXP14 [2] PEG_RXN14 [2]

PEG_RXP15 [2] PEG_RXN15 [2]

+1V_GPU

+3V_GPU

A A

APU_PCIE_RST#[8,23]

dGPU_RST#[8]

5

D41 *BAS316D41 *BAS316 D40 BAS316D40 BAS316

R654

R654 DIS@10K_4

DIS@10K_4

GPU_RST#

EC_A_05

4

PROJECT : KL6B/C

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Date: Sheet of

3

Date: Sheet of

2

Seymour_M2 PCIE

of

14 49Thursday, April 28, 2011

1

1A

5

D D

C C

TjMax = 110 change by VBIOS

CLK_VGA_27M_SS_R

R93

R93 *DIS@10K/F_4

+1.8V_GPU

+1V_GPU

*DIS@10K/F_4

120 ohm/300mA

B B

A A

DIS@BLM15BD121SN1D_300MAL23 DIS@BLM15BD121SN1D_300MAL23

DIS@BLM15BD121SN1D_300MAL15 DIS@BLM15BD121SN1D_300MAL15

DIS@BLM15BD121SN1D_300MAL20 DIS@BLM15BD121SN1D_300MAL20

C232

C232 DIS@10U/6.3V_8X

DIS@10U/6.3V_8X

C234

C234 DIS@10U/6.3V_8X

DIS@10U/6.3V_8X

C179

C179 DIS@10U/6.3V_8X

DIS@10U/6.3V_8X

5

R482

R482 DIS@10K/F_4

DIS@10K/F_4

(1.8V@5mA TS_VDD)

C214

C214 DIS@1U/6.3V_4X

DIS@1U/6.3V_4X

(1.8V@75mA DPLL_PVDD)

C174

C174 DIS@1U/6.3V_4X

DIS@1U/6.3V_4X

(1V@125mA DPLL_VDDC)

C173

C173 DIS@1U/6.3V_4X

DIS@1U/6.3V_4X

T3T3

+3V_GPU

R95

R95 DIS@10K/F_4

DIS@10K/F_4

TS_VDD

C182

C182 DIS@0.1U/10V_4X

DIS@0.1U/10V_4X

DPLL_PVDD

C209

C209 DIS@0.1U/10V_4X

DIS@0.1U/10V_4X

C188

C188 DIS@27P/50V_4C

DIS@27P/50V_4C

DPLL_VDDC

C176

C176 DIS@0.1U/10V_4X

DIS@0.1U/10V_4X

GFX_CORE_CNTRL1[45]

GFX_CORE_CNTRL0[45]

FCH_PCIE_PEG_CLKREQ#[7]

+1.8V_GPU

R151 DIS@1M/F_4R151 DIS@1M/F_4

DIS@27MHZ_20

2 1

Y1

4

NC on Robson Capilano support

RAM_STRAP0[22] RAM_STRAP1[22] RAM_STRAP2[22] RAM_STRAP3[22] RAM_STRAP4[22]

NC on Robson Capilano support

SCL must be tied high if not used

+3V_GPU

R154

R154 DIS@10K/F_4

DIS@10K/F_4

SCL[22] SDA[22]

GPU_GPIO0[22] GPU_GPIO1[22]

GPU_GPIO2[22] GPIO3_SMBDAT[22] GPIO4_SMBCLK[22]

DGPU_BLON[22]

SOUT_GPIO8[22]

SIN_GPIO9[22]

GPIO10_ROMSCK[22]

RAM_CFG0[22] RAM_CFG1[22] RAM_CFG2[22]

ALT#_GPIO17[22]

SCS#_GPIO22[22]

T24T24

R125*100K/F_4 R125*100K/F_4

Place close to Chip

R87 DIS@499/F_4

DIS@499/F_4

R84

R84 DIS@249/F_4

DIS@249/F_4

C184

C184 DIS@27P/50V_4C

DIS@27P/50V_4C

VREFG

C82

C82 DIS@0.1U/10V_4X

DIS@0.1U/10V_4X

VGA_THERMDP[22,33] VGA_THERMDN[22,33]

EC_B_14

4

R137

R137 DIS@10K/F_4

DIS@10K/F_4

T12T12

T4T4

CLK_VGA_27M_SS_R

T98T98

FCH_PCIE_PEG_CLKREQ#

GPU_JTAG_TRSTB

T18T18

GPU_JTAG_TDI

T19T19

GPU_JTAG_TCK

T20T20

GPU_JTAG_TMS

T21T21

GPU_JTAG_TDO

T22T22

T15T15 T5T5 T16T16 T11T11 T23T23

EXT_HDMI_HPD

DPLL_PVDD

DPLL_VDDC

VGA_XTALIN VGA_XTALOUT

T36T36

TS_VDD

U30B

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16_SSIN

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF

AH24

GENERICG

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AJ32

TSVDD

AJ33

TSVSS

DIS@Robson/Capilano_M2

MUTI GFX

I2C

PLL/CLOCK

THERMAL

3

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC2

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

3

HSYNC VSYNC

RSET AVDD

AVSSQ VDD1DI

VSS1DI

COMP

H2SYNC V2SYNC

VDD2DI VSS2DI

A2VDD A2VDDQ A2VSSQ

R2SET

AUX1P

AUX1N

AUX2P

AUX2N

R

RB

G

GB

B

BB

R2

R2B

G2

G2B

B2

B2B

C Y

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39 AD37

AE36 AD35

AF37 AE38

AC36 AC38

R150 DIS@499/F_4R150 DIS@499/F_4

AB34 AD34

AE34 AC33

AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32 AD32 AF32

AD29 AC29

VDD1DI

AG31 AG32

AG33

A2VDDQ

AD33 AF33

R130 DIS@715/F_4R130 DIS@715/F_4

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

Park Channel D-->No support M92 Channel C&D-->No support

HSYNC [22] VSYNC [22]

AVDD

VDD1DI

T31T31 T33T33

R149 *0/J_4R149 *0/J_4

T27T27 T25T25

T9T9 T6T6 T13T13

T17T17 T35T35 T30T30

T32T32 T28T28

EC_A_18

+3V_GPU

C618

C618 *DIS@0.1U/10V_4X

*DIS@0.1U/10V_4X

2

(3.3V@130mA A2VDD)

2

HDMI

DIS@Robson/Capilano_M2

AVDD

VDD1DI

A2VDDQ

U30G

LVDS CONTROL

LVTMDP

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

TXOUT_U3P TXOUT_U3N

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

TXOUT_L3P TXOUT_L3N

(1.8V@70mA AVDD)

C185

C185 DIS@0.1U/10V_4X

DIS@0.1U/10V_4X

(1.8V@95mA VDD1DI)

C181

C181 *DIS@0.1U/10V_4X

*DIS@0.1U/10V_4X

(1.8V@1.5mA A2VDDQ)

C180

C180 *DIS@0.1U/10V_4X

*DIS@0.1U/10V_4X

1

15

AK27

VARY_BL

AJ27

DIGON

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

C211

DIS@1U/6.3V_4X

C210

*DIS@1U/6.3V_4X

C250

*DIS@1U/6.3V_4X

Size Document Number Rev

Date: Sheet

T102T102 T104T104

T103T103 T108T108

T101T101 T106T106

T105T105 T107T107

+1V_GPU[14,17,18,38,40] +1.8V_GPU[17,18,22,38,46] +3VPCU[4,8,10,24,29,32,34,35,36,38,39,40,41,43,46] +3V_GPU[14,16,17,19,22,38,40,46]

120 ohm/300mA

DIS@BLM15BD121SN1D_300MAL19 DIS@BLM15BD121SN1D_300MAL19R87

C229

C229 DIS@10U/6.3V_8X

DIS@10U/6.3V_8X

120 ohm/300mA

*DIS@BLM15BD121SN1D_300MAL22 *DIS@BLM15BD121SN1D_300MAL22

C228

C228 *DIS@10U/6.3V_8X

*DIS@10U/6.3V_8X

120 ohm/300mA

*DIS@BLM15BD121SN1D_300MAL27 *DIS@BLM15BD121SN1D_300MAL27

EC_A_18

PROJECT : KL6B/C

Quanta Computer Inc.

Seymour -M2 HOST

1

15 49Thursday, April 28, 2011

of

LVDS

+1.8V_GPU

1A

Quanta KL6B Block Diagram

Specifications and Main Features

Frequently Asked Questions

User Manual