QUANTA JX6 Schematics

5

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Quanta Project Name: JX6

C C

Dell Project Name: MGD Lite

2007-03-01

REV : D3B A00/X-Build Stage

B B

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

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Date: Sheet

COMPUTER

COVER PAGE

MGD 3A

1

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SYSTEM

JX6 MGD-INTEGRATED

RESET CIRCUIT

POWER SW

JX6_PCBJX6_PCB

A A

DDR2-SODIMM1

CH1 DDR II 533/667/800 MHz

PG 17,18

DDR2-SODIMM2

CH2 DDR II 533/667/800 MHz

PG 17,18

DDR2-MEMORY DEVICE

8MX16X4 84-PIN FBGA

PG 16

B B

Panel CONN.

PG 20

CPU HDT

DEBUG PORT

PG 10

533 MHZ DDR II

LVDS

AMD S1

Turion 64 Rev.F Dual-Core/ Sempron Rev.F Single-Core

Dual-Core 35W / Single-Core 25W

(638 S1g1 socket)

PG 8,9,10,11

HT_LINK

RS690

465 FCBGA

PG 12,13,14,15,16

VGA

DVI

PCIE(L2)

TVOUT

PCIE(L1)

CLOCK

ICS951462

PG 7

BCM 5755M

PG 30

MINI-CARD

CRT CONN.

PG 21

WLAN

BATT CHARGER

AC/BATT CONNECTOR

E-Switch

PI3L500

+3.3V_LAN

PG 31

PG 43

PG 42

PG 46

PG 51

VGA

DVI

RJ45/Magnetics

PG 31

CPU VR

DC/DC

+3.3V_ALW/+5V_ALW/+15V_ALW

REGULATOR

VCC_NB

REGULATOR

+1.8V_SUS/+1.2V_VCCP +1.5V_RUN/+0.9V_DDR_VTT

PG 50

PG 47

PG 42

PG 48

PG 35

D-Module

PG 27

SATA - HDD

PG 27

C C

Side External USBX2

USB2.0 (P4) IDE

SATA

USB2.0 (P0,P1)

SB600

549 BGA

A_LINK

USB2.0 (P6)

PG 33

33MHz PCI

Rear External USBX2

PG 33

USB2.0 (P2,P3) USB2.0 (P7)

PG 23,24,25,26

LPC

CARDBUS/1394

OZ711EZ1TN

HD-AZALIA

RJ11 for Dock

SPI

PG 32

PG 36

MDC

PG 34

Tip Ring

PG 34

AUDIO/AMP

STAC9205

PG 28

Audio Jacks

PG 29

S-Video CONN

PG 22

S/PDIF

USB2.0 (P8)

DOCKING CONNECTOR

PG 36

Bluetooth

PG 41

D D

FAN & THERMAL

EMC4001

PG 19

1

2

SIO

ECE5018 Expander USB 2.0 Hub(4)

128 Pins VTQFP

PG 38

Serial Port

PG 33

3

BC

FLASH

SST25VF016B

PG 37

4

EC

MEC5025 128KB Flash TMKBC

128 Pins VTQFP

PG 39

SPI PS/2

Touchpad/ Stick point

PG 41

BC

Keyboard Controllor

Keyboard

PG 40

USER INTERFACE

PG 40

5

ECE1077

PG 37

QUANTA

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Title

Size Document Number Rev

Date: Sheet

6

Date: Sheet

COMPUTER

System Block Diagram

MGD 1A

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INDEX Power States

Pg# Description

Schematic Block Diagram

1

2

Front Page

3-4

Merom

5-10

Crestline

ICH8M

A A

B B

C C

11-14

DDRII SO-DIMM(200P)

15-16

17

Clock Generator

18-23

VGA

24

LCD Conn. & SSP

25

CRT Conn

26

SATA & IDE Conn

27

PCCARD/Conn & 1394

Express Card & Smart Card

28

29

Mini Card

MDC Conn.

30

31

SIO (MEC5025)

32

SIO (MEC5018)

33

SERIAL PORT & USB

34

Flash ROM, RTC & ECE1077

TP,BT & FIR

35

36

Switch,Keyboard & LED

FAN & Thermal

37

Audio CODEC(STAC9205)/Phone Jack

38-39

LOM (Nineveh)/Switch

40-41

42-43

Docking Conn/Q-Switch

System Reset Circuit

44

Battery Selector & Charger

45-46

47

DDR2_1.8VSUS, 0.9V

48

1.5VSUS,1.05V(VTT)

49

VGA DC/DC,1.25V,1.05V

CPU_MAX8786(3phase)

50

D/D Power

51

52

RUN Power Switch

53

DCIN,Batt

PAD& SCREW

54

55

EMI CAP

SMBUS BLOCK

56

Power Rail S3/M1

+3.3V_ALW

+5V_ALW

+3.3V_LAN

+1.8V_SUS

+0.9V_DDR_VTT

+5V_SUS

+3.3V_SUS

+5V_RUN

+3.3V_RUN

+1.8V_RUN

+1.25V_RUN

+1.5V_RUN

+1.05V_VCCP

VCC_VCRE

+LCDVCC

+5V_MOD

Control Signal

S0/M0

S3/M1 S4/M1

S3/ M-off

S4/ M-off

S5/ M-off

D D

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Date: Sheet

COMPUTER

Index, DNI, Power & Ground

MGD 1A

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POWER STATES

SLP

State

D D

S0 (Full ON)

S3 (Suspend to RAM)

S4 (Suspend to DISK) ON OFF

S5 (SOFT OFF) ON OFFLOW LOW

Signal

SLP S5#

HIGH

ALWAYS PLANE

S3#

HIGH

LOW HIGH ON ON OFF

LOW HIGH

ON

SUS

RUN

PLANE

ON ON ON

OFF

CLOCKS

OFF

SB600

USB PORT#

0 1 2 3 4

DESTINATION Side Pair Top Side Pair Bottom Rear Bottom as viewed from the back Rear Top as viewed from the back Floppy Disk

5 6 7

C C

B B

PM TABLE

State

S0

S3

S5 S4/AC

S5 S4 on Battery

power plane

+15V_ALW +5V_ALW +3.3V_ALW +1.2V_ALW_SUS

ON

+5V_SUS +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT

ON ON

ON

OFF

OFFOFF

+5V_RUN +3.3V_RUN +2.5V_RUN +1.8V_RUN +1.2V_RUN +1.5V_RUN +VCC_CORE +NB_CORE

OFFON

OFF

ECE5018

8 9 1 2 3 4

PCI EXPRESS

PCI TABLE

PCI DEVICE IDSEL

REQ#/GNT#

PIRQ

Lane 0 Lane 1 Lane 2

MINI CARD-1 WWAN MINI CARD-2 WLAN

Cardbus BT Dock

NC NC NC NC

DESTINATION

LOM

CardBus

A A

5

AD17 REQ#1/GNT#1

REQ#0/GNT#0

4

IRQ_SERIRQ

IRQD

PIRQADocking AD24

3

Lane 3

2

None

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ATHLON64 HT I/F

MGD 1A

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D D

ADAPTER

+PWR_SRC

FDS4435BZ +INV_PWR_SRC

RUN_ON

BATTERY

ALW_ON

C C

ISL6236

+5V_ALW

MAX8731

+5V_ALW2 +15V_ALW

MAX8774 MAX8632

ISL6236

Charger

1.2V_ALW_SUS_ON

ALW_ON

+5V_ALW

B B

FDC655BN

SI4810

793475

FDC655BN

+3.3V_ALW

Si4336DY

3.3V_RUN_ON

+3.3V_RUN

ALW_ON

FDS6670AS

ENAB_3VLAN

+3.3V_LAN

FDC655BN

SUS_ON

+3VSUS

+1.2V_ALW_SUS

CPU_VCORE_ENABLE

+VCC_CORE

1.2V_RUN_ON

FDS8880

+1.2V_RUN

NB_VCORE_RUN_ON

+NB_CORE

FDC655BN

1.8V_RUN_ON

DDR_ON

+1.8V_SUS

MAX8794

1.5V_RUN_ON

DDR_ON

+0.9V_DDR_VTT

SUS_ON

HDDC_EN#

MODC_EN#

+5V_HDD +5V_MOD +5V_RUN +VDDA

A A

RUN_ON

AUDIO_AVDD_ENABLE

+5V_SUS

EMC4001

REGCTL_PNP12

PBSS5540Z

( Q40 )

REGCTL_PNP25

MBT35200MT1G

( Q39)

L?

(Option)

5

4

+2.5VRUN

3

5755M

+1.2V_LOM

+2.5V_LOM

2

+1.8V_RUN

Title

ATHLON64 HT I/F

Size Document Number Rev

MGD 1A

Date: Sheet

+1.5V_RUN

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C3

A A

SB600

F3

8

7

B B

13

12

2

3

+3.3V_SUS

2.2K 2.2K

SB_SMBCLK SB_SMBDATA

+3.3V_ALW

8.2K 8.2K

LCD_SMBCLK LCD_SMBDAT +3.3V_ALW

+3.3V_ALW

2.2K 2.2K

CKG_SMBCLK

+3.3V_ALWCKG_SMBDAT

+5V_ALW

SMBUS Address [C8]

+3.3V_SUS

6

5

Inverter

2N7002

4

5755M LOM

C8C7

INV

CLK_SCLK

CLK_SDATA

SMBUS Address [58]

+3.3V_RUN

2.2K 2.2K

16

17

5

CLK GEN.

6

2N7002

MEM_SCLK

MEM_SDATA

2.2K 2.2K

2N7002

SMBUS Address [D2]

+3.3V_RUN

2.2K 2.2K

+3.3V_WLAN

WLAN_SMBCLK

WLAN_SMBDATA

7

197

195

SMBUS Address [A0]

197

195

SMBUS Address [A2]

30

32

SMBUS Address [TBD]

8

DIMM0

DIMM1

WLAN

8.2K 8.2K

SIO

DOCK_SMB_CLK

6

DOCK_SMB_DAT

5

+5V_ALW

39

DOCKING

40

SMBUS Address [C4, 72, 70, 48]

+3.3V_ALW

Macallan IV

C C

10

SBAT_DH_SMBCLK

9

2.2K 2.2K

+3.3V_ALW

100

+3.3V_ALWSBAT_DH_SMBDAT

3

2'nd

4

BATTERY

SMBUS Address [16]

100

2.2K2.2K

112

111

PBAT_SMBCLK PBAT_SMBDAT

+3.3V_ALW

D D

100

THERM_SMBCLK

99

1

2

4.7K 4.7K

+3.3V_ALWTHERM_SMBDAT

3

CHARGER

SMBUS Address [12]

910

4

100

2N7002

3

BATTERY

4

CONN

+3.3V_SUS

2.2K 2.2K

EMC_SMBCLK

EMC_SMBDATA

5

SMBUS Address [16]

12

GUARDIAN

11

SMBUS Address [2F]

6

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

SMBUS BLOCK

MGD 1A

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1

33 ohm +-25%@100MHz 25m ohm max DC resistance 3A current rating

+3.3V_RUN

L27

1 2

BLM18PG330SN1B

12

C599

C599 10U

10U

10

10 X5R

X5R

A A

EP

EP 0805

0805

％

±20

B B

C C

+3.3V_CLK

12

0603

C125

22U_6.3V_0805

+3.3V_RUN

L28

1 2

BLM15AG221SN1D

+3.3V_RUN

Parallel Resonance Crystal

C588 33P

C584 33P

+3.3V_ALW

+3.3V_RUN

SMbus address D2

These are for backdrive issue.

CKG_SMBDAT39

D D

CKG_SMBCLK39

1

R554

2.2K

1 2

+3.3V_ALW

R524

2.2K

1 2

3 1

2N7002W-7-F

R555 0_NCR555 0_NC

1 2

+3.3V_RUN

3 1

2N7002W-7-F

R517 0_NCR517 0_NC

1 2

50

50 NPO

NPO

50

50 NPO

NPO

2

Q65

2

Q64

2

+3.3V_CLK(40 mils)

12

C133

C166

0.1U_10V

12

C128

C591

0.047U

2.2U

16

6.3

％

±10

0603

X5R

X7R

L67

1 2

BLM15AG221SN1D

21

Y5

14.318MHZ

20PPM

20PPM 20p

20p

XTALOUT_CLK_C XTALOUT_CLK

Place R535 less than 100mils from Clock Gen.

R553

2.2K

1 2

CLK_SDATA

GDS

231

2N7002W-7-F

C169

0.1U_10V

+3VS_CLK_VDD48

+3VS_CLK_VDDREF

12

C585

2.2U

6.3

6.3 0603

0603 X5R

X5R

R516

R516 1M_NC

1M_NC

1 2

R520 0R520 0

1 2

CLOCK_ENABLE#39

12

C129

0.1U_10V

C586

0.047U

16

16 ±10

±10 0603

0603 X7R

X7R

％

EXT CLK FREQUENCY SELECT TABLE(MHZ)

FS2

R519

1 2

2

R519

2.2K

CLK_SCLK

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 1

3

12

C174

0.1U_10V

+3.3V_CLK

XTALIN_CLK

CLK_SCLK CLK_SDATA

CLKIREF

R535

R535 475_F

475_F

1 2

LOM_CLKREQ#

MINI1CLK_REQ#

MINI2CLK_REQ#

FS0

FS1

3

12

C137

0.1U_10V

U33

54

VDDCPU

14

VDD_SRC1

23

VDD_SRC2

28

VDD_SRC3

44

VDD_SRC4

5

VDD_48

39

VDD_ATIG

2

VDD_REF

60

VDDHTT

53

GND_CPU

15

GND_SRC1

22

GND_SRC2

29

GND_SRC3

45

GND_SRC4

8

GND_48

38

GND_ATIG

1

GND_REF

58

GNDHTT

3

XIN

4

XOUT

11

RESET_IN#

61

NC

9

SMBCLK

10

SMBDAT

48

IREF

ICS951462

R507 10KR507 10K

1 2

R551 10KR551 10K

1 2

R552 10KR552 10K

1 2

CPU

Hi-Z X

180.00

220.00

100.00

133.33

200.00

12

C179

0.1U_10V

SRCCLK

[2:1]

100.00

4

CPUCLK8T0

CPUCLK8C0

CPUCLK8T1

CPUCLK8C1

SRCCLKT6 SRCCLKC6 ATIGCLKT0

ATIGCLKC0

ATIGCLKT1

ATIGCLKC1

ATIGCLKT2

ATIGCLKC2

ATIGCLKT3

ATIGCLKC3

SRCCLKT5 SRCCLKC5

SRCCLKT4 SRCCLKC4

SRCCLKT3 SRCCLKC3

SRCCLKT2 SRCCLKC2

SRCCLKT0 SRCCLKC0

SRCCLKT1 SRCCLKC1

SRCCLKT7 SRCCLKC7

CLKREQA# CLKREQB# CLKREQC#

48MHz_1 48MHz_0

FS1/REF1 FS0/REF0 FS2/REF2

HTTCLK0

+3.3V_RUN

PCI

HTT

Hi-Z

X/3 X/6

60.00

30.00

73.12

36.56

66.66

33.33

66.66

33.33 48.00

4

VDDA GNDA

+3.3V_CLK_VDDA

50 49

CPUCLK_R

56

CPUCLK_R#

55 52 51

PCIE_LOM

16

PCIE_LOM#

17

NB_GFX

41

NB_GFX#

40 37 36 35 34 30 31 18 19 20 21

NB_SBLINK

24

NB_SBLINK#

25

PCIE_MINI2

26

PCIE_MINI2#

27 47 46 43 42

PCIE_SB

12

PCIE_SB#

13

LOM_CLKREQ#

57 32 33

7

CLK_SB

6

FS1

63

FS0

64

FS2

62

HTREFCLK

59

COMMENT

USB

Reserved

48.00 Reserved

48.00

Reserved Reserved

48.00

Reserved Normal ATHLON64 operation

5

12

R526 33R526 33

R514 33R514 33 R511 33R511 33 R117 33R117 33 R523 33R523 33

CLK_SB_48M CLK_SIO_14M CLK_NB_14M CLK_SB_14M CLK_HTREF_66M

5

C602

C172

0.1U

0.047U

0402

16

％

10

±10

±10 0603

0603 X7R

X7R

R525 47.5_FR525 47.5_F

1 2

R528 47.5_FR528 47.5_F

1 2

R533 33R533 33 R536 33R536 33 R542 33R542 33 R546 33R546 33

R539 33R539 33 R543 33R543 33 R547 33R547 33 R549 33R549 33

R529 33R529 33 R531 33R531 33

12

C589

C589 10P_NC

10P_NC

50V

220 ohm @100MHz 300mA current rating

12

C603

C603 22U

22U

0805

6.3

LOM_CLKREQ# 30 MINI2CLK_REQ# 35 MINI1CLK_REQ#

R522

49.9_F

1 2

12

C127

C127 10P_NC

10P_NC

50V

6

L66

BLM15AG221SN1D

CLK_SB_48M 24

CLK_SIO_14M 38 CLK_NB_14M 14 CLK_SB_14M 24 CLK_HTREF_66M 14

12

C580

C580 10P_NC

10P_NC

50V

6

+3.3V_RUN

R527 261_FR527 261_F

1 2

R532 49.9_FR532 49.9_F

R530 49.9_FR530 49.9_F

12

C587

C596

10P_NC

50V

7

R537 49.9_FR537 49.9_F

R544 49.9_FR544 49.9_F

R548 49.9_FR548 49.9_F

R540 49.9_FR540 49.9_F

R550 49.9_FR550 49.9_F

12

FS0 FS1 FS2

Title

CLOCK GENERATOR

Size Document Number Rev

MGD 3A

Date: Sheet

12

R518 8.2KR518 8.2K

1 2

R515 8.2KR515 8.2K

1 2

R114 8.2KR114 8.2K

1 2

QUANTA

QUANTA COMPUTER

COMPUTER

7

R545 49.9_FR545 49.9_F

R541 49.9_FR541 49.9_F

12

R534 49.9_FR534 49.9_F

12

R512

2.2K

1 2

R513

2.2K_NC

1 2

8

CPU_CLK 10 CPU_CLK# 10

CLK_PCIE_LOM 30 CLK_PCIE_LOM# 30 CLK_NB_GFX 14 CLK_NB_GFX# 14

CLK_NB_SBLINK 14 CLK_NB_SBLINK# 14 CLK_PCIE_MINI2 35 CLK_PCIE_MINI2# 35

CLK_PCIE_SB 23 CLK_PCIE_SB# 23

+3.3V_RUN

R510

2.2K

1 2

R509

2.2K_NC

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R113

2.2K

R116

2.2K_NC

5

C502

C101

4.7U

10

10 0805

0805

1 2

X7R

D D

X7R

C502

4.7U

10

10 0805

0805

1 2

X7R

C501

4.7U

10

10 0805

0805

1 2

X7R

4

+1.2V_RUN

C95

0.22U

10

10 0603

0603 X7R

X7R

C512

0.22U

10

10 0603

0603 X7R

X7R

12

C93

180P_50V

12

C518

180P_50V

3

2

1

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS

PROCESSOR HYPERTRANSPORT INTERFACE

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

C C

HT_CADIN1512 HT_CADIN#1512 HT_CADIN1412 HT_CADIN#1412 HT_CADIN1312 HT_CADIN#1312 HT_CADIN1212 HT_CADIN#1212 HT_CADIN1112 HT_CADIN#1112 HT_CADIN1012 HT_CADIN#1012 HT_CADIN912 HT_CADIN#912 HT_CADIN812 HT_CADIN#812

B B

+1.2V_RUN

R472 51R472 51

A A

R473 51R473 51

HT_CADIN712 HT_CADIN#712 HT_CADIN612 HT_CADIN#612 HT_CADIN512 HT_CADIN#512 HT_CADIN412 HT_CADIN#412 HT_CADIN312 HT_CADIN#312 HT_CADIN212 HT_CADIN#212 HT_CADIN112 HT_CADIN#112 HT_CADIN012 HT_CADIN#012

HT_CLKIN112 HT_CLKIN#112 HT_CLKIN012 HT_CLKIN#012

1 2 1 2

HT_CTLIN012 HT_CTLIN#012

Place R472 and R473 less than 100mils from CPU

5

+1.2V_RUN

U7AU7A

D4 D3 D2 D1

N5 P5

M3 M4

L5

M5

K3 K4 H3 H4

G5

H5 F3 F4 E5 F5 N3 N2

L1

M1

L3 L2 J1

K1

G1

H1

G3 G2

E1 F1 E3 E2

J5

K5

J3 J2

P3 P4

N1 P1

VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0

L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0

L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0

L0_CTLIN_H1 L0_CTLIN_L1

L0_CTLIN_H0 L0_CTLIN_L0

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

Athlon 64 S1 Processor Socket

4

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

+1.2V_RUN

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

HT_CPU_CTLOUT1HT_CTLIN1

T5

HT_CPU_CTLOUT#1HT_CTLIN#1

R5

R2 R3

HT_CADOUT15 12 HT_CADOUT#15 12 HT_CADOUT14 12 HT_CADOUT#14 12 HT_CADOUT13 12 HT_CADOUT#13 12 HT_CADOUT12 12 HT_CADOUT#12 12 HT_CADOUT11 12 HT_CADOUT#11 12 HT_CADOUT10 12 HT_CADOUT#10 12 HT_CADOUT9 12 HT_CADOUT#9 12 HT_CADOUT8 12 HT_CADOUT#8 12 HT_CADOUT7 12 HT_CADOUT#7 12 HT_CADOUT6 12 HT_CADOUT#6 12 HT_CADOUT5 12 HT_CADOUT#5 12 HT_CADOUT4 12 HT_CADOUT#4 12 HT_CADOUT3 12 HT_CADOUT#3 12 HT_CADOUT2 12 HT_CADOUT#2 12 HT_CADOUT1 12 HT_CADOUT#1 12 HT_CADOUT0 12 HT_CADOUT#0 12

HT_CLKOUT1 12 HT_CLKOUT#1 12 HT_CLKOUT0 12 HT_CLKOUT#0 12

T97T97 T99T99

HT_CTLOUT0 12 HT_CTLOUT#0 12

Place T97 and T99 less than 100mils from CPU

3

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

COMPUTER

ATHLON64 HT I/F

MGD 1A

889Thursday, March 01, 2007

of

1

of

A

B

C

D

E

Notes for the SODIMM locations:

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

CPU_VTT_SUS_SENSE should be routed as 10mils and 10mils spacing from any

4 4

for +0.9V_DDR_VTT feedback

KEEP TRACE TO RESISTORS LESS THAN 1.5" FROM CPU PIN

3 3

2 2

1 1

adjacent signals in X, Y, Z directions.

+1.8V_SUS

R95

39.2

1%

R100

39.2

1%

DDR_A_MA[0..15]17,18

DDR_CS3_DIMMA#17,18 DDR_CS2_DIMMA#17,18 DDR_CS1_DIMMA#17,18 DDR_CS0_DIMMA#17,18

DDR_CS3_DIMMB#17,18 DDR_CS2_DIMMB#17,18 DDR_CS1_DIMMB#17,18 DDR_CS0_DIMMB#17,18

DDR_CKE3_DIMMB17,18 DDR_CKE2_DIMMB17,18 DDR_CKE1_DIMMA17,18 DDR_CKE0_DIMMA17,18

CPU_VTT_SUS_SENSE

T113T113

M_ZN M_ZP

DDR_A_BS217,18 DDR_A_BS117,18 DDR_A_BS017,18

DDR_A_RAS#17,18 DDR_A_CAS#17,18

DDR_A_WE#17,18

+0.9V_CPU_M_VREF_SUS

12

C583

0.1U_10V

W17

AE10

AF10

W24

DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0

Y10

V19

J22 V22 T19

Y26

J24

U23

H26

J23

J20

J21

K19 K20 V24 K24

L20 R19

L19

L22

L21 M19 M20 M24 M22 N22 N21 R21

K22 R20 T22

T20 U20 U21

12

C581

0.1U_10V

12

C582

1000p_50V

U7B

MEMVREF

VTT_SENSE

MEMZN MEMZP

MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0

MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0

MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0

MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0

MA_BANK2 MA_BANK1 MA_BANK0

MA_RAS_L MA_CAS_L MA_WE_L

+1.8V_SUS

R508

R508 1K_F_0603

1K_F_0603

1 2

DDR II: CMD/CTRL/CLK

Athlon 64 S1 Processor Socket

+V_DDR_VREF

1 2

R505 0_0603_NCR505 0_0603_NC

R506

R506 1K_F_0603

1K_F_0603

Place Capacitors for +0.9V_CPU_M_VREF_SUS < 1" from the RS690. +0.9V_CPU_M_VREF_SUS trace length < 6", trace width > 15mils and 20mils spacing from any adjacent signals in X, Y, Z directions.

+0.9V_DDR_VTT

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

Y16

MA0_CLK_H2

AA16

MA0_CLK_L2

E16

MA0_CLK_H1

F16

MA0_CLK_L1

AF18

MB0_CLK_H2

AF17

MB0_CLK_L2

A17

MB0_CLK_H1

A18

MB0_CLK_L1

W23

MB0_ODT1

W26

MB0_ODT0

V20

MA0_ODT1

U19

MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

MB_WE_L

DDR_B_MA15

J25

DDR_B_MA14

J26

DDR_B_MA13

W25

DDR_B_MA12

L23

DDR_B_MA11

L25

DDR_B_MA10

U25

DDR_B_MA9

L24

DDR_B_MA8

M26

DDR_B_MA7

L26

DDR_B_MA6

N23

DDR_B_MA5

N24

DDR_B_MA4

N25

DDR_B_MA3

N26

DDR_B_MA2

P24

DDR_B_MA1

P26

DDR_B_MA0

T24

K26 T26 U26

U24 V26 U22

DDR_B_BS2 17,18 DDR_B_BS1 17,18 DDR_B_BS0 17,18

DDR_B_RAS# 17,18 DDR_B_CAS# 17,18

DDR_B_WE# 17,18

M_CLK_DDR1 17 M_CLK_DDR#1 17 M_CLK_DDR0 17 M_CLK_DDR#0 17

M_CLK_DDR3 17 M_CLK_DDR#3 17 M_CLK_DDR2 17 M_CLK_DDR#2 17

M_ODT3 17,18 M_ODT2 17,18 M_ODT1 17,18 M_ODT0 17,18

DDR_B_MA[0..15] 17,18

DIMMA = Far = Bottom DIMMB = Near = Top

Processor DDR2 Memory Interface

U7C

DDR_B_D[0..63]17

To SODIMM socket B (Near/TOP)

DDR_B_DM[0..7]17 DDR_A_DM[0..7] 17

DDR_B_DQS[0..7]17

DDR_B_DQS#[0..7]17

DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0

DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0

AD11 AF11 AF14 AE14

AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24

AD12 AC16 AE22 AB26

AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26

Y11

G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11

E25 A22 B16 A12

F26 E26 A24 A23 D16 C16 C12 B12

U7C

MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0

MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0

MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

Athlon 64 S1 Processor Socket

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

DDR: DATA

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

Y13 AB16 Y19 AC24 F24 E19 C15 E12

W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0

DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0

DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0

DDR_A_DQS[0..7]17

DDR_A_DQS#[0..7]17

DDR_A_D[0..63] 17

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

To SODIMM socket A (Far/Bottom)

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

COMPUTER

ATHLON64 DDRII MEMORY

MGD 1A

E

989Thursday, March 01, 2007

of

5

4

3

2

1

SB600 ONLY

CPU_PWRGD23

D D

LDT_STOP#14,23

C C

CPU_CLK7

CPU_CLK#7

B B

R499

R499 680

680

NOTE: R499 and C564 close to JCPU pin F10

LDT_RST#23

C115 3900P_50VC115 3900P_50V

1 2

C111 3900P_50VC111 3900P_50V

1 2

1.KEEP TRACE TO RESISTOR LESS THAN 600MILS FROM CPU PIN AND TRACE TO AC CAPS LESS THAN 1250MILS.

2. CPUCLK and CPUCLK# mismatch < 35 mils.

CPU_PROCHOT#

+1.8V_SUS

R85

R85 680

680

12

R485

R485 10K

10K

CPU_PWRGD

D31

SDMK0340L-7-F

R668 20K

C564

0.1U_16V_NC

R88

NOTE: Place R88 on the top of the board that is

680

iaccessible, and that shorting across this resistor will toggle the hyper Transport reset signal.

12

R91

R91 169_F

169_F

+1.8V_SUS

+3.3V_SUS

12

R479

4.7K

1 2 2

Q61

MMBT3904

13

EC_CPU_PROCHOT# 39

1%

C760

C760 47P

47P

NPO

NPO 50

50

LDT_RST#

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

R498 0_NCR498 0_NC

1 2

+1.8V_SUS+1.8V_RUN

R666

R666 0_NC

0_NC

U35

2 4

NL17SZ17DFT2G

3 5

R6670R667 0

LDT_STOP_R#LDT_STOP_R#

R669

R669 680_NC

680_NC

L65 ferrite bead with an approximate impedance of 33 , a maximum DC resistance of 0.025 ohm , and a current rating of at least 3000mA.

+2.5V_RUN

12

C130

+

100U

6.3

6.3 3528

3528 Polymer

Polymer ±20

If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300-Ω (±5%) pulldown to VSS.

Place R78 and R77 < 1.5". Route CPU_HTREF1/0 with 5mils trace width and 10mils spacing from other signals in X, Y, Z directions

CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN# CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0

CPU_TEST25_L_BYPASSCLK_L

CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

If no use which Net need pull-up or down

±20

To Power

R90 300_NCR90 300_NC

1 2

R86 300R86 300

1 2

R477 1K_FR477 1K_F

1 2

R497 510 1%R497 510 1%

R491 300R491 300

1 2

R84 300_NCR84 300_NC

1 2

R87 300_NCR87 300_NC

1 2

R92 300_NCR92 300_NC

1 2

R487 300_NCR487 300_NC

1 2

R480 300_NCR480 300_NC

1 2

R481 300_NCR481 300_NC

1 2

R484 510 1%R484 510 1%

R482 300R482 300

1 2

R483 300R483 300

1 2

L65

0603L65

0603

12

BLM18PG330SN1D

％

CPU_VDD_RUN_FB_H50 CPU_VDD_RUN_FB_L50

T117T117 T114T114 T31T31 T32T32 T115T115 T111T111

LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

This trace should be kept at least 20 mils away from all other signals.

+2.5V_CPU_VDDA_RUN

12

C526

4.7U

10

1 2

0805

0805 X7R

X7R

CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L CPU_CLK CPU_CLK# CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N

+1.8V_SUS

+2.5V_CPU_VDDA_RUN

C525

0.22U

10

10 0603

0603 X7R

X7R

C536

C536 3300P

3300P

50

％

±5

1 2

LF (Lead Free)

LF (Lead Free) 0402

0402 X7R

X7R

The AMD SI feature has errata, and will not be plemented.

+1.2V_RUN

CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L

H_THERMDC19

H_THERMDA19

R80 300R80 300 R81 0_NCR81 0_NC

R78 44.2_FR78 44.2_F

1 2

R77 44.2_FR77 44.2_F

1 2

CPU_TEST25_H_BYPASSCLK_H

T119T119

CPU_TEST25_L_BYPASSCLK_L

T110T110

CPU_TEST19_PLLTEST0

T118T118

CPU_TEST18_PLLTEST1

T116T116

CPU_TEST17_BP3

T25T25

CPU_TEST16_BP2

T108T108

CPU_TEST15_BP1

T102T102

CPU_TEST14_BP0

T104T104

CPU_TEST12_SCANSHIFTENB

T106T106

1 2

Place C32< 100mils from CPU.

CPU_RSVD_MA0_CLK3_P

T134T134

CPU_RSVD_MA0_CLK3_N

T124T124

CPU_RSVD_MA0_CLK0_P

T129T129

CPU_RSVD_MA0_CLK0_N

T128T128

CPU_RSVD_MB0_CLK3_P

T130T130

CPU_RSVD_MB0_CLK3_N

T131T131

CPU_RSVD_MB0_CLK0_P

T122T122

CPU_RSVD_MB0_CLK0_N

T126T126

1 2 1 2

T103T103

T105T105

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

CPU_DBRDY

CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

C531

C531 220P

220P

50V

LDT_RST# CPU_PWRGD LDT_STOP_R#

CPU_HTREF1 CPU_HTREF0

H_THERMDC

H_THERMDA

CPU_SIC CPU_SID

F8 F9

B7 A7

F10

AF4 AF5

P6 R6

F6 E6

W9

Y9

A9 A8

G10

AA9 AC9 AD9 AF9

E9 E8

G9 H10 AA7

C2

D7

E7

F7

C7 AC8

C3 AA6

W7 W8

Y6 AB6

P20 P19 N20 N19

R26 R25 P22 R22

U7D

VDDA2 VDDA1

RESET_L PWROK LDTSTOP_L

SIC SID

HT_REF1 HT_REF0

VDD_FB_H VDD_FB_L

VDDIO_FB_H VDDIO_FB_L

CLKIN_H CLKIN_L

DBRDY

TMS TCK TRST_L TDI

TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12

TEST7 TEST6 TEST5 TEST4 TEST3 TEST2

RSVD0 RSVD1 RSVD2 RSVD3

RSVD4 RSVD5 RSVD6 RSVD7

MISC

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

PSI_L

DBREQ_L

TEST29_H TEST29_L

TEST24 TEST23 TEST22 TEST21 TEST20

TEST28_H

TEST28_L

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

+1.8V_SUS

R478

R486

300

1 2

H_THERMTRIP#

AF6

CPU_PROCHOT#

AC7

A5

VID5

C6

VID4

A6

VID3

A4

VID2

C5

VID1

B5

VID0

AC6

A3

PSI_L is a Power Status Indicator signal. This signal is asserted when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports “skipmode, or diode emulation mode”. PSI_L is asserted by the processor during the C3 and S1 states.

E10

AE9

TDO

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

AE7 AD7 AE8 AB8 AF7

J7 H8 AF8 AE6 K8 C4

H16 B18

B3 C1

H6 G6 D5

R24 W18 R23 AA8 H18 H19

1 2

CPU_PRESENT#

T24T24

CPU_DBREQ#

CPU_TDO

CPU_TEST24_SCANCLK1 CPU_TEST23_TSTUPD CPU_TEST22_SCANSHIFTEN CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2

CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN#

CPU_MA_RESET# CPU_MB_RESET#

CPU_RSVD_VIDSTRB1 CPU_RSVD_VIDSTRB0

CPU_RSVD_VDDNB_FB_P CPU_RSVD_VDDNB_FB_N CPU_RSVD_CORE_TYPE

CPU_RSVD_15 CPU_RSVD_16 CPU_RSVD_17 CPU_RSVD_18 CPU_RSVD_19 CPU_RSVD_20

H_THERMTRIP# 19

VID5 50 VID4 50 VID3 50 VID2 50 VID1 50 VID0 50

CPU_PSI# 50

R490 80.6_FR490 80.6_F

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

12

T29T29 T109T109 T30T30 T112T112 T27T27

T28T28 T26T26

T120T120 T123T123

T22T22 T23T23

T98T98 T100T100 T101T101

T133T133 T121T121 T132T132 T107T107 T125T125 T127T127

AMD NPT S1 SOCKET

12

R98 220_NCR98 220_NC

R101 220_NCR101 220_NC

R492 220_NCR492 220_NC

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

A A

+1.8V_SUS

R494 220_NCR494 220_NC

NOTE:HDT TERMINATION IS REQUIRED FOR REV.Ax SILICON ONLY.

R493 220_NCR493 220_NC

5

HDT CONNECTOR

JHDT1

GND1GND Resreved13GND Resreved25GND DBREQ_L7GND DBRDY9GND TCK11GND TMS13GND

15

TDI

GND TRST_L17GND TDO19GND VDDIO121GND VDDIO223RESET_L

GND

HDT conn_NC

2 4 6 8 10 12 14 16 18 20 22 24 25

12

R64

4.7K

R66

R66 100K_NC

100K_NC

+1.8V_RUN+3.3V_RUN

MMBT3904

12

R67

4.7K

2

Q13

LDT_RST#CPU_RESET#

13

4

3

Processor Socket

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

COMPUTER

ATHLON64 CTRL & DEBUG

MGD 3A

1

10 89Thursday, March 01, 2007

of

5

4

3

2

1

+VCC_CORE

C539

U7F

+VCC_CORE +VCC_CORE

D D

C C

B B

A1

AC4 AD2

M10

N11

R11

U11 U13

G4 H2

J9 J11 J13

K6

K10 K12 K14

L4

L7

L9

L11 L13

M2 M6 M8

N7 N9

P8

P10

R4 R7 R9

T2

T6

T8

T10 T12 T14

U7 U9

V6

V8

V10

U7E

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42

POWER

Athlon 64 S1 Processor Socket

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8

VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

+1.8V_SUS

A26

AA4 AA11 AA13 AA15 AA17 AA19

AB2

AB7

AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD6

AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

F11 F13 F15 F17 F19 F21 F23 F25

B4 B6 B8 B9

D6 D8 D9

E4 F2

H7 H9

J4

U7F

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

Athlon 64 S1 Processor Socket

GROUND

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

1

22U

6.3

6.3 0805

0805

2

X6S

+VCC_CORE

C557

1

22U

6.3

6.3 0805

0805

2

X6S

+1.8V_SUS

C566

1

22U

6.3

6.3 0805

0805

2

X6S

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8V_SUS

C186

C186 10U

10U

10

1 2

0805

0805 X7R

X7R

+1.8V_SUS

12

C594

0.01U_16V

C117

4.7U

10

1 2

0805

0805 X7R

X7R

BOTTOMSIDE DECOUPLING

C538

1 2

C540

4.7U

10

10 0805

0805 X7R

X7R

1

2

1

2

1

2

1 2

12

C529

C529 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C554

C554 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C569

C569 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C184

C184 10U

10U

10

10 0805

0805 X7R

X7R

C568 to be placed as close as possible to the socket

C595

0.01U_16V

C538

1

22U

6.3

6.3 0805

0805

2

X6S

C560

0.22U

10

10 0603

0603

C571

0.22U

10

10 0603

0603

C187

C187 10U

10U

10

1 2

0805

0805 X7R

X7R

12

C568

180P_50V

C552

4.7U

10

1 2

0805

0805 X7R

X7R

1

2

12

+0.9V_DDR_VTT

C121

4.7U

10

1 2

0805

0805 X7R

X7R

+0.9V_DDR_VTT

C530

C530 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C528

0.22U

10

10 0603

0603

C576

0.22U

10

10 0603

0603

1 2

C597

180P_50V

C185

C185 10U

10U

10

10 0805

0805 X7R

X7R

1

2

1

2

12

C567

C567 22U_NC

22U_NC

6.3

6.3 0805

0805 X6S

X6S

12

C565

0.22U

10

10 0603

0603 X7R

X7R

C550

C550 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C535

0.01U_16V

C601

0.22U

10

10 0603

0603 X7R

X7R

C598

180P_50V

C549

1

22U

6.3

6.3 0805

0805

2

X6S

12

C558

180P_50V

C597,and C598 to be evenly spaced along the VDDIO/VSS plane split

C544

0.22U

10

10 0603

0603 X7R

X7R

1

2

C543

1

22U_NC

6.3

6.3 0805

0805

2

X6S

22uF/0805/6.3V/X6S

0.22uF/0603/10V/X7R

0.01uF/0402/16V/X7R 180pF/0402/50V/NPO

C593

0.22U

10

10 0603

0603 X7R

X7R

C545

C545 22U

22U

6.3

6.3 0805

0805 X6S

X6S

C600

0.22U

10

10 0603

0603 X7R

X7R

22uF/0805/6.3V/X6S 10uF/0805/10V/X7R

4.7uF/0805/10V/X7R

0.22uF/0603/10V/X7R

0.01uF/0402/16V/X7R 1000pF/0402/50V/X7R 180pF/0402/50V/NPO

C551

0.22U

10

10 0603

0603 X7R

X7R

C555

0.22U

10

10 0603

0603 X7R

X7R

C592

0.22U

10

10 0603

0603 X7R

X7R

12

C118

Athlon 64 S1g1

uPGA638

A A

Top View

C118

1000p_50V

12

C546

1000p_50V

12

C120

1000p_50V

12

C556

1000p_50V

12

C119

180P_50V

12

C553

180P_50V

12

C562

180P_50V

AF1

PROCESSOR POWER AND GROUND

5

4

3

2

12

C122

180P_50V

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ATHLON64 PWR & GND

MGD 1A

1

of

11 89Thursday, March 01, 2007

5

D D

4

3

2

1

Change Part Number

U5A

Rev.A12

P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22

N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25

L21 L22

J24 J25

N23 P23

HT_TXCALP

C25

HT_TXCALN

D24

Place R450 < 100 mils from U5A.C25 and U5A.D24

HT_CADIN15 8 HT_CADIN#15 8 HT_CADIN14 8 HT_CADIN#14 8 HT_CADIN13 8 HT_CADIN#13 8 HT_CADIN12 8 HT_CADIN#12 8 HT_CADIN11 8 HT_CADIN#11 8 HT_CADIN10 8 HT_CADIN#10 8 HT_CADIN9 8 HT_CADIN#9 8 HT_CADIN8 8 HT_CADIN#8 8

HT_CADIN7 8 HT_CADIN#7 8 HT_CADIN6 8 HT_CADIN#6 8 HT_CADIN5 8 HT_CADIN#5 8 HT_CADIN4 8 HT_CADIN#4 8 HT_CADIN3 8 HT_CADIN#3 8 HT_CADIN2 8 HT_CADIN#2 8 HT_CADIN1 8 HT_CADIN#1 8 HT_CADIN0 8 HT_CADIN#0 8

HT_CLKIN1 8 HT_CLKIN#1 8

HT_CLKIN0 8 HT_CLKIN#0 8

HT_CTLIN0 8 HT_CTLIN#0 8

R450 100_FR450 100_F

1 2

check

HT_CADOUT158 HT_CADOUT#158 HT_CADOUT148 HT_CADOUT#148 HT_CADOUT138 HT_CADOUT#138 HT_CADOUT128 HT_CADOUT#128 HT_CADOUT118 HT_CADOUT#118 HT_CADOUT108 HT_CADOUT#108 HT_CADOUT98 HT_CADOUT#98 HT_CADOUT88

C C

B B

+VDDHT_PKG

HT_CADOUT#88

HT_CADOUT78 HT_CADOUT#78 HT_CADOUT68 HT_CADOUT#68 HT_CADOUT58 HT_CADOUT#58 HT_CADOUT48 HT_CADOUT#48 HT_CADOUT38 HT_CADOUT#38 HT_CADOUT28 HT_CADOUT#28 HT_CADOUT18 HT_CADOUT#18 HT_CADOUT08 HT_CADOUT#08

HT_CLKOUT18 HT_CLKOUT#18

HT_CLKOUT08 HT_CLKOUT#08

HT_CTLOUT08 HT_CTLOUT#08

R429 49.9_FR429 49.9_F

1 2

R453 49.9_FR453 49.9_F

1 2

HT_RXCALP HT_RXCALN

R19 R18 R21 R22 U22 U21 U18

U19 W19 W20

AC21 AB22 AB20 AA20 AA19

Y19

T24

R25

U25

U24

V23

U23

V24

V25

AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25

W21 W22

Y24 W25

P24

P25

A24

C24

HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N

HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N

HT_RXCLK1P HT_RXCLK1N

HT_RXCLK0P HT_RXCLK0N

HT_RXCTLP HT_RXCTLN

HT_RXCALP HT_RXCALN

RS690T

PART 1 OF 6

HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N

HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N

HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCTLP HT_TXCTLN

HYPER TRANSPORT CPU I/F

HT_TXCALP HT_TXCALN

A A

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

RS690T-HT LINK0 I/F

MGD 2A

12 89Thursday, March 01, 2007

of

1

of

5

4

3

2

1

D D

U5B

G5

GFX_RX0P

G4

GFX_RX0N

J8

GFX_RX1P

J7

GFX_RX1N

J4

GFX_RX2P

J5

GFX_RX2N

L8

GFX_RX3P

L7

GFX_RX3N

L4

GFX_RX4P

L5

GFX_RX4N

M8

AB7 AB6

AC4 AD4

M7 M4 M5 P8 P7

R7 R8

U4 U5

P4 P5

R4 R5

V9

W9

Y4

Y5 W4 W5

GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N

GPP_RX0P GPP_RX0N

GPP_RX1P GPP_RX1N

GPP_RX2P GPP_RX2N

GPP_RX3P GPP_RX3N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

NC_1 NC_2

RS690T

C C

PCIE_NBRX_WLANTX_P135

WLAN <-----

GIGA LAN <-----

B B

PCIE_NBRX_WLANTX_N135

PCIE_NBRX_LOMTX_P230

PCIE_NBRX_LOMTX_N230

ALINK_NBRX_SBTX_P023 ALINK_NBRX_SBTX_N023 ALINK_NBRX_SBTX_P123 ALINK_NBRX_SBTX_N123 ALINK_NBRX_SBTX_P223 ALINK_NBRX_SBTX_N223 ALINK_NBRX_SBTX_P323 ALINK_NBRX_SBTX_N323

PART 2 OF 6

PCIE I/F

PCIE I/F GFX

GFX

PCIE I/F GPP

PCIE I/F SB

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

PCE_PCAL PCE_NCAL

Rev.A12

DVI_C_TX2+

J1

DVI_C_TX2-

H2

DVI_C_TX1+

K2

DVI_C_TX1-

K1

DVI_C_TX0+

K3

DVI_C_TX0-

L3

DVI_C_CLK+

L1

DVI_C_CLK-

L2 N2 N1 P2 P1 P3 R3 R1 R2

V3 W3

PCIE_NBTX_WLANRX_P1

W1

PCIE_NBTX_WLANRX_N1

W2

PCIE_NBTX_LOMRX_P2

U2

PCIE_NBTX_LOMRX_N2

U1

V2 V1

ALINK_NBTX_SBRX_P0

AC1

ALINK_NBTX_SBRX_N0

AC2

ALINK_NBTX_SBRX_P1

AB1

ALINK_NBTX_SBRX_N1

AB2

ALINK_NBTX_SBRX_P2

AA1

ALINK_NBTX_SBRX_N2

AA2

ALINK_NBTX_SBRX_P3

Y2

ALINK_NBTX_SBRX_N3

Y3

PCE_PCAL

AE4

PCE_NCAL

AE3

Place near RS690T

C72 0.1U_16VC72 0.1U_16V

1 2

C71 0.1U_16VC71 0.1U_16V

1 2

C80 0.1U_16VC80 0.1U_16V

1 2

C75 0.1U_16VC75 0.1U_16V

1 2

C73 0.1U_16VC73 0.1U_16V

1 2

C74 0.1U_16VC74 0.1U_16V

1 2

C81 0.1U_16VC81 0.1U_16V

1 2

C82 0.1U_16VC82 0.1U_16V

1 2

C85 0.1U

C83 0.1U

C94 0.1U

C91 0.1U

C89 0.1U

C87 0.1U

R83 562_FR83 562_F

1 2

R82 2K_FR82 2K_F

1 2

X7R

DVI_TX2+ DVI_TX2DVI_TX1+ DVI_TX1DVI_TX0+ DVI_TX0DVI_CLK+ DVI_CLK-

10C85 0.1U

10

C86 0.1U

10C83 0.1U

10

C84 0.1U

10C94 0.1U

10

C96 0.1U

10C91 0.1U

10

C92 0.1U

10C89 0.1U

10

C90 0.1U

10C87 0.1U

10

C88 0.1U

+1.2V_VDDA12

DVI_TX2+

DVI_TX2-

DVI_TX1+

DVI_TX1-

DVI_TX0+ DVI_TX0DVI_CLK+ DVI_CLK-

No placement limitation, minimum stub

R454 750 1%R454 750 1% R452 750 1%R452 750 1% R465 750 1%R465 750 1% R460 750 1%R460 750 1% R73 750 1%R73 750 1% R74 750 1%R74 750 1% R75 750 1%R75 750 1% R76 750 1%R76 750 1%

Layout Note :750 ohm resistors are placed at the same via as the series capacitors

10C86 0.1U

10

X7R

10C84 0.1U

10

X7R

10C96 0.1U

10

X7R

10C92 0.1U

10

X7R

10C90 0.1U

10

X7R

10C88 0.1U

10

X7R

DVI_TX2+ 36 DVI_TX2- 36 DVI_TX1+ 36 DVI_TX1- 36 DVI_TX0+ 36 DVI_TX0- 36

DVI_CLK+ 36

DVI_CLK- 36

PCIE_NBTX_C_WLANRX_P1 35 PCIE_NBTX_C_WLANRX_N1 35

PCIE_NBTX_C_LOMRX_P2 30 PCIE_NBTX_C_LOMRX_N2 30

ALINK_NBTX_C_SBRX_P0 23 ALINK_NBTX_C_SBRX_N0 23 ALINK_NBTX_C_SBRX_P1 23 ALINK_NBTX_C_SBRX_N1 23 ALINK_NBTX_C_SBRX_P2 23 ALINK_NBTX_C_SBRX_N2 23 ALINK_NBTX_C_SBRX_P3 23 ALINK_NBTX_C_SBRX_N3 23

----->WLAN

----->GIGA LAN

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

RS485-PCIE LINK I/F

MGD 3A

1

of

13 89Thursday, March 01, 2007

5

+1.8V_RUN

L19

BLM15AG221SN1D

L18

D D

L18

BLM15AG221SN1D

+1.8V_AVDDQ

C52

10U_10V_0805_NC

1 2

+1.8V_PLLVDD

C53

10U_10V_0805_NC

1 2

12

C453

2.2U_10V_0603

12

C54

2.2U_10V_0603

TV_CVBS TV_Y TV_C

R435, R451 and R444 should be placed close to NB

+1.8V_RUN

BLM15AG221SN1D

C C

LDT_STOP#10,23

+1.2V_VDDA12 +1.2V_PLLVDD12

L53

BLM15AG221SN1D

B B

BMREQ#23

U32

1

NC

2

A1

3

A A

A2

4

VSS

AT24C04N-10SU-2.7_NC

NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS IS MANDATORY.

L22

+1.8V_HTPVDD

1 3

12

C451

2.2U_10V_0603

+3.3V_RUN

1 2

8

VCC

7

WP

6

SCL

5

SDA

5

C66

10U_10V_0805_NC

1 2

+1.8V_RUN

R47

4.7K

1 2 2

Q12

MMBT3904

+3.3V_RUN

R441

R441 10K_NC

10K_NC

C466

C466 15P_NC

15P_NC

+3.3V_RUN

12

C64

4.7U_6.3V_0603

+3.3V_RUN

R49

10K

1 2

LDT_STOP#_NB

R71 4.7KR71 4.7K

1 2

D23

SDMK0340L-7-F_NC

R434 0R434 0

12

R458

R457

10K_NC

2K_NC

1 2

LCD_DDCCLK NB_VCORE_CNTRL

12

R456

C483

0.1U_NC

16

R456 2K_NC

2K_NC

12

SUS_STAT#

CLK_HTREF_66M7

CLK_NB_14M7

C68

C68 1U

1U

6.3

6.3 X5R

X5R

BMREQ#_D

DVI_DETECT36

4

12

R435

R435 150

150

1%

+1.2V_VDDA12 +1.2V_VDDPLL

12

R451

R451 150

150

1%

VGA_RED21,36 VGA_GRN21,36 VGA_BLU21,36

L58

1 2

BLM21PG221SN1D

0805Imax = 2

R444

R444 150

150

1%

R446,R455,R461 CLOSE TO NB

12

RS690: 220 Ohm 2A FB

AC Term closely clock pin for length: 50 mils

R433

1 2

22_NC

R427

1 2

33 1%

AC Term closely clock pin for length: 50 mils

NB_THERMDA19

NB_THERMDC19

1 2

C456

22P50 NPO

Place C98 < 100mils from RS690T

For DVI Hot Plug

TMDS_HPD

4

12

1 2

C46

0.01U

X7R

X7R 16

16 0603

0603

R510R51

+1.8V_RUN

12

R446

R446 150

150

1%

1% 0402

0402

C485

4.7U_6.3V_0603

PLTRST_SYS#22,30,35,43,49

ALLOW_LDTSTOP23

C464

C464 22P_NC50

22P_NC50

CLK_NB_GFX7 CLK_NB_GFX#7

CLK_NB_SBLINK7 CLK_NB_SBLINK#7

0

+3.3V_RUN

1 2

BLM18PG330SN1_0603

R60 0R60 0

12

R455

R461

150

1%

0402

C478

C478 1U

1U

10

10 0603

0603 X6S

X6S +/-10%

+/-10%

NB_PWRGD20,39

SUS_STAT#24

C98

C98 220P

220P

50V

1 2

12

R50

R50 100K

100K

LCD_DDCDAT

DDC_DATA

L20

+1.8V_RUN_AVDDDI

12

+1.8V_AVDDQ

G_CLK_DDC221

G_DAT_DDC221

R425 0R425 0

1 2

R431 0R431 0

1 2

+1.2V_PLLVDD12

LCD_DDCCLK20 LCD_DDCDAT20

12

R69

4.7K

3

+3.3V_AVDD

12

C57

2.2U_10V_0603

U5C

C56

2.2U_10V_0603

TV_C22,36 TV_Y22,36

TV_CVBS22,36

CRT_VSYNC21 CRT_HSYNC21

R432 715_FR432 715_F

+1.8V_PLLVDD

+1.8V_HTPVDD

R70 10KR70 10K

1 2

R72 0R72 0

NB_VCORE_CNTRL49

12

R58

4.7K

3

12

LDT_STOP#_NB

12

BMREQ#_D

TMDS_HPD DDC_DATA

+3.3V_RUN +5V_RUN

LCD_DDCCLK DVI_SCLK

12

+3.3V_RUN

R46

4.7K

R59 0_NCR59 0_NC

R57 0R57 0

B22 C22 G17 H17 A20 B20

A21 A22

C21 C20 D19

E19

F19

G19

B21

A10 B10

B24 B25

G9

C10 C11

C23 B23

B11 A11

G1 G2

AD5 AE5

C14

12

R45

4.7K

12

U5C

AVDD1 AVDD2 AVSSN1 AVSSN2 AVDDDI AVSSDI

AVDDQ AVSSQ

C_R Y_G COMP_B

RED GREEN BLUE

C6

DACVSYNC

A5

DACHSYNC

RSET

B6

DACSCL

A6

DACSDA

PLLVDD18(PLLVDD) PLLVSS

HTPVDD HTPVSS

E7

VDDPLL_1(VDDA12)

F7

VDDPLL_2(VDDA12)

F9

VSSPLL_1(VSSA12) VSSPLL_2(VSSA12)

SYSRESET# POWERGOOD

C5

LDTSTOP#

B5

ALLOW_LDTSTOP

HTTSTCLK HTREFCLK

C2

TVCLKIN

OSCIN PLLVDD12(OSCOUT)

F2

GFX_CLKP

E1

GFX_CLKN

SB_CLKP SB_CLKN

B2

BMREQb

A2

I2C_CLK

B4

I2C_DATA THERMALDIODE_P THERMALDIODE_N

TMDS_HPD

B3

DDC_DATA

C3

TESTMODE

A3

STRP_DATA

RS690T

CRT/TVOUT

2

Q10

31

2N7002W-7-F

2

Q11

31

2N7002W-7-F

PART 3 OF 6

PLL PWR

PM

CLOCKs

MIS.

12

DVI_SCLK

+5V_RUN

12

DVI_SDAT

R36

4.7K

R37

4.7K

2

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN

LPVDD LPVSS

LVDDR18D_1 LVDDR18D_2 LVDDR33A_1 LVDDR33A_2

LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8

LVSSR12 LVSSR13

LVDS_DIGON

LVDS_BLON LVDS_BLEN

DFT_GPIO0 DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5

Rev.A12

2

B14 B15 B13 A13 H14 G14 D17 E17

A15 B16 C17 C18 B17 A17 A18 B18

E15 D15 H15 G15

+LPVDD

D14 E14

A12

+LVDDR18D

B12 C12

+LVDDR33A

C13

A16 A14 D12 C19 C15 C16

F14 F15

E12 G12 F12

DFT_GPIO0

D6

LOAD_ROM#

D7

DFT_GPIO2

C8

DFT_GPIO3

C7

DFT_GPIO4

B8

DFT_GPIO5

A8

DVI_SCLK 21,36

DVI_SDAT 36

1

LCD_A0+ 20 LCD_A0- 20 LCD_A1+ 20 LCD_A1- 20 LCD_A2+ 20 LCD_A2- 20

LCD_B0+ 20 LCD_B0- 20 LCD_B1+ 20 LCD_B1- 20 LCD_B2+ 20 LCD_B2- 20

14 89Thursday, March 01, 2007

+3.3V_RUN

12

C452

4.7U_6.3V_0603

of

LCD_ACLK+ 20 LCD_ACLK- 20 LCD_BCLK+ 20 LCD_BCLK- 20

12

C55

C477

2.2U_10V_0603

0.1U_10V

1 2

12

C461

C463

2.2U_10V_0603

0.1U_10V

1 2

12

R459

R459 100K

100K

R423 3KR423 3K

1 2

R449 3K_NCR449 3K_NC

1 2

R424 3K_NCR424 3K_NC

1 2

R420 3K_NCR420 3K_NC

1 2

R421 3K_NCR421 3K_NC

1 2

R422 3K_NCR422 3K_NC

1 2

DFT_GPIO5 22

PU by internal PD by external

DFT_GPIO0

DFT_GPIO1

DFT_GPIO[4:2]

DFT_GPIO5

Title

Size Document Number Rev

Date: Sheet

Side-Port Memory Disable

Bypassing EEPROM, use default values

(Default)

Set PCI-E GPP mode to Conf. E Use default values Use the memory data bus

(Default)

QUANTA

QUANTA COMPUTER

COMPUTER

RS690T-LVDS

MGD 2A

+1.8V_RUN

L16

BLM15AG221SN1D

L54

BLM15AG221SN1D

1 2

EN_LCDVDD 20 BIA_PWM 20 PANEL_BKEN 38

Side-Port Memory Enable

Using EEPROM Strapping

Select PCI-E GPP mode

for debug bus output

1

+1.8V_RUN

C468

0.1U_10V

(Default)

L55

1 2

BLM15AG221SN1D

5

4

3

2

+1.2V_RUN

1

+1.2V_RUN

12

C103

10U_6.3V_0603

D D

10U_6.3V_0603

12

C102

10U_6.3V_0603

12

+1.8V_RUN

1 2

BLM21PG221SN1D_0805

220 ohm @ 100MHz, 2A

+3.3V_RUN

C503

1U_6.3V

L52

12

BLM15AG221SN1D

40mil Width

12

C505

10U_6.3V_0603

C C

+1.8V_RUN

B B

L61

1 2

BLM21PG221SN1D_0805

80mil Width

12

C522

10U_6.3V_0603

12

C506

10U_6.3V_0603

12

C523

10U_6.3V_0603

12

C521

1U_6.3V

12

C516

1U_6.3V

C511

1U_6.3V

30mil Width

12

C457

1U_10V_0603

L57

1 2

12

C500

1U_6.3V

12

C99

1U_6.3V

C496

C496 1U

1U

10

10 0603

0603 X6S

X6S

+1.8V_VDD_MEM

C515

1U_6.3V

12

C100

1U_6.3V

12

C458

1U_10V_0603

12

C467

2.2U_10V_0603

+1.2V_VDDA12

12

C499

1U_6.3V

12

C514

1U_6.3V

C504

0.1U

16

16 X7R

X7R +/-10%

+/-10%

+1.8V_VDD

+VDDHT_PKG

+3.3V_VDDR

20mil Width

C498

C498 1U

1U

10

10 0603

0603 X6S

X6S

12

C517

1U_6.3V

12

C510

0.1U_NC

16V

16V X5R, 10%

X5R, 10%

C513

0.1U_NC

16V

16V X5R, 10%

X5R, 10%

source

C488

0.1U_NC

16V

16V X5R, 10%

X5R, 10%

AE24

AD24

AE25 AE22

AD22

AE23

AD23

D22

D11

AC5 AB3

AB4 AC3 AD2 AE2

AD6 AC7 AC8 AA9 AD7 AB9 AE6 AE8 AE7 AD8

J14 J15

E11

U7

W7

U5D

VDD_HT1 VDD_HT2 VDD_HT3 VDD_HT4 VDD_HT5 VDD_HT6 VDD_HT7

VDDHT_PKG

VDD18_1 VDD18_2

VDDR3_2 VDDR3_1

VDDA12_13 VDDA12_14 VDDA12_15 VDDA12_16 VDDA12_17 VDDA12_18 VDDA12_19 VDDA12_20

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6 VDD_MEM7 VDD_MEM9 VDD_MEM10 VDD_MEM11

RS690T

PART 4 OF 6

VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8

VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12

VDDA12_PKG2 VDDA12_PKG1

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

POWER

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32

Rev.A12

D1 G7 E2 C1 E3 D2 M9 F4 B1 D3 L9 E6 AD3 M1

L11 L13 L15 M12 R15 M14 N11 N13 N15 J11 H11 P12 P14 R11 R13 A19 B19 U11 U14 P17 L17 J19 D20 G20 A9 B9 C9 D9 A7 A4 U12 U15

+1.2V_VDDA12

C482

C482 1U

1U

10

10 0603

0603 X6S

X6S +/-10%

+/-10%

C494 10U

12

C495

C495 10U

10U

％

±20

±20 4

4 0805

0805 X6S

X6S EP

EP

C490

C490 1U

1U

10

10 0603

0603 X6S

X6S +/-10%

+/-10%

X5RC494 10U

X5R

10 0805

C471

0.1U

10

10 X7R

X7R

100 mil Width

C479

12

C465

C519

1U

10

10 0603

0603 X6S

X6S +/-10%

+/-10%

C486

C481

0.1U

10

10 X7R

X7R

C486

0.1U

10

10 X7R

X7R

C487

0.1U

10

10 X7R

X7R

12

C497

C497 10U

10U

EP

EP X6S

X6S 0805

0805

％

±20

±20 4

4

1U_6.3V

C519

10U_6.3V_0603

+NB_VCORE

C491

0.1U

10

10 X7R

X7R

C493

0.1U

10

10 X7R

X7R

L62

L62 BLM21PG221SN1D_0805

BLM21PG221SN1D_0805

220 ohm @ 100MHz, 2A

1 2

12

C524

10U_6.3V_0603

C492

0.1U

10

10 X7R

X7R

U5E

A25

VSS1

F11

VSS2

D23

VSS3

E9

VSS4

G11

VSS5

Y23

VSS6

P11

VSS7

R24

VSS8

AC18

VSS9

M15

VSS10

J22

VSS11

G23

VSS12

J12

VSS13

L12

VSS14

L14

VSS15

L20

VSS16

L23

VSS17

M11

VSS18

M20

VSS19

M23

VSS20

M25

VSS21

N12

VSS22

N14

VSS23

B7

VSS24

L24

VSS25

P13

VSS26

P20

VSS27

P15

VSS28

R12

VSS29

R14

VSS30

R20

VSS31

W23

VSS32

Y25

VSS33

AD25

VSS34

U20

VSS35

H25

VSS36

W24

VSS37

Y22

VSS38

AC23

VSS39

D25

VSS40

G24

VSS41

AA14

VSS42

H12

VSS43

AC22

VSS44

R23

VSS45

C4

VSS46

Y12

VSS47

T23

VSS48

T25

VSS49

V11

VSS50

R17

VSS51

H23

VSS52

RS690T

PAR 5 OF 6

GROUND

VSSA1 VSSA2 VSSA3 VSSA4 VSSA5 VSSA6 VSSA7 VSSA8

VSSA9 VSSA10 VSSA11 VSSA12 VSSA13 VSSA14 VSSA15 VSSA16 VSSA17 VSSA18 VSSA19 VSSA20 VSSA21 VSSA22 VSSA23 VSSA24 VSSA25 VSSA26 VSSA27 VSSA28 VSSA29 VSSA30

VSS66

VSS65

VSS64

VSS62

VSS63

VSS61

VSS60

VSS59

VSS58

VSS57

VSS56

VSS55

VSS54

VSS53

Rev.A12

M3 P9 G6 AE1 F3 AD1 A1 H1 G3 J2 H3 AA3 J6 Y7 F1 L6 M2 M6 J3 P6 T1 N3 R9 R6 T2 T3 U3 U6 W6 Y1

AC12 AC10 V14 W17 AB19 AE18 AE14 M13 AA7 D4 F17 AC6 A23 M17

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

RS690-POWER

MGD 2A

1

of

15 89Thursday, March 01, 2007

1

2

3

4

5

6

7

8

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

B7 A8

F7 E8

A2 E2 L1 R3 R7 R8

J2

A1 E1 J9 M9 R1

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

Bit Swap

MEM_DQ5 MEM_DQ3 MEM_DQ0 MEM_DQ6 MEM_DQ2 MEM_DQ4 MEM_DQ1 MEM_DQ7 MEM_DQ15 MEM_DQ9 MEM_DQ11 MEM_DQ12 MEM_DQ8 MEM_DQ13 MEM_DQ10 MEM_DQ14

MEM_DQS_P1 MEM_DQS_N1

MEM_DQS_P0 MEM_DQS_N0

MEM_BA2

MEM_VREF

+1.8V_MEM_VDDQ

MEM_A0 MEM_A1

MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS#

MEM_CKE MEM_ODT

MEM_CLKP MEM_CLKN

MEM_DM0 MEM_DM1

MEM_DQS_P0 MEM_DQS_N0 MEM_DQS_P1 MEM_DQS_N1

U6

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8

L63

1 2

12

C532

4.7U_6.3V_0603

MEM_A9 MEM_A10 MEM_A11 MEM_A12

MEM_BA0 MEM_BA1

MEM_DM1 MEM_DM0

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT MEM_CLKP

MEM_CLKN

A A

Place R504 to close to U5.

+1.8V_MEM_VDDQ

B B

R504 68R504 68

BLM18AG601SN1D_0603

Place This CAP near to SDRAM with 0.2".

U6

M8

A0

M3

A1

M7

A2

N2

A3

N8

A4

N3

A5

N7

A6

P2

A7

P8

A8

P3

A9

M2

A10

P7

A11

R2

A12

L2

BA0

L3

BA1

B3

UDM

F3

LDM

K7

RAS

L7

CAS

K3

WE

L8

CS

K2

CKE

K9

ODT

J8

CLK

K8

CLK#

J1

VDDL

J7

VSSDL

A3

VSS_0

E3

VSS_1

J3

VSS_2

N1

VSS_3

P9

VSS_4

A7

VSSQ_0

B2

VSSQ_1

B8

VSSQ_2

D2

VSSQ_3

D8

VSSQ_4

E7

VSSQ_5

F2

VSSQ_6

F8

VSSQ_7

H2

VSSQ_8

H8

VSSQ_9

HY5PS561621AFP-25

400M PBGA84

400M PBGA84 256M EP

256M EP

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

UDQS

UDQS#

LDQS

LDQS#

NC1

NC2

NC3

NC4

NC5

NC6

VREF

VDD_0 VDD_1 VDD_2 VDD_3 VDD_4

VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9

256-Mbit DDR2 16Mbit*16(4bank)

C C

+1.8V_MEM_VDDQ+1.8V_MEM_VDDQ

12

R495

C548

1K_F

0.1U_10V

1 2

C547

0.1U_10V

1 2

D D

12

R496

R496 1K_F

1K_F

MEM_VREF

C520

0.1U_10V

1 2

C509

0.1U_10V

1 2

12

R476

R476 1K_F

1K_F

MEM_VREF1

12

R475

R475 1K_F

1K_F

+1.8V_RUN

+0.9V_MEM_VTT

C116

100U_6.3V_3528

L64

1 2

BLM21PG221SN1D_0805

12

C108

22U_6.3V_0805

+1.8V_MEM_VDDQ

1.8V_RUN_ENABLE42

12

C533

22U_6.3V_0805

Local Frame Buffer(64MB) DDRII Power

1

2

3

4

U5F

W12

MEM_A0

AD10

MEM_A1

AB12

MEM_A2

AB11

MEM_A3

W14

MEM_A4

AB15

MEM_A5

AB14

MEM_A6

AE9

MEM_A7

AA12

MEM_A8

AC9

MEM_A9

AE10

MEM_A10

Y14

MEM_A11

AD9

MEM_A12

AA11

MEM_A13

AC11

MEM_BA0

AE11

MEM_BA1

AD11

MEM_BA2

AA15

MEM_RASb

Y15

MEM_CASb

AC14

MEM_WEb

V12

MEM_CSb

AD12

MEM_CKE

Y9

MEM_ODT

W15

MEM_CKP

V15

MEM_CKN

AC16

MEM_DM0

AD19

MEM_DM1

AE17

MEM_DQS0P

AD17

MEM_DQS0N

AD21

MEM_DQS1P

AC20

MEM_DQS1N

RS690T

BSC032N03S-G_PG-TDSON-8

1 2 3

12

C537

+

330U_6.3V_ESR25

Q16

4

5

PAR 6 OF 6

SBD_MEM_I/F

+0.9V_DDR_VTT

5

12

C559

0.1U_10V

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8

MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15

MEM_COMPP MEM_COMPN

MEM_VREF

IOPLLVDD18

IOPLLVSS

IOPLLVDD12

Rev.A12

12

C542

0.1U_10V

MEM_DQ0

AD13

MEM_DQ1

AE13

MEM_DQ2MEM_A2

AC13

MEM_DQ3

AD14

MEM_DQ4

AC15

MEM_DQ5

AD15

MEM_DQ6

AE15

MEM_DQ7

AE16

MEM_DQ8

AD16

MEM_DQ9

AC17

MEM_DQ10

AD18

MEM_DQ11

AE19

MEM_DQ12

AC19

MEM_DQ13

AE20

MEM_DQ14

AD20

MEM_DQ15

AE21

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

Y11 W11 AE12 AA17 Y17 AB17

MEM_A2 MEM_A0 MEM_A6 MEM_A4 MEM_A11 MEM_A8 MEM_A5 MEM_A7 MEM_A3 MEM_A9 MEM_BA2 MEM_A10 MEM_A12 MEM_A1 MEM_BA1 MEM_BA0

MEM_RAS# MEM_CAS# MEM_WE#

MEM_CS# MEM_CKE MEM_ODT

6

MEM_COMP_P MEM_COMP_N MEM_VREF1 +1.8V_IOPLLVDD

+1.2V_IOPLLVDD

R471 40.2_FR471 40.2_F

1 2

R474 40.2_FR474 40.2_F

1 2

L59

1 2

BLM15AG221SN1D

C508

12

2.2U

10

10 10%

10% 0603

0603 X7R

X7R EP

EP

RP15 4P2R-47RP15 4P2R-47

1 2 3 4

RP13 4P2R-47RP13 4P2R-47

1 2 3 4

RP14 4P2R-47RP14 4P2R-47

1 2 3 4

RP9 4P2R-47RP9 4P2R-47

1 2 3 4

RP12 4P2R-47RP12 4P2R-47

1 2 3 4

RP10 4P2R-47RP10 4P2R-47

1 2 3 4

RP8 4P2R-47RP8 4P2R-47

1 2 3 4

RP11 4P2R-47RP11 4P2R-47

1 2 3 4

R503 47R503 47

1 2

R502 47R502 47

1 2

R489 47R489 47

1 2

R500 47R500 47

1 2

R488 47R488 47

1 2

R501 47R501 47

1 2

Title

Size Document Number Rev

Date: Sheet

+1.2V_VDDA12

+0.9V_MEM_VTT

C572 0.1U_10VC572 0.1U_10V

C107 0.1U_10VC107 0.1U_10V

C561 0.1U_10VC561 0.1U_10V

C112 0.1U_10VC112 0.1U_10V

C563 0.1U_10VC563 0.1U_10V

C534 0.1U_10VC534 0.1U_10V

C570 0.1U_10VC570 0.1U_10V

C104 0.1U_10VC104 0.1U_10V

C527 0.1U_10VC527 0.1U_10V

C105 0.1U_10VC105 0.1U_10V

C573 0.1U_10VC573 0.1U_10V

C123 0.1U_10VC123 0.1U_10V

QUANTA

QUANTA COMPUTER

COMPUTER

RS690T-SIDE PORT I/O

MGD 3A

7

+1.8V_MEM_VDDQ

12

C507

2.2U_10V_0603

12

L60

1 2

BLM15AG221SN1D

+1.8V_MEM_VDDQ

16 89Thursday, March 01, 2007

8

+1.8V_RUN

of

A

+1.8V_SUS +1.8V_SUS

JDIM2

1

VREF

3

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0

12

DDR_A_DQS0

DDR_A_D6 DDR_A_D2

DDR_A_D9 DDR_A_D13

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D14 DDR_B_D10 DDR_A_D11

DDR_A_D16 DDR_A_D21

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D23 DDR_A_D18

DDR_A_D29 DDR_A_D25

DDR_A_DM3

DDR_A_D30 DDR_A_D27

DDR_A_MA12 DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS0 DDR_A_WE#

DDR_A_CAS#

M_ODT1

DDR_A_D36 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D35 DDR_A_D34

DDR_A_D45 DDR_A_D44

DDR_A_DM5

DDR_A_D43 DDR_A_D47

DDR_A_D49 DDR_A_D52

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51 DDR_A_D54

DDR_A_D56 DDR_A_D61

DDR_A_DM7

DDR_A_D58 DDR_A_D59

MEM_SDATA MEM_SCLK

C282

2.2U

10

10 0603

0603 X7R

X7R

C283

0.1U_10V

1 2

A

4 4

3 3

DDR_CKE0_DIMMA9,18

DDR_A_BS29,18

DDR_A_BS09,18 DDR_A_WE#9,18

DDR_A_CAS#9,18

DDR_CS1_DIMMA#9,18

M_ODT19,18

2 2

1 1

MEM_SDATA24 MEM_SCLK24

+3.3V_RUN

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

201

GNDPAD1

203

H1

FOX_AS0A426-M2SN-7F

CLOCK 0,1

PC4800 DDR2 SDRAM

VSS46

DQ4 DQ5

VSS15

DM0

VSS5

DQ6 DQ7

VSS16

DQ12 DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14 DQ15

VSS54

VSS20

DQ20 DQ21 VSS6

NC3 DM2

VSS21

DQ22 DQ23

VSS24

DQ28

DQ29 VSS25 DQS#3

DQS3

VSS10

DQ30

DQ31

VSS8

CKE1

VDD8

A15 A14

VDD11

SO-DIMM (200P)

A11

VDD4

VDD12

BA1

RAS#

S0# VDD1 ODT0

A13 VDD6

NC2

VSS12

DQ36 DQ37

VSS28

DM4

VSS42

DQ38 DQ39

VSS55

DQ44 DQ45

VSS43 DQS#5

DQS5

VSS56

DQ46 DQ47

VSS44

DQ52 DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54 DQ55

VSS35

DQ60 DQ61 VSS7

DQS#7

DQS7

VSS36

DQ62 DQ63

VSS13

SA0 SA1

GNDPAD2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

H2

DDR_A_D5 DDR_A_D4

DDR_A_DM0

DDR_A_D3 DDR_A_D7

DDR_A_D12 DDR_A_D8

DDR_A_DM1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_D10 DDR_A_D15

DDR_A_D20 DDR_A_D17

DDR_A_DM2

DDR_A_D22 DDR_A_D19

DDR_A_D28 DDR_A_D24

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D26 DDR_A_D31

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS1 DDR_A_RAS#

M_ODT0

DDR_A_MA13

DDR_A_D32 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D41 DDR_A_D40

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D42

DDR_A_D48 DDR_A_D53

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_DM6

DDR_A_D55

DDR_A_D60 DDR_A_D57

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

R566

R566 10K

10K

1 2

B

12

C635

2.2U

10

10 0603

0603 X7R

X7R

Place C635 2.2uF and C628 0.1uF < 500mils from DDR connector

M_CLK_DDR0 9 M_CLK_DDR#0 9

DDR_CKE1_DIMMA 9,18

DDR_A_BS1 9,18 DDR_A_RAS# 9,18

DDR_CS0_DIMMA# 9,18

M_ODT0 9,18

DDR_CS3_DIMMA# 9,18 DDR_CS3_DIMMB# 9,18

M_CLK_DDR0

12

C578

1.5P_50V

M_CLK_DDR#0

M_CLK_DDR1

12

C575

1.5P_50V

M_CLK_DDR#1

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

M_CLK_DDR1 9 M_CLK_DDR#1 9

R567

R567 10K

10K

1 2

SMbus address A0 SMbus address A4

B

12

C628

0.1U_10V

DDR_A_DM[0..7] 9 DDR_A_D[0..63] 9 DDR_A_DQS[0..7] 9 DDR_A_DQS#[0..7] 9 DDR_A_MA[0..15] 9,18

DDR_CKE2_DIMMB9,18

DDR_CS2_DIMMB#9,18DDR_CS2_DIMMA#9,18

DDR_B_BS29,18

DDR_B_BS09,18 DDR_B_WE#9,18

DDR_B_CAS#9,18

DDR_CS1_DIMMB#9,18

M_ODT39,18

+3.3V_RUN

C629

12

2.2U

10

10 0603

0603 X7R

X7R

C

+1.8V_SUS +1.8V_SUS

TOPBOT

JDIM1

1

VREF

3

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D3 DDR_B_D7

DDR_B_D13 DDR_B_D8

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D14 DDR_B_D11

DDR_B_D16 DDR_B_D21

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D25 DDR_B_D24

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#

DDR_B_CAS#

M_ODT3

DDR_B_D32 DDR_B_D36

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D38 DDR_B_D39

DDR_B_D41 DDR_B_D40

DDR_B_DM5

DDR_B_D42 DDR_B_D46 DDR_B_D47

DDR_B_D53 DDR_B_D48

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

MEM_SDATA MEM_SCLK

C630

0.1U_10V

1 2

C

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

201

GNDPAD1

203

H1

TYC_1775804-2

CLOCK 2,3

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

A13

VDD6

NC2

VSS12

DQ36 DQ37

VSS28

DM4

VSS42

DQ38 DQ39

VSS55

DQ44

DQ45 VSS43 DQS#5

DQS5 VSS56

DQ46

DQ47 VSS44

DQ52

DQ53 VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54

DQ55 VSS35

DQ60

DQ61

VSS7 DQS#7

DQS7 VSS36

DQ62

DQ63 VSS13

SA0 SA1

GNDPAD2

CKE 2,3CKE 0,1

H2

DDR_B_MA13

116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

R316

R316 10K

10K

1 2

DDR_B_D4 DDR_B_D5

DDR_B_DM0

DDR_B_D2 DDR_B_D6

DDR_B_D12 DDR_B_D9

DDR_B_DM1

DDR_B_D15

DDR_B_D20 DDR_B_D17

NC_PM_EXTTS#1NC_PM_EXTTS#0 DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_D33 DDR_B_D37

DDR_B_DM4

DDR_B_D34 DDR_B_D35

DDR_B_D45 DDR_B_D44

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D43

DDR_B_D52 DDR_B_D49

DDR_B_DM6

DDR_B_D54 DDR_B_D55DDR_B_D51

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

R315 10KR315 10K

D

M_CLK_DDR2 9 M_CLK_DDR#2 9

DDR_CKE3_DIMMB 9,18

+3.3V_RUN

12

D

+0.9V_DDR_REF+0.9V_DDR_REF

12

C275

2.2U

10

10 0603

0603 X7R

X7R

Place C275 2.2uF and C284 0.1uF < 500mils from DDR connector

DDR_B_BS1 9,18 DDR_B_RAS# 9,18 DDR_CS0_DIMMB# 9,18

M_ODT2 9,18

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

M_CLK_DDR2

12

C577

1.5P_50V

M_CLK_DDR#2

M_CLK_DDR3

12

C574

1.5P_50V

M_CLK_DDR#3

M_CLK_DDR3 9 M_CLK_DDR#3 9

12

C284

0.1U_10V

DDR_B_DM[0..7] 9 DDR_B_D[0..63] 9 DDR_B_DQS[0..7] 9 DDR_B_DQS#[0..7] 9 DDR_B_MA[0..15] 9,18

Note: Place C280,C277,C624,C626,C623 and C632,C631,C337,C634 close to JDIM1 Place C281,C625,C627,C279,C278 and C338,C339,C633,C340 close to JDIM2

Title

DDRII SODIMMX2

Size Document Number Rev

MGD 3A

Date: Sheet

E

+1.8V_SUS

C280 2.2U

C277 2.2U

C624 2.2U

C626 2.2U

C623 2.2U

C281 2.2U

C625 2.2U

C627 2.2U

C279 2.2U

C278 2.2U

C632 0.1U

1 2

C631 0.1U

1 2

C337 0.1U

1 2

C634 0.1U

1 2

C338 0.1U

1 2

C339 0.1U

1 2

C633 0.1U

1 2

C340 0.1U

1 2

+1.8V_SUS

R271

C330

1K

0.1U

1%

10

C331

R275

0.1U

1K

10

1%

Note: Place close to DIMM

QUANTA

QUANTA COMPUTER

COMPUTER

E

10 0603X7R

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

10X7R ±10

％

+0.9V_DDR_REF

C332

C332 1000P

1000P

50

17 89Thursday, March 01, 2007

of

1

Note: please close to DIMMA

+0.9V_DDR_VTT

C253 0.1U_10VC253 0.1U_10V

1 2

C256 0.1U_10VC256 0.1U_10V

1 2

C260 0.1U_10VC260 0.1U_10V

A A

B B

Note: please close to DIMMB

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

C C

1 2

C366 0.1U_10VC366 0.1U_10V

1 2

C645 0.1U_10VC645 0.1U_10V

1 2

C255 0.1U_10VC255 0.1U_10V

1 2

C257 0.1U_10VC257 0.1U_10V

1 2

C261 0.1U_10VC261 0.1U_10V

1 2

C614 0.1U_10VC614 0.1U_10V

1 2

C359 0.1U_10VC359 0.1U_10V

1 2

C652 0.1U_10VC652 0.1U_10V

1 2

C365 0.1U_10VC365 0.1U_10V

1 2

C357 0.1U_10VC357 0.1U_10V

1 2

C354 0.1U_10VC354 0.1U_10V

1 2

C362 0.1U_10VC362 0.1U_10V

1 2

C363 0.1U_10VC363 0.1U_10V

1 2

C367 0.1U_10VC367 0.1U_10V

1 2

C651 0.1U_10VC651 0.1U_10V

1 2

C646 0.1U_10VC646 0.1U_10V

1 2

C650 0.1U_10VC650 0.1U_10V

1 2

C616 0.1U_10VC616 0.1U_10V

1 2

C648 0.1U_10VC648 0.1U_10V

1 2

C620 0.1U_10VC620 0.1U_10V

1 2

C618 0.1U_10VC618 0.1U_10V

1 2

C346 0.1U_10VC346 0.1U_10V

1 2

C617 0.1U_10VC617 0.1U_10V

1 2

C642 0.1U_10VC642 0.1U_10V

1 2

C612 0.1U_10VC612 0.1U_10V

1 2

C621 0.1U_10VC621 0.1U_10V

1 2

C258 0.1U_10VC258 0.1U_10V

1 2

Note: Reserve stitching function for JDIM1.

+1.8V_SUS

12

+0.9V_DDR_VTT

C252

0.1U

16V

+1.8V_SUS

12

C636

0.1U

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C254

0.1U_NC

16V

+0.9V_DDR_VTT

Note: Reserve stitching function for JDIM2.

D D

+1.8V_SUS

12

+0.9V_DDR_VTT

C647

0.1U

16V

+1.8V_SUS

12

C368

0.1U_NC

16V

+0.9V_DDR_VTT

1

+1.8V_SUS

12

C259

0.1U

16V

+0.9V_DDR_VTT

2

+1.8V_SUS

12

C364

0.1U_NC

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C637

0.1U_NC

16V

+0.9V_DDR_VTT

2

+1.8V_SUS

12

C345

0.1U

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C619

0.1U_NC

16V

+0.9V_DDR_VTT

3

+1.8V_SUS

12

C615

0.1U_NC

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C360

0.1U_NC

16V

+0.9V_DDR_VTT

3

+1.8V_SUS

12

C613

0.1U_NC

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C649

0.1U

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C262

0.1U

16V

+0.9V_DDR_VTT

+1.8V_SUS

12

C622

0.1U

16V

+0.9V_DDR_VTT

4

DDR_CKE0_DIMMA9,17 DDR_CS2_DIMMA#9,17 DDR_A_RAS# 9,17

DDR_A_BS29,17

DDR_CKE1_DIMMA9,17

DDR_CKE2_DIMMB9,17 DDR_CS2_DIMMB#9,17

4

5

DDR_A_MA[0..15]9,17

DDR_A_BS09,17

DDR_A_BS19,17

DDR_B_MA[0..15]9,17

DDR_B_BS09,17

DDR_B_WE#9,17

DDR_B_BS29,17

DDR_B_BS19,17

5

DDR_A_MA[0..15]

DDR_A_MA3

DDR_A_MA1

DDR_A_MA10

DDR_A_MA12

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

R564 47R564 47

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0

DDR_B_MA1

DDR_B_MA10

DDR_B_MA9

DDR_B_MA8

DDR_B_MA5

DDR_B_MA3

DDR_CS2_DIMMB#

DDR_B_MA12

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0

47_1206_8P4R

DDR_B_MA[0..15]

47_1206_8P4R

RP22

2 4 6 8

RP23

2 4 6 8

RP24

2 4 6 8

1 2

RP19

1 2 3 4

RP18

1 2 3 4

RP1

2 4 6 8

RP2

2 4 6 8

RP3

2 4 6 8

RP7

1 2 3 4

RP6

1 2 3 4

6

1 3 5 7

4P2R-47

1 3 5 7

4P2R-47

6

+0.9V_DDR_VTT

7

RP20

47_1206_8P4R

1 3 5 7

RP21

47_1206_8P4R

1 3 5 7

RP17

1 2

4P2R-47

3 4

RP16

1 2

4P2R-47

3 4

1 2

R563 47R563 47

1 2

R565 47R565 47

RP4

47_1206_8P4R

1 3 5 7

1 2

R270 47R270 47

1 2

R269 47R269 47

1 2

R321 47R321 47

1 2

R323 47R323 47

RP5

1 2

4P2R-47

3 4

1 2

R319 47R319 47

1 2

R268 47R268 47

1 2

R322 47R322 47

1 2

R320 47R320 47

Title

DDRII TERMINATION

Size Document Number Rev

MGD 2A

Date: Sheet

DDR_A_MA6

2

DDR_A_MA7

4

DDR_A_MA11

6

DDR_A_MA14

8

2 4 6 8

DDR_CS0_DIMMA# DDR_A_RAS#

DDR_CS3_DIMMA# M_ODT0

DDR_A_MA15

DDR_A_MA13

DDR_B_MA6

2

DDR_B_MA7

4

DDR_B_MA11

6

DDR_B_MA14

8

DDR_CS0_DIMMB# DDR_B_RAS#

DDR_CS3_DIMMB# M_ODT3

DDR_B_MA15

DDR_B_MA13

QUANTA

QUANTA COMPUTER

COMPUTER

7

8

DDR_A_WE# 9,17 DDR_A_CAS# 9,17 DDR_CS1_DIMMA# 9,17 M_ODT1 9,17

DDR_CS0_DIMMA# 9,17

DDR_CS3_DIMMA# 9,17 M_ODT0 9,17

DDR_B_CAS# 9,17 DDR_CS1_DIMMB# 9,17 M_ODT2 9,17 DDR_CKE3_DIMMB 9,17

DDR_CS0_DIMMB# 9,17 DDR_B_RAS# 9,17

DDR_CS3_DIMMB# 9,17 M_ODT3 9,17

18 89Thursday, March 01, 2007

of

8

1

R167 8.2KR167 8.2K

R521

R521 10K

10K

1 2

12

+FAN1_VOUT FAN1_TACH_FB

12

C135

22U_6.3V_NC

0805

+3VSUS_THRM

1 2

R172

71.5K

1%

Rc

THERM_VSET

R165

40.2K

1%

Rd

VSET =

FAN1_TACH 39

C590

C590 100P_50V_NC

100P_50V_NC

THERM_B1

VSET=

12

+3.3V_SUS

A A

Note: VSET = (Tp-70)/21, where Tp = 70 to 101 degrees C. Tp set at 95 degrees C. Guardian temp tolerance = +-3 degrees C.

+FAN1_VOUT

B B

SDMK0340L-7-F_NC

+3.3V_SUS

C C

+1.8V_SUS +1.8V_SUS

H_THERMTRIP#10

+3.3V_SUS

D D

12

C193

0.1U_16V

12

C605

0.1U_16V

+3.3V_RUN

D26

SDMK0340L-7-F

D11

12

C134

22U_6.3V

0805

R131

1 2

49.9_F_0603

C190 needs to be placed near Guardian IC.

R182 2.2KR182 2.2K

1 2

R183 300R183 300

12

R174

8.2K

THERMATRIP2#

1

THERMATRIP3#

A00-09

Rc+Rd

J6

1 2 3

MLX_53398-0371

C167

0.1U_16V

+3.3V_SUS

12

2

1 3

2

Rd

Tp-70

21

+RTC_CELL

12

C176

0.1U

0603

0603 16

16 X7R

X7R

R168

8.2K

THERMATRIP1#

Q20

Q20 MMST3904

MMST3904

2

x 3.3V

H_THERMDA10

H_THERMDC10

12

C190

0.1U_16V

3

REM_DIODE2_N

C175

C175 220P

220P

50

REM_DIODE2_P

Put C175 close to Guardian. Put C541 close to Diode

13

2

Place under CPU

C188

C188 220P

220P

50

SUSPWROK39,43 SB_PWRGD#43

THRM_SMBDAT39,46

THRM_SMBCLK39,46

GDS 2N7002W-7-F

MDC_RST_DIS#34

AUDIO_AVDD_ON28

3

1

2

3

R140 1KR140 1K R177 1KR177 1K

R133 1KR133 1K

+FAN1_VOUT

R558 0_NCR558 0_NC

R556 0_NCR556 0_NC

Q62

Q62 MMST3904

MMST3904

+RTC_CELL

1 2 1 2

1 2

Q67

Q67 2N7002W-7-F

2N7002W-7-F

3 1

2

3 1

2N7002W-7-F

2N7002W-7-F Q66

Q66

C541

C541 220P

220P

50

EMC_SMBDAT EMC_SMBCLK

REM_DIODE2_P REM_DIODE2_N

H_THERMDA H_THERMDC

+3VSUS_THRM

THERMATRIP1# THERMATRIP2# THERMATRIP3#

THERM_VSET

+FAN1_VOUT

5V_CAL_SIO1# 5V_CAL_SIO2#

12

+3.3V_SUS

12

4

1 2

4

R559

2.2K

+3.3V_SUS

R557

1 2

REM_DIODE3_N

REM_DIODE3_P

REM_DIODE4_N

REM_DIODE4_P

U8

11

SMDATA

12

SMBCLK

38

DP1

37

DN1

41

DP2

40

DN2

35

3V_SUS

21

RTC_PWR3V

23

VSUS_PWRGD

16

3V_PWROK#

17

THERMTRIP1#

18

THERMTRIP2#

19

THERMTRIP3#

42

VSET

26

XEN

34

VSS

7

FAN_OUT_1

8

FAN_OUT_2

39

FAN_DAC1

10

GPIO1

13

GPIO2

14

GPIO3

15

GPIO4

22

GPIO5

36

GPIO6/FAN_DAC2

EMC4001

2.2K

EMC_SMBDAT

EMC_SMBCLK

5

Place Q68 and C609 near the Bottom SODIMM

13

Q68

VCP1 VCP2

DP3 DN3

DP4 DN4

DP5 DN5

2

12

Q68 MMST3904

MMST3904

13

Q63

Q63 MMST3904

MMST3904

43

VCP2

46

REM_DIODE3_P

45

REM_DIODE3_N

44

REM_DIODE4_P

48

REM_DIODE4_N

47

NB_THERMDA

2

NB_THERMDC

1

20 3 4 25 24

2.5V_RUN_ON

27

NC_2.5V_RUN_PWRGD

33

LDO_SET

28

32 31

30 29

9

5 6 49

12

C213

C213 10U_10V_0805

10U_10V_0805

R538 1KR538 1K R124 31.6K_NC

R124 31.6K_NC

+3V_LDOIN

+3.3V_RUN

+5V_RUN

Layout Note: Place those capacitors close to EMC4001.

C214

C214 10U_10V_0805

10U_10V_0805

C610

C610 220P

220P

50

Place C610, C609 < 100mils from the Guardian pins

C196

C196 220P

220P

50

Place Q63 and C579 in between the CPU, North Bridge and South Bridge

EMC 4001

EMC 4001 QFN PIN48

QFN PIN48

ATF_INT#

POWER_SW#

ACAVAIL_CLR

THERMTRIP_SIO

SYS_SHDN#

LDO_SHDN#/ADDR

LDO_POK

LDO_SET

LDO_OUT2 LDO_OUT1

LDO_IN2 LDO_IN1

VDD_3V

VDD_5V_1 VDD_5V_2

GNDPAD

+3.3V_RUN

12

C204

0.1U_16V

+5V_RUN

12

C203

0.1U_16V

5

6

C609

C609 220P_NC

220P_NC

50

C579

C579 220P_NC

220P_NC

50

PWR_MON 50

1 2 1 2

6

12

R138

R138 47K_NC

47K_NC

1%

C164

0.1U

16V

16V X5R

X5R

7

+5V_SUS

R256

2.21K

1%

1% 0603

0603

VCP2

12

C265

C265 2200P_50V

2200P_50V

NB_THERMDA

NB_THERMDC

+3.3V_SUS+RTC_CELL +3.3V_ALW

R150

R134

10K

1 2

12

C131

C131 10U

10U

X5R

6.3

6.3 0603

0603

ATF_INT# 38

POWER_SW# 40 ACAV_IN 39,46,51

THERMTRIP_SIO

THERM_STP# 47

+2.5V_RUN +2.5V_RUN

+3V_LDOIN

12

C165

0.1U_16V

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

FAN & THERMAL

MGD 3A

7

This unused thermistor circuit is located under the top memory module

+3.3V_SUS

R260

R260 NTC_10K

NTC_10K

0603

31

2N7002W-7-F

2.5V_RUN_ON

R123 0.27_1210R123 0.27_1210

1 2

C604

C604 10U

10U

10

10 0805

0805

Q25

2

C202

C202 220P

220P

50

R243

R243 10K

10K

1 2

NB_THERMDA 14

NB_THERMDC 14

R132 7.5KR132 7.5K

+3.3V_RUN

8

5V_CAL_SIO1#

of

19 89Thursday, March 01, 2007

8

+3.3V_SUS

5

Symbol: 2N7002W-7-F

D(3)

G(2)

S(1)

Symbol:

D D

DTC124EUA

+15V_ALW +LCDVDD+3.3V_RUN

R464

R464 100K

100K

1 2

LCDVCC_ON

OUT(3)

IN(2)

C C

B B

GND(1)

+15V_ALW

R463

R463 100K

100K

1 2

EN_LCDVDD_2

EN_LCDVDD_1 EN_LCDVDD_2

LCDVCC_TST_EN39

EN_LCDVDD14

BIA_PWM14

2

Q52

Q52 DTC124EUAT-106

DTC124EUAT-106

1 3

R466 0_NCR466 0_NC

D25

SDMK0340L-7-F

D24

SDMK0340L-7-F

3

NB_PWRGD_5V

3

D

GS

231

BSS138_NL

WI102034

31

Q59

Q59 BSS138_NL

BSS138_NL

2

Q60

BSS138_NL_NC

Q55

Q55 2N7002W-7-F

2N7002W-7-F

1

2

12

C489

0.1U_16V

R447

R447 100K_NC

100K_NC

1 2

R4702KR470

2K

1 2

R462

2K_NC

1 2

4

6 5 2 1

EN_LCDVDD_1

BACKLITEON

Q57

Q57 SI3456DV-T1-E3

SI3456DV-T1-E3

4

3

C480

0.1U_50V_0603

1 2

2

R440

R440 470

470

1 2

31

Q54

Q54 2N7002W-7-F

2N7002W-7-F

3

J4

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

JAE_FI-TD44SB-E-R750

LCD_BCLKLCD_BCLK+

LCD_B2LCD_B2+

LCD_B1LCD_B1+

LCD_B0LCD_B0+

LCD_ACLKLCD_ACLK+

LCD_A2LCD_A2+

LCD_A1LCD_A1+

LCD_A0LCD_A0+

LCD_DDCCLK LCD_DDCDAT

BACKLITEON_R

LAMP_D_STAT#

RUN_ON33,39,42,43

2

LCD_BCLK- 14 LCD_BCLK+ 14

LCD_B2- 14 LCD_B2+ 14

LCD_B1- 14 LCD_B1+ 14

LCD_B0- 14 LCD_B0+ 14

LCD_ACLK- 14 LCD_ACLK+ 14

LCD_A2- 14 LCD_A2+ 14

LCD_A1- 14 LCD_A1+ 14

LCD_A0- 14 LCD_A0+ 14

LCD_DDCCLK 14 LCD_DDCDAT 14

R468

1 2

T21

+3.3V_RUN

+LCDVDD

LCD_TST 38

+INV_PWR_SRC

0_NC

+5V_ALW

PAD

+3.3V_RUN

Design current: 560mA Max current: 800mA

+PWR_SRC

40mil

R448

R448 200K

200K

2

C475

C475 1000P_50V

1000P_50V

1 2

R439

R439 100K

100K

1 2

31

Q53

Q53 2N7002W-7-F

2N7002W-7-F

FDS4435BZ

FDS4435BZ Q56

Q56

1 2 3

R467

R467 10K_NC

10K_NC

1 2

BACKLITEON

LCD_SMBCLK 39 LCD_SMBDAT 39

+INV_PWR_SRC

40mil

8 7 6 54

1

LCD_BCLK-

C484 3.3P_NC

LCD_BCLK+

LCD_ACLK-

C476 3.3P_NC

LCD_ACLK+

+LCDVDD

12

C77

0.1U_16V

+5V_ALW

12

C79

0.1U_16V

Adress : A9H --Contrast AAH --Backlight

12

C474

0.1U_50V_0603

1 2

+3.3V_RUN

+INV_PWR_SRC

50 COG

12

C76

0.1U_16V

12

C78

0.1U_50V_0603

+5V_RUN

A A

NB_PWRGD14,39

5

+3.3V_SUS

2

31

2N7002W-7-F

Q58

R469

R469 10K

10K

1 2

NB_PWRGD_5V

4

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

COMPUTER

LCD CONN & CK-SSCD

MGD 2A

1

of

20 89Thursday, March 01, 2007

Symbol: BSS138_NL

D(3)

G(2)

S(1)

A

N(1)

Symbol: DA204U

P(3)N

P(2)

B

C

D

+5V_RUN

21

D21

D21 SDM10U45-7

SDM10U45-7

E

+CRT_VCC

4 4

+3.3V_RUN

2

1

D20

D20 DA204U_NC

DA204U_NC

R15

4.7K

1 2

+3.3V_RUN

1

3

12

C6

C6 10P_50V_NC

10P_50V_NC

Q4

Q4 BSS138_NL

BSS138_NL

2

Q2

Q2 BSS138_NL

BSS138_NL

DVI_SCLK14,36

3

A00-10

L1

VGA_RED14,36

VGA_GRN14,36

3 3

D22 SDM10U45-7D22 SDM10U45-7

+5V_RUN

CRT_HSYNC14

2 2

CRT_VSYNC14

R382 39R382 39

R392 39R392 39

2 1

1 2

VGA_BLU14,36

CRT_HSYNC_R

CRT_VSYNC_R

+5V_RUN_SYNC

1 2

15

U26

2 4

3

74AHCT1G125GW

15

U27

2 4

3

74AHCT1G125GW

R7 150_FR7150_F

1 2

R383 1KR383 1K

VGAHSYNC

VGAVSYNC

HSYNC36

VSYNC36

R6 150_FR6150_F

R10

R10 150_F

150_F

1 2

12

R380 0R380 0

1 2

R388 0R388 0

1 2

12

C7

C7 22P_50V_NC

22P_50V_NC

12

C5

C5 22P_50V_NC

22P_50V_NC

G_CLK_DDC214 DOCK_CLK_DDC2 36

L1

BLM18BB600SN1D 0603

L2

BLM18BB600SN1D 0603

L3

BLM18BB600SN1D 0603

12

C9

C9 22P_50V_NC

22P_50V_NC

+3.3V_RUN

R11

4.7K

1 2

A00-10 A00-10

RS690 Revision A11 bring-up and qualification has identified an issue with the DAC_SCL pin

2

1

D18

D18 DA204U_NC

DA204U_NC

3

12

C4

C4 10P_50V_NC

10P_50V_NC

A00-10

R13 0_NCR13 0_NC

12

C424

C424 10P_50V

10P_50V

+5V_RUN_SYNC

R8

6.8KR86.8K

1 2

12

C418

C418 10P_50V

10P_50V

2

1

D19

D19 DA204U_NC

DA204U_NC

3

12

C10

C10 10P_50V_NC

10P_50V_NC

T74T74

R14

6.8K

1 2

L43

1 2

BLM18AG121SN1D_0603

L44

1 2

BLM18AG121SN1D_0603

RED

GREEN

BLUE

M_ID2#

12

C8

0.1U_16V_0402

+5V_RUN_SYNC

12

R384

1K_NC

HSYNC_L

VSYNC_L

C410

C410 10P_NC

10P_NC

50

12

R386

1K_NC

C411

C411 10P_NC

10P_NC

50

12

R391

R391 0_1206

0_1206

+CRT_VCC_R

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

FOX_DS01A91-MD221-7F

12

JVGA1

DOCK_DAT_DDC2 36G_DAT_DDC214

C422

0.01U_16V

1 2

48

0.12

FUSE 0.12A_NC

FUSE 0.12A_NC FS1

FS1

For A11:Pop R13 and Nonpop Q2,R11,R8 For A12:Pop Q2,R11,R8 and Nonpop R13

Place near JVGA1 connector < 200 mil

1 1

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

COMPUTER

CRT CONN

MGD 3A

E

of

21 89Thursday, March 01, 2007

1

2

3

4

5

6

7

8

+3.3V_RUN

Place All of those Inductors Caps close to JTV1 <200 mils

C414 22P_50V_NCC414 22P_50V_NC

L47 0.47uH 0603

1 2

％

±20

12

C425

C425 47P

47P

50

50 NPO

NPO

C417 22P_50V_NCC417 22P_50V_NC

L45 0.47uH 0603

1 2

％

±20

12

C428

C428 47P

47P

50

50 NPO

NPO

C419 22P_50V_NCC419 22P_50V_NC

L46 0.47uH 0603

1 2

％

±20

12

C429

C429 47P

47P

50

50 NPO

NPO

12

35m

A

12

C415

C415 47P

47P

50

50 NPO

NPO

12

C413

C413 47P

47P

50

50 NPO

NPO

12

C420

C420 47P

47P

50

50 NPO

NPO

R387

R387 110_0603_NC

110_0603_NC

Add R387 pre ref schematic.

SVIDEO_C SVIDEO_CVBS

SVIDEO_Y

1 2

R381 0_0805_NCR381 0_0805_NC

1 2

TV_C

TV_Y

TV_CVBS

12

R395

R395 150

150

1%

12

R393

R393 150

150

1%

1% 0402

0402

12

R394

R394 150

150

1%

C409 0.01U_25V_NCC409 0.01U_25V_NC

A A

+5V_RUN

12

C402 0.1U_NC

B B

AUD_SPDIF_OUT28,36

C402 0.1U_NC

10 0402

1

53

2 4

U24

74AHCT1G125GW_NC

TV_C14,36

TV_Y14,36

TV_CVBS14,36

AUD_SPDIF_SHDN 28,38

SP_DIF SP_DIFB SP_DIFC SP_DIF_D

R377 220_0603_NCR377 220_0603_NC

1

2

D3

D3 DA204U_NC

DA204U_NC

SVIDEO_C SVIDEO_Y SVIDEO_CVBS

3

SP_DIF_E

12

C433

C433 300P_NC

300P_NC

Populate R390 & De-populate R389 when component VIDEO is enable.

R390 0_0805R390 0_0805

R389

R389 0_0805_NC

0_0805_NC

1 2

1

2

JTV1

3 6 7 5 2

8

4

9

1

MH1177L-BG5N-7F

+3.3V_RUN +1.8V_RUN

D1

D1 DA204U_NC

DA204U_NC

12

R396

R396 47K_NC

47K_NC

0603

3

12

R416

R416 10K

10K

+3.3V_RUN+3.3V_RUN

Q51

2N7002W-7-F_NC

31

Vgs = 20

Vgs = 20 Vds = 60

Vds = 60

2

Current = 115m

Current = 115m Type = Single N

Type = Single N

1

3

2

D2

D2 DA204U_NC

DA204U_NC

DFT_GPIO5 14

PLTRST_SYS# 14,30,35,43,49

C C

D D

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

S-Video

MGD 3A

7

of

22 89Thursday, March 01, 2007

8

5

4

3

2

1

R631 8.2KR631 8.2K

PLTRST#27,38,39,43

CLK_PCIE_SB7 CLK_PCIE_SB#7

ALINK_NBRX_SBTX_P013 ALINK_NBRX_SBTX_N013

D D

Place R346,R348,R344 < 100mils from pins E27,E28,E29

C C

CPU_PWRGD

B B

A A

+1.2V_RUN

L73

BLM21PG221SN1D_0805

+5V_ALW +3.3V_ALW

R370

R370 10K

10K

R369 1KR369 1K

ATi Recommend Vendor: NSK Part Number: NXG 32.768KAE12FUD 16 PPM.

R345

R345 20M

20M

RTC_GNDRTC_GNDRTC_GND

H_DPSLP# should be put down , reserve R592 for verifing

5

Q43

2

MMBT3904

1 3

Y2

32.768KHZ

R342 20MR342 20M

C376

C376 18P_50V

18P_50V

ALLOW_LDTSTOP14

14

23

ALINK_NBRX_SBTX_P113 ALINK_NBRX_SBTX_N113 ALINK_NBRX_SBTX_P213 ALINK_NBRX_SBTX_N213 ALINK_NBRX_SBTX_P313 ALINK_NBRX_SBTX_N313

ALINK_NBTX_C_SBRX_P013

ALINK_NBTX_C_SBRX_N013

ALINK_NBTX_C_SBRX_P113

ALINK_NBTX_C_SBRX_N113

ALINK_NBTX_C_SBRX_P213

ALINK_NBTX_C_SBRX_N213

ALINK_NBTX_C_SBRX_P313

ALINK_NBTX_C_SBRX_N313

+1.2V_RUN

L74

BLM21PG221SN1D_0805

PCIE Power

C684

C684 22U

22U

6.3

6.3 0805

0805 X5R

X5R

2

R341 0R341 0

+1.8V_RUN

C375

C375 18P_50V

18P_50V

+3.3V_RUN

+1.2V_PCIE_VDDR +1.2V_PCIE_PVDD

12

C699

C699 10U

10U

4

4 ±20

±20 0603

0603 X5R

X5R

50mil Width

C686

C686 1U

1U

6.3

％

±10

±10 X5R

X5R

R367

R367 10K

10K

CPU_PWRGD_Q

31

Q44

2N7002W-7-F

Place the translation circuit for CPU_PWRGD close to the SB600 to minimize stubbs when the circuit is No Stuff.

CPU_PWRGD10

R6251KR625 1K

R591

R591 10K

10K

H_DPSLP#

R592

R592 100K_NC

100K_NC

C391 0.1UC391 0.1U C389 0.1UC389 0.1U C387 0.1UC387 0.1U C385 0.1UC385 0.1U C380 0.1UC380 0.1U C383 0.1UC383 0.1U C379 0.1UC379 0.1U C377 0.1UC377 0.1U

R346 562 1%R346 562 1% R348 2.05K 1%R348 2.05K 1%

R344 0R344 0

C697

C697 1U

1U

6.3

C683

C683 1U

1U

6.3

6.3 ±10

±10 X5R

X5R

R617

R617 100K_NC

100K_NC

％

LDT_STOP#10,14

+1.8V_RUN

6.3 X5R

X5R

％

±10

+1.2V_PCIE_VDDR

C690

C690 1U

1U

6.3

％

±10

±10 X5R

X5R

CPU_PWRGD_Q 39

T157T157 T170T170 T158T158 T165T165

LDT_RST#10

4

％

R371 33R371 33

ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3

20mil Width

C680

0.1U_10V

CPU_PWRGD

R361 0R361 0 R623 300R623 300

R358 10K_NCR358 10K_NC

PCIE_CALRP PCIE_CALRN

PCIE_CALI

C694

0.1U_10V

R364 0R364 0

T162T162

32K_X1

32K_X2

U23A

AG10

A_RST#

J24

PCIE_RCLKP

J25

PCIE_RCLKN

P29

PCIE_TX0P

P28

PCIE_TX0N

M29

PCIE_TX1P

M28

PCIE_TX1N

K29

PCIE_TX2P

K28

PCIE_TX2N

H29

PCIE_TX3P

H28

PCIE_TX3N

T25

PCIE_RX0P

T26

PCIE_RX0N

T22

PCIE_RX1P

T23

PCIE_RX1N

M25

PCIE_RX2P

M26

PCIE_RX2N

M22

PCIE_RX3P

M23

PCIE_RX3N

E29

PCIE_CALRP

E28

PCIE_CALRN

E27

PCIE_CALI

U29

PCIE_PVDD

U28

PCIE_PVSS

F27

PCIE_VDDR_1

F28

PCIE_VDDR_2

F29

PCIE_VDDR_3

G26

PCIE_VDDR_4

G27

PCIE_VDDR_5

G28

PCIE_VDDR_6

G29

PCIE_VDDR_7

J27

PCIE_VDDR_8

J29

PCIE_VDDR_9

L25

PCIE_VDDR_10

L26

PCIE_VDDR_11

L29

PCIE_VDDR_12

N29

PCIE_VDDR_13

D2

X1

C1

X2

AC26

CPU_PG/LDT_PG

W26

INTR/LINT0

W24

NMI/LINT1

W25

INIT#

AA24

SMI#

AA23

SLP#/LDT_STP#

AA22

IGNNE#/SIC

AA26

A20M#/SID

Y27

FERR#

AA25

STPCLK#/ALLOW_LDTSTP

AH9

CPU_STP#/DPSLP_3V#

B24

DPSLP_OD#/GPIO37

W23

DPRSLPVR

AC25

LDT_RST#/DPRSTP#/PROCHOT#

SB600 A13

SB600 SB 27x27mm

Part 1 of 4

SPDIF_OUT/PCICLK7/GPIO41

AD0/ROMA18 AD1/ROMA17

PCI CLKS

AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11

AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

PCI INTERFACE

DEVSEL#/ROMA0

TRDY#/ROMOE#

PCI EXPRESS INTERFACE

XTAL

CPU

R343 0R343 0

RTC_GND

3

PAR/ROMA19

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

RTC_IRQ#/GPIO69

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6

PCIRST#

AD8/ROMA9 AD9/ROMA8

AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE3#

FRAME#

IRDY#

STOP# PERR# SERR# REQ0# REQ1# REQ2#

GNT0# GNT1# GNT2#

CLKRUN#

LOCK#

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

VBAT

RTC_GND

Rev.A21

U2 T2 U1 V2 W3 U3 V1 T1

AJ9

W7 Y1 W8 W5 AA5 Y3 AA6 AC5 AA7 AC3 AC7 AJ7 AD4 AB11 AE6 AC9 AA3 AJ4 AB1 AH4 AB2 AJ3 AB3 AH3 AC1 AH2 AC2 AH1 AD2 AG2 AD1 AG1 AB9 AF9 AJ5 AG3 AA2 AH6 AG5 AA1 AF7 Y2 AG8 AC11 AJ8 AE2 AG9 AH8 AH5 AD11 AF2 AH7 AB12 AG4 AG7 AF6

AD3 AF1 AF4 AF3

AG24 AG25 AH24 AH25 AF24 AJ24 AH26 W22 AF23

D3 F5

E1 D1

RTC_GND

PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R SB_SPDIF_OUT_R

R372 8.2KR372 8.2K R373 33R373 33

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3# PCI_REQ4# PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3# PCI_GNT4# CLKRUN#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# LPC_LDRQ0# LPC_LDRQ1# BMREQ# IRQ_SERIRQ

+VBAT_IN

C378

C378 1U

1U

10

10 0603

0603 X6S

X6S

％

±10

RTC_GND

R359 22R359 22 R354 22R354 22 R357 22R357 22 R362 22R362 22 R365 22R365 22 R356 22R356 22 R360 22R360 22

PCI_AD[0..31]

PCI_C_BE0# 32 PCI_C_BE1# 32 PCI_C_BE2# 32 PCI_C_BE3# 32 PCI_FRAME# 32 PCI_DEVSEL# 32 PCI_IRDY# 32 PCI_TRDY# 32 PCI_PAR 32 PCI_STOP# 32 PCI_PERR# 32 PCI_SERR# 32

T67T67

PCI_REQ1# 32

T174T174 T72T72

T65T65 T164T164

PCI_GNT1# 32

T173T173 T159T159

T66T66

CLKRUN# 32,38,39

T163T163 T59T59 T171T171

PCI_PIRQD# 32

LPC_LAD0 30,35,38,39 LPC_LAD1 30,35,38,39 LPC_LAD2 30,35,38,39 LPC_LAD3 30,35,38,39 LPC_LFRAME# 30,35,38,39 LPC_LDRQ0# 38 LPC_LDRQ1# 38 BMREQ# 14 IRQ_SERIRQ 30,32,38,39

12

C381

0.1U_16V

RTC_GND

2

PCI_CLK0 PCI_CLK1 CLK_PCI_5025 CLK_PCI_5018 CLK_PCI_DOCK

CLK_PCI_TPM

CLK_PCI_PCCARD

T58T58

PCI_AD[0..31] 26,32

T51T51 T143T143T61T61

PCI_RST# 32

CLK_PCI_5025

CLK_PCI_5018

CLK_PCI_DOCK

CLK_PCI_PCCARD

CLK_PCI_TPM

R353 100R353 100

1 2

PCI_CLK0 25 PCI_CLK1 25 CLK_PCI_5025 39 CLK_PCI_5018 38 CLK_PCI_DOCK 25,36 CLK_PCI_TPM 30 CLK_PCI_PCCARD 25,32

SB_SPDIF_OUT_R

C234 10P_NC 50C234 10P_NC 50

C200 10P_NC 50C200 10P_NC 50

C393 10P_NC 50C393 10P_NC 50

C392 10P_NC 50C392 10P_NC 50

C390 10P_NC 50C390 10P_NC 50

+RTC_CELL

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

SB600M-PCIE/PCI/LPC

MGD 3A

R355 10K_NCR355 10K_NC

+3.3V_RUN

R234

8.2K

CLKRUN#

Option to "Disable" clkrun. Pulling it down will keep the clocks running.

8.2K

R233

8.2K_NC

of

23 89Thursday, March 01, 2007

1

23 89Thursday, March 01, 2007

5

+3.3V_ALW

R207 10KR207 10K

+3.3V_SUS

D D

+3.3V_SUS

C C

+3.3V_RUN

AC Term at load on CLK_SB_14M &

B B

CLK_SB_48M_R. Place AC term close to load (~50 mils from clock pin).

A A

R335 10K_NCR335 10K_NC

R578 10K_NCR578 10K_NC

R577 10K_NCR577 10K_NC R340 10K_NCR340 10K_NC R336 10K_NCR336 10K_NC R331 10K_NCR331 10K_NC R580 10K_NCR580 10K_NC R330 10K_NCR330 10K_NC R334 10KR334 10K R337 2.2K_NCR337 2.2K_NC R582 2.2K_NCR582 2.2K_NC R581 2.2K_NCR581 2.2K_NC R333 2.2KR333 2.2K R332 2.2KR332 2.2K R579 10K_NCR579 10K_NC R678 2.2KR678 2.2K R679 2.2KR679 2.2K

R593 10K_NCR593 10K_NC

R599 10K_NCR599 10K_NC

R600 10K_NCR600 10K_NC

For SB600 A12 , depopulate R600 For SB600 A13 , populate R600

R338

R588

R588 10_NC

10_NC

C659

4.7P_NC

50

SB_AZ_CODEC_SDOUT28 SB_AZ_CODEC_SYNC28

SB_AZ_CODEC_RST#28

SB_AZ_CODEC_BITCLK28

R338 10_NC

10_NC

C371

4.7P_NC

50

Close to U23

HDT_RESET#

USB_OC0_1#

USB_OC2_3#

HDT_RESET#38

SB_PCIE_WAKE#38

SATA_DET# SIO_EXT_SMI# SIO_EXT_SCI# SB_PME# SB_PCIE_WAKE# SIO_EXT_WAKE# SYS_RESET# SB_TEST2 SB_TEST1 SB_TEST0 SB_SMBCLK SB_SMBDATA SMB_ALERT# SB_SMBCLK0 SB_SMBDATA0

SHUTDOWN#/GPIO5

IDE_RST_MOD

SB_AZ_RST#

SB_AZ_MDC_BITCLK34 SB_AZ_MDC_SDOUT34

SB_AZ_MDC_SYNC34

SB_AZ_MDC_RST#34

CLK_SB_48M_R

CLK_SB_14M

SB_AZ_MDC_SDOUT

SB_AZ_MDC_SYNC

C698

C698 27P_NC

27P_NC

50

SB_AZ_CODEC_SDOUT SB_AZ_CODEC_SYNC

SB_AZ_CODEC_RST# SB_AZ_CODEC_BITCLK

5

C384

C384 27P_NC

27P_NC

50

SIO_EXT_WAKE#38

SIO_EXT_SCI#39

SB_PCIE_WAKE#

SIO_EXT_SMI#39

Delay 20ms after S5 powerOK

SB_RSMRST#39

CLK_SB_14M7

SATA_DET#27

SB_AZ_MDC_BITCLK SB_AZ_MDC_SDOUT SB_AZ_SDOUT

SB_AZ_MDC_SYNC SB_AZ_SYNC SB_AZ_MDC_RST#

AC_SDATA_OUT25 SB_AZ_CODEC_SDIN028 SB_AZ_MDC_SDIN134

C386 27P_NC 50C386 27P_NC 50

C388 27P_NC 50C388 27P_NC 50

R611 33R611 33 R608 33R608 33

R596 33R596 33 R622 33R622 33

C704 27P_NC 50C704 27P_NC 50

C679 27P_NC 50C679 27P_NC 50

SB_PME#38

SIO_SLP_S3#39

SIO_SLP_S5#39

SIO_PWRBTN#39

SB_PWRGD43

SUS_STAT#14

SIO_A20GATE39 SIO_RCIN#39

D29

SPKR28

USB_OC2_3#33

USB_OC0_1#33

C703 27P_50V_NCC703 27P_50V_NC

1 2

USB_IDE#27

IDE_RST_MOD27

SB_AZ_SDOUT SB_AZ_SYNC

SB_AZ_RST# SB_AZ_BITCLK

4

T136T136 T138T138

SOD-323

SDMK0340L-7-F_NC

T53T53 T45T45 T50T50 T47T47 T40T40

SB_SMBCLK30 SB_SMBDATA30

T52T52 T137T137 T42T42

T36T36 T135T135 T39T39 T38T38 T43T43 T41T41

R619 33R619 33 R616 33R616 33

T55T55

R606 33R606 33 R603 33R603 33

T57T57

T56T56

T139T139 T167T167 T168T168 T166T166 T161T161 T154T154 T140T140 T160T160

4

SB_PME# SIO_EXT_WAKE# SIO_SLP_S3# SIO_SLP_S5# SIO_PWRBTN#

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0 SIO_A20GATE

SIO_EXT_SCI#

SYS_RESET#HDT_RESET#

SIO_EXT_SMI# SMB_ALERT#

SB_RSMRST#

CLK_SB_14M

SHUTDOWN#/GPIO5 SPKR SB_SMBCLK0 SB_SMBDATA0 SB_SMBCLK SB_SMBDATA

USB_OC0_1#

SB_AZ_BITCLK

AC_SDIN3

SB_AZ_RST#

AC_BITCLK AC_SDATA_OUT

SB_AZ_CODEC_SDIN0

SB_AZ_MDC_SDIN1

USB_IDE# AC_SYNC IDE_RST_MOD

U23D

A3

PCI_PME#/GEVENT4#

B2

RI#/EXTEVNT0#

F7

SLP_S3#

A5

SLP_S5#

E3

PWR_BTN#

B5

PWR_GOOD

B3

SUS_STAT#

F9

TEST2

E9

TEST1

G9

TEST0

AF26

GA20IN

AG26

KBRST#

D7

LPC_PME#/GEVENT3#

C25

LPC_SMI#/EXTEVNT1#

D9

S3_STATE/GEVENT5#

F4

SYS_RESET#/GPM7#

E7

WAKE#/GEVENT8#

C2

BLINK/GPM6#

G7

SMBALERT#/THRMTRIP#/GEVENT2#

E2

RSMRST#

B23

14M_OSC

C28

SATA_IS0#/GPIO10

A26

ROM_CS#/GPIO1

B29

GHI#/SATA_IS1#/GPIO6

A23

WD_PWRGD/GPIO7

B27

SMARTVOLT/SATA_IS2#/GPIO4

D23

SHUTDOWN#/GPIO5

B26

SPKR/GPIO2

C27

SCL0/GPOC0#

B28

SDA0/GPOC1#

C3

SCL1/GPOC2#

F3

SDA1/GPOC3#

D26

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

A27

SSMUXSEL/SATA_IS3#/GPIO0

A4

LLB#/GPIO66

C6

USB_OC9#/SLP_S2/GPM9#

C5

USB_OC8#/AZ_DOCK_RST#/GPM8#

C4

USB_OC7#/GEVENT7#

B4

USB_OC6#/GEVENT6#

B6

USB_OC5#/DDR3_RST#/GPM5#

A6

USB_OC4#/GPM4#

C8

USB_OC3#/GPM3#

C7

USB_OC2#/GPM2#

B8

USB_OC1#/GPM1#

A8

USB_OC0#/GPM0#

N2

AZ_BITCLK

M2

AZ_SDOUT

K2

AZ_SDIN3/GPIO46

L3

AZ_SYNC

K3

AZ_RST#

L1

AC_BITCLK/GPIO38

L2

AC_SDOUT/GPIO39

L4

ACZ_SDIN0/GPIO42

J2

ACZ_SDIN1/GPIO43

J4

ACZ_SDIN2/GPIO44

M3

AC_SYNC/GPIO40

L5

AC_RST#/GPIO45

E23

NC1

AC21

NC2

AD7

NC3

AE7

NC4

AA4

NC5

T4

NC6

D4

NC7

AB19

NC8

SB600 A13

3

SB600 SB 27x27mm

Part 4 of 4

ACPI / WAKE UP

EVENTS

ACPI / WAKE UP

EVENTS

OSC / RST

GPIO

USB OC

AC97 AZALIA

3

USB INTERFACE

USB PWR

USBCLK

USB_RCOMP

USB_ATEST1 USB_ATEST0

USB_HSDP9+ USB_HSDM9-

USB_HSDP8+ USB_HSDM8-

USB_HSDP7+ USB_HSDM7-

USB_HSDP6+ USB_HSDM6-

USB_HSDP5+ USB_HSDM5-

USB_HSDP4+ USB_HSDM4-

USB_HSDP3+ USB_HSDM3-

USB_HSDP2+ USB_HSDM2-

USB_HSDP1+ USB_HSDM1-

USB_HSDP0+ USB_HSDM0-

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4

AVDDC

AVSSC

AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8

AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24 AVSS_USB_25 AVSS_USB_26 AVSS_USB_27 AVSS_USB_28 AVSS_USB_29 AVSS_USB_30 AVSS_USB_31 AVSS_USB_32 AVSS_USB_33

Rev.A21

A17

A14

A11 A10

H12 G12

E12 D12

E14 D14

G14 H14

D16 E16

D18 E18

G16 H16

G18 H18

D19 E19

G19 H19

B9 B11 B13 B16 B18 A9 B10 B12 B14 B17

A12

A13

A16 C9 C10 C11 C12 C13 C14 C16 C17 C18 C19 C20 D11 D21 E11 E21 F11 F12 F14 F16 F18 F19 F21 G11 G21 H11 H21 J11 J12 J14 J16 J18 J19

CLK_SB_48M_R

USB_RCOMP

USB_ATEST1 USB_ATEST0

USBP9+ USBP9-

USBP5+ USBP5-

2

R589 0R589 0

1 2

R587 11.8K

T44T44 T37T37

T145T145 T141T141

USBP8+ 36 USBP8- 36

USBP7+ 41 USBP7- 41

USBP6+ 32 USBP6- 32

T144T144 T146T146

USBP4+ 27 USBP4- 27

USBP3+ 33 USBP3- 33

USBP2+ 33 USBP2- 33

USBP1+ 33 USBP1- 33

USBP0+ 33 USBP0- 33

1 2

SB_SMBDATA

SB_SMBDATA0

SB_SMBCLK

SB_SMBCLK0

1%

C672

C677

0.1U

10

12

C361

2.2U

10%

10% X7R

X7R 10

10 EP

EP 0603

0603

R674 0_NCR674 0_NC

R675 0R675 0

R676 0_NCR676 0_NC

R677 0R677 0

Symbol: 2N7002W-7-F

D(3)

G(2)

2

CLK_SB_48M 7

Place R587 near pin A14. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions.

----->Dock

----->Blue Tooth

----->Card Bus

----->Floppy D module

----->Rear Bottom

----->Rear Top

----->Side Bottom

----->Side Top

USB power

C667

C667 1U

C670

0.1U

10

C666

0.1U_10V

PLACE C361, C666 CLOSE TO U23

S(1)

1U

C663

6.3

0.1U_NC

10

+3.3V_RUN

2

Q41

3 1

2N7002W-7-F

+3.3V_RUN

2

Q42

3 1

2N7002W-7-F

Title

SB600M ACPI/USB/AC97

Size Document Number Rev

MGD 3A

Date: Sheet

1

Use Plane Shape for +3.3V_AVDD_USB and +3.3V_AVDDC

+3.3V_AVDD_USB

L69

BLM21PG221SN1D_0805

C358

C358 22U

22U

C671

C668

C668 1U

1U

6.3

1U

6.3

+3.3V_AVDDC

50mil Width

6.3

6.3 0805

0805 X6S

X6S

L40

BLM15AG221SN1D

20mil Width

R317

R325

2.2K

MEM_SDATA

MEM_SCLK

QUANTA

QUANTA COMPUTER

COMPUTER

24 89Thursday, March 01, 2007

1

+3.3V_SUS

MEM_SDATA 17

MEM_SCLK 17

of

5

C712

0.1U

10

C722

C722 22U

22U

0805

1

2

SATA_SBTX_DRX_P0 SATA_SBTX_DRX_N0

SATA_SBRX_DTX_N0 SATA_SBRX_DTX_P0

T60T60 T73T73

T68T68 T64T64

T172T172 T175T175

T169T169 T71T71

T62T62 T69T69

T70T70 T63T63

SATA_CAL

1%

SATA_X1

SATA_X2

X5R6.3

+1.25V_SATA_VCC

C733

C733 2200P_NC

2200P_NC

50 X7R

12

C731

C731 1U_NC

1U_NC

6.3 X5R

SATA_SBTX_C_DRX_P027

SATA_SBTX_C_DRX_N027

SATA_SBRX_DTX_N027

SATA_SBRX_DTX_P027

D D

C C

SATA Power

+3.3V_RUN

L75 BLM15AG221SN1DL75 BLM15AG221SN1D

CAP CLOSE TO THE BALL OF SB600

+1.2V_RUN

L76

L76 BLM15AG221SN1D

BLM15AG221SN1D

+1.25V_SATA_VCC

L77

L77 BLM15AG221SN1D_NC

BLM15AG221SN1D_NC

+1.2V_RUN

B B

L79

0805

BLM21PG221SN1D

+1.25V_SATA_VCC

L78

0805

BLM21PG221SN1D_NC

+3.3V_RUN

12

A A

C730

2.2U_NC

10 X5R

10 X5R 0603

0603

3

2

1

U34

GND1

IN

EN

12

C726

C726 22U

22U

6.3

6.3 X5R

X5R 0805

0805

RESET#/FB

TPS72501_NC

C397 0.01U_16VC397 0.01U_16V C396 0.01U_16VC396 0.01U_16V

SATA_ACT#40

+3.3V_XTLVDD_SATA

+1.2V_PLLVDD_SATA

C718

C718 1U

1U

6.3

C717

0.1U_NC

10

4

OUT

5

6

GND2

5

C707

C707 1U

1U

10

10 0603

0603 X6S

X6S

C716

C716 1U

1U

6.3

+1.2V_AVDD_SATA

C715

C715 1U

1U

6.3

+1.2V_AVDD_SATA

C723

0.1U_NC

10

R627 1K

+1.2V_PLLVDD_SATA

+3.3V_XTLVDD_SATA

+1.2V_AVDD_SATA

C708

0.1U_NC

10

C710

0.1U_NC

10

C714

0.1U

10

C711

0.1U_NC

10

12

R645

1.37K_NC

1%

12

R646

66.5K_NC

1%

AH21

AJ21

AH20

AJ20

AH18

AJ18

AH17

AJ17

AH13 AH14

AH16

AJ16

AJ11

AH11

AH12

AJ13

AF12

AD16

AD18

AC12

AD14

AJ10

AC16

AE14 AE16 AE18 AE19

AF19

AF21 AG22 AG23 AH22 AH23

AJ12

AJ14

AJ19

AJ22

AJ23

AB14 AB16 AB18 AC14 AC18 AC19 AD12 AD19 AD21 AE12 AE21

AF11

AF14

AF16

AF18 AG11 AG12 AG13 AG14 AG16 AG17 AG18 AG19 AG20 AG21 AH10 AH19

4

U23B

SB600 A13

4

SB600 SB 27x27mm

SATA_TX0+ SATA_TX0-

SATA_RX0SATA_RX0+

SATA_TX1+ SATA_TX1-

SATA_RX1SATA_RX1+

SATA_TX2+ SATA_TX2-

SATA_RX2SATA_RX2+

SATA_TX3+ SATA_TX3-

SATA_RX3SATA_RX3+

SATA_CAL

SATA_X1

SATA_X2

SATA_ACT#/GPIO67

PLLVDD_SATA_1 PLLVDD_SATA_2

XTLVDD_SATA

AVDD_SATA_1 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8 AVDD_SATA_9 AVDD_SATA_10 AVDD_SATA_11 AVDD_SATA_12 AVDD_SATA_13 AVDD_SATA_14 AVDD_SATA_15

AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27

SB600 SB 27x27mm

Part 2 of 4

SERIAL ATA

SERIAL ATA POWER

SATA clock Option

C725 27P_50VC725 27P_50V

C724 27P_50VC724 27P_50V

21

Y6

Y6 25MHZ

25MHZ

20ppm

20ppm EP 20pF

EP 20pF

SATA_X2_R

3

AB29

IDE_IORDY

AA28

IDE_IRQ

AA29

IDE_A0

AB27

IDE_A1

Y28

IDE_A2

AB28

IDE_DACK#

AC27

IDE_DRQ

AC29

IDE_IOR#

AC28

IDE_IOW#

W28

IDE_CS1#

W27

IDE_CS3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21

ATA 66/100

IDE_D7/GPIO22 IDE_D8/GPIO23

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS#/GPIO32

LAN_RST#/GPIO13

ROM_RST#/GPIO14

SPI ROMHW MONITOR

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD

AVSS

Rev.A21

SATA_X1 VCC_Y6

R641

R641 10M

10M

R635 0R635 0

SATA_X2

IDE_DD0

AD28

IDE_DD1

AD26

IDE_DD2

AE29

IDE_DD3

AF27

IDE_DD4

AG29

IDE_DD5

AH28

IDE_DD6

AJ28

IDE_DD7

AJ27

IDE_DD8

AH27

IDE_DD9

AG27

IDE_DD10

AG28

IDE_DD11

AF28

IDE_DD12

AF29

IDE_DD13

AE28

IDE_DD14

AD25

IDE_DD15

AD29

SB_EC_SPI_DIN

J3

SB_EC_SPI_DO

J6

SB_EC_SPI_CLK

G3 G2

SPI_CS#

G6

C23 G5

M4

PCIE_MCARD1_DET#

T3 V4

PCIE_WWAN_DET#

N3

USB_WWAN_DET#

P2 W4

P5 P7 P8 T8

TALERT#

T7

WWAN_PCIE_RST#WWAN_PCIE_RST#WWAN_PCIE_RST#WWAN_PCIE_RST#WWAN_PCIE_RST#WWAN_PCIE_RST#

V5

WLAN_PCIE_RST#WLAN_PCIE_RST#WLAN_PCIE_RST#WLAN_PCIE_RST#WLAN_PCIE_RST#WLAN_PCIE_RST#

L7

LOM_PCIE_RST#

M8

NC_GPIO56

V6

LBF_ID0

M6

LBF_ID1

P4

LBF_ID2

M7 V7

N1

20mil Width

M1

HWM_AGND TRACE AT LEAST 10MIL WIDE

R601 10KR601 10K R597 10KR597 10K R595 10KR595 10K

R634 33_F_NCR634 33_F_NC

3

C693

2.2U

10

10 0603

0603

HWM_AGND

R640

49.9_F_NC

IDE_DIORDY 27 IDE_IRQ 27 IDE_DA0 27 IDE_DA1 27 IDE_DA2 27 IDE_DDACK# 27 IDE_DDREQ 27 IDE_DIOR# 27 IDE_DIOW# 27 IDE_DCS1# 27 IDE_DCS3# 27

IDE_DD[0..15] 27

SB_EC_SPI_DIN 39 SB_EC_SPI_DO 39 SB_EC_SPI_CLK 39

T54T54

T46T46 T142T142

T148T148

PCIE_MCARD1_DET# 35 USB_MCARD1_DET# 35

T152T152 T147T147

T156T156

T150T150 T149T149 T151T151 T153T153

R349 0_NCR349 0_NC R351 0_NCR351 0_NC

+3.3V_AVDD_HWM

C691

0.1U_10V

R609 0R609 0

Close to SB600

R605

R605 10K_NC

10K_NC

For First build ,If next build no use remove from BOM.

R_3COM_25ML

BIOS should not enable the internal GPIO pull up resistor

T155T155

+3.3V_RUN

L72 BLM15AG221SN1DL72 BLM15AG221SN1D

+3.3V_RUN

R602

R594

10K_NC

LBF_ID0 LBF_ID1

LBF_ID2

Y3

3

VCC

OUT

1

VSS

OE

25MHZ_OSC_NC

AC_SDATA_OUT24

CLK_PCI_DOCK23,36

CLK_PCI_PCCARD23,32

SB_WLAN_PCIE_RST# 35 SB_LOM_PCIE_RST# 30

BLM18AG121SN1D_0603_NC

4

2

BLM18AG121SN1D_0603_NC

2

15K internal PU for RTC_CLK ,External PU/PD is not required. SB600 has 15K internal PD for AC_SDOUT

PCI_CLK023

PCI_CLK123

Net Name

PULL HIGH

PULL LOW

SIO_SPI_CS#39

Memory Vendor LBF_ID1 LBF_ID0LBF_ID2

Hynix

Qimonda

Samsung

C395

0.1U_NC

L42

00

0

+3.3V_RUN

2

+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN

R607

2.2K_NC

AC_SDOUT

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

Default

C394

0.1U_NC

CLK_PCI_DOCK CLK_PCI_PCCARD

USE INT. PLL48

USE EXT. 48MHZ

Default

+3.3V_SUS

R347

R347 1K_NC

1K_NC

1 2

SPI_CS#

0

1

2

1

R350 0R350 0

0

1

0

Title

Size Document Number Rev

Date: Sheet

1

REQUIRED STRAPS

R366

R363

R621

R610

10K_NC

10K

R368

R368 10K

10K

CPU IF=K8

Default

CPU IF=P4

+3.3V_ALW

C382

0.1U_NC

16

5

U22

74AHC1G08GW_NC

SB600M HDD/POWER

MGD 3A

16

R352 15_NCR352 15_NC

4

TALERT#

PCIE_MCARD1_DET#

USB_MCARD1_DET#

NC_GPIO56 WWAN_PCIE_RST# WLAN_PCIE_RST# LOM_PCIE_RST#

QUANTA

QUANTA COMPUTER

COMPUTER

10K

R620

R620 10K_NC

10K_NC

PCI_CLK0 PCI_CLK1

H, H = PCI ROM H, L = SPI ROM L, H = LPC ROM L, L = FWH ROM

R614 10KR614 10K

R615 100KR615 100K

R618 100KR618 100K

R628 20KR628 20K R613 20KR613 20K R598 20KR598 20K R604 20KR604 20K

1

R610 10K_NC

10K_NC

R612

R612 10K

10K

1 2

Default

SPI_CS0# 37

+3.3V_RUN

of

25 89Thursday, March 01, 2007

5

+3.3V_RUN

D D

+1.2V_RUN

C C

B B

A A

+3.3V_SUS

1.2V_SUS_ON39

12

C705

0.1U_NC

10

10 ±10

±10 X7R

X7R

L80

1 2

FBMJ4516HS111-T

Note: FBMJ4516HS111-T was 110 ohm@100MHz 4A DC 0.014ohm

％

+5V_RUN

+3.3V_RUN

A00-01

C700

0.1U_NC

10

10 ±10

±10 X7R

X7R

Put very close

+1.2V_SUS

C655

C655 22U

22U

6.3

6.3 0805

0805 X5R

X5R

SB600 ONLY

+1.2V_RUN

20mil Width

+3.3V_ALW2

1 2

31

2

5

+

C398

220U_6.3V_7343

％

R644 1KR644 1K

D30

SDMK0340L-7-F

12

C696

0.1U_NC

10

10 ±10

％

±10

％

X7R

C353

C353 22U

22U

6.3

6.3 0805

0805 X6S

X6S 20%

20%

20mil Width

C665

0.1U_10V

BLM15AG221SN1D

R314

R314 100K

100K

1.2V_SUS_ON#

Q40

Q40 2N7002W-7-F

2N7002W-7-F

C676

C676 1U

1U

6.3

+V5_VREF1

C727

C727 1U

1U

6.3

+1.2V_RUN_VDD

C695

12

C692

0.1U_NC

10

10 ±10

±10 X7R

X7R

C695 22U

22U

6.3

6.3 0805

0805

％

X6S

X6S 20%

20%

50mil Width

C675

C687

1U

6.3

+1.2V_ALW_SUS

20mil Width

C673

C664

0.1U_10V

L70

C660

2.2U

10

10 0603

0603

+1.2V_ALW_SUS +1.2V_SUS

+15V_ALW

2

R590

R590 100K

100K

1 2

31

BLM21PG221SN1D_NC 0805

Q69

Q69 2N7002W-7-F

2N7002W-7-F

C709

C709 1U

1U

6.3

12

C669

0.1U_10V

+1.2V_AVDDCK

+3.3V_RUN

L68

6 5 2 1

4

C720

C720 1U

1U

6.3

C688

C688 1U

1U

10

10 0603

0603 X6S

X6S ±10

％

±10

％

C658

0.1U

10

10 ±10

％

±10

％

X7R

C681

0.1U_10V

+1.8V_RUN

Q70

4

SI3456DV-T1-E3

3

C662

C662 4700P

4700P

25

4

20mil Width

C719

C721

1U

6.3

C701

C689

1U

10

0603

X6S

±10

％

±10

12

C373

0.1U

10

10 ±10

±10 X7R

X7R

C685

0.1U_10V

C706 0.1U_10VC706 0.1U_10V

+3.3V_AVDDCK

BLM15AG221SN1D

％

12

C640

0.1U

10

％

±10

％

±10

％

X7R

C678

0.1U_10V

L71

C713

C713 1U

1U

6.3

C702

C702 1U

1U

10

10 0603

0603 X6S

X6S ±10

％

±10

％

12

C682

0.1U

10

10 ±10

±10 X7R

X7R

C674

0.1U_10V

+V5_VREF1

C661

2.2U

10

10 0603

0603

3

U23C

A25

SB600 SB 27x27mm

VDDQ_1

A28

VDDQ_2

C29

VDDQ_3

D24

VDDQ_4

L9

VDDQ_5

L21

VDDQ_6

M5

VDDQ_7

P3

VDDQ_8

P9

VDDQ_9

T5

VDDQ_10

V9

VDDQ_11

W2

VDDQ_12

W6

VDDQ_13

W21

VDDQ_14

W29

VDDQ_15

AA12

VDDQ_16

AA16

VDDQ_17

AA19

VDDQ_18

AC4

VDDQ_19

AC23

VDDQ_20

AD27

VDDQ_21

AE1

VDDQ_22

AE9

VDDQ_23

AE23

VDDQ_24

AH29

VDDQ_25

AJ2

VDDQ_26

AJ6

VDDQ_27

AJ26

VDDQ_28

M13

VDD_1

M17

VDD_2

N12

VDD_3

N15

VDD_4

N18

VDD_5

R13

VDD_6

R17

VDD_7

U12

VDD_8

U15

VDD_9

U18

VDD_10

V13

VDD_11

V17

VDD_12

A2

S5_3.3V_1

A7

S5_3.3V_2

F1

S5_3.3V_3

J5

A18 A19 B19 B20 B21

AA27

AE11

A24

A22

B22

V29 V28 V27 V26 V25 V24 V23 V22 U27 T29 T28 T27 T24 T21 P27

J7

K1

G4 H1 H2 H3

S5_3.3V_4 S5_3.3V_5 S5_3.3V_6

S5_1.2V_1 S5_1.2V_2 S5_1.2V_3 S5_1.2V_4

USB_PHY_1.2V_1 USB_PHY_1.2V_2 USB_PHY_1.2V_3 USB_PHY_1.2V_4 USB_PHY_1.2V_5

CPU_PWR

V5_VREF

AVDDCK_3.3V

AVDDCK_1.2V

AVSSCK

PCIE_VSS_42 PCIE_VSS_41 PCIE_VSS_40 PCIE_VSS_39 PCIE_VSS_38 PCIE_VSS_37 PCIE_VSS_36 PCIE_VSS_35 PCIE_VSS_34 PCIE_VSS_33 PCIE_VSS_32 PCIE_VSS_31 PCIE_VSS_30 PCIE_VSS_29 PCIE_VSS_28

SB600 A13

％

Part 3 of 4

POWER

3

PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8

PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57

Rev.A21

A1 A20 A21 A29 B1 B7 B25 C21 C22 C24 D6 E24 F2 F23 G1 J1 J8 L6 L8 M9 M12 M15 M18 N13 N17 P1 P6 P21 R12 R15 R18 T6 T9 U13 U17 V3 V8 V12 V15 V18 V21 W1 W9 Y29 AA11 AA14 AA18 AC6 AC24 AD9 AD23 AE3 AE27 AG6 AJ1 AJ25 AJ29

D27 D28 D29 F26 G23 G24 G25 H27 J23 J26 J28 K27 L22 L23 L24 L27 L28 M21 M24 M27 N27 N28 P22 P23 P24 P25 P26

PCI_AD2823,32 PCI_AD2723,32 PCI_AD2623,32 PCI_AD2523,32 PCI_AD2423,32 PCI_AD2323,32

2

+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN

12

R630

R630 10K_NC

10K_NC

12

R633

2.2K_NC

2

12

R636

R636 10K_NC

10K_NC

12

R637

2.2K_NC

Title

Size Document Number Rev

Date: Sheet

12

R624

R624 10K_NC

10K_NC

12

R626

2.2K_NC

QUANTA

QUANTA COMPUTER

COMPUTER

SB600M Power & STRAPS

MGD 3A

12

R639

R639 10K_NC

10K_NC

12

R638

2.2K_NC

1

12

R629

R629 10K_NC

10K_NC

12

R632

2.2K_NC

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1

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12

R643

R643 10K_NC

10K_NC

R642

2.2K_NC

1

2

3

4

5

6

7

8

SATA Connector.

A A

B B

Place caps close to

+5V_HDD

connector.

12

C738

0.1U_16V

SATA_SBRX_C_DTX_N0

SATA_SBRX_C_DTX_P0

12

C740

C740 1000P_50V

1000P_50V

+3.3V_RUN

12

C735

0.1U_16V_NC

12

C739

0.1U_16V

CON6

MLX_67492-1821

1 2

GND1

RXP RXN

GND2

TXN TXP

GND3

3.3V_0

3.3V_1

3.3V_2 GND4 GND5 GND6

5V_0 5V_1

5V_2 GND7 RSVD GND8 12V_0 12V_1 12V_2

12

C741

C741 10U_10V_0805

10U_10V_0805

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

C728

0.01U16X7R

0.01U16X7R C729

C729

0.01U16X7R

C732

C732 1000P_50V_NC

1000P_50V_NC

12

C734

0.1U_16V_NC

Place caps close to connector.

12

C742

C742 1U_10V_0603

1U_10V_0603

SATA_SBRX_C_DTX_N0 SATA_SBRX_C_DTX_P0

+3.3V_RUN

+5V_HDD

SATA_SBRX_DTX_N0 25

SATA_SBRX_DTX_P0 25

NOTE: C728,C729 Close to CON6

12

C737

C737 10U_10V_0805_NC

10U_10V_0805_NC

SATA_SBTX_C_DRX_P0 25 SATA_SBTX_C_DRX_N0 25

12

C736

C736 1U_10V_0603_NC

1U_10V_0603_NC

ODD Connector.

+5V_MOD

12

C113

C113 10U_10V_0805

10U_10V_0805

+3.3V_RUN

12

Place caps close to connector.

IDE_DDACK#

IDE_DD[0..15]25

IDE_DDREQ25 IDE_DIOW#25 IDE_DIOR#25

IDE_DIORDY25 IDE_DDACK#25 IDE_IRQ25

IDE_DCS1#25 IDE_DCS3#25

IDE_DA[0..2]25

12

C109

C97

0.1U_16V

R103 0R103 0 R106 4.7KR106 4.7K

12

C110

0.1U_16V

SATA_DET#24

12 12

IDE_DD[0..15]

IDE_DDREQ IDE_DIOW# IDE_DIOR# IDE_DIORDY IDE_DDACK# IDE_IRQ

IDE_DCS1# IDE_DCS3#

IDE_DA0

IDE_DA1

IDE_DA2

+5V_MOD

DASP#

PDIAG#

R97 0_NCR97 0_NC

USBP4+24 USBP4-24

IDE_DCS1#

IDE_IRQ IDE_DDACK_R#

IDE_DDREQ IDE_DD0 IDE_DD14 IDE_DD13

IDE_DD3 IDE_DD4 IDE_DD10 IDE_DD9

IDE_DD7

JMOD1

1

3

5

7

9

11

13

12

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

JAE_WM1F068NSD-R500

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

60 62 64 66 68

MOD_RST

62 64 66 68

INT_MOD_IN1#

IDE_DCS3# IDE_DA2 IDE_DA0 IDE_DA1

R105 470R105 470

CSEL2 IDE_DIOR#IDE_DIORDY IDE_DIOW# IDE_DD15

IDE_DD1 IDE_DD2 IDE_DD12 IDE_DD11

R119 0_NCR119 0_NC

IDE_DD5 IDE_DD6 IDE_DD8

R121 100KR121 100K

R122 100KR122 100K

1 2

12

R118 56R118 56

PLTRST# 23,38,39,43

IDE_RST_MOD 24

USB_IDE# 24

+3.3V_RUN

MODPRES# 38

+3.3V_ALW

C C

Q14

Q14 FDC655BN

R93

R93 100K

100K

FDC655BN

6 5 2 1

3

31

2

6

+15V_ALW

12

R104

R104 100K

100K

+3.3V_ALW2

12

31

2

R102

R102 100K

100K

Q17

2N7002W-7-F

Vgs = 20

Vgs = 20 Vds = 60

Vds = 60 Current = 115m

Current = 115m Type = Single N

Type = Single N

1 2

4

3

HDD_EN_5V

31

Q72

2N7002W-7-F

Vgs = 20

Vgs = 20 Vds = 60

Vds = 60 Current = 115m

Current = 115m Type = Single N

Type = Single N

+5V_HDD+5V_ALW

Q45

Q45 FDC655BN

FDC655BN

+15V_ALW

+3.3V_ALW2

12

R648

R648 100K

100K

D D

HDDC_EN38

1

31

Q71

2

12

2N7002W-7-F

R647

Vgs = 20

100K

Vds = 60

Vds = 60 Current = 115m

Current = 115m Type = Single N

Type = Single N

6 5 2 1

R374

R374 100K

100K

1 2

2

Design current: 700mA Max current: 1000mA

12

C399

4.7U_6.3V_0603

12

C400

0.1U_50V_0603

12

R375

R375 100K

100K

3

MODC_EN38

4

5

+5V_MOD+5V_ALW

Design current: 1050mA Max current: 1500mA

4

12

C106

C106 10U_10V_0805

10U_10V_0805

MOD_EN

Q15

2N7002W-7-F

Vgs = 20

Vgs = 20 Vds = 60

Vds = 60 Current = 115m

Current = 115m Type = Single N

Type = Single N

12

C114

0.1U_50V_0603

Title

SATA (HDD&CD_ROM)

Size Document Number Rev

MGD 2A

Date: Sheet

12

R79

R79 100K

100K

QUANTA

QUANTA COMPUTER

COMPUTER

7

Symbol: 2N7002W-7-F

D(3)

G(2)

of

27 89Thursday, March 01, 2007

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S(1)

QUANTA JX6 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual