QUANTA TWB, JWV Schematics

5

4

3

2

1

01

TWB + JWV Intel Boardwell ULT Platform Block Diagram

D D

DDR3L SO-DIMM-0 Maxima 8GBs

Front Side / STD Type

DDR3L SO-DIMM-1 Maxima 8GBs

Rear Side / REV Type

SATA HDD Package : 9.5 (mm)

SATA ODD Board for TWB Package : 12.7 (mm)

C C

PAGE 32

SATA ODD Package : 12.7 (mm)

NGFF SSD

Package : 2280 & 2242

Full mini-PCIe Card - SSD

PAGE 12

PAGE 13

PAGE 28

PAGE 26

www.rosefix.com

USB3.0 Port

Left / Front Side

PAGE 25

USB3.0 Port

Left / Rear Side

PAGE 25

B B

A A

USB Board

USB2.0 Port USB2.0 Port-1

Right Side

Combo Jack Ext. Headphone & MIC

Speaker 4Ω , Normal 1.5W

Digital MIC with Camera

TPS2546

Package : QFN-40

PAGE 25

PAGE 22

USB3.0 Port-1 & USB2.0 Port-0

USB3.0 Port-2 & USB2.0 Port-5

Audio Codec

ALC282-CG

Package : MQFN48 Size : 6 x 6 (mm)

DDR3L CH-A

DDR3L CH-B

SATA0 6GB/s Port-0

SATA1 3GB/s Port-1

SATA2 6GB/s Port-2

PAGE 27

Azalia

SPI

System BIOS & EC F/W

PAGE 7

Broadwell Mobile 2+1 U-Processor

Broadwell Mobile 2+2 U-Processor

QGZ4 - AJ0QGZ4UT01 QGZ3 - AJ0QGZ3UT01 QGZ5 - AJ0QGZ5VT00

Processor : Daul Core

TDP : 15 (Watt)

Package : BGA, 1168-PIN

Size : 40 X 24 X 1.3 (mm)

Embedded ControllerSPI ROM 8MByte

ENE IC CTRL(128P) KB9010QF C4

Package : LQFP Size : 14 x 14 (mm)

PAGE-2~10

PCI-E X4 Lane

Port-5

eDP X 2

eDP Port-0 & 1

DDI Port-1

DDI Port-2

PCIE Gen 1 x 1 Lane Port-2

PCIE Gen 1 x 1 Lane Port-4

PCIE Gen 1 x 1 Lane Port-3

LPC

PAGE 30

NVIDIA N16V-GM / GT920M N16S-GT / GT940M

Power : 25 (Watt)

Package : S3 Size : 23 x 23 (mm)

PAGE-14~17

27MHz

RTD2136

Package : QFN-32

eDP

ANX6210

Package : QFN-40

Card Reader

Package : QFN32 Size : 4 x 4 (mm)

LAN Controller

Package : OFN32

NGFF WLAN

Half mini-PCIe Card WLAN & BT Combo Card

USB2.0 Port-6

JWV Power Button Board TWB Power Button Board LID Switch

PAGE 19

PAGE 21

27MHz

PAGE 28

One-Channell 64Bit

Graphics 4Gb DDR3 SDRAM

1.0GHz / 16-Bit

LVDS (2-CH)

Camera

USB2.0 Port-2

HDMI

CRT

RTS5227E-GRT

PAGE 24

RTL8111GS-CG(Giga)

PAGE 23

Package : 2230

PAGE 25

PAGE-18

PAGE 20

PAGE 21

TWB

Card Slot SD Card MMC Card

RJ45

JWV

PCB 6L STACK UP

LAYER-1 : TOP LAYER-2 : SGND LAYER-3 : IN1(High) LAYER-4 : IN2(Low) LAYER-5 : SVCC LAYER-6 : BOT

w w w . c h i n a f i x . c o m

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

Keyboard

PAGE 29

5

4

Touch Pad

PAGE 29

3

FAN

PAGE 28

BATTERY

PAGE 32

2

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

Block Diagram

Date:

Wednesday, October 29, 2014

Rev.Size

2A

Sheet :

1 44

1

1 44

2A

of

5

4

3

2

1

02

D D

The PECI interface is a controlled and reliable one-wire bi-directional signal which is used to communicate the temperature of the Broadwell processor digital thermometer to the PECI host controller or to monitor and control the Broadwell processor information such as energy, power limits, status and DDR temperature.

U26A *I7-5500U 2.4G QH3E

IN_D2#[20]

IN_D1#[20]

IN_D0#[20]

IN_CLK#[20]

IN_D2[20]

IN_D1[20]

IN_D0[20]

IN_CLK[20]

DDI2_CRT_TX0N[21]

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mΩ

C C

+VCCIOA_OUT

DDI2_CRT_TX0P[21] H_PROCHOT#[30,36]

R163 24.9/F_4

backlight modulation control

eDP_RCOMP

170.81 MIL

EDP_DISP_UTIL[6]

INT_eDP_AUXP[19] INT_eDP_AUXN[19]

INT_eDP_TXP0[19]

INT_eDP_TXP1[19]

INT_eDP_TXN0[19]

INT_eDP_TXN1[19]

C54 B58 B55 A57 C55 C58 A55 B57

C51 C53 C49 A53 C50 B54 B50 B53

D20 A43

B45 A45

B46 B47 C46 B49

C45 A47 C47 A49

DDI1_TXN0 DDI1_TXN1 DDI1_TXN2 DDI1_TXN3 DDI1_TXP0 DDI1_TXP1 DDI1_TXP2 DDI1_TXP3

DDI2_TXN0 DDI2_TXN1 DDI2_TXN2 DDI2_TXN3 DDI2_TXP0 DDI2_TXP1 DDI2_TXP2 DDI2_TXP3

EDP_RCOMP EDP_DISP_UTIL

EDP_AUXP EDP_AUXN

eDP_TXP0 eDP_TXP1 eDP_TXP2 eDP_TXP3

eDP_TXN0 eDP_TXN1 eDP_TXN2 eDP_TXN3

EC_PECI[30]

+V1.05S_VCCST

R145 62_4

R529 56.2/F_4

Allows EC to initiate Thermal Control Circuit (TCC) on the processor for overall platform thermal management. Similarly, this allows the VR to the initiate VR thermal protection.

eDP

TP108 TP112

TP100

PROC_DETECT#

CATERR#

PROCPWRGD

R499 10K/F_4

PCI EXPRESS* - GRAPHICS

U26B *I7-5500U 2.4G QH3E

D61

PROC_DETECT#

K61

CATERR#

N62

PECI

K63

PROCHOT#

C61

PROCPWRGD

MISCTHERMALPWR MANAGEMENT

AV15

PRDY# PREQ#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

AU60 AV60 AU61

AV61

J62 K62

E60 E61 E59

F63 F62

J60 H60 H61 H62 K59 H63 K60 J61

SM_DRAMRST# SM_RCOMP_0

SM_RCOMP_1 SM_RCOMP_2PROCHOT#

BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

DDR3JTAG & BPM

SM_PG_CNTL1

PROC_TCK PROC_TMS

PROC_TRST#

PROC_TDI

PROC_TDO

R284 *0_4/S R275 200/F_4

R274 121/F_4 R273 100/F_4

TP13 TP22

XDP_TDO_CPU XDP_TDI_CPU XDP_TMS_CPU

XDP_TRST#_CPU XDP_TCK0

TP111 TP15 TP21 TP20 TP25 TP16

+1.35VSUS

R288 470/F_4

R523 51_4 R520 *51_4 R511 *51_4

R600 *51_4 R166 51_4

DDR3_DRAMRST# [12,13]

DDR_PG_CNTL [13]

XDP_PRDY#_CPU [11]

XDP_PREQ#_CPU [11]

+V1.05S_VCCST

XDP_TCK0 [11]

XDP_TMS_CPU [11]

XDP_TRST#_CPU [7,11]

XDP_TDI_CPU [11]

XDP_TDO_CPU [11]

XDP_BPM0 [11] XDP_BPM1 [11]

Processor pull-up (CPU)

B B

A A

Date:

5

4

3

2

Date:

+VCCIOA_OUT[4]

+V1.05S_VCCST[4,9,11,36]

+1.35VSUS[4,12,13,31,35]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

ULT 1/9 (eDP/DDI)

Wednesday, October 29, 2014

Sheet :

1

+VCCIOA_OUT +V1.05S_VCCST +1.35VSUS

2 44

Rev.Size

2A

of

5

4

3

2

1

03

M_A_DQ[63:0][12] M_B_DQ[63:0][13]

M_A_DQSN[7:0][12] M_A_DQSP[7:0][12]

M_B_DQSN[7:0][13]

D D

M_B_DQSP[7:0][13]

Haswell ULT Processor (DDR3L)

U26C *I7-5500U 2.4G QH3E

AH63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13

C C

B B

M_A_BS#1[12] M_A_BS#2[12]

M_A_CAS#[12] M_A_RAS#[12] M_A_WE#[12]

M_B_DQ14 M_B_DQ15

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31

AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58

AW58

AY56

AW56

AV58 AU58 AV56 AU56 AY54

AW54

AY52

AW52

AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51

AU35 AV35 AY41

AU34 AY34

AW34

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BA0 SA_BA1 SA_BA2

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

SA_CLK0

SA_CLK#0

SA_CKE0

SA_CLK1

SA_CLK#1

SA_CKE1

SA_CKE2

SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AV37 AU37 AU43

AY36 AW36 AW43

AY42

AY43

AP33 AR32

AP32

AJ61

M_A_DQSN0

AN62

M_A_DQSN1

AM58

M_B_DQSN0

AM55

M_B_DQSN1

AV57

M_A_DQSN2

AV53

M_A_DQSN3

AL43

M_B_DQSN2

AL48

M_B_DQSN3

AJ62

M_A_DQSP0

AN61

M_A_DQSP1

AN58

M_B_DQSP0

AN55

M_B_DQSP1

AW57

M_A_DQSP2

AW53

M_A_DQSP3

AL42

M_B_DQSP2

AL49

M_B_DQSP3

AU36

M_A_A0

AY37

M_A_A1

AR38

M_A_A2

AP36

M_A_A3

AU39

M_A_A4

AR36

M_A_A5

AV40

M_A_A6

AW39

M_A_A7

AY39

M_A_A8

AU40

M_A_A9

AP35

M_A_A10

AW41

M_A_A11

AU41

M_A_A12

AR35

M_A_A13

AV42

M_A_A14

AU42

M_A_A15

AP49 AR51 AP51

20mils width

VREF_CA : Command / Address Reference Voltage. VREF_DQ_A, VREF_DQ_B : Data Reference Voltage.

M_A_CLKP0 [12] M_A_CLKN0 [12]

M_A_CKE0 [12]

M_A_CLKP1 [12] M_A_CLKN1 [12]

M_A_CKE1 [12]

M_A_CS#0 [12] M_A_CS#1 [12]

TP66 TP54

VIA: VIA20D10A25 check match 20mil?

M_A_A[15:0] [12] M_B_A[15:0] [13]

SM_VREF [12] SMDDR_VREF_DQ0_M3 [12] SMDDR_VREF_DQ1_M3 [13]

M_B_BS#0[13]M_A_BS#0[12] M_B_BS#1[13] M_B_BS#2[13]

M_B_CAS#[13] M_B_RAS#[13] M_B_WE#[13]

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47

M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AY31

AW31

AY29

AW29

AV31 AU31 AV29 AU29 AY27

AW27

AY25

AW25

AV27 AU27 AV25 AU25 AM29 AK29

AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26 AM26 AK25

AL25 AY23

AW23

AY21

AW21

AV23 AU23 AV21 AU21 AY19

AW19

AY17

AW17

AV19 AU19 AV17 AU17 AR21 AR22

AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18

AL18 AK20 AM20 AR18 AP18

AL35 AM36 AU49

AM33 AM35 AK35

U26D *I7-5500U 2.4G QH3E

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BA0 SB_BA1 SB_BA2

SB_CAS# SB_RAS# SB_WE#

AN38

SB_CLK0

AM38

SB_CLK#0

AY49

SB_CKE0

AL38

SB_CLK1

AK38

SB_CLK#1

AU50

SB_CKE1

AW49

SB_CKE2

AV50

SB_CKE3

AM32

SB_CS#0

AK32

SB_CS#1

AL32

SB_ODT0

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

M_A_DQSN4 M_A_DQSN5

M_B_DQSN4 M_B_DQSN5

M_A_DQSN6 M_A_DQSN7

M_B_DQSN6 M_B_DQSN7

M_A_DQSP4 M_A_DQSP5

M_B_DQSP4 M_B_DQSP5

M_A_DQSP6 M_A_DQSP7

M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

SB_MA0 SB_MA1 SB_MA2 SB_MA3

DDR SYSTEM MEMORY B

SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

M_B_CLKP0 [13] M_B_CLKN0 [13]

M_B_CKE0 [13]

M_B_CLKP1 [13] M_B_CLKN1 [13]

M_B_CKE1 [13]

M_B_CS#0 [13] M_B_CS#1 [13]

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

ULT 2/9 (DDR3L I/F)

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

3 44

1

3 44

Rev.Size

2A

of

5

4

3

2

1

TP102 TP103

TP23

04

R609

49.9/F_4

C664 10U/6.3V_6

C663 10U/6.3V_6

C667 10U/6.3V_6

Close to CPU

C657 2.2U/6.3V_4

Direct tie to CPU VCC/VSS-Ball

R266 *0_8

C345

4.7U/6.3V_6

+VCCIOA_OUT

R141 *0_4/S

2 1

D2 *RB500V-40

H_VCCST_PWRGD_R

+VCC_CORE

R512 100/F_4

R521 100/F_4

+1.35VSUS

C665 10U/6.3V_6

C668 10U/6.3V_6

C666 10U/6.3V_6

C658 2.2U/6.3V_4

C660 2.2U/6.3V_4

C656 2.2U/6.3V_4

100- ±1% pull-up to VCC near processor.

VCC_SENSE [36]

VSS_SENSE [36]

Check result : Routing together.

Layout note: need routing together and ALERT need between CLK and DATA.

H_CPU_SVIDALRT#

VR_SVID_CLK : One segs without routing with DATA/CLK.

VR_SVID_CLK

H_CPU_SVIDDAT

H_VR_ENABLE_MCP [36]

IMVP_PWRGD_R [30]

R537 43_4

R150 *0_4/S

IMVP_PWRGD [6,36]

R501 *0_4/S

C339 *22U/6.3V_8

+V1.05S_VCCST

R493 10K_4

2 1

D9 RB500V-40

C636 *10P/50V_4

+V1.05S_VCCST

R542 75/F_4

SVID ALERT

C234 *0.1U/10V_4

VR_SVID_ALERT# [36]

SVID CLK

+V1.05S_VCCST

Place PU resistor close to VR

R148 130/F_4

SVID DATA

VR_SVID_DATA [36]

+V1.05S_VCCST

R492 150/F_4

TP24

R491 *10K_4

+V1.05S_VCCST +1.05V

R265 *0_8/S

C333 *1U/6.3V_4

H_VCCST_PWRGD [11]

VR_SVID_CLK [36]

PWR_DEBUG [11]

HWPG [11,30,33,34,35]

CFG0-19 need Reserve TP

CFG0[11] CFG1[11] CFG2[11] CFG3[11] CFG4[11] CFG5[11] CFG6[11] CFG7[11] CFG8[11] CFG9[11] CFG10[11] CFG11[11] CFG12[11] CFG13[11] CFG14[11] CFG15[11] CFG16[11] CFG17[11] CFG18[11] CFG19[11]

R552 49.9/F_4

R498 8.2K/F_4

TP61 TP65 TP58 TP46 TP68 TP42 TP43 TP41 TP36 TP30 TP51 TP32 TP34 TP28 TP27 TP40 TP64 TP67 TP31 TP33

CFG_RCOMP

224.05 MIL

TD_IREF

276.38 MIL

TP128 TP124

TP109 TP101

U26E *I7-5500U 2.4G QH3E

AC60

CFG0

AC62

CFG1

AC63

CFG2

AA63

CFG3

AA60

CFG4

Y62

CFG5

Y61

CFG6

Y60

CFG7

V62

CFG8

V61

CFG9

V60

CFG10

U60

CFG11

T63

CFG12

T62

CFG13

T61

CFG14

T60

CFG15

AA62

CFG16

AA61

CFG17

U63

CFG18

U62

CFG19

V63

CFG_RCOMP

A5

RSVD

E1

RSVD

D1

RSVD

J20

RSVD

H18

RSVD

B12

TD_IREF

AV63

RSVD_TP

AU63

RSVD_TP

C63

RSVD_TP

C62

RSVD_TP

B43

RSVD

+3VPCU

IO Thrm Protect

R86

16.5K/F_4

For 65 degree, 1.8v limit, (SW)

R89

3.3K/F_4

For 75 degree, 1.2v limit, (HW)

R91 *0_4/S

THER_CPU

R87 100K_4 NTC

C144

0.1U/10V_4

1 2

C157

0.1U/10V_4

1 2

RSVD_TP RSVD_TP

RSVD_TP

PROC_OPI_RCOMP

RESERVED

THRM_MOINTOR [30]

THRM_MOINTOR1 [30]

RSVD RSVD RSVD

RSVD RSVD

A51 B51

L60

N60 W23 Y22

AY15

PROC_OPI_RCOMP

242.63 MIL

AV62 D58

P22

VSS

N21

VSS

P20 R20

U26F

+VCC_CORE

C262 22U/6.3V_8

C244 22U/6.3V_8

C214 22U/6.3V_8

C226 22U/6.3V_8

C265 22U/6.3V_8

C245 22U/6.3V_8

D D

C257 22U/6.3V_8

C225 22U/6.3V_8

C242 22U/6.3V_8

C277 22U/6.3V_8

C219 22U/6.3V_8

C218 22U/6.3V_8

C C

C254 22U/6.3V_8

C264 22U/6.3V_8

C213 22U/6.3V_8

C227 22U/6.3V_8

B B

C256 22U/6.3V_8 C220 *22U/6.3VS_8_T100

C258 22U/6.3V_8

C243 22U/6.3V_8

C252 22U/6.3V_8

C255 22U/6.3V_8

C291 22U/6.3V_8

C241 22U/6.3V_8

C221 22U/6.3V_8

C223 22U/6.3V_8

C215 *22U/6.3VS_8_T100C240 22U/6.3V_8

C216 *22U/6.3VS_8_T100

C217 *22U/6.3VS_8_T100

*I7-5500U 2.4G QH3E

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23

J23 K23 K57 L22 M23 M57 P57 U57

W57 AB57 AD57 AG57

C24 C28 C32

F59

L59

J58

N58 AC58 AB23 AD23 AA23 AE59

AT2 AU44 AV44

D15

F22

H22

J21 N23 R23 T23 U10 AL1

AM11

AP7

AU10 AU15

POWER

VCC VCC

32A 1.4A

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

HSW ULT POWER

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

VCCIO_OUT

VCCIOA_OUT

VIDALERT#

VIDSCLK

VIDSOUT

PWR_DEBUG#

VR_EN

VR_READY

VCCST VCCST VCCST

VCCST_PWRGD

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

VCC_SENSE VSS_SENSE

RSVD RSVD

AH26 AJ31 AJ33 AJ37 AN33 AP43 AR48 AY35 AY40 AY44 AY50

D63

VSS

P62

VSS

T59 AD60 AD59 AA59 AE60 AC59 AG58 U59

+VCCIO_OUT +1.05V

V59

A59 E20

L62 N63 L63

H59

F60 C59

R500 10K_4

AC22 AE22 AE23

B59

P60

TP17

P61

TP59

N59

TP55

N61

TP57

E63 E62

AW14

TP70

AY14

TP71

Processor Strapping

CFG3 (Physcial Debug Enable)

A A

5

DFX Privacy

CFG4 (DP Presence Strap)

The CFG signals have a default value of '1' if not terminated on the board.

1 0

CFG3

CFG4

R554 *1K_4

R246 1K_4

Disable: Enable: Set DFX Enable in DFX interface MSR

Disable; No physical DP attached to eDP

* The CFG signals have a default value of "1" if not terminated on the board. * CFG[3] : MSR Privacy Bit Feature,

( " 1 " = Debug capability is determined by IA32_Debug_Interface_MSR (C80h) bit[0] setting. " 0 " = IA32_Debug_Interface_MSR (C80h) bit[0] default setting overridden. )

* CFG[4] : eDP enable, ( " 1 " = Disabled, " 0 " = Enabled )

4

Enable; An ext DP device is connected to eDP

3

Circuit

C

Date:

Wednesday, October 29, 2014

2

Wednesday, October 29, 2014

+VCCIOA_OUT[2] +3VPCU[7,25,27,28,29,30,32,33] +VCC_CORE[36] +VCCIO_OUT[6] +V1.05S_VCCST[2,9,11,36] +1.05V[7,10,11,21,27,30,34,37,39] +1.35VSUS[2,12,13,31,35]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

ULT 3/9 (POWER-1)

1

Sheet :

+VCCIOA_OUT +3VPCU +VCC_CORE +VCCIO_OUT +V1.05S_VCCST +1.05V +1.35VSUS

of

4 44

Rev.Size

2A

5

4

3

2

1

05

D D

U26I

U26H U26G *I7-5500U 2.4G QH3E

A11

VSS

A14

VSS

A18

VSS

A24

VSS

A28

VSS

A32

VSS

A36

VSS

A40

VSS

A44

VSS

A48

VSS

A52

VSS

A56

VSS

AA1

VSS

AA58

VSS

AB10

VSS

AB20

VSS

AB22

VSS

AB7

VSS

AC61

VSS

AD21

VSS

AD3

VSS

AD63

VSS

AE10

VSS

AE5

VSS

AE58

VSS

C C

B B

AF11 AF12 AF14 AF15 AF17 AF18

AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

VSS VSS VSS VSS VSS VSS

AG1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

AJ35

VSS

AJ39

VSS

AJ41

VSS

AJ43

VSS

AJ45

VSS

AJ47

VSS

AJ50

VSS

AJ52

VSS

AJ54

VSS

AJ56

VSS

AJ58

VSS

AJ60

VSS

AJ63

VSS

AK23

VSS

AK3

VSS

AK52

VSS

AL10

VSS

AL13

VSS

AL17

VSS

AL20

VSS

AL22

VSS

AL23

VSS

AL26

VSS

AL29

VSS

AL31

VSS

AL33

VSS

AL36

VSS

AL39

VSS

AL40

VSS

AL45

VSS

AL46

VSS

AL51

VSS

AL52

VSS

AL54

VSS

AL57

VSS

AL60

VSS

AL61

VSS

AM1

VSS

AM17

VSS

AM23

VSS

AM31

VSS

AM52

VSS

AN17

VSS

AN23

VSS

AN31

VSS

AN32

VSS

AN35

VSS

AN36

VSS

AN39

VSS

AN40

VSS

AN42

VSS

AN43

VSS

AN45

VSS

AN46

VSS

AN48

VSS

AN49

VSS

AN51

VSS

AN52

VSS

AN60

VSS

AN63

VSS

AN7

VSS

AP10

VSS

AP17

VSS

AP20

VSS

*I7-5500U 2.4G QH3E

AP22 AP23 AP26 AP29

AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

INT

AV59

VSS

AV8

VSS

AW16

VSS

AW24

VSS

AW33

VSS

AW35

VSS

AW37

VSS

AW4

VSS

AW40

VSS

AW42

VSS

AW44

VSS

AW47

VSS

AW50

VSS

AW51

VSS

AW59

VSS

AW60

VSS

AY11

VSS

AY16

VSS

AY18

VSS

AY22

VSS

AY24

VSS

AY26

VSS

AY30

VSS

AY33

VSS

AY4

VSS

AY51

VSS

AY53

VSS

AY57

VSS

AY59

VSS

AY6

VSS

B20

VSS

B24

VSS

B26

VSS

B28

VSS

B32

VSS

B36

VSS

B4

VSS

B40

VSS

B44

VSS

B48

VSS

B52

VSS

B56

VSS

B60

VSS

C11

VSS

C14

VSS

C18

VSS

C20

VSS

C25

VSS

C27

VSS

C38

VSS

C39

VSS

C57

VSS

D12

VSS

D14

VSS

D18

VSS

D2

VSS

D21

VSS

D23

VSS

D25

VSS

D26

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

TP104

DC_TEST_AY2_AW2

DC_TEST_AY3_AW3

TEST_AY60

DC_TEST_AY61_AW61

DC_TEST_AY62_AW62

TEST_B2

DC_TEST_A3_B3

DC_TEST_A61_B61

DC_TEST_B62_B63

DC_TEST_C1_C2

*I7-5500U 2.4G QH3E

D33

VSS

D34

VSS

D35

VSS

D37

VSS

D38

VSS

D39

VSS

D41

VSS

D42

VSS

D43

VSS

D45

VSS

D46

VSS

D47

VSS

D49

VSS

D5

VSS

D50

VSS

D51

VSS

D53

VSS

D54

VSS

D55

VSS

D57

VSS

D59

VSS

D62

VSS

D8

VSS

E11

VSS

E17

VSS

F20

VSS

F26

VSS

F30

VSS

F34

VSS

F38

VSS

F42

VSS

F46

VSS

F50

VSS

F54

VSS

F58

VSS

F61

VSS

G18

VSS

G22

VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS

H13

VSS

AY2

DAISY_CHAIN_NTCF_AY2

AY3

DAISY_CHAIN_NTCF_AY3

AY60

DAISY_CHAIN_NTCF_AY60

AY61

DAISY_CHAIN_NTCF_AY61

AY62

DAISY_CHAIN_NTCF_AY62

B2

DAISY_CHAIN_NTCF_B2

B3

DAISY_CHAIN_NTCF_B3

B61

DAISY_CHAIN_NTCF_B61

B62

DAISY_CHAIN_NTCF_B62

B63

DAISY_CHAIN_NTCF_B63

C1

DAISY_CHAIN_NTCF_C1

C2

DAISY_CHAIN_NTCF_C2

VSS

DAISY_CHAIN_NTCF_A3

DAISY_CHAIN_NTCF_A4 DAISY_CHAIN_NTCF_A60 DAISY_CHAIN_NTCF_A61 DAISY_CHAIN_NTCF_A62

DAISY_CHAIN_NTCF_AV1 DAISY_CHAIN_NTCF_AW1 DAISY_CHAIN_NTCF_AW2 DAISY_CHAIN_NTCF_AW3

DAISY_CHAIN_NTCF_AW61 DAISY_CHAIN_NTCF_AW62 DAISY_CHAIN_NTCF_AW63

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63 V58 AH46 V23 AH16

A3

DC_TEST_A3_B3

A4

TEST_A4

A60

TEST_A60

A61

DC_TEST_A61_B61

A62

TEST_A62

AV1

TEST_AV1

AW1

TEST_AW1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW61

AW62

DC_TEST_AY62_AW62

AW63

TEST_AW63

TP106 TP107TP127

TP105 TP122 TP121

TP126

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

ULT 4/9 (RSV,GND)

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

5 44

1

5 44

Rev.Size

2A

of

5

4

3

2

1

SUSWARN#

+3VS5

R203 *0_4

R211 *0_4/S

+3V

RSMRST#

R194 *0_4/S

R245 *0_4/S

R199 *0_4/S

R237 10K_4

TP63

R560 10K_4

SYS_RESET#

R561 *1K_4

C319 *0.1U/10V_4

R590 10K_4

R178 100K_4 R614 10K_4

SUSACK#

SUSWARN#

DNBSWON#_R

AC_PRESENT_R

PM_BATLOW# PCH_SLP_S0_N PCH_SLP_WLAN_N

Lynx Point-LP Platform Controller Hub (LVDS,DDI)

DSWVRMEN

U26L *I7-5500U 2.4G QH3E

AK2

SUSACK#

AC3

SYS_RESET#

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST#

AW6

RSMRST#

AV4

SUSWARN#/SUSPWRDNACK/GPIO30(SUS)

AL7

PWRBTN#

AJ8

ACPRESENT / GPIO31(DSW)

AN4

BATLOW# / GPIO72(DSW)

AF3

SLP_S0#

AM5

SLP_WLAN#/ GPIO29(DSW)

DSWVRMEN

CLKRUN#/ GPIO32

SUS_STAT# / GPIO61 (SUS)

SUSCLK / GPIO62 (SUS)

SLP_S5# / GPIO63 ( DSW)

System Power Management

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

SLP_LAN#

AW7

AV5

AJ5

V5

AG4

AE6

AP5

AJ6

AT4

AL5

AP4

AJ7

DPWROK

+3VS5

CLKRUN#

SUS_STAT#

PCH_SUSCLK_L

SLP_SUS#

SLP_LAN#

R615 *0_4

R616 *0_4/S

For DS3 -->Ra Non-DS3 -->Rb

R189 1K_4

R576 *0_4/S

R224 *0_4/S

Rb

Ra

RSMRST#

R617 100K_4

DPWROK : Deep Sleep Well Power OK DPWROK need to be shorted to RSMRST# when Deep S4/S5 state is not support.

TP45

TP120

TP53

TP56

DSWVRMEN [7]

DPWROK_EC [30]

PCIE_WAKE# [23,24,25,30]

CLKRUN# [28,30]

PCH_SUSCLK [25,30]

SLP_S5# [11]

SUSC# [11,30]

SUSB# [11,30]

SLP_SUS#_EC [30]

SUSCLK is a square waveform signal output from the RTC oscillation circuit.  Square Waveform, 32.7KHz, Vpp=3.3V.

for DS3

SUSACK#_EC[30]

System PWR_OK(CLG)

SYS_PWROK is used to inform the Lynx Point that power is

D D

C C

stable to some other system component(s) and the system is ready to start the exit from reset.

SYS_PWROK[11]

C651 *0.1U/10V_4

IMVP_PWRGD[4,36]

EC_PWROK[30]

SUSPWRDNACK / SUSWARN# This signal is Active-high and is driven low by the IntelR ME when it requires the PCH Suspend Well to be powered.

2 1

PWROK (PCH_PWROK) is an indication to the Lynx Point that all of its core power rails have been stable for 5 ms.

APWROK should be should be asserted when all IntelR Management Engine (IntelR ME) power-rails are up and stable.

+3VS5

3 5

for DS3

U28 *TC7SH08FU

SYS_RESET# Input to PCH M cannot float. This pin forces an internal reset to the PCH.

SYS_RESET#[11]

4

SYS_PWROK

R596 *0_4/S

EC_PWROK

PLTRST#[11,14,21,23,24,25,28,30]

RSMRST#[30] SUSWARN#_EC[30]

DNBSWON#[11,30] SLP_A# [11]

AC_PRESENT_EC[30]

PCH_SLP_S0_N[11,30]

SLP_S0# is a PCH signal which indicates the system is in the S0ix State. SLP_S0# stays high in Sx and during Sx entry/exit. This signal will be low during low power state.

U26M *I7-5500U 2.4G QH3E

06

PCH_LVDS_BLON[20] PCH_DISP_ON[20] PCH_DPST_PWM[19,20]

B B

A A

5

EDP_DISP_UTIL[2]

+5V[20,21,22,25,28,29,31,37] +3V_DEEP_SUS[7,8,9,10,11] +VCCIO_OUT[4] +3V[7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +3VS5[9,10,11,22,25,28,31,33,34,37,39]

R495 *0_4

+5V +3V_DEEP_SUS +VCCIO_OUT +3V +3VS5

A9

EDP_BKLEN

C6

EDP_VDDEN

B8

EDP_BKLCTL

DDPB_CTRLCLK

DDPB_CTRLDATA

EDP SIDEBAND

DDPC_CTRLCLK

DDPC_CTRLDATA

DISPLAY

4

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPC_AUXN DDPC_AUXP

DDPC_HPD

EDP_HPD

B9 C9

C5 B5 C8

D9

DDPC_CTRLCLK

D11

DDPC_CTRLDATA

B6 A6 A8

D6

EDP_HPD need pull down via 100KΩ, so combine with RTD2136 pin-1 DP_HPD pull down resistor. If only for eDP panel, EDP_HPD must stuff one 100KΩ.

SDVO_CLK [20]

SDVO_DATA [20]

HDMI_HPD_CON [20]

From HDMI

From CRT (ANX6210)

INT_eDP_HPD_Q

+3V

R154 *2.2K_4

DDI2_CRT_AUXN [21] DDI2_CRT_AUXP [21]

DDI2_CRT_HPD_Q [21]

+5V

3

R155

2.2K_4

2

INT. HDMI DP TO VGA

3

Q11 *2N7002K

1

R254 *0_4/S

R248 *100K_4

+VCCIO_OUT

R264

DG V0.7 -> 10K

*10K/F_4

SCH V0.7 -> 1K

INT_eDP_HPD

R262 *100K_4

R261 *0_4/S

3

Q10 *2N7002K

2

1

Reserve EDP_HPD opposites circuit!

2

ULT_EDP_HPD [19,20]

From PANEL

PCH Pull-high/low(CLG)

SUSACK# SUSWARN#

Check SUSWARN# need PU?

DNBSWON#_R AC_PRESENT_R

PWRBTN# internally PU in PCH to 3.3V_DSW

SYS_PWROK CLKRUN#

C

Date:

Wednesday, October 29, 2014

R210 10K_4 R190 10K_4

R249 *10K_4 R196 *10K_4

R243 *1K_4 R559 8.2K/F_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

ULT 5/9 (Power Manger)

1

+3V_DEEP_SUS

Sheet :

for DS3

+3VS5

+3V

6 44

Rev.Size

2A

of

5

4

3

2

1

RTC Clock 32.768KHz No stuff for use Green Clock.

R385 20K/F_4

C483 1U/6.3V_4

C503 1U/6.3V_4

BIT_CLK_AUDIO[22]

Output 24MHz

ACZ_SYNC_AUDIO[22] ACZ_RST#_AUDIO[22] ACZ_SDIN0[22] ACZ_SDOUT_AUDIO[22]

2.598V

C502 1U/6.3V_4

30mils

+3V_RTC

RC delay circuit. Delay range 18ms ~ 25ms.

R373 20K/F_4

RC delay circuit. Delay range 18ms ~ 25ms.

RTC Circuitry(RTC) RTC Power trace width 20mils.

D D

3.049V

CN7 BAT_CONN

+3V_RTC_0

12

+3V_RTC_1

3.049V

D3 DB3X313N0L

+3VPCU

R362 1K_4

No-Stuff when Green CLK support & Non-rechargeable cell.

CLKGEN_RTC_X1[27]

R381 *0_6

RTC_RST#[11]

C670 *10P/50V_4

C659 *18P/50V_4

C669 *18P/50V_4

R613 33_4

R281 33_4 R283 33_4

R611 33_4

HDA Bus(CLG)

C C

+3V_DEEP_SUS +3VSPI

R581 *0_4/S

B B

R584 3.3K/F_4

C647 0.1U/10V_4

HOLD#

PCH SPI ROM(CLG)

Vender AMIC Winbond

GigaDevice

Socket

PCH_SPI_CS0#_R[30] PCH_SPI1_CLK_R[30] PCH_SPI1_SI_R[30] PCH_SPI1_SO_R[30]

U25

8

7 4

1

CE#

VDD

6

SCK

5

SI

2

SO

HOLD#

3

WP#

VSS

GD25B64BSIGR

AKE3EGN0Q01

Size 8MB AKE3EFN0800 (A25LQ64M-F) 8MB 8MB

+3VSPI

BIOS_WP#

R518

3.3K/F_4

P/N

AKE3EFP0N07 (W25Q64FVSSIQ) AKE3EGN0Q01 (GD25B64BSIGR) DFHS08FS023

R604 0_4

12

Y7 *32.768KHz

R603 1M_4

+3V_RTC

+3V_DEEP_SUS

R282 *1K_4

XDP_TRST#_CPU[2,11] JTAG_TCK_PCH[11] JTAG_TDI_PCH[11] JTAG_TDO_PCH[11] JTAG_TMS_PCH[11]

JTAGX_PCH[11]

20140904A-Confirm SMT ICT. BIOS PIN-1,2,5,6 TP must on SS (TOP side). TP Size : TP2675

TP14

R515 15/F_4

TP44

R585 15/F_4

TP38

R555 15/F_4 R516 15/F_4

TP12

C648 22P/50V_4

C646 1U/10V_4

R517 15/F_4

TP110

R583 15/F_4

TP119

R605 *10M_4

RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

ACZ_BCLK ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

XDP_TRST#_CPU JTAG_TCK_PCH JTAG_TDI_PCH JTAG_TDO_PCH JTAG_TMS_PCH

JTAGX_PCH

PCH Strap Table

Pin Name Strap description Sampled Configuration

SPKR

SDIO_D0 /GPIO66

INTVRMEN

HDA_SDO /I2S0_TXD

A A

GSPI0_MOSI /GPIO86

GPIO15

DSWVRMEN

5

No reboot mode setting

Top-Block Swap

Integrated 1.05V VRM enable

Flash Descriptor Security

Only for Interposer

Boot BIOS Selection

TLS Confidentiality

Deep Sx Well On-Die Voltage Regulator Enable

PWROK 0 = Default (weak pull-down 20K)

PWROK

1 = Setting to No-Reboot mode

0 = "top-block swap" mode

1 = Default (weak pull-up 20K)

ALWAYS Should be always pull-up

0 = Default (weak pull-down 20K)PWROK

1 = Can be Overridden

GNT0#

Boot Location

PWROK

1

LPC

0

SPI(Default)

0 = ME Crypto Transport Layer Security cipher suite with no confidentiality(Default)

1 = Intel ME Crypto TLS cipher suite with confidentiality

ALWAYS Should be always pull-up

4

Circuit

+3V

+3V_RTC

GPIO33_EC[30]

+3V_DEEP_SUS

+3V_RTC

R557 *1K_4 R494 *1K_4 R505 *1K_4

R601 330K_4

R610 1K_4

R177 *1K_4

R602 330K_4

3

PCH_INVRMEN

Lynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)

U26J *I7-5500U 2.4G QH3E

TP77

PCH_SPI1_CLK PCH_SPI_CS0#

PCH_SPI1_SI PCH_SPI1_SO PCH_SPI_IO2

PCH_SPI_IO3

AW5

AY5 AU7 AV6 AU6 AV7

AW8

AV11

AU8

AY10 AU12 AU11

AW10

AV10

AY8

AU62 AE62 AD61 AE61 AD62

AL11

AC4

AE63

AV2

AA3

Y7 Y4

AC2 AA2 AA4

Y6

AF1

SPKR [9]

GPIO66_ULT [9]

ACZ_SDOUT

GPIO15_ULT [9]

DSWVRMEN [6]

RTCX1 RTCX2 RTCRST# SRTCRST# INTRUDER# INTVRMEN

HDA_BCLK / I2S0_SCLK HDA_SYNC/ I2S0_SFRM

HDA_RST#/ I2S_MCLK

HDA_SDIN0/ I2S0_RXD HDA_SDIN1/ I2S1_RXD HDA_SDO/ I2S0_TXD HDA_DOCK_EN# / I2S1_TXD HDA_DOCK_RST/ I2S1_SFRM I2S1_SCLK

PCH_TRST# PCH_TCK PCH_TDI PCH_TDO PCH_TMS

RSVD RSVD

JTAGX RSVD

SPI_CLK SPI_CS0# SPI_CS1#

SPI_CS2# SPI_MOSI SPI_MISO SPI_IO2

SPI_IO3

RTC

LPC

SATA_RN0/ PERN6_L3 SATA_RP0/ PERP6_L3 SATA_TN0/ PETN6_L3

SATA_TP0/ PETP6_L3

SATA_RN1/ PERN6_L2 SATA_RP1/ PERP6_L2 SATA_TN1/ PETN6_L2

SATA_TP1/ PETP6_L2

SATA_RN2/ PERN6_L1 SATA_RP2/ PERP6_L1 SATA_TN2/ PETN6_L1

SATA_TP2/ PETP6_L1

SATA_RN3/ PERN6_L0

AUDIO

SATA_RP3/ PERP6_L0 SATA_TN3/ PETN6_L0

SATA_TP3/ PETP6_L0

SATA0GP/ GPIO34 SATA1GP/ GPIO35 SATA2GP/ GPIO36 SATA3GP/ GPIO37

SATA

SPI JTAG

LAD0 LAD1 LAD2 LAD3

LFRAME#

SATA_RCOMP

SATA_IREF

SATALED#

RSVD RSVD

2

AU14 AW12 AY12 AW11

AV12

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1

SATA0GP_ACC_LED#

U1

SIO_EXT_SMI#

V6

PCI_SERR#

AC1

SATA3GP

C12

SATA_RCOMP

293.51 MIL

A12

SATA_IREF

391.37 MIL

U3

L11 K10

R553 10K_4

LAD0 [25,28,30] LAD1 [25,28,30] LAD2 [25,28,30] LAD3 [25,28,30]

LFRAME# [25,28,30]

SATA_RXN0 [28]

SATA_RXP0 [28] SATA_TXN0 [28]

SATA_TXP0 [28]

SATA_RXN1 [28]

SATA_RXP1 [28] SATA_TXN1 [28]

SATA_TXP1 [28]

SATA_RXN2 [26]

SATA_RXP2 [26] SATA_TXN2 [26]

SATA_TXP2 [26]

DG recommended that SATA AC coupling capacitors should be close to the connector (<100 mils) for optimal signal quality.

TP117 TP116 TP114

TP118

R507 3.01K/F_4

R506 *0_6/S

GPIO Pull UP

ACC_LED#

R174 *10K_4

SIO_EXT_SMI#

R546 10K_4

PCI_SERR#

R550 10K_4

SATA3GP

R574 10K_4

JTAGX_PCH

R572 *51_4

JTAG_TMS_PCH

R569 51_4

JTAG_TDI_PCH

R563 51_4

JTAG_TDO_PCH

R252 51_4

JTAG_TCK_PCH

R580 *51_4

Close to Chipset

HDD0 (SATA0 6.0Gb/s)

ODD (SATA1 6.0Gb/s)

mSATA (SATA2 6Gb/s)

R169 *200/F_6

SIO_EXT_SMI# [30]

PCI_SERR# [30]

+V1.05S_ASATA3PLL

+3V

SATA_LED# [29]

+3V

+1.05VS5 +1.05V

+3V_RTC[10,27] +3VPCU[4,25,27,28,29,30,32,33] +3V_RTC_0[27] +3V_DEEP_SUS[6,8,9,10,11] +3VSPI +3V[6,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +V1.05S_ASATA3PLL[10] +1.05V[4,10,11,21,27,30,34,37,39] +1.05VS5

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

ULT 6/9 (SATA/HDA)

Date:

Wednesday, October 29, 2014

ACC_LED#

R255 *0_4

1

Sheet :

TP29

07

+3V_RTC +3VPCU +3V_RTC_0 +3V_DEEP_SUS +3VSPI +3V +V1.05S_ASATA3PLL +1.05V +1.05VS5

of

7 44

Rev.Size

2A

5

Lynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)

U26K *I7-5500U 2.4G QH3E

D D

PCIE_RXN2_CARD[24]

Card Reader

WLAN

LAN

VGA

PCIE_RXP2_CARD[24] PCIE_TXN2_CARD[24] PCIE_TXP2_CARD[24]

PCIE_RXN3_WLAN[25] PCIE_RXP3_WLAN[25] PCIE_TXN3_WLAN[25] PCIE_TXP3_WLAN[25]

PCIE_RXN4_LAN[23] PCIE_RXP4_LAN[23] PCIE_TXN4_LAN[23] PCIE_TXP4_LAN[23]

PEG_RXN0[14] PEG_RXP0[14] PEG_TXN0[14] PEG_TXP0[14]

PEG_RXN1[14] PEG_RXP1[14] PEG_TXN1[14] PEG_TXP1[14]

PEG_RXN2[14] PEG_RXP2[14] PEG_TXN2[14] PEG_TXP2[14]

PEG_RXN3[14] PEG_RXP3[14] PEG_TXN3[14] PEG_TXP3[14]

+V1.05S_AUSB3PLL

CLK_PCIE_CRN[24] CLK_PCIE_CRP[24]

PCIE_CLKREQ_CR#[24] CLK_PCIE_WLANN[25]

CLK_PCIE_WLANP[25] PCIE_CLKREQ_WLAN#[25] CLK_PCIE_LANN[23]

CLK_PCIE_LANP[23] PCIE_CLKREQ_LAN#[23] CLK_VGA_N[14]

CLK_VGA_P[14] PCIE_CLKREQ_VGA#[14]

C229 0.1U/10V_4 C228 0.1U/10V_4

C625 0.1U/10V_4 C624 0.1U/10V_4

C627 0.1U/10V_4 C626 0.1U/10V_4

C621 0.22U/10V_4

C632 0.22U/10V_4 C633 0.22U/10V_4

C634 0.22U/10V_4 C635 0.22U/10V_4

C622 0.22U/10V_4 C623 0.22U/10V_4

R143 *0_4/S R144 3.01K/F_4

PCIE_TXN2_CARD_C PCIE_TXP2_CARD_C

PCIE_TXN3_WLAN_C PCIE_TXP3_WLAN_C

PCIE_TXN4_LAN_C PCIE_TXP4_LAN_C

PEG_TXN0_C PEG_TXP0_C

PEG_TXN1_C PEG_TXP1_C

PEG_TXN2_C PEG_TXP2_C

PEG_TXN3_C PEG_TXP3_C

PCIE_RCOMP

PCIE_CLKREQ0#

PCIE_CLKREQ_CR#

PCIE_CLKREQ_WLAN#

PCIE_CLKREQ_LAN#

PCIE_CLKREQ_VGA#

PCIE_CLKREQ5#

Cardreader

WLAN

LAN

GPU

C C

B B

CLK_REQ/Strap Pin(CLG)

+3V

R551 10K_4 R544 10K_4 R582 10K_4 R536 10K_4 R167 10K_4 R526 10K_4

A A

USB_OC1# USB_OC2# USB_OC3# USB_OC4#

5

PCIE_CLKREQ0# PCIE_CLKREQ5# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_LAN# PCIE_CLKREQ_CR# PCIE_CLKREQ_VGA#

for DS3

R258 10K_4 R277 10K_4 R216 10K_4 R599 10K_4

+3V_DEEP_SUS

G17

PERN1 / USB3RN3

F17

PERP1 / USB3RP3

C30

PETN1 / USB3TN3

C31

PETP1 / USB3TP3

F15

PERN2/ USB3RN4

G15

PERP2/ USB3RP4

B31

PETN2/ USB3TN4

A31

PETP2/ USB3TP4

G11

PERN3

F11

PERP3

C29

PETN3

B30

PETP3

F13

PERN4

G13

PERP4

B29

PETN4

A29

PETP4

F10

PERN5_L0

E10

PERP5_L0

C23

PETN5_L0

C22

PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

B23

PETN5_L1

A23

PETP5_L1

H10

PERN5_L2

G10

PERP5_L2

B21

PETN5_L2

C21

PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

B22

PETN5_L3

A21

PETP5_L3

B27

PCIE_IREF

A27

PCIE_RCOMP

E15

199.35 MIL

RSVD

E13

RSVD

C43

CLKOUT_PCIE0N

C42

CLKOUT_PCIE0P

U2

PCIECLKRQ0# / GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1# / GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2# / GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCI_P3

N1

PCIECLKRQ3# / GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4# / GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5# / GPIO23

PCI/USBOC# Pull-up(CLG)

TS_INTB# PIRQC# PIRQD# GPIO77_ULT GPIO52_ULT GPIO53_ULT GPIO55_ULT

4

R541 10K_4 R532 10K_4 R535 10K_4 R531 10K_4 R528 10K_4 R525 10K_4 R161 10K_4

+V1.05S_AXCK_LCPLL[10] +V1.05S_AUSB3PLL[10] +3V_DEEP_SUS[6,7,9,10,11] +3V[6,7,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38]

4

SMBALERT# / GPIO11(SUS)

SMBUS

SML0ALERT# / GPIO60(SUS)

SML1ALERT# / PCHHOT# / GPIO73(SUS)

PCI-E*

CLOCK SIGNALS

+3V

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO75(SUS)

SML1DATA / GPIO74(SUS)

XTAL24_IN

XTAL24_OUT

CLKOUT_ITPXDP#

CLKOUT_ITPXDP_P

CLKOUT_LPC_0 CLKOUT_LPC_1

DIFFCLK_BIASREF

RSVD

RSVD TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

+V1.05S_AXCK_LCPLL +V1.05S_AUSB3PLL +3V_DEEP_SUS +3V

3

+3V_DEEP_SUS

R588 2.2K_4

R244 2.2K_4

R289 10K_4

R589 1K_4

AN2 AP2 AH1

AL2 AN1 AK1

AU4 AU3 AH3

A25 B25

B35 A35

SMBALERT# SMB_PCH_CLK SMB_PCH_DAT

SML0ALERT# SMB_ME0_CLK SMB_ME0_DAT

SML1ALERT# SMB_ME1_CLK SMB_ME1_DAT

XTAL24_IN XTAL24_OUT

CK_XDP_N_R CK_XDP_P_R

R595 10K_4

TP99 TP98

RP3 *0_4P2R_4

R586 2.2K_4

R175 2.2K_4

TP78

R497 0_4C620 0.22U/10V_4

1

R496 *1M_4

3

2

1

4

3

Stuff for XDP

AN15

CLK_PCI_EC_R

AP15

CLK_PCI_LPC_RPCIE_IREF

C26

XCLK_BIASREF

296.11 MIL

K21 M21 C35

R503 10K/F_4

C34

R504 10K/F_4

AK8

R280 10K/F_4

AL8

R218 10K/F_4

DGPU_PWR_EN[17,37]

DGPU_HOLD_RST#[14]

R606 22_4 R607 22_4

EC62 18P/50V_4

R269 *22_4

R142 3.01K/F_4

+3V

R538 *10K_4

R508 *510/F_4

+3V

R534 *10K_4

R522 100K_4

20141027A-DGPU_HOLD_RST# will make VGA_RST# has a pulse during boot when PU +3V. So change to PD.

3

for DS3

R587 2.2K_4

C629 *12P/50V_4

2

4

C628 *12P/50V_4

USB2.0(M/B-1)

USB2.0/USB3.0 MB Front Side

USB2.0(M/B-2)

USB2.0/USB3.0 MB Rear Side

SMBus/Pull-up(CLG)

R593 2.2K_4

+3V

PCH_XTAL24_IN [27]

Y6 *24MHZ +-30PPM

CLK_24M_DEBUG [25]

EC63

EMI(near PCH)

18P/50V_4

EC17

EMI(near PCH)

*18P/50V_4

+V1.05S_AXCK_LCPLL

USB3.0

20111130 Modify USB3.0 for HM70

R530 0_4 R513 0_4

Q7

2N7002KDW

6 2

5

Q8

*2N7002KDW

5

2 6

CK_XDP_N [11] CK_XDP_P [11]

CLK_24M_KBC [30]

CLK_PCI_TPM [28]

USB30_RX1-[27] USB30_RX1+[27] USB30_TX1-[27] USB30_TX1+[27]

USB30_RX2-[27] USB30_RX2+[27] USB30_TX2-[27] USB30_TX2+[27]

GPIO77_ULT TS_INTB# PIRQC# PIRQD#

GPIO52_ULT DGPU_PWR_EN_R

DGPU_HOLD_RST#_R GPIO53_ULT GPIO55_ULT

PCI_PME#

TP37

2

+3V

1

08

R162

R168

4.7K_4

1

43

1

U26N *I7-5500U 2.4G QH3E

G20

USB3RN1

H20

USB3RP1

C33

USB3TN1

B34

USB3TP1

E18

USB3RN2

F18

USB3RP2

B33

USB3TN2

A33

USB3TP2

U6

PIRQA#/ GPIO77

P4

PIRQB#/ GPIO78

N4

PIRQC#/ GPIO79

N2

PIRQD#/ GPIO80

L1

GPIO52

L3

GPIO54

R5

GPIO51

L4

GPIO53

U7

GPIO55

AD4

PME#

2

SMB_RUN_CLK [11,12,13,19,29]

SMB_RUN_DAT [11,12,13,19,29]

MBCLK2 [19,30]

MBDATA2 [19,30]

CL_CLK

C- Link

CL_DATA CL_RST#

USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7

PCI

USBRBIAS#

USB

USBRBIAS

RSVD RSVD

OC0# / GPIO40(SUS) OC1# / GPIO41(SUS) OC2# / GPIO42(SUS) OC3# / GPIO43(SUS)

AF2 AD2 AF4

AN8 AM8 AR7 AT7 AR8 AP8 AR10 AT10 AM15 AL15 AM13 AN13 AP11 AN11 AR13 AP13

AJ10 AJ11

AN10 AM10

AL3 AT1 AH2 AV3

C

Date:

Wednesday, October 29, 2014

USBP0- [27]

USBP0+ [27]

USBP1- [22]

USBP1+ [22]

USBP2- [20]

USBP2+ [20]

USBP3- [26]

USBP3+ [26]

USBP4- [28]

USBP4+ [28]

USBP5- [27]

USBP5+ [27]

USBP6- [25]

USBP6+ [25]

USBP7USBP7+

TIE TRACES TOGETHER CLOSE TO PINS WITH LENGTH TO RESISTOR

USB_BIAS

575.6 MIL

USB_OC1# USB_OC2# USB_OC3# USB_OC4#

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

ULT 7/9 (PCIE/USB/CLK)

USB2.0(M/B-1)

USB2.0/USB3.0 MB Front Side

USB2.0 Small board

USB2.0/USB3.0 Daughter Board

Camera

FMC mSATA SSD Finger Print

USB2.0(M/B-2)

USB2.0/USB3.0 MB Rear Side

WLAN

Co-layout HMC/NGFF 2230

TP74 TP75

R225 22.6/F_4

TP69 TP76 TP50 TP123

Sheet :

1

Touch Screen ( Cancel )

of

8 44

Rev.Size

2A

5

4

3

2

1

09

Close to EC

+V1.05S_VCCST

Lynx Point-LP Platform Controller Hub

Lynx Point-LP Platform Controller HubLynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)

(HDA,JTAG,SATA)

D D

SIO_EXT_SCI#[30] BT_OFF[25] RF_OFF[25]

GPIO15_ULT[7] ZERO_ODD_DP#[28] DGPU_PWROK[16,30,40]

DEVSLP1[26]

R241 10K_4

+3V_DEEP_SUS

for DS3

Reserve

C C

TP72 TP60 TP47

TP49

R568 *0_4

TP19

TP73

20140708A-Cancel G-sensor Circuit.

TP62

No Function.

B B

BOARD_ID0

Model

TWB : 0 JWV : 1

TWB + UMA

TWB + dGPU + N16S

A A

JWV + UMA

JWV + dGPU + N16S

JWV + dGPU + N16V

BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5

GPIO57 GPIO58 GPIO59 GPIO45 GPIO47GPIO56

No Define N16V : 0

0

0 0 0 0

0

1 1 1 1 1

BT_COMBO_EN#[25] GC6_FB_EN[17] GPU_EVENT#[17]

MPHY_PWREN[37]

ACZ_SPKR[22] SPKR[7]

N16S : 1

1

0 0 0 0

TP115 R573 0_4 R539 0_4

TP125

TP113

R558 *0_4/S

No Define No Define

(HDA,JTAG,SATA)(HDA,JTAG,SATA)

Haswell (GPIO)

U26O *I7-5500U 2.4G QH3E

SPKR

AU2

GPIO8(SUS)

AM3

GPIO9(SUS)

AM2

GPIO10(SUS)

AM7

LAN_PHY_PWR_CTRL / GPIO12(DSW)

AT3

GPIO13(SUS)

AH4

GPIO14(SUS)

AD6

GPIO15(SUS)

Y1

GPIO16

T3

GPIO17

AD5

GPIO24 (SUS)

AM4

GPIO25(DSW)

AN3

GPIO26(SUS)

AN5

GPIO27(DSW)

AD7

GPIO28(SUS)

P2

DEVSLP0/ GPIO33

L2

DEVSLP1/ GPIO38

N5

DEVSLP2/ GPIO39

AK4

GPIO44(SUS)

AG5

GPIO45(SUS)

AG3

GPIO46(SUS)

AB6

GPIO47(SUS)

U4

GPIO48

Y3

GPIO49

P3

GPIO50

AG6

GPIO56(SUS)

AP1

GPIO57(SUS)

AL4

GPIO58(SUS)

AT5

GPIO59(SUS)

C4

SDIO_POWER_EN/ GPIO70

Y2

HSIOPC/ GPIO71

P1

BMBUSY# / GPIO76

V2

SPKR/ GPIO81

UMA : 0 dGPU : 1

00000

11 1

00000

SIO_EXT_SCI# BT_OFF RF_OFF LAN_DISABLE# GPIO13_ULT

ODD_PRSNT#_R

GPIO24_ULT GPIO25_ULT GPIO26_ULT GPIO27_ULT GPIO28_ULT DEVSLP0 DEVSLP1 DEVSLP2 GPIO44_ULT BOARD_ID4 ACCEL_INTA# BOARD_ID5 BT_COMBO_EN#

GC6_FB_EN_C GPU_EVENT#_C

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 GPIO70_ULT MPHY_PWREN

GPIO76_ULT

0000TWB + dGPU + N16V

000

GPIO

SERIAL IO

THRMTRIP#

RCIN#/ GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD

CPU/MISC

RSVD

GSPI0_CS/ GPIO83

GSPI0_CLK/ GPIO84 GSPI0_MISO/ GPIO85 GSPI0_MOSI/ GPIO86

GSPI1_CS/ GPIO87

GSPI1_CLK/ GPIO88 GSPI1_MISO/ GPIO89 GSPI1_MOSI/ GPIO90

UART0_RXD/ GPIO91 UART0_TXD/ GPIO92 UART0_RTS/ GPIO93 UART0_CTS/ GPIO94

UART1_RXD/ GPIO0

UART1_TXD/ GPIO1

UART1_RST/ GPIO2

UART1_CTS/ GPIO3

I2C0_SDA/ GPIO4

I2C0_SCL/ GPIO5

I2C1_SDA/ GPIO6

I2C1_SCL/ GPIO7

SDIO_CLK/ GPIO64

SDIO_CMD/ GPIO65

SDIO_D0/ GPIO66 SDIO_D1/ GPIO67 SDIO_D2/ GPIO68 SDIO_D3/ GPIO69

R578 10K_4

R240 10K_4

R235 *10K_4

R285 10K_4

R579 10K_4

R562 *10K_4

D60

V4 T4

AW15 AF20 AB21

R6 L6 N6 L8

R7 L5 N7 K2

J1 K3 J2 G1

K4 G2 J3 J4

F2 F3 G4 F1

E3 F4 D3 E4 C3 E2

PCH_THRMTRIP#

EC_RCIN#

SERIRQ

PCH_OPI_RCOMPGPIO14_ULT

253.21 MIL

GSPI0_CS GSPI0_CLK GSPI0_MISO GPIO86_ULT

GSPI1_CS GSPI1_CLK GSPI1_MISO GSPI1_MOSI

UART0_RXD UART0_TXD UART0_RTS UART0_CTS

UART1_RXD UART1_TXD UART1_RST UART1_CTS

I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCL

SDIO_CLK SDIO_CMD

SDIO_D1 SDIO_D2 SDIO_D3

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

R509 *0_4/S

+3V

R549 10K_4

R608

49.9/F_4

TP26

GPIO66_ULT [7]

R577 *10K_4

R238 *10K_4

R236 10K_4

R290 *10K_4

R575 *10K_4

RaRb

R566 10K_4

20141008A-BIOS request for SVID, N16S-GT need PU GPIO58 ( BOARD_ID2 ).

5

4

3

R200 1K_4

SERIRQ [28,30]

+3V_DEEP_SUS

PM_THRMTRIP# [30]

EC_RCIN# [30]

+V1.05S_VCCST[2,4,11,36] +3V_DEEP_SUS[6,7,8,10,11] +3V[6,7,8,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +3VS5[6,10,11,22,25,28,31,33,34,37,39]

GPIO12 LAN_DISABLE# SUS -->Check list +3V -->Datasheet

2

+V1.05S_VCCST +3V_DEEP_SUS +3V +3VS5

RP16 10K_10P8R_6

10

1

UART1_RXD I2C1_SDA GSPI0_CLK GSPI1_CLK

UART0_RXD UART1_CTS GSPI0_CS GSPI1_CS

GSPI1_MOSI GSPI0_MISO GSPI1_MISO UART0_TXD

9 8 7 4

RP18 10K_10P8R_6

10

9 8 7 4

RP17 10K_10P8R_6

10

9 8 7 4

2

3

56

1

2

3

56

1

2

3

56

SDIO_D2 SDIO_D1 SDIO_CMD SDIO_CLK

+3V

UART1_RST UART0_RTS UART0_CTS UART1_TXD

+3V

I2C0_SCL I2C1_SCL I2C0_SDA SDIO_D3

+3V

GPIO Pull-up/Pull-down(CLG)

SIO_EXT_SCI# BT_OFF RF_OFF GPIO13_ULT GPIO14_ULT GPIO24_ULT GPIO26_ULT GPIO28_ULT GPIO44_ULT ACCEL_INTA#

GC6_FB_EN GPU_EVENT#

ODD_PRSNT#_R DGPU_PWROK DEVSLP0 DEVSLP1 DEVSLP2 BT_COMBO_EN# GPIO70_ULT EC_RCIN# GPIO76_ULT

MPHY_PWREN

GPIO25_ULT GPIO27_ULT LAN_DISABLE#

Date:

R278 10K_4 R215 10K_4 R213 10K_4 R242 10K_4 R195 10K_4 R191 10K_4 R257 10K_4 R179 10K_4 R220 10K_4 R219 10K_4

R149 *10K_4 R146 *10K_4 R570 10K_4 R547 10K_4 R527 10K_4 R524 10K_4 R533 10K_4 R548 10K_4 R502 10K_4 R545 10K_4 R540 10K_4 R565 100K_4 R564 *10K_4

R198 10K_4 R279 10K_4 R197 10K_4

C

Wednesday, October 29, 2014

+3V_DEEP_SUS

+3VS5

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

ULT 8/9 (GPIO/MISC)

+3V

Rev.Size

2A

Sheet :

9 44

1

9 44

2A

of

5

4

3

2

1

Lynx Point-LP Platform Controller Hub

10

(HDA,JTAG,SATA)(POWER)

AH11

AG10

AE7

Y8

J18 K19

A20

J17

R21 T21

K18 M20 V21

AE20 AE21

J15

K14 K16

Y20 AA21 W21

U8 T9

AB8

AC20

AG16 AG17

+VCCRTCEXT

+V3.3A_DSW_PRTCSUS

C359 1U/6.3V_4

C661 1U/6.3V_4 C671 0.1U/10V_4 C299 0.1U/10V_4

C276 0.1U/10V_4

+V3.3M_PSPI

C263 *0.1U/10V_4

+V1.05S_AXCK_DCB

C260 1U/6.3V_4 C269 47U/6.3VS_8_T100 C268 47U/6.3VS_8_T100

+V1.05S_AXCK_LCPLL

C630 1U/6.3V_4 C614 47U/6.3VS_8_T100 C613 47U/6.3VS_8_T100

+V1.05S_SSCF100

C239 1U/6.3V_4

+V1.05S_SSCFF

C253 1U/6.3V_4

+3V_DEEP_SUS

+V1.5S_ATS +V3.3S_PTS

C643 0.1U/10V_4

+V1.05S_APLLOPI

C275 1U/6.3V_4 C281 *47U/6.3VS_8_T100 C282 *47U/6.3VS_8_T100

+V3.3S_1.8S_SDIO_PCH

C259 1U/6.3V_4

+V1.05A_AOSCSUS

C278 1U/6.3V_4

+V1.05S_DUSB

C293 1U/6.3V_4

2.2uH PN CV-2205JZ00

L14 *0_6/S

D D

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05=1.741A

DCPSUSBYP DCPSUSBYP

VCCASW VCCASW VCCASW

VCCASW=658mA

VCCASW VCCASW

DCPSUS1=109mA

DCPSUS1 DCPSUS1

VCCHSIO VCCHSIO VCCHSIO

VCCHSIO=1.838A

VCC1_05

VCCMPHY

VCC1_05

VCCUSB3PLL

VCCSATA3PLL

VCCSATA3PLL=42mA

USB3

DCPSUS3

DCPSUS3=10mA

HDA

VCCHDA

VCCHDA=11mA

VRM

DCPSUS2=25mA

DCPSUS2

GPIO/ LCC

VCCSUS3_3 VCCSUS3_3

VCCSUS3_3=63mA

VCCDSW3_3

VCCDSW3_3=114mA

VCC3_3 VCC3_3

POWER

CORE

RTC

VCCRTC < 1mA

SPI

VCCSPI=18mA

VCCACLKPLL

ICC

VCCACLKPLL=31mA

VCCCLK=200mA

THERMAL SENSOR

VCCTS1_5=3mA

VCC3_3=41mA

OPI

VCCAPLL=57mA

SERIAL IO

VCCSDIO=17mA

SUS OSCILLATOR

DCPSUS4=1mA

USB2

VCCSUS3_3

VCCRTC

DCPRTC

VCCSPI

VCCCLK VCCCLK

VCCCLK

VCCCLK VCCCLK

RSVD RSVD RSVD

VCCSUS3_3 VCCSUS3_3

VCCTS1_5

VCC3_3 VCC3_3

RSVD VCCAPLL VCCAPLL

VCCSDIO VCCSDIO

DCPSUS4

RSVD

VCC1_05 VCC1_05

150.72 MIL

U26P *I7-5500U 2.4G QH3E

J11 H11 H15 AE8

AF22

AG19 AG20

AE9 AF9

AG8

AG14 AG13

AD10

AD8

K9

L10

M9

N8

P9

B18

B11

J13

AH14

AH13

AC9 AA9

AH10

V8

W9

+1.05V

C298

+3.3V_A_DSW_P +PCH_VCCDSW

0411: net : +3.3V_A_DSW_P trace width to 30 mil location: PC347 near to ball AG19,AG20

0.47U/6.3V_4

C307 1U/6.3V_4

+1.05V

OUT GND

+V1.05DX_MODPHY_PCH

+V1.05S_AUSB3PLL

20mil

+V1.05S_ASATA3PLL

20mil

SI Change to 22uF for Intel recommend

R192 *0_4/S

+1.5V

R188 *0_4

+3V

+3V_DEEP_SUS+3VS5

+3VS5

1 2

+3V

C655

0.1U/10V_4

C249 1U/6.3V_4 C238 1U/6.3V_4 C251 *1U/6.3V_4

C631 1U/6.3V_4 C615 22U/6.3VS_8_T100 C616 22U/6.3VS_8_T100

C637 1U/6.3V_4 C618 22U/6.3VS_8_T100 C617 22U/6.3VS_8_T100

+V3.3DX_1.5DX_ADO

+3VS5

+3V

VCCHSIO : It's power supply for HSIO device. If support HSIO, this power trace must follow design guide.

C C

+1.05V_MODPHY

L35 2.2uH/500mA_6

L33 2.2uH/500mA_6

+1.5V +3V

B B

for DS3

SLP_SUS_ON[30]

+3VS5 +3V_DEEP_SUS

R594 100K_4

R591 *0_4/S

C653 *10P/50V_4

R592 *0_6

C650 1U/6.3V_4

U27

5

IN

4

IN

3

ON/OFF

IC(5P) G5243AT11U

+V1.05S_CORE_PCH

+1.05V

C290 1U/6.3V_4 C283 1U/6.3V_4 C247 10U/6.3VS_6_T47

TP52

+1.05V

C289 1U/6.3V_4 C649 *22U/6.3VS_8_T100

+1.05V

TP39

TP18

+V3.3DX_1.5DX_PAZSUS_PCH

C288 1U/6.3V_4

TP48

C279 22U/6.3VS_8_T100

C305 *1U/6.3V_4

C248 22U/6.3VS_8_T100

+PCH_VCCDSW

+V1.05M_ASW

+V1.05M_FHV0 +V1.05M_FHV1

+V1.05A_SUS_PCH

+1.05V

+V1.05S_AIDLE

C266 *1U/6.3V_4

1001.87 MIL

914.84 MIL

+V1.05A_VCCUSB3SUS

231.72 MIL

+V1.05A_USB2SUS

+3V_DEEP_SUS

+3.3V_A_DSW_P

+V3.3S_PCORE

+3V_DEEP_SUS

+3V_RTC

R173 *0_4/S R172 *0_4

L13 2.2uH/500mA_6

+V1.05S_AXCK_LCPLL

L34 2.2uH/500mA_6

R170 *0_6/S

R176 *0_6/S

+1.5V +3V

+3V

TP35

+1.05V

+3V_DEEP_SUS

+3V_RTC

+1.05V

+3V_DEEP_SUS

+1.5V +3V

+1.05V

+3V

+1.05V

+3V_DEEP_SUS

+3V_DEEP_SUS +3V

+3V

+1.05V

+V1.05DX_MODPHY_PCH[37] +1.05V_MODPHY[37] +V1.05S_AXCK_LCPLL[8]

A A

5

4

3

+V3.3DX_1.5DX_ADO +V1.05S_AUSB3PLL[8] +V1.05S_ASATA3PLL[7] +3V_DEEP_SUS[6,7,8,9,11]

+1.5V[22,25,26,34] +3V[6,7,8,9,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +3VS5[6,9,11,22,25,28,31,33,34,37,39] +3V_RTC[7,27] +1.05V[4,7,11,21,27,30,34,37,39]

2

+V1.05DX_MODPHY_PCH +1.05V_MODPHY +V1.05S_AXCK_LCPLL +V3.3DX_1.5DX_ADO +V1.05S_AUSB3PLL +V1.05S_ASATA3PLL +3V_DEEP_SUS +1.5V +3V +3VS5 +3V_RTC +1.05V

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

ULT 9/9 (POWER-2)

Date:

Wednesday, October 29, 2014

Rev.Size

2A

Sheet :

10 44

1

10 44

2A

of

5

4

3

2

1

11

D D

CN5 *SEC_BSH-030-01-L-D-A-TR

XDP_PREQ#_CPU[2] XDP_PRDY#_CPU[2]

CFG0[4] CFG1[4]

CFG2[4] CFG3[4]

XDP_BPM0[2] XDP_BPM1[2]

CFG4[4] CFG5[4]

CFG6[4] CFG7[4]

+3VS5

R618 *0_4/S R621 *0_4/S

R622 *0_4/S R623 *0_4/S

R624 *0_4/S R626 *0_4/S R627 *0_4/S R629 *0_4

R631 *0_4/S

R171 *1K_4

PWR_DEBUG[4]

SMB_RUN_DAT[8,12,13,19,29] SMB_RUN_CLK[8,12,13,19,29]

JTAG_TCK_PCH[7]

XDP_TCK0[2]

JTAGX_PCH[7]

JTAG_TMS_PCH[7]

+1.05V

C331 *0.1U/10V_4

C C

SYS_PWROK[6]

B B

A A

R232 *0_4/S

H_VCCST_PWRGD[4]

+3V_DEEP_SUS

APS

CN19 *ACES_88511-180N

R164 *1K_4

C250 *0.1U/10V_4

10 11 12 13 14 15 16 17 18

+3V_DEEP_SUS

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18

R212 *1K_4

CFG1 CFG2

CFG3 OBSFN_B0

OBSFN_B1 CFG4

CFG5 CFG6

CFG7 VCCST_PWRGD_XDP

DNBSWON#

R222 *0_4/S

R231 *0_4

SUSB# [6,11,30]

SLP_S5# [6]

SUSC# [6,30]

SLP_A# [6]

RTC_RST# [7]

DNBSWON# [6,30]

SYS_RESET# [6]

PCH_SLP_S0_N [6,30]

SUSB# [6,11,30]

31

R158 *1K_4

R217 *0_4/S

R620 *0_4/S R619 *0_4

30

31

30

29

323229

28

333328

27

343427

26

353526

25

363625

24

373724

23

383823

22

393922

21

404021

20

414120

19

424219

18

434318

17

444417

16

454516

15

464615

14

474714

13

484813

12

494912

11

505011

10

515110

9

52529

8

53538

7

54547

6

55556

5

56565

4

57574

3

58583

2

59592

1

60601

R208 *0_4

R165 *0_4/S

+3V_DEEP_SUS +3VS5

OBSFN_C0 OBSFN_C1

CFG8 CFG9

CFG10 CFG11

OBSFN_D0 OBSFN_D1

CFG12 CFG13

CFG14 CFG15

XDP_TDO XDP_TDIXDP_TCK1

XDP_TMS

CFG17 [4] CFG16 [4]

CFG8 [4] CFG9 [4]

CFG10 [4] CFG11 [4]

CFG19 [4] CFG18 [4]

CFG12 [4] CFG13 [4]

CFG14 [4] CFG15 [4]

CK_XDP_P [8] CK_XDP_N [8]

JTAG_TDO_PCH[7]

+1.05V

XDP_RST XDP_DBRESET_NH_SYS_PWROK_XDP

R204 *0_4/S

R205 *0_4

C332 *0.1U/10V_4

+V1.05S_VCCST

R201 *51_4

HWPG[4,30,33,34,35]

R214 *1K_4

+3V

R206 *0_4/S

XDP_TRST#

XDP_TDO

XDP_TDI_R

XDP_TMS

R160 *1K_4

C235 *0.1U/10V_4

R223 *0_4/S

+3V

U8 *SN74CBTLV3126RGYR

14

VCC

2

1A

1

1OE

5

2A

4

2OE

9

3A

10

3OE

12

4A

13

4OE

+1.05V[4,7,10,21,27,30,34,37,39] +3V[6,7,8,9,10,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +3V_DEEP_SUS[6,7,8,9,10] +3VS5[6,9,10,22,25,28,31,33,34,37,39] +V1.05S_VCCST[2,4,9,36]

PLTRST# [6,14,21,23,24,25,28,30]

JTAG_TDI_PCH [7]

C261 *0.1U/10V_4

1B

2B

3B

4B

DPAD

GND

3

6

8

11

15 7

+1.05V +3V +3V_DEEP_SUS +3VS5 +V1.05S_VCCST

XDP_TDO_CPU [2]

XDP_TDI_CPU [2]

XDP_TMS_CPU [2]

XDP_TRST#_CPU [2,7]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

HSW XDP & APS

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

11 44

1

11 44

Rev.Size

2A

of

5

4

3

2

1

12

M_A_A[15:0][3]

D D

M_A_BS#0[3] M_A_BS#1[3] M_A_BS#2[3] M_A_CS#0[3] M_A_CS#1[3] M_A_CLKP0[3] M_A_CLKN0[3] M_A_CLKP1[3] M_A_CLKN1[3] M_A_CKE0[3] M_A_CKE1[3] M_A_CAS#[3] M_A_RAS#[3]

R379 10K/F_4 R380 10K/F_4

C C

M_A_WE#[3]

SMB_RUN_CLK[8,11,13,19,29] SMB_RUN_DAT[8,11,13,19,29]

M_A_ODT0[13] M_A_ODT1[13]

M_A_DQSP[7:0][3]

M_A_DQSN[7:0][3]

CPU Bracket

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 +SMDDR_VREF_DIMM SMB_RUN_CLK SMB_RUN_DAT

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

CN26A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM0_H=5.2_STD

DGMK4000406

IC SOCKET DDR3 SODIMM(204P,H5.2,STD)

ddr-ds1sk-20401-std-204p-smt

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

EZIW

5

M_A_DQ5

7

M_A_DQ4

15

M_A_DQ6

17

M_A_DQ2

4

M_A_DQ1

6

M_A_DQ0

16

M_A_DQ7

18

M_A_DQ3

21

M_A_DQ13

23

M_A_DQ12

33

M_A_DQ14

35

M_A_DQ15

22

M_A_DQ9

24

M_A_DQ8

34

M_A_DQ11

36

M_A_DQ10

39

M_A_DQ21

41

M_A_DQ20

51

M_A_DQ19

53

M_A_DQ23

40

M_A_DQ17

42

M_A_DQ16

50

M_A_DQ18

52

M_A_DQ22

57

M_A_DQ24

59

M_A_DQ25

67

M_A_DQ31

69

M_A_DQ27

56

M_A_DQ28

58

M_A_DQ29

68

M_A_DQ30

70

M_A_DQ26

129

M_A_DQ36

131

M_A_DQ33

141

M_A_DQ34

143

M_A_DQ35

130

M_A_DQ32

132

M_A_DQ37

140

M_A_DQ38

142

M_A_DQ39

147

M_A_DQ44

149

M_A_DQ45

157

M_A_DQ46

159

M_A_DQ42

146

M_A_DQ40

148

M_A_DQ41

158

M_A_DQ47

160

M_A_DQ43

163

M_A_DQ49

165

M_A_DQ52

175

M_A_DQ50

177

M_A_DQ51

164

M_A_DQ55

166

M_A_DQ48

174

M_A_DQ54

176

M_A_DQ53

181

M_A_DQ59

183

M_A_DQ56

191

M_A_DQ63

193

M_A_DQ58

180

M_A_DQ57

182

M_A_DQ60

192

M_A_DQ62

194

M_A_DQ61

M_A_DQ[63:0] [3]

VREF DQ0 M1 Solution

SMDDR_VREF_DQ0_M3[3]

+SMDDR_VREF_DIMM[12,13]

DDR_VTTREF[13,35]

SM_VREF[3]

R350 2/F_6

C456

0.022U/25V_4

2 1

R355

24.9/F_4

PM_EXTTS#0[13] DDR3_DRAMRST#[2,13]

SMDDR_VREF_DQ0_M1

R347 *0_6

R397 *0_6

R398 2/F_6

C519

0.022U/25V_4

2 1

R392

24.9/F_4

+3V

+1.35VSUS

R299 10K/F_4

C476 *0.1U/10V_4

R349

1.8K/F_4

R351 *0_6/S

R346

+1.35VSUS

1.8K/F_4

R391

1.8K/F_4

R383

1.8K/F_4

2.48A

+3V

+SMDDR_VREF_DQ0

+1.35VSUS

CN26B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=5.2_STD

ddr-ds1sk-20401-std-204p-smt

DGMK4000406

IC SOCKET DDR3 SODIMM(204P,H5.2,STD)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.675V_DDR_VTT

B B

For EMI RESERVE

+1.35VSUS

EC47 120P/50V_4 EC37 120P/50V_4 EC31 120P/50V_4 EC30 120P/50V_4 EC32 120P/50V_4 EC25 120P/50V_4 EC28 120P/50V_4

+0.675V_DDR_VTT

EC51 120P/50V_4 EC42 120P/50V_4

A A

5

4

+1.35VSUS

EC44 120P/50V_4 EC52 120P/50V_4 EC54 120P/50V_4 EC38 0.1U/10V_4 EC34 0.1U/10V_4 EC36 0.1U/10V_4 EC50 0.1U/10V_4

20140821A−EMI request.

Place these Caps near So-Dimm0.

1uF/10uF 4pcs on each side of connector

+1.35VSUS +0.675V_DDR_VTT

C488 1U/6.3V_4 C494 1U/6.3V_4 C489 1U/6.3V_4 C451 1U/6.3V_4 C455 1U/6.3V_4 C452 1U/6.3V_4 C454 1U/6.3V_4 C453 1U/6.3V_4

C493 10U/6.3V_6 C492 10U/6.3V_6 C491 10U/6.3V_6 C457 10U/6.3V_6 C458 10U/6.3V_6 C515 10U/6.3V_6 C490 10U/6.3V_6 C514 10U/6.3V_6

3

C498 1U/6.3V_4 C496 1U/6.3V_4 C504 1U/6.3V_4 C478 1U/6.3V_4 C510 10U/6.3V_6

+SMDDR_VREF_DIMM

C484 *0.1U/10V_4 C477 *2.2U/6.3V_6

+SMDDR_VREF_DQ0

C448 *0.1U/10V_4 C450 *2.2U/6.3V_6

+3V

C381 0.1U/10V_4 C479 2.2U/6.3V_6

+3V[6,7,8,9,10,11,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +1.35VSUS[2,4,13,31,35] +0.675V_DDR_VTT[13,35] +SMDDR_VREF_DIMM[12,13] +SMDDR_VREF_DQ0

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

DDR3L DIMM0-STD (5.2H)

Date:

Wednesday, October 29, 2014

2

Wednesday, October 29, 2014

1

Sheet :

+3V +1.35VSUS

+0.675V_DDR_VTT +SMDDR_VREF_DIMM +SMDDR_VREF_DQ0

of

12 44

Rev.Size

2A

5

4

3

2

1

13

Sheet :

M_B_DQ[63:0] [3]

of

13 44

Rev.Size

2A

+1.35VSUS

2.48A

D D

PM_EXTTS#0[12] DDR3_DRAMRST#[2,12]

+1.35VSUS

VREF DQ1 M1 Solution

5

R329 *0_6

R328 2/F_6

C420

0.022U/25V_4

2 1

R330

24.9/F_4

DDR_VTTREF[12,35]

SMDDR_VREF_DQ1_M3[3]

C C

B B

Place these Caps near So-Dimm1.

1uF/10uF 4pcs on each side of connector

+1.35VSUS +0.675V_DDR_VTT

C438 1U/6.3V_4 C441 1U/6.3V_4 C517 1U/6.3V_4 C439 1U/6.3V_4 C436 1U/6.3V_4 C435 1U/6.3V_4 C440 1U/6.3V_4 C434 1U/6.3V_4 C419 10U/6.3V_6

C412 10U/6.3V_6

A A

C414 10U/6.3V_6 C413 10U/6.3V_6

C416 10U/6.3V_6 C415 10U/6.3V_6

C411 10U/6.3V_6 C418 10U/6.3V_6

R324

1.8K/F_4

R325

1.8K/F_4

+SMDDR_VREF_DIMM[12]

C383 1U/6.3V_4 C382 1U/6.3V_4 C370 1U/6.3V_4 C369 1U/6.3V_4 C367 10U/6.3V_6

+3V

C368 0.1U/10V_4 C366 2.2U/6.3V_6

PM_EXTTS#0

C459 *0.1U/10V_4

R337 *0_6/S

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ1

+3V

+SMDDR_VREF_DQ1SMDDR_VREF_DQ1_M1

C437 *0.1U/10V_4 C430 *2.2U/6.3V_6

C426 *0.1U/10V_4 C431 *2.2U/6.3V_6

4

CN22B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=5.15_RVS

DGMK4000425

IC SOCKET DDRIII SO-DIMM(204P,H5.15,RVS)

ddr-ds1rk-20401-tp5b-rvs-204p

DDR_PG_CNTL[2]

PC2100 DDR3 SDRAM SO-DIMM

2

Q23 LTC044

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

203

VTT1 VTT2

GND GND

+5VPCU

R402 100K_4

1 3

+0.675V_DDR_VTT

204 205

206

+1.35VSUS

2

DDR_VTT_PG_CTRL

+5VS5

R406 220K_4

Q21 2N7002K

R405 *0_4

R403 *2M/F_4

3

2

C525 0.1U/10V_4

1

3

1

Q22 2N7002K

R296 10K/F_4 R295 10K/F_4

+3V

R377 66.5/F_4

R378 66.5/F_4

51216S3 [35]

M_B_A[15:0][3]

SMB_RUN_CLK[8,11,12,19,29] SMB_RUN_DAT[8,11,12,19,29]

R334 66.5/F_4 R331 66.5/F_4

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_BS#0[3] M_B_BS#1[3] M_B_BS#2[3] M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP0[3] M_B_CLKN0[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CKE0[3] M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3] M_B_WE#[3]

+1.35VSUS[2,4,12,31,35] +3V[6,7,8,9,10,11,12,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +0.675V_DDR_VTT[12,35] +5VPCU[33] +5VS5[22,27,31,33,35,36,37,38,40]

M_A_ODT0 [12]

M_A_ODT1 [12]

2

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_ODT0 M_B_ODT1

M_B_DQSP2 M_B_DQSP0 M_B_DQSP1 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN2 M_B_DQSN0 M_B_DQSN1 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

CN22A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=5.15_RVS

DGMK4000425

IC SOCKET DDRIII SO-DIMM(204P,H5.15,RVS)

ddr-ds1rk-20401-tp5b-rvs-204p

+1.35VSUS +3V

+0.675V_DDR_VTT +5VPCU +5VS5

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

Date:

5

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

M_B_DQ22

7

M_B_DQ23

15

M_B_DQ21

17

M_B_DQ18

4

M_B_DQ16

6

M_B_DQ17

16

M_B_DQ20

18

M_B_DQ19

21

M_B_DQ4

23

M_B_DQ5

33

M_B_DQ6

35

M_B_DQ7

22

M_B_DQ2

24

M_B_DQ3

34

M_B_DQ1

36

M_B_DQ0

39

M_B_DQ9

41

M_B_DQ8

51

M_B_DQ11

53

M_B_DQ10

40

M_B_DQ12

42

M_B_DQ13

50

M_B_DQ15

52

M_B_DQ14

57

M_B_DQ26

59

M_B_DQ27

67

M_B_DQ29

69

M_B_DQ28

56

M_B_DQ30

58

M_B_DQ31

68

M_B_DQ24

70

M_B_DQ25

129

M_B_DQ32

131

M_B_DQ33

141

M_B_DQ38

143

M_B_DQ34

130

M_B_DQ36

132

M_B_DQ37

140

M_B_DQ35

142

M_B_DQ39

147

M_B_DQ40

149

M_B_DQ43

157

M_B_DQ47

159

M_B_DQ46

146

M_B_DQ41

148

M_B_DQ42

158

M_B_DQ44

160

M_B_DQ45

163

M_B_DQ52

165

M_B_DQ51

175

M_B_DQ54

177

M_B_DQ48

164

M_B_DQ49

166

M_B_DQ55

174

M_B_DQ50

176

M_B_DQ53

181

M_B_DQ63

183

M_B_DQ62

191

M_B_DQ59

193

M_B_DQ60

180

M_B_DQ56

182

M_B_DQ57

192

M_B_DQ61

194

M_B_DQ58

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

DDR3L DIMM1-RVS (5.2H)

Wednesday, October 29, 2014

1

A A

+1.05V_GFX

Near GPU

C134 22U/6.3VS_6_T100 C162 *22U/6.3VS_6_T100 C165 10U/6.3VS_6_T47 C141 *10U/6.3VS_6_T47 C94 4.7U/6.3V_6

C131 1U/6.3V_4 C135 *1U/6.3V_4

PEX_IOVDD + PEX_IOVDDQ = 1.042A

B B

Under GPU

+1.05V_GFX

C154 22U/6.3VS_6_T100 C128 *22U/6.3VS_6_T100 C160 10U/6.3VS_6_T47 C150 *10U/6.3VS_6_T47 C124 4.7U/6.3V_6

Near GPU

Under GPU

C96 1U/6.3V_4 C88 *1U/6.3V_4

PEX_PLL_HVDD + PEX_SVDD_3V3 = 143mA

+3V_AON

C145 0.1U/10V_4 C143 4.7U/6.3V_6 C156 4.7U/6.3V_6

Near GPU

C C

VGPU_CORE_SENSE[38]

VSS_GPU_SENSE[38]

R421 *200/F_4

R73 0_6

+1.05V_GFX

CX300T30001 Change to 0ohm

Near GPU

C84 4.7U/6.3V_6

D D

1

C86 1U/6.3V_4

Under GPU

C123 0.1U/10V_4

PEX_PLLVDD = 130mA

R432 10K/F_4

R420 2.49K/F_4

PLTRST#[6,11,21,23,24,25,28,30] DGPU_HOLD_RST#[8]

PEX_TSTCLK PEX_TSTCLK#

PEX_PLLVDD

TESTMODE

PEX_TERMP

2

AA22 AB23 AC24 AD25 AE26 AE27

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AF22 AE22

AA14 AA15

AF25

2

AA8 AA9

AB8

F2

F1

AD9

C604

0.1U/10V_4

2 1

U20A

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT PEX_TSTCLK_OUT

PEX_PLLVDD PEX_PLLVDD

TESTMODE

PEX_TERMP

+3V

U24 MC74VHC1G08DFT2G

3 5

3

BOM Default by N16S-GT for Support GC6 2.0.

4

R486 0_4

GC6 2.0

R487 *0_4

N16S-GT support GC6 function

GPU_PEX_RST_HOLD#[17] DGPU_OVT# [30]VGA_OVT#[17]

N16V-GM not support GC6 function

NC NC

1/14 PCI_EXPRESS

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK PEX_REFCLK

PEX_TX0 PEX_TX0

PEX_RX0 PEX_RX0

PEX_TX1 PEX_TX1

PEX_RX1 PEX_RX1

PEX_TX2 PEX_TX2

PEX_RX2 PEX_RX2

PEX_TX3 PEX_TX3

PEX_RX3 PEX_RX3

PEX_TX4 PEX_TX4

PEX_RX4 PEX_RX4

PEX_TX5 PEX_TX5

PEX_RX5 PEX_RX5

PEX_TX6 PEX_TX6

PEX_RX6 PEX_RX6

PEX_TX7 PEX_TX7

PEX_RX7 PEX_RX7

PEX_TX8 PEX_TX8

PEX_RX8 PEX_RX8

PEX_TX9 PEX_TX9

PEX_RX9 PEX_RX9

PEX_TX10 PEX_TX10

PEX_RX10 PEX_RX10

PEX_TX11 PEX_TX11

PEX_RX11 PEX_RX11

PEX_TX12 PEX_TX12

PEX_RX12 PEX_RX12

PEX_TX13 PEX_TX13

PEX_RX13 PEX_RX13

PEX_TX14 PEX_TX14

PEX_RX14 PEX_RX14

PEX_TX15 PEX_TX15

PEX_RX15 PEX_RX15

GF119GF117

COMMONbga595-nvidia-n13p-gv2-s-a2

3

AB6

AC7 AC6 AE8

AD8 AC9

AB9 AG6

AG7 AB10

AC10 AF7

AE7 AD11

AC11 AE9

AF9 AC12

AB12 AG9

AG10 AB13

AC13 AF10

AE10 AD14

AC14 AE12

AF12 AC15

AB15 AG12

AG13 AB16

AC16 AF13

AE13 AD17

AC17 AE15

AF15 AC18

AB18 AG15

AG16 AB19

AC19 AF16

AE16 AD20

AC20 AE18

AF18 AC21

AB21 AG18

AG19 AD23

AE23 AF19

AE19 AF24

AE24 AE21

AF21 AG24

AG25 AG21

AG22

VGA_RST# PEX_CLKREQ#

PEG_RXP0_C PEG_RXN0_C

PEG_RXP1_C PEG_RXN1_C

PEG_RXP2_C PEG_RXN2_C

PEG_RXP3_C PEG_RXN3_C

+3V

C605 0.1U/10V_4 U22

MC74VHC1G08DFT2G

2 1

3 5

C188 0.22U/10V_4 C189 0.22U/10V_4

C178 0.22U/10V_4 C179 0.22U/10V_4

C177 0.22U/10V_4 C176 0.22U/10V_4

C191 0.22U/10V_4 C190 0.22U/10V_4

NVDD = 32.22 ~ 26.66 A

C104 22U/6.3VS_6_T100 C610 47U/6.3VS_8_T100

C120 4.7U/6.3V_6 C138 4.7U/6.3V_6 C591 4.7U/6.3V_6 C592 4.7U/6.3V_6 C103 4.7U/6.3V_6

4

+3V_AON

GC6 2.0

R473 10K/F_4

GC6 2.0

4

PEGX_RST#

R475 100K/F_4

Under GPU

C127 0.1U/10V_4 C594 0.1U/10V_4 C101 0.1U/10V_4 C588 0.1U/10V_4 C140 4.7U/6.3V_6 C136 4.7U/6.3V_6 C137 4.7U/6.3V_6 C99 4.7U/6.3V_6 C595 4.7U/6.3V_6 C590 4.7U/6.3V_6 C593 4.7U/6.3V_6 C599 4.7U/6.3V_6 C121 4.7U/6.3V_6 C129 4.7U/6.3V_6 C107 4.7U/6.3V_6

+

C117 330U_2.5V_3528

Near GPU

4

5

This GPIO monitors the PCIe reset assertion from the system side during GC6 residency.

C598 *0.1U/10V_4

U20E

11/14 NVVDD

K10

VDD

K12

VDD

K14

VDD

K16

VDD

K18

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

M10

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

N11

VDD

N13

VDD

N15

VDD

N17

VDD

P10

VDD

P12

VDD

P14

VDD

P16

VDD

P18

VDD

R11

VDD

R13

VDD

R15

VDD

R17

VDD

T10

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

U11

VDD

U13

VDD

U15

VDD

U17

VDD

V10

VDD

V12

VDD

V14

VDD

V16

VDD

V18

VDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

SYS_PEX_RST_MON# [17]

+3V_AON

R444 10K/F_4

2

5

R469 10K/F_4

+3V_GFX

Q29 *2N7002K

1

2

R445

4.7K_4

CLKREQ_C1

Q28 LTC044

1 3

U20C

AD10

AD7

B19

F11

V5 V6

G1 G2 G3 G4 G5 G6 G7

V1 V2

W1 W2 W3 W4

bga595-nvidia-n13p-gv2-s-a2 COMMON

3

2

14/14 XVDD/VDD33

NC NC NC

3V3AUX_NC

FERMI_RSVD1_NC FERMI_RSVD2_NC

CONFIGURABLE POWER CHANNELS * nc on substrate

XPWR_G1 XPWR_G2 XPWR_G3 XPWR_G4 XPWR_G5 XPWR_G6 XPWR_G7

XPWR_V1 XPWR_V2

XPWR_W1 XPWR_W2 XPWR_W3 XPWR_W4

GC6 2.0

CLK_VGA_P [8]

CLK_VGA_N [8]

PEG_RXP0 [8] PEG_RXN0 [8]

PEG_TXP0 [8] PEG_TXN0 [8]

PEG_RXP1 [8] PEG_RXN1 [8]

PEG_TXP1 [8] PEG_TXN1 [8]

PEG_RXP2 [8] PEG_RXN2 [8]

PEG_TXP2 [8] PEG_TXN2 [8]

PEG_RXP3 [8] PEG_RXN3 [8]

PEG_TXP3 [8] PEG_TXN3 [8]

+VGACORE

12

R477 0_4

6

Q27 LTC044

1 3

VDD33 = 56mA

VDD33 VDD33 VDD33 VDD33

6

PCIE_CLKREQ_VGA# [8]

Power down sequence

G10 G12 G8 G9

7

Power up sequence

VDD33 +3.3V_GFX

+VCC_DGFX_CORE

FBVDDQ +1.5V_GFX

PEX_VDD +1.05V_GFX

IFP(CDEF)_IOVDD +1.05V_GFX

C122 0.1U/10V_4

PLACE NEAR BALLS

1 2

C210 1U/10V_6 C209 4.7U/6.3V_6

PLACE NEAR BGA

C147 0.1U/10V_4 C155 0.1U/10V_4

PLACE NEAR BALLS

1 2

C152 1U/10V_6 C158 4.7U/6.3V_6

PLACE NEAR BGA

7

t>0NVVDD

t>0

BOM Default by N16S-GT for Support GC6 2.0.

N16S-GT support GC6 function

R130 0_4

R83 *0_4

R85 0_4

N16V-GM not support GC6 function

N16S-GT support GC6 function

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

N16x-PCIe & Power-1

Date:

Wednesday, October 29, 2014

Sheet :

t>=0

+3V_AON

+3V_GFX

8

14

of

14 44

8

Rev.Size

2A

1

2

3

4

5

6

7

8

15

A A

20140804A-NV recommand ball : F3 keep NC. 20140919A-NV recommancd add 10KΩ PD on ball-F3 to avoid GPU entry GC6 1.0 state when floating. Some S3/S4 long run test fail is due bo ball-F3 floating.

PS_FB_CLAMP

TP91

FBA_ODT_L FBA_ODT_H FBA_RST#

B B

C C

FBA_CKE_L FBA_CKE_H

R13 10K/F_4 R2 10K/F_4 R3 10K/F_4 R17 10K/F_4 R1 10K/F_4

FBA_CMD1

TP81

FBA_CMD17

TP1

FBA_CMD31

TP82

FBA_CMD2 FBA_CMD18 FBA_CMD5 FBA_CMD3 FBA_CMD19

R651 10K_4

FBA_CMD0[18] FBA_CMD2[18]

FBA_CMD3[18] FBA_CMD4[18] FBA_CMD5[18] FBA_CMD6[18] FBA_CMD7[18] FBA_CMD8[18] FBA_CMD9[18] FBA_CMD10[18] FBA_CMD11[18] FBA_CMD12[18] FBA_CMD13[18] FBA_CMD14[18] FBA_CMD15[18] FBA_CMD16[18]

FBA_CMD18[18] FBA_CMD19[18] FBA_CMD20[18] FBA_CMD21[18] FBA_CMD22[18] FBA_CMD23[18] FBA_CMD24[18] FBA_CMD25[18] FBA_CMD26[18] FBA_CMD27[18] FBA_CMD28[18] FBA_CMD29[18] FBA_CMD30[18]

+1.5V_GFX

R70 *10K/F_4 R71 *10K/F_4

VMA_CLK0[18] VMA_CLK0#[18] VMA_CLK1[18] VMA_CLK1#[18]

FB_PLLAVDD = 55mA

L4 HCB1608KF-300T30

D D

+1.05V_GFX

C95 22U/6.3VS_6_T100 C91 0.1U/10V_4 C108 0.1U/10V_4 C100 0.1U/10V_4

+FB_PLLAVDD

FB_DLLAVDD = 15mA

U20B

F3

FB_CLAMP

C27

FBA_CMD0

C26

FBA_CMD1

E24

FBA_CMD2

F24

FBA_CMD3

D27

FBA_CMD4

D26

FBA_CMD5

F25

FBA_CMD6

F26

FBA_CMD7

F23

FBA_CMD8

G22

FBA_CMD9

G23

FBA_CMD10

G24

FBA_CMD11

F27

FBA_CMD12

G25

FBA_CMD13

G27

FBA_CMD14

G26

FBA_CMD15

M24

FBA_CMD16

M23

FBA_CMD17

K24

FBA_CMD18

K23

FBA_CMD19

M27

FBA_CMD20

M26

FBA_CMD21

M25

FBA_CMD22

K26

FBA_CMD23

K22

FBA_CMD24

J23

FBA_CMD25

J25

FBA_CMD26

J24

FBA_CMD27

K27

FBA_CMD28

K25

FBA_CMD29

J27

FBA_CMD30

J26

FBA_CMD31

F22

FBA_DEBUG0

J22

FBA_DEBUG1

D24

FBA_CLK0

D25

FBA_CLK0

N22

FBA_CLK1

M22

FBA_CLK1

D18

FBA_WCK01

C18

FBA_WCK01

D17

FBA_WCK23

D16

FBA_WCK23

T24

FBA_WCK45

U24

FBA_WCK45

V24

FBA_WCK67

V25

FBA_WCK67

F16

FB_PLLAVDD

P22

FB_PLLAVDD

H22

FB_DLLAVDD

GF119NC

GF117

GF119

GF117FB_P LLAVDD

2/14 FBA

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8

FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

E18 F18 E16 F17 D20 D21 F20 E21 E15 D15 F15 F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24 T22 R23 N25 N26 N23 N24 V23 V22 T23 U22 Y24 AA24 Y22 AA23 AD27 AB25 AD26 AC25 AA27 AA26 W26 Y25 R26 T25 N27 R27 V26 V27 W27 W25

D19 D14 C17 C22 P24 W24 AA25 U25

E19 C15 B16 B22 R25 W23 AB26 T26

F19 C14 A16 A22 P25 W22 AB27 T27

VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7

VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15

VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23

VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31

VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39

VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47

VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55

VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

VMA_DQ[63:0] [18]

VMA_DM[7:0] [18]

VMA_WDQS[7:0] [18]

VMA_RDQS[7:0] [18]

FBVDDQ + FBVDD = 3.116A

+1.5V_GFX

C549 0.1U/10V_4 C89 0.1U/10V_4

1 2

C90 1U/10V_6

1 2

C56 1U/10V_6 C92 4.7U/6.3V_6 C557 4.7U/6.3V_6 C105 10U/6.3V_6 C556 22U/6.3VS_6_T100

U20D

12/14 FBVDDQ

B26

FBVDDQ

C25

FBVDDQ

E23

FBVDDQ

E26

FBVDDQ

F14

FBVDDQ

F21

FBVDDQ

G13

FBVDDQ

G14

FBVDDQ

G15

FBVDDQ

G16

FBVDDQ

G18

FBVDDQ

G19

FBVDDQ

G20

FBVDDQ

G21

FBVDDQ

H24

FBVDDQ

H26

FBVDDQ

J21

FBVDDQ

K21

FBVDDQ

L22

FBVDDQ

L24

FBVDDQ

L26

FBVDDQ

M21

FBVDDQ

N21

FBVDDQ

R21

FBVDDQ

T21

FBVDDQ

V21

FBVDDQ

W21

FBVDDQ

bga595-nvidia-n13p-gv2-s-a2 COMMON

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

D22

C24

B25

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

+1.5V_GFX

R58 51.1/F_4

U20F

13/14 GND

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

R59 40.2/F_4

R63 42.2/F_4

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M11

GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

M13

GND

M15

GND

M17

GND

N10

GND

N12

GND

N14

GND

N16

GND

N18

GND

P11

GND

P13

GND

P15

GND

P17

GND

P2

GND

P23

GND

P26

GND

P5

GND

R10

GND

R12

GND

R14

GND

R16

GND

R18

GND

T11

GND

T13

GND

T15

GND

T17

GND

U10

GND

U12

GND

U14

GND

U16

GND

U18

GND

U2

GND

U23

GND

U26

GND

U5

GND

V11

GND

V13

GND

V15

GND

V17

GND

Y2

GND

Y23

GND

Y26

GND

Y5

GND

AA7

GND

AB7

GND

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

Document Number

C

N16x-Memory & Power-2

Date:

Wednesday, October 29, 2014

7

PROJECT : TWB & JWV ( MB )

Sheet :

of

15 44

8

Rev.Size

2A

COMMON

D23

4

5

6

INT

bga595-nvidia-n13p-gv2-s-a2

1

2

3

FB_VREF_PROBE

1

2

3

4

5

6

7

8

0319 : Change I2CA_SCL/SDA from +3V_GFX to GND for nVdia suggest

GF119

B7

I2CA_SCL I2CA_SDA

R470 2.2K_4 R466 2.2K_4

I2CA_SCL I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

COMMON

A7

AE3 AE4

AG3 AF4 AF3

USAGE FB Clamp monitor

Memory VDD VID Panel Backlight PWM PANEL POWER ENABLE PANEL BACKLIGHT ENABLE

-Active low FB Clamp toggle request 3D VISION LEFT/RIGHT signal ACTIVE LOW THERMAL OVER TEMP ACTIVE LOW THERMAL ALERT MEMMORY VREF CONTROL GPU CORE_VDD PWM Control signal AC Power detect or power supply overdraw input

DGPU_PGOK-1

2

Q32 METR3904-G

1 3

ON

2

Q31 METR3904-G

1 3

ON

+1.5V_GFX

R106

4.7K_4

DGPU_POK4

C180 *1000P/50V_4

R490

4.7K_4

DGPU_POK2

C612 *1000P/50V_4

High

+3V +3V_GFX

R114

4.7K_4

R418 *4.7K_4

High

Low OFF

2

Q30 LTC044

1 3

C181 1000P/50V_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

N16x-Display & Crystal & PWROK

Date:

Wednesday, October 29, 2014

7

R419 100K/F_4

Discharge

Sheet :

5

U20K

3/14 DACA

GF119

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

bga595-nvidia-n13p-gv2-s-a2

GF117

TSEN_VREF

NC

GPIO ASSIGNMENTS

GPIO

I/O IN

0 1

OUT OUT

3

OUT2LCD_VCC

4

OUT OUT

5 6

OUT OUT

7 8

I/O I/O

9

10

OUT OUT

11

IN

12 13

C10

COMMON

BXTALOUT

B10

XTALOUTBUFF

C585 12P/50V_4

XTALOUT

GF117

NC NC

NC

NC NC

FB_CLAMP_MON MEM_VDD_CTL LCD_BL_PWM

LCD_BLEN Reserved FB_CLAMP_TGL_REQ 3D VISION OVERT ALERT MEM VREF_CTL PWR_VID PWR_LEVEL PSI Phase SheddingOUT

+1.05V_GFX

R88 10K/F_4

6

U20G

4/14 IFPAB

GF117

GF119

AA6

IFPAB_RSET

V7

A A

B B

C C

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

IFPAB

bga595-nvidia-n13p-gv2-s-a2

U20H

5/14 IFPC

T6

IFPC_RSET

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

P6

IFPC_IOVDD

bga595-nvidia-n13p-gv2-s-a2

U20I

6/14 IFPD

U6

IFPD_RSET

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

GF119

NC

GF117GF119

NC

GF117

NC

NC NC

NC

GF117

NC

IFPD

R6

D D

IFPD_IOVDD

GF119

GF117

NC

1

GF117

NC NC

NC

DVI/HDMI DP

NC NC

NC

GF117

NC NC

NC

GF119

IFPA_TXD0 IFPA_TXD0

IFPA_TXD1 IFPA_TXD1

IFPA_TXD2 IFPA_TXD2

IFPA_TXD3 IFPA_TXD3

IFPB_TXD4 IFPB_TXD4

IFPB_TXD5 IFPB_TXD5

IFPB_TXD6 IFPB_TXD6

IFPB_TXD7 IFPB_TXD7

I2CW_SDA I2CW_SCL

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

I2CX_SDA I2CX_SCL

IFPA_TXC IFPA_TXC

IFPB_TXC IFPB_TXC

GPIO14

COMMON

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

AC4 AC3

Y3 Y4

AA2 AA3

AA1 AB1

AA5 AA4

AB4 AB5

AB2 AB3

AD2 AD3

AD1 AE1

AD5 AD4

B3

IFPC

GF119GF117

N5

IFPC_AUX

N4

IFPC_AUX

N3

IFPC_L3

N2

IFPC_L3

R3

IFPC_L2

R2

IFPC_L2

R1

IFPC_L1

T1

IFPC_L1

T3

IFPC_L0

T2

IFPC_L0

GPIO15

C3

COMMON

GF119

DPDVI/HDMI

P4

IFPD_AUX

P3

IFPD_AUX

R5

IFPD_L3

R4

IFPD_L3

T5

IFPD_L2

T4

IFPD_L2

U4

IFPD_L1

U3

IFPD_L1

V4

IFPD_L0

V3

IFPD_L0

D4

GPIO17

COMMONbga595-nvidia-n13p-gv2-s-a2

2

J7

K7

K6

H6

J6

+1.05V_GFX

U20J

7/14 IFPEF

GF119

IFPEF_PLLVDD

IFPEF_RSET

IFPE

GF119

IFPE_IOVDD

IFPF_IOVDD

IFPF

bga595-nvidia-n13p-gv2-s-a2

L8 HCB1608KF-300T30 C146 0.1U/10V_4 C183 22U/6.3VS_6_T100

L9 HCB1608KF-181T15_6 C148 0.1U/10V_4 C149 0.1U/10V_4 C194 10U/6.3V_6 C182 47U/6.3VS_8_T220

CLK_27M_XTAL_IN[27]

3

GF117

NC

GF117

NC

NC NC

NC

NC NC

NC

NC NC

GF117

NC

GF117

NC

NC NC

NC

R90 10K/F_4

R451 *0_4

DVI-DL

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_ENC

DVI-DL

TXD3 TXD3

TXD4 TXD4

TXD5 TXD5

GF119

DVI-SL/HDMI

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_E

GF119

DVI-SL/HDMI

I2CZ_SDA I2CZ_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_F

NV_PLLVDD

PLLVDD = 38mA SP_PLLVDD = 17mA VID_PLLVDD = 41mA

SP_PLLVDD

XTAL_SSIN

U20M

L6

M6 N6

A10

C11

bga595-nvidia-n13p-gv2-s-a2

CLK_27M_XTAL_IN_C CLK_27M_XTAL_OUT

4

9/14 XTAL_PLL

PLLVDD SP_PLLVDD

VID_PLLVDD

XTALSSIN

XTALIN

DP

IFPE_AUX IFPE_AUX

GPIO18

DP

IFPF_AUX IFPF_AUX

GPIO19

NC

C584 12P/50V_4

IFPE_L3 IFPE_L3

IFPE_L2 IFPE_L2

IFPE_L1 IFPE_L1

IFPE_L0 IFPE_L0

IFPF_L3 IFPF_L3

IFPF_L2 IFPF_L2

IFPF_L1 IFPF_L1

IFPF_L0 IFPF_L0

COMMON

GF119

GF117

Y5 27MHZ +-10PPM

4 1

J3 J2

J1 K1

K3 K2

M3 M2

M1 N1

C2

H4 H3

J5 J4

K5 K4

L4 L3

M5 M4

F7

23

16

DGPU_PWROK [9,30,40]

of

16 44

8

Rev.Size

2A

1

BOM Default by N16S-GT

GPU_GPIO0

GPU_GPIO5

A A

TP7 TP5

TP90 TP89 TP87 TP86

B B

THERMTHERM+

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#

R450 10K/F_4

GPU_GPIO6

U20N

E12

THERMDN

F12

THERMDP

AE5

JTAG_TCK

AD6

JTAG_TMS

AE6

JTAG_TDI

AF6

JTAG_TDO

AG4

JTAG_TRST

bga595-nvidia-n13p-gv2-s-a2

8/14 MISC1

2

GF117

NC NC

N16V-GMN16S-GT

GC6 ( X )

NO STUFF

GF117

NC NC NC

GC6 ( O )

R108

STUFF

R462

STUFF

R464 STUFF STUFF

R463

STUFF

R467 STUFF STUFF

GF119

I2CS_SCL

I2CS_SDA

I2CC_SCL I2CC_SDA

I2CB_SCL

I2CB_SDA

GPIO10 GPIO11 GPIO12 GPIO13

GF119

GPIO16 GPIO20 GPIO21

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9

COMMON

+3V_AON

R77

4.7K_4

D9 D8

A9

DGPU_EDIDCLK

B9

DGPU_EDIDDATA

C9

N12E_SCL

C8

N12E_SDA

C6

GPU_GPIO0

B2

GPU_GPIO1

D6

FB_CLAMP_TGL_REQ#

C7 F9 A3

GPU_GPIO5

A4

GPU_GPIO6

B6 A6

VGA_OVT#

F8

ALERT

C5 E7 D7

PWR_LEVEL

B4

D5

GPU_GPIO16

E6 C4

3

R84

4.7K_4

GPUT_CLK

GPUT_DATA

R456 2.2K_4 R457 2.2K_4

R459 2.2K_4 R461 2.2K_4

R108 0_4

R462 0_4 R463 0_4

R119 10K/F_4

TP11

R79 *0_4

Q3 2N7002KDW

4 3

1

R80 *0_4

TP92 TP8

+3V_AON

R95 0_4

4

5

2 6

+3V_AON

PSI

R94 10K/F_4

EC_GPUT_CLK [30]

+3V_GFX

EC_GPUT_DATA [30]

20140811A-Remove GC6 V1.0 function net of FB_CLAMP_TGL_REQ#_EC ( connect with EC ).

+3V_AON

R464 10K/F_4

+3V_AON

R465 10K/F_4

D8 RB500V-40

2 1

+3V_AON

R96 10K/F_4

5

From PGOOD of NVVDD (+VGACORE)

+3V_MAIN_EN: W/ Support GC6 enable by GPU_GPIO5. W/O support GC6 enable by +3V_AON.

R467

+3V_MAIN_EN to enable :

10K/F_4

+VGACORE, +3V_GFX, +1.05V_GFX

+3V_MAIN_EN [38,39]

GPU_EVENT# [9]

VGA_OVT# [14]

GPU_VID [38]

DGPU_PROCHOT_EC# [30,38]

GC6 2.0

GPU_PEX_RST_HOLD# [14]

DGPU_VC_EN[38,39]

DGPU_PWR_EN[8,37]

N16S-GT support GC6 function

Inform CPU.

PSI [38]

R488 0_4

R489 *0_4

GC6_FB_EN

6

N16V-GM not support GC6 function

R478 *0_4

+3V

C597

0.1U/10V_4

2 1

U23

3 5

NL17SZ32DFT2G

4

+3V

R476 *10K/F_4

R472 10K/F_4

ROM_SI (Memory strap setting)

* Both for 940M ( N16S-GT ) & 920M ( N16V-GM )

* Only for 920M ( N16V-GM )

7

To enable Power Rail : +1.5V_GFX

R474 *100K/F_4

DGPU_FB_EN [40]

GC6_FB_EN [9]

Inform PCH, note without this net.

8

17

ROM_SI (Memory strap setting) BOM Default by 15KΩ PD for Samsung K4W4G1646D-BC1A for N16S-GT.

N16S-GT

C C

D D

+3V_AON

R112 49.9K/F_4

R109 *10K/F_4

R110 *10K/F_4

R113 *10K/F_4

R100 *45.3K/F_4

R111 *10K/F_4

TP9 TP10

R103 *4.99K/F_4

R101 *10K/F_4

R102 *4.99K/F_4

R104 *10K/F_4

1

N13P-GV2 NVDD HW BOOT Voltage = 0.875V VID = 110010

DEL VID pin for NVD request

U20L

10/14 MISC2

E10

VMON_IN0

F10

VMON_IN1

D1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

R105

40.2K/F_4

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

GF119

C1

STRAP5_NC

F6

MULTISTRAP_REF0_GND

F4

MULTISTRAP_REF1_GND

F5

MULTISTRAP_REF2_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

GF117

NC

GF119

2

GF117

D12

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

PGOOD

NC

ROM_CS ROM_SI

ROM_SO ROM_SCLK

NV_PWG

R125 0_4

TP6

R92 *10K/F_4

Follow JW5.GC6 2.0

B12 A12 C12

D11 D10

E9

CEC

3

+3V_GFX

R446 *10K/F_4

R448 *4.99K/F_4

R447 15K/F_4

R449 4.99K/F_4

SYS_PEX_RST_MON# [14]

Quanta P/N VRAM Part Description Value Resistor

AKD5PGWTW05 Hynix H5TC4G63AFR-11C 0000 PD 4.99KΩ (R447)

AKD5PGWT500 Samsung K4W4G1646D-BC1A 0010 PD 15KΩ (R447)

R440 *4.99K/F_4

N16V-GM

Quanta P/N VRAM Part Description Value Resistor

AKD5PGWTW05 Hynix H5TC4G63AFR-11C 0010 PD 15.0KΩ (R447)

AKD5PGWT500 Samsung K4W4G1646D-BC1A 0100 PD 24.9KΩ (R447)

AKD5MZDTW04 Hynix H5TC2G63FFR-11C 0011 PD 20.0KΩ (R447)

AKD5MGST511 K4W2G1646Q-BC1A 0110 PD 34.8KΩ (R447)Samsung

R441 4.99K/F_4

BOM Default by N16S-GT

ROM_SI RVL RVL

ROM_SO

ROM_SCLK PD 4.99KΩ PU 4.99KΩ

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

4

5

Location

R446

R447

R448

R449

R440

R441

R112

R104

R111 R103

R109 R101

R110 R102

R113 R100

N16S-GT N16V-GM

GC6 ( O ) GC6 (X)

PD 4.99KΩ

PU 49.9KΩ

NU

PU 4.99KΩ

PU 45.3KΩ

PD 4.99KΩ

PU 10KΩ

PD 4.99KΩ

PD 45.3KΩ

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

N16x-GPIO & Straps

Date:

Wednesday, October 29, 2014

6

Wednesday, October 29, 2014

7

Sheet :

17 44

8

Rev.Size

2A

of

5

4

3

2

1

18

HYU 256Mx16, PN

VMA_DQ[63..0][15]

VMA_DM[7..0][15]

VMA_WDQS[7..0][15]

D D

VREFC_VMA1

FBA_CMD9[15] FBA_CMD11[15] FBA_CMD8[15] FBA_CMD25[15] FBA_CMD10[15] FBA_CMD24[15] FBA_CMD22[15] FBA_CMD7[15] FBA_CMD21[15] FBA_CMD6[15] FBA_CMD29[15] FBA_CMD23[15] FBA_CMD28[15] FBA_CMD20[15] FBA_CMD4[15] FBA_CMD14[15]

FBA_CMD12[15] FBA_CMD27[15] FBA_CMD26[15]

VMA_CLK0[15] VMA_CLK0#[15] FBA_CMD3[15]

FBA_CMD2[15]

C C

B B

FBA_CMD0[15] FBA_CMD30[15] FBA_CMD15[15] FBA_CMD13[15]

FBA_CMD5[15]

Should be 240 Ohms +-1%

VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

VMA_ZQ1

R32 243/F_4

U2

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 G3

E7 D3

C7

B7

T2

L8

J1

L1

J9

L9

VRAM _DDR3_SAMSUNG_256MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_RDQS[7..0][15]

E3

VMA_DQ11

F7

VMA_DQ9

F2

VMA_DQ14

F8

VMA_DQ8

H3

VMA_DQ12

H8

VMA_DQ10

G2

VMA_DQ15

H7

VMA_DQ13

D7

VMA_DQ5 VMA_DQ16

C3

VMA_DQ1

C8

VMA_DQ6

C2

VMA_DQ2

A7

VMA_DQ4

A2

VMA_DQ3

B8

VMA_DQ7

A3

VMA_DQ0

B2

+1.5V_GFX

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

CHANNEL A: 256MB/512MB DDR3

U19

VREFC_VMA1 VREFD_VMA1

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD2 FBA_CMD0 FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

VMA_ZQ2 VMA_ZQ3

R38 243/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL SDRAM DDR3

VRAM _DDR3_SAMSUNG_256MX16

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9

VDD#G7

VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7 C3

VMA_DQ23

C8

VMA_DQ18

C2

VMA_DQ21

A7

VMA_DQ19

A2

VMA_DQ22

B8

VMA_DQ17

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMA_CLK1[15] VMA_CLK1#[15] FBA_CMD19[15]

FBA_CMD18[15] FBA_CMD16[15]

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD5

R30 243/F_4

M8 H1

N3

N2

R8 R2

R3 R7

N7

M7

M2 N8 M3

G3

D3

C7

HYU 128Mx16, PN SAM 256Mx16, PN

SAM 128Mx16, PN

U1

DQL0

VREFCA

DQL1

VREFDQ

DQL2 DQL3

A0

P7 P3

P8 P2

T8 L7

T3 T7

J7 K7 K9

K1 L2 J3 K3 L3

F3

E7

B7

T2 L8

J1 L1 J9 L9

VRAM _DDR3_SAMSUNG_256MX16

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

󶁪󶁪󶁪󶁪

AKD5PGWTW08---AKD5PGWTW07

󶁪󶁪󶁪󶁪

AKD5MZDTW03---AKD5MZDTW02

QBC TOP B/S

󶁪󶁪󶁪󶁪

AKD5PZDT501---AKD5PZDT500

󶁪󶁪󶁪󶁪

AKD5MGGT535---AKD5MGGT534

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.5V_GFX

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD18 FBA_CMD16 FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD5

VMA_ZQ4

R412 243/F_4

U18

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

VRAM _DDR3_SAMSUNG_256MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ62

F7

VMA_DQ59

F2

VMA_DQ60

F8

VMA_DQ56

H3

VMA_DQ61

H8

VMA_DQ58

G2

VMA_DQ63

H7

VMA_DQ57

D7

VMA_DQ54

C3

VMA_DQ48

C8

VMA_DQ55

C2

VMA_DQ51

A7

VMA_DQ53

A2

VMA_DQ50

B8

VMA_DQ52

A3

VMA_DQ49

B2 D9 G7 K2 K8 N1 N9 R1

+1.5V_GFX

R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5V_GFX +1.5V_GFX+1.5V_GFX +1.5V_GFX

VMA_CLK0

R37 160/F_4

VMA_CLK0#

A A

+1.5V_GFX

C57 1U/6.3V_4 C10 1U/6.3V_4 C558 1U/6.3V_4 C561 1U/6.3V_4

5

+1.5V_GFX

C543 10U/6.3V_6 C555 1U/6.3V_4 C52 1U/6.3V_4 C537 1U/6.3V_4 C553 1U/6.3V_4 C33 1U/6.3V_4

R415

1.33K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3

C552

R414

0.1U/10V_4

1.33K/F_4

+1.5V_GFX

C7 10U/6.3V_6 C554 1U/6.3V_4

C13 1U/6.3V_4 C562 1U/6.3V_4

C539 1U/6.3V_4 C547 1U/6.3V_4 C11 1U/6.3V_4 C45 1U/6.3V_4

4

R46

1.33K/F_4

R45

1.33K/F_4

+1.5V_GFX

C47

0.1U/10V_4

C9 10U/6.3V_6 C541 10U/6.3V_6 C546 0.1U/10V_4

C563 0.1U/10V_4 C540 0.1U/10V_4

C538 0.1U/10V_4 C26 0.1U/10V_4

3

+1.5V_GFX

VMA_CLK1

R41 160/F_4

VMA_CLK1#

C542 10U/6.3V_6 C8 10U/6.3V_6

C34 0.1U/10V_4 C545 0.1U/10V_4 C59 0.1U/10V_4

R4

1.33K/F_4

R10

C27

1.33K/F_4

0.1U/10V_4

2

R55

1.33K/F_4

R49

1.33K/F_4

C

Date:

C50

0.1U/10V_4

+1.5V_GFX[15,16,31,40]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

dGPU Memory (DDR3)

Wednesday, October 29, 2014

Sheet :

1

+1.5V_GFX

of

18 44

Rev.Size

2A

5

Follow TWE

TWB/JWV default by LVDS circuit.

4

3

2

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38] +3.3V_2136_A +3.3V_2136_D +1.2V_2136 +SWR_LX

+3V +3.3V_2136_A +3.3V_2136_D +1.2V_2136 +SWR_LX

1

19

L7: need use CV-4709MN00 for Vendor suggestion

D D

SWR MODE

LDO MODE

Stuff Inductance Stuff Resister

+SWR_LX +1.2V_2136

L7 *4.7UH_1A

R107 0_6

Rated current 1A.

X5R

20mil

C196 10U/6.3VS_6_T47

C195 0.1U/10V_4

Close to Pin15

C208 0.1U/10V_4

C192 0.1U/10V_4

Close to Pin43

Close to Pin11

20mil

C201 0.1U/10V_4

Close to Pin5

RTD2136S Power Up Sequence

C211 0.1U/10V_4

L10 PBY160808T-600Y-N

USING 60R 1A

C222 10U/6.3V_6

For EMI

+3V+3.3V_2136_A

C224 0.1U/10V_4

keep 80 Mile Trace

EDDID EEPROM VCC

DP2LVDS VCC

HPD

< = 1 0 0

C C

AUX Channel : 6inch/85Ω

Main Link : 6inch/85Ω

B B

m s

INT_eDP_AUXN[2] INT_eDP_AUXP[2]

INT_eDP_TXP0[2] INT_eDP_TXN0[2]

INT_eDP_TXP1[2] INT_eDP_TXN1[2] TXUOUT0- [20]

MBCLK2[8,30] MBDATA2[8,30]

SMB_RUN_CLK[8,11,12,13,29] SMB_RUN_DAT[8,11,12,13,29]

Reserve for co layout EDP CON, EDP only please stuff

R131 *0_4 R132 *0_4 R133 *0_4 R134 *0_4 R135 *0_4 R136 *0_4

ULT_EDP_HPD[6,20]

Must STUFF both eDP & LVDS.

R124 0_4 R118 0_4

R123 *0_4 R117 *0_4

Default

Reserve

C202 0.1U/10V_4 C203 0.1U/10V_4

C204 0.1U/10V_4 C205 0.1U/10V_4 C206 0.1U/10V_4 C207 0.1U/10V_4

20mil/0.5A/<400mil

240.96 MIL

INT_eDP_AUXN_R [20] INT_eDP_AUXP_R [20]

INT_eDP_TXP0_R [20] INT_eDP_TXN0_R [20] INT_eDP_TXP1_R [20] INT_eDP_TXN1_R [20]

Noise Filter

R127 1K/F_4

R126 100K_4

R129 100k/F_4

INT_eDP_AUXN_2136 INT_eDP_AUXP_2136

INT_eDP_TXP0_2136 INT_eDP_TXN0_2136 INT_eDP_TXP1_2136 INT_eDP_TXN1_2136

20mil

EDP_HPD_2136

Avoid Floating

202.09 MIL

SCL1_2136 SDA1_2136

SDAT_2136 SCLK_2136

223 MIL

123.81 MIL

ROM Mode

R121 4.7K_4 R122 4.7K_4

EDIDCLK_2136 [20]

EDIDDATA_2136 [20]

LDO mode Pin-15 : LDO output Pin-11 & 43 : VDD input Pin-17 : LDO feedback

IC thermal pad connect with GND.

1 2 3 4

7 8 9

10

13 14

45 46 47 48

49

U6

DP_HPD TESTMODE AUX-CH_N AUX-CH_P

LANE0P LANE0N LANE1P LANE1N

CIICSCL1 CIICSDA1

MIICSDA1 MIICSCL1 MIICSDA0 MIICSCL0

NC

+3V

DP_GND

6

17

SWR_LX

GND

16

11

15

DP_V12

RTD2136R

Level Shifter

DP_REXT

177.06 MIL

12

R128 12K/F_4

10uF/X5R

PIN-18 : 80mil/<200mil

C187 0.1U/10V_4

Close to Pin18

18

22

43

5

VCCK

DP_V33

SWR_VCCK

PWMOUT19PANEL_VCC20PWMIN

21

42

TXO0-

41

PVCC

TXO0+

40

TXO1-

39

SWR_VDD

TXO1+

38

TXO2-

37

TXO2+

36

TXOC-

35

TXOC+

34

TXO3-

33

TXO3+

32

TXE0-

31

TXE0+

30

TXE1-

29

TXE1+

28

TXE2-

27

TXE2+

26

TXEC-

25

TXEC+

24

TXE3-

23

TXE3+

44

BL_EN

R97 100K/F_4

+3.3V_2136_D

C185 22U/6.3VS_6_T100

C170 0.1U/10V_4

CLOSE TO Pin22

Close to Pin18

PANEL_VCC : Output 1A / 80mil

EC71

0.1U/25V_4

EC72

0.1U/25V_4

L6 PBY160808T-600Y-N

USING 60R 2A

C172 10U/6.3VS_6_T47

C171 0.1U/10V_4

TXLOUT0-_2136 [20]

TXLOUT0+_2136 [20]

TXLOUT1-_2136 [20]

TXLOUT1+_2136 [20]

TXLOUT2- [20]

TXLOUT2+ [20]

TXLCLKOUT- [20]

TXLCLKOUT+ [20]

TXUOUT0+ [20] TXUOUT1- [20] TXUOUT1+ [20] TXUOUT2- [20] TXUOUT2+ [20]

TXUCLKOUT- [20]

TXUCLKOUT+ [20]

LVDS_BLON_2136 [20]

PCH_DPST_PWM [6,20]

2136_DISP_ON [20]

LVDS (RTD2136~CNN) : 7inch/90~100Ω

PIN-20 PANEL_VCC The switch can support any panel resolution with the maximum current consumption below 1-A, and can endure panel inrush current up to 2-A.

20141007A-EMI request.

R98 100K/F_4

2136_DPST_PWM [20]

Input & output need PD, avoid on floating status while RD2136 booting.

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,37,38]

5

4

3

2

Document Number

C

LVDS Converter-RTD2136

Date:

Wednesday, October 29, 2014

Sheet :

19 44

1

19 44

Rev.Size

2A

of

1

2

3

4

5

6

7

8

20

RTD2136R PANEL_VCC : Output 1A / 80mil / <2inch Add 4.7uF & 100KΩ close panel connector

R43

R40 *0_6

R27 0_6

LVDS

Rd

C14 *0.01U/25V_4

USBP2-[8] USBP2+[8]

15236.07 MIL

+3V

U3

5

IN

4

IN

3

ON/OFF

*AP2821KTR-G1

eDP

LVDS

eDP

LVDS

eDP

LVDS

C23 *4.7U/6.3V_6

1 4 3

L2 MCM2012B900GBE

DIGITAL_CLK[22]

DIGITAL_D1[22]

R5 1K/F_4

PN_BLON

D1 RB500V-40

R47 1K/F_4

100K/F_4

Power Switch Reserve

1

OUT

2

GND

INT_eDP_AUXP_R[19]

EDIDCLK_2136[19]

EDIDDATA_2136[19]

INT_eDP_AUXN_R[19]

INT_eDP_TXN1_R[19]

TXLOUT0-_2136[19] TXLOUT0+_2136[19]

INT_eDP_TXP1_R[19]

INT_eDP_TXN0_R[19]

TXLOUT1-_2136[19] TXLOUT1+_2136[19]

INT_eDP_TXP0_R[19]

TXLOUT2-[19] TXLOUT2+[19]

TXLCLKOUT-[19] TXLCLKOUT+[19]

TXUOUT0-[19] TXUOUT0+[19]

TXUOUT1-[19] TXUOUT1+[19]

TXUOUT2-[19] TXUOUT2+[19]

TXUCLKOUT-[19] TXUCLKOUT+[19]

2

C15 *Clamp-Diode

12

C16

12

*Clamp-Diode

ESD

L1 0_4

VADJ1

C19 33P/50V_4

R36 100K/F_4

L3 *PBY160808T-600Y-N

For LVDS Only: stuff Ra,Rb,Rc

Rc

A A

2136_DISP_ON[19]

PCH_DISP_ON[6]

For EDP Only: stuff Rd,Re,Rf

B B

C C

PCH_DPST_PWM[6,19]

2136_DPST_PWM[19]

LID Switch

D D

1

EMU_LID[30]

LVDS_BLON_2136[19]

PCH_LVDS_BLON[6]

R42 0_8

LVDS

DISP_ON_L

Rf

R50 *0_4

eDP

For EDP Only: stuff Cap

For LVDS only stuff Resistor

+3VLCD_CON

R39

Re

*0_6

Rd

R25 *10_4

eDP

Ra

R19 0_4

LVDS

R48 0_4

Rb

R52 0_4

LVDS

Re

R51 *0_4

eDP

eDP eDP

R26

Rf

0_6

LVDS

R21 0_6

+3V

2

R53 *1K_4

eDP

R54 100K/F_4

Avoid Floating

For EDP Only: Stuff Re

For LVDS Only: Stuff Rf

ULT_EDP_HPD[6,19]

For EDP Only: Stuff Rd Rc

For LVDS Only: Stuff Rc

+3V

C58 *1U/6.3V_4

For EDP Only: stuff

Re

Rf

R33 *0_4

eDP

R24 0_4

LVDS

R14 *1K_4

eDP

BRIGHT

LVDS_BLON1

C17 *10P/50V_4

C18 *10P/50V_4

C41 22P/50V_4

C46

4.7U/6.3V_4

2 1

3

C55 *0.01U/25V_4

R44 0_8

eDP

LVDS

eDP

LVDS

eDP

LVDS LVDS

C54 *0.1U/10V_4

2 1

C29 *0.1U/10V_4

+3V

C30 *0.1U/10V_4

C21 *0.1U/10V_4 R15 0_4 R16 0_4 C22 *0.1U/10V_4

C31 *0.1U/10V_4 R28 0_4 R29 0_4 C32 *0.1U/10V_4

R6 0_4 R7 0_4

R8 0_4 R9 0_4

+VIN

R34

4.7K_4

LVDS

C37 *10P/50V_4

RF

C38 *10P/50V_4

RF

C51 *10U/6.3V_6

R22 0_4

LVDS

+3V

R35

4.7K_4

LVDS

R23 0_4

LVDS

C28 0.1U/25V_4

C42 *4.7U/25V_8

100mA

C36 *4.7U/25V_8

Rb

R31 0_6

+3V

R11 *100K_4

eDP

+3V

R12 *100K_4

eDP

+VIN_BLIGHT

C40 0.1U/25V_4

C12 0.1U/25V_4

C43 0.1U/25V_4

C20 0.1U/25V_4

C35 0.01U/25V_4

C24 0.1U/25V_4

+VIN_BLIGHT

C39 1000P/50V_4

C44 *0.047U/25V_4

1 2

EDIDCLK_R EDIDDATA_R TXLOUT0TXLOUT0+

TXLOUT1TXLOUT1+

TXLOUT2-_R TXLOUT2+_R

TXLCLKOUT-_R TXLCLKOUT+_R

TXUOUT0TXUOUT0+

TXUOUT1TXUOUT1+ ULT_EDP_HPD_R TXUOUT2TXUOUT2+

TXUCLKOUTTXUCLKOUT+

+3V_CAM USBP2-_C USBP2+_C

DIGITAL_CLK_L DIGITAL_D1 VADJ1 BLON_CON

4

+3VLCD_CON

C48 *0.047U/25V_4

1 2

51519-04001-001-40p-l

DFFC40FR036

GS12401-1011-9H

CN1

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5

20140811A-Modify base on CY's Y14 pin define.

4 3 2 1

41 42

LVDS Conn.

Follow TWE

C398

0.1U/10V_4

12

R625 2.2K_4

Q37

4 3

1

2N7002KDW

40 mils

VC5 *TVM0G5R5M220R

R322 100K/F_4

SSM14 spec is 40V 1A

C391 0.1U/10V_4

C388 0.1U/10V_4

C387 0.1U/10V_4 C386 0.1U/10V_4

C397 0.1U/10V_4 C401 0.1U/10V_4

C_IN_CLK

C384 0.1U/10V_4

C_IN_CLK#

C380 0.1U/10V_4

R316 470/F_4 R311 470/F_4

R306 470/F_4 R303 470/F_4

R318 470/F_4 R321 470/F_4

DGPU_CL_HDMIP

R302 470/F_4 R297 470/F_4

3

Q18 2N7002K

2

1

EMI Solution

+5V_HDMI_CRT

21

D11 RB500V-40

5V_HSMBDT

+3V

R630

2.2K_4

5

2 6

C675 *10P/50V_4

12

F1 FUSE SMD 1.5A 6V POLY

R298 0_4

21

5V_HSMBCK

C672

0.1U/10V_4

R301 0_4

R300 121/F_4

D10 RB500V-40

R628

2.2K_4

C674 *10P/50V_4

+5V_HDMI_CRT

R315 121/F_4

R305 121/F_4

R319 121/F_4

CN20 HDMI CONN

20

SHELL1

21

SHELL2

1

C_TX2_HDMI+

D2+

2

D2 Shield

3

C_TX2_HDMI-

D2-

4

C_TX1_HDMI+

D1+

5

D1 Shield

6

C_TX1_HDMI-

D1-

7

C_TX0_HDMI+

D0+

8

D0 Shield

9

C_TX0_HDMI-

D0-

10

C_TXC_HDMI+

CK+

11

CK Shield

12

C_TXC_HDMI-

CK-

13

CE Remote

14

NC

HDMI_SCLK HDMI_SDATA

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

22

SHELL3

23

SHELL4

HDMI Conn.

HDMI follow JWU

40 MIL

C673

0.01U/25V_4

SDVO_CLK[6]

SDVO_DATA[6]

IN_D2[2] IN_D2#[2]

IN_D1[2] IN_D1#[2]

IN_D0[2] IN_D0#[2]

IN_CLK[2] IN_CLK#[2]

+3V

Close to Q18

+3V

R632 2.2K_4

HDMI SMBus Isolation Close to HDMI connector

+5V

20140821A−EMI request.

+3V

R294 1M_4

2

3

HDMI_HPD_CON[6]

5

Q13 2N7002K

1

6

R292 20K/F_4

L22 0_6

HDMI_DET_CHDMI_HPD

VC1 *TVM0G5R5M220R

C361 220P/50V_4

+3V[6,7,8,9,10,11,12,13,14,16,17,19,21,22,23,24,25,26,28,29,30,31,36,37,38] +5V[6,21,22,25,28,29,31,37] +3VLCD_CON +VIN[31,32,33,34,35,36,37,38,39,40] +VIN_BLIGHT[31,32,33,34,35,36,37,38,39,40] +5V_HDMI_CRT[21]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

LCD CN & HDMI CN

D

Date:

Wednesday, October 29, 2014

7

Wednesday, October 29, 2014

+3V +5V +3VLCD_CON +VIN +VIN_BLIGHT +5V_HDMI_CRT

Rev.Size

of

20 44

Rev.Size

Sheet :

8

2A

A

B

C

D

E

Follow TWE

+3V

4 4

C301 0.1U/10V_4

C349 4.7U/6.3V_4

C356 0.1U/10V_4 C357 0.1U/10V_4

C327 0.1U/10V_4 C324 0.1U/10V_4

1

R229 0_4

C294 1000P/50V_4

DDI2_CRT_AUXN[6] DDI2_CRT_AUXP[6]

100 ohm differential impedance

DDI2_CRT_TX0P[2] DDI2_CRT_TX0N[2]

DDI2_CRT_HPD_Q[6]

3 3

+1.05V 1.05V_CRT_DVDD

L20 0_6

R272 *100K/F_4

DDI2_CRT_AUXN_C DDI2_CRT_AUXP_C

R276 *100K/F_4

U11A

DDI2_CRT_TX0P_C DDI2_CRT_TX0N_C

+5V

Q9

2

*BSS138

3

DDI2_CRT_HPD

R230 100K/F_4

C351 0.01U/25V_4

C285 0.1U/10V_4

C344 1000P/50V_4

28

DP_RX_AUXN

29

DP_RX_AUXP

34

DP_RX_L0P

35

DP_RX_L0N

7

DP_RX_HPD

ANX6210FN-AB-R/QFN40

Place Rc,Rd,Re as close as possible to relative pins of ANX6210.

VGA_SDA

VGA_SCL

RED_L

GRN_L

BLUE_L

BLUE

HSYNC VSYNC

25

VGA_SDA

23

VGA_SCL

20

VGA_RED_L

19

VGA_RED

RED

18

VGA_GREEN_L

17

VGA_GREEN

GRN

16

VGA_BLUE_L

15

VGA_BLUE

9

VGA_HSYNC

8

VGA_VSYNC

R250 37.4/F_4

R256 37.4/F_4

Re

Rd

+5V_HDMI_CRT

R287

4.7K_4

R247 75/F_4

R263 37.4/F_4

Rc

R253 75/F_4

Ry

Rx

Place Rx,Ry,Rz as close as possible to the R/G/B pins of VGA header.

R286

4.7K_4

R260 75/F_4

C325 4.7P/50V_4

Rz

ESD PROTECTION

VGA_CON_GREEN VGA_HSYNC_R VGA_SDA

VGA_VSYNC_R VGA_SCL VGA_CON_BLUE

U12

1

IO1

2

IO23IO3

*SP0504SHTG

U10

1

IO1

2

IO23IO3

*SP0504SHTG

6

IO4

REF5GND

4

6

IO4

REF5GND

4

Layout Note : Refer chip spec page-20 ~ 23.

It is strongly recommended to shield RGB with ground.

L19 BLM15BA470SN1D

L18 BLM15BA470SN1D

L16 BLM15BA470SN1D

C335 4.7P/50V_4

C341 4.7P/50V_4

Route the VGA_RED, VEA_BLUE, VGA_GREEN, VGA_CON_RED, VGA_CON_BLUE, VGA_CON_GREEN by 75 Ohm impendance.

C326 2.2P/50V_4

C334 2.2P/50V_4

R251 15/F_4 R234 15/F_4

VGA_CON_RED

VGA_CON_GREEN

VGA_CON_BLUE

C340 2.2P/50V_4

CRT CONN CN18

dsub-10327-00001-15p DFDS15FR276

+5V_HDMI_CRT

VGA_HSYNC_R

VGA_VSYNC_R

C314 *0.1U/10V_4

C323

0.1U/10V_4

+5V_HDMI_CRT

10

21

1617

6

111

7

12

2 8

13

3 9

14

4

15

5

C322 4.7U/6.3V_4

1.05V_CRT_AVDD

C311 4.7U/6.3V_4

C329 0.1U/10V_4

3V_CRT_AVDD

C316 1000P/50V_4

C315 0.1U/10V_4

C296 4.7U/6.3V_4

C310 1000P/50V_4

C321 0.1U/10V_4

3V_CRT_DVDD

C308 0.1U/10V_4

C309 0.1U/10V_4

C328 1000P/50V_4

C330 0.01U/25V_4

C318 0.01U/25V_4

C320 0.1U/10V_4

C317 1000P/50V_4

C346 0.01U/25V_4

C350 0.1U/10V_4

C352 1000P/50V_4

U11C

5

DVDD10

22

DVDD10

DVSS_PLL

12

AVDD10

31

AVDD10

33

AVDD10

38

AVDD33

37

AVDD33

27

AVDD33

14

AVDD33

24

DVDD33

6

DVDD33

ANX6210FN-AB-R/QFN40

B

2 2

1 1

L17 0_6

+3V

L15 0_6

L21 0_6

A

AVSS AVSS AVSS AVSS

26

LDO

39

40 36 32 13

41

EP

Pin-26 / LDO LDO 1.05V output, can be connected to AVDD10/DVDD10 input.

C348 1U/6.3V_4

Case 1: Keep Ra and remove Rb; ANX6210 in HPD process mode; Case 2: Keep Rb and remove Ra; ANX6210 in IRQ process mode.

3V_CRT_DVDD

R207

4.7K_4

Ra

R193 *10K_4

Rb

Pin-4 / CFG_SDA High : Pass VGA cable detect to DP HPD

PLTRST#[6,11,14,23,24,25,28,30]

C

R270 0_4

Place Rf as close to the R_BIAS pin as possible.

R226

4.7K_4

Rf

3V_CRT_DVDD

R271 *6.2K_4

C347 *0.1U/10V_4

R268 12K/F_4

C338 *0.1U/10V_4

R228 10K_4

+1.05V[4,7,10,11,27,30,34,37,39] +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,22,23,24,25,26,28,29,30,31,36,37,38] +5V[6,20,22,25,28,29,31,37] +5V_HDMI_CRT[20]

1.05V_CRT_DVDD

1.05V_CRT_AVDD 3V_CRT_AVDD 3V_CRT_DVDD

U11B

30

R_BIAS

3

CFG_SCL

4

CFG_SDA

10

TEST_EN

21

RESETN

ANX6210FN-AB-R/QFN40

+1.05V +3V +5V +5V_HDMI_CRT

1.05V_CRT_DVDD

1.05V_CRT_AVDD 3V_CRT_AVDD

D

3V_CRT_DVDD

1

XTAL_IN

XTAL_OUT

GPIO

Pin-11 / GPIO LOW : 4.7KΩ resistor to pull down, I2C Address is 0x52 and 0x8E

CRT_XIN

2

CRT_XOUT

11

R227

4.7K_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

Document Number

C

CRT converter (ANX6210)

Date:

Wednesday, October 29, 2014

R233 1M_4

Y4

123

4

27MHZ +-10PPM

C303 18P/50V_4

PROJECT : TWB & JWV ( MB )

Sheet :

E

C304 15P/50V_4

of

21 44

Rev.Size

2A

A

B

C

D

E

U17 *TPS793475DBVR

5

1

Vout

Vin

4

C685

C687

*2.2U/6.3V_6

*0.1U/10V_4

L41 HCB1608KF-181T15_6

+3V

C709 1U/6.3V_4

Close to PIN1

TO Digital MIC

+5V_AVDD

R635 10K_4

C690 0.1U/10V_4

3

2

ACZ_SPKR[9]

1 1

Q38 2N7002K

1

AGND

FOR EMI

ACZ_SDIN0

ACZ_SDOUT_AUDIO

ACZ_SYNC_AUDIO

BIT_CLK_AUDIO

EC66 *33P/50V_4

EC69 *10P/50V_4

EC65 *10P/50V_4

EC67 *33P/50V_4

EC70 1000P/50V_4 EC56 1000P/50V_4 EC68 1000P/50V_4 EC40 1000P/50V_4 EC64 1000P/50V_4

AGND

Close to CODEC

R408 *0_8/S

AGND

place to near Audio Chip or under Audio Chip.

A

DIGITAL_D1[20] DIGITAL_CLK[20]

ACZ_SDOUT_AUDIO[7] BIT_CLK_AUDIO[7] ACZ_SDIN0[7]

L39 HCB1608KF-181T15_6

+1.5V

L40 *HCB1608KF-181T15_6

+3V

ACZ_SYNC_AUDIO[7] ACZ_RST#_AUDIO[7]

AMP_BEEP_R2

R633 100K/F_4

check value

Check layout mount location

+3V_DVDD-IO

R638 10K_4

AGND

Close to Pin 34,35,36

INT. Speaker

CN9 INT SPEAKER CONN

L_SPK+_R

1

L_SPK-_R

2

R_SPK-_R

3

R_SPK+_R

4

C529 1000P/50 V_4

30mil 40mil

C714 10U/6.3VS_6_T47

C711 10P/50V _4 R646 *0_4/S R645 100/F_4 C707 10P/50V _4

R644 0_4 R642 33_4

Digital power for HDA link. (Digital VCC (3.3V or 1.5V)

C701

C699

10U/6.3VS_6_T47

0.1U/10V_4

C695 *0.1U/10V_4

AMP_BEEP_L

C692

C528 1000P/50 V_4

0.01U/25V_4

C527 1000P/50 V_4

C691

2.2U/6.3V_6

+3V_DVDD

C708

4.7U/6.3V_6

Close to Speaker

L26 PBY160808T-600Y-N L27 PBY160808T-600Y-N L28 PBY160808T-600Y-N L29 PBY160808T-600Y-N

C526 1000P/50 V_4

Speaker P/N : DN003009000 ( 4Ω , Normal 1.5W, Max 2W ) 8Ω , 10mil < Trace Width < 20mil. 4Ω , 20mil < Trace Width < 40mil.

Make the trace length/ Speaker wire length of SPKL+/L-/R+/R- be the same as possible as you can.

+5V

L42 HCB1608KF-181T15_6

Class-D power supply

for intel HSW ULT

Q7 BA039040000 BA039040020

ACZ_RST#_AUDIO

VOLMUTE#[30]

B

+3V_DVDD

C713

0.1U/10V_4

3.3Vx0.51mA

C693 0.1U/10V_4

C706 2.2U/6.3V_ 6

3.3Vx0.0012mA

+5V_DVDD

1 3

D12 RB500V-40

3.3Vx0.51mA

20mil

DMIC0 DMIC_CLK_R

ACZ_SDOUT_AUDIO

HD_BCLK

Close to PIN7

C704 10U/6.3VS _6_T47

HD_SDIN0

15~20mil

ACZ_SYNC_AUDIO

AMP_BEEP

CAPCAP+

+3V_DVDD

20mil

L_SPK+ L_SPKR_SPKR_SPK+

+5V_DVDD

C718 0.1U/10V_4 C715 10U/6.3VS _6_T47

C717 0.1U/10V_4 C716 10U/6.3VS _6_T47

+1.5V

R647 *2.2K_4

2

Q39

*MMBT3904-7-F

21

U30

ALC282-CGT

1 2 3

4 5 6 7 8

9

10 11 12 34

35 37 36

42 43 44 45

25mil

Close to Pin 41

25mil

Close to Pin 46

+3V_DVDD

R648

*1K/F_4

R650

*10K_4

DVDD GPIO0/ DMIC-DATA GPIO1 / DMIC-CLK

DVSS SDATA-OUT BCLK LDO3-CAP SDATA-IN

DVDD-IO

SYNC RESETB PCBEEP CPVEE

CBN CBP CPVDD

SPK-L+ SPK-LSPK-RSPK-R+

PVDD1

NC

41

49

5Vx0.001mA

PD#

Digital

PVDD246SPDIF-OUT/GPIO2

PDB

47

48

>40mils trace

AVDD1 AVDD2

AVSS1 AVSS2

LDO1-CAP LDO2-CAP

VREF

Analog

HPOUT-L (PORT I)

HPOUT-R (PORT I)

LINE2-L LINE2-R

LINE1-L (PORTC) LINE1-R (PORTC)

MIC1-R (PORTB)

MIC1-L (PORTB)

MIC1-VREFO-L

MIC1-VREFO-R

MIC2-R (PORTF) MIC2-L (PORTF)

MIC2-VREFO

MONO-OUT

SenseA

JDREF

SenseB

13

15

14

104.98 MIL

SENSE_A_1 SENSE_A

108.5 MIL

COMBO_GPI

+3VS5

C

AGND

Close to PIN26

C694 10U/6.3VS_6_T47

8~20mil

AGND

+1.5V_AVDD

5Vx4.81mA

8mil

26 40

1.5Vx13.42mA

25 38

AGND

27

237.5 MIL

39

219.44 MIL

236.14 MIL

28

C702 0.1U/10V_4 C703 2.2U/6.3V_6

32

HPOUT_L

33

HPOUT_R

24 23

0319 : Change MIC_R1 from PIN 18 to PIN 20 for ALC282-CG suggest Change MIC_L1 from PIN 17 to PIN 19 for ALC282-CG suggest

22

Change VREFOUT_C from PIN 29 to PIN 31 for ALC282-CG suggest

21

94.59 MIL

20

MIC_R1

19

MIC_L1

115.73 MIL

31

VREFOUT_C

30

18 17

29 16

R641 100K_4 C700 10U/6.3VS _6_T47

C710 10U/6.3VS _6_T47

C689 2.2U/6.3V_ 6 C688 2.2U/6.3V_ 6

VREFOUT_C

235.06 MIL

C705 *1U/6.3V_4

AGND

MUTE_LED_CNTL [29]

AGND

Close to PIN28

Close to codec

R637 20K/F_4

R636 39.2K/F_4

R649 22K/F_4

C719 10U/6.3V_6

AGND

2013/07/05 Reserve for 1.5V power supply

C678 *2.2U/6.3V_4

+3V

U29

1

VIN

2

GND ON/OFF3NC

*G9090-150T11U

AGND

VOUT

L38 HCB1608KF-181T15_6

C696

0.1U/10V_4

L43 *HCB1608KF-181T15_6 L44 HCB1608KF-181T15_6

C712 10U/6.3VS_6_T47

AGND DGND

AGND

BYP GND2EN

C530 *1U/6.3V_4

HPA01091DBVR

Close to PIN40

Close to PIN27 & 39

R634 1K/F_4

R643 2.2K_4

EXT_MIC_L

+1.5V_AUDIO +1.5V_AVDD

20mil

5

4

C679 *0.1U/10V_4

3

AGND

AGND SHIELD AGND SHIELD AGND SHIELD

R354 22K/F_4

AGND

L36

*HCB1608KF-181T15_6

L37

*HCB1608KF-181T15_6

C684 *1U/6.3V_4

D

C513

0.1U/10V_4

Vset=1.242V

+5V

12

C686 *AZ2015-01H

+3V +1.5V

10mil

R401 10K_4

AGNDGND

+5V+5V_AVDD

C511

C512

1U/6.3V_4

0.047U/25V_4

+5V

AGND

HPOUT_L HPOUT_R

AGND

SENSE_A

AGND

USBPW_ON#[27,30]

USBP1-[8] USBP1+[8]

C461

0.1U/25V_4

L23

4 3 1

MCM2012B900GBE

For USB2.0 Port on Right Side

+3V_DVDD-IO

USB 2.0 & AUDIO COMBO JACK

20140821A−EMI request.

C487 1000P/50 V_4 C480 1000P/50 V_4 C467 1000P/50 V_4

+5VS5

20140821A−EMI request.

USBP1-_C

2

USBP1+_C

Custom

Date:

Wednesday, October 29, 2014

C443 10U/6.3V_8

C444 1000P/50 V_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

Document Number

Azalia-ALC282

AGND

VREFOUT_C +5V_DVDD +5V_AVDD +5VS5[13,27,31,33,35,36,37,38,40] +5V[6,20,21,25,28,29,31,37] +1.5V[10,25,26,34] +1.5V_AUDIO +1.5V_AVDD +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,23,24,25 ,26,28,29,30,31,36,37,38] +3V_DVDD-IO +3V_DVDD +3VS5[6,9,10,11,25,28,31,33,34,37,39]

PROJECT : TWB & JWV ( MB )

E

CN8 Audio CONN

1 2 3 4 5

AGND

6 7 8

DGND

9 10 11 12 13 14

20140821A−EMI request.

15 16 17 18 19 20

Sheet :

22

VREFOUT_C +5V_DVDD +5V_AVDD +5VS5

+5V

+1.5V +1.5V_AUDIO +1.5V_AVDD +3V +3V_DVDD-IO +3V_DVDD +3VS5

of

22 44

Rev.Size

2A

5

D D

4

3

2

TX_D1+

TX_D1-

TX_D2+

TX_D3+

TX_D3-

TX_D2-

TX_D4+

TX_D4-

1

23

Place Cc,Cd,Ce,Cf close to each VDD10 pin-- 3,8,22,30 Place Cg & Ch close to each VDD10 pin22

RTL8111GS stuff Lx,Cy, Cz

C110 0.1U/10V_4

C126 1U/6.3V_4

Cf

Close Pin-22

C79 *4.7U/6.3V_6

Close Pin-32

(SWR mode need stuff Cx & Cz)

C118 0.1U/10V_4

C75 0.1U/10V_4

Cc

Cd

Ce

Close Pin-8

Close Pin-11

Close Pin-30

Close Pin-22

Ca

CbCdCc

C73 *4.7U/6.3V_6

C114 0.1U/10V_4

C78 0.1U/10V_4

Close Pin-11

Close Pin-32

C74 0.1U/10V_4

Close Pin-23

>60mil

Cz

Close Lx Close Pin-23

C115 4.7U/6.3V_6

C133 0.1U/10V_4

C116 0.1U/10V_4

+1.0V_LAN

C72 0.1U/10V_4

Cg

Ch

Close Pin-3

C C

RTL8111GS stuff Cc, Cd Remove For Not Using SWR mode Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32 Place Cc and Cd close to each VDD33 pin-- 23

B B

Close Pin-22

+3VLANVCC

Differential Impedance : 100Ω

Power trace Layout 󱬵󱬵󱬵󱬵󱷯󱷯󱷯󱷯> 60mil

Trace<30 mil Width > 60 mil

L5 4.7UH,+-20%,650MA_1210

Lx

C132 4.7U/6.3V_6

Cy

R78 *0_8 C87

Rx

Switch Mode:Stuff Lx LDO Mode:Stuff Rx

Close Lx

+1.0V_LAN

Pin-21 LANWAKEB : O/D, Low Active, PU via 1KΩ to +3VS5 on CPU side.

if ISOLATEB pin pull-low,the LAN chip will not drive it's PCI-E outputs ( excluding PCIE_WAKE# pin )

PLTRST#[6,11,14,21,24,25,28,30]

PCIE_RXN4_LAN[8] PCIE_RXP4_LAN[8]

PCIE_WAKE#[6,24,25,30]

+3V

R81 1K_4

R82 15K/F_4

1 2

C113 0.1U/10V_4 C112 0.1U/10V_4

CLK_PCIE_LANN[8] CLK_PCIE_LANP[8]

PCIE_TXN4_LAN[8] PCIE_TXP4_LAN[8]

PCIE_CLKREQ_LAN#[8]

Pin-12 CLKREQB : O/D, PU via 10KΩ to +3V on CPU side.

ISOLATEB

RTL8111GS Pin-24 REGOUT : Switching Regulator 1.0V Output.

+1.0V_LAN_REGOUT

LAN_XTAL25_IN[27]

+1.0V_LAN_REGOUT

>60mil

LAN_AMBLED#

TP2

TP3

LAN_WLED#

TP4

24

REGOUT(NC)

23

VDDREG(VDD33)

22

DVDD10(NC)

21

LANWAKEB

20

ISOLATEB

19

PERSTB

18

HSON

17

HSOP

PCIE_RXN2_LAN_C PCIE_RXP2_LAN_C

R74 0_4

LAN_CLKRQ

LAN_XTAL1

For EMI 0 ~ 22 ohm

R75 *0_4

XTAL2

RSET

XTAL1

26

31

30

27

25

28

LED0

AVDD10

CKXTAL229CKXTAL1

LED1/GPO

LED2(LED1)

RTL8111GS-CG

HSIP13HSIN14REFCLK_P15REFCLK_N

CLKREQB

AVDD33(NC)

16

12

10

11

R72 0_4

*10P/50V_4

1

2

Y1 *25MHZ +-10PPM

4

3

C76 *10P/50V_4

R69 2.49K/F_4

Please add 9 GND VIAs connection with thermal PAD

32

GND

RSET

AVDD33

MDIP0 MDIN0

AVDD10(NC)

MDIP1

MDIN1 MDIP2(NC) MDIN2(NC)

AVDD10

MDIP3(NC)9MDIN3(NC)

U5 RTL8111GS-CG

+3VLANVCC

R413 330_4

LAN_AMBLED#

LAN_AMBLED

MDI0+_1

MDI0-_1

MDI1+_1

MDI2+_1

MDI2-_1

MDI1-_1

MDI3+_1

MDI3-_1

LAN_WLED#

LAN_WLED

+3VLANVCC

LAN conn

CN15 RJ45_CONN

12

LED_AMB#

11

LED_AMB

10

MDI0+

9

MDI0-

8

MDI1+

7

MDI2+

6

MDI2-

5

MDI1-

4

MDI3+

GND1

3

MDI3-

GND2

2

LED_WIT#

1

LED_WIT

R64

EC73

330_4

0.1U/25V_4

20141007A-EMI request.

C67 1000P/50V_4

R18

*0_6/S

14 13

R62

*0_6/S

+1.0V_LAN

+3VLANVCC

33

+1.0V_LAN

1 2 3 4 5 6 7 8

20140930A-Transformer must H<2.5mm, so change source & pin define.

U4

MDI0+

MDI0-

MDI1+

MDI1-

MDI2+

MDI2-

MDI3+

MDI3-

TRA_V_DAC

C71

0.01U/25V_4

1

TD1+

2

TD1-

5

TD2+

6

TD2-

7

TD3+

8

TD3-

11

TD4+

TD4-12MX4-

3

TCT1

4

TCT2

9

TCT3

10

TCT4

NA0069R

MX1+

MX1-

MX2+

MX2-

MX3+

MX3-

MX4+

MCT1 MCT2 MCT3 MCT4

24 23

20 19

18 17

14 13

22 21 16 15

MDI0+_1

MDI0-_1

MDI1+_1

MDI1-_1

MDI2+_1

MDI2-_1

MDI3+_1

MDI3-_1

R20 75/F_4

LAN_MCTG3

C25 *0.01U/100V_06

C548 1000P/50V_4

(Amber)

(White)

LAN_MCTG1

LAN_MCTG2

R66 75/F_4

C69 *0.01U/100V_06

LAN_MCTG0

R65 75/F_4

R67 75/F_4

C70 *0.01U/100V_06

C68 *0.01U/100V_06

LAN_MCTG

A A

Follow JW5

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,24,25,26,28,29,30,31,36,37,38] +1.0V_LAN_REGOUT +3VLANVCC[27,37] +1.0V_LAN

5

4

3

2

+3V +1.0V_LAN_REGOUT +3VLANVCC +1.0V_LAN

C544 10P/3KV_1808

RTL8111GS : Switching Regulater RTL8111G : LDO Regulater

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

LAN-RTL8111GS-CG/RJ45

Date:

Wednesday, October 29, 2014

1

Sheet :

of

23 44

Rev.Size

2A

5

4

3

2

1

24

D D

CARD READER For JWV 14".

+3VCARD

SD_D2 SD_D3 SD_CMD SD_CD#

RTS5237_GPIO

26

27

32

28

30

29

31

SP7

GPIO

3V3aux

WAKE#

SD_CD#

MS_INS#

RTS5227E-GRT

RREF93V3_IN11DV12S14SP115SP2

AV1210CARD_3V312NC

16

13

RTS5237_DV12SRTS5237_AV12

RTS5237_3Vaux

NC25NC

DV33_18

PCIE_WAKE#[6,23,25,30]

PLTRST#[6,11,14,21,23,25,28,30]

PCIE_CLKREQ_CR#[8] PCIE_TXP2_CARD[8]

PCIE_TXN2_CARD[8] CLK_PCIE_CRP[8]

CLK_PCIE_CRN[8]

PCIE_RXP2_CARD[8]

C C

PCIE_RXN2_CARD[8]

Zdiff = 100 ohm

RTS5237_RREF : W > 12mil, L < 200mil.

Power Budget ~ 1.2A ( W > 40mil )

B B

R340 *0_4/S

R352 *0_4/S

C463 0.1U/10V_4 C468 0.1U/10V_4

U14

RTS5237_RREF

C475 *100P/50V_4

R371 0_6

C500

0.1U/10V_4

C505

0.1U/10V_4

RTS5227E-GRT

1

PERST#

2

CLKREQ#

3

HSIP

4

HSIN

5

REFCLKP

6

REFCLKN

7

HSOP

8

HSON

33

GND

W > 20mil

R376 0_4

C507 *4.7U/6.3V_6

20140811A-Realtek recommand to remove C454 4.7uF. Base on Rev:A test result to discuss on Rev:B.

PCIE_CLKREQ_CR#_R

PCIE_RXP2_CARD_C PCIE_RXN2_CARD_C

Please add 9 GND VIAs connection with thermal PAD

Colse to Chip

R364

6.2K/F_4

1 2

+3V +3VCARD

C499 10U/6.3V_8

NC NC

NC SP6 SP5 SP4

SP3

C506

0.1U/10V_4

24 23 22 21 20 19 18 17

SD_D0_R SD_D1_R

R341 10K_4

R342 *0_6/S C447 0.1U/10V_4 C446 4.7U/6.3V_6

Resister close to chip.

SD_D2_R SD_D3_R SD_CMD_R DV33_18

SD_CLK_R

Output capability is 800mA. Current protection is 950mA. ( W > 40mil )

C508

4.7U/6.3V_6

R348 33_4 R353 33_4 R356 0_4

DV33_18 : W > 20mil, L < 200mil.

C473 1U/10V_4

R361 22_4

R368 33_4 R382 33_4

RTS5237_GPIO Imax = 15mA

+3V

RTS5237_3Vaux : Power Budget ~ 375mA ( W > 30mil )

20140821A−EMI request.

C495

5.6P/16V_4

SD_D3

EC45 *5.6P/16V_4

CLOSE CONN

C485 0.1U/10V_4

C486 *0.1U/10V_4

C497 4.7U/6.3V_6

SD_CLK SD_D0

SD_D1 SD_WP

SD_D2 SD_D3 SD_CMD SD_CD#

SD_CLK SD_D0

SD_D1 SD_WP

SD_D1

SD_D0

SD_D2

Reserve for EMI

EC49 *5.6P/16V_4

EC46 *5.6P/16V_4

EC48 *5.6P/16V_4

Share Pin

PIN-15

PIN-16

PIN-17

PIN-19

PIN-20

PIN-21

PIN-29

PIN-30

CN10 *CARDREADER CONN

1

DAT2

2

DAT3

3

CMD

4

C/D

5

VSS1

6

VDD

7

CLK

8

VSS2

9

DAT0

10

DAT1

11

W/P

12

GND

13

GND

14

GND

15

GND

CARD READER For TWB 15".

CN11 CARDREADER CONN

1

DAT2

2

DAT3

3

CMD

4

C/D

5

VSS1

6

VDD

7

CLK

8

VSS2

9

DAT0

10

DAT1

11

W/P

12

GND

13

GND

14

GND

15

GND

20141127A-TWB CN11--Vender inform : DFHD11MR029, DFHS11FR153 has same footprint / pin define / dimenstion , only different for coating. Change P/N for DFHS11FR153.

DFHS11FR153 : TWB (15") DFHD11MR052 : JWV (14")

SP1

SP2

SP3

SP4

SP5

SP6

SP7

SD_CD#

SD_D1

SD_D0

SD_CLK

SD_CMD

SD_D3

SD_D2

SD_WP

SD_CD#

---

MS_D1

MS_D0

MS_D2

MS_D3

MS_CLK

MS_BS

---

I/O

SD Data 1 (SD_D1)

I/O

SD Data 0 (SD_D0)

I/O

SD Clock signal (SD_CLK)

SD CMD signal (SD_CMD)

I/O

SD Data 3 (SD_D3)

I/O

SD Data 2 (SD_D2)

I/O

SD Write Protect signal

I

SD Card Detection signal

I

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,25,26,28,29,30,31,36,37,38] +3VCARD

5

4

3

2

+3V

+3VCARD

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

RTS5227E-GRT & CR SOCKET

Date:

Wednesday, October 29, 2014

Rev.Size

2A

Sheet :

24 44

1

24 44

2A

of

A

B

C

D

E

No Function.

25

+5V+3V_WLAN_P

R312 10K_4

4 4

EC39 *33P/50V_4

R357 *0_4

CLK_24M_DEBUG

BT_OFF[9]

3

2

Q16 2N7002K

1

For EMI Suggestion

PCIE_TXN3_WLAN_HMC PCIE_RXP3_WLAN_HMC PCIE_RXN3_WLAN_HMC CLK_PCIE_WLANP_HMC CLK_PCIE_WLANN_HMC

R309 10K/F_4

13

R323 *0_4

R314 0_4 R310 *0_4

Intel 7260 BGN + BT WLAN/combo Wake up from WLAN for iSCT (AOAC) Output / OD

EC_DEBUG[30]

CLK_24M_DEBUG[8]

4

PCIE_TXP3_WLAN[8] PCIE_TXN3_WLAN[8] PCIE_RXP3_WLAN[8] PCIE_RXN3_WLAN[8]

CLK_PCIE_WLANP[8] CLK_PCIE_WLANN[8]

RP11 0_4P2R_4 RP13 0_4P2R_4 RP8 0_4P2R_4

No Function.

3 3

PCIE_WAKE#[6,23,24,30]

EC_PCIE_WAKE#[30]

3

2

1

2

1

4

3

2

1

4

3

PCIE_CLKREQ_WLAN#[8]

BT_COMBO_EN#[9]

+3V_WLAN_P

2

Q14 *LTC044

+3V_WLAN_P

2

Q15 LTC044

+1.5V +3VS5 +3VPCU

R308 *0_6

C428 0.1U/10V_4

C400 0.01U/25V_4

BT_OFF#

PLTRST#

CLKREQ_WLAN#

MINICAR_PME#

C395 10U/6.3VS_6_T47

H=5.2

CN25 MINI PCIE H=5.2

6

+1.5V

28

+1.5V

48

+1.5V

51

Reserved

49

Reserved

47

Reserved

45

Reserved

19

Reserved

17

Reserved

33

PETp0

31

PETn0

25

PERp0

23

PERn0

13

REFCLK+

11

REFCLK-

7

CLKREQ#

5

BT_CHCLK

3

BT_DATA

1

WAKE#

43

Reserved

37

Reserved

35

GND

29

GND

27

GND

21

GND

15

GND

DFHS52FR044

+3.3V +3.3V

+3.3Vaux Reserved Reserved

LED_WLAN# LED_WPAN#

LED_WWAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

PERST#

W_DISABLE#

Reserved Reserved Reserved Reserved Reserved

PAD54PAD53HOLE55HOLE

56

ph

52 2 24 41 39 44 46 42 38 36 32 30 22

PLTRST#

20

WLAN_DISABLE#

16 14 12 10 8 50

GND

40

GND

34

GND

26

GND

18

GND

4

GND

9

GND

R336 10K_4

R339 10K_4

HMC_LED_WLAN# HMC_LED_BT#

USBP6+_HMC USBP6-_HMC

C390 0.1U/10V_4

C408 0.1U/10V_4

C385 0.1U/10V_4

+3V

+3V_WLAN_P

C403 10U/6.3VS_6_T47

C392 *0.1U/10V_4

R343 *0_4/S R335 *0_4/S

2

RP10 0_4P2R_4

4

PLTRST# [6,11,14,21,23,24,28,30]

Pin-20 WLAN_DISABLE_L : Disable WLAN when LOW.

LAD0 [7,28,30] LAD1 [7,28,30] LAD2 [7,28,30] LAD3 [7,28,30]

LFRAME# [7,28,30]

R317 *0_8

+3V_AOCS

24mil

1 3

1

3

USBP6+ USBP6-PCIE_TXP3_WLAN_HMC

2

Q20 AO3409

30V, 2.6A

minipci-aaa-pci-092-p05-52p

R320

3

1

R327 10K_4

Q17 2N7002K

10K_4

3

2

EC_AOCS# [30]

Q19 2N7002K

1

2

RF_OFF [9]

C409

0.1U/10V_4 R326 200K_4

C432 *0.022U/25V_4

RF_LINK# [30]

USBP6+ [8]

USBP6- [8]

+3V_WLAN_P

HMC/WLAN

Support Wake Function(Reserve)

+3V_WLAN_P

C520 *0.1U/10V_4

C521 *0.1U/10V_4

C524 *10u/6.3V_6

C522 *0.1U/10V_4

CN28

+3V_WLAN_P

R388

5

4

+3V_WLAN_P

R366 *10K_4

12

*10K_4

R370 *10K_4

C472 *0.1U/10V_4

TP79

WLAN_DISABLE#

PDN#

PLTRST#

+3V_WLAN_P

NGFF_LED_BT#

NGFF_LED_WLAN#

R363 *10K_4

+WL_VIO

WIFI_SUSCLK

+3V_WLAN_P

C

2 2

(Low Active)

WLAN_OFF_L POWER DOWN LAN CHIP from EC? WIFI_DISABLE_L disable Antenna from PCH?

WLAN_OFF_L : Follow Y07 control by EC.

PCH_SUSCLK[6,30]

1 1

A

PIN52: power down CHIP

WLAN_OFF_L[30]

+3V_WLAN_P +3V_WLAN_P

R359 *10K_4

RF_LINK#

BT_OFF#

U16

NC1VCC

2

A

GND3Y

*74AUP1G07GW

R365 *0_4

R369 *0_4

R374 *0_4

B

R389 *0_4

R396 *0_4

74 72 70 68 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32

30 28 26 24

22 20 18 16 14 12 10

8 6 4 2

NGFF

3.3Vaux

3.3Vaux NC NFC_ANT_N NFC_ANT_P NFC_VDDANT ALERT I2C_CLK I2C_DATA W_DISABLE PDN# PERST0# SUSCLK_32KHz LTE_SOUT LTE_SIN NC NFC_WI_IN NFC_SWP2_IO NC UART_CTS UART_RTS UART_Rx

SLOT A-SD

KEY KEY KEY KEY

UART_Tx UART_Wake GND LED#2 PCM_IN PCM_OUT PCM_SYNC PCM_CLK LED#1

3.3Vaux

3.3Vaux GND76GND

77

75

GND

73

RESERVED

71

RESERVED

69

GND

67

PETn1

65

PETp1

63

GND

61

PERn1 PERp1

GND

PEWake0#

CLKREQ0#

GND REFCLKN0 REFCLKP0

GND

PETn0 PETp0

GND

PERn0 PERp0

GND

KEY KEY KEY KEY

SDIO_RESET

SDIO_WAKE

SDIO_DAT3 SDIO_DAT2 SDIO_DAT1 SDIO_DAT0

SDIO_CMD

SDIO_CLK

GND

USB_D-

USB_D+

GND

*WLAN_NGFF CONN(Type 2230)_75P 2R FR

59 57 55 53 51 49 47 45 43 41 39 37 35 33

31 29 27 25

23 21 19 17 15 13 11 9 7 5 3 1

WAKE/REQ 53, 55 OD

MINICAR_PME# CLKREQ_WLAN#

CLK_PCIE_WLANN_NGFF CLK_PCIE_WLANP_NGFF

PCIE_RXN3_WLAN_NGFF PCIE_RXP3_WLAN_NGFF

PCIE_TXN3_WLAN_NGFF PCIE_TXP3_WLAN_NGFF

USBP6-_NGFF USBP6+_NGFF

RP9 *0_4P2R_4

RP15 *0_4P2R_4

RP14 *0_4P2R_4

2

RP12 *0_4P2R_4

4

WIFI/BT COMBO (NGFF E KEY)

4

3

2 4

2 2

4

1 3

CLK_PCIE_WLANN

1

CLK_PCIE_WLANP

3

PCIE_RXN3_WLAN

1

PCIE_RXP3_WLAN

1

PCIE_TXN3_WLAN

3

PCIE_TXP3_WLAN

USBP6USBP6+

BT

Date:

D

Date:

+5V[6,20,21,22,28,29,31,37] +3VPCU[4,7,27,28,29,30,32,33] +3VS5[6,9,10,11,22,28,31,33,34,37,39] +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,26,28,29,30,31,36,37,38] +3V_WLAN_P +1.5V[10,22,26,34]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

HMC WLAN & NGFF WLAN

Wednesday, October 29, 2014

Sheet :

E

+5V +3VPCU +3VS5 +3V +3V_WLAN_P +1.5V

of

25 44

Rev.Size

2A

1

2

3

4

5

6

7

8

26

A A

Mini PCI-E Card 2- Full size mSATA

C378 0.1U/10V_4

C371 4.7U/6.3V_6

C393 0.1U/10V_4

FMC/iSATA

2

1

SATA_TXP2[7] SATA_TXN2[7]

SATA_RXN2[7] SATA_RXP2[7]

B B

SATA_RXP2 SATA_RXN2

SATA_TXN2

C C

SATA_TXP2

RP5 0_4P2R_4

4

2

RP4 0_4P2R_4

4

2

RP6 *0_4P2R_4

RP7 *0_4P2R_4

1

4

3

2

1

4

3

SATA_TXP2_HMC1

3

SATA_TXN2_HMC1

1

SATA_RXN2_HMC1

3

SATA_RXP2_HMC1

SATA_RXP2_NGFF1 SATA_RXN2_NGFF1

SATA_TXN2_NGFF1 SATA_TXP2_NGFF1

C374 0.01U/25V_4 C373 0.01U/25V_4

C376 0.01U/25V_4 C375 0.01U/25V_4

Place Cap close to conn within 100mils

C474 *0.01U/25V_4 C466 *0.01U/25V_4

C462 *0.01U/25V_4 C460 *0.01U/25V_4

NGFF-SSD

SATA_TXP2_HMC2 SATA_TXN2_HMC2

SATA_RXN2_HMC2 SATA_RXP2_HMC2

Place Cap close to conn within 100mils

Pin--21 / OC SSD : GND = SSD

SATA_RXP2_NGFF2 SATA_RXN2_NGFF2

SATA_TXN2_NGFF2 SATA_TXP2_NGFF2

Pin--69 / PEDET : GND = SATA

+3V

C379 0.1U/10V_4

C399 4.7U/6.3V_6

C372 *4.7U/6.3V_6

CN21

MINI PCIE H=5.2

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

15 13 11

9 7 5 3 1

DFHS52FR044

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75

*SSD_NGFF_CONN_75P

mipci-apci0020-p002a-75p-km

Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved

GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA WAKE#

CN27

NGFF

PRESERVE GND N/A N/A N/A N/A Key Key Key Key WWAN/SSDIND_N N/A N/A GND N/A N/A GND N/A N/A GND SATA RX+ SATA RXGND SATA TXSATA TX+ GND REFCLKN REFCLKP GND KEY KEY KEY KEY N/A IFDET GND GND GND

H=5.2

LED_WPAN# LED_WLAN#

LED_WWAN#

SMB_DATA

SMB_CLK

+3.3Vaux

W_DISABLE#

Reserved Reserved Reserved Reserved Reserved

GND53GND

54

Device sleep

+3.3V +1.5V

USB_D+

USB_D-

+1.5V

PERST#

+1.5V +3.3V

3.3Vaux

DAS#

MFG1 MFG2

SUSCLK

3.3Vaux

52 50

GND

48 46 44 42 40

GND

38 36 34

GND

32 30 28 26

GND

24 22 20 18

GND

16 14 12 10 8 6 4

GND

2

R395 *0_6

4 6

N/A

8

N/A

10 12

Key

14

Key

16

Key

18

Key

20

N/A

22

N/A

24

N/A

26

N/A

28

N/A

30

N/A

32

N/A

34

N/A

36

N/A

38

R360 *0_4

40

N/A

42

N/A

44

N/A

46

N/A

48

N/A

50

N/A

52

N/A

54

N/A

56 58 60

KEY

62

KEY

64

KEY

66

KEY

check power consumption

68 70 72 74

R338 *0_8

R313 *0_4

USBP3+_C

R304 *0_4/S

USBP3-_C

R307 *0_4/S

+1.5V

C377 *4.7U/6.3V_6

C389 0.01U/25V_4

C394 *0.1U/10V_4

+3V

EC53

TP80

Pin--10 / DAS & DSS# : Device Activity

*10U/6.3VS_6_T47

Reserve for RF

+3V

R367 *10K/J_4

Device Sleep Signal H : SSD enter sleep mode. Device Sleep Signal L : SSD exit sleep mode.

Added in MV stage (8/13)

EC29 *10U/6.3VS_6_T47

DEVSLP1 [9,26]

USBP3+ [8]

USBP3- [8]

DEVSLP1 [9,26]

+3V

EC33 *470P/50V_4

Reserve for RF

Follow TWE

mipci-apci0018-p002a-75p-kb

2280/2242

20140808-Change P/N & FP, must confirm pin define again.

D D

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

FMC SSD & NGFF SSD

Date:

Wednesday, October 29, 2014

1

2

3

4

5

6

Wednesday, October 29, 2014

7

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,28,29,30,31,36,37,38] +1.5V[10,22,25,34]

Sheet :

+3V +1.5V

of

26 44

8

Rev.Size

2A

5

4

3

2

1

USB 2.0/3.0 Combo

27

Follow TWE

USB_CHG_ON[30]

MAINON[30,34,35,37] EC_USB_CTRL2[30]

D D

C C

B B

A A

EC_USB_CTRL3[30]

USBP0-[8] USBP0+[8]

USBP5-[8] USBP5+[8]

USB30_RX2-[8] USB30_RX2+[8]

USB30_TX2-[8] USB30_TX2+[8]

C427 0.1U/10V_4 C425 0.1U/10V_4

R375 0_4

EC_USB_CTRL2 EC_USB_CTRL3

VC3 *AVLC 5S_4

C421 1U/6.3V_4

USBPW_ON#[22,30]

L24 MCM2012B900GBE

R400 *0_4 R394 *0_4

USB30_RX1-[8] USB30_RX1+[8]

USB30_TX1-[8] USB30_TX1+[8]

4 3 1

2

USB3_2USB3_2+

R345 *0_4/S R344 *0_4/S

R333 *0_4/S R332 *0_4/S

R386 *10K/F_4

U15

5

EN

6

CTL1

7

CTL2

8

CTL3

11

DM_IN

10

DP_IN

2

DM_OUT

3

DP_OUT

TPS2546

high active

IC current limit is 2A

Ios = 48000/RILIM0

for Envy SKU stuff

C509 0.1U/10V_4 C501 0.1U/10V_4

Active Low 150 mils (Iout=3.7A)

U13

AP2501M8-13

2 3 4 1

8

VIN1

OUT3

7

VIN2

OUT2

6

EN

OUT1

5

GND

OC

USBP5-_C USBP5+_C

USB30_RX2-_C USB30_RX2+_C

USB30_TX2-_C USB30_TX2+_C

C423 *Clamp-Diode

12

1

IN

12

OUT

14

GND

9

/STATUS

17

PADGND

16

ILIM_HI

15

ILIMI_LO

4

ILIM_SEL

13

/FAULT

USBP0-_CHA USBP0+_CHA

USB3_1USB3_1+

+5V_USBP0+5VS5

C404 1000P/50V_4

C405 470P/50V_4

VC2 *AVLC 5S_4

C449 *Clamp-Diode

C445 *Clamp-Diode

C429 *Clamp-Diode

12

+5VS5+5VS5

R393

R358

10K/F_4

R372

R399

80.6K/F_4

*0_4

DB2 modify: EMI stuff L40

L30 MCM2012B900GBE

1

2

4 3

C523 *Clamp-Diode

12

C516 *Clamp-Diode

12

R407 0_4 L31 *MCM2012B900GBE

1

2

4 3

R404 0_4

R390 0_4 L25 *MCM2012B900GBE

1

2

4 3

R387 0_4

C422 0.1U/10V_4

C417 150U/6.3V(H1.9)

C407 *150U/6.3V(H1.9)

12

+

CN23 USB3.0 CONN

1A

1 2 3 4 5 6 7 8 9

C433 *Clamp-Diode

C442 *Clamp-Diode

12

DFHS09FR436 usb-2ub4029-200601f-9p

USB 3.0

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTX-

9

SSTX+

11111010131312

12

C518 4.7U/6.3V_6 C471 0.1U/10V_4

C481 470P/50V_4

C465 150U/6.3V(H1.9)

12

+

R384 22K/F_4

+

C464 *150U/6.3V(H1.9)

12

+5V_USBP1

LAN_XTAL25_IN[23]

PCH_XTAL24_IN[8]

CLKGEN_RTC_X1[7] CLK_27M_XTAL_IN[16]

80 mils (Iout=2A)

C470 0.1U/10V_4 C469 470P/50V_4 VC4 *AVLC 5S_4 C482 1000P/50V_4

+5V_USBP1 USBP0-_C USBP0+_C

USB30_RX1-_C USB30_RX1+_C

USB30_TX1-_C USB30_TX1+_C

Green CLK Circuitry

LAN_XTAL25_IN_R

PCH_XTAL24_IN_R

20140922A-For SLG3NB3455V, R209 change to 0Ω.

CLK_27M_XTAL_IN_R

20141002A-Without clock output by PIN-12.

C286 0.1U/10V_4

C295 0.1U/10V_4

C300 *0.1U/10V_4

GEN_XTAL25_OUT

4

3

Y3 25MHZ +-10PPM

1

2

GEN_XTAL25_IN

+3VLANVCC

+1.05V

+3V_AON

C274 15P/50V_4

C273 12P/50V_4

R221 33_4

C312 *10P/50V_4

R209 0_4

C297 *10P/50V_4

R202 *22_4

C292 *10P/50V_4

CN29 USB3.0 CONN

1

VBUS

1

2

D-

2

3

D+

4

GND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

11111010131312

12

DFHS09FR436 usb-2ub4029-200601f-9p

USB 3.0

U9 SLG3NB3455

6

25M

5

24M

9

32Khz

12

27Mhz/NC

VDD_RTC_OUT

8

VDDIO_25M VDDIO_24M3GND

11

VDDIO_27/NC

16

XTAL_OUT

1

XTAL_IN

D4

2

10

1

3

15

+V3.3A

2

VDD

10

VBAT

14 7

13

GND

4

GND

17

GND

UMA

DIS

AL003455002 IC OTHER(16P) SLG3NB3455(TQFN)

AL003454000 IC OTHER(16P) SLG3NB3454(TQFN)

79 4

USB30_TX1-_CUSB30_RX1+_C

6 5

USB30_TX1+_CUSB30_RX1-_C

*SP3010-04UTG

+5VS5[13,22,31,33,35,36,37,38,40] +3VLANVCC[23,37] +1.05V[4,7,10,11,21,30,34,37,39] +3VPCU[4,7,25,28,29,30,32,33] +3V_AON[14,17,37] +3V_RTC_0[7] +3V_RTC[7,10] +5V_USBP1 +5V_USBP0

+3V_RTC voltage has 3V when current from RTC battery through D3. But voltage down around 2.5V when current from G-CLK. So has more V for G-CLK. Doesn't recommand +3V_RTC through G-CL K.

+3VPCU

20mils width(min)

+3V_RTC_0,+3V_RTC_R,+3V_RTC..

C267 0.1U/10V_4

+3V_RTC_R

+3V_RTC_G

AL003455002

AL003454000

+3V_RTC_0+3VLANVCC +3V_RTC

R239 360/F_4

C306 22U/6.3VS_8_T100

C313 0.1U/10V_4

P/N

R187 *0_6

C280 2.2U/6.3V_6

Iout : 2.5 ~ 6uA

R202 C300

No Stuff No Stuff

Stuff

SLG3NB3455 : Pin-11 & 12 --> NC.

+5VS5 +3VLANVCC +1.05V +3VPCU +3V_AON +3V_RTC_0 +3V_RTC +5V_USBP1 +5V_USBP0

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

USB 3.0 Port & Green CLK

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

27 44

1

27 44

Rev.Size

2A

of

A

0327 : DEL Touch Pad Connector CN7 for U83

4 4

PWR_LED#[30]

DEEP_PWRLED#[29]

0927 Change CN4 PIN2 from +3V to DEEP_PWRLED# for Power LED

Power Botton Connector

Pin1 : +3VPCU(LIDSWITCH PWR) Pin2 : +3V POWER LED Pin3 : LIDSWITCH Pin4 : GND Pin5 : GND Pin6 : POWERON#

+3VPCU

C83

0.1U/10V_4

DEEP_PWRLED#

C82

0.1U/10V_4

LID_EC#[30]

NBSWON1#[30]

C81

0.1U/10V_4

C80

0.1U/10V_4

2

C97

0.1U/10V_4

+3VPCU

R76 10K/F_4

Q2 LTC044

1 3

20140821A−EMI request.

3 3

Fingerprint Conn

BADD 4EH/4F (default)HIGH

R293 *0_4/S R291 *0_4/S

LAD0_T LAD1_T LAD2_T LAD3_T

LFRAME#_T

U7 *SLB9635TT1.2-FW3.17

26

LAD0

23

LAD1

20

LAD2

17

LAD3

21

LCLK

22

LFRAME#

16

LRESET#

28

LPCPD#

27

SERIRQ

9

TEST/BADD

15

CLKRUN#

1

NC

3

NC

12

NC

USBP4+[8] USBP4-[8]

2 2

Address

TPM (1.2)

LAD0[7,25,30] LAD1[7,25,30] LAD2[7,25,30] LAD3[7,25,30] CLK_PCI_TPM[8]

FOR EMI

1 1

C287 *10P/50V_4

+3V

R185 *0_4 R184 *0_4 R181 *0_4 R180 *0_4

R182 *33_4

LFRAME#[7,25,30] PLTRST#[6,11,14,21,23,24,25,30]

R186 *4.7K/F_4

SERIRQ[9,30]

+3V

CLKRUN#[6,30]

R183 *0_4

R151 *4.7K/F_4

JWV remove G-sensor/Touch Screen function.

A

B

1 2 3 4 5 6

CN2 POWER BTN CONN

DFFC06FR062

50503-0060n-001-6p-l

C363 *Clamp-Diode

12

VDD VDD VDD VSB

GND GND GND GND

GPIO

GPIO2

PP

TESTI

XTALI/32K IN

XTALO

B

10 19 24 5

4 11 18 25

6 2

7 8

13 14

C364 *Clamp-Diode

12

+3V

C270 *0.1U/10V_4 C232 *0.1U/10V_4 C271 *0.1U/10V_4

+3VS5

TPM_XOUT

R153 *10M_4

Y2 *32.768KHz

1 2

C230 *12P/50V_4

FAN1_PWM[30]

FAN1SIG[30]

+3V

USBP4+_C USBP4-_C

+5V

C233 *0.1U/10V_4

TPM_PPLPCPD#_TPM

+5V

20140821A−EMI request.

C365 *0.1U/10V_4

88513-0601-6p-l-smt

DFFC06FR162

*FINGER PRINT CONN

6 5 4 3 2 1

CN6

C360 *0.1U/10V_4

C580

0.1U/10V_4

C164 *220P/50V_4

C581 10U/6.3VS_6_T47 CN24

+3V

SI..Add C610 for FR +5v bypass cap...11/25

+3V

R152 *4.7K/F_4

R147 *0_4

TPM_XIN

C231 *12P/50V_4

C

FAN

R93

4.7K_4

Close EC

C168 *220P/50V_4

ZERO_PWR_ODD[30]

High : ODD power down Low : ODD power on

C

CN16 FAN Connect

5

1

5 2 3

6

46

R597 *0_4

D

SATA HDD Connector

SATA HDD

1

GND1

2

A1+

3

A1-

4

GND2

5

B1-

6

B1+

7

GND3

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

RSVD

19

GND

20

12V

21

12V

22

Gnd : (5 Pin)

12V

23

CGND1

24

CGND2

Bypass CAP close conn

R543 0_8

C362 *0.1U/10V_4

12

3

2

1

ODD_EJECT#[30]

C654 0.01U/25V_4 C652 0.01U/25V_4

C645 0.01U/25V_4 C644 0.01U/25V_4

R598 *22_8

Q35 *2N7002K

+3VPCU +3V +5V +5V_ODD +12VALW

SATA_TXP1[7] SATA_TXN1[7]

SATA_RXN1[7] SATA_RXP1[7]

ZERO_ODD_DP#[9]

+12VALW +5V +5V_ODD

R612

Q36 *2N7002K

2

*330K_6

1 2

3

1

2

C662 *0.027U/25V_6

2 1

3

1

+3VPCU[4,7,25,27,29,30,32,33] +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,29,30,31,36,37,38] +5V[6,20,21,22,25,29,31,37] +5V_ODD +12VALW[37,39]

D

Q34 *AO3404

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0_C SATA_RXP0_C

+3V

C676 10U/6.3V_8 C677 0.1U/10V_4

+5V

C396 *10U/6.3V_8 C402 *10U/6.3VS_6_T47 C406 4.7U/6.3V_6 C410 0.1U/10V_4

+3V

R519 *10K_4

Bypass CAP close conn

C683 0.01U/25V_4 C682 0.01U/25V_4

C681 0.01U/25V_4 C680 0.01U/25V_4

SATA_TXP14_C SATA_TXN14_C

SATA_RXN14_C SATA_RXP14_C

12

R567 1K_4

120 mils

C640 0.1U/10V_4

C642 0.1U/10V_4

C638 10U/6.3V_8

C641 0.1U/10V_4

C639 0.1U/10V_4

R159 *0_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

SATA HDD/ODD, Power/B, FAN

Date:

Wednesday, October 29, 2014

E

SATA_TXP0 [7] SATA_TXN0 [7]

SATA_RXN0 [7]

SATA_RXP0 [7]

+3V: 2 A (4-Pin)

+5V: 2 A (4-Pin)

CN17

14 SATA ODD

S1

2

TXP

3

TXN

14

5

RXN

6 8

9 10 11

1

4

7 12 13

RXP DP +5V +5V MD GND1 GND2 GND3 GND GND

16

S7 P1

17

15

P6

SATA ODD CONNECTOR

14'' SATA ODD

ZERO_ODD_DA#

Sheet :

E

28

of

28 44

Rev.Size

2A

A

B

C

D

E

LED Status

2013/07/05 Reserve for BATTERY LED

+3VPCU

R68 *10K_4

34

BATLOW#[30]

5

Q1A *2N7002KDW

R60 0_4

TWB 15" Left SW

JWV 14" Left SW

1 1

TWB 15" Right SW

JWV 14" Right SW

+3VSUS

R156

R157

4.7K_4

TPCLK[30] TPDATA[30]

A

L11 BLM18BA470SN1D L12 BLM18BA470SN1D

SMB_RUN_DAT[8,11,12,13,19]

SMB_RUN_CLK[8,11,12,13,19]

R61 *10K_4

61

2

Q1B *2N7002KDW

SW3

3 4

5 6

sw-tme-533b-q-tr-6p

SW2

3 4

5 6

*sw-tme-533b-q-tr-6p

SW4

3 4

5 6

sw-tme-533b-q-tr-6p

SW1

3 4

5 6

*sw-tme-533b-q-tr-6p

+3V

BATLOW#_L

Q12B 2N7002KDW

Q12A 2N7002KDW

1 2

61

2

Dual

5

34

BAT LED

LED2 3P WHITE LED

C531 *AVLC 5S_4

R639 1K_4

R640 1K_4

C237 10P/50V_4

C236 10P/50V_4

+3VSUS

R267

4.7K_4

C342 *10P/50V_4

21

C343

0.1U/10V_4

B

25 mils

+3VSUS

R409 330/6

TPCLK-1 TPDATA-1

R259

4.7K_4

C337 *10P/50V_4

+3VPCU

TP_L

C697

0.1U/10V_4

TP_R

C698

0.1U/10V_4

CN4

50503-0080n-001-8p-l

DFFC08FR026

1 2 3 4 5

TP_SMB_DATA TP_SMB_CLK

6 7 8

TOUCH PAD CONN

Touch Pad Connector

SATA_LED#[7]

DEEP_PWRLED#[28]

C

CAPSLED#[30]

MUTE_LED_CNTL[22]

WIRELESS_ON[30]

WIRELESS_OFF[30]

SATA LED

C532 *AVLC 5S_4

PWR LED

C533 *AVLC 5S_4

21

LED3 3P WHITE LED

21

LED1 3P WHITE LED

KEYBOARD Con.

+3VPCU

MUTE_LED_CNTL_R1

3

2

1

Q4 *2N7002K

12

Q5 *LTC044

2

12

Q6 *LTC044

2

R99 *10K/F_4

R137 *200/F_6

R140 *200/F_6

1 2

R410 330/6

R411 330/6

MY[0..17][30]

MX[0..7][30]

KEYBOARD PULL-UP

+3VPCU

+5V[6,20,21,22,25,28,31,37] +3VPCU[4,7,25,27,28,30,32,33] +3VSUS[37] +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,30,31,36,37,38]

RP2 *10P8R-8.2K

10

1

9

MY13 MY12 MY3 MY6

MY1 MY4 MY5 MY0 MY9

R436 *8.2K/F_4 R429 *8.2K/F_4

1 3

D

2

8

3

7 4

56

RP1 *10P8R-8.2K

10

1

9

2

8

3

7 4

56

R115 *200/F_6 R120 *200/F_6

+5V

R139 *1K/F_4

+5V

R138 *1K/F_4

+5V +3VPCU +3VSUS

+3V

+3VPCU

MY14 MY11 MY10 MY15

MY2 MY7

MY8

MY[0..17] MX[0..7]

MY16 MY17

12 12

0503 : Change pin define and M/B keyboard connector follow R33

MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17

CAPSLED#_R MUTE_LED_CNTL_R WIRELESS_ON_R WIRELESS_OFF_R

+3V

LED_PW

MY5

C130 220P/50V_4

MY6

C163 220P/50V_4

MY3

C166 220P/50V_4

MY7

C159 220P/50V_4

MY8

C161 220P/50V_4

MY9

C98 220P/50V_4

MY10

C175 220P/50V_4

MY11

C174 220P/50V_4

MY1

C139 220P/50V_4

MY2

C151 220P/50V_4

MY4

C153 220P/50V_4

MY0

C111 220P/50V_4

MX4

C102 220P/50V_4

MX6

C93 220P/50V_4

MX3

C125 220P/50V_4

MX2

C119 220P/50V_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

LED, Touch Pad, KB

Date:

Wednesday, October 29, 2014

CN3 KB CONN

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

DFFC32FR025

196319-32021-3-32p-l

MX7 MX0 MX5 MX1

MY12 MY13 MY14 MY15

MY16 MY17

Sheet :

E

29

C85 220P/50V_4 C142 220P/50V_4 C109 220P/50V_4 C77 220P/50V_4

C167 220P/50V_4 C169 220P/50V_4 C173 220P/50V_4 C184 220P/50V_4

C186 220P/50V_4 C193 220P/50V_4

of

29 44

Rev.Size

2A

1

2

3

4

5

6

7

8

30

SERIRQ[9,28] LFRAME#[7,25,28] LAD0[7,25,28] LAD1[7,25,28] LAD2[7,25,28] LAD3[7,25,28]

For GPU thermal

For Touch-Pad

GPIO33_EC EC_GPUT_CLK EC_GPUT_DATA DGPU_PROCHOT_EC# MBCLK2 MBDATA2

CLK_24M_KBC[8]

PLTRST#[6,11,14,21,23,24,25,28] CLKRUN#[6,28]

SIO_EXT_SCI#[9] PCH_SLP_S0_N[6,11] EC_RCIN#[9]

EC_GPUT_CLK[17] EC_GPUT_DATA[17]

EC_USB_CTRL2[27] EC_USB_CTRL3[27]

TPCLK[29] TPDATA[29]

WLAN_OFF_L[25]

ACIN[32,37] PCI_SERR#[7]

SUSWARN#_EC[6] RF_LINK#[25] SLP_SUS#_EC[6]

GPIO33_EC[7]

DPWROK_EC[6] EC_PECI[2]

USBPW_ON#[22,27]

SUSON[35,37]

SLP_SUS_ON[10]

S5_ON[33]

THRM_MOINTOR1[4]

SYS_I[30,32]

ODD_EJECT#[28]

USB_CHG_ON[27]

BATLOW#[29] WIRELESS_ON[29] WIRELESS_OFF[29]

12

C569 0.1U/10V_4

12

C583 0.1U/10V_4

R442 *10K_4 R430 4.7K_4 R431 4.7K_4 R422 4.7K_4 R427 4.7K_4 R428 4.7K_4

R482 *10_4

C611 *10P/50V_4

R483 *0_4

MX0[29] MX1[29] MX2[29] MX3[29] MX4[29] MX5[29] MX6[29] MX7[29]

MY0[29] MY1[29] MY2[29] MY3[29] MY4[29] MY5[29] MY6[29] MY7[29] MY8[29] MY9[29] MY10[29] MY11[29] MY12[29] MY13[29] MY14[29] MY15[29] MY16[29] MY17[29]

EC_GPUT_CLK EC_GPUT_DATA

TP83 R454 *0_4

D7 RB500V-40

R458 43_4

R452 *0_4/S R453 *0_4

THRM_ALERT_HW#1

TP84

+3V

3

U21 KB9010QF C4

3

SERIRQ

4

LFRAME

10

LAD0

8

LAD1

7

LAD2

5

LAD3

12

PCICLK

13

PCIRST/GPIO5

38

CLKRUN

20

SCI/GPIOE

SLP_S0#_EC 3920_RST#

BIOS_RD# BIOS_WR# BIOS_CS#

EC_GPXD1

EC_PECI_R

1

GA20/GPIO0

2

KBRST/GPIO1

37

ECRST

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

83

PSCLK1/GPIO4A

84

PSDAT1/GPIO4B

85

PSCLK2/GPIO4C

86

PSDAT2/GPIO4D

87

PSCLK3/GPIO4E

88

PSDAT3/GPIO4F

119

RD/GPIO5B

120

WR/GPIO5C

128

SPICS/GPIO5A

89

SELIO/GPIO50

76

AD5/GPIO43

109

D0/GPXD0

110

D1/GPXD1

112

D2/GPXD2

114

D3/GPXD3

115

D4/GPXD4

116

D5/GPXD5

117

D6/GPXD6

118

D7/GPXD7

97

A0/GPXA0

98

A1/GPXA1

99

A2/GPXA2

100

A3/GPXA3

101

A4/GPXA4

102

A5/GPXA5

103

A6/GPXA6

104

A7/GPXA7

105

A8/GPXA8

106

A9/GPXA9

107

A10/GPXA10

108

A11/GPXA11

124

V18R

C601 4.7U/6.3V_6

C600 0.1U/10V_4

Need Change New PN

1 2

Reserve for ENE Hold time issue

MBCLK2 MBDATA2

MBCLK MBDATA

EC_GPUT_CLK EC_GPUT_DATA

C573 *10P/50V_4 C574 *10P/50V_4

C572 *10P/50V_4 C575 *10P/50V_4 C576 *10P/50V_4

4

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 AVCC

AD0/GPI38

AD1/GPI39 AD2/GPI3A AD3/GPI3B

DA0/GPO3C DA1/GPO3D DA2/GPO3E DA3/GPO3F

PWM1/GPIOF

PWM2/GPIO10

FANPWM1/GPIO12 FANPWM2/GPIO13

FANFB1/GPIO14 FANFB2/GPIO15

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

GPIO4 GPIO7

GPIO8

GPIOA GPIOB GPIOC

GPIOD GPIO11 GPIO16 GPIO17 GPIO18

GPIO19 GPIO1A

AD6/CIR_RX/GPIO40

AD7/GPIO41 AD4/GPIO42

GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59

GPIO5E

GPIO5D

GND1 GND2 GND3 GND4 GND5

AGND

A A

B B

WLAN_OFF_L : For NGFF WLAN disable.

PCH_SPI1_SO_R[7] PCH_SPI1_SI_R[7] PCH_SPI_CS0#_R[7] PCH_SPI1_CLK_R[7]

C C

D D

1

R510 15/F_4 R556 15/F_4 R514 15/F_4 R571 15/F_4

Close to BIOS

H_PECI (50Ω) Route on microstrip only. Spacing >18 mils Total Trace Length Max. : 15 iches

NBSWON1# MBCLK MBDATA EC_PCIE_WAKE# LID_EC#

R480 10K/F_4 C571 *10P/50V_4 R425 4.7K_4 R426 4.7K_4 R434 10K/F_4 R484 47K/F_4

BIOS_RD# BIOS_WR# BIOS_CS# BIOS_SPI_CLK

New Thermal Protect

+3VPCU

2

THRM_MOINTOR THRM_MOINTOR1

500mA

9 22 33 96 111 125 67

63 64

AD_TYPE

65 66

SYS_I

68 70

DGPU_PROCHOT_EC#

71 72

21

FB_CLAMP

23 26

27

FB_CLAMP_TGL_REQ#_EC

28 29

TS_ON

77

MBCLK

78

MBDATA

79

MBCLK2

80

MBDATA2

6

C608 0.1U/10V_4

14 15

16 17 18 19

NBSWON1#

25 30

R479 *0_4/S

31 32

34 36

73

EC_PCIE_WAKE#

74

THRM_MOINTOR

75

GPIO42_EC

90 91 92 93

EC_PWROK

95 121 126

BIOS_SPI_CLK

127

LID_EC#

123

CRY2

122

CRY1

11 24 35 94 113 69

R433 *0_6/S

+3VPCU +3VPCU_EC

C602 0.1U/10V_4

C606 0.1U/10V_4

C577 0.1U/10V_4

C603 0.1U/10V_4

C586 0.1U/10V_4

C607 0.1U/10V_4

C578 0.1U/10V_4

C609 0.1U/10V_4

C587 0.1U/10V_4

TP95

TP93

R485 *0_4

C589 *22P/50V_4

R468 *100K_4

1 2

R460 *0_4/S

5

L32 BLM18BA470SN1D

TEMP_MBAT [32]

AD_AIR [32]

SYS_I [30,32]

LAN_POWER [37]

DGPU_PROCHOT_EC# [17,38]

BATSHIP [32]

PCIE_WAKE# [6,23,24,25]

TP96

ZERO_PWR_ODD [28]

FAN1_PWM [28]

TP94

FAN1SIG [28]

TP97

MBCLK [32]

MBDATA [32]

MBCLK2 [8,19]

MBDATA2 [8,19]

SUSB# [6,11] HWPG [4,11,33,34,35]

H_PROCHOT#_EC

SUSC# [6,11]

SUSACK#_EC [6]

EC_AOCS# [25]

NBSWON1# [28]

EMU_LID [20]

EC_DEBUG [25]

5VS5_ON [33]

SIO_EXT_SMI# [7]

VRON [36]

DGPU_PROCHOT# [38]

EC_PCIE_WAKE# [25]

THRM_MOINTOR [4]

DNBSWON# [6,11]

CAPSLED# [29]

PWR_LED# [28]

EC_PWROK [6]

RSMRST# [6]

VOLMUTE# [22]MAINON[27,34,35,37]

LID_EC# [28]

PCH_SUSCLK [6,25]

AC_PRESENT_EC [6]

C568 4.7U/6.3V_6

C570 0.1U/10V_4

TP88

20140811ARemove GC6 V1.0 function net of FB_CLAMP_TGL_REQ#_EC ( connect with GPU ).

for Battery charge/charge

for DDR Thermal IC

2

R481 *10K/F_4

+3VPCU

IMVP_PWRGD_R[4]

PM_THRMTRIP#[9]

+3VPCU[4,7,25,27,28,29,32,33] +3VPCU_EC +3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,31,36,37,38] +1.05V[4,7,10,11,21,27,34,37,39]

6

AC adapter ID define. CB project without this function. Just reserve & BOM NU.

+3VPCU

D5

Change to 1SS355 as Current loss

*1SS355

R443 *10K_4

C619 *47P/50V_4

3

Q33 2N7002K

1

R424 10K_4

Adapter select for EC

DIS Hi ==> ( 90W ) UMA Low ==>( 65W)

R435

20140910A-Confirm EC & BIOS. This pin

*10K_4

without function. Reserve circuit or NC?

DGPU_OVT#[14]

DGPU_PWROK[9,16,40]

2 1

C582 *0.1U/10V_4

H_PROCHOT# [2,36]

R416 *0_4

C567 220P/50V_4

1

+3VPCU +3VPCU_EC +3V +1.05V

R438 *100/F_4

R439 *12.1K/F_4

+1.05V

R417

4.7K_4

Q25

2

METR3904-G

1 3

Q24 *2N7002K

2

Date:

7

3

C

Wednesday, October 29, 2014

AD_ID

C579 *100P/50V_4

+3V

R423

4.7K_4

D6 RB500V-40

OVT_DETC

2

13

Q26 METR3904-G

FOR SG/DIS

R455 *0_4/S

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

EC (KB9010QF C4)

2 1

+3VPCU

R437 10K/F_4

+3VPCU

THRM_ALERT_HW#1

R471 47K/F_4

C596

0.1U/10V_4

Sheet :

TP85

Open Drain need PU high

3920_RST#

EC_GPXD1

30 44

8

EC_PWROK

of

Rev.Size

2A

5

4

3

2

1

31

EC13 0.01U/25V_4

+5VS5 +5VS5 +5VS5 +5VS5 +5VS5

+3VS5 +3VS5 +3VS5

+5V +5V +5V +5V

+3V +3V +3V +3V +3V

EC27 0.01U/25V_4 EC55 0.01U/25V_4 EC20 0.01U/25V_4

EC11 0.01U/25V_4 EC12 0.01U/25V_4 EC23 0.01U/25V_4 EC22 0.01U/25V_4 EC35 0.01U/25V_4

EC10 0.01U/25V_4 EC14 0.01U/25V_4 EC26 0.01U/25V_4 EC57 0.01U/25V_4 EC43 0.01U/25V_4

EC18 0.01U/25V_4 EC41 0.01U/25V_4 EC19 0.01U/25V_4

D D

C C

20140826A−EMI request.20140829A−EMI request.

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

+1.35VSUS +1.35VSUS +1.35VSUS +1.35VSUS

1 2

EC61 100P/50V_4

1 2 1 2

EC4 100P/50V_4

1 2

EC3 100P/50V_4

1 2

EC9 100P/50V_4

EC16 120P/50V_4 EC15 120P/50V_4 EC21 120P/50V_4 EC24 120P/50V_4

20141008A−EMI request for PV.

+VIN_VGACORE +VIN_VGACORE

C6 *0.1U/25V_4

+VIN +VIN

C336 *0.1U/25V_4 C559 0.1U/25V_4

+VIN

C200 *0.1U/25V_4

+VIN

C60 *0.1U/25V_4

+VIN

C65 *0.1U/25V_4

+VIN

C534 *0.1U/25V_4

+VIN

C63 *0.1U/25V_4

+VIN

C106 *0.1U/25V_4

+VIN

C536 *0.1U/25V_4

+VIN

C564 *0.1U/25V_4

+VIN

C284 *0.1U/25V_4

+VIN

C197 0.1U/25V_4

+VIN

C246 0.1U/25V_4

+VIN

C198 0.1U/25V_4

+VIN

C302 0.1U/25V_4

+VIN

C358 0.1U/25V_4

+VIN

C424 0.1U/25V_4

+VIN

C5 0.1U/25V_4

+VIN

C272 0.1U/25V_4

+VIN

C535 0.1U/25V_4

+VIN

C199 0.1U/25V_4

+VIN

C61 0.1U/25V_4

+VIN

C565 0.1U/25V_4

+VIN

C62 0.1U/25V_4

+VIN

C64 0.1U/25V_4

+VIN

EC74 0.1U/25V_4

+VIN

EC75 2200P/50V_4

+VIN

EC76 0.1U/25V_4 EC77 2200P/50V_4

+PRWSRC +PRWSRC +PRWSRC +PRWSRC

+1.35VSUS

+5VS5

+PRWSRC +PRWSRC

BATT+ BATT+ BATT+ BATT+

C550 0.1U/25V_4 C551 0.1U/25V_4C212 *0.1U/25V_4

C49 0.1U/25V_4EC60 100P/50V_4

C2 *0.1U/25V_4 C4 *0.1U/25V_4 C1 *150P/50V_4 C3 *150P/50V_4

C353 *0.1U/25V_4 C355 *0.1U/25V_4 C354 *0.1U/25V_4

C566 *0.1U/25V_4 C66 *0.1U/25V_4

C560 *0.1U/25V_4 C53 *0.1U/25V_4

Hole

CPU BRACKET P/N : FBU86017010

B B

GPU BRACKET P/N : FBR62021010

NGFF NUT P/N : MBY01001010

A A

FAN NUT P/N : MBFF4001010

5

CPU Backet

H9 *INTEL-BKT-SHARK-ULT

top

BRACKET

342

1

GPU Backet

H6 *H-TC279BC216D141P2

H5 *H-TC279BC216D141P2

top top top

BRACKET BRACKET BRACKET

1

NGFF WLAN 2230 NGFF SSD 2240 NGFF SSD 2280

H13 *H-TC157BC197D106P2

top top top

NUT-BOT NUT-BOT NUT-BOT

1

H22 H-TC236BC315D145P2

bot top bot

1

NUT-BOT NUT-BOT

H15 *H-TC157BC197D106P2

1

H23 H-TC315BC236D145P2

1

H8 *H-TC279BC216D141P2

1

H17 *H-TC157BC197D106P2

1

4

H11 *H-C394D118P2

1

H14 *H-C197D118P2

1

H21 *H-C394D118P2

1

H2 *H-C315D102P2

Thermal Module

H7 *O-U6X-2

top

NO-NUT

1

top top

FIX-HOLE SCREW

H24 *SPAD-C236NP

1

3

H25 *SPAD-C197NP

H19 *H-C394D118P2

1

??

H4 *H-C315D118P2

H12 *H-C394D118P2

H18 *H-C236D98P2

1

H1 *H-C236D118P2

toptop

1

FIX-HOLESCREW

H3 *H-C315D118P2

toptop

1

SCREWSCREW

H10 *H-C394D118P2

toptop top

1

SCREWSCREW SCREW

H16 *H-C236D118P2

1

H20 *H-C394D118P2

toptop toptop bot

1

SCREWSCREW SCREWSCREW

2

PAD1

1

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

EMI Capacitor & HOLE

Date:

Wednesday, October 29, 2014

PAD2

PAD3

1

Rev.Size

2A

Sheet :

31 44

1

31 44

2A

of

5

4

3

2

1

For TWB 15"

15"

D D

SMD SMC

BATT+

B_TEMP_MBAT

CN12

BATTERY 8P 1R MR(P2.0,H5.2)

1

2

3

4

5

6

7

10

7

10

8

9

8

9

32

Do Not add test pad on BATDIS_G signal

4

PR34 220K_4 PR42

220K_4

PD4

21

Place this ZVS close to Diode away +VIN

PD9

15

21 2 3

P4SMAJ20A

PC119

0.1U/25V_4

+VAD

PQ5

4

Q2

2 1

Q1

MMDT2907A-7-F

+VA

+VAD

PC116

2200P/50V_4

BATDIS_G

PR32

3

IDEA_G

1M_4

65

PR43

1K_6

+VAD

PR9

22_8

MIN. BATV=7.2V

4

PQ23

QM3016D

4 3

1

+VA

PC10

0.47U/25V_6

ACDET=13V

+PRWSRC

+VA_AIR

PC122

0.1U/50V_6

PR41 1M_4

PR8

4.02K/F_4

BQACDRV

REGN6V

ACIN[30,37]

MBDATA BQDATA

MBCLK BQCLK

+VAD

PR24 1M_4

PR18 1M_4

PR20 750K/F_4

BQCMSRC

PR10

100K/F_4

PR11

100K/F_4

PR22

*0_4/S PR25

*0_4/S

PR12 430K/F_4

69.8K/F_4

PR21 127K/F_4

PR5

4.02K/F4

PR14

2

BQVCC

METR3904-G

1 3

ACIN

2

PQ1

+PRWSRC

20

3

1

PC4

0.1U/25V_4

3

CMSRC

4

ACDRV

5

ACPRES

VCC

8

SDA

9

SCL

PR13

88.7K/F_4

PQ3 2N7002K

PR33 *0_2/S

PR36

RC1206-R010

CSIP

PC6

BQACP

2

0.1U/25V_4

ACP

ACDET

6

PC11

*0.1U/50V_6

CSINBQACN

1

BQ24738

ILIM

10

PR29

*100K/F_4

PR37 *0_2/S

ACN

PU1

+3VPCU

3

PR23

4.02K/F_4

21

2 1

REGN6V

PC18

PC7

1U/16V_4

16

0.1U/25V_4

PR28

100K/F_4

REGN

IOUT

BQIOUT

7

PC16

HIDRV

BTST

PHASE

LODRV

GND GND GND GND GND GND

SRP SRN

BATDRV

PR17 10/F_4

100P/50V_4

Place this cap close to EC

18

17

19

15

14 21 22 23 24 25

13 12 11

BQB_2

BQSRP BQSRN BQBATDRV

DC_JACK DIP 90W

50300-00441-001-4p-l

C C

B B

A A

CN14

+VA_AC

1 2

3 4

5

PC20

0.1U/25V_4

AD_AIR[30]

Place this cap close to EC

+VA

PL7 *0_8/S

PL8 *0_8/S

PC167 *0.1U/10V_4

PC121

0.1U/25V_4

+VA_AIR

+3VPCU [4,7,25,27,28,29,30,33] +5VPCU [13,33] BATT+ [31] +PRWSRC [31]

PR31 *75K/F_4

PR30 *12.4K/F_4

PQ22 EMB20P03V

6 7 8

1N4448WS-7-F

PQ4 TPCA8064-H

D

5

BATDIS_ID_DODBQBATDRV

PD5 P4SMAJ20A

Place this ZVS close to Far-Far away +VIN

PC126

1000P/50V_4

BQB_1

PR27 0_4 PR26 0_4

SYS_I [30]

RQ3E070BNFU7TB

PD3 RB501V-40

PC13

0.047U/25V_4

BQHIDRV

PR19

*0_6/S

BQPHASE

BQLODRV

PC168

0.01U/50V_4

3

S

2 1

G

4

21

RQ3E070BNFU7TB

PC22

0.1U/25V_4

PC21

0.1U/25V_4

BATSHIP[30]

+BATCHG

PC123

0.1U/25V_4

PQ21

REGN6V

PQ27

PC15

0.01U/50V_4

35241

PC19

0.1U/25V_4

2

+VIN

678

+BATCHG

3

1

PR2 470_8

PQ2 2N7002K

PL1 *0_8/S

PL2 *0_8/S

PC14

0.1U/25V_4

PC125

4.7U/25V_8

4.7uH/5.5A(PCMC063T-4R7MN)

PR120

2.2_6

PC129 2200P/50V_4

2

MBDATA[30]

MBCLK[30]

PC8

*100P/50V_4

PC124

2200P/50V_4

PL9

PC2

0.1U/25V_4

BATT+

PR4

PR3

330_4

BQLR

2 1

PR1 RC1206-R020

F3_2X1_65-2_8

1 2

PR15

*0_2/S

2 1

PDZ5.6B

PD2

PDZ5.6B

CSOP CSON

Reserve for ISN & EMI

EC59 10U/25V_8

EC6

*1U/25V_4

PC3 *100P/50V_4

PD1

PR16 *0_2/S

+VIN

+PRWSRC

SMD SMC

B_TEMP_MBAT

PC5

0.01U/25V_4

PC1

10U/25V_8

EC58

10U/25V_8

EC5 *1U/25V_4

C

Date:

Wednesday, October 29, 2014

14"

CN13

*PMPCRA-08MLBS1ZZ4H4

1

BATT+

PR6 200K_4

PR7 1K/F_4

EC1 10U/25V_8

EC7

*1U/25V_4

Document Number

1

2

3

4

5

6

7

10

7

10

8

9

8

9

+3VPCU

TEMP_MBAT [30]

PC170

0.01U/25V_4

Place this cap close to EC

+BATCHG

PC17

PC12

PC9

10U/25V_8

0.1U/25V_4

0.1U/25V_4 PD8 SX34

EC2

10U/25V_8

EC8

*1U/25V_4

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Charger (BQ24738)

Sheet :

32 44

1

32 44

Rev.Size

2A

of

5

4

3

2

1

DC/DC +3VS5/+5VS5

33

+3VS5 [6,9,10,11,22,25,28,31,34,37,39]

+3VPCU

D D

PD6

UDZVTE-3.6B

PR179 10K/F_4

+3VS5

HWPG[4,11,30,34,35]

S5_ON SY8208BEN

S5_ON[30]

C C

PR187 0_4

+VIN

PR176

499K/F_4

2 1

PR182 *0_4/S

PR185 1M_4

PC95

4.7U/6.3V_6

SY8208BPG

SY8208BLDOEN

PR175 150K/F_4

PC217 *0.1U/10V_4

5

2

1

7

PU9

LDO

PGOOD

EN1

EN2

SY8208B

GND

VOUT

8

VIN

PR178 *0_6/S

PC93

4.7U/25V_8

SY8208BBST_S

PR181 1K/F_4

PC97

0.1U/25V_4

9

6

SY8208BBST

BST

10

SW

SY8208BSW

4

SY8208BVOUT

3

SY8208BFB

FB

PC207

4.7U/25V_8

PC212

0.1U/25V_4

+VIN_3VS5

0.01U/25V_4

*2200P/50V_4

PC214

PL4 *0_8/S

PC96 2200P/50V_4

PL21

2.2uH/8A(PCMC063T-2R2MN)

PR195 *2.2_6

PC225

+VIN

PC88

0.1U/25V_4

PR117 *0_2/S

12

+

PC107

+3.3 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A

+3VS5

+3.3VS5_S

PC102

PC113

0.1U/10V_4

22U/6.3V_8

*150U/6.3V_3528

PJP2 *POWER_JP/S

1 2

PC111

*22U/6.3V_8

PC109

PC105

22U/6.3V_8

+5VS5 [13,22,27,31,35,36,37,38,40]

+5VPCU

PU8

7

PC208

4.7U/6.3V_6

PR183 *0_4/S

B B

S5_ON

PR190 *0_4

5VS5_ON[30]

For USB charge function, to separe the enable pin for +3VS5 & +5VS5. +5VS5 <-> 5VS5_ON +3VS5 <-> S5_ON

A A

PR184 0_4

5

HWPG SY8208CPG

PR189 1M_4

PC219

*0.1U/10V_4

PC209

2.2U/6.3V_6

LDO

2

PGOOD

1

EN

5

VCC

RT7238CGQUF

8

VIN

PC211

PC216

9

6

10

4

3

0.1U/25V_4

SY8208CBST

SY8208CSW

SY8208CVOUT

SY8208CFB

GND

BST

SW

VOUT

FB

4

PR177 *0_6/S

PR180 1K/F_4

4.7U/25V_8

SY8208CBST_S

PC94

4.7U/25V_8

0.1U/25V_4

+VIN_5VS5

PC205

PC213

6800P/50V_4

PL5 *0_8/S

PC215 2200P/50V_4

2.2uH/8A(PCMC063T-2R2MN)

PR194 *2.2_6

PC224 *2200P/50V_4

3

+VIN

PL22

PC90

0.1U/25V_4

PR118 *0_2/S

+5VS5_S

12

+

PC106

*150U/6.3V_3528

+5 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A

+5VS5

PJP3 *POWER_JP/S

1 2

PC110

*22U/6.3V_8

PC108

22U/6.3V_8

PC103

2

PC114

0.1U/10V_4

PC112

22U/6.3V_8

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

3/5VPCU

Date:

Wednesday, October 29, 2014

PROJECT : TWB & JWV ( MB )

Sheet :

33 44

1

Rev.Size

2A

of

5

4

3

2

1

34

D D

PU7

6

NC

3

NC

5

NC

PR163 *0_4

4

PGOOD

PR162

HWPG NB671PGPCH

HWPG[4,11,30,33,35]

C C

MAINON[27,30,34,35,37]

MAINON

*0_4/S

PR168 *0_4/S

PC194

PC193

11

VCC

1U/6.3V_4

13

EN

NB671

*0.1U/25V_4

AGND PGND

VOUT

VIN

BST

SW SW SW SW

FB

1

14 2

10

8

NB671SW

9 15 16

7

NB671VOUTPCH

12

NB671FBPCH

PC192

0.1U/25V_4

PR169

*0_6/S

PR167

16.2K/F_4

PR85

12K/F_4

NB671BSTPCH_SNB671BSTPCH

+VIN_1.05V +VIN

PC181

PC180

4.7U/25V_8

PC196

0.1U/25V_4

PL17 *0_8/S

PC185

2200P/50V_4

PL18

1uH/11A (PCMC063T-1R0MN)

PR164 *2.2_6

PC179 *2200P/50V_4

PC183

0.1U/25V_4

PR170 *0_2/S

+1.05V_S2

12

+

PC182

*330U/2.5V_6X4.5ESR12

+1.05V Volt +/- 5% Countinue current:4A Peak current:7.7A OCP minimum:9A

+1.05V

PC50

PC197

PC199

22U/6.3V_8

0.1U/10V_4

PJP5 *POWER_JP/S

1 2

PC54

22U/6.3V_8

PC52

PC51

PC53

*22U/6.3V_8

B B

PR108 *0_4/S

MAINON

MAINON[27,30,34,35,37]

A A

5

PR111 *0_4/S

+3VS5

PC85

0.1U/10V_4

PR112 *0_6/S

PU5

5

PG

1

EN

SY8002BABC

R2

4

PC83

4.7U/6.3V_6

4

3

8008LX1.5VHWPG

VIN

LX

2

GND

FB

6

8008VFB1.5V

PR110 10K/F_4

R1

PR109

15K/F_4

VO=(0.6(R1+R2)/R2)

+1.5V +/- 5% Countinue current:1.3A Peak current:1.5A OCP current:2A

+1.5V

PL3

1uH/2.6A_2520

PR113

*0_2/S

PC89

10U/6.3V_6

PC91

+VIN [20,31,32,33,35,36,37,38,39,40]

0.1U/10V_4

3

2

+3VS5 [6,9,10,11,22,25,28,31,33,37,39] +5VS5 [13,22,27,31,33,35,36,37,38,40] +5VPCU [13,33]

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

+1.05V (NB671)/1.5V

Date:

Wednesday, October 29, 2014

Sheet :

1

of

34 44

Rev.Size

2A

5

4

3

2

1

35

D D

+VIN [20,31,32,33,34,36,37,38,39,40] +5VS5 [13,22,27,31,33,36,37,38,40] +1.35VSUS [2,4,12,13,31]

1740VCC

PR192

2.2_6

+5VS5

PC220 1U/6.3V_4

+0.675V_DDR_VTT

+0.675V_DDR_VTT[12,13]

PD7 MEW316

HWPG[4,11,30,33,34]

C C

DDR_VR_PWRGD

MAINON[27,30,34,37]

51216S3[13]

2 1

PR115 0_4/P

PR196 0_4/P

PR193 *0_4

PR188

SUSON[30,37]

0_4/P

PC231 10U/6.3V_6

PC223 *0.1U/10V_4

PC222 *0.1U/10V_4

( 3mA )

DDR_VTTREF[12,13]

B B

1740VCC

1740PG

1740S3

1740S5

PC228

0.1U/10V_4

18 20

19 22

PR199 100/F_4

9

4

8

5

6

PU10

VCC

VTT VTTSNS

VTTGND VTTGND VTTGND

POK

S3

S5

7

UP1740S

VTTREF

1

PC230

0.1U/10V_4

PR116 499K/F_4

13

VIN

23

VIN

TON/NC

BOOT

PHASE PHASE

CS

PGND

GND

NC

FB

VDDQ

VTTIN

17

+1.35VSUS

PC232 *1U/6.3V_4

16

12 14

10

11 21

15 3 2

1740BST

1740PHASE

1740CS

1740FB

PC99

0.1U/25V_4

PR200

3.3_6

PC221

*0.01U/25V_4

PR191

6.81K/F_4

1740BST_S

RFC1 *10p/50V_4

PC229

0.1U/25V_4

1740VCC

PC227

4.7U/25V_8

PR186 *2.2_6

PC218 *2200P/50V_4

R2

+VIN_DDR

PC100

4.7U/25V_8

1uH/11A (PCMC063T-1R0MN)

PR198 10K/F_4

PC101 2200P/50V_4

PL20

PC226

*150P/25V_4

PR197

8.06K/F_4

R1

VO=(0.75(R1+R2)/R2)

PR114

PL6 *0_8/S

*0_2/S

1740FB_S

+VIN

PC104

0.1U/25V_4

PC204

0.1U/10V_4

+1.35VSUS_S

PC86

22U/6.3V_8

PC92

PC206

22U/6.3V_8

S3 S5

S0

S3 (mainon off)

S4/S5

1 0

1 1

ON ON ON OFF

ON ON

OFF OFF0 0

S3

1.35 Volt +/- 5% TDC : 3.55A PEAK : 4.73A OCP : 8A Width : 160mil

+1.35VSUS

+

PC210

PC84

*22U/6.3V_8

*220U/2V_7343

VTTREF+1.35VSUS

OFF

12

PJP1 *POWER_JP/S

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

+1.35VSUS (UP1740S)

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

1

35 44

Rev.Size

2A

of

5

4

3

Place close to inductor

2

1

36

PC36

*680P/50V_4

PR58 22.6K/F_4

PR62 15.4K/F_4

81101ILIM

81101IOUT

20

21

ILIM

IOUT

NCP81101MNTXG

ENABLE1VR_HOT#2SDIO3ALERT#

VR_HOT#

PC37

1500P/50V_4

CSCOMP

CSSUM

19

18

CSCOMP

PU3

SDIO

CSSUM

4

ALERT#

D D

PR57

18.7K/F_4

81101ROSC

81101COM

81101FB

81101DIFFOUT

81101VSN 81101VSP 81101VCC

PC35

1U/6.3V_4

PR61 *0_4

PC32

470P/50V_4

22 23 24 25 26 27 28

29

PR64 *0_4/S

PR67 *0_4/S PR68 *0_4/S PR71 *0_4/S PR72 *0_4/S PR75 *0_4/S

ROSC COMP FB DIFFOUT VSN VSP VCC

GND

PC28

PR55

49.9/F_4 330P/50V_4

PR56 1K/F_4

PC34

C C

VSS_SENSE[4]

VCC_SENSE[4]

+V1.05S_VCCST

B B

PR65

130/F_4

PR69 *75/F_4

PR50 *0_4/S

PR49 *0_4/S

PR73 *0_4/S

PR74

54.9/F_4

SDIO ALERT# SCLK

PC33

0.1U/10V_4

*2200P/50V_4 PR54 *0_4/S

PC30 1000P/50V_4

*1500P/50V_4

+V1.05S_VCCST

H_PROCHOT#[2,30]

VR_SVID_DATA[4]

VR_SVID_ALERT#[4]

VR_SVID_CLK[4]

IMVP_PWRGD[4,6]

PC29

PR51

*0_4/S

+5VS5

+3V

H_VR_ENABLE_MCP[4]

PC31

10P/50V_4

Ra

PR52

6.04K/F_4

Rb

PR53

2.2_6

VRON[30]

PR59 *75/F_4

H_PROCHOT#

IMVP_PWRGD

PR79 *10K/F_4

PR63

165K/F_4

PR66

64.9K/F_6

PC39

2.2U/6.3V_6

PC38 1000P/50V_4

PR70 100K/F_4

CSREF

17

16

IMAX

CSREF

SCLK

5

6

SCLK

VR_RDY

15

PVCC

VR_RDY

7

VBOOT

TSENSE

HG

PGND

BST

SW

LG

VRMP

81101VRMP

PC40

0.01U/50V_4

+5VS5

14 13 9 11 8 10 12

PR81

1K/F_4

PR60 75K/F_4

SWN

VBOOT TSENSE

81101_BST 81101_PH 81101_LG

12

PR166

220K_4 NTC

Boot Voltage Table

R_boot V_boot

30.1K 0V

49.9K 1.65V

69.8K 1.7V

PR76 69.8K/F_4

PC42 0.01U/25V_4 PR78 1_6

PC44

0.22U/25V_6

+VIN_VCC_CORE

81101_HG_G

81101_PH

81101_LG

1.75V90.9K

81101_HG_G81101_HG

PQ39 FDMS3669S

PQ7 *FDMS3669S

1

S1/D2

9

G2

8

+VIN_VCC_CORE

1

S1/D2

9

G2

8

2

D1D1G1

765

2

D1D1G1

765

TSENSE

PR80 *0_4/S

12

PR160

PR77

16.2K/F_4 100K/F_4 NTC

Place close to MOSFET

12

+

PC47

PC133

100U/25V

0.1U/25V_4

PC189

*22U/6.3V_8

PR84 10/F_4

POP for DIS

12

+

PC115

100U/25V

CSREF

SWN

12

+

PC27

PC98

*15U/25V

+VIN_VCC_CORE +VIN

PC177

D1

4.7U/25V_8

81101_PH

S2S2S2

D1

S2S2S2

PC175

4.7U/25V_8

PR83

4.7_6

PC48

1500P/50V_4

PC176

*4.7U/25V_8

PC174

PL16

0.36uH

PL15

*0_8/S

PC173

0.1U/25V_4 2200P/50V_4

+VCC_CORE

PC190

PR165 *0_2/S

PR161 *0_2/S

Icc_Max=32A I_TDC=14A I_Dynamic=27A V_Operate=1.6V~1.8V DC_LL=2m AC_LL=7m AC_LL_VOS=9.4m VBOOT=1.7V

+VCC_CORE

*22U/6.3V_8

PC191

PC188

PC186

*22U/6.3V_8

A A

5

4

3

2

PC187

*22U/6.3V_8

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

CPU Core (NCP81101) ULT

Date:

Wednesday, October 29, 2014

PC184

*22U/6.3V_8

PC195

*22U/6.3V_8

Sheet :

1

of

36 44

Rev.Size

2A

5

4

3

2

1

+VAD

PR107 22_6

PC71

G5934VIN

20

VIN

DRIVER4

12

SUSD

PC70 2200P/50V_4

0.1U/25V_4

G5934CN

19

DRIVER3

11

CN

12

PU4

G5934RZ1U

+3V_AON

PC74

PC73

G5934CP

G5934VOUT

0.47U/25V_6

1U/35V_6

17

VOUT

DRIVER1

9

LAN_ON

PC68 2200P/50V_4

DCAP

16

D_CAP

DRIVER2

10

PQ18

EMB32N03K

3

PG

VSENSE

REG

DISC3

DISC2

21

PC56 2200P/50V_4

+3VS5

GND

MAIND

15

14

+12VALW

13

7

6

65241

PC67

*10U/6.3V_6

MPHY_PWREN[9]

G5934PG

G5934VSENSE

PC57 1U/16V_4

G5934DISC3

G5934DISC2

PC82

0.1U/10V_4

18

CP

DISC4

8

G5934DISC4

PR94 *0_4/S

PR105 *0_4

PR95 *0_4/S

PR96 *0_4/S

PQ20

RQ3E070BNFU7TB

0.67A

+3VLANVCC

PC63

0.1U/10V_4

ACIN [30,32]

35241

2

PQ41 BSS138W

+VAD

+5VS5

678

PC80

PR103 *750K/F_4

PR102 *100K/F_4

*10U/6.3V_6

1 3

+3VSUS

PC87

0.1U/10V_4

+VIN

PR173 1M_4

PR174

1M_4

5.1A

+5V

PC79

0.1U/10V_4

1.05VMOD_ONG

+1.05V_MODPHY

3

2

1

PR172 *22_8

PQ43 *2N7002K

RQ3E070BNFU7TB

+12VALW

3

2

1

PQ17

2

PQ9 2N7002K

PR171

LQ3E070BNFU7TB

1M_4

1.05VMOD_OND

PQ42 2N7002K

PQ40

+3VS5

678

PC78

0.1U/10V_4

+3V

*10U/6.3V_6

2

35241

678

PR93 22_8

3

PQ10 2N7002K

1

PC200

0.1U/10V_4

5.2A

PC62

0.1U/10V_4

PC201

0.1U/10V_4

1.84A

+1.05V_MODPHY

PC203

PL19

*80/5A

*10U/6.3V_6

35241

PC65

+VIN

PR87 1M_4

3

PR86 1M_4

1

+1.05V

PC198

0.01U/25V_4

for +1.05V_MODPHY timing (64us)

D D

LAN_POWER[30]

PC75 2200P/50V_4

0.04A

+3VSUS

MAINON

PR104 *0_4/S

PR101 0_4

PR100 *0_4/S

PC69

0.1U/10V_4

MAINON[27,30,34,35]

SUSON[30,35]

DGPU_PWR_EN[8,17]

+3VLANVCC +5V

C C

Rc

PR91 *0_6

Support GC6 2.0 (Default)

No Support GC6

B B

A A

Stuff Ra / Rb (Page-37,39)

Un-stuff Ra (Page-39)

+3V_AON

Rb

PR92 0_6

Un-stuff Rc (Page-37)

Stuff Rb / Rc (Page-37)

0.1U/10V_4

+3V_AON_S2+3V_GFX

PC59

+3VS5

65241

PC77

3

PQ15 EMB32N03K

0.5A

PC58

0.1U/10V_4

*10U/6.3V_6

PC81

0.1U/10V_4

G5934DISC1

3V_AOND

+3VS5

65241

PC72

0.1U/25V_4

1

2

3

4

5

3

PQ19 EMB32N03K

PC66

*10U/6.3V_6

ON1

ON2

ON3

ON4

DISC1

37

+1.05V

PC202

0.1U/10V_4

+3V[6,7,8,9,10,11,12,13,14,16,17,19,20,21,22,23,24,25,26,28,29,30,31,36,38] +5V[6,20,21,22,25,28,29,31]

+VIN[20,31,32,33,34,35,36,38,39,40] +3VS5[6,9,10,11,22,25,28,31,33,34,39] +5VS5[13,22,27,31,33,35,36,38,40]

+12VALW[28,39]

+3VLANVCC[23,27]

+0.675V_DDR_VTT[12,13,35]

5

4

3

2

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

Dis-charge IC (SLG55448)

Date:

Wednesday, October 29, 2014

Rev.Size

2A

Sheet :

37 44

1

37 44

2A

of

VGA Core

5

4

3

2

1

38

PU6 RT8813C

D D

+5VS5

+VIN_VGACORE

DGPU_VC_EN[17,39]

+3V_MAIN_EN[17,39]

C C

B B

A A

5

PR144

for VGA sequence

PSI[17]

GPU_VID[17]

PC162

2700P/50V_4

PR153 *0_4/P

1_6

PC159

1U/25V_6

+3V

PR158 47K/F_4

PR157 *0_4/S

PR156 *0_4/S

8813VREF

PR148

1 2

10K/F_4 NTC

PR143

*0_6/S

PR135

10K/F_4

PD10

RB501V-40

PR149 20K/F_4

PR151 2K/F_4

PR152 18K/F_4

PR154 *0_4/S

PR134

324/F_4

PR133 *0_4/S

PR145

499K/F_4

21

PC165

*2200P/50V_4

PR155

20K/F_4

8813PVCC

PC158

2.2U/10V_6

8813TON

8813EN

8813PSI

8813VID

8813VREF

PC160

0.1U/10V_4

8813REFADJ

8813REFIN

PC163 *0.01U/25V_4

8813ISEN3

PC143

100P/50V_4

21

9

16

3

4

5

8

6

7

13

PVCC

TON

PGOOD

EN

PSI

VID

VREF

REFADJ

REFIN

TSNS/ISEN3

UGATE1

BOOT1

PHASE1

LGATE1

VCC/ISEN1

UGATE2

BOOT2

PHASE2

LGATE2

TALERT/ISEN2

VSNS

RGND

GND/PWM3

GND

4

2

1

24

23

15

17

18

19

20

14

11

10

12

SS

22

25

PR159

8813UGATE1

1_6

PC164

8813BOOT1

0.22U/25V_6

8813PHASE1

8813LGAT1

8813ISEN1

PR136

8813UGATE2

1_6

PC146

8813BOOT2

0.22U/25V_6

8813PHASE2

8813LGAT2

PR129 *0_4/P

8813ISEN2

PR132 *0_4/S

8813VOUT1

PC150

56P/50V_4

PC156

56P/50V_4 PC148

8813SS

56P/50V_4

PR147

8813PWM3

*0_4/S

8813UGATE1_1

PR130 10_4/P

PC142

0.22U/10V_4

8813UGATE2_1

DGPU_PROCHOT_EC# [17,30]

PR128 30K/F_4

DGPU_PROCHOT# [30]

PC147

PC157

PC169

PC132

PC166

4.7U/25V_8

+VIN_VGACORE

PC135

PC161

4.7U/25V_8

2

PC136

*4.7U/25V_8

PL14

0.36uH

PC141

0.1U/25V_4

PL11

0.36uH

5

D

G

4

G

4

PQ37

TPCA8A10-H

+5VS5

+3V

PR150

14.7K/F_4

TPCA8A10-H

PC149 *100P/50V_4

4

PQ26

3

G

PR142 *0_4/S

213

5

213

5

213

5

213

S

D

S

D

S

D

S

8813UGATE1_1

PQ38 TPCA8064-H

8813UGATE2_1

PQ28 TPCA8064-H

PR139*0_6/S

4

PQ6

*TPCA8A10-H

4

PQ25

*TPCA8A10-H

PR137

100/F_4

PR141

100/F_4

5

G

213

5

G

213

5

G

213

5

G

213

D

S

PQ36 *TPCA8064-H

PR82

2.2_6

D

S

PC43 2200P/50V_4

D

S

PQ24 *TPCA8064-H

PR119

2.2_6

D

S

PC120 2200P/50V_4

+VGACORE

VGPU_CORE_SENSE [14] VSS_GPU_SENSE [14]

PC144

PC117

0.1U/25V_4

2200P/50V_4

Custom

Date:

12

PC118

2200P/50V_4

+

PC41

*330U_2V_7343

Wednesday, October 29, 2014

+VIN+VIN_VGACORE

PL12 *0_8/S

12

PC138

0.1U/25V_4

N14P-GS

Countinue current: 35A

Peak current: 55A

OCP minimum 66A

+VGACORE

12

+

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

Document Number

+VGACORE (RT8813A)

PC178

PC152

330U/2.5V_6X4.5ESR12

PROJECT : TWB & JWV ( MB )

12

+

PC172

Sheet :

1

330U/2.5V_6X4.5ESR12

PC171

*330U/2.5V_6X4.5ESR12

of

38 44

Rev.Size

2A

1

2

3

4

5

6

7

8

39

A A

+3V_GFX +VGACORE

+VIN

Ra

PR90 1M_4

2

PQ29 LTC044

PR89 1M_4

1 3

+3V_MAIN_EN[17,38,39]

B B

C C

+3V_MAIN_EN[17,38,39]

DGPU_VC_EN[17,38]

PR88

0_4

*1U/16V_4

2

PR125

*0_4/P

PC134

0.1U/10V_4

PQ11 LTC044

PC55

PR124 10K/F_4

1 2

PR97 22_8

3

PQ14 2N7002K

2

1

3VGFX_ONG

Support GC6 2.0 (Default)

No Support GC6

+1.05V_GFX

+VIN

3

PR123 1M_4

2

PR131

1

1M_4

2

PR126 22_8

PQ33 2N7002K

Stuff Ra / Rb (Page-37,39)

Un-stuff Ra (Page-39)

+12VALW

PR98 *22_8

3

PQ12 *2N7002K

2

1

+12VALW

PR127 1M_4

1.05VGFX_OND

3

2

PQ31 2N7002K

1

for VGA sequence

PR99

PQ16

1M_4

EMB32N03K

3VGFX_OND

3

PQ13 2N7002K

1

3

PC64 180P/50V_4

for VGA sequence

Un-stuff Rc (Page-37)

Stuff Rb / Rc (Page-37)

+1.05V

PQ8

5

MDU1512RH

PC137 1000P/50V_4

D

G

4

S

213

PC45

*10U/6.3V_6

+3VS5

65241

PC61

0.1U/10V_4

PC49

0.1U/10V_4

PC76

0.1U/10V_4

1A

3A

+1.05V_GFX

+3V_GFX_S2 +3V_GFX

PR106 0_6

PC60

*10U/6.3V_6

PC46

0.1U/10V_4

D D

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

1.05V_VGA/3V_VGA

Date:

Wednesday, October 29, 2014

1

2

3

4

5

6

Wednesday, October 29, 2014

7

Sheet :

39 44

8

Rev.Size

2A

of

5

4

3

2

1

40

D D

DGPU_PWROK[9,16,30] DGPU_FB_EN[17]

C C

B B

DGPU_FB_EN

+5VS5

PR46 *0_4/S

PR45 43K/F_4

RT8238EN1.1V

PR38

10_6

PR47

127K/F_4

RT8238HWPG_S2A1.1V

PC26

0.1U/10V_4

PC151

PC25

RT8238ILIM1.1V

RT8238EN1.1V

+5VS5

3

2

PQ34 2N7002K

1

PR48

360K/F_4

RT8238VCC1.1V

CS

PGOOD EN

PAD

*0_4/S

+VIN

5

VCC

RT8228A

GND12FB

MODE

7

PR138 1M_4

PR140 1M_4

RT8238TON1.1V

11

PU2

3

RT8238DH1.1V

UGATE

TON

4

RT8238BST_1_1.1V

BOOST

2

RT8238LX1.1V

PHASE

1

RT8238DL1.1V

LGATE

6

Vo=0.5(R1+R2)/R2

PC24

RT8238FB1.1V

*100P/50V_4

PR35

20K/F_4

PR40 10K/F_4

+1.5V_GFX

PR146 22_8

3

2

PQ35 2N7002K

1

PR39

2_6

1U/6.3V_4

10

9 8

13

PR44

PQ32

RQ3E070BNFU7TB

PC23

RT8238BST1.1V

0.1U/25V_4

MDV1595SURH

PQ30

RDSon=13m ohm

35241

PC153

678

0.1U/25V_4

678

PR122 *2.2_6

PC140 *2200P/50V_4

+VIN_1.5VGA +VIN

PC155

PC145

4.7U/25V_8

1uH/11A (PCMC063T-1R0MN)

PL10

PC154

2200P/50V_4

PL13 *0_8/S

PC139

0.1U/25V_4

+1.5VGFX_S2

PR121

PC130

*0_2/S

+1.5V Volt +/- 5% Countinue current:6A Peak current:8A OCP minimum:12A

+1.5V_GFX

12

+

0.1U/10V_4

PC131

330U/2.5V_6X4.5ESR12

PC128

*22U/6.3V_8

PJP4 *POWER_JP/S

1 2

PC127

*22U/6.3V_8

*0.47U/6.3V_4

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

Custom

+1.5V_VGA(RT8228)

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

1

40 44

Rev.Size

2A

of

1

2

3

4

5

6

7

8

41

Port AssignmentUSB3.0

Power control pin

Port AssignmentSATA Master

Power control pin

PORT1

A A

PORT2

PORT3

PORT4

USB2.0

PORT0

PORT1

B B

PORT2

PORT3

PORT4

PORT5

PORT6

PORT7

USB2.0/USB3.0 COMBO 1st

USB2.0/USB3.0 COMBO 2nd

NC

Port Assignment

USB2.0/USB3.0 COMBO 1st

USB2.0/USB3.0 COMBO 2nd

Camera

NC

Left side USB daughter B

WLAN

Touch Screen 15" used

USBPW_ON#(from EC)

N/A

Power control pin

USBPW_ON#(from EC)

N/A

USBPW_ON#(from EC)

N/A

TS_ON(from EC)

SATA0

SATA1

SATA2

SATA3/PCIE

PCIE 5_L0

PCIE 5_L1

PCIE 5_L2

PCIE 5_L3

PCIE 1

PCIE 2

PCIE 3

PCIE 4

HDD

mSATA

NC

Card reader

Port AssignmentPCIE

PEG0

PEG1

PEG2

PEG3

NC

WLAN

LAN

N/A

Control pin

C C

D D

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

Port Assignment

Date:

Wednesday, October 29, 2014

1

2

3

4

5

6

Wednesday, October 29, 2014

7

Sheet :

41 44

8

Rev.Size

2A

of

1

2

+3V_DEEP_SUS

3

4

+3VSUS

+3V

5

6

7

8

+3V

42

AP2

SMB_PCH_CLK

AH1

SMB_PCH_DAT

2.2K2.2K

+3VSUS

2N7002KDW

TP_SMB_CLK TP_SMB_DATA

2N7002KDW

A A

Haswell ULT

+3V_DEEP_SUS

+3VSUS

+3V

2N7002DW

2.2K2.2K

*4.7K

4.7K

TP_SMB_CLK TP_SMB_DATA

1 2

53 51

Touch Pad

XDP

+3V

DDR3L DIMM

9

RTD2132R-CG

10

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

2.2K2.2K

+3V

*2N7002DW

+3V

MBCLK2 MBDATA2

*0Ω

0Ω

CSCL1 CSDA1

0Ω*0Ω

+3V

B B

79

MBCLK2

80

MBDATA2

77

MBCLK

78 MBDATA

4.7K 4.7K

+3VPCU

4.7K 4.7K

330

*short

BQCLK BQDATA

SMC SMD

8

CPU heat pipe local thermal sensor (*G781-1P8)

7

8

DDR thermal sensor (*EMC1412-1-ACZL-TR)

7

4 3

Battery

9 8

Charger

*short+3V

C C

EC

KB9010QF

83

GPUT_CLK

84

GPUT_DATA

4.7K 4.7K

D9

GPU internal thermal sensor (I2C)

D8

+G_SEN_PW

MBCLK3

85

MBDATA3

86

4.7K 4.7K

4

G-sensor (AL003DC2A00)

6

+3VSUS

TPCLK

87

D D

88

TPDATA

4.7K 4.7K

BLM18BA470SN1D

TPCLK-1 TPDATA-1

5 4

Touch Pad

BLM18BA470SN1D

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

SMBUS

Date:

Wednesday, October 29, 2014

1

2

3

4

5

6

Wednesday, October 29, 2014

7

Sheet :

42 44

8

Rev.Size

2A

of

5

4

3

2

1

43

TWB+JWV SYSTEM POWER BLOCK DIAGRAM

D D

DC Jack CN32

CHARGER PU16 BQ24738

S.W MOS-FET PQ70, PQ72

S.W MOS-FET PQ78

VIN

SY8208B

C C

PU13

+3VPCU

EC, RESET, ALS/Hall IC, CPU

+3VS5

S5_ON

B B

Power IC, Pull High.

G5934RZ1U PU6 (OUT-3)

SUSON

G5934RZ1U PU6 (OUT-2)

MAINON

TPS22930 PU8

MAINON

TPS22930 PQ61

+3V_MAIN_EN

G5934RZ1U PU6 (OUT-4)

DGPU_PWR_EN

G5934RZ1U PU6 (OUT-1)

LAN_POWER

+3V_SUS

CAM, LVDS converter

+3V

CAM, LVDS converter

+1.5V

CPU

+3V_GFX

WLAN

+3V_AON

HMC, Audio

+3VLANVCC

Audio, Thermal, ALS/B, USB/B

+BATCHG

BATTERY

NCP81101MNTXG PU7

VRON

UP1740S PU15

MAINON SUSON

RT8813C PU3

+3V_MAIN_EN

RT8228A PU12

DGPU_FB_EN

NB671 PU5

MAINON

SY8208C PU14

+VCC_CORE

+1.35VSUS

RAM, CPU

+0.65V_DRR_VTT

+VGACORE

CPU

+1.5V_GFX

CPU

+1.05V

CPU

MPHY_PWREN

+3V_MAIN_EN

+5VPCU

EC, RESET, ALS/Hall IC, CPU

LQ3E070BNFU7TB PQ42

MDU1512RH PQ38

+1.05DX_MODPHY

CPU

+1.05V_GFX

CPU

+5VS5

S5_ON

A A

Power IC, Pull High.

G5934RZ1U PU6 (OUT-2)

MAINON

+5V

CAM, LVDS converter

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

D

POWER_Power Diagram

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

1

Sheet :

of

43 44

Rev.Size

2A

5

+3VS5

+3VLANVCC

+3VS5

+3V

16

S5 PWR MOS SW

+5VS5

D D

S5 PWR MOS SW

+3VS5

S5 PWR MOS SW

+VIN

1.5V

C C

VR

+VIN

1.35V VR

+VIN

1.05V VR

+3VS5

B B

LDO

PG

LAN_POWER

+5V

MAINON

+3VSUS

SUS_ON

+1.5V_GFX

DGPU_VC_EN

DGPU_PWROK

+1.35VSUS

SUS_ON

HWPG

+1.05V

MAINON

HWPG

+1.5V

MAINON

HWPG

10

17

11

15

9

17

11

17

11

+3VS5

+1.05V

21

15

14

25

S5 PWR MOS SW

S0 PWR MOS SW

MAINON

+3V_GFX

DGPU_PWR_EN

+1.05V_GFX

DGPU_VC_EN

4

17

SUS_ON

MAINON

VRON

LAN_POWER

3

BTN

3

LATCH (NBSWON1#)

9 11 12

10

EC

11

19

13

22

14

25

DGPU_PWROK

HWPG

D1/GPXD1

GPIO7

GPIO55

23

EC_PWROK

26

4

6

3

+3VPCU

+5VPUC

HWPG

23

S5_ON

DNBSWON#

+VIN

3V/5VPWR

VR

IMVP_PWRGD

EC_PWROK

0Ω

+3VS5

+5VS5

*TC7SH08FU

7 8

13

25

12

CHARGER

SUSC# SUSB#

DGPU_PWR_EN

DGPU_PWROK

PLTRST#

27

2

+VIN+PWR_SRC

1

44

Battery

5

VCCDSW3_3 PWRBTN# SLP_S4# SLP_S3# GPIO54

GPIO17

PCH

PLTRST#

SYS_PWROK

PCH_PWROK

APWROK

CPU

+VIN

+3V

VR

PG

EN

DGPU_PWR_EN

20

+VGACORE

14

DGPU_VC_EN

13

+VIN

IMVP VR

18

+VCC_CORE

24

IMVP_PWRGD

PG

EN

VRON

12

A A

Quanta Computer Inc.

Quanta Computer Inc.Quanta Computer Inc.

PROJECT : TWB & JWV ( MB )

Document Number

C

POWER UP SEQUENCE

Date:

Wednesday, October 29, 2014

5

4

3

2

Wednesday, October 29, 2014

Sheet :

44 44

1

44 44

Rev.Size

2A

of

QUANTA TWB, JWV Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual