Quanta JWM Schematic

5

www.schematic-x.blogspot.com

4

3

2

1

JWM UMA(14")

D D

C C

B B

EC SPI ROM 128KB

G-Sensor

HP3DC2TR

Keyboard

Touch Pad

TCP-15G24

A A

Intel Bay Trail-M Platform Block Diagram

Up to 1333MT/s

DDR3L SODIMM1 Maxima 8GBs

DDR3L SODIMM2 Maxima 8GBs

SATA - 1st HDD Package : 9.5 (mm) Power :

SATA ODD Package : (mm) Power :

System BIOS SPI ROM

PAGE 24

PAGE 22

PAGE 20

PAGE 23 FAN

5

PAGE 11

PAGE 12

PAGE 6

SM BUS

DDR3L

SATA0 3GB/s

PAGE 19

SATA1 3GB/s

PAGE 18

SPI Interface

Embedded Controller

EnE KB3940Q A1

Power :

Package : LQPF128

Size : 14 x 14 (mm)

PAGE 19

PAGE 24

Intel Bay Trail-M

Power : 4.5 Watt

Package : FCBG 1170

Size : 25 x 27 (mm)

Int

Audio Codec

ALC269Q-VC3-GR

Power :

Package : MQFN

Size : 6 x 6 (mm)

4

PAGE 2~10

Azalia

PAGE 16

Speaker

Combo Jack iPHONE type

Digital MIC

DDI1

DDI0

Green CLK

32.768KHz PAGE 22

USB3.0 Interface

USB2.0 Interface

USB2.0 Port x 1 (Right side)

Port1

PCIE Gen 1 x 1 LaneLPC Interface

LAN Controller

10/100 RTL8106E-CG

Power : Package : OFN48

Size : 6 x 6 (mm)

PAGE 17

PAGE 16

Option

eDP to LVDS converter LVDS Panel RTD2132R PAGE 14

USB 3.0 Port 1(USB 2.0 Port 0)

Touch Screen

Port3

PAGE 16

Halt Mini Card

Intel Rambo Peak

WLAN / BT Combo

PAGE 22

3

PAGE 22

Card Reader

RTS5170-GRT

Power :

Package : QFN-32

Size : 4 x 4 (mm)

eDPX1

LVDSX1

USB Hub

Port2

PAGE 21

PAGE 18

eDP Panel

PAGE 15

HDMI Conn

PAGE 15

USB3.0 Port x 1

PAGE 20

USB2.0 Port x 1 (Left side)

PAGE 20

Camera

PAGE 15

2

PCB 6L STACK UP

LAYER 1 : TOP LAYER 2 : SGND LAYER 3 : IN1(High) LAYER 4 : IN2(Low) LAYER 5 : SVCC LAYER 6 : BOT

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev Custom

Custom

Block Diagram

Date: Sheet

Date: Sheet of

1

1 39Tuesday, August 20, 2013

of

1A

01

5

M_A_A[15:0][11]

D D

M_A_DM0[11] M_A_DM1[11] M_A_DM2[11] M_A_DM3[11] M_A_DM4[11] M_A_DM5[11] M_A_DM6[11] M_A_DM7[11]

M_A_RAS#[11] M_A_CAS#[11] M_A_WE#[11]

M_A_BS#0[11] M_A_BS#1[11] M_A_BS#2[11]

M_A_CS#0[11] M_A_CS#1[11]

C C

+1.35VSUS

R148

4.7K_4

R147

4.7K_4

B B

A A

GND GND

Note: PLACE TWO 4.7K RESISTORS CLOSE TO CPU PINS ON M_VREF

SLP_S4#[6,13]

C165

0.1U/10V_4

SLP_S4#

5

2

+3VS5

R157

4.7K_4

DRM_PWOK_C1

61

Q10B PJ4N3KDW

GND

R156 10K_4

+1.35VSUS

5

GND

34

M_A_CKE0[11] M_A_CKE1[11]

M_A_ODT0[11] M_A_ODT1[11]

M_A_CLKP0[11] M_A_CLKN0[11]

M_A_CLKP1[11] M_A_CLKN1[11]

M_A_DRAMRST#[11]

R144 100K/F_4 R146 100K/F_4

R150 23.2/F_4 R145 29.4/F_4 R149 162/F_4

DRM_PG SOC_DRAM_PWROK

Q10A

PJ4N3KDW

R153 0_4

4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_RAS# M_A_CAS# M_A_WE#

M_A_BS#0 M_A_BS#1 M_A_BS#2

M_A_CS#0 M_A_CS#1

M_A_CKE0 M_A_CKE1

M_A_CLKP0 M_A_CLKN0

M_A_CLKP1 M_A_CLKN1

M_A_DRAMRST#CPU_VREF

CPU_VREF

ICLK_DRAM_TERMN_0 ICLK_DRAM_TERMN_1

SOC_DRAM_PWROK SOC_VCCA_PWROK

DRAM_RCOMP0 DRAM_RCOMP1 DRAM_RCOMP2

C168 *0.1U/10V_4

GND

DRM_PG [28]

4

U15A

K45

DRAM0_MA_00

H47

DRAM0_MA_11

L41

DRAM0_MA_22

H44

DRAM0_MA_33

H50

DRAM0_MA_44

G53

DRAM0_MA_55

H49

DRAM0_MA_66

D50

DRAM0_MA_77

G52

DRAM0_MA_88

E52

DRAM0_MA_99

K48

DRAM0_MA_1010

E51

DRAM0_MA_1111

F47

DRAM0_MA_1212

J51

DRAM0_MA_1313

B49

DRAM0_MA_1414

B50

DRAM0_MA_1515

G36

DRAM0_DM_00

B36

DRAM0_DM_11

F38

DRAM0_DM_22

B42

DRAM0_DM_33

P51

DRAM0_DM_44

V42

DRAM0_DM_55

Y50

DRAM0_DM_66

Y52

DRAM0_DM_77

M45

DRAM0_RAS

M44

DRAM0_CAS

H51

DRAM0_WE

K47

DRAM0_BS_00

K44

DRAM0_BS_11

D52

DRAM0_BS_22

P44

DRAM0_CS_0

P45

DRAM0_CS_2

C47

DRAM0_CKE_00

D48

RESERVED_D48

F44

DRAM0_CKE_22

E46

RESERVED_E46

T41

DRAM0_ODT_0

P42

DRAM0_ODT_2

M50

DRAM0_CKP_0

M48

DRAM0_CKN_0

P50

DRAM0_CKP_2

P48

DRAM0_CKN_2

P41

DRAM0_DRAMRST

AF44

DRAM_VREF

AH42

ICLK_DRAM_TERMN

AF42

ICLK_DRAM_TERMN_AF42

AD42

DRAM_VDD_S4_PWROK

AB42

DRAM_CORE_PWROK

AD44

DRAM_RCOMP_00

AF45

DRAM_RCOMP_11

AD45

DRAM_RCOMP_22

AF40

RESERVED_AF40

AF41

RESERVED_AF41

AD40

RESERVED_AD40

AD41

RESERVED_AD41

VLV_M_D/BGA

REV = 1.15

0624 @ALF: Changed to QCI P/N for JWM

3

C174 *0.1U/10V_4

GND

M_A_DQ[63:0] [11]

M_A_DQSP0 [11] M_A_DQSN0 [11] M_A_DQSP1 [11] M_A_DQSN1 [11] M_A_DQSP2 [11] M_A_DQSN2 [11] M_A_DQSP3 [11] M_A_DQSN3 [11] M_A_DQSP4 [11] M_A_DQSN4 [11] M_A_DQSP5 [11] M_A_DQSN5 [11] M_A_DQSP6 [11] M_A_DQSN6 [11] M_A_DQSP7 [11] M_A_DQSN7 [11]

? VLV_M_D

DRAM0_DQ_00 DRAM0_DQ_11 DRAM0_DQ_22 DRAM0_DQ_33 DRAM0_DQ_44 DRAM0_DQ_55 DRAM0_DQ_66 DRAM0_DQ_77 DRAM0_DQ_88

DRAM0_DQ09_C32

DRAM0_DQ_1010 DRAM0_DQ_1111 DRAM0_DQ_1212 DRAM0_DQ_1313 DRAM0_DQ_1414 DRAM0_DQ_1515 DRAM0_DQ_1616 DRAM0_DQ_1717 DRAM0_DQ_1818 DRAM0_DQ_1919 DRAM0_DQ_2020 DRAM0_DQ_2121 DRAM0_DQ_2222 DRAM0_DQ_2323 DRAM0_DQ_2424 DRAM0_DQ_2525 DRAM0_DQ_2626 DRAM0_DQ_2727 DRAM0_DQ_2828 DRAM0_DQ_2929 DRAM0_DQ_3030 DRAM0_DQ_3131 DRAM0_DQ_3232 DRAM0_DQ_3333 DRAM0_DQ_3434 DRAM0_DQ_3535 DRAM0_DQ_3636 DRAM0_DQ_3737 DRAM0_DQ_3838 DRAM0_DQ_3939 DRAM0_DQ_4040 DRAM0_DQ_4141 DRAM0_DQ_4242 DRAM0_DQ_4343 DRAM0_DQ_4444 DRAM0_DQ_4545 DRAM0_DQ_4646 DRAM0_DQ_4747 DRAM0_DQ_4848 DRAM0_DQ_4949 DRAM0_DQ_5050 DRAM0_DQ_5151 DRAM0_DQ_5252 DRAM0_DQ_5353 DRAM0_DQ_5454 DRAM0_DQ_5555 DRAM0_DQ_5656 DRAM0_DQ_5757 DRAM0_DQ_5858 DRAM0_DQ_5959 DRAM0_DQ_6060 DRAM0_DQ_6161 DRAM0_DQ_6262 DRAM0_DQ_6363

DRAM0_DQSP_00 DRAM0_DQSN_00 DRAM0_DQSP_11 DRAM0_DQSN_11 DRAM0_DQSP_22 DRAM0_DQSN_22 DRAM0_DQSP_33 DRAM0_DQSN_33 DRAM0_DQSP_44 DRAM0_DQSN_44 DRAM0_DQSP_55 DRAM0_DQSN_55 DRAM0_DQSP_66 DRAM0_DQSN_66 DRAM0_DQSP_77 DRAM0_DQSN_77

1 OF 13

ph

+3VS5

R160

4.7K_4

DRM_PWOK_C2

61

2

EC_PWROK[13,24]

EC_PWROK

3

GND

Q12B

PJ4N3KDW

R161 10K_4

?

+1.35VSUS

5

M36 J36 P40 M40 P36 N36 K40 K42 B32 C32 C36 A37 C33 A33 C37 B38 F36 G38 F42 J42 G40 C38 G44 D42 A41 C41 A45 B46 C40 B40 B48 B47 K52 K51 T52 T51 L51 L53 R51 R53 T47 T45 Y40 V41 T48 T50 Y42 AB40 V45 V47 AD48 AD50 V48 V50 AB44 Y45 V52 W51 AC53 AC51 W53 Y51 AD52 AD51

J38 K38 C35 B34 D40 F40 B44 C43 N53 M52 T42 T44 Y47 Y48 AB52 AA51

34

PJ4N3KDW

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7

Q12A

SOC_VCCA_PWROK

2

1

2

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

2

Valley 1/9 (DDRA)

Date: Sheet of

Date: Sheet

1

2 39Tuesday, August 20, 2013

1A

of

5

4

3

2

1

? VLV_M_D

2 OF 13

DRAM1_DQ_00 DRAM1_DQ_11 DRAM1_DQ_22 DRAM1_DQ_33 DRAM1_DQ_44 DRAM1_DQ_55 DRAM1_DQ_66 DRAM1_DQ_77 DRAM1_DQ_88

DRAM1_DQ_99 DRAM1_DQ_1010 DRAM1_DQ_1111 DRAM1_DQ_1212 DRAM1_DQ_1313 DRAM1_DQ_1414 DRAM1_DQ_1515 DRAM1_DQ_1616 DRAM1_DQ_1717 DRAM1_DQ_1818 DRAM1_DQ_1919 DRAM1_DQ_2020 DRAM1_DQ_2121 DRAM1_DQ_2222 DRAM1_DQ_2323 DRAM1_DQ_2424 DRAM1_DQ_2525 DRAM1_DQ_2626 DRAM1_DQ_2727 DRAM1_DQ_2828 DRAM1_DQ_2929 DRAM1_DQ_3030 DRAM1_DQ_3131 DRAM1_DQ_3232 DRAM1_DQ_3333 DRAM1_DQ_3434 DRAM1_DQ_3535 DRAM1_DQ_3636 DRAM1_DQ_3737 DRAM1_DQ_3838 DRAM1_DQ_3939 DRAM1_DQ_4040 DRAM1_DQ_4141 DRAM1_DQ_4242 DRAM1_DQ_4343 DRAM1_DQ_4444 DRAM1_DQ_4545 DRAM1_DQ_4646 DRAM1_DQ_4747 DRAM1_DQ_4848 DRAM1_DQ_4949 DRAM1_DQ_5050 DRAM1_DQ_5151 DRAM1_DQ_5252 DRAM1_DQ_5353 DRAM1_DQ_5454 DRAM1_DQ_5555 DRAM1_DQ_5656 DRAM1_DQ_5757 DRAM1_DQ_5858 DRAM1_DQ_5959 DRAM1_DQ_6060 DRAM1_DQ_6161 DRAM1_DQ_6262 DRAM1_DQ_6363

DRAM1_DQSP_00 DRAM1_DQSN_00 DRAM1_DQSP_11 DRAM1_DQSN_11 DRAM1_DQSP_22 DRAM1_DQSN_22 DRAM1_DQSP_33 DRAM1_DQSN_33 DRAM1_DQSP_44 DRAM1_DQSN_44 DRAM1_DQSP_55 DRAM1_DQSN_55 DRAM1_DQSP_66 DRAM1_DQSN_66 DRAM1_DQSP_77 DRAM1_DQSN_77

TOP

?REV = 1.15

BG38 BC40 BA42 BD42 BC38 BD36 BF42 BC44 BH32 BG32 BG36 BJ37 BG33 BJ33 BG37 BH38 AU36 AT36 AV40 AT40 BA36 AV36 AY42 AY40 BJ41 BG41 BJ45 BH46 BG40 BH40 BH48 BH47 AY52 AY51 AP52 AP51 AW51 AW53 AR51 AR53 AP47 AP45 AK40 AM41 AP48 AP50 AK42 AH40 AM45 AM47 AF48 AF50 AM48 AM50 AH44 AK45 AM52 AL51 AG53 AG51 AL53 AK51 AF52 AF51

BF40 BD40 BG35 BH34 BA38 AY38 BH44 BG43 AU53 AV52 AP42 AP44 AK47 AK48 AH52 AJ51

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7

M_B_A[15:0][12]

D D

M_B_DM0[12] M_B_DM1[12] M_B_DM2[12] M_B_DM3[12] M_B_DM4[12] M_B_DM5[12] M_B_DM6[12] M_B_DM7[12]

M_B_RAS#[12] M_B_CAS#[12] M_B_WE#[12]

M_B_BS#0[12] M_B_BS#1[12] M_B_BS#2[12]

C C

B B

M_B_CS#0[12] M_B_CS#1[12]

M_B_CKE0[12] M_B_CKE1[12]

M_B_ODT0[12] M_B_ODT1[12]

M_B_CLKP0[12] M_B_CLKN0[12]

M_B_CLKP1[12] M_B_CLKN1[12]

M_B_DRAMRST#[12]

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_RAS# M_B_CAS# M_B_WE#

M_B_BS#0 M_B_BS#1 M_B_BS#2

M_B_CS#0 M_B_CS#1

M_B_CKE0 M_B_CKE1

M_B_CLKP0 M_B_CLKN0

M_B_CLKP1 M_B_CLKN1

M_B_DRAMRST#

AY45 BB47

AW41

BB44 BB50

BC53

BB49 BF50

BC52

BE52 AY48 BE51

BD47

BA51 BH49 BH50

BD38 BH36 BC36 BH42

AT51 AM42

AK50

AK52

AV45

AV44

BB51

AY47

AY44

BF52

AT44

AT45

BG47

BE46

BD44

BF48

AP41

AT42

AV50

AV48

AT50

AT48

AT41

U15B

DRAM1_MA_00 DRAM1_MA_11 DRAM1_MA_22 DRAM1_MA_33 DRAM1_MA_44 DRAM1_MA_55 DRAM1_MA_66 DRAM1_MA_77 DRAM1_MA_88 DRAM1_MA_99 DRAM1_MA_1010 DRAM1_MA_1111 DRAM1_MA_1212 DRAM1_MA_1313 DRAM1_MA_1414 DRAM1_MA_1515

DRAM1_DM_00 DRAM1_DM_11 DRAM1_DM_22 DRAM1_DM_33 DRAM1_DM_44 DRAM1_DM_55 DRAM1_DM_66 DRAM1_DM_77

DRAM1_RAS DRAM1_CAS DRAM1_WE

DRAM1_BS_00 DRAM1_BS_11 DRAM1_BS_22

DRAM1_CS_0 DRAM1_CS_2

DRAM1_CKE_00 RESERVED_BE46 DRAM1_CKE_22 RESERVED_BF48

DRAM1_ODT_0 DRAM1_ODT_2

DRAM1_CKP_0 DRAM1_CKN_0

DRAM1_CKP_2 DRAM1_CKN_2

DRAM1_DRAMRST

VLV_M_D/BGA

M_B_DQ[63:0] [12]

M_B_DQSP0 [12] M_B_DQSN0 [12] M_B_DQSP1 [12] M_B_DQSN1 [12] M_B_DQSP2 [12] M_B_DQSN2 [12] M_B_DQSP3 [12] M_B_DQSN3 [12] M_B_DQSP4 [12] M_B_DQSN4 [12] M_B_DQSP5 [12] M_B_DQSN5 [12] M_B_DQSP6 [12] M_B_DQSN6 [12] M_B_DQSP7 [12] M_B_DQSN7 [12]

3

A A

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

5

4

3

2

Valley 2/9 (DDRB)

Date: Sheet of

Date: Sheet

1

3 39Tuesday, August 20, 2013

1A

of

5

4

3

2

1

U15C

AK13

AK12 AM14 AM13

AB14

AV3 AV2 AT2 AT3 AR3 AR1 AP3 AP2

AL3 AL1

D27 C26

C28 B28

C27 B26

AM3 AM2

T2

T3 AB3 AB2

Y3

Y2

W3 W1

V2

V3

R3

R1 AD6 AD4 AB9 AB7

Y4

Y6

V4

V6 A29 C29

B30 C30

DDI0_TXP_0 DDI0_TXN_0 DDI0_TXP_1 DDI0_TXN_1 DDI0_TXP_2 DDI0_TXN_2 DDI0_TXP_3 DDI0_TXN_3

DDI0_AUXP DDI0_AUXN

DDI0_HPD DDI0_DDCDATA

DDI0_DDCCLK DDI0_VDDEN

DDI0_BKLTEN DDI0_BKLTCTL

DDI0_RCOMP DDI0_RCOMP_P RESERVED_AM14 RESERVED_AM13 VSS_AM3 VSS_AM2

RESERVED_T2 RESERVED_T3 RESERVED_AB3 RESERVED_AB2 RESERVED_Y3 RESERVED_Y2 RESERVED_W3 RESERVED_W1 RESERVED_V2 RESERVED_V3 RESERVED_R3 RESERVED_R1 RESERVED_AD6 RESERVED_AD4 RESERVED_AB9 RESERVED_AB7 RESERVED_Y4 RESERVED_Y6 RESERVED_V4 RESERVED_V6 GPIO_S0_NC13 GPIO_S0_NC14_C29 RESERVED_AB14 GPIO_S0_NC12 RESERVED_C30

VLV_M_D/BGA

REV = 1.15

IN_D2[15] IN_D2#[15] IN_D1[15] IN_D1#[15]

D D

R123 402/F_4

GND GND

C C

IN_D0[15] IN_D0#[15] IN_CLK[15] IN_CLK#[15]

SDVO_DATA[15] SDVO_CLK[15]

R320 0_4 R321 0_4

SOC_DDIO_RCOMP SOC_DDIO_RCOMP_P

SOC_PIN_AM3 SOC_PIN_AM2

+1.8V

R401 *10K_4

GPIO_NC13

B B

R400 10K_4

TP26 TP27

0618 @ALF: Follow CRB to stuff a 10Kohm

GND

GPIO_NC14 INTD_DSI_TE

? VLV_M_D

3 OF 13

DDI1_TXP_0 DDI1_TXN_0 DDI1_TXP_1 DDI1_TXN_1 DDI1_TXP_2 DDI1_TXN_2 DDI1_TXP_3 DDI1_TXN_3

DDI1_AUXP DDI1_AUXN

DDI1_HPD

DDI1_DDCDATA

DDI1_DDCCLK

DDI1_VDDEN

DDI1_BKLTEN

DDI1_BKLTCTL

RESERVED_AH14 RESERVED_AH13 RESERVED_AF14 RESERVED_AF13

VSS_AH3 VSS_AH2

VGA_RED

VGA_BLUE

VGA_GREEN

VGA_IREF VGA_IRTN

VGA_HSYNC VGA_VSYNC

VGA_DDCCLK

VGA_DDCDATA

RESERVED_T7

RESERVED_T9 RESERVED_AB13 RESERVED_AB12

RESERVED_Y12 RESERVED_Y13 RESERVED_V10

RESERVED_V9

RESERVED_T12 RESERVED_T10 RESERVED_V14 RESERVED_V13 RESERVED_T14 RESERVED_T13

RESERVED_T6

RESERVED_T4

RESERVED_P14

RESERVED_K34

GPIO_S0_NC26 GPIO_S0_NC25 GPIO_S0_NC24 GPIO_S0_NC23 GPIO_S0_NC22 GPIO_S0_NC21 GPIO_S0_NC20 GPIO_S0_NC18 GPIO_S0_NC17 GPIO_S0_NC16 GPIO_S0_NC15

AG3

INT_eDP_TXP0

AG1

INT_eDP_TXN0

AF3 AF2 AD3 AD2 AC3 AC1

AK3

INT_eDP_AUXP

AK2

INT_eDP_AUXN

K30

DDI1_EDP_HPD_R

P30

DDI1_DDCDATA

G30 N30

PCH_DISP_ON_C

J30

PCH_LVDS_BLON_C

M30

PCH_DPST_PWM

AH14 AH13 AF14 AF13 AH3

SOC_PIN_AH3

AH2

SOC_PIN_AH2

BA3 AY2 BA1 AW1

SOC_VGA_IREF

AY3

SOC_VGA_IRTN

BD2 BF2

BC1

SOC_VGA_DDCLK

BC2

SOC_VGA_DDCDATA

T7 T9 AB13 AB12 Y12 Y13 V10 V9 T12 T10 V14 V13 T14 T13 T6 T4 P14

K34 D32

SOC_GPIO_S0_NC26

N32

SOC_GPIO_S0_NC25

J34

SOC_GPIO_S0_NC24

K28 F28 F32 D34 J28 D28 M32 F34

?

INT_eDP_TXP0 [14] INT_eDP_TXN0 [14]

INT_eDP_AUXP [14] INT_eDP_AUXN [14]

DDI1_EDP_HPD_R [14]HDMI_HPD_CON[15]

PCH_DISP_ON_C [14] PCH_LVDS_BLON_C [14] PCH_DPST_PWM [14]

R322 0_4 R323 0_4

TP24

R305 0_4 R300 0_4

TP13 TP11 TP12

R158 10K_4

DDI1_DDCDATA

R159 *10K_4

R306 *357/F_4

GNDGND

+1.8V

GND

4

A A

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

5

4

3

2

Valley 3/9 (Display)

Date: Sheet of

Date: Sheet

1

4 39Tuesday, August 20, 2013

1A

of

5

4

3

2

1

+1.8V

R55 10K_4 R75 10K_4

D D

SATA_GP1

+1.8V +3V

SATA_LED_R_N

JWM BOARD ID SETTING

GPIO_SO_SC[015]

C C

GPIO_SO_SC[017] GPIO_SO_SC[018]

R302 10K_4 R291 10K_4 R301 10K_4 R292 *10K_4

GND

B B

SATA_GP1 SATA_LED_R_N

PJ4N3KDW Q6A

34

5

2

61

Q6B PJ4N3KDW

SOC_BID0 SOC_BID1 SOC_BID2

ACC_LED# [23]

R71 10K_4 R60 10K_4

SATA_LED# [23]

BIT0 BIT1GPIO_SO_SC[016] BIT2

SOC_BID3 BIT3

SOC_BID0

SOC_BID2 SOC_BID3

BOARD_ID[0:3] Model Name

JWM W08 0001

R298 *10K_4 R294 *10K_4 R297 *10K_4 R295 10K_4

0000

+1.8V

GND

EC31 *15P/50V_4

5

+1.8V

U15D

SATA_TXP0[19] SATA_TXN0[19]

SATA_RXP0[19] SATA_RXN0[19]

SATA_TXP1[18] SATA_TXN1[18]

SATA_RXP1[18] SATA_RXN1[18]

GND

SOC_KBC_SCI[13]

R124 402/F_4

R63 0_4 C70 0.1U/10V_4 R61 0_4

R113 0_4

R117 49.9/F_4

GND

R101 49.9/F_4

GND

SATA_TXP0 SATA_TXN0

SATA_RXP0 SATA_RXN0

SATA_TXP1 SATA_TXN1

SATA_RXP1 SATA_RXN1

ICLK_SATA_TERMP ICLK_SATA_TERMN

SATA_GP0 SATA_GP1 SATA_LED_R_N

SATA_RCOMP_DP SATA_RCOMP_DN

SOC_BID1 SOC_BID2

SOC_BID3

EMMC_RCOMP

SDIO3_RCOMP

BF6

SATA_TXP_0

BG7

SATA_TXN_0

AU16

SATA_RXP_0

AV16

SATA_RXN_0

BD10

SATA_TXP1

BF10

SATA_TXN_1

AY16

SATA_RXP_1

BA16

SATA_RXN_1

BB10

ICLK_SATA_TERMP

BC10

ICLK_SATA_TERMN

BA12

SATA_GP0

AY14

SATA_GP1

AY12

SATA_LED

AU18

SATA_RCOMP_P_AU18

AT18

SATA_RCOMP_N_AT18

AT22

MMC1_CLK

AV20

MMC1_D0

AU22

MMC1_D1

AV22

MMC1_D2

AT20

MMC1_D3

AY24

MMC1_D4

AU26

MMC1_D5

AT26

MMC1_D6

AU20

MMC1_D7

AV26

MMC1_CMD

BA24

MMC1_RST

AY18

MMC1_RCOMP

BA18

SD2_CLK

AY20

SD2_D0

BD20

SD2_D1

BA20

SD2_D2

BD18

SD2_D3_CD

BC18

SD2_CMD

AY26

SD3_CLK

AT28

SD3_D0

BD26

SD3_D1

AU28

SD3_D2

BA26

SD3_D3

BC24

SD3_CD#

AV28

SD3_CMD

BF22

SD3_1P8EN

BD22

SD3_PWREN

BF26

SD3_RCOMP

VLV_M_D/BGA

REV = 1.15

? VLV_M_D

PCIE_RCOMP_P_AP14_AP14 PCIE_RCOMP_N_AP13_AP13

4 OF 13

PCIE_TXP_0 PCIE_TXN_0

PCIE_RXP_0 PCIE_RXN_0

PCIE_TXP_1 PCIE_TXN_1

PCIE_RXP_1 PCIE_RXN_1

PCIE_TXP_2 PCIE_TXN_2

PCIE_RXP_2 PCIE_RXN_2

PCIE_TXP_3 PCIE_TXN_3

PCIE_RXP_3 PCIE_RXN_3

PCIE_CLKREQ_0 PCIE_CLKREQ_1 PCIE_CLKREQ_2 PCIE_CLKREQ_3

SD3_WP_BD5

RESERVED_BB4 RESERVED_BB3

RESERVED_AV10

RESERVED_AV9

HDA_LPE_RCOMP

HDA_DOCKRST

HDA_DOCKEN LPE_I2S2_CLK

LPE_I2S2_FRM

LPE_I2S2_DATAOUT

LPE_I2S2_DATAIN

RESERVED_P34 RESERVED_N34

RESERVED_AK9 RESERVED_AK7

VSS_BB7 VSS_BB5

HDA_RST

HDA_SYNC

HDA_CLK HDA_SDO HDA_SDI0 HDA_SDI1

PROCHOT

AY7 AY6

AT14 AT13

AV6 AV4

AT10 AT9

AT7 AT6

AP12 AP10

AP6 AP4

AP9 AP7

BB7 BB5

BG3 BD7 BG5 BE3 BD5

AP14 AP13

BB4 BB3 AV10 AV9

BF20 BG22 BH20 BJ21 BG20 BG19 BG21 BH18 BG18

BF28 BA30 BC30 BD28

P34 N34

AK9 AK7

C24

?

PCIE_TXP1_WLAN_C PCIE_TXN1_WLAN_C

PCIE_TXP2_LAN_C PCIE_TXN2_LAN_C

VSS_BB7 VSS_BB5

PCIE_CLKREQ_CR# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_LAN# PCIE_CLKREQ3#

SOC_PCIE_COMP SOC_PCIE_COMN

HDA_RCOMP ACZ_RST# ACZ_SYNC ACZ_BCLK ACZ_SDOUT ACZ_SDIN0

SOC_BID0

BIOS_STRAP SOC_Override

SOC_PROCHOT#

R398 0_4 R397 *33.2/F_4

C72 0.1U/10V_4 C71 0.1U/10V_4

C69 0.1U/10V_4

R98 49.9/F_4 R312 33_4 R314 33_4 R313 33_4 R327 33_4

0618 @ALF: Follow CRB

H_PROCHOT#

PCIE_TXP1_WLAN [22] PCIE_TXN1_WLAN [22]

PCIE_RXP1_WLAN [22] PCIE_RXN1_WLAN [22]

PCIE_TXP2_LAN [17] PCIE_TXN2_LAN [17]

PCIE_RXP2_LAN [17] PCIE_RXN2_LAN [17]

R84 0_4 R64 0_4

PCIE_CLKREQ_WLAN# [22] PCIE_CLKREQ_LAN# [17]

R120 402/F_4

BIT_CLK_AUDIO

+1.0V

GND

ACZ_RST#_AUDIO [16] ACZ_SYNC_AUDIO [16] BIT_CLK_AUDIO [16] ACZ_SDOUT_AUDIO [16] ACZ_SDIN0 [16]

H_PROCHOT# [24,34]

PCIE_CLKREQ_CR# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_LAN# PCIE_CLKREQ3#

0615 @ALF: EMI Reserved It

BIT_CLK_AUDIOSOC_BID1

R299 10K_4 R65 10K_4 R293 10K_4 R62 10K_4

Security Flash Descriptors 0 = Override 1 = Normal Operation

SOC_Override

34

PJ4N3KDW

EN_OVERRIDE[24]

A A

AC_PRESENT_EC[24]

5

R72 0_4

R93 0_4

SOC_Override_NM

AC_PRESENT_NM

4

5

Q8A

GND

AC_PRESENT

61

2

GND

Q8B PJ4N3KDW

AC Present: This input pin indicates when the platform is plugged into AC power.

3

BIOS_STRAP

0 = LPC 1 = SPI

AC_PRESENT [6]

+1.8V

GND

R92 10K_4

R126 *10K_4

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

2

Valley 4/9 (SD/PCIE/SATA)

Date: Sheet of

Date: Sheet

1

5 39Tuesday, August 20, 2013

1A

of

C88 *12P/50V_4

GND

C87 *15P/50V_4

D D

+1.8VS5

GND

C C

+1.8VS5

B B

A A

XTAL25_OUT

1

2

Y2

*25MHZ +-10PPM

4

3

XTAL25_IN

R368 51/F_4 R365 51/F_4 R370 51/F_4 R367 200/F_4

R133 51/F_4 R372 51/F_4

R375 *10K_4 R374 *10K_4 R378 *10K_4 R371 *10K_4

5

R102 *1M_4

PCH_XTAL25_IN[22]

XDP_H_TDO XDP_H_TMS XDP_H_TDI XDP_H_PREQ#

XDP_H_TRST# XDP_H_TCK

SOC_JTAG2_TCK SOC_JTAG2_TMS SOC_JTAG2_TDI SOC_JTAG2_TDO

SOC_ACCEL_INTA#[13]

RTC Circuitry(RTC)

+3V_RTC_0

RTC Power trace width 20mils.

+3VPCU

12

CN19 BAT_CONN

GND

5

30mils

+3V_RTC

GND

XTAL25_IN XTAL25_OUT

ICLK_ICOMP ICLK_RCOMP

CLK_PCIE_WLANN CLK_PCIE_WLANP

CLK_PCIE_LANN CLK_PCIE_LANP

SRT_CRST# XDP_H_TCK

XDP_H_TRST# XDP_H_TMS XDP_H_TDI XDP_H_TDO XDP_H_PRDY# XDP_H_PREQ#

SOC_SPI_CS# SOC_SPI_MISO

SOC_SPI_MOSI SOC_SPI_CLK

SOC_GPIO0 SOC_JTAG2_TCK SOC_JTAG2_TMS SOC_JTAG2_TDI SOC_JTAG2_TDO SUS_CLK_WLAN

SOC_GPOI7

SOC_GPIO_RCOMP

20K/F_4

C400 1U/6.3V_4

R362

R363

R105 0_4

R129 4.02K/F_4 R128 47.5/F_4

GND

CLK_PCIE_WLANN[22] CLK_PCIE_WLANP[22]

CLK_PCIE_LANN[17] CLK_PCIE_LANP[17]

TP10

TP25

TP8

SOC_KCB_SMI[13]

R3591K_4

R364 0_4

R377 49.9/F_4

GND

+3V_RTC_1+3V_RTC_0

D7 BAT54CW

0802@Ronny change PN and footprint

GND

C402 1U/6.3V_4

C403 1U/6.3V_4

4

AH12 AH10

AD9

AD14 AD13

AD10 AD12

AF6 AF4

AF9 AF7

AK4 AK6

AM4 AM6

AM10

AM9

BH7 BH5 BH4 BH8 BH6

BJ9 C12

D14

G12

F14 F12

G16

D18 F16

AT34

C23 C21 B22 A21 C22

B18 B16 C18 A17 C17 C16 B14 C15

C13 A13 C19

N26

SOC_RTEST#

SRT_CRST#

4

U15E

ICLK_OSCIN ICLK_OSCOUT

RESERVED_AD9 ICLK_ICOMP

ICLK_RCOMP RESERVED_AD10

RESERVED_AD12 PCIE_CLKN_00

PCIE_CLKP_00 PCIE_CLKN_11

PCIE_CLKP_11

PCIE_CLKN_22 PCIE_CLKP_22

PCIE_CLKN_33 PCIE_CLKP_33

RESERVED_AM10 RESERVED_AM9

PMC_PLT_CLK_00 PMC_PLT_CLK_11 PMC_PLT_CLK_22 PMC_PLT_CLK_33 PMC_PLT_CLK_44 PMC_PLT_CLK_55 ILB_RTC_RST

TAP_TCK TAP_TRST TAP_TMS TAP_TDI TAP_TDO TAP_PRDY TAP_PREQ RESERVED

PCU_SPI_CS_00 PCU_SPI_CS_11 PCU_SPI_MISO PCU_SPI_MOSI PCU_SPI_CLK

GPIO_S5_0 GPIO_S5_1 GPIO_S5_2 GPIO_S5_3 GPIO_S5_4 GPIO_S5_5 GPIO_S5_6 GPIO_S5_7

GPIO_S5_8 GPIO_S5_9 GPIO_S5_10

GPIO_RCOMP

VLV_M_D/BGA

REV = 1.15

3

? VLV_M_D

5 OF 13

SIO_UART1_RXD SIO_UART1_TXD SIO_UART1_RTS SIO_UART1_CTS

SIO_UART2_RXD SIO_UART2_TXD SIO_UART2_RTS SIO_UART2_CTS

PMC_SUSPWRDNACK

PMC_SUSCLK0_G24

PMC_SLP_S0IX

PMC_SLP_S4 PMC_SLP_S3

GPIO_S514_J20

PMC_ACPRESENT

PMC_WAKE_PCIE_0

PMC_BATLOW

PMC_PWRBTN

PMC_RSTBTN PMC_PLTRST

GPIO_S517_J24

PMC_SUS_STAT

ILB_RTC_TEST

PMC_RSMRST

PMC_CORE_PWROK

ILB_RTC_X1 ILB_RTC_X2

ILB_RTC_EXTPAD

SVID_ALERT

SVID_DATA

SVID_CLK

SIO_PWM_00 SIO_PWM_11

GPIO_S5_22 GPIO_S5_23 GPIO_S5_24 GPIO_S5_25 GPIO_S5_26 GPIO_S5_27 GPIO_S5_28 GPIO_S5_29 GPIO_S5_30

SIO_SPI_CS SIO_SPI_MISO SIO_SPI_MOSI

SIO_SPI_CLK

RTC Clock 32.768KHz

RTC_X1

R336 *10M_4

RTC_X2

12

3

Y5 *32.768KHz

AU34 AV34 BA34 AY34

BF34 BD34 BD32 BF32

D26 G24 F18 F22 D22 J20 D20 F26 K26 J26 BG9 F20 J24 G18

C11

B10 B7

C9 A9 B8

B24 A25 C25

AU32 AT32

K24 N24 M20 J18 M18 K18 K20 M22 M24

AV32 BA28 AY28 AY30

?

C382 *12P/50V_4

C383 *12P/50V_4

0801@Ronny reserve SLP_S3 control circuit

SUS_PWRDOWNACK SLP_S0IX#

SLP_S4# SLP_S3#_R

AC_PRESENT SOC_PMC_WAKE PMU_BATLOW#_R SOC_PWRBTN# SOC_REST_BTN SOC_PLTRST#

SOC_RTEST#

SOC_RSMRST# CORE_PWROK

RTC_X1 RTC_X2 BRTC_EXTPAD

SVID_ALERT#_SOC SVID_DATA_SOC SVID_CLK_SOC

TOUCHPANEL_INTR#_SOC SOC_SENS_HUB_RST#

GND

2

SLP_S3#_R SLP_S3#

R402 *0_4

R335 0_4 C398 0.1U/10V_4

R385 20/F_4 R387 16.9R_4 R392 0_4

1 3

R456 0_4

SUSWARN#_EC [24] SUSCLK0 [13] SLP_S0IX# [13] SLP_S4# [2,13]

AC_PRESENT [5] SOC_PMC_WAKE [13]

SOC_PWRBTN# [13] SOC_PLTRST# [13] PCH_SLP_S0# [13]

SOC_RSMRST# [13]

CORE_PWROK [13]

VR_SVID_ALERT# VR_SVID_DATA VR_SVID_CLK

Vender WND MXIC

Socket (208mil)

+1.8VS5

R410 3.3K/F_4

R409 3.3K/F_4

2

DRM_PG [28]

Q41 *METR3904-G

SLP_S3# [13]

O_1.8VA

CLKGEN_RTC_X1 [22]

GND

VR_SVID_ALERT# [34] VR_SVID_DATA [34]

VR_SVID_CLK [34]

Size

P/N 8MB AKE5EZN0N00 (W25Q64FWSSIG) 8MB

DFHS08FS023

+1.8VS5

SPI NOR FLASH

C413

0.1U/10V_4

2

GND

SPI_3P

SPI_7P

+1.8VS5

U17

8

VCC

3

WP#

SPI_HOLD7GND

SPI_Socket_208mil

soic8-7_9-1_27

AKE5EZN0N00

IC FLASH (8P) W25Q64FWSSIG (SOIC)

R413 3.3K/F_4

1

PMU_BATLOW#_R

SUS_PWRDOWNACK SOC_PMC_WAKE

AC_PRESENT

SOC_REST_BTN

R376 10K_4

R403 10K_4 R404 10K_4

R381 10K_4

R290 10K_4

+1.0V

R386

R388

71.5/F_4

*71.5/F_4

VR_SVID_DATA VR_SVID_ALERT# VR_SVID_CLK

0618@ALF: Follow Intel DG, changed the R Value to 71.5ohm.

(Firstly Stuff)

SPI_SI

SPI_SO

CS#

SPI_SCK

SOC_SPI_CS#

TOUCHPANEL_INTR#_SOC SOC_SENS_HUB_RST#

5

SOC_SPI_MOSI_R

2

SOC_SPI_MISO_R

1

SOC_SPI_CS#_R

6

SOC_SPI_CLK_R

4

GND

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

R94 10K_4 R96 10K_4

0628 @ALF: Add MXIC SPI Part.

0702 @ALF: Stuff Socket for bring up at A stage.

0802 @Ronny: Change to EEPROM at C stage.

R391 22_4 R412 22_4 R414 22_4 R406 22_4

PROJECT :JWM

Quanta Computer Inc.

Valley 5/9 (SPI/GPIO/CLK)

1

+1.8VS5

+1.8V

R393 *71.5/F_4

SOC_SPI_MOSI SOC_SPI_MISO SOC_SPI_CS# SOC_SPI_CLK

+1.8V

6 39Tuesday, August 20, 2013

6

of

1A

+3V_WLAN_P

5

+1.8VS5

4

3

2

1

R344 10K_4

BT_COMBO_EN#[22]

D D

ZERO_ODD_DP#[18]

GND

Q27

3

2N7002E

2

BT_COMBO_EN

1

+3V

2

Q26

*2N7002E

3

1

USB 3.0 Daughtor Board USB

(Debug Port)

C C

0615 @ALF: EMI Reserved It

CLK_24M_KBC

CLK_PCI_TPM

B B

CLK_PCI_TPM[19]

CLK_24M_DEBUG[22]

CLK_24M_DEBUG

0615 @ALF: EMI Reserved It

A A

HUB1

0603 @ALF: I/O Port (Upper-Right)

0607 @Ronny: TV Tuner

0801 @Ronny: change USB2.0 port form Hub to SOC for USB wake up used

EC32 *15P/50V_4

GND

*15P/50V_4

GND

CLK_PCI_TPM CLK_24M_DEBUG

EC34 *15P/50V_4

GND

R311 22_4 R329 22_4

SMB_SOC_CLK

5

4 3

1

ODD_PRSNT#_R

USBP1+[16] USBP1-[16]

USB_H1_P[21] USB_H1_N[21]

USBP_MB+[20] USBP_MB-[20] USBP_TV+[19] USBP_TV-[19]

GND

R351 45.3/F_4 R118 49.9/F_4

LAD0[19,22,24] LAD1[19,22,24] LAD2[19,22,24] LAD3[19,22,24]

LFRAME#[19,22,24]

CLK_24M_KBC[24]

+1.8V

Q25

PJ4N3KDW

R338 10K_4 R343 10K_4 R342 10K_4 R309 10K_4 R341 10K_4

BT_OFF[22] RF_OFF[22]

USBP0+[20] USBP0-[20]

SOC_USB_OC0[20]

+1.8VS5

R347 45.3/F_4

LAD0 LAD1 LAD2 LAD3 LFRAME# CLK_24M_KBC

CLKRUN#[19,24]

SOC_SERIRQ[13]

R304 2.2K_4 R289 2.2K_4 R296 10K_4

+1.8V

5

2 6

0625@ALF: Q7019 Changed the P/N from BAM70020003 to BAM4N3K0000. Because of the VGS, the range is 0.8~1.5V

R213 0_4 R212 0_4 R216 *0_4 R215 *0_4 R132 1K/F_4 R107 1K/F_4

R380 10K_4 R382 10K_4

GND

R315 22_4 R328 22_4

R2884.7K_4

SMB_RUN_DATSMB_SOC_DATA

R3034.7K_4

SMB_RUN_CLK

BT_OFF RF_OFF BT_COMBO_EN ODD_PRSNT#_R SOC_PWR_BUT

BT_OFF RF_OFF

BT_COMBO_EN ODD_PRSNT#_R SOC_PWR_BUT

ICLK_USB_TERMN_0 ICLK_USB_TERMN_1

SOC_USB_OC0 SOC_USB_OC1

USB_RCOMP

R108 *0_4

0621 @ALF: Follow Intel CRB

USB_HSIC_RCOMP

LPC_RCOMP

SMB_SOC_DATA SMB_SOC_CLK SMB_SOC_ALERTB

+3V

SMB_RUN_DAT [11,12,14,23]

+3V

SMB_RUN_CLK [11,12,14,23]

USBP_H3+

USBP_H3-

SOC_CLKOUT_0

SOC_CLKOUT_1

SOC_CLKRUN#

SOC_SERIRQ

4

U15F

G2

GPIO_S5_31

M3

GPIO_S5_32

L1

GPIO_S5_33

K2

GPIO_S5_34

K3

GPIO_S5_35

M2

GPIO_S5_36

N3

GPIO_S5_37

P2

GPIO_S5_38

L3

GPIO_S5_39

J3

GPIO_S5_40

P3

GPIO_S5_41

H3

GPIO_S5_42

B12

GPIO_S5_43

M16

USB_DP0

K16

USB_DN0

J14

USB_DP1

G14

USB_DN1

K12

USB_DP2

J12

USB_DN2

K10

USB_DP3

H10

USB_DN3

D10

ICLK_USB_TERMN_D10

F10

ICLK_USB_TERMN

C20

USB_OC_00

B20

USB_OC_11

D6

USB_RCOMPO

C7

USB_RCOMPI

M13

USB_PLL_MON

B4

USB_HSIC0_DATA

B5

USB_HSIC0_STROBE

E2

USB_HSIC1_DATA

D2

USB_HSIC1_STROBE

A7

USB_HSIC_RCOMP

BF18

LPC_RCOMP

BH16

ILB_LPC_AD_00

BJ17

ILB_LPC_AD_11

BJ13

ILB_LPC_AD_22

BG14

ILB_LPC_AD_33

BG17

ILB_LPC_FRAME

BG15

ILB_LPC_CLK_00

BH14

ILB_LPC_CLK_11

BG16

ILB_LPC_CLKRUN

BG13

ILB_LPC_SERIRQ

BG12

PCU_SMB_DATA

BH10

PCU_SMB_CLK

BG11

PCU_SMB_ALERT

VLV_M_D/BGA

REV = 1.15

? VLV_M_D

6 OF 13

3

RESERVED_M10

RESERVED_M9

RESERVED_P7 RESERVED_P6

RESERVED_M7

USB3_REXT0

RESERVED_P10 RESERVED_P12

RESERVED_M4 RESERVED_M6

USB3_RXP0 USB3_RXN0

USB3_TXP0

USB3_TXN0

RESERVED_H8 RESERVED_H7

RESERVED_H5 RESERVED_H4

GPIO_S0_SC_55 GPIO_S0_SC_56 GPIO_S0_SC_57 GPIO_S0_SC_58 GPIO_S0_SC_59 GPIO_S0_SC_60 GPIO_S0_SC_61

ILB_8254_SPKR

SIO_I2C0_DATA

SIO_I2C0_CLK

SIO_I2C1_DATA

SIO_I2C1_CLK

SIO_I2C2_DATA

SIO_I2C2_CLK

SIO_I2C3_DATA

SIO_I2C3_CLK

SIO_I2C4_DATA

SIO_I2C4_CLK

SIO_I2C5_DATA

SIO_I2C5_CLK

SIO_I2C6_DATA

SIO_I2C6_CLK

GPIO_S0_SC_092 GPIO_S0_SC_093

M10 M9

P7 P6

M7 M12

P10 P12

M4 M6

D4 E3

K6 K7

H8 H7

H5 H4

BD12 BC12 BD14 BC14 BF14 BD16 BC16

BH12

BH22 BG23

BG24 BH24

BG25 BJ25

BG26 BH26

BF27 BG27

BH28 BG28

BJ29 BG29

BH30 BG30

?

USB3_P0_REXT

USB30_RX1+ USB30_RX1-

USB30_TX1+ USB30_TX1-

Top Swap (A16 Override) 0 = Top address bit is unchanged 1 = Top address bit is inverted

GPIO_S0_SC_56 SOC_UART_TX

SOC _SENSOR_HUB_WAKE TOUCH_PANEL_SOC_RST# SOC_UART_RX

I2C_0_SDA I2C_0_SCL

I2C_1_SDA I2C_1_SCL

I2C_2_SDA_R I2C_2_SCL_R

I2C_3_SDA I2C_3_SCL

I2C_4_SDA I2C_4_SCL

I2C_5_SDA I2C_5_SCL

I2C_6_SDA I2C_6_SCL

I2C_NFC_SOC_SDA I2C_NFC_SOC_SCL

R131 1.24K/F_4

USB30_RX1+ [20] USB30_RX1- [20]

USB30_TX1+ [20] USB30_TX1- [20]

ACZ_SPKR [16]

7

GND

+1.8V

TOUCH_PANEL_SOC_RST# SOC _SENSOR_HUB_WAKE

+1.8V

R56 10K_4

R53 *10K_4

GND

2

SOC_UART_TX SOC_UART_RX

I2C_0_SDA I2C_0_SCL

I2C_1_SDA I2C_1_SCL

I2C_2_SDA_R I2C_2_SCL_R

I2C_3_SDA I2C_3_SCL

I2C_4_SDA I2C_4_SCL

I2C_5_SDA I2C_5_SCL

I2C_6_SDA I2C_6_SCL

I2C_NFC_SOC_SDA I2C_NFC_SOC_SCL

R78 10K_4 R74 10K_4

R109 *0_4

Un-Stuff for Test Only

+1.8V

R326 2.2K_4 R325 2.2K_4

R324 2.2K_4 R310 2.2K_4

R317 2.2K_4EC33 R316 2.2K_4

R319 2.2K_4 R318 2.2K_4

R95 2.2K_4 R97 2.2K_4

R333 2.2K_4 R332 2.2K_4

R331 2.2K_4 R330 2.2K_4

R337 2.2K_4 R339 2.2K_4

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

Valley 6/9 (USB/LPC/I2C)

Date: Sheet of

Date: Sheet

1

7 39Tuesday, August 20, 2013

of

1A

5

4

3

2

1

8

D D

+VCC_CORE+VCC_GFX

R47 *100/F_4

C C

B B

A A

GND

+1.35VSUS_VSM

C145

1U/6.3V_4

GND GND

0627 @ALF: VCC_SENSE/VNN_SENSE -- Pull Up/Down R follow CRB

R136 *100/F_4

VCC_AXG_SENSE VSS_SENSE

R137 *100/F_4

0628 @ALF: Confirmed Vendor need to add 0 ohm Pull Down for VSS_AXG_SENSE.

+1.35VSUS

C169

4.7U/6.3V_6

VCC_SENSE[34]

VCC_AXG_SENSE[34]

VSS_SENSE[34]

VSS_AXG_SENSE[34]

+1.35VSUS_VSM

+VCC_CORE

U15G

VCC_SENSE VCC_AXG_SENSE VSS_SENSEVCC_SENSE

R106 0_4

R134 0_4

C170 10U/6.3V_6 C173 4.7U/6.3V_6 C172 4.7U/6.3V_6 C107 C167 2.2U/6.3V_6 C414 2.2U/6.3V_6 C146 10U/6.3V_6 C140 10U/6.3V_6 C137 10U/6.3V_6 C133 10U/6.3V_6 C151 10U/6.3V_6 C171 10U/6.3V_6

GND

TP9

P28

CORE_VCC_SENSE_P28

BB8

UNCORE_VNN_SENSE

N28

CORE_VSS_SENSE_N28

GND AD38

DRAM_VDD_S4_AD38

AF38

DRAM_VDD_S4_AF38

A48

DRAM_VDD_S4

AK38

DRAM_VDD_S4_AK38

AM38

DRAM_VDD_S4_AM38

AV41

DRAM_VDD_S4_AV41

AV42

DRAM_VDD_S4_AV42

BB46

DRAM_VDD_S4_BB46

AA27

CORE_VCC_S0IX_AA27

AA29

CORE_VCC_S0IX_AA29

AA30

CORE_VCC_S0IX_AA30

AC27

CORE_VCC_S0IX_AC27

AC29

CORE_VCC_S0IX_AC29

AC30

CORE_VCC_S0IX_AC30

AD27

CORE_VCC_S0IX_AD27

AD29

CORE_VCC_S0IX_AD29

AD30

CORE_VCC_S0IX_AD30

AF27

CORE_VCC_S0IX_AF27

AF29

CORE_VCC_S0IX_AF29

AG27

CORE_VCC_S0IX_AG27

AG29

CORE_VCC_S0IX_AG29

AG30

CORE_VCC_S0IX_AG30

P26

CORE_VCC_S0IX_P26

P27

CORE_VCC_S0IX_P27

U27

CORE_VCC_S0IX_U27

U29

CORE_VCC_S0IX_U29

V27

CORE_VCC_S0IX_V27

V29

CORE_VCC_S0IX_V29

V30

CORE_VCC_S0IX_V30

Y27

CORE_VCC_S0IX_Y27

Y29

CORE_VCC_S0IX_Y29

Y30

CORE_VCC_S0IX_Y30

AF30

TP_CORE_V1P05_S4

VLV_M_D/BGA

REV = 1.15

? VLV_M_D

7 OF 13

DRAM_VDD_S4_BD49 DRAM_VDD_S4_BD52 DRAM_VDD_S4_BD53 DRAM_VDD_S4_BF44

DRAM_VDD_S4_BG51

DRAM_VDD_S4_BJ48

DRAM_VDD_S4_C51 DRAM_VDD_S4_D44 DRAM_VDD_S4_F49 DRAM_VDD_S4_F52 DRAM_VDD_S4_F53

DRAM_VDD_S4_H46 DRAM_VDD_S4_M41 DRAM_VDD_S4_M42

DRAM_VDD_S4_V38

DRAM_VDD_S4_Y38

UNCORE_VNN_S3_AA24 UNCORE_VNN_S3_AC22 UNCORE_VNN_S3_AC24 UNCORE_VNN_S3_AD22 UNCORE_VNN_S3_AD24 UNCORE_VNN_S3_AF22

UNCORE_VNN_S3_AF24 UNCORE_VNN_S3_AG22 UNCORE_VNN_S3_AG24

UNCORE_VNN_S3_AJ22

UNCORE_VNN_S3_AJ24

UNCORE_VNN_S3_AK22

UNCORE_VNN_S3_AK24

UNCORE_VNN_S3_AK25

UNCORE_VNN_S3_AK27

UNCORE_VNN_S3_AK29

UNCORE_VNN_S3_AK30

UNCORE_VNN_S3_AK32 UNCORE_VNN_S3_AM22

TP2_CORE_VCC_S0IX

BD49 BD52 BD53 BF44 BG51 BJ48 C51 D44 F49 F52 F53 H46 M41 M42 V38 Y38

AA24 AC22 AC24 AD22 AD24 AF22 AF24 AG22 AG24 AJ22 AJ24 AK22 AK24 AK25 AK27 AK29 AK30 AK32 AM22

AA22

SOC_CORE_PIN_AA22SOC_CORE_PINAF30

?

+1.35VSUS

+VCC_GFX

GND

TP7

C116

2.2U/6.3V_6

C126 10U/6.3V_6

C157

2.2U/6.3V_6

C122 10U/6.3V_6

C149 22U/6.3V_6

C407 10U/6.3V_6

C180 22U/6.3V_6

C115 1U/6.3V_4

C103 1U/6.3V_4

C181 22U/6.3V_6

C142 22U/6.3V_6

C123 10U/6.3V_6

1U/6.3V_4

+3VPCU

R251

16.5K/F_4

THER_CPU

R263 100K_4 NTC

IO Thrm Protect

For 65 degree, 1.8v limit, (SW)

R255

3.3K/F_4

For 75 degree, 1.2v limit, (HW)

R259

0_4

C325

0.1U/10V_4

1 2

C326

0.1U/10V_4

1 2

C408 10U/6.3V_6

THRM_MOINTOR [24]

THRM_MOINTOR1 [24]

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

5

4

3

2

Valley 7/9 (Power 1)

Date: Sheet of

Date: Sheet

1

8 39Tuesday, August 20, 2013

1A

of

5

4

3

2

1

GND

+1.0V

R139 0_4

+1.0VSX

D D

+1.0VSX

GND

R141 0_4 R89 0_4

GND

+1.0V

GND

+1.0V

+1.0VSX

C159 1U/6.3V_4 C147 1U/6.3V_4 C158 1U/6.3V_4 C129 1U/6.3V_4

C84 1U/6.3V_4 C95 1U/6.3V_4 C81 1U/6.3V_4

C96 1U/6.3V_4

C131 0.01U/25V_4

R91 0_4

GND

C117 1U/6.3V_4 C128 1U/6.3V_4

+1.0V

C C

+1.0VS5

+1.05V

R340 0_4

R151 0_4

GND

C134 1U/6.3V_4 C388 1U/6.3V_4

+1.35VSFR

+1.35V

+1.35VSFR

+1.35V

GND

C109 1U/6.3V_4 C68 1U/6.3V_4

C374 1U/6.3V_4

GND

C106 1U/6.3V_4 C93 1U/6.3V_4

DARM_V1P0_SOIX_PWR

DARM_V1P0_SOIX_PWR DDI_V1P0_SOIX

USB3_V1P0_G3 VIS_V1P0_SIOX_PW

CORE_V1P05_S3_PW VIS_V1P0_SIOX_PW

USB3_V1P0_G3

CORE_V1P05

C152 1U/6.3V_4 C132 1U/6.3V_4

C372 1U/6.3V_4

GND

U15H

V32

SVID_V1P0_S3_V32

BJ6

VGA_V1P0_S3_BJ6

AD35

DRAM_V1P0_S0IX_AD35

AF35

DRAM_V1P0_S0IX_AF35

AF36

DRAM_V1P0_S0IX_AF36

AA36

DRAM_V1P0_S0IX_AA36

AJ36

DRAM_V1P0_S0IX_AJ36

AK35

DRAM_V1P0_S0IX_AK35

AK36

DRAM_V1P0_S0IX_AK36

Y35

DRAM_V1P0_S0IX_Y35

Y36

DRAM_V1P0_S0IX_Y36

AK19

DDI_V1P0_S0IX_AK19

AK21

DDI_V1P0_S0IX_AK21

AJ18

DDI_V1P0_S0IX_AJ18

AM16

DDI_V1P0_S0IX_AM16

U22

UNCORE_V1P0_G3_U22

V22

UNCORE_V1P0_G3_V22

AN29

VIS_V1P0_S0IX_AN29

AN30

VIS_V1P0_S0IX_AN30

AF16

UNCORE_V1P0_S3_AF16

AF18

UNCORE_V1P0_S3_AF18

Y18

UNCORE_V1P0_S3_Y18

G1

UNCORE_V1P0_S3_G1

AM21

PCIE_V1P0_S3_AM21

AN21

PCIE_V1P0_S3_AN21

AN18

PCIE_GBE_SATA_V1P0_S3_AN18

AN19

SATA_V1P0_S3_AN19

AA33

CORE_V1P05_S3_AA33

AF21

UNCORE_V1P0_S0IX_AF21

AG21

UNCORE_V1P0_S0IX_AG21

V24

VIS_V1P0_S0IX_V24

Y22

VIS_V1P0_S0IX_Y22

Y24

VIS_V1P0_S0IX_Y24

M14

USB_V1P0_S3_M14

U18

USB_V1P0_S3_U18

U19

USB_V1P0_S3_U19

AN25

GPIO_V1P0_S3_AN25

Y19

USB3_V1P0_G3_Y19

C3

USB3_V1P0_G3_C3

C5

UNCORE_V1P0_G3_C5

B6

UNCORE_V1P0_G3_B6

AC32

CORE_V1P0_S3_AC32

Y32

CORE_V1P0_S3_Y32

U36

UNCORE_V1P35_S0IX_F4_U36

AA25

UNCORE_V1P35_S0IX_F5_AA25

AG32

UNCORE_V1P35_S0IX_F2_AG32

V36

UNCORE_V1P35_S0IX_F3_V36

BD1

VGA_V1P35_S3_F1_BD1

AF19

UNCORE_V1P35_S0IX_F6

AG19

UNCORE_V1P35_S0IX_F1_AG19

AJ19

ICLK_V1P35_S3_F1_AJ19

AG18

ICLK_V1P35_S3_F2

AN16

VSSA_AN16

U16

USB_VSSA_U16

REV = 1.15

VLV_M_D/BGA

? VLV_M_D

8 OF 13

TOP

DRAM_V1P35_S0IX_F1_AD36

HDA_LPE_V1P5V1P8_S3_AM32

UNCORE_V1P8_S3_AM30

UNCORE_V1P8_S3_AN32

LPC_V1P8V3P3_S3_AM27

UNCORE_V1P8_G3_U24

USB_V3P3_G3_N18 USB_V3P3_G3_P18

UNCORE_V1P8_S3_U38

VGA_V3P3_S3_AN24

PCU_V1P8_G3_V25

PCU_V3P3_G3_N22

SD3_V1P8V3P3_S3_AN27

VSS_AD16

VSS_AD18 USB_HSIC_V1P2_G3_V18 UNCORE_V1P8_G3_AA18

RTC_VCC_P22

USB_V1P8_G3_N20

PMU_V1P8_G3_U25

CORE_V1P05_S3_AF33 CORE_V1P05_S3_AG33 CORE_V1P05_S3_AG35

CORE_V1P05_S3_U33 CORE_V1P05_S3_U35 CORE_V1P05_S3_V33

VSS_A3_A3

VSS_A49_A49

VSS_A5_A5 VSS_A51_A51 VSS_A52_A52

VSS_A6_A6

VSS_B2_B2 VSS_B52_B52 VSS_B53_B53

VSS_BE1_BE1

VSS_BE53_BE53

VSS_BG1_BG1

VSS_BG53_BG53

VSS_BH1_BH1

VSS_BH2_BH2 VSS_BH52_BH52 VSS_BH53_BH53

VSS_BJ2_BJ2 VSS_BJ3_BJ3

VSS_BJ5_BJ5 VSS_BJ49_BJ49 VSS_BJ51_BJ51 VSS_BJ52_BJ52

VSS_C1_C1

VSS_C53_C53

VSS_E1_E1

VSS_E53_E53

RESERVED_F1

PCIE_V1P0_S3_AK18

PCIE_V1P0_S3_AM18

C148 1U/6.3V_4

C74 1U/6.3V_4

R407 0_4 R125 0_4

R360 0_4 R130 0_4

R127 0_4 R334 0_4

R135 0_4 R357 0_4

R152 0_6

C166

0.01U/25V_4

+1.0V

AD36 AM32 AM30 AN32 AM27 U24 N18 P18 U38 AN24 V25 N22 AN27 AD16 AD18 V18 AA18 P22 N20 U25 AF33 AG33 AG35 U33 U35 V33 A3 A49 A5 A51 A52 A6 B2 B52 B53 BE1 BE53 BG1 BG53 BH1 BH2 BH52 BH53 BJ2 BJ3 BJ5 BJ49 BJ51 BJ52 C1 C53 E1 E53 F1 AK18 AM18

?

GND

C135

0.47uF/4V_4

C367

1U/6.3V_4

UNCORE_V1P8_AN32_PWR LPC_V3P3_PWR

V1P8_S5_PWR PCU_V3P3_G3_PWR

UNCORE_V1P8_AN32_PWR LPC_V3P3_PWR V1P8_S5_PWR PCU_V3P3_G3_PWR +VSDIO

VSS_AD18_AD16_PWR USB_HSIC_V1P2_G3 V1P8_AA18_PEW RTC_VCC_P22_PWR

V1P8_S5_PWR

CORE_V1P05_S3_PW

C125 1U/6.3V_4

C118 1U/6.3V_4

GND

+1.35VSFR +1.5V +1.8V

+3V

+3VS5

+3V

+1.8VS5 +3V_RTC

+1.8VS5

+1.05V

GND

+1.5V

GND

R82 *0_4 R83 0_4

C101 1U/6.3V_4

+1.0VS5 +1.2VS5

UNCORE_V1P8_AN32_PWR

C411

C412

1U/6.3V_4

GND

9

C113 1U/6.3V_4

B B

+1.35V +1.0V

C99 1U/6.3V_4

GND

C124 1U/6.3V_4

GND

C370 1U/6.3V_4

C389

0.01U/25V_4

C130 1U/6.3V_4

C97 1U/6.3V_4

C393 1U/6.3V_4

C121 1U/6.3V_4

USB3_V1P0_G3 LPC_V3P3_PWR

C390

C394

1U/6.3V_4

GND

C119 0.1U/10V_4

C392

0.01U/25V_4

+VCC_GFX

V1P8_AA18_PEW

GND

C112 1U/6.3V_4

+VSDIO

GND

C104 1U/6.3V_4

GND

C102 1U/6.3V_4

PCU_V3P3_G3_PWR

C143 1U/6.3V_4

GND

C139

0.1U/10V_4

+1.2VS5

VIS_V1P0_SIOX_PW

GND

C76 22U/6.3V_6

C77 22U/6.3V_6

C110 1U/6.3V_4

GND GND

4

A A

C75 22U/6.3V_6

5

V1P8_S5_PWR RTC_VCC_P22_PWR

GND

C404 1U/6.3V_4

C141 1U/6.3V_4

C401 1U/6.3V_4

C405

0.01U/25V_4

3

GND

C138 1U/6.3V_4

VSS_AD18_AD16_PWR

2

C111 *1U/6.3V_4

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

Valley 8/9 (Power 2)

Date: Sheet of

Date: Sheet

1

9 39Tuesday, August 20, 2013

of

1A

5

4

3

2

1

10

D D

?

U15I

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35

VLV_M_D/BGA

VLV_M_D

9 OF 13

VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70

AC36 AC38 AD19 AD21 AD25 AD32 AD33 AD47 AD7 AE1 AE11 AE12 AE14 AE3 AE4 AE40 AE42 AE43 AE45 AE46 AE48 AE50 AE51 AE53 AE6 AE8 AE9 AF10 AF12 AF25 AF32 AF47 AG16 AG25 AG36

?REV = 1.15

AG38 AH41

AH45

AJ16 AJ21 AJ25 AJ27 AJ29

AJ30 AJ32 AJ33 AJ35 AJ38

AJ53 AK10 AK14 AK16 AK33 AK41 AK44 AM12 AM19 AM24 AM25 AM29 AM33 AM35 AM36 AM40

AH4

AH7 AH9

AJ1

AJ3

M28

A11 A15 A19 A23 A27 A31 A35 A39 A43 A47

AA1 AA16 AA19 AA21

AA3 AA32 AA35 AA38 AA53 AB10

AB4 AB41 AB45 AB47

C C

AB48 AB50 AB51

AB6 AC16 AC18 AC19 AC21 AC25 AC33 AC35

GND GND GND GND GND GNDGND GND GND GND

U15J

VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105

VLV_M_D/BGA

? VLV_M_D

10 OF 13

VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140

AH47 AH48 AH50 AH51 AH6 AM44 AM51 AM7 AN1 AN11 AN12 AN14 AN22 AN3 AN33 AN35 AN36 AN38 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN5 AN51 AN53 AN6 AN8 AN9 AP40 AT12 AT16 AT19

?REV = 1.15

AT24 AT27 AT30 AT35 AT38

AT47

AT52 AU24 AU30

AU38 AU51 AV12 AV13 AV14 AV18 AV19 AV24 AV27 AV30 AV35 AV38 AV47 AV51

AW13 AW19 AW27

AW3

AW35

AY10 AY22 AY32

AT4

AU1 AU3

AV7

U15K

VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175

VLV_M_D/BGA

?

VLV_M_D

11 OF 13

VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210

?

U15L

AY36 AY4 AY50 AY9 BA14 BA19 BA22 BA27 BA32 BA35 BA40 BA53 BB19 BB27 BB35 BC20 BC22 BC26 BC28 BC32 BC34 BC42 BD19 BD24 BD27 BD30 BD35 BE19 BE2 BE35 BE8 BF12 BF16 BF24 BF38

?REV = 1.15

BF30 BF36

BG31 BG34 BG39 BG42 BG45 BG49

BJ11 BJ15 BJ19 BJ23 BJ27 BJ31 BJ35 BJ39 BJ43 BJ47

BF4

BJ7 C14 C31 C34 C39 C42 C45 C49 D12 D16 D24 D30 D36 D38 E19 E35

VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245

VLV_M_D/BGA

REV = 1.15

VLV_M_D

12 OF 13

VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280

E8 F19 F2 F24 F27 F30 F35 F5 F7 G10 G20 G22 G26 G28 G32 G34 G42 H19 H27 H35 J1 J16 J19 J22 J27 J32 J35 J40 J53 K14 K22 K32 K36 K4 K50

?

K9 L13 L19 L27 L35

M19 M26 M27 M34 M35 M38 M47 M51

N1

N16 N38 N51

P13 P16 P19 P20 P24 P32 P35 P38

P4 P47 P52

P9 T40

U1

U11 U12 U14 U21

U15M

VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315

VLV_M_D/BGA

? VLV_M_D

13 OF 13

VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350

U3 U30 U32 U40 U42 U43 U45 U46 U48 U49 U5 U51 U53 U6 U8 U9 V12 V16 V19 V21 V35 V40 V44 V51 V7 Y10 Y14 Y16 Y21 Y25 Y33 Y41 Y44 Y7 Y9

?REV = 1.15

B B

A A

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Custom

5

4

3

2

Valley 9/9 (GND)

Date: Sheet of

Date: Sheet

1

10 39Tuesday, August 20, 2013

1A

of

5

M_A_A[15:0][2]

D D

M_A_BS#0[2] M_A_BS#1[2] M_A_BS#2[2] M_A_CS#0[2] M_A_CS#1[2] M_A_CLKP0[2] M_A_CLKN0[2] M_A_CLKP1[2] M_A_CLKN1[2] M_A_CKE0[2] M_A_CKE1[2] M_A_CAS#[2] M_A_RAS#[2]

R180 10K/F_4 R181 10K/F_4

C C

M_A_WE#[2]

SMB_RUN_CLK[7,12,14,23] SMB_RUN_DAT[7,12,14,23]

M_A_ODT0[2] M_A_ODT1[2]

M_A_DM0[2] M_A_DM1[2] M_A_DM2[2] M_A_DM3[2] M_A_DM4[2] M_A_DM5[2] M_A_DM6[2] M_A_DM7[2]

M_A_DQSP[7:0][2]

M_A_DQSN[7:0][2]

CPU Bracket

B B

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 114 121 101 103 102 104

73

74 115 110 113 197 201 202 200

116 120

11

28

46

63 136 153 170 187

12

29

47

64 137 154 171 188

10

27

45

62 135 152 169 186

4

0617 @ALF:

JDIM2A

DDR3-DIMM0_H=4.0_STD

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000004

IC SOCKET DDR3 SODIMM(204P,H4.0,STD)

Changed the QCI P/N H=4.0mm

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

EZIW

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ5 M_A_DQ4 M_A_DQ6 M_A_DQ2 M_A_DQ1 M_A_DQ0 M_A_DQ7 M_A_DQ3 M_A_DQ13 M_A_DQ12 M_A_DQ14 M_A_DQ15 M_A_DQ9 M_A_DQ8 M_A_DQ11 M_A_DQ10 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ23 M_A_DQ17 M_A_DQ16 M_A_DQ18 M_A_DQ22 M_A_DQ24 M_A_DQ25 M_A_DQ31 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ26 M_A_DQ36 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ32 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ42 M_A_DQ40 M_A_DQ41 M_A_DQ47 M_A_DQ43 M_A_DQ49 M_A_DQ52 M_A_DQ50 M_A_DQ51 M_A_DQ55 M_A_DQ48 M_A_DQ54 M_A_DQ53 M_A_DQ59 M_A_DQ56 M_A_DQ63 M_A_DQ58 M_A_DQ57 M_A_DQ60 M_A_DQ62 M_A_DQ61

3

M_A_DQ[63:0] [2]

2

0617 @ALF:

+1.35VSUS

2.48A

+3V

R190 10K/F_4

+3V

PM_EXTTS#0[12]

M_A_DRAMRST#[2]

SMDDR_VREF_DQ[12] +SMDDR_VREF_DIMM[11,12]

R183 0_6

PM_EXTTS#0

C226 *0.1U/10V_4

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

Changed the QCI P/N H=4.0mm

JDIM2B

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8

PC2100 DDR3 SDRAM SO-DIMM

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

DDR3-DIMM0_H=4.0_STD

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000004

IC SOCKET DDR3 SODIMM(204P,H4.0,STD)

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

203

VTT1

204

VTT2

205

GND

206

GND

+SMDDR_VREF_DIMM[11,12]

+0.65V_DDR_VTT

+1.35VSUS[2,8,12,28,35]

+0.65V_DDR_VTT[12,28]

1

11

+3V[5,7,9,12,13,14,15,16,17,18,19,20,21,22,23,24,25,35,37]

+1.35VSUS

EC48 120P/50V_4 EC49 120P/50V_4 EC50 120P/50V_4 EC16 120P/50V_4 EC12 *120P/50V_4 EC6 *120P/50V_4 EC5 120P/50V_4 EC7 *120P/50V_4 EC9 120P/50V_4 EC8 120P/50V_4

A A

5

+0.65V_DDR_VTT

EC14 *120P/50V_4 EC15 *120P/50V_4

0625@ALF: Modified Power name from +0.75V_DDR_VTT to +0.65V_DDR_VTT.

For EMI RESERVE

+1.35VSUS

EC18 *120P/50V_4 EC19 *120P/50V_4 EC20 *120P/50V_4 EC13 *0.1U/10V_4 EC10 120P/50V_4 EC11 120P/50V_4 EC17 120P/50V_4 EC51 120P/50V_4

0730 C-test@Ronny: EMI stuff EC16,EC10,EC11,EC17,EC8,EC9 Add EC48,EC49,EC50,EC51

4

1uF/10uF 4pcs on each side of connector

+1.35VSUS +0.65V_DDR_VTT

Place these Caps near So-Dimm0.

C237 1U/6.3V_4 C236 1U/6.3V_4 C235 1U/6.3V_4 C208 1U/6.3V_4 C214 1U/6.3V_4 C209 1U/6.3V_4 C211 1U/6.3V_4 C210 1U/6.3V_4

C230 10U/6.3V_6 C229 10U/6.3V_6 C228 10U/6.3V_6 C212 10U/6.3V_6 C213 10U/6.3V_6 C239 10U/6.3V_6 C227 10U/6.3V_6 C238 10U/6.3V_6

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

+3V

3

C224 1U/6.3V_4 C223 1U/6.3V_4 C215 1U/6.3V_4 C222 1U/6.3V_4 C218 10U/6.3V_6

C232 0.1U/10V_4 C225 *2.2U/6.3V_6

C204 0.1U/10V_4 C207 *2.2U/6.3V_6

C424 0.1U/10V_4 C206 2.2U/6.3V_6

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev Custom

Custom

DDR3 DIMM0-STD(4.0H)

Date: Sheet

2

Date: Sheet of

1

1A

11 39Tuesday, August 20, 2013

of

5

M_B_A[15:0][3]

D D

M_B_BS#0[3] M_B_BS#1[3] M_B_BS#2[3] M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP0[3] M_B_CLKN0[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CKE0[3] M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3]

R422 10K/F_4

+3V

R423 10K/F_4

C C

B B

M_B_WE#[3]

SMB_RUN_CLK[7,11,14,23] SMB_RUN_DAT[7,11,14,23]

M_B_ODT0[3] M_B_ODT1[3]

M_B_DM2[3] M_B_DM0[3] M_B_DM1[3] M_B_DM3[3] M_B_DM4[3] M_B_DM5[3] M_B_DM6[3] M_B_DM7[3]

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_ODT0 M_B_ODT1

M_B_DM2 M_B_DM0 M_B_DM1 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP2 M_B_DQSP0 M_B_DQSP1 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN2 M_B_DQSN0 M_B_DQSN1 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 114 121 101 103 102 104

73

74 115 110 113 197 201 202 200

116 120

11

28

46

63 136 153 170 187

12

29

47

64 137 154 171 188

10

27

45

62 135 152 169 186

4

0617 @ALF: Changed the QCI P/N H=4.0mm

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM1_H=4.0_STD

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000004

IC SOCKET DDR3 SODIMM(204P,H4.0,STD)

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

(204P)

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ22 M_B_DQ23 M_B_DQ21 M_B_DQ18 M_B_DQ16 M_B_DQ17 M_B_DQ20 M_B_DQ19 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ2 M_B_DQ3 M_B_DQ1 M_B_DQ0 M_B_DQ9 M_B_DQ8 M_B_DQ11 M_B_DQ10 M_B_DQ12 M_B_DQ13 M_B_DQ15 M_B_DQ14 M_B_DQ26 M_B_DQ27 M_B_DQ29 M_B_DQ28 M_B_DQ30 M_B_DQ31 M_B_DQ24 M_B_DQ25 M_B_DQ32 M_B_DQ33 M_B_DQ38 M_B_DQ34 M_B_DQ36 M_B_DQ37 M_B_DQ35 M_B_DQ39 M_B_DQ40 M_B_DQ43 M_B_DQ47 M_B_DQ46 M_B_DQ41 M_B_DQ42 M_B_DQ44 M_B_DQ45 M_B_DQ52 M_B_DQ51 M_B_DQ54 M_B_DQ48 M_B_DQ49 M_B_DQ55 M_B_DQ50 M_B_DQ53 M_B_DQ63 M_B_DQ62 M_B_DQ59 M_B_DQ60 M_B_DQ56 M_B_DQ57 M_B_DQ61 M_B_DQ58

3

M_B_DQ[63:0] [3]

PM_EXTTS#0[11]

M_B_DRAMRST#[3]

SMDDR_VREF_DQ +SMDDR_VREF_DQ1 +SMDDR_VREF_DIMM

R46 0_6

Local Thermal Sensor

R424 *10K/F_4

+3V

MBCLK2 MBDATA2 PM_EXTTS#0

MBCLK2[14,24]

MBDATA2[14,24]

2

+1.35VSUS

2.48A

+3V

PM_EXTTS#0

C63 *0.1U/10V_4

U18 *EMC1412-1-ACZL-TR

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

0617 @ALF:

JDIM1B

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

DDR3-DIMM1_H=4.0_STD

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000004

IC SOCKET DDR3 SODIMM(204P,H4.0,STD)

VCC

DXP

DXN

GND

Changed the QCI P/N H=4.0mm

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

1 2 3 5

(204P)

PC2100 DDR3 SDRAM SO-DIMM

C428 *0.01U/16V_4

C426 *2200P/50V_4

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

DDR_THERMDA

DDR_THERMDC

1

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.65V_DDR_VTT

+3V

DDR3 Thermal Sensor

2

Q39 *METR3904-G

1 3

12

Main:AL001412003 EMC1412-1-ACZL-TR(98h)

2nd:AL000431014 TMP431ADGKR(98h)

+1.35VSUS

VREF DQ0 M1 Solution

R45

DDR_VTTREF[28]

A A

DDR_VTTREF

R138 *0_6

5

+1.35VSUS

+SMDDR_VREF_DIMM_LDDR_VTTREF

R140

4.7K/F_4

R142

4.7K/F_4

R43 *0_6

4.7K/F_4

R42

4.7K/F_4

R143 0_6

SMDDR_VREF_DQ

+SMDDR_VREF_DIMM

SMDDR_VREF_DQ [11]

+SMDDR_VREF_DIMM [11]

4

+1.35VSUS

Place these Caps near So-Dimm1.

1uF/10uF 4pcs on each side of connector

C144 1U/6.3V_4 C156 1U/6.3V_4 C234 1U/6.3V_4 C153 1U/6.3V_4 C108 1U/6.3V_4 C114 1U/6.3V_4 C136 1U/6.3V_4 C154 1U/6.3V_4 C120 10U/6.3V_6

C127 10U/6.3V_6 C150 10U/6.3V_6

C155 10U/6.3V_6 C161 10U/6.3V_6

C160 10U/6.3V_6 C94 10U/6.3V_6

C100 10U/6.3V_6

+0.65V_DDR_VTT

C192 1U/6.3V_4 C189 1U/6.3V_4 C191 1U/6.3V_4 C190 1U/6.3V_4 C193 10U/6.3V_6

+3V

C422 0.1U/10V_4 C427 2.2U/6.3V_6

3

+SMDDR_VREF_DIMM

C162 0.1U/10V_4 C163 *2.2U/6.3V_6

+SMDDR_VREF_DQ1

C37 0.1U/10V_4 C43 *2.2U/6.3V_6

+1.35VSUS[2,8,11,28,35]

+0.65V_DDR_VTT[11,28]

+3V[5,7,9,11,13,14,15,16,17,18,19,20,21,22,23,24,25,35,37]

PROJECT :JWM

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev Custom

Custom

DDR3 DIMM1-STD(4.0H)

Date: Sheet

2

Date: Sheet of

1

1A

12 39Tuesday, August 20, 2013

of

Quanta JWM Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual