Q-Tech QT88HCD User Manual

INCH-POUND
MIL-PRF-55310/33C

1 February 2013
SUPERSEDING

MIL-PRF-55310/33B
19 April 2010

PERFORMANCE SPECIFICATION SHEET

OSCILLATOR, CRYSTAL CONTROLLED, TYPE 1 (CRYSTAL OSCILLATOR (XO)),

500 KHz THROUGH 85 MHz, HERMETIC SEAL, CMOS

This specification is approved for use by all Departments
and Agencies of the Department of Defense.

The requirements for acquiring the product described herein
shall consist of this specification sheet and MIL-PRF-55310.

FIGURE 1. Interface and physical dimensions.

AMSC N/A FSC 5955

MIL-PRF-55310/33C

Ltr

Inches

mm

Min

Max

Min

Max

A

.345 Typ

.355 Typ

8.76 Typ

9.02 Typ

B

.285 Typ

.295 Typ

7.24 Typ

7.49 Typ

C

.086

.114

2.18

2.90

D

.195

.205

4.95

5.21

E

---

.040

---

1.02

F

---

.320

---

8.13

G

.232

.248

5.89

6.30

H

---

.170

---

4.32

J

.015

.021

0.38

0.53

Pin number

Function

1

Enable/disable

2

GND

3

Output

4

B+

NOTES:

1. Dimensions are in inches.

2. Metric equivalents are given for general information only.

3. Unless otherwise specified, tolerances are ±.005 (0.13 mm) for three place decimals and ±.02 (0.5 mm) for two
place decimals.

FIGURE 1. Interface and physical dimensions - Continued.

2

MIL-PRF-55310/33C

REQUIREMENTS:

Interface and physical dimensions: See figure 1.

Mounting: See figure 1.

Terminals: See figure 1.

Seal: Hermetic in accordance with MIL-PRF-55310, maximum leakage rate 5 x 10

Weight: 3 grams, maximum.

Oscillator: Class 2 or any class 1 or class 3 oscillator meeting all class 2 requirements and verification tests
specified herein and in MIL-PRF-55310.

Calibration: Manufacturer calibrated.

Screening: In accordance with MIL-PRF-55310, product level B or S, as applicable.

Temperature:

Operating: See table I.

Storage: -62°C to +125°C.

Load test circuit: See figure 2.

Output waveform: Symmetrical square wave, 5 volt CMOS compatible (see figure 3).

Output logic voltage levels at designated CMOS (see figure 3):

Logic 1: 90 percent of V

, minimum.

DD

Logic 0: 10 percent of V

, maximum.

DD

Rise and fall times: (See table I) Measurements shall be taken at the 10 percent and 90 percent peak-to

-peak output voltage levels, with peak-to-peak output defined as level 1-level 0 (see figure 3).

Duty cycle: See table I and figure 3.

Supply voltage: +5.0 V dc ±10 percent.

Input current: At designated supply voltage (see table I).

Enable/disable:

Output disabled (high impedance): Pin 1 input ≤ 0.3 V dc.

Output active: Pin 1 input ≥ 2.0 V dc or open.

Output frequency: Frequency as designated at time of acquisition (see table I).

Initial accuracy at reference temperature (up to 30 days after shipment): See table I.

-8

atm cc/s.

3