Q-Tech QT50 User Manual

Q-TECH

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Description

Q-Tech’s Dual In-line (DIP) crystal oscillators
consist of a source clock square wave generator, logic
output buffers and/or logic divider stages, and a
round AT high-precision quartz crystal built in a metal
through-hole package in DIP-8 or DIP-14
configurations.

Features

• Made in the USA

• ECCN: EAR99

• DFARS 252-225-7014 Compliant:
Electronic Component Exemption

• USML Registration # M17677

• Wide frequency range from 0.01Hz to 200MHz

• Available as QPL MIL-PRF-55310/8, /11, /14, /15,
/16, /17, /18, /25, and /26

• Wide operating temperature range

• Choice of output logic options

• Supply voltages from 1.8Vdc to 15Vdc

• Lower or higher supply voltages available

• All metal hermetically sealed package

• Tight or custom symmetry available

• Fast rise and fall times

• Fast start-up time

• Capacitive load drive capability (Z output)

• Multiple outputs available

• Fundamental and third overtone designs

• High operating temperature up to +225ºC

• Custom design available tailors to meet customer’s
needs

• Q-Tech does not use pure lead or pure tin in its
products

• RoHS compliant

Applications

• Designed to meet today’s requirements for all voltage
applications

• Wide military clock applications

• Smart munitions

• Navigation

• Industrial controls

• Microcontroller driver

• Down-hole applications up to +225ºC

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

Ordering Information

Sample part number

QT6HCD9M-20. 0 0 0 M H z

QT6HC D9M-40.000MHz

Solder Dip Option:

T =Standard
S = Solder Dip (*)

Package:

(See page 3)

Logic & Supply Voltage:

C = CMOS +5.0V to +15.0V
AC = ACMOS +5.0V
HC = HCMOS +5.0V

T = TTL +5.0V

L = LVHCMOS +3.3V

N = LVHCMOS +2.5V

R = LVHCMOS +1.8V

E = 10K ECL -5.2V
EH = 10KH ECL -5.2V

EF = 100K/300K ECL -4.5V
PE = PECL +5.0V
LP = PECL +3.3V

Z = Z output

Tristate Option:

Blank = No Tristate

D = Tristate

(*) Hot Solder Dip Sn60/Pb40 per MIL-PRF 55310 is optional for an additional cost

Frequency stability vs. temperature codes may not be available in all frequencies.
Q-Tech will assign a custom part number for custom specifications and all high
temperature applications with typical frequency stability at ± 250ppm up to +200ºC.

For Non-Standard requirements, contact Q-Tech Corporation at [e-mail]

(**) Please specify supply voltage when ordering CMOS

(**)

1 = ± 100ppm at 0ºC to +70ºC
3(***) = ± 5ppm at 0ºC to +50ºC
4 = ± 50ppm at 0ºC to +70ºC
5 = ± 25ppm at -20ºC to +70ºC
6 = ± 50ppm at -55ºC to +105ºC

9 = ± 50ppm at -55ºC to +125ºC
10 = ± 100ppm at -55ºC to +125ºC
11 = ± 50ppm at -40ºC to +85ºC
12 = ± 100ppm at -40ºC to +85ºC

(*** ) Requires an external capacitor

Packaging Options

• Standard packaging in black foam

• Optional anti-static plastic tube

Other Options Available For An Additional Charge

• Lead forming available on all packages. Please contact for details.

• P. I. N. D. test (MIL-STD 883, Method 2020)

• Lead trimming

All DIP packages are available in surface mount form.

Specifications subject to change without prior notice.

Output Frequency

Blank=No Screening

Frequency vs. Temperature Code:

Screening Option:

M=Per MIL-PRF-55310, Level B

Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: [phone] - Fax: [phone] - www.q-tec h.com

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Electrical Characteristics

Parameters C AC HC T L (*) ECL / PECL (**)

DIP 14:

Output freq.
range (Fo)

Supply voltage (Vdd)

Maximum Applied Voltage (Vdd max.)

Freq. stability (∆F/∆T) See Option codes
Operating temp. (Topr) See Option codes
Storage temp. (Tsto)

Operating supply current
(Idd) (No Load)

QT6, 18, 41, 42, 47

DIP 8: QT50, 51, 55

0.01Hz — 15MHz

245Hz — 15MHz

5V ~ 15Vdc ± 10% 5.0Vdc ± 10%

-0.5 to +18Vdc

F and Vdd dependent

3 mA max. at 5V up to 5MHz

25 mA max. at 15V up to 15MHz

0.01Hz — 160MHz 0.01Hz — 160MHz 0.01Hz — 160MHz 0.01Hz — 160MHz 1MHz — 200MHz

0.01Hz — 85MHz 0.01Hz — 85MHz

-0.5 to +7.0Vdc

20 mA max. - 0.01Hz ~ < 16MHz
25 mA max. - 16MHz ~ < 40MHz
35 mA max. - 40MHz ~ < 60MHz
45 mA max. - 60MHz ~ < 85MHz
55 mA max. - 85MHz ~ < 110MHz
65 mA max. - 110MHz ~ < 125MHz
75 mA max. - 125MHz ~ 160MHz

10Hz — 85MHz

-62ºC to + 125ºC

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

0.01Hz — 100MHz

3.3Vdc ± 10%

-0.5 to +5.0Vdc

3 mA max. - 0.01Hz ~ < 500kHz

6 mA max. - 500kHz ~ < 16MHz
10 mA max. - 16MHz ~ < 32MHz
20 mA max. - 32MHz ~ < 60MHz
30 mA max. - 60MHz ~ < 100MHz
40 mA max. - 100MHz ~ < 130MHz
50 mA max. - 130MHz ~ 160MHz

1MHz — 110MHz

-5.2Vdc ± 5% (10K / 10KHECL)

5.0Vdc ± 5% (PECL)

3.3Vdc ± 5% (LVPECL)

0 to -8.0Vdc (10K / 10KHECL)
0 to +8.0Vdc (PECL)
0 to +5.0Vdc (LVPECL)

45 mA max. - 1MHz ~ < 125MHz
75 mA max. - 125MHz ~ 200MHz

Symmetry
(50% of ouput waveform or 1.4Vdc for TTL)

Rise and Fall times (Tr/Tf)
(with typical load)

Output Load

Start-up time (Tstup) 10ms max.

Output voltage (Voh/Vol)

Output Current (Ioh/Iol)

Enable/Disable
Tristate function Pin 1

Jitter RMS 1σ (at 25ºC)

Aging (at 70ºC)

45/55% max. Fo < 4MHz
40/60% max. Fo ≥ 4MHz

30ns max.

(Measured from 10% to 90%)

± 1mA typ. at 5V
± 6.8mA typ. at 15V

Call for details

(Measured from 10% to 90% CMOS or from 0.8V to 2.0V TTL)

15pF // 10kΩ

0.9 x Vdd min.; 0.1 x Vdd max. 2.4V min.; 0.4V max. 0.9 x Vdd min.; 0.1 x Vdd max. -1.15V min; -1.54V max. (E)

± 24mA ±8 mA

VIH ≥ 2.2V Oscillation;

VIL ≤ 0.8V High Impedance

8ps typ. - < 40MHz

5ps typ. - ≥ 40MHz

± 5ppm max. first year / ± 2ppm typ. per year thereafter

45/55% max. Fo < 12MHz
40/60% max. Fo ≥ 12MHz

15ns max. Fo < 15kHz

6ns max. Fo 15kHz ~ 39.999MHz

3ns max. Fo 40MHz ~ 160MHz

10TTL Fo < 20MHz

6TTL Fo ≥ 20MHz

-1.6mA / TTL
+40μA / TTL

15pF // 10kΩ

± 4mA .

VIH ≥ 0.7 x Vdd Oscillation;

VIL ≤ 0.3 x Vdd High Impedance

15ps typ. - < 40MHz

8ps typ. - ≥ 40MHz

45/55% max. Fo < 12MHz
40/60% max. Fo ≥ 12MHz

3.5ns max. Fo < 125MHz
3ns max. Fo 125MHz ~ 200MHz

(Measured from 20% to 80%)

50Ω to -2V (10K / 10KH)
50Ω to Vcc -2V (P & LP)

4V min.; 3.37V max. (PE)

2.27V min.; 1.68V max. (LP)

Integrated phase jitter

12kHz - 20MHz 1ps typ.

(*) Available in 2.5Vdc (N) or 1.8Vdc (R)
(**) Please contact Q-Tech for details on 100KECL logic (EF)

Z Output logic can drive up to 200 pF load with typical 6ns rise & fall times (tr, tf)

Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: [phone] - Fax: [phone] - www.q-t ech.co m

Dual In-line Packages (Revision G, August 2011 ) (ECO# 10297)

-50mA

Call for details

2

Q-TECH

1 4

58

Q-TECH
P/N
FREQ.
D/C S/N

.200

(5.08)

.250

(6.35)

(.508)

.020

(7.62)

.300

.505

(12.83)

(.457)

.018

MAX.

MIN.

SQ.
MAX.

SQ.

ø .060

(ø 1.52)

.011

.024

(7.366)

FREQ.
D/C S/N

.300

.505

(7.62)

.200

85

41

P/N

Q-TECH

(5.080)

.290

.080 ± .010

(2.032±.254)

.020

(.508)(.279)

(12.83)

.300

SQ.
MAX.

SQ.

(.609)

(7.62)

MAX.

MAX.

14

58

Q-TECH
P/N
FREQ.
D/C S/N

.200

(5.08)

.250

(6.35)

(7.62)

.300

.505

(12.83)

(.457)

.018

MAX.

MIN.

SQ.
MAX.

SQ.

17

814

Q-TECH
P/N
FREQ.
D/C S/N

(22.35)

(15.24)

.880

.600

.300

(7.62)

(2.54)

.100

.505

(12.83)

MAX.

(.457)

.018

MIN.

(5.08)

.200

.200

(5.08)

MAX.

MAX.

14 8

71

FREQ.

P/N

Q-TECH

.800

(20.32)

(7.62)

.300

.100

(2.54)

.600

(15.24)

(12.83)

.505

.018

(.457)

.200

(5.08)

MIN.

MAX.

(5.08)

.200

MAX.

D/C S/N

MAX.

14 8

71

FREQ.
D/C S/N

P/N

Q-TECH

.600

(15.24)

(7.62)

.300

.200

(5.08)

MAX.

MIN.

(5.08)

.200

(.457)

.018

MAX.

(20.32)

.800

.505

(12.83)

MAX.

Q-TECH
P/N

.600

.800

.200

.505

.300

.200

.018

FREQ.
D/C S/N

(12.83)

(7.62)

MAX.

(5.08)

MAX.

(5.08)

MIN.

(.457)

(20.32)

MAX.

(15.24)

17

814

ø .080

(ø 2.03)

.020

(.508)

.600

.011

.200

MAX.

.024

P/N
FREQ.
D/C S/N

.800

.505

(7.62)

Q-TECH

(5.08)

MAX.

(15.24)

MAX

.290

(7.36)

(.279)

(12.83)

MAX.

.300

(20.32)

MAX.

(.609)

1 7

8

14

.080 ± .010

(2.032±.254)

.020

(.508)

COR PORATI ON

Package Outline and Pin Connections

Dimensions are in inches (mm)

A

QT6, QT48

B

QT18

DIP 14

C

QT41

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

D

QT42

E

QT47

F

QT50

Package Information

• Package material (header and leads): Kovar

• Lead finish: Gold Plated – 50µ ~ 80µ inches
Nickel Underplate – 100µ ~ 250µ inches

• Package to lid attachment: Resistance weld

• Cover: (DIP-14): Pure Nickel Grade A
(DIP-8): Stainless Steel

• Weight: (DIP-14): 3.4g typ.,14.2g max.

(DIP-8): 2.0g typ., 14.2g max.

Dual In-line Packages (Revision G, August 2011 ) (ECO# 10297)

Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: [phone] - Fax: [phone] - www.q-tec h.com

G

QT51

DIP 8

H

QT55

QT # Conf Vcc GND Case

Output

(*)

E/D

or

N/C

Ext.

Cap

Equivalent

MIL-PRF-55310

Configuration

QT4 A 4 7 7 5 1 10 & 11 /14 = QT4T

/16 = QT6T

QT6 A 14 7 7 8 1 10 & 11

/17 = QT6T
/18 = QT6C

/26A = QT6HC

/08 = QT10T

QT10 A 14 8 2 1 N/A 10 & 11

/11 = QT10C

/15 = QT10C

QT12 A 14 7 7 4 1 10 & 11 N/A

QT18 B 14 7 7 8 1 10 & 11 N/A

QT41 C 14 7 7 8 1 N/A /26B = QT41HC

QT42 D 14 7 7 8 1 N/A N/A

QT47 E 14 7 7 8 1 N/A N/A

QT48 A 7 14 14 8 N/A N/A /25 - QT48E

QT50 F 8 4 4 5 1 N/A N/A

QT51 G 8 4 4 5 1 N/A N/A

QT55 H 8 4 4 5 1 N/A N/A

(*) ECL / PECL complimentary output available on pin 9

(For QT6 and QT18 only) with a Q-Tech custom part
number

(**) Gated Output, gate control pin 9

(***) -5.2V Vcc (Pin 7)

3

(**)

(***)

Q-TECH

Vdd

GND

0.1xVdd

0.9xVdd

VOH

VOL

Tr Tf

TH

T

0.5xVdd

SYMMETRY = x 100%

TH

T

Ts

Start-up box

Oscilloscope

DUT

Variable Ramp

54616B Agilent

TYPICAL SET-UP FOR START-UP TIME

14

7

8

10 11

QT6T3

+5VDC

GND

OUTPUT

0.01uF

12pF(*)

10k

D1

D2

D3

D4

Cext

D1-D4: 1N4148 or equivalent

TYPICAL TEST CIRCUIT FOR QT6T3 (6TTL)

430

(*) CL includes scope probe capacitance

-

-

Output

Ground

0.1µF

15pF

Tristate Function

Power
supply

10k

mA

Vdc

+

+

+

(*)

or

0.01µF

(*) CL includes probe and jig capacitance

Typical test circuit for CMOS logic

Vdd Out

GNDE/D

POWER
SUPPLY

+

-

mA

0.1µF

Vdc

-

Vdd OUT

OUT

GND

Typical test circuit for TTL logic.

0.01µF

Rs

(*) CL inclides the loading effect of the oscilloscope probe.

E/D

C

L

+

+

-

RL

LOAD

6 TTL

10 TTL

CL(*)
12pF

20pF

RL
430Ω

270Ω

RS

10kΩ

6kΩ

or

Vdd

POWER

SUPPLY

+

-

mA

Vdc

+

-

GND OUT

OUT

Vcc

Typical test circuit for ECL logic.

0.1µF
or

0.01µF

50Ω

-2Vdc

-4.5V
or

-5.2V

FREQUENCY VERSUS TEMPERATURE QT6L9M-64.5MHz

-40

-30

-20

-10

0

10

20

30

40

-55 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Temperature (°C)

1_5 2_5 3_5

Frequency Stability (PPM)

COR PORATI ON

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

Output Waveform (Typical)

Test Circuit

Startup Time

The Tristate function on pin 1 has a built-in pull-up resistor typical 50kΩ, so it can
be left floating or tied to Vdd without deteriorating the electrical performance.

Frequency vs. Temperature Curve

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45º 45º

Hybrid Case

Substrate

Die

D/A epoxy

D/A epoxy

Heat

Die

R1

D/A epoxy

Substrate

D/A epoxy

Hybrid Case

R2 R3 R4 R5

JA JC CA

Die

T

T

T

C

A

J

CA

JC

COR PORATI ON

Thermal Characteristics

The heat transfer model in a hybrid package is described in figure 1
(Based on single ASIC design) .

Heat spreading occurs when heat flows into a material layer of increased
cross-sectional area. It is adequate to assume that spreading occurs at a
45° angle.

The total thermal resistance is calculated by summing the thermal
resistances of each material in the thermal path between the device and
hybrid case.

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

RT = R1 + R2 + R3 + R4 + R5

(Figure 1)

The total thermal resistance RT (see figure 2) between the heat source
(die) to the hybrid case is the Theta Junction to Case (Theta JC) in°C/W.

• Theta junction to case (Theta JC) for this product is 24°C/W.

• Theta case to ambient (Theta CA) for this part is 105°C/W.

• Theta Junction to ambient (Theta JA) is 130°C/W.

Maximum power dissipation PD for this package at 25°C is:

• PD(max) = (TJ (max) – TA)/Theta JA

• With TJ = 175°C (Maximum junction temperature of die)

• PD(max) = (175 – 25)/130 = 1.15W

(Figure 2)

Environmental Specifications

Q-Tech Standard Screening/QCI (MIL-PRF55310) is available for all of our DIP packages. Q-Tech can also customize screening
and test procedures to meet your specific requirements. The DIP packages are designed and processed to exceed the following test
conditions:

Environmental Test Test Conditions

Temperature cycling MIL-STD-883, Method 1010, Cond. B
Constant acceleration MIL-STD-883, Method 2001, Cond. A, Y1
Seal: Fine and Gross Leak MIL-STD-883, Method 1014, Cond. A and C
Burn-in 160 hours, 125°C with load
Aging 30 days, 70°C, ± 0.7ppm max
Vibration sinusoidal MIL-STD-202, Method 204, Cond. D
Shock, non operating MIL-STD-202, Method 213, Cond. I
Thermal shock, non operating MIL-STD-202, Method 107, Cond. B
Ambient pressure, non operating MIL-STD-202, 105, Cond. C, 5 minutes dwell time minimum
Resistance to solder heat MIL-STD-202, Method 210, Cond. C
Moisture resistance MIL-STD-202, Method 106
Terminal strength MIL-STD-202, Method 211, Cond. C
Resistance to solvents MIL-STD-202, Method 215
Solderability MIL-STD-202, Method 208
ESD Classification MIL-STD-883, Method 3015, Class 1HBM 0 to 1,999V
Moisture Sensitivity Level J-STD-020, MSL=1

Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: [phone] - Fax: [phone] - www.q-tec h.com

Dual In-line Packages (Revision G, August 2011 ) (ECO# 10297)

Please contact Q-Tech for higher shock requirements

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Period Jitter

As data rates increase, effects of jitter become critical with its
budgets tighter. Jitter is the deviation of a timing event of a
signal from its ideal position. Jitter is complex and is
composed of both random and deterministic jitter
components. Random jitter (RJ) is theoretically unbounded
and Gaussian in distribution. Deterministic jitter (DJ) is
bounded and does not follow any predictable distribution. DJ
is also referred to as systematic jitter. A technique to measure
period jitter (RMS) one standard deviation (1σ) and peak-to­peak jitter in time domain is to use a high sampling rate (>8G
samples/s) digitizing oscilloscope. Figure shows an example
of peak-to-peak jitter and RMS jitter (1σ) of a QT6AC8­24MHz, at 5.0Vdc.

DUAL IN-LINE PACKAGES

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.01Hz to 200MHz

Phase Noise and Phase Jitter Integration

RMS jitter (1σ): 5.86ps Peak-to-peak jitter: 52.4ps

Phase noise is measured in the frequency domain, and is expressed as a ratio of signal power to noise power measured in a 1Hz bandwidth
at an offset frequency from the carrier, e.g. 10Hz, 100Hz, 1kHz, 10kHz, 100kHz, etc. Phase noise measurement is made with an Agilent
E5052A Signal Source Analyzer (SSA) with built-in outstanding low-noise DC power supply source. The DC source is floated from the
ground and isolated from external noise to ensure accuracy and repeatability.

In order to determine the total noise power over a certain frequency range (bandwidth), the time domain must be analyzed in the frequency
domain, and then reconstructed in the time domain into an rms value with the unwanted frequencies excluded. This may be done by
converting L(f) back to Sφ(f) over the bandwidth of interest, integrating and performing some calculations.

Symbol

∫L(f)

Sφ (f)=(180/Π)x√2 ∫L(f)df

RMS jitter = Sφ (f)/(fosc.360°) Jitter(in seconds) due to phase noise. Note Sφ (f) in degrees.

Integrated single side band phase noise (dBc)

Spectral density of phase modulation, also known as RMS phase error (in degrees)

Definition

The value of RMS jitter over the bandwidth of interest, e.g. 10kHz to 20MHz, 10Hz to 20MHz, represents 1 standard deviation of phase
jitter contributed by the noise in that defined bandwidth.

Figure below shows a typical Phase Noise/Phase jitter of a QT6AC8, 5.0Vdc, 24MHz and a QT50T, 5.0Vdc, 60 MHz clock at offset
frequencies 10Hz to 5MHz, and phase jitter integrated over the bandwidth of 12kHz to 1MHz.

QT6AC8, 5.0Vdc, 24MHz

Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: [phone] - Fax: [phone] - www.q-tec h.com

Dual In-line Packages (Revision G, August 2011 ) (ECO# 10297)

QT50T, 5.0Vdc, 60 MHz

6