106P0236.13March 31, 2010Updated Table 4-4, “MMC Sensors,” on page 60. Updated the
command code for the Get Geographic Address command in
Table 4-5, “PPS Extension Commands Supported by the MMC,”
on page 63, and in “Get Geographic Address Command,” on page
69. Updated “Get Status Command,” on page 64. Added
“Installing a Storage Module,” on page 86.
106P0236.14June 08, 2010Updated branding and format. Removed “pending” from Chapter
brand names may be trademarks or registered trademarks of their respective owners.
This document is the sole property of Performance Technologies, Inc.
Errors and Omissions
Although diligent efforts are made to supply accurate technical information to the user,
occasionally errors and omissions occur in manuals of this type. Refer to the Performance
Technologies, Inc. Web site to obtain manual revisions or current customer information:
http://www.pt.com.
Performance Technologies, Inc., reserves its right to change product specifications without
notice.
2
Page 3
Symbol Conventions in This Manual
Caution:
Warning:
Caution:
The following symbols appear in this document:
There is risk of equipment damage. Follow the instructions.
Hazardous voltages are present. To reduce the risk of electrical shock and danger to
personal health, follow the instructions.
Electronic components on printed circuit boards are extremely sensitive to static electricity.
Ordinary amounts of static electricity generated by your clothing or work environment can
damage the electronic equipment. It is recommended that anti-static ground straps and antistatic mats are used when installing the board in a system to help prevent damage due to
electrostatic discharge.
Additional safety information is available throughout this manual and in the topic “Product Safety
This manual describes the operation and use of the AMC123 Intel® EP80579 Integrated
Processor AdvancedMC
In these chapters you will find installation and configuration information, plus a functional block
description intended for the application developer of this board. Here is a brief description of
what you will find in this manual:
Chapter 1, “About This Guide” this chapter, provides links to all other chapters in this manual,
customer support and services, and product warranty information for the AMC123.
Chapter 2, “Introduction,” on page 19, provides an overview of the AMC123 and includes
information such as module features, functional block diagram, and a brief description of each
block.
Chapter 3, “Getting Started,” on page 35, provides setup information such as unpacking the
module, system requirements, and installation procedures.
Chapter 4, “System Monitoring and Alarms,” on page 55, describes the functionality and
commands supported by the on-board Module Management Controller (MMC), sensors
monitored by the MMC, the Serial Interface Subsystem (SIPL), and the firmware upgrade
process.
Chapter 5, “Connectors,” on page 79, provides connector location, description, and pinout
information for the AMC123’s AdvancedMC card edge connector, front panel and internal
connectors, and the serial console cable.
Chapter 6, “Reset,” on page 89, describes the AMC123 reset types with their respective
sources.
™
(AMC) module (referred to as the AMC123 in this manual).
Chapter 7, “Specifications,” on page 93, contains mechanical, electrical, and environmental
specifications as well as product reliability specifications.
Chapter 8, “Thermal Considerations,” on page 97, describes the thermal requirements to
reliably operate an AMC123 processor module.
Chapter 9, “Agency Approvals,” on page 99, presents agency approval and certification
information.
Chapter 10, “Data Sheet Reference,” on page 103, provides information on data sheets,
standards, and specifications for the technology designed into the AMC123.
The AMC123 assembly should be used in conjunction with the PT software package that you
have chosen, for example, Windows
The most current documentation to support any additional components that you purchased
from PT is available at www.pt.com under the product you are inquiring about.
®
XP® Embedded or NexusWare
®
Core.
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Chapter 1: About This Guide
Text Conventions
This manual uses the following conventions:
ConventionUsed For
Monospace font
Bold fontBold font represents:
Italic fontItalic font represents:
Monospace font represents sample code.
• Paths
• File names
• UNIX commands
• User input
• Notes that supply useful advice
• Supplemental information
• Referenced documents
Customer Support and Services
PT offers a variety of standard and custom support p ackages to ensure customers have access
to the critical resources that they need to protect and maximize hardware and software
investments throughout the development, integration, and deployment phases of the product
life cycle.
If you encounter difficulty in using this PT product, you may contact our support personnel by:
1. EMAIL (Preferred Method) – Email us at the addresses listed below or use our online email support
form. Outline your problem in detail. Please include your return email address and a telephone
number.
2. TELEPHONE – Contact us via telephone at the number listed b elow, and request Techn ical Sup port.
Our offices are open Monday to Friday, 8:00 a.m. to 8:00 p.m. (Eastern Time).
PT Support Contact Information
Embedded Systems and Software
(Includes Platforms, Blades, and Servers)
Email
Phone
If you are located outside North America, we encourage you to contact the local PT distributor
or agent for support. Many of our distributors or agents maintain technical support staffs.
+1 (585) 256-0248
(Monday to Friday, 8 a.m. to 8 p.m.
Eastern Time)
SS7 Systems
(Includes SEGway™)
+1 (585) 256-0248
(Monday to Friday, 8 a.m. to 8 p.m.
Eastern Time)
Customer Support Packages
Our configurable development and integration support packages help customers maximize
engineering results and achieve time-to-market goals. To find out more about our Customer
Support packages, visit http://www.pt.com/page/support/.
16
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Other Web Support
Support for existing products including manuals, release notes, and drivers can be found on
specific product pages at http://www.pt.com. Use the product search to locate the information
you need.
Return Merchandise Authorization (RMA)
To submit a return merchandise authorization (RMA) request, complete the online RMA form
available at http://pt.com/assets/lib/files/rma-request-form.doc and follow the instructions on
the form. You will be notified with an RMA number once your return request is approved.
Shipping information for returning the unit to PT will be provided once the RMA is issued.
Product W arranty
Performance Technologies, Incorporated, warrants that its products sold hereunder will at the
time of shipment be free from defects in material and workmanship and will conform to
Performance Technologies’ applicable specifications or, if appropriate, to Buyer’s specifications
accepted by Performance Technologies in writing. If products sold hereunder are not as
warranted, Performance Technologies shall, at its option, refund the purchase price, repair, or
replace the product provided proof of purchase and written notice of nonconformance are
received by Performance Technologies within 12 months of shipment, or in the case of
software and integrated circuits within ninety (90) days of shipment and provided said
nonconforming products are returned F.O.B. to Performance Technologies’s facility no later
than thirty days after the warranty period expires. Products returned under warranty claims
must be accompanied by an approved Return Material Authorization number issued by
Performance Technologies and a statement of the reason for the return. Please contact
Performance Technologies, or its agent, with the product serial number to obtain an RMA
number. If Performance Technologies determines that the products are not defective, Buyer
shall pay Performance Technologies all costs of handling and transportation. This warranty
shall not apply to any products Performance Technologies determines to have been subject to
testing for other than specified electrical characteristics or to operating and/or environmental
conditions in excess of the maximum values established in applicable specifications, or have
been subject to mishandling, misuse, static discharge, neglect, improper testing, repair,
alteration, parts removal, damage, assembly or processing that alters the p hysica l or electrical
properties. This warranty excludes all cost of shipping, customs clearance and related cha rges
outside the United States. Products containing batteries are warranted as above excluding
batteries.
Product Warranty
THIS WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES WHETHER EXPRESS,
IMPLIED OR ST A TUTOR Y INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR
FITNESS. IN NO EVENT SHALL PERFORMANCE TECHNOLOGIES BE LIABLE FOR ANY
INCIDENTAL OR CONSEQUENTIAL DAMAGES DUE TO BREACH OF THIS WARRANTY
OR ANY OTHER OBLIGATION UNDER THIS ORDER OR CONTRACT.
17
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Chapter 1: About This Guide
18
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Overview
This chapter provides a brief introduction to the AMC123 32-bit Intel® EP80579 Integrated
Processor AMC module. It includes a product definition, a list of product features, a figure
showing the AMC123 front panel, a functional block diagram, and a description of each block.
Unpacking, initial board configuration and other setup information are provided in Chapter 3,
“Getting Started,” on page 35.
Key topics in this chapter include:
•“Product Definition,” on page 20
•“AMC123 Features,” on page 20
•“AMC123 Front Panel,” on page 23
•“AMC123 Functional Blocks,” on page 24
•“Software,” on page 34
Chapter 2
Introduction
19
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Chapter 2: Introduction
Product Definition
The AMC123 is a 32-bit AdvancedMC single-board compute module, featuring the 1.2 GHz
Intel EP80579 Integrated Processor, a complete system on-a-chip (SOC) processor designed
for high-performance embedded applications. The module utilizes a single 333.5 MHz PC25300 64-bit SO-RDIMM with Error Correction Code (ECC), up to 4 GB is supported using
2 Gbit DRAM technology , an d 2 GB using 1 Gbit DRAM technology. The AMC123 incorporates
a 16 GB USB flash storage module, or an optional 16 GB Serial ATA (SATA) flash storage
module on the SO-DIMM.
Ethernet connectivity is available through dual front panel RJ45 10/100/1000Base-T Ethernet
ports. The AMC123 also supports the PCI Industrial Comp uter Manufacturers Group (PICMG)
sub-specifications AMC.1 (x1, x4, or x8 PCI Express), AMC.2 (Gigabit Ethernet), and AMC.3
Type 1 (SATA II) to ensure a comprehensive set of interconnecting capabilities to the carrier
board. A standard USB 2.0 port and an RJ9 console port are also provided on the front panel.
The AMC123 is compliant with the PICMG AMC.0 specification and adheres to mechanical,
power, thermal, interconnect, and management functions defined in this specification.
AMC123 Features
The AMC123 includes the following features:
•Single, mid-size PICMG AMC.0 processor module
•PICMG AMC.0, R 2.0 compliant
•IPMI v1.5 specification compliant
•1.2 GHz Intel EP80579 Integrated Processor
– Intel architecture complex based on the Intel Pentium
– Integrated memory controller hub supporting:
•Four-channel Enhanced Direct Memory Access (EDMA) controller
•Single PCI Express interface up to x1, x4, or x8 supported on port A, or split into two x4
interfaces (x1 or x4)
– Integrated I/O controller hub
– Integrated I/O support with three Ethernet MACs, two Controller Area Network (CAN) interfaces
and a local expansion bus interface
– 256 KB of L2 cache
– 400/533 MHz internal Front Side Bus (FSB)
®
M processor
®
20
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AMC123 Features
•AMC card edge interface contains:
– up to two Serializer/Deserializer (SerDes) 1Gb Ethernet channels
– eight-lane PCI Express bus
– two SATA channels
– one USB connection
•Front panel connectivity supports:
– up to two 10/100/1000
Mbps Ethernet ports via RJ45 connectors
– one USB 2.0 port
– one RS232 serial port with 15 KV electrostatic discharge (ESD) protection
•Supports up to 4 GB of 64-bit 333.5 MHz PC2-5300, DDR2-667, SDRAM (with ECC) in a 200-pin
SODIMM connector socket
•Supports up to 16 GB of flash storage via two options:
– a USB solid-state disk drive (uSSD) with a USB 2.0 interface
– a SATA solid-state disk module (SDM) with a SATA II interface
•Optionally, a solid-state double data rate (SSDDR) module combines a SATA solid state drive (SATA
SSD) and DDR synchronous dynamic RAM (DDR SDRAM) technologies in a single SODIMM
package
•System management bus (SMBus)
•8 or 16 Mb Low Pin Count (LPC)-based Boot PROM
•PT's Embedded BIOS (AMI BIOS
•Supports Windows XP, Windows XP Embedded, Linux
®
core) stored in local flash memory
®
, and Solaris™ operating systems
•Supports NexusWare Core CGL OS and development environment
•IPMI interface on the AMC connector
•Push-button reset switch
•LEDs:
– Out-of-Service (OOS) (red/amber) and In Service (IS) (green/amber) (PICMG Advanced
Mezzanine Card AMC.0 Specification R2.0 indicators)
– USER LED (green/amber)
– Hot Swap (blue/off)
– Front Panel Ethernet: Link (green/amber), Activity (flashing yellow)
21
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Chapter 2: Introduction
Configuration Options and Accessories
The AMC123 is offered as a single, mid-size or full-size1 AMC module with the following
options:
•4 GB USB solid-state disk drive (uSSD) with a USB 2.0 interface (PT-UDM4G-12376)
•4 GB SATA solid-state disk module (SDM) with a SATA II interface (PT-SDM4G-12377)
See “USB and SATA Flash Storage Options,” on page 26 for more information about these
options.
Serial Console Cable Kit
The front panel RJ9 serial connector on the AMC123 may be used to access the MMC
Command Line Interface or the COM1 port with an RJ9-to-RJ11 serial console cable. This can
be done using an RJ9 to RJ11 serial console cable kit (PT-ACC101-12383).
The serial console cable kit consist of the following items:
•A plastic bag (part number 160Q051310) containing a:
– DB9-to-RJ11 serial adapter
– Null modem adapter
– RJ11 (6P4C)-to-RJ11 (6P4C) interface cable
•An RJ9 (4P4C)-to-RJ11 (6P4C) interface cable (part number 160Q06541)
Usage
The RJ11-to-RJ11 cable is used when connecting to the AMP507x chassis or other PT AMC
products such as the AMC121 or AMC122. The RJ9-to-RJ11 cable is used when connecting to
the AMC123. The RJ9 connector goes into the AMC123 serial port and the RJ11 connector
goes into the DB9-to-RJ11 adapter. The null modem usually goes between the DB9-to-RJ11
adapter and computer terminal port.
See “Serial Console Cable,” on page 87 for more information.
The front panel of the AMC123, shown in Figure 2-1, “AMC123 Front Panel,” contains the
following elements:
•Standard AMC.0 LED indicators: OOS LED and IS LED. See “LED Indicators,” on page 31.
•Two RJ45 10/100/1000Base-T Ethernet port connectors. See “Ethernet Interface s,” on page 30.
Each connector contains two LEDs, see “Ethernet Link and Activity LEDs,” on page 32.
•One User-defined LED Indicator. See “User LED,” on page 32.
•One push-button reset switch. See “Push-Button Reset Switch (SW1),” on page 42.
•One standard Type A USB 2.0 port connector. See “Universal Serial Bus,” on page 27.
•One RJ9 serial port connector. See “Serial I/O,” on page 27.
•An insert/extraction (hot-swap) handle. See “Hot-Swap Switch (SW5),” on page 44.
•Standard AMC.0 hot-swap LED indicator. See “LED Indicators,” on page 31.
Figure 2-1: AMC123 Front Panel
AMC123 Front Panel
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Chapter 2: Introduction
AMC123 Functional Blocks
Figure 2-2, “AMC123 Functional Block Diagram,” presents the functional blocks of the
AMC123. The topics following the figure provide an overview of each functional block found on
the AMC123.
Figure 2-2: AMC123 Functional Block Diagram
IntelEP80579 Integrated Processor
The AMC123 is built around the Intel EP80579 Integrated Processor — a 1.2 GHz, 19W
Thermal Design Power (TDP), high performance, low power 32-bit processor with 256 KB of L2
data coherent cache.
The Intel EP80579 Integrated Processor is an integrated system on-a-chip (SOC) processor,
which includes an Intel architecture complex based on the Intel Pentium M processor,
integrated memory controller hub, integrated I/O controller hub, and flexible integrated I/O
support with three Ethernet MACs, two CAN interfaces and a local expansion bus interface.
The Intel EP80579 Integrated Processor features:
•System on-a-chip (SOC)
– Integrated Intel Architecture (IA) processor and chipset (MCH/ICH) technology
– Extensive integration of standard Intel architecture communications interfaces provide cost, power
and board area savings
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AMC123 Functional Blocks
•Intel Architecture Processor
– Low-power and high-performance architecture based on Intel Architecture (IA-32) processor
– Three operating frequency SKUs: - 600 MHz, 1066 MHz, or 1200 MHz
– Internal 400 or 533 MHz FSB interface
– 256 KB two-way level 2 cache (L2)
•Integrated Memory Control Hub (IMCH) and Inte grated I/O Control Hub (IICH) Compatible. The IMCH
provides the main path to memory for the IA-32 core and all peripherals that perform coherent I/O
(e.g. PCI Express, the IICH to coherent memory).
– Enhanced DMA (EDMA) controller
– Two SATA (Gen1 or Gen2) interfaces
– Two USB 2.0 ports
– Two 16550-compatible UARTs
– One LPC 1.1 interface
– One Serial Peripheral Interface (SPI) boot interface
– Two SMBus/I
– 36 General Purpose I/O (GPIO) ports
– Watchdog Timer
– One 32/64-bit and two 32-bit high-precision event timers
•Single-Channel DDR SDRAM Memory
– Supports DDR2 at 400/533/667/800 MT/s
– Supports 32 or 64-bit interfaces
– Error correction code (ECC); single-bit correct/double-bit detect (SEC/DED) coverage
– Addressable from Intel architecture processor and PCI Express
•Three Gigabit Ethernet MACs
– Three 10/100/1000 ports with RGMII/RMII interfaces
– Management Data Input/Output (MDIO) interface for external PHY configuration
– Serial EEPROM interface supports network boot and wake-on LAN
•Industry Standard PCI Express Interface
– Supports 1x8, 2x4, or 2x1 configurations as a root complex
•Integrated SATA Host Controllers
– Independent DMA operation on two ports
– Data transfer rates up to 3.0 Gb/s
– Alternate Device ID
•Local Expansion Bus (LEB)
– Supports up to eight chip select external slaves (one of which can be a master)
– 25-bit address and 16-bit data
•Two CAN 2.0b interfaces
•One Synchronous Serial Port (SSP)
•IEEE 1588-2008 Hardware Assistance
– Real-time network synchronization on two GbE and two CAN interfaces
– Time master/target support
•Integrated real-time clock (RTC) suppor t
2
C interfaces
See “Processor,” on page 103 for links to additional information for this device.
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Chapter 2: Introduction
Module Management Controller
The AMC123 includes a Module Management Controller (MMC) based on the Atmel
ATMEGA128L-8MU, which interfaces to the local Intelligent Platform Management bus (IPMBL). The MMC monitors and controls the module’s payload per the PICMG AMC.0 specification.
See Chapter 4, “System Monitoring and Alarms,” on page 55 for more information on MMC
functionality, supported commands, AMC123 sensors, and the firmware upgrade process.
The AMC123 is compliant with standard Intelligent Platform Management Interface v1.5 Specification functionality. See “Module Management Controller,” on page 104, for information
about this specification.
Memory
The AMC123 supports one 200-pin, Small Outline Registered Dual In-line Memory Module
(SO-RDIMM) connector socket that can be populated with a single DDR2-667 Registered
SDRAM (64-bit + ECC). The socket supports up to a 4 GB, 333.5 MHz DDR2-667 memory
module with ECC error detection and correction. The BIOS automatically determines the
SDRAM's size and speed.
An integrated memory controller resides in the Intel EP80579 Integrated Processor, which
supports 64-bit data plus 8-bit ECC and can operate to a maximum clock frequency of
400 MHz.
See “Memory Configuration,” on page 36, for more information.
USB and SATA Flash Storage Options
The AMC123 includes a 20-pin 2 mm header which supports the installation of one of the
following storage modules for on-board flash storage:
•A standard USB solid-state disk drive (uSSD) with a USB 2.0 interface
•A standard SATA solid-state disk module (SDM) with a SATA II interface
Both devices support up to 16 GB of on-board flash.
The storage modules (uSSD or SDM) can be ordered separately as add-on devices for the
AMC123. A 4 GB module is the standard ordering option. Cont act PT’ s “Customer Support and
Services,” on page 16, for more information. See “uSSD/SDM Storage Interface Connector
(P5),” on page 85, for storage module installation instructions.
The Intel EP80579 Integrated Processor supports two USB 2.0 host controller ports — one port
dedicated for front-panel (described above), and a second port routed to on-board devices,
such as the uSSD, or to the AMC card edge. The routing of the second port is controlled via a
BIOS setup option. See “SW4-3 — USB Port 1 Control,” on page 44, for more information
about this option.
The SA TA controller resides in the Intel EP80579 Integrated Processor. See “SATA Interfaces,”
on page 29, for more information. The topic “Processor,” on page 103, provides a link to the
data sheet for this device. Connector locations and pinouts for this header, as well as
instructions for installing a storage module, are documented in “uSSD/SDM Storage Interface
Connector (P5),” on page 85.
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Optional SATA Flash Storage
Another on-board flash storage option for the AMC123 is to use a Solid S t ate Double Data Rate
(SSDDR) module, which combines a SATA Solid State Drive (SATA SSD) and DDR
Synchronous Dynamic RAM (DDR SDRAM) technology in a single SODIMM package.
Contact PT “Customer Support and Services,” on page 16 for more information about this
option.
Universal Serial Bus
The Universal Serial Bus (USB) provides a common interface to many peripherals such as
keyboard, serial ports, and mouse ports. The AMC123 supports booting from USB mass
storage devices, such as a hard drive, CD-ROM drive, disk key (flash), etc.
The AMC123 provides one standard USB 2.0 port, available at the front p anel. Se e Figure 2-1 ,
“AMC123 Front Panel,” on page 23.
There is also a USB interface routed to on-board SSD devices or to the AMC card edge
connector (AMC Port 13). See “SW4-3 — USB Port 1 Control,” on page 44 for more
information.
AMC123 Functional Blocks
The AMC123's USB host controller resides in the Intel EP80579 Integrated Processor. The
topic “Processor,” on page 103, provides a link to the data sheet for this device. Connector
locations and pinouts for this front panel connector are documented in “USB Connector (J3),”
on page 83.
LPC-based Boot PROM
The AMC123 supports an 8 or 16 Mb Low Pin Count (LPC) bus-based flash device used for
booting.
Serial I/O
On its front panel, the AMC123 includes one 4-pin RJ9 serial port connector with RS232 signal
levels and 15 KV ESD protection. See Figure 2-1, “AMC123 Front Panel,” on page 23.
Due to the limited number of pins in the RJ9 connector, hardware flow control is unavailable.
This port is pinned out for Data Terminal Equipment (DTE) operation. Request-to-send (RTS),
clear-to-send (CTS) and modem-control signals are not supported. This connector is shared by
COM1 on the payload and the serial debug interface on the MMC. Switch SW2-4 is used to
select which serial port is routed to the front panel connector. See “SW2-4 — MMC Serial
Access / COM1 Serial Port Configuration,” on page 43 for more information.
See “Serial Console Cable Kit,” on page 22 f or information ab out the serial cable and adapters
available for this connector.
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Chapter 2: Introduction
Caution:
COM1
The AMC123 payload includes two 16C550, PC-compatible serial ports. When configured
appropriately, COM1 is available for general use at the RJ9 connector on the front panel.
COM1 supports data transfers at speeds up to 115.2 Kb/sec with BIOS support. The baud rate
for BIOS supported console redirection defaults to 9600 and is set in the BIOS setup utility. See
“BIOS Configuration Overview ,” on page 46 for more information about BIOS setup. For COM1
port pinout information, see “COM1 Serial Port Connector (J4),” on page 84.
COM2
COM2 is dedicated to communication with the payload serial interface on the MMC. See “Serial
Interface Subsystem,” on page 61 for more information about serial communication with the
MMC. Note that the baud rate of COM2 must match the baud rate of the payload serial
interface on the MMC.
Be careful to insert the RJ9 connector on the management cable into the serial port only.
Inserting it into an Ethernet connector may damage the Ethernet connector pins. See Figure
3-2, “RJ9 Cable Connection,” on page 40.
AMC Interface
The AMC123 is compliant with the AdvancedMC Advanced Mezzanine Card Base Specification, PICMG AMC.0 R2.0. It is designed to be hot swappable int o a mid-size bay on a
MicroTCA® chassis or an AMC carrier board, as shown in Figure 2-3, “AMC123 Module
Installed in an AMP507x 1U MicroTCA Platform,” on page 29.
It can also function in a non-hot swap AMC system. Its AMC card edge connector pro vides rear
I/O connectivity to the AMC bus in accordance with the AMC Type 4 Specification (see
“AdvancedMC Card Edge Connector (P1),” on page 80, for more information).
The AMC123 AMC card edge connector supports the following PICMG subsidiary
specifications:
•AMC.2 (1GbE), Types E1 and E2 — Port 0 and Port 1, 1Gb Ethernet channels
•AMC.3 (Storage), Type 1 — Port 2 and Port 3, Dual SATA channels
Connector locations and pinouts are documented in “AdvancedMC Card Edge Connector
(P1),” on page 80 and Chapter 10, “Data Sheet Reference,” on page 103 contains links to the
PICMG Web site, where the specification may be obtained.
28
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AMC123 Functional Blocks
AMC123
4HP Air Management Boards
Figure 2-3: AMC123 Module Installed in an AMP507x 1U MicroTCA Platform
SATA Interfaces
The AMC123 includes an integrated SATA controller that routes two independent SATA II
interfaces, each of which is SATA 1.0 and 2.0 compliant, to the AMC edge connector. A
MicroTCA carrier that supports SATA, such as the AMP507x 1U MicroTCA Platform, can
provide connectivity for AMC SATA drives.
The AMC123's SATA controller resides in the Intel EP80579 Integrated Processor. See
“Processor,” on page 103 for a link to the data sheet for this device. The AMC edge connector
location and pinout are documented in “AdvancedMC Card Edge Connector (P1),” on page 80.
See “SW4-1 — SATA Port 1 Operation,” on page 44 for the switch settings for SATA Port 1.
PCI Express Interfaces
The AMC123 features two PCI Express interface options:
•One PCI Express interface up to a x8 configuration supporting x1, x4, and x8 interfaces; or
•Two PCI Express interfaces up to x4 configuration supporting x1 or x4.
The PCI Express interface can only be configured as a root complex. Endpoint configurations
are not supported. Multiple AMC123 modules can reside in a chassis but cannot communicate
with each other via the PCI express interface, unless the chassis uses a special PCI Express
bridging device allowing two root complexes to communicate with each other.
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Chapter 2: Introduction
Ethernet Interfaces
The Intel EP80579 Integrated Processor on the AMC123 includes three Gigabit Ethernet
controllers that route three GbE ports in one of the following configurations:
•One port via the front panel, and two ports via the AMC card edge connector (AMC.2 - AMC Ports 0
and 1), or
•Two ports via the front panel, and one port via the AMC card edge connector (AMC.2 - AMC Port 0)
The Intel EP80579 Integrated Processor GbE controllers are based on an Intel fourth
generation Gigabit MAC to provide a standard IEEE 802.3 Ethernet interface for 1000BASE-T,
100BASE-TX, and 10BASE-T applications. Each controller is capable of transmitting and
receiving data rates of 10/100/1000 Mbps.
The three RGMII Ethernet ports are supported by an on-board quad PHY (Marvell 88E1145
Quad GbE Transceiver). Two GbE ports on the front panel are sourced from the Intel EP80579
Integrated Processor. These front panel RJ45 connectors each have two LED Indicators to
denote the status of each channel. See “Ethernet Link and Activity LEDs,” on page 32. Two
1Gb SerDes Ethernet ports routed to the AMC card edge connector allow interfacing to other
AMC cards on the same carrier or interfacing with a hub or switch on a carrier. A serial
EEPROM provides configuration information to the GbE controllers upon power-up or reset.
See “SW4-2 — Ethernet Port 1 Control,” on page 44 for switch settings for routing Ethernet
Port 1.
The topic “Ethernet,” on page 104, contains links to the datasheets for the Intel EP80579
Integrated Processor and the PHY device. Connector locations and pinouts for the AMC card
edge and RJ45 connectors are documented in Chapter 5, “Connectors,” on page 79.
Real-Time Clock with Battery Backup
The AMC123 features a real-time clock (RTC), which is integrated into the Intel EP80579
Integrated Processor. The RTC performs timekeeping functions and includes 256 bytes of
battery-backed CMOS RAM in two banks (128 bytes each). This device contains the year,
month, date, day, hours, minutes and seconds. The clock operates in 12- or 24-hour format,
and data can be represented in binary-coded decimal (BCD) or binary format. Corrections are
automatically made for 28, 29, 30 and 31 day months, including leap year. The time keeping
comes from a 32.768 KHz oscillating source, which is divided to achieve an update every
second.
An alarm clock function is provided on this device, with one second minimum resolution, that
can be enabled to set an alarm flag.
Batteries
Two recharge able manganese-lithium ML621 coin-ce ll batteries located on the AMC123 in two
surface mount battery clips power the RTC and CMOS memory when the AMC123 is not
powered externally . The batteries are intended for AC power failure only, have an estimated life
of 60 days (with batteries fully charged), and recharge whenever management power is
present. The AMC123’s RTC resides in the Intel EP80579 Integrated Processor. See
“Processor,” on page 103 for a link to the data sheet for this device.
See “Battery Backup Characteristics,” on page 94.
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Reset
The AMC123 provides the following reset types:
•Push-button reset on the AMC123 front panel (hard reset)
•MMC-generated reset (payload reset)
•Watchdog timer reset (NMI/SMI/SERIRQ options)
See Chapter 6, “Reset,” on page 89 for more information.
Two-Stage Watchdog Timer
The watchdog timer optionally monitors system operation and is programmable for one of
many different timeout periods (from 1μs to 1050s). It is a two-stage watchdog, meaning that it
can be enabled to produce an NMI, SMI or SERIRQ interrupt during the first stage followed by
a system reset for the second stage. Failure to strobe the watchdog timer within the
programmed time period may result in an NMI/SMI/SERIRQ, a system reset, or both. A register
bit is set if the watchdog timer caused the reset event. See Chapter 6, “Reset,” on page 89 for
more information.
AMC123 Functional Blocks
The AMC123’s two-stage watchdog timer resides in the Intel EP80579 Integrated Processor.
See “Processor,” on page 103 for a link to the dat a sheet and External Design Specificatio n for
this device.
LED Indicators
The following LEDs are located on the AMC123:
•“OOS and IS LEDs,” on page 31
•“User LED,” on page 32
•“Ethernet Link and Activity LEDs,” on page 32
•“Hot-Swap LED,” on page 32
•“Board Diagnostic LEDs,” on page 33
Each is described below. See Figure 2-1, “AMC123 Front Panel,” on p age 23 for the location of
the front panel LEDs.
OOS and IS LEDs
These front panel LEDs are used to indicate an “out of service” condition or an “in service”
status, per the PICMG Advanced Mezzanine Card AMC.0 Specification R2.0. Although these
LEDs are managed by the MMC, a carrier manager or shelf manager can override the MMC's
local LED settings.
The OOS LED is activated to indicate that the payload is known to be out of service (payload
power is off, held in reset, or faulted in a way that precludes operation). Otherwise the OOS
LED is off. The health of the board cannot be inferred solely from the state of this LED. The
default local color of the OOS LED is determined by FRU data and is configurable as either red
or amber. Contact PT “Customer Support and Services,” on page 16 for information about
configuring this color.
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Chapter 2: Introduction
The IS LED is activated when the OOS LED is turned off. It is never turned on when the OOS
LED is on. The IS LED is green when all sensors are within the critical thresholds or amber
when one or more sensors have exceeded a critical threshold.
User LED
One bicolored, user-defined LED (green/amber). See the topic “Programming the User LED,”
on page 54, for more information.
Ethernet Link and Activity LEDs
Each RJ45 Ethernet connector on the front panel contains two LED indicators, described in
Table 2-1, “RJ45 Connector LEDs,” below.
Table 2-1: RJ45 Connector LEDs
LEDColorsLocationDescription
LinkGreen/Amber
ActivityFlashing yellow
1. Depends on module orientation. This is the top LED if the module is in a vertical orientation (handle at bottom); the left LED
if the module is horizontal (handle at right).
2. Depends on module orientation. This is the bottom LED if the module is in a vertical orientation (handle at bottom); the right
LED if the module is horizontal (handle at right).
Top/Left
Bottom/Right
1
The Link LED indicates that there is an active connection
on the Ethernet port:
• Off = 10 Mbps
• Green = 100 Mbps
• Amber = 1000 Mbps
2
The Activity LED flashes during Ethernet activity.
Hot-Swap LED
The hot-swap LED indicates the module's state as it deactivates in prep aration for extraction or
reactivates after insertion. See the PICMG Advanced Mezzanine Card AMC.0 Specification R2.0 for more information. See “PICMG Specifications,” on page 104 for a link to the
specifications.
Insertion Sequence
OffModule handle open. Management power is not enabled.
Blue onModule is fully seated in carrier. Module's management power is enabled.
User may initiate activation by pushing in the handle on the module's front
panel to close the hot-swap switch.
Blue long blinkModule handle is closed. Module is being activated.
Off Module handle is closed. Module is in normal operational state.
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AMC123 Functional Blocks
Extraction Sequence
OffModule is in normal operational state. User may initiate deactivation by
pulling out the module handle to open the hot-swap switch, sending a
request via the MMC to the carrier for a hot-swap extraction.
Blue short blinkModule handle open. Module is waiting to be deactivated. Not safe to extract
module.
Blue onModule is quiesced, module payload power is disabled. Safe to extract
module.
Board Diagnostic LEDs
Several surface mount (SMT) LEDs are located on the PCB, which are for debug/st atus. These
SMT LEDs are described in Table 2-2, “Board Diagnostic LEDs,” below.
Table 2-2: Board Diagnostic LEDs
NumberNameIndicates
D8SATA Disk Module PHY Ready LEDOn = Ready
D7SATA Disk Module Activity LEDBlink = Activity
D6SATA Hard Activity Port Activity LEDOn = SATA access
Off = No SATA access
D5System Reset LEDOn = System in reset
D4System PWROK LEDOn = System power is OK
Off = Power not OK
D3Ethernet Port 0 Link LED to AMC edge connectorOn = Link
Off = No Link
D2Ethernet Port 0 Transmit LEDOn = Linked
Blink = Activity
Off = Not linked
D1User LED on front panelSee “User LED,” on page 32.
Rear Panel I/O
The AMC123 transitions the following I/O signals through the AMC card edge connector to the
carrier:
•SerDes Gigabit Ethernet (Port 0 and Port 1)
•SATA (Port 2 and Port 3)
•x8 PCI Express (Ports 4-11) or two x4 PCI Express (Ports 4-7 and Ports 8-11)
•USB (Port 13)
•IPMI
•Reset
•Power and Ground
See the topic “AdvancedMC Card Edge Connector (P1),” on page 80, for more information.
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Chapter 2: Introduction
Software
BIOS
The PT Embedded BIOS (AMI BIOS core) is user-configurable to boot an operating system
from one of the following locations:
•USB mass storage device (hard drive, CD-ROM drive, disk key (flash), etc.)
•SATA hard drives
•Ethernet (PXE)
•Any add-on cards/boards that support a BIOS boot specification option ROM
See “BIOS Configuration Overview,” on page 46.
Operating Systems
The following operating systems are supported by the Intel EP80579 Integrated Processor on
the AMC123:
Drivers
•Microsoft® Windows XP Embedded SP2 or later
•Microsoft Windows XP SP2 or later
•NexusWare Core CGL OS and Development Environment
•Red Hat Enterprise™ Linux 5
•Solaris 10
•CentOS
•Wind River
•Wind River VxWorks
•FreeBSD
•Microsoft Windows Vista
®
5.2
®
®
6.3
Linux 2.0
®
6.6
®
See “Operating Systems Supported,” on page 51.
The Intel EP80579 Integrated Processor Software Drivers for Embedded Applications p ackage
contains all the software drivers necessary to utilize the hardware functionality of the Intel
EP80579 Integrated Processor. For the most recent software package updates from Intel,
please visit:
http://downloadcenter.intel.com/
Also see “Installing Drivers,” on page 51.
IPMI
For more information about how to program software to interact with the IPMI firmware, refer to
the Intelligent Platform Management Interface v1.5 Specification and the Intelligent Platform Management Interface Implementer's Guide. A link to these publications is available in the
topic “Module Management Controller,” on page 104.
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Overview
This chapter summarizes the information you need to make the AMC123 operational. Please
read it before attempting to use the board. Key topics in this chapter include:
•“Unpacking,” on page 36
•“Electrical and Environmental Requirements,” on page 36
•“Memory Configuration,” on page 36
•“I/O Configuration,” on page 38
•“Connectivity,” on page 40
•“Switches,” on page 41
– “Push-Button Reset Switch (SW1),” on page 42
– “CMOS Reset, FCLKA, SSC, and COM1 Redirection Switch (SW2),” on page 42
– “BIOS Configuration Switch (SW3),” on page 43
– “SATA, Ethernet, USB, and JTAG Configuration Switch (SW4),” on page 44
– “Hot-Swap Switch (SW5),” on page 44
•“Physical Installation,” on page 45
•“BIOS Configuration Overview,” on page 46
– “Console Redirection,” on page 47
– “USB Port 1 Control,” on page 47
– “Integrating the AMC123 with an External Hard Drive Module,” on page 48
•“Installing the Operating System,” on page 50
•“Installing Drivers,” on page 51
•“PCI Device Summary,” on page 53
•“Programming the User LED,” on page 54
Chapter 3
Getting Started
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Chapter 3: Getting Started
Warning:
Warning:
Unpacking
Check the shipping carton for damage. If the shipping carton and co ntents are damaged, notify
the carrier and PT for an insurance settlement. Retain the shipping carton and packing ma terial
for inspection by the carrier. Obtain authorization before returning any product to PT. Refer to
“Product Warranty,” on page 17, for assistance information.
Like all equipment that uses MOS devices, the AMC123 must be protected from static
discharge. Never remove any of the socketed parts except at a static-free workstation. Use
the anti-static bag shipped with your order when handling the module.
Electrical and Environmental Requirements
Electrical specifications are presented in detail in “Electrical and Environmental S pecificatio ns,”
on page 93.
The AMC123 is supplied with a heat sink that allows the processor to operate between 0° and
approximately 70°C ambient with a minimum of 300 linear feet per minute (LFM) (1.27 meters
per second) of external airflow. It is the user's responsibility to ensure that the AMC123 is
installed in a chassis capable of supplying adequate airflow . The maximum power dissipation of
the processor is 30.35 W. External airflow must be provided at all times.
See Chapter 7, “S pecificatio ns,” on page 93 and Chapter 8, “Thermal Co nsiderations,” on page
97 for more details.
Operating the AMC123 without adequate airflow will damage the processor.
The AMC123 may contain materials that require regulation upon disposal. Please dispose of
this product in accordance with local rules and regulations. For disposal or recycling
information, please contact your local authorities or the Electronic Industries Alliance at http://
www.eiae.org/.
Memory Configuration
The AMC123 is populated with a single 64-bit 333.5 MHz PC2-5300, DDR2-667, with Error
Correction Code (ECC) DDR2 SDRAM located on one registered, 200-pin SO-RDIMM socket.
The socket supports up to 4 GB DRAM.
Figure 3-1, “Memory Address Map Example,” on page 37, shows the memory addressing for
the AMC123.
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Figure 3-1: Memory Address Map Example
High PCI Memory Address Range
Physical Memory Address Range
BIOS Flash
PCI Express Enhanced Configuration Aperture
Optional Extended SMRAM
North South Interface
Local APIC Space
Video BIOS
Low PCI Memory Address Range
North South Interface
North South Interface IO APIC Space
Unused IO APIC Space
North South Interface
Shadow BIOS
Upper Memory Blocks (Option ROMs)
Video Memory
Conventional Memory Address Range
PCI Express Port A IO APIC Space
Physical Memory Address Range
10 0000 0000
Top of Main Memory
1 0000 0000
FFE0 0000
FF00 0000
FEF0 0000
Top of Lower Memory
0010 0000
000F 0000
000D 0000
000C 0000
000A 0000
0000 0000
FEE0 0000
FEC8 6000
FEC8 2000
E000 0000
F000 0000
FEC8 0000
FEC0 0000
Memory Configuration
Memory Replacement
Memory is not a field serviceable item. Return the module to PT for memory replacement. See
“Return Merchandise Authorization (RMA),” on page 17 for more information about returning
merchandise.
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Chapter 3: Getting Started
I/O Configuration
The AMC123 addresses up to 64 KB of I/O using a 16-bit I/O address. The module is populated
with many of the most commonly used I/O peripheral devices for industrial control and
computing applications.
The I/O address location for each of the peripherals is shown in Table 3-1, “I/O Address Map,”
below.
Be careful to insert the RJ9 connector
on the DB9 cable into the serial port only.
Inserting it into an Ethernet connector may
damage the Ethernet connector pins.
Connectivity
The AMC123 provides several connectors for interfacing to application specific devices. See
Chapter 5, “Connectors,” on page 79 for complete connector descriptions and pinouts.
Figure 3-2: RJ9 Cable Connection
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Switches
SW1 - Push-Button
Reset Switch
SW5 - Hot-Swap Switch
SW3 - BIOS Configuration
Switch
SW2 - CMOS Reset, FCLKA,
SCC, and COM1 Redirection Switch
SW4 - SATA, Ethernet, USB,
and JTAG Configuration Switch
The AMC123 includes several options that tailor the operation of the module. Most of the
options are selected through software, however some options cannot be software controlled
and are configured with dual in-line package (DIP) switches. Closing or opening the desired
switch sets each option.
Switch Locations
The AMC123 includes the following DIP switches, shown in Figure 3-3, “AMC123 Switch
Location,” below.
•“Push-Button Reset Switch (SW1),” on page 42
•“CMOS Reset, FCLKA, SSC, and COM1 Redirection Switch (SW2),” on page 42
•“BIOS Configuration Switch (SW3),” on page 43
•“SATA, Ethernet, USB, and JTAG Configuration Switch (SW4),” on page 44
•“Hot-Swap Switch (SW5),” on page 44
Figure 3-3: AMC123 Switch Location
Switches
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Chapter 3: Getting Started
Switch Description
The following sections present the switches in numerical order and provide a description of
each switch pack, switch number, and setting. Multiple-switch packs are identified in the form
SWx-N, where x is the pack number and N is the switch number. For example, SW2-3 means
“pack number 2, switch number 3."
Each switch is either ON (closed) or OFF (open). Each pack is labeled to indicate the switch
number and the ON or OFF position.
Notes:
•The factory default switch settings are indicated below in bold.
•Some switches are interdependent. When the setting of one switch is dependent on another, that
dependency is noted.
Push-Button Reset Switch (SW1)
The AMC123 provides a push-button reset switch on the front panel. When the system reset
button is pressed, the AMC123 resets itself. See Figure 2-1, “AMC123 Front Panel,” on page
23.
CMOS Reset, FCLKA, SSC, and COM1 Redirection Switch (SW2)
SW2 is a four-position, single-pole DIP switch pack. See Figure 3-3, “AMC123 Switch
Location,” on page 41, for the switch pack position on the AMC123.
SW2-1 — BIOS CMOS Reset
To reset CMOS settings to the BIOS defaults, move SW2-1 from the OFF position (default) to
the ON position briefly and then return the switch to the OFF position.
SW2-2 — PCI Express Clock (FCLKA) Configuration
Set SW2-2 to OFF to configure the AMC123 to receive the PCI Express reference clock
(FCLKA) from the backplane regardless of e-keying commands. Use this setting in AMC.1 R1.0
carriers.
Set SW2-2 to ON (default) to configure the AMC123 to source/receive/isolate the PCI Express
reference clock (FCLKA) based on e-keying commands in compliance with AMC.1 R2.0.
If the AMC123 does not boot up when powered on, it is likely that FCLKA is not configured
properly for the specific carrier. For more information about configuring FCLKA on this AMC,
please contact PT Customer Support and Services.
Set SW2-3 to OFF (default) to disable the spread spectrum feature of th e clock generator when
the payload is powered up.
Set SW2-3 to ON to enable the spread spectrum feature of the clock generator when the
payload is powered up.
Note: Enabling SSC is allowed only when FCLKA is not being received from the backplane.
Therefore, to enable SSC, SW2-2 and SW2-3 must be set to ON an d e-keying must not require
the AMC123 to receive FCLKA.
SW2-4 — MMC Serial Access / COM1 Serial Port Configuration
Set SW2-4 to OFF (default) to configure the connector to operate as a PC-compatible serial
port.
Set SW2-4 to ON to provide serial access to the MMC through the front-panel RJ9 console po rt
connector. See Figure 2-1, “AMC123 Front Panel,” on page 23.
Note: On power-up, with SW2-4 in the ON position, the MMC briefly displays information
before the COM1 serial communications begin. With this switch in the OFF position the serial
port continues to be connected to the MMC until the payload processor is powered up and
starts its boot process. Once the payload processor begins its boot routine the serial port is
switched to the payload processor. If payload power is subsequently turned off or payload is
held in reset then console returns to MMC.
BIOS Configuration Switch (SW3)
SW3 is a four-position, single-pole DIP switch pack. See Figure 3-3, “AMC123 Switch
Location,” on page 41, for the switch pack position on the AMC123.
SW3-1 — BIOS Flash Top Boot Block Write Protect
To write-protect the BIOS flash top boot block, move SW3-1 from the OFF position (default) to
the ON position.
To write-protect the BIOS flash bottom boot block, move SW3-2 from the OFF position (default)
to the ON position.
SW3-3 — BIOS Port Diagnostics Enable, Reserved
SW3-3 is reserved for use by the factory. It should not be changed from the OFF position
(default).
SW3-4 — BIOS Debug Enable, Reserved
SW3-4 is reserved for use by the factory. It should not be changed from the OFF position
(default).
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Chapter 3: Getting Started
SATA, Ethernet, USB, and JTAG Configuration Switch (SW4)
SW4 is a four-position, single-pole DIP switch pack. See Figure 3-3, “AMC123 Switch
Location,” on page 41, for the switch pack position on the AMC123.
SW4-1 — SATA Port 1 Operation
Set SW4-1 to OFF (default) to route SATA Port 1 to Port 3 on the AMC connector.
Set SW4-1 to ON to route SATA Port 1 to the on-board SATA flash storage module.
SW4-2 — Ethernet Port 1 Control
Set SW4-2 to OFF (default) to route Ethernet Port 1 to Port 1 on the AMC connector, or to route
Ethernet Port 1 to the AMC123 front panel if Port 1 on the AMC connector is not implemented.
Set SW4-2 to ON to route Ethernet Port 1 to connect only to the AMC123 front panel. The
AMC Port 1 connection is disabled.
SW4-3 — USB Port 1 Control
SW4-3 physically connects or disconnects the USB interface and the AMC card edge. The
BIOS must also be set accordingly to route the USB interface to the on-board uSSD device or
to the AMC card edge. See “USB Port 1 Control,” on page 47 for more information about BIOS
configuration.
For example, if you want to route USB to the AMC card edge, the BIOS option AND SW4-3
need to be set properly.
Set SW4-3 to OFF (default) to route the USB interface to the on-board uSSD device.
Set SW4-3 to ON to route the USB interface to the AMC connector.
SW4-4 — JTAG Enable
Set SW4-4 to OFF (default) to disable JTAG mode on the module.
Set SW4-4 to ON to enable the full JTAG scan chain.
Note: This switch is reserved for use by the factory and should not be modified.
Hot-Swap Switch (SW5)
The AMC123 provides a hot-swap ejector handle on the front panel. See Figure 3-3, “AMC12 3
Switch Location,” on page 41. This handle is attached to a mechanical latching mechan ism and
to the ejector handle switch. When this switch opens or closes it sends a request via the MMC
to the carrier for a hot-swap extraction or insertion. Its function and behavior is defined by the
PICMG AMC.0 specification. See the topic “PICMG Specifications,” on page 104, for a link to
this publication. The hot-swap LED indicates the state of the module during extraction and
insertion. See the topic “LED Indicators,” on page 31, for more information.
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Physical Installation
Caution:
Before installing the AMC123, make sure the module is correctly configured for your
application.
Installing the AMC123
The following instructions assume that chassis power is on and that the system supports hotswap insertion. If the system does not support hot swap, power must be turned off prior to
installation.
With a grounding strap connected to your wrist or ankle, perform the following steps to install
the module:
1. Unlock the ejector handle by gently pulling it away from the front panel.
2. Select an appropriate AMC slot in the chassis and slide the AMC into the slot, aligning the module
with the guides near the top of the slot. The module audibly snaps into place when properly inserted.
When the AMC card edge connector makes proper contact with the backplane AMC connector, the
blue hot-swap LED turns ON and the hardware connection process begins.
Physical Installation
3. Press the handle toward the front panel to lock the module in the chassis. When the module is
operational, the blue hot-swap LED turns OFF.
4. Connect any cables from peripheral devices.
See “BIOS Configuration Overview,” on page 46 for instructions on configuring any required
BIOS settings.
Removing the AMC123
With a grounding strap connected to your wrist or ankle, perform the following steps to re move
the module:
1. Disconnect any peripheral device cables from the module.
2. Gently press your thumb against the front panel of the module, while pulling the handle away from the
front panel to unlock the module. The blue hot-swap LED blinks to indicate that the handle is open
and the module is waiting to be deactivated. It is not yet safe to extract the module in this state.
3. Wait until the blue hot-swap LED stops blinking and remains illuminated to indicate that the module is
ready for extraction.
4. When the blue hot-swap LED stops blinking and remains illuminated, the module is quiesced and
module payload power is disabled. It is now safe to extract the module. Gently pull on the handle to
remove the module from the system.
5. Carefully slide the module straight out of the chassis.
Note: An extraction tool such as that manufactured by XTECH can aid in module removal.
To Avoid Burns: The heat sink on the AMC123 module can get very hot during normal
operation. To avoid burns, take extra care when removing the module from the chassis soon
after shutdown. Wait a few minutes to allow the heat sink to cool down.
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Chapter 3: Getting Started
BIOS SETUP UTILITY
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BIOS Configuration Overview
The PT embedded BIOS has many separately configurable features. These features are
selected by running the built-in setup utility. The system configuration settings are saved in a
portion of the battery-backed CMOS RAM in the real-time clock device and are used by the
BIOS to initialize the system at boot-up or reset. The configuration is protected by a checksum
word for system integrity.
To access the BIOS setup utility, press the F2 key during the POST test and initialization at
boot time. Setup runs once the POST functions complete.
When Setup runs, an interactive configuration screen displays. See Figure 3-4, “Setup Screen
Layout,” for an example. Setup parameters are divided into different categories. The available
categories are listed in a menu across the top of the setup screen. The parameters within the
highlighted (current) category are listed in the main (left) portion of the setup screen. Contextsensitive help is displayed in the right portion of the screen for each parameter. A legend of
keys is listed at the bottom of the setup screen.Use the left and right arrow keys to select a
category from the menu. Use the up and down arrow keys to select a parameter in the main
portion of the screen. Use the + or - keys or press <Enter> to open a list of selections to
change the value of a parameter.Items in the main portion of the screen that have a triangular
mark to their left are submenus. To display a submenu, use the up and down arrow keys to
highlight the submenu and then press <Enter>.
Figure 3-4: Setup Screen Layout
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Console Redirection
Console redirection allows users to monitor the AMC123's boot process and to run the
AMC123's BIOS setup utility from a remote serial terminal. Connection is made directly through
the serial port.
The console redirection feature is most useful in cases where it is necessary to communicate
with the AMC123 in an embedded application without video support.
Console redirection is configurable from the AMC123's BIOS setup utility Remote Access Configuration setup menu under the Advanced tab on the main menu.
The default CMOS settings within the Remote Access Configuration menu are as follows.
Remote Access:Enabled
Serial Port Number:COM1
Base Address, IRQ:3F8h, 4
Serial Port Mode:09600 8,n,1
Flow Control:None
BIOS Configuration Overview
Redirection After BIOS POST:Always
Terminal Type:VT100
VT-UTF8 Combo Key Support:Enabled
Notes:
• Because an RJ9 connector is used for the front panel serial port, hardware flow control is not
supported. The only options for flow control are None and Software Control.
• Some operating systems may have problems with the redirection if BIOS POST is set to Always. If
there is a problem, try either the Disabled or Boot Loader options.
USB Port 1 Control
The USB Port 1 on the AMC123 can be routed to either the on-board P5 connector (uSSD
device) or to the AMC card edge. See Figure 5-1, “AMC123 Connector Locations,” on p age 80
for connector location. To set the different configurations follow the steps below.
To set USB Port 1 to the on-board P5 connector (Default Setting).
1. Look at back of the AMC123. Set SW4-3 to the OPEN Position (OFF). See “SW4-3 — USB Port 1
Control,” on page 44.
2. Install the module and boot to the BIOS setup utility by hitting the F2 key while the module is booting
up.
3. In the Advanced tab, select USB Configuration.
4. Set the configuration for Port 1 to Onboard Solid State.
5. Press <Esc> to exit to the main menu.
6. Right arrow to select the Exit menu item. Save Changes and Exit is highlighted.
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Chapter 3: Getting Started
7. Press <Enter>. OK is highlighted.
8. Press <Enter> to exit the BIOS setup utility.
9. Boot the AMC123.
To set USB Port 1 to the AMC card edge.
1. Look at back of the AMC123. Set SW4-3 to the CLOSED Position (ON). See “SW4-3 — USB Port 1
Control,” on page 44.
2. Install the module and boot to the BIOS setup utility by hitting the F2 key while the module is booting
up.
3. In the Advanced tab, select USB Configuration.
4. Set the configuration for Port 1 to AMC Card Edge.
5. Press <Esc> to exit to the main menu.
6. Right arrow to select the Exit menu item. Save Changes and Exit is highlighted.
7. Press <Enter>. OK is highlighted.
8. Press <Enter> to exit the BIOS setup utility.
9. Boot the AMC123.
Integrating the AMC123 with an External Hard Drive Module
The following section describes how to integrate the AMC123 with an external hard drive
module, such as PT’s AMC590, by modifying the BIOS settings on the AMC123.
The AMC123 supports two different modes of operation on the SATA interface: Enhanced IDE
mode and Advanced Host Controller Interface (AHCI) mode, at speeds of 1.5 Gbps and 3.0
Gbps. By default the BIOS is set to operate in Enhanced IDE Mode at 3.0 Gbps.
If a SATA I hard drive is installed with a 1.5 Gbps interface on the AMC590, the BIOS may not
detect the hard drive as being installed. For the BIOS to detect the drive, you must change the
BIOS settings on the AMC123. Slowing down the interface in AHCI Mode to 1.5 Gbps allows
for proper negotiation of the SATA I interface.
To Set the IDE and AHCI Configuration to 1.5 Gbps
1. Install the module and boot to the BIOS setup utility by hitting the F2 key while the module is booting
up.
2. Go to the Advanced tab, select IDE Configuration.
3. Under IDE Configurations see if the speed of the hard drive can be controlled. If yes, set the speed
to 1.5 Gbps for the corresponding IDE port.
4. If you can’t change the hard drive speed, select Operation Mode for IDE. Change the mode from
Enhanced to AHCI.
5. Press <Esc> to exit this screen.
6. Go to the AHCI Configuration screen.
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BIOS Configuration Overview
7. Under the corresponding port change the speed from AUTO to 1.5 Gbps.
8. Press <Esc> to exit this screen.
9. Right arrow to select the Exit menu item. Save Changes and Exit is highlighted.
10.Press <Enter>. OK is highlighted.
11.Press <Enter> to exit the BIOS setup utility.
12.Boot the AMC123.
The BIOS will now be able to detect the drive. In AHCI mode the PCI Device ID will change
from 5028 to 5029. See Table 3-2, “PCI Device Summary,” on page 53.
Note: The operating system will also have to support the AHCI mode of operation.
The AMC123 will have no trouble detecting a hard drive on an AM590, if the hard drive installed
on the AMC590 supports SATA II and a 3.0 Gbps interface. The AMC123 can run in either
Enhanced IDE Mode or AHCI Mode, as determined by the BIOS Setup configuration.
Notes:
• SATA II, 3.0 Gbps data transfer rate in Enhanced IDE Mode - In this mode the AMC123 can only
detect a SATA II, 3.0 Gb p s hard drive. This is beca use it does not kno w how to neg otiate down to 1.5
Gbps.
•
SA TA II, 3.0 Gbps data transfer rate in AHCI Mode - When set for 3.0 Gbps the AMC123 can o nly
detect a SATA II, 3.0 Gb p s hard drive. This is beca use it does not kno w how to neg otiate down to 1.5
Gbps.
• PT has added a speed-limiting option to the BIOS to set the maximum speed to 1.5 Gbps for SATA I
hard drives. This setting can be found under the BIOS Setup screen for AHCI and can be controlled
for each port.
• For operating systems that do NOT support AHCI (such as CentOS 4.5) or have other issues
detecting the drive, do the following:
•Set the BIOS to IDE and Compatible. The BIOS and OS should detect the drive.
• For other vendor's storage AMCs, a hardware switch may be available to slow down the inter face in a
similar manner to the way the BIOS setting does for the AMC123.
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Chapter 3: Getting Started
Installing the Operating System
For more detailed information about your operating system, refer to the documentation
provided by the operating system vendor and to the PT Web site.
To install the operating system:
1. Install peripheral devices. AMC devices are automatically configured by the BIOS during the boot
sequence.
2. Most operating systems require initial installation on a hard drive from a USB CD/DVD or PXE. These
devices should be configured, installed, and tested with the supplied drive rs before attempting to load
the new operating system.
3. Read the release notes and installation documentation provided by the operating system vendor. Be
sure to read any readme files or documents provided with the OS as these typically note
documentation discrepancies or compatibility problems.
4. Select the appropriate boot device order in the setup boot menu depending on the OS installation
media used. To boot from a USB CD/DVD, first connect the USB drive, then enter the BIOS setup
utility and move the “CD-ROM” device to the top of the boot list (or above any other bootable
devices). See “USB CD/DVD,” on page 50.
5. Proceed with the OS installation as directed, being sure to select appropriate device types if
prompted. Refer to the appropriate hardware manuals for specific device types and compatibility
modes of PT products. A link to PT manuals is available in the topic “User Documentation,” on page
104.
6. When installation is complete, reboot the system and set the boot device order in the setup boot
menu.
Note: For more information about the BIOS setup utility, see the topic “BIOS Configuration
Overview,” on page 46.
USB CD/DVD
To run the BIOS setup utility with a bootable OS installation CD or DVD in an external USB drive:
1. Cable an external USB CD/DVD drive to the USB port on the AMC123.
2. Ensure the USB CD/DVD drive is powered on.
3. Insert the bootable OS installation CD/DVD into the drive.
4. Run the AMC123 BIOS setup utility by hitting the F2 key while the module is booting up.
5. Ensure that the USB device is listed in the Boot Devices and is above any other device that may have
a bootable OS image (i.e. hard drive).
a. Use the right arrow key to highlight the Bootcategory in the setup menu. The Boot Settings
information appears in the main setup screen.
b. Arrow down to Boot Device Priority and press <Enter>. The boot order list appears and the top
position in the boot order is highlighted.
c. Press <Enter>. A dialog box with a list of boot devices appears.
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d. Arrow up or down to highlight the USB device. Press <Enter>. USB appears at the top of the Boot
Device Priority list.
e. Press <Esc> to exit to the main menu.
f. Right arrow to select the Exit menu item. Save Changes and Exit is highlighted.
g. Press <Enter>. OK is highlighted.
6. Press <Enter> to exit the BIOS setup utility.
Note: Windows XP and Red Hat Enterprise Linux AS 4 Update 3 (AMD64/Intel EM64T) have
been validated for this installation.
PXE
PXE operation is only supported on Ethernet Port 0 to the AMC edge connector.
Operating Systems Supported
The AMC123 supports the following operating systems:
Installing Drivers
•Microsoft Windows XP Embedded
•Microsoft Windows XP, SP2 or later
•Microsoft Windows Vista has been installed, but is not directly supported by Intel
•NexusWare Core CGL OS and Development Environment has been installed successfully
•Red Hat Enterprise Linux AS 5
The following operating systems may also be installed on the AMC123:
•Solaris 10
•CentOS 5.2
•Wind River Linux 2.0
•Wind River VxWorks 6.6
•FreeBSD 6.3
Installing Drivers
Windows XP Embedded Drivers
The following Getting Started Guide documents the instructions to obtain, build (if necessary),
install, and execute the Windows XP Embedded drivers for the Intel EP80579 Integrated
Processor.
•Intel® EP80579 Software Drivers for Embedded Applications on Microsoft Windows XP Embedded
Getting Started Guide
This document and the Windows XP Embedded drivers can be found on Intel’s Web site and
the PTI beta page for the AMC123:
Although Intel does not officially support Windows XP or Vista on the EP80579 Processor, we
have found the drivers do load and function. Follow the directions under “Windows XP
Embedded Drivers” to get the software package unzipped and placed on the target device.
•For Windows XP, you must have SP2 or later installed, then install the Windows XP Driver for Global
Communications Unit (GCU) before installing the remaining drivers under the Windows XP
Embedded release.
•For Windows Vista, you can use the standard set of Windows XP Embedded Drivers.
For both installations you must install the drivers manually using the Device Ma nager to update
the drivers for each device. Table 3-2, “PCI Device Summary ,” o n page 53 lists the PCI Device
ID to help determine in which directory the embedded drivers are located during installation. If
you select the wrong directory go back and select another directory to see if the drivers are
located in that directory.
Note: We cannot guarantee these d rivers will work under all situations as t hey are provided by
Intel.
Contact PT “Customer Support and Services,” on page 16 for additional assistance with
installation of Windows XP and Vista software drivers.
The Windows XP Driver for Global Communication Unit (GCU) can be found on Intel’s Web site
and the PTI beta page for the AMC123:
The following Getting Started Guide documents the instructions on how to obtain, build (if
necessary), install, and execute the Linux software drivers for the Intel EP80579 Integrated
Processor.
Intel® EP80579 Software Drivers for Embedded Applications on Linux Getting Started Guide
This document may be found on Intel's Web site and the PTI beta page for the AMC123:
Contact PT “Customer Support and Services,” on page 16 for additional assistance with
installation of Linux software drivers.
Note: Per the Intel Release Notes, IXA00179772, increased Ethernet performance can be
achieved by installing Linux with IDE Mode set to AHCI Mode in BIOS Setup Screen, instead of
Enhanced Mode.
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PCI Device Summary
Table 3-2, “PCI Device Summary,” summarizes the device tree that the EP80579 implements.
This summary includes a mapping between PCI devices and the EP80579 blocks along with
the value of the device ID, and class code that each device requests. This information is
required for software installation.
1. PCI bus number, device number, and function number.
2. PCI base class code, subclass code, and programming interface PCI configuration register values.
3. SATA SC and PI values depends on the SATA mode and map value settings.
4. SATA DID value depends on the SATA mode settings.
EP80579
Units
B / D / F
1
PCI
2
BSP
010601h,
010401h,
010401h
3
Device ID
5028h,
5029h,
502Ah,
502Bh
SKU ID
Number
2, 4, 6, 8
4
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Chapter 3: Getting Started
Programming the User LED
The AMC123 includes one bicolor (green/amber), user-defined LED located on the front panel,
labelled USR. See Figure 2-1, “AMC123 Front Panel,” on page 23 for the LED identification.
The user LED is software programmable through GPIO bits 27 and 28 of the Intel EP80579
Integrated Processor GPO_BLINK enable register. The LED is turned off af ter a power cycle or
a reset.
As shown in Table 3-3, “User LED Control,” two bits each are used to control the state of the
LED. Since a bicolor LED is used, there are four states for the LED: green, amber, both colors
off and both colors on.
Table 3-3: User LED Control
LED State
BitGreenAmberBoth OffBoth On
Bit 270110
Bit 281010
GPO Blink Enable Register
The GPIO can control the User LED with an optional blink at 1 second intervals.
The I/O address is 050Ch (0x0Ch) for LED control and 05 18h (0x18h) for b link control. The I/O
Base register of device 0, function 31, Offset 0x48h n eeds to be checked to get the prop er base
address for the user LED register control.
Note: The GPIO bits that control the user LED’s bits are in the same register as other system
critical functions. It is important not to change the state of other bits in this register when
modifying the user LED status.
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Overview
This chapter provides information about the Module Management Controller (MMC) device and
how it uses the Intelligent Platform Management Interface (IPMI) to monitor the system and
warn of problems with the AMC123.
Key topics in this chapter include:
•“MMC Functions,” on page 55
•“Summary of Supported Commands,” on page 55
•“Device Locator Record,” on page 58
•“Sensors,” on page 60
•“Serial Interface Subsystem,” on page 61
•“Firmware Upgrade Process,” on page 69
Chapter 4
System Monitoring and Alarms
MMC Functions
The MMC performs system monitoring and alarming functions using the flexible, industry
standard, Intelligent Platform Management Interface (IPMI). The module comes equipped with
an on-board MMC and IPMI v1.5 firmware already inst alled on the module . The MMC firmware
is based on Pigeon Point System
the module through the IPMI interface include:
•Monitoring of the CPU and board temperatures with critical and non-critical alerting
•Monitoring of the voltage rails with critical and non-critical alerting
•Remote reset and shutdown of the module (hard and soft)
•Monitoring of ejector switches for hot-swap functionality (Performance Technologies’ NexusWare
IPMI driver and firmware provide additional payload features for hot swap)
•Monitoring and event reporting of critical errors
•Fabric and clock e-keying
•Interface to local IPMB (IPMB-L)
In order to take advantage of the features provided by the firmware, IPMI-aware applications
must be developed. Information on IPMI v1.5 is provided at:
http://www.intel.com/design/servers/ipmi/spec.htm
®
's (PPS) MMC firmware. Some of the functions available on
Summary of Supported Commands
Table 4-1, “IPMI/PICMG Command Subset Supported by the MMC Firmware,” lists all the
commands supported by the MMC.
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Chapter 4: System Monitoring and Alarms
The Spec Re f column indicates where in the relevant specification a command is defined. IPMI
references are to v1.5 unless indicated otherwise. The MMC Req column indicates if a
particular command is required by the relevant specification (AMC Specification or HPM.1 Specification) or is optional. See the various notes under the table for more information.
Table 4-1: IPMI/PICMG Command Subset Supported by the MMC Firmware
Set BMC Global Enables18.1App2EhMandatory
Get BMC Global Enables18.2App2FhMandatory
Clear Message Flags18.3App30hMandatory
Get Message Flags18.4App31hMandatory
Get Message18.6App33hMandatory
Send Message18.7App34hMandatory
BMC Watchdog Timer
Reset Watchdog Timer21.5App22hMandatory
Set Watchdog Timer21.6App24hMandatory
Get Watchdog Timer21.7App25hMandatory
Event Commands
Set Event Receiver23.1S/E00hMandatory
Get Event Receiver23.2S/E0 1hMandatory
Platform Event (a.k.a. “Event Message”)23.3S/E02hMandatory
Sensor Device Commands
Get Device SDR Info29.2S/E20hMandatory
Get Device SDR29.3S/E21hMandatory
Reserve Device SDR Repository29.4S/E22hMandatory
Get Sensor Reading Factors29.5S/E23hOptional
Set Sensor Hysteresis29.6S/E24hOptional
Get Sensor Hysteresis29.7S/E25hOptional
Set Sensor Threshold29.8S/E26hOptional
Get Sensor Threshold29.9S/E27hOptional
Set Sensor Event Enable29. 10S/E28hOptional
Get Sensor Event Enable29.11S/E29hOptional
Get Sensor Event Status29.13S/E2BhOptional
Get Sensor Reading29.14S/E2DhMandatory
FRU Device Commands
Get FRU Inventory Area Info28.1Storage10hMandatory
17.9App01hMandatory
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Summary of Supported Commands
Table 4-1: IPMI/PICMG Command Subset Supported by the MMC Firmware (Continued)
Get PICMG Properties3-10PICMG00hMandatory
FRU Control3-25PICMG04hMandatory
FRU Control Capabilities3-24PICMG1EhMandatory
Get FRU LED Properties3-27PICMG05hMandatory
Get LED Color Capabilities3-28PICMG06hMandatory
Set FRU LED State3-2 9PICMG07hMandatory
Get FRU LED State3-30PICMG08hMandatory
Get Device Locator Record ID
2
3-35PICMG0DhMandatory
AMC Commands
Set AMC Port State3-26PICMG19hOptional/ Mandatory
Get AMC Port State3-27PICMG1AhOptional/ Mandatory
Set Clock State3-44PICMG2ChOptional/ Mandatory
Get Clock State3-45PICMG2DhOptional/ Mandatory
HPM.1 Upgrade Commands (HPM.1)
Get Target Upgrade Capabilities3-3PICMG2EhMandatory
Get Component Properties3-5PICMG2FhMandatory
Abort Firmware Upgrade3-15PICMG30hOptional
The MMC firmware supports the Get Device Lo cator Record ID command fo r FRU device # 0
(the only FRU device represented by an MMC). The MMC firmware obtains the ID of the IPMB
Management Controller Device Locator Record by scanning the SDR records embedded into
the firmware.
Table 4-2, “IPMB Management Controller Device Locator Record,” shows an example of an
IPMB Management Controller Device Locator Record (SDR type 0x12) describing the
properties of the MMC.
Table 4-2: IPMB Management Controller Device Locator Record
ParameterValue
Power State Notification
ACPI System Power State notification requiredNO
ACPI Device Power State notification requiredNO
Global Initialization
Controller logs Initialization Agent errorsNO
Log Initialization Agent errors accessing this controllerNO
Event Generation Enable event message generation from controller
Device Capabilities
Chassis DeviceNO
BridgeNO
IPMB Event GeneratorYES
IPMB Event ReceiverNO
FRU Inventory DeviceYES
SEL DeviceNO
SDR Repository DeviceNO
Sensor DeviceYES
FRU Entity ID 0xC1
Entity Instance (slot dependent)
OEM-specific0
Device ID String Type/Length 8-bit ASCII with size of Device ID String (see
Device ID String AMC123
below)
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Device ID
The MMC firmware provides the following Device ID data in response to the Broadcast Get
Device ID command, as shown in Table 4-3, “MMC Device ID,” below.
Table 4-3: MMC Device ID
ParameterValue
Device ID 0x00
Provides Device SDRsYES
Device Revision Number 0x00
Device AvailableYES
Firmware Revision Changes with each release
IPMI Version1.5
Table 4-4, “MMC Sensors,” lists the sensor and thresholds that are monitored by the MMC.
Note that the sensor IDs are local to the MMC. The MMC’s SDRs are inherited by the next level
of management (MicroTCA MCMC or AMC carrier IPMC) and sensor IDs are reassigned.
The ATCA specification includes the following definitions for the sensor event severity levels:
•IPMI non-critical / PICMG 3.0 minor / telco minor – a warning that things are somewhat out of no rmal
range, but not really a “problem” yet. See “Non-Critical Events” below.
•IPMI critical / PICMG 3.0 major / telco major – things are still in valid operating range, but are getting
close to the edge; unit still operating within vendor-specified tolerances. See “Critical Events” below.
•IPMI non-recoverable / PICMG 3.0 critical / telco critical – unit no longer operating within vendorspecified tolerances. See “Non-Recoverable Events” below.
Lower
Critical
Threshold
Lower NonCritical
Threshold
Upper NonCritical
Threshold
Upper
Critical
Threshold
Upper NonRecoverable
Threshold
Non-Critical Events
Non-critical events are informative only. They do not indicate that the module is outside of its
operating limits. In general, no action is required. However, in certain contexts, system or shelf
management software may decide that preventive action should be taken. For example, if
several modules in a shelf report upper non-critical temperature events, the shelf manager
might decide to increase fan speed.
Critical Events
Critical events indicate that the module is still within its operating limits, but it is close to
exceeding one of those limits. Possible action in this case is to closely monitor the alarming
sensor and take more aggressive action if it approaches the non-recoverable threshold.
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Non-Recoverable Events
Non-recoverable events indicate that the module may no longer be functioning because it is
now outside of its operating limits. It is likely that action is required or has already been taken
by the local hardware/firmware. For example, a processor may have shut itself down because
its maximum die temperature was exceeded, or a shelf manager may decide to deactivate the
module because the processor is too hot.
Serial Interface Subsystem
The MMC firmware implements a communication protocol over the payload and/or serial de bug
interfaces. The communication is in the form of formatted ASCII strings.
The Serial Interface Protocol Lite (SIPL) is based on the IPMI-defined Terminal Mode of the
serial/modem interface. The following sections describe the SIPL:
•“Terminal Mode Messages and Commands,” on page 61
•“Terminal Mode Line Editing,” on page 62
•“Supported PPS Extension Commands,” on page 63
Serial Interface Subsystem
Terminal Mode Messages and Commands
Terminal Mode Message Format
Terminal Mode messages have the following format:
[<message data>]<newline>
The left bracket and the right bracket plus <newline> characters serve as START and STOP
delimiters for a message. The MMC does not support multi-line IPMI messages.
Raw IPMI Messages
The SIPL supports raw IPMI messages that are entered as sequences of case-insensitive hexASCII pairs, each pair optionally separated from the previous one with a single <space>
character. What follows are examples of raw IPMI request messages in Terminal Mode:
[18 00 22]<newline>
[180022]<newline>]
The MMC handles raw IPMI messages in the same way as it handles IPMI/PICMG/AMC
messages coming from the IPMB-L bus and, with the exception that IPMI/PICMG/AMC replies
are routed to the interfaces from which the respec tive requests have co me (i.e. either the serial
debug or payload interface of the MMC).
Terminal Mode Text Commands
The SIPL does not support Terminal Mode ASCII text commands defined by the IPMI Specification (section 13.7.8).
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Chapter 4: System Monitoring and Alarms
Data
PPS IANA
Command Code
rqSeq (00h) / Bridge (00b)
NetFn Code (2Eh) / LUN (00b)
Data
PPS IANA
Completion Code
Command Code
rqSeq (00h) / Bridge (00b)
NetFn Code (2Eh) / LUN (00b)
Pigeon Point Systems (PPS) Extension Commands
The MMC firmware supports a set of PPS extension commands that are used to control and
monitor the carrier Intelligent Platform Management Controller (IPMC) state over the serial
debug interface. These commands are used to read the MMC status, implement graceful
payload shutdown, etc.
The PPS extension commands are implemented as OEM IPMI commands with network
function codes 2Eh/2Fh and message body transferred in the same manner as for raw IPMI
messages (see “Raw IPMI Messages,” on page 61). Figure 4-1, “PPS Extension Command
Request,” shows an example of a PPS extension command request:
Figure 4-1: PPS Extension Command Request
Figure 4-2, “PPS Extension Command Response,” shows an example of a PPS extension
The MMC does not support input line editing functionality defined as optional in the IPMI Specification (section 13.8).
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Supported PPS Extension Commands
The MMC firmware supports the following PPS extension commands (see “Pigeon Point
Systems (PPS) Extension Commands,” on page 62):
Table 4-5: PPS Extension Commands Supported by the MMC
Serial Interface Subsystem
Command
Request/Response
Get Status0x00Serial debug and
Get Serial Interface
Properties
Set Serial Interface
Properties
Get Debug Level0x03Serial debug
Set Debug Level0x04Serial debug
Get Payload
Communication
Timeout
Set Payload
Communication
Timeout
Graceful Reset0x11Payload interfaceThe payload is ready
Diagnostic Interrupt
Results
Get Payload
Shutdown Timeout
Set Payload
Shutdown Timeout
Get Geographic
Address
Code
0x01Serial debug and
0x02Serial debug and
0x09Serial debug and
0x0ASerial debug and
0x12Payload interfaceReturn diagnostic
0x15Serial debug and
0x16Serial debug and
0x2CSerial debug and
Likely Command
Source(s)
payload interfaces
payload interfaces
payload interfaces
interface
interface
payload interfaces
payload interfaces
payload interfaces
payload interfaces
payload interfaces
DescriptionSee Also
Read the MMC statusGet Status Command
Get the properties of a
serial interfaceSerial Line Properties
Set the properties of a
serial interface
Get debug/verbosity
levelDebug/Verbosity Level
Set debug/verbosity
level
Get the timeout for
payload
communications
Set the timeout for
payload
communications
to be shut down/reset
interrupt results
Get the timeout for
payload shutdownPayload Shutdown
Set the timeout for
payload shutdown
Get the geographic
address
Commands
Payload
Communication
Timeout
Graceful Payload
Reset
Payload Diagnostic
Interrupt
Timeout
Get Geographic
Address Command
The MMC accepts all PPS extension commands listed in Table 4-5 from both serial interfaces,
as well as IPMB-L. This is done to achieve additional flexibility and extensibility in the MMC
functionality.
The PPS extension commands listed in Table 4-5 are referred to as the SIPL commands
throughout this document. The following sections discuss the SIPL commands in more detail.
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Chapter 4: System Monitoring and Alarms
Get Status Command
The IPMC status is four bytes describing the logical state of the IPMC and the payload. Table
4-6, “IPMC Status Bits,” provides a description of the IPMC status bits:
Table 4-6: IPMC Status Bits
BitNameDescription
Byte 1
0 (LSB)ControlIf set to 0, the IPMC control over the payload is disabled.
1-2NAReserved
3Sensor AlertIf set to 1, indicates that at least one of the IPMC sensors detects
4Reset AlertIf set to 1, indicates that the payload is going to be reset.
5Shutdown AlertIf set to 1, indicates that the payload is going to be shut down.
6Diagnostic Interrupt
Request
7 (MSB)Graceful Reboot
Request
Byte 2
0-7NAReserved
Byte 3
0-7NAReserved
Byte 4
0-3NAReserved
4Message ReceivedIf set to 1, indicates th at a message for the payload has been received.
5-7NAReserved
threshold crossing.
If set to 1, indicates that a payload diagnostic interrupt request has
arrived.
If set to 1, indicates that the payload is requested to initiate the graceful
reboot sequence.
The IPMC firmware notifies the payload about changes of all status bits except for bits 0-2 of
byte 1 by sending an unprintable character (ASCII 07, BELL) over the payload interface. The
payload is expected to use the Get St atus command to identify pending event s and other SIPL
commands to provide a response (if necessary). The event notification character is sent in a
synchronous manner, and does not appear in the contents of SIPL messages sent to the
payload.
The Get Status command has the following synopsis:
[B8 xx 00 0A 40 00]
The IPMC responds to the Get Status command with the following reply:
4 – 115200 bps
4-6NAReserved
7 (MSB)Echo OnIf this bit is set, the MMC enables echo for the given
serial interface.
Set Serial Interface Properties Command
The Set Serial Interface Properties command is used to change the properties of a given
interface:
[B8 xx 02 0A 40 00 <interface ID> <interface properties>]
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Chapter 4: System Monitoring and Alarms
Debug/Verbosity Level
The SIPL provides commands to enable and disable output of error/diagn ostic messages to the
serial debug interface at runtime:
•“Get Debug Level Command,” on page 66
•“Set Debug Level Command,” on page 66
Get Debug Level Command
To get the current debug level, the Get Debug Level command must be used. This command
has the following synopsis:
[B8 xx 03 0A 40 00]
The MMC responds to the Get Debug Level command with the following reply:
[BC xx 03 00 0A 40 00 <debug level>]
The <debug level> parameter contains the bit fields shown in Table 4-9, “MMC Debug
Levels,” below.
Table 4-9: MMC Debug Levels
BitNameDescription
0 (LSB)Error Logging EnableIf set to 1, the MMC outputs error/diagnostic messages
onto the serial debug interface.
1Low-level Error Logging EnableIf set to 1, the MMC outputs low-level error/diagnostic
messages onto the serial debug interface.
2Alert Logging EnableIf set to 1, the MMC outputs important alert messages
onto the serial debug interface.
3Payload Logging EnableIf set to 1, the MMC provides a trace of SIPL activity on
the payload interface onto the serial debug interface.
4IPMB Dump EnableIf set to 1, the MMC provides a trace of IPMB messages
that are arriving to/going from the MMC via IPMB-L.
5-7 NAReserved
Set Debug Level Command
To change the current debug level, the Set Debug Level command must be used. This
command has the following synopsis:
[B8 xx 04 0A 40 00 <debug level>]
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Serial Interface Subsystem
Payload Communication Timeout
Some of the SIPL commands are subject to payload communication timeouts. If the payload
does not respond with a correct reply within a definite period of time, the MMC assumes that a
payload communication timeout occurred and acts accordingly. The SIPL timeout value also
limits the period of time given to the payload to prepare for a payload reset.
•“Get Payload Communication Timeout Command,” on page 67
•“Set Payload Communication Ti meout Command,” on page 67
Get Payload Communication Timeout Command
The MMC supports reading of the payload communication timeout using the Get Payload Communication Timeout command. This command has the following synopsis:
[B8 xx 09 0A 40 00]
The MMC responds to the Get Payload Communication Timeout command with the
following reply:
[BC xx 09 00 0A 40 00 <payload timeout>]
The <payload timeout> parameter is the payload communication timeout measured in
hundreds of milliseconds. Thus, the payload communication timeout may vary from 0.1 to 25.5
seconds. The default value of the payload communication timeout is specified by the
CFG_APP_SIPL_PAYLOAD_TIMEOUT Configuration Parameter.
Set Payload Communication Timeout Command
To change the payload communication timeout, the Set Payload Communication Timeout
command is used:
[B8 xx 0A 0A 40 00 <payload timeout>]
Graceful Payload Reset
The MMC supports the Graceful Reboot option of the FRU Control command. On receiving
such a command, the MMC sets the Graceful Reboot Request bit of the MMC status, sends a
status update notification to the payload, and waits for the Graceful Reset command from the
payload. If the MMC receives such a command before the payload communication timeout
time, it sends the 0x00 completion code (Success) to the carrier controller . Otherwise, the 0xC3
completion code (Timeout) is sent.
The Graceful Reset command has the following synopsis:
[B8 xx 11 0A 40 00]
Note that the MMC does not reset the payload on receiving the Graceful Reset command or
timeout. If the MMC participation is necessary, the payload must request the MMC to perform a
payload reset.
The Graceful Reset command is also used to notify the MMC about the completion of the
payload shutdown sequence (refer to “Payload Shutdown Timeout,” on
page 68).
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Payload Diagnostic Interrupt
The MMC supports the Issue Diagnostic Interrupt feature of the FRU Control command. The
payload is notified about a diagnostic interrupt over the SIPL as described in “Get Status
Command,” on page 64. The payload is expected to return diagnostic interrupt results before
the payload communication timeout using the Diagnostic Interrupt Results command of the
SIPL. This command has the following synopsis:
[B8 xx 12 0A 40 00 <diagnostic interrupt return code>]
If the payload responds before the payload communication timeout, the diagnostic interrupt
return code is forwarded to the carrier controller as the completion code of the FRU Control
command response. Otherwise, the 0xC3 completion code (Timeout) is returned.
Payload Shutdown Timeout
When the carrier controller commands the MMC to shut down the payload (i.e. sends the FRU
Control (Quiesce) command), the MMC notifies the payload about it by asserting appropriate
alert and sending an alert notification to the payload (refer to “Get Status Command,” on page
64). Upon receiving this notification, the payload software is expected to initiate the payload
shutdown sequence. After performing this sequence, the payload should send the Graceful Reset command (refer to “Graceful Payload Reset,” on page 67) to the MMC over the payload
interface to notify the MMC that the payload shutdown is complete.
To avoid deadlocks that may occur if the payload software does not respond, the MMC
provides a special timeout for the payload shutdown sequence. If the payload does not send
the Graceful Reset command within a definite period of time, the MMC assumes that the
payload shutdown sequence is finished, and sends a Module Quiesced hot-swap event to the
carrier controller.
•“Get Payload Shutdown Timeout Command,” on page 68
•“Set Payload Shutdown Timeout Command,” on page 68
Get Payload Shutdown Timeout Command
The MMC supports reading of the payload shutdown timeout using the Get Payload Shutdown Timeout command. This command has the following synopsis:
[B8 xx 15 0A 40 00]
The MMC responds to the Get Payload Shutdown Timeout command with the following reply:
[BC xx 15 00 0A 40 00 <LSB byte of timeout><MSB byte of timeout>]
The payload shutdown timeout is mea sured in hundreds of milliseconds and stored as a 2-byte
integer. The default value of the payload shutdown timeout is specified by a dedicated
Configuration Parameter.
Set Payload Shutdown Timeout Command
To change the payload shutdown timeout, the Set Payload Shutdown Timeout command is
used:
[B8 xx 16 0A 40 00 <LSB byte of timeout><MSB byte of timeout>]
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Get Geographic Address Command
The MMC allows reading the geographic address of the module using the Get Geographic Address command, which has the following synopsis:
[B8 xx 2C 0A 40 00]
The MMC responds to the Get IPMB Address command with the following reply:
[BC xx 2C 00 0A 40 00 <geographic address>]
The <geographic address> parameter has the bit fields shown in Table 4-10, “The
<geographic address> Parameter Bit Fields,” below.
Table 4-10: The <geographic address> Parameter Bit Fields
BitsNameDescription
0-1GA0 Signal0 = GA0 is grounded
1 = GA0 is unconnected
3 = GA0 is pulled up
2-3GA1 Signal0 = GA1 is grounded
1 = GA1 is unconnected
3 = GA1 is pulled up
4-5GA2 Signal0 = GA2 is grounded
1 = GA2 is unconnected
3 = GA2 is pulled up
6-7NAReserved
Firmware Upgrade Process
The MMC firmware supports a reliable field upgrade procedure compatible with the HPM.1 Specification. The key features of the firmware upgrade procedures are as follows:
•The upgrade can be performed over the serial debug/payload interface or over IPMB-L.
•The upgrade procedure is performed while the MMC firmware is online and operating normally.
•Upgrades of the firmware component are reliable. A failure in the download (error or interruption)
does not disturb the MMC's ability to continue using the “old” firmware or its ability to restart the
download process. Upgrades of the boot loader component are not relia ble and may render the MMC
non-functional in case of an incomplete upgrade.
•Upgrades of the firmware component are reversible. The MMC fir mware automatically revert s back to
the previous firmware if there is a problem when first running the new code and can be reverted
manually using the HPM.1-defined Manual Rollback command. Upgrades of the boot loader
component are not reversible.
HPM.1 Boot Loader
•The HPM.1 boot loader does not perfor m an y up gr a de actio n s
•The HPM.1 boot loader is able to boot either of two redundant copies of the MMC firmware in flash
•The HPM.1 boot loader is able to automatically rollback a failed copy of the MMC firmware and
activate the backup one
•The HPM.1 boot loader can be upgraded in-field as an HPM.1-upgradeable component
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HPM.1 Firmware Upgrade
The HPM.1 upgrade procedure is managed by a utility called the upgrade agent. The ipmitool utility is used as upgrade agent for upgrading the MMC firmware.
The upgrade agent communicates with the MMC firmware via serial interface or IPMB-L, and
uses the ATCA commands that are described in the HPM.1 Specification for upgrading the
firmware. Updated firmware is packed into a special image that has a format described in the
HPM.1 Specification. That image is used by the upgrade agent to prepare and upgrade the
MMC firmware. The HPM.1 upgrade procedure includes the following steps:
1. Preparation step. This step erases the region in the flash memory where a component will be
written.
2. Component upload step. This step is designed to upload the component image via IPMB or a seri al
interface, and write it into the flash memory.
3. Component activation step. This step is designed to activate the previously upgraded component;
for the firmware component, this step can be deferred until a later time.
The MMC firmware supports two upgradeable components: the firmware itself and the boot
loader. In case of an unsuccessful firmware upgrade it is possible to roll back to the old
firmware. This is not true for the boot loader.
Note: Extreme caution should be exercised when upgrading the boot loader. There is no
backup copy of the boot loader and if for any reason the boot loader upgrade procedure fails,
the firmware becomes non-functional after reboot and must be reprogrammed over JTAG.
Upgrade Utilities
The firmware upgrade procedure is performed using the upgrade agent utility , implementing the
HPM.1 Upgrade Protocol and capable of programming custom firmware images into the flash
memory of the MMC over a serial interface or IPMB-L. Any HPM.1-compatible Upgrade Agent
can be used to upgrade the MMC firmware. It is recommended to use the ipmitool utility for
these purposes. The ipmitool utility is available from Performance Technologies. Contact
Performance Technologies Customer Support and Services for contact information.
The firmware image is supplied to the ipmitool utility in a single file called an HPM.1 upgrade
image (for information about the format of HPM.1 upgrade images refer to the HPM.1
specification).
Detailed HPM.1 Upgrade Procedure
The following images are available from Performance Technologies:
•hpm1fw.img - this image contains the MMC firmware
•hpm1boot.img - this image contains the boot loader
•hpm1all.img - this image contains both the firmware and the boot loade r
These images can be used to upgrade corresponding components of the IPMC: the firmware,
the boot loader or both.
The following snapshot samples a command performing firmware upgrade from a Linux host
over LAN/IPMB:
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ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x7c -b 7 hpm upgrade
hpm1fw.img activate
PICMG HPM.1 Upgrade Agent 1.0:
Validating firmware image integrity...OK
Performing preparation stage...
Services may be affected during upgrade. Do you with to continue? y/n y...
OK
Target Product ID : 15
Target Manufacturer ID: 1556
Performing upgrade stage:
Upgrading AVR-AMCm F/W
with Version:Major: 1
Minor: 70
Aux: 000 000 000 000
Writing firmware: 100 % completed
Performing activation stage:
Firmware upgrade procedure successful
IPMI Communication Utility (ipmitool)
The ipmitool utility is a Linux application that can be used for a wide range of tasks involving
IPMI-based communications. The following topics describe the installation process and provide
information on specific applications of this utility.
Note: Contact Performance Technologies Customer Support and Services for an enhanced
version of ipmitool. Besides the standard functionality, it supports the following vendor-
specific enhancements, which are not available in the official release (as of version 1.8.9):
•Support for the serial IPMI interface (Terminal Mode)
•Some improvements in HPM.1 upgrade protocol implementation.
•Support for double bridging via LAN for accessing MMCs through the She lf Manager and carrier
IPMC.
The enhanced version is available in binary form for Windows and in source form for Linux.
Building the ipmitool Utility
Build and install the ipmitool utility on a Linux host system using the following procedure:
1. Unpack the source tarball obtained from the secure Web site and change to the ipmitool directory:
bash$ tar xzf <ipmitool_package_name>
bash$ cd ipmitool
2. Run the configure script to prepare for the build. The --prefix=<dir> option can be used to
specify the directory where the resulting files are installed. If not specified, /usr/local is used (in
this case, the installation requires root privileges).
bash$ ./configure --prefix=/home/user/ipmitool
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3. Run the make install command to build and install the ipmitool utility.
bash$ make install
Accessing an MMC with ipmitool
The available access methods that can be used to communicate with the MMC depend on the
MMC firmware configuration and overall system setup. The most frequently used access
methods are the following:
•Via an Ethernet connection to a Shelf Man ager that is able to access via IPMB-0 the carrier IPMC
managing the MMC. See “Accessing an MMC via a Shelf Manager,” on page 72.
This access method can be used from any Linux or Windows host that has an Ethernet connection to
the Shelf Manager of the shelf in which the MMC is installed. In this access method, the ipmitool
utility uses an Ethernet connection to the Shelf Manager to double bridge IPMI requests to the MMC
over IPMB-0 and IPMB-L.
•Via the serial debug or serial payload interface of the MMC. See “Accessing an MMC via a Serial
Interface,” on page 73.
This access method can be used from any Linux or Wi nd ow s ho st tha t ha s a ser ial co nn ec tio n with
the MMC’s serial debug or serial p ayload interfaces. In this access method, the ipmitool utility uses
a serial interface to directly access the MMC.
Accessing an MMC via a Shelf Manager
To access the MMC using an Ethernet connection to a Shelf Manager, the following parameters
should be specified in the command line of the ipmitool utility:
-I lan
This command line parameter instructs the ipmitool utility to use Ethernet for
communications with the MMC.
-H <Shelf Manager IP>
This command line parameter specifies the IP address of the Shelf Manager.
-T <carrier IPMC address>
This command line parameter specifies the remote transit address (IPMB-0 address of the
carrier IPMC) to which requests should be bridged by the Shelf Manager.
-B 0
This command line parameter specifies the remote transit channel (with 0 designating IPMB-0)
to which requests should be bridged by the Shelf Manager.
-t <MMC address>
This command line parameter specifies the remote target address (IPMB-L address of the
MMC) to which requests should be bridged by the carrier IPMC.
-b 7
This command line parameter specifies the remote target channel (with 7 designa ting IPMB-L)
to which requests should be bridged by the carrier IPMC.
-A <authtype>
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This command line parameter forces the ipmitool to use a specific authentication type,
which must, of course, be supported by the Shelf Manager.
For example, to fetch and print Sensor Device Records of an MMC at IPMB-L address 0x72
via a Shelf Manager with the IP address 192.168.0.2, and a carrier IPMC at IPMB-0 address
The following ipmitool command line parameters are used for communicating with the MMC
via a serial interface:
-I serial-terminal
This command line parameter instructs the ipmitool utility to use the serial interface for
communications with the MMC.
-D <dev[:baudrate]>
This command line parameter specifies the serial device and baud rate settings to use. For
Linux hosts, the serial device is the system path to the device node (e.g. /dev/ttyS0). For the
Cygwin-flavor of the ipmitool utility, Windows serial device names are translated as follows:
the COM1 device name is mapped to /dev/ttyS0, COM2 is mapped to /dev/ttyS1 and so on.
The supported baud rates are: 2400, 9600, 19200, 38400, 57600, and 115200.
For example, to fetch and print Sensor Device Records of an MMC via a serial interface
connection with a baud rate of 9600, the following command line should be used:
The ipmitool utility has built-in HPM.1 upgrade functionality and can be used as an upgrade
agent. To be able to send HPM.1 commands to the MMC, the proper connection options should
be specified in the ipmitool command line.
See “Accessing an MMC with ipmitool,” on page 72 for the list of available ipmitool
command line connection options.
HPM.1 Commands
The ipmitool utility supports the following HPM.1 commands, which are described on the
following pages:
•“targetcap,” on page 74
•“compprop,” on page 75
•“upgrade,” on page 76
•“activate,” on page 77
•“rollback,” on page 77
•“rollbackstatus,” on page 77
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targetcap
Get the target upgrade capabilities. This command can be used to find out the upgrade
capabilities of an MMC.
ipmitool hpm targetcap
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm targetcap
PICMG HPM.1 Upgrade Agent 1.0:
TARGET UPGRADE CAPABILITIES
-------------------------------
HPM.1 version............0
Component 0 presence....[y]
Component 1 presence....[y]
Component 2 presence....[n]
Component 3 presence....[n]
Component 4 presence....[n]
Component 5 presence....[n]
Component 6 presence....[n]
Component 7 presence....[n]
Upgrade undesirable.....[n]
Aut rollback override...[n]
IPMC degraded...........[n]
Defered
Service affected........[y]
Manual rollback.........[y]
Automatic rollback......[y]
Self test...............[n]
Upgrade timeout.........[100 sec]
Self test timeout.......[0 sec]
Rollback timeout........[5 sec]
Inaccessibility timeout.[5 sec]
1
activation......[y]
1. “Defered” is misspelled in the ipmitool utility.
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Firmware Upgrade Process
compprop
Get the specified component properties. This command can be used to find out componentspecific properties.
ipmitool hpm compprop <id> <select>
The <id> parameter specifies the component whose properties are read; 0 correspon ds to the
firmware component and 1 corresponds to the boot loader component. The <select>
parameter specifies the property that should be acquired. The properties are the following:
0General properties
1Current firmware version
2Description string
3Rollback firmware version
4Deferred firmware version
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm compprop 0 0
PICMG HPM.1 Upgrade Agent 1.0:
GENERAL PROPERTIES
-------------------------------
Payload cold reset req....[y]
Def. activation supported.[y]
Comparison supported......[n]
Preparation supported.....[y]
Rollback supported........[y]
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upgrade
Upgrade the firmware with the specified image. This command can be used to upgrade the
firmware using a valid HPM.1 image.
ipmitool hpm upgrade <file> [activate]
The <file> parameter specifies the name of the HPM.1 upgrade image. If the [activate]
parameter is specified, the upgraded firmware is activated just after the upgrade procedure. In
the other case, an additional command should be issued to activate the firmware.
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm upgrade
hpm1fw.img
Validating firmware image integrity...OK
Performing preparation stage...
Services may be affected during upgrade. Do you wish to continue? y/n y
OK
Target Product ID : 15
Target Manufacturer ID: 1556
Performing upgrade stage:
Upgrading AVR-AMCm F/W
with Version: Major: 0
Minor: 5
Aux : 000 000 000 000
Writing firmware: 100 % completed
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Firmware Upgrade Process
activate
Activate the newly uploaded firmware. This command can be used for activating the newly
uploaded firmware if there was no activate parameter passed to the upgrade command.
ipmitool hpm activate
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm activate
PICMG HPM.1 Upgrade Agent 1.0:
rollback
Perform a manual rollback on the IPM controller. This command can be used to roll back from
the newly uploaded firmware to the old one.
ipmitool hpm rollback
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm rollback
PICMG HPM.1 Upgrade Agent 1.0:
rollbackstatus
Query the rollback status. This command can be used to query the firmware on th e IPMC about
whether a rollback event has occurred.
ipmitool hpm rollbackstatus
Example:
ipmitool -I lan -H 192.168.0.2 -A none -T 0x82 -B 0 -t 0x74 -b 7 hpm rollbackstatus
PICMG HPM.1 Upgrade Agent 1.0:
Rollback occured
2
on component mask: 0x01
2. “occured” is misspelled in the ipmitool utility.
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Overview
As shown in Figure 5-1, “AMC123 Connector Locations,” on page 80, the AMC123 includes
several connectors to interface with application-specific devices.
The connectors discussed in this chapter are shown in Table 5-1, “Connector Assignments,”
below. A detailed description and pinout for each connector is given in the following topics.
Table 5-1: Connector Assignments
FunctionLocation
“AdvancedMC Card Edge Connector (P1),” on page 80Card Edge
“Ethernet Connectors (J1, J2),” on page 83
“USB Connector (J3),” on page 83
“COM1 Serial Port Connector (J4),” on page 84
“DDR2 SDRAM Connector,” on page 85
“uSSD/SDM Storage Interface Connector (P5),” on page 85
“Battery Sockets,” on page 87
“Serial Console Cable,” on page 87Cables
Chapter 5
Connectors
Front Panel
Internal
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Chapter 5: Connectors
Ethernet Connectors
Serial Connector COM1
USB Connector
AMC Edge Connector
Battery Sockets
SODIMM Connector
USB/SATA Storage
Module Connector
Figure 5-1: AMC123 Connector Locations
AdvancedMC Card Edge Connector (P1)
PinSignal
1GNDFirstLogic Ground170GNDFirstLogic Ground
2PWRCarrierFirstPayload Power169TDICarrierSecondJTAG Test Data Input
3PS1#ModuleLastPresence 1168TDOModuleSecondJTAG Test Data Output
4MPCarrierFirstManagement Power167TRST#CarrierSecondJTAG Test Reset Input
5GA0CarrierSecondGeographic Address 0166TMSCarrierSecondJTAG Test Mode Select
The AdvancedMC connector provides the electrical interface between the AMC123 and the
carrier. The AMC connector is fixed to the carrier and the card edge interface at th e back of the
AMC123 plugs into it. There are different styles of connectors for the different types of AMC
bays and for different levels of connectivity. The card edge interface on the AMC123 is
compatible with the extended, 170 pin B+ style connector found on PT's AMP507x MicroTCA
Platform.
Besides power and ground, the AMC123 card edge interface routes two SATA channels, x8
PCI Express bus, two SerDes 1Gb Ethernet channels and IPMI to the AMC connector.
See Table 5-2, “AMC Connector Pinout,” for pin definitions and Figure 5-1, “AMC123
A 4-pin, standard T ype A USB 2.0 Port 0 Interface connector is available on the AMC123's front
panel. Table 5-4, “USB Connector Pinout,” shows pin definitions for this connector.
Table 5-4: USB Connector Pinout
PinSignal Name
1VCC (+5V)
2USB_N
3USB_P
4GND
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Caution:
COM1 Serial Port Connector (J4)
A 4-pin, RJ9 connector provides a Console port interface on the AMC123’s front panel
providing RS232 signal levels and 15KV ESD protection. The connector is pinned out for DTE
operation. RTS, CTS and modem-control signals are not supported. The RJ9 plug associated
with a standard RJ9-to-DB9 cable will interface with this connector. See “Serial Console
Cable,” on page 87.
Table 5-5, “RJ9 Console Port Pinout,” shows pin definitions for this connector.
Table 5-5: RJ9 Console Port Pinout
PinSignal Name
1GND
2RXD (IN)
3TXD (OUT)
4GND
Be careful to insert the RJ9 connector on the management cable into the serial port only.
Inserting it into an Ethernet connector may damage the Ethernet connector pins. See Figure
3-2, “RJ9 Cable Connection,” on page 40.
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Internal Connectors
The AMC123 contains the following internal connectors. See Figure 5-1, “AMC123 Connector
Locations,” on page 80 for connector locations.
DDR2 SDRAM Connector
A 90°, 200-pin connector accommodates a single 200-pin, 333.5 MHz PC2-5300 (64-bit +
ECC) SDRAM SO-RDIMM Registered SDRAM used for system memory . For more informatio n
about system memory, see “Memory Configuration,” on page 36.
uSSD/SDM Storage Interface Connector (P5)
The AMC123 includes a 20-pin header that supports the installation of one of the following
storage modules for on-board flash storage:
•A standard USB storage module (uSSD) with a USB 2.0 interface
•A standard SATA disk module (SDM) with a SATA II interface
Internal Connectors
See Table 5-6, “uSSD/SDM Storage Connector Pinout,” on page 85 for pin definitions. Table 5-6: uSSD/SDM Storage Connector Pinout
Storage module kits purchased from PT include a module, a threaded standoff, and two
screws. To install the storage module:
1. Align the standoff with the hole in the module, on the side with the connector. See Figure 5-2.
2. Attach the standoff to the module with one of the included screws. Do not overtighten.
3. Mount the connector on the module onto the uSSD/SDM Storage Interface Connector (P5) on the
AMC123.
4. Thread the second screw through the hole in the bottom of the AMC123 and into the standoff.
5. Tighten the screw but do not ove rtighten.
6. Set SW4-1 to ON to route SATA Port 1 to the on-board SATA flash storage module. See “SATA,
Ethernet, USB, and JTAG Configuration Switch (SW4),” on page 44.
Figure 5-2: Installing a Storage Module
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Battery Sockets
For information on battery compatibility, see “Batteries,” on page 30.
Cables
Serial Console Cable
The front panel RJ9 serial connector may be used to access the MMC Command Line Interface
or the COM1 port with an RJ9-to-RJ11 serial console cable. See “COM1 Serial Port Connector
(J4),” on page 84.
The RJ9 (4P4C)-to-RJ11 (6P4C) interface cable is used to connect to an DB9-to-RJ11 serial
adapter. Table 5-7, “RJ9-to-RJ11 Serial Console Cable Pinout,” shows the cable pinout for this
cable.
Table 5-7: RJ9-to-RJ11 Serial Console Cable Pinout
Cables
RJ9 (4P4C)RJ11 (6P4C)
12
23
34
45
See “Serial Console Cable Kit,” on page 22 for information about this cable and adapter.
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Overview
This chapter discusses the various reset types and reset sources on the AMC123. Because
many embedded systems have different requirements for board reset functions, the
incorporation of this sub-system on the AMC123 has been designed to provide maximum
flexibility.
Key topics in this chapter include:
•“Reset Types and Sources,” on page 89
•“Power Reset,” on page 89
•“Hard Reset,” on page 90
•“Soft Reset,” on page 91
•“Limited Resets,” on page 91
•“NMI/SMI/SERIRQ Sources,” on page 91
Chapter 6
Reset
Reset Types and Sources
The AMC123 supports the following reset types that affect the entire module. All resets are
specific to the MMC or payload circuitry and one does not affect the other.
•Power reset
•Hard reset
•Soft reset
Limited resets that do not affect the entire board are also supported.
Power Reset
Power reset occurs when the power-on reset device changes from a power-off to a power-on
state. The power-off to power-on state occurs when either the payload power is turned on or
when the power good indication from the DC-to-DC converters is false and returns true.
A power reset also generates a hard reset.
FCLKA
The AMC123 is held in reset until the PCI Express reference clock (FCLKA) source is
determined. The AMC.1 R2.0 specification requires that FCLKA is e-keyed. The AMC123 is
shipped from the factory configured for AMC.1 R2.0 e-keying of FCLKA. AMC.1 R1.0 carriers
do not e-key FCLKA. If the AMC123 does not come out of reset when powered on, it is likely
that FCLKA is not configured properly for the specific carrier . See “CMOS Reset, FCLKA, SSC,
and COM1 Redirection Switch (SW2),” on page 42 for information on configuring FCLKA.
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Hard Reset
Hard resets may originate from the following sources:
•Intel EP80579 Integrated Processor initiated system reset request
Intel EP80579 Integrated Processor Initiated System Reset Request
The Intel EP80579 Integrated Processor chipset asserts PLTRST_N during power-up and
when a hard reset sequence is initiated through the CF9h register.
Payload Reset Initiated by the MMC
The MMC can drive a payload reset that results in a hard reset. The MMC circuitry has an
independent power-on reset circuit that is controlled by MMC power. A brown-out reset occurs
for the MMC when the MMC power drops below 2.7 V. The MMC monitors the payload reset,
but does not allow this reset to directly reset the MMC circuitry.
A watchdog timer within the MMC can reset the MMC. The MMC ICE interface can also reset
the MMC.
Payload Reset Initiated by the Carrier
The carrier can reset the MMC directly through the ENABLE_N signal.
When the AMC123 is extracted from a carrier, the carrier hot-swap controller unconditionally
removes backend power from the AMC123 and holds it in reset. The backend logic is powered
off. All on-board devices are reset.
Front Panel Reset Button
When the system reset button (see Figure 2-1, “AMC123 Front Panel,” on page 23) on the front
panel is pressed, the AMC123 resets itself.
Intel EP80579 Integrated Processor Watchdog Timer
The watchdog timer can be used to cause an interrupt that allows the processor to attempt
deadlock recovery. It can then be reprogrammed to automatically cause a reset upon failure to
service the interrupt.
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Loss of Signal from AMC 100 MHz Clock
Caution:
A Loss of Signal (LOS) from the AMC 100 MHz clock buffer, when selected as the reference
source for the processor, will cause a hard reset.
Soft Reset
Soft resets may be initiated through the following devices:
•COP In-Circuit Emulator (ICE)
•Intel EP80579 Integrated Processor (limited to the processor)
Limited Resets
Limited resets include:
•Custom logic-initiated resets
•MMC resets
•Peripheral reset (Compact Flash, Ethernet PHY, and DDR2 memory)
Reset Types and Sources
Do not reset the DDR2. Attempting to reset this component results in module lockup. This
reset is used for initialization purposes only.
Custom Logic-Initiated Resets
Custom logic includes reset bits that control reset to payload devices such as the on-board
quad PHY.
MMC Resets
The MMC has independent reset sources that do not affect the entire module such as:
•Soft reset for processor
•Watchdog timer
•Peripheral reset
The soft reset initiated by the MMC resets the Intel EP80579 Integrated Processor but leaves
the processor’s peripheral configuration untouched.
The Intel EP80579 Integrated Processor supports a watchdog timer that can be configured to
cause an interrupt.
NMI/SMI/SERIRQ Sources
The two-stage watchdog timer can be programmed to generate a non-maskable interrupt
(NMI), system management interrupt (SMI), or serial interrupt request (SERIRQ), if it is not
strobed within a given time-out period. Though not a reset in the strict sense, an NMI can have
the same effect as other resets.
See “Two-Stage Watchdog Timer,” on page 31 for more information.
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Overview
This chapter describes the electrical, environmental, and mechanical specifications of the
AMC123. Reliability information is also provided in this chapter.
Key topics in this chapter include:
•“Electrical and Environmental Specifications,” on page 93
•“Mechanical Specifications,” on page 95
•“Reliability,” on page 95
Electrical and Environmental Specifications
The subsequent topics provide tables and illustrations showing the following electrical and
environmental specifications:
Chapter 7
Specifications
•“Absolute Maximum Ratings,” on page 94
•“Environmental Parameters,” on page 94
•“DC Operating Characteristics,” on page 94
•“Battery Backup Characteristics,” on page 94
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Chapter 7: Specifications
Caution:
Absolute Maximum Ratings
Absolute maximum ratings are limits beyond which permanent damage to the module may
occur or module reliability may be affected. Stressing the AMC123 beyond the “absolute
maximum ratings” may cause permanent damage.
The values shown below are stress ratings only. Do not operate the AMC123 at these
maximums. See “DC Operating Characteristics,” on page 94, for operating conditions.
Supply Voltage, Vcc12 (+12 V):10-14 V
Supply Voltage, Vcc3 (+3.3 V):3.0-3.6 V
Storage (Non-operating) Temperature:-40° C to +85° C (-40° F to 185° F)
Non-Condensing Relative Humidity:<95% at 40° C (104° F)
Environmental Parameters
The operating temperature range is 0° C to 70° C (32º F to 158° F). The AMC123 comes from
the factory with an integrated heat sink for cooling the processor. The heat sink requires 300
LFM of airflow.
External airflow must be provided at all times during operation to avoid damaging the CPU
module. PT strongly recommends use of a card rack fan tray to supply the external airflow.
See Chapter 8, “Thermal Considerations,” on page 97 for more information about module
cooling mechanisms.
DC Operating Characteristics
Table 7-1, “Power Consumption with 1.2 GHz Processor,” shows power consumption of an
AMC123 with a 1.2 GHz Intel EP80579 Integrated Processor with 2GB DDR2-800 SDRAM
installed.
Table 7-1: Power Consumption with 1.2 GHz Processor
Voltage (VDC)Maximum Power (W)
12 V, (10 - 14 V)30 W
3.30 V, (3.0 - 3.6 V)0.35 W
Total Power30.35 W
Battery Backup Characteristics
The battery backup circuit on the AMC123 contains two ML621 manganese lithium batteries
that are charged during normal operation and are used only when power is not applied to the
module. The battery operates from -20°C to +60°C under normal operating conditions. Fully
charged batteries can keep the battery-backed portions of the AMC12 3 po we red for >60 days.
For ensuring discharged batteries are restored to a fully charged state , ensure power is applied
for more than 30 hours.
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Battery Replacement
180.6 mm
73.5 mm
Batteries are not field serviceable items. Return the module to PT for battery replacement. See
“Return Merchandise Authorization (RMA),” on page 17 for more information about returning
merchandise.
Mechanical Specifications
The AMC123 meets the PICMG AMC.0, R 2.0 Specification for mechanical parameters.
Mechanical dimensions are shown in Figure 7-1, “AMC123 Board Dimensions,” and outlined
below.
Board Length:180.6 mm (7.11 in)
Board Width:73.5 mm (2.89 in)
Board Height:19.05 mm (0.75 in) (mid-sized front panel)
Board Weight:.295 kg (10.4 oz.) with a 2 GB DDR2, heat sink, and flash loaded
Figure 7-1: AMC123 Board Dimensions
Mechanical Specifications
Reliability
The following reliability tests have been performed for the AMC123:
MTBF: 357,398 hours per Bellcore (Telecordia) SR-332 Issue 2
MTTR:3 minutes
Contact PT for more information.
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Chapter 7: Specifications
96
Page 97
Overview
Caution:
Caution:
This chapter describes the thermal requirements to reliably operate an AMC123 processor
module. Key topics in this chapter include:
•“Thermal Requirements,” on page 97
•“Temperature Monitoring,” on page 97
Thermal Requirements
The maximum processor die temperature allowed by the Intel EP80579 Integrated Processor
on the AMC123 is 95° C.
Chapter 8
Thermal Considerations
To avoid damaging the processor or other components on the module, do not exceed the
maximum processor core temperature!
The AMC123 comes from the factory equipped with an integrated heat sink to help dissipate
the heat generated by the processor. The maximum ambient air temperature required by the
heat sink to maintain core temperature below the maximum is 55° C. The maximum ambient air
temperature assumes airflow of 300 LFM past the heat sink.
External airflow must be provided at all times during operation to avoid damaging the
processor. PT strongly recommends use of a fan tray below the card rack to supply the
external airflow.
Temperature Monitoring
Because reliable long-term operation of the AMC123 depends on maintaining proper
temperature, PT strongly recommends that you verify the operating temperature of the
processor (core) in your final system configuration.
The Intel EP80579 Integrated Processor incorporates an on-die thermal sensor that is used to
monitor the processor's die temperature and determine when the maximum specified
component temperature has been reached.
While the MMC checks the die temperature of the processor for thermal monitoring, it relies on
the Thermal Control Circuit (TCC) to manage the processor temperature.
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Chapter 8: Thermal Considerations
Intel Thermal Monitor
The Intel EP80579 Integrated Processor provides the IA-32 core thermal monitor, which
controls the processor temperature by modulating the processor core clocks or by initiating an
enhanced Intel SpeedStep technology transition when the processor reaches its maximum
temperature. The AMC123 operates the thermal monitor in automatic mode so that the thermal
management is transparent to normal module operation.
If the Intel thermal sensor detects a overheat condition, the Processor Thermal Trip control
sequence is initiated and THRMTRIP# is asserted to immediately shut off power to the
AMC123.
See “Processor,” on page 103, for more information on how the thermal monitor on the Intel
EP80579 Integrated Processor functions.
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Overview
This chapter presents agency approval and certification information for the AMC123 Intel
EP80579 Integrated Processor AMC module.
Key topics in this chapter include:
•“Network Equipment-Building System (NEBS) and European Telecommunications Standards Institute
(ETSI),” on page 99
•“CE Certification,” on page 99
•“EN55022 Radiated and Conducted Emissions,” on page 100
•“EN300 386 Electromagnetic Compatibility (EMC),” on page 100
•“EN55024 Immunity,” on page 100
•“Safety,” on page 100
•“FCC (USA) Class A Notice,” on page 100
•“Industry Canada Class A Notice,” on page 101
•“Product Safety Information,” on page 101
•“Compliance with RoHS and WEEE Directives,” on page 102
Chapter 9
Agency Approvals
Network Equipment-Building System (NEBS) and
European Telecommunications Standards Institute
(ETSI)
The product described in this manual is designed to meet NEBS Level 3 and ETSI
Environmental Criteria:
•GR-63-CORE - Network Equipment-Building System Requirements: Physical Protection
•GR-1089-CORE - Electromagnetic Compatibility and Electrical Safety - Generic Criteria for Network
Telecommunications Equipment
CE Certification
The product described in this manual meets the intent of the following European Union
Directives:
•EU 89/336/EEC Electromagnetic Compatibility Directive, amended by 92/31/EEC, 93/68/EEC, 98/13/
EEC, and 2004/108/EC
•EU 72/23/EEC Low Voltage Directive, amended by 93/68/EEC and 2006/95/EC
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Chapter 9: Agency Approvals
by meeting the applicable EU standards as outlined in the Declaration of Conformance. The Declaration of Conformance is available from Performance Technologies, or from your
authorized distributor . Compliance will be demonstrated to the followin g specifications as listed
in the Official Journal of the European Communities.
EN61000-4-2Electro-Static Discharge (ESD)
EN61000-4-3Radiated Susceptibility
EN61000-4-4Electrical Fast Transient Burst
EN61000-4-5Surge Immunity
EN61000-4-6Frequency Magnetic Fields
EN61000-4-11Voltage Dips, Variations, and Short Interruptions
Safety
The product described in this manual meets the following safety regulations:
EN/IEC 60950Safety Requirements for Information Technology Equipment
CB SchemeCB Scheme Certificate and Report
UL60950UL Recognized
FCC (USA) Class A Notice
This equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference when the equipment is operated in a commercial
environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed
and used in accordance with the instruction manual, may cause harmful interference to radio
communications. Operation of this equipment in a residential area is likely to cause harmful
interference in which case the user will be required to correct the interference at his own
expense.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two
conditions:
1. This device may not cause harmful interference, and
100
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