Prestigio NOBILE 159W Technical & Service Manual

Page 1
PRESTIGIO NOBILE 159W
TECHNICAL SERVICE
MANUAL
Page 2
Page 3
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
1.2. Software Specification……………………………………………………..
3
17
2
1-2
Page 4
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
1.1 Hardware Specification. A. CPU
The Intel® Pentium® M processor is a high performance, low power mobile processor with
several micro-architectural enhancements over existing Intel mobile processors.
The following list provides some of the key features on this processor:
Supports Intel® Architecture with Dynamic Execution High performance, low-power core On-die, primary 32-kbyte instruction cache and 32-kbyte write-back data cache On-die, 1-MByte second level cache with Advanced Transfer Cache Architecture Advanced Branch Prediction and Data Prefetch Logic Streaming SIMD Extensions 2 (SSE2) 400-MHz, Source-Synchronous processor system bus Advanced Power Management features including Enhanced Intel SpeedStep® technology Micro-FCPGA and Micro-FCBGA packaging technologies
The Intel Pentium M processor is manufactured on Intels advanced 0.13 micron process
technology with copper interconnect. The processor maintains support for MMX technology and
Internet Streaming SIMD instructions and full compatibility with IA-32 software. The high
performance core features architectural innovations hlike Micro-op Fusion and Advanced Stack
Management that reduce the number of micro-ops handled by the processor. These results in more
efficient scheduling and better performance at lower power. The on-die 32-kB Level 1 instruction
and data caches and the 1-MB Level 2 cache with Advanced Transfer Cache Architecture enable
significant performance improvement over existing mobile processors. The processor also features a
very advanced branch prediction architecture that significantly reduces the number of mispredicted
branches. The processors Data Prefetch Logic speculatively fetches data to the L2 cache before an
L1 cache requests occurs, resulting in reduced bus cycle penalties and improved performance.
The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in
multimedia applications including 3-D graphics, video decoding /encoding, and speech recognition.
The new packed double-precision floating-point instructions enhance performance for applications
that require greater range and precision, including scientific and engineering applications and
advanced 3-D geometry techniques, such as ray tracing.
The Intel Pentium M processors 400-MHz processor system bus utilizes a split-transaction,
1-3
Page 5
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
deferred reply protocol. The 400-MHz processor system bus uses Source-Synchronous Transfer
(SST) of address and data to improve performance by transferring data four times per bus clock (4X
data transfer rate, as in AGP 4X). Along with the 4X data bus, the address bus can deliver addresses
two times per bus clock and is referred to as a double-clocked or 2X address bus. Working
together, the 4X data bus and 2X address bus provide a data bus bandwidth of up to 3.2
Gbytes/second. The processor system bus uses Advanced Gunning Transceiver Logic (AGTL+)
signal technology, a variant of GTL+ signalling technology with low power enhancements.
Note: The term AGTL+ has been used for Assisted Gunning Transceiver Logic technology on other
Intel products.
The processor features Enhanced Intel SpeedStep technology, which enables real-time dynamic
switching between multiple voltage and frequency points instead of two points supported on
previous versions of Intel SpeedStep technology. This results in optimal performance without
compromising low power. The processor features the Auto Halt, Stop-Grant, Deep Sleep, and
Deeper Sleep low power states.
The Intel Pentium M processor utilizes socketable Micro Flip-Chip Pin Grid Array
(Micro-FCPGA) and surface mount Micro Flip-Chip Ball Grid Array (Micro-FCBGA) package
technology. The Micro-FCPGA package plugs into a 479-hole,surface-mount, Zero Insertion Force
(ZIF) socket, which is referred to as the mPGA479M socket.
This document includes specifications for the Intel Pentium M processor at Highest Frequency
Mode (HFM) core frequencies of 1.30, 1.40, 1.50, 1.60 and 1.70 GHz, the Low Voltage Intel
Pentium M processor at HFM core frequency of 1.10 and 1.20 GHz and the Ultra Low Voltage Intel
Pentium M processor at HFM core frequency of 900MHz and 1.00 GHz.
B. North Bridge – MCH 855PM
Intel® Centrino mobile technology with integrated wireless LAN capabilities was designed
specifically for wireless notebook PCs – delivering outstanding mobile performance and enabling
extended battery life and thinner, lighter designs.
The Intel® 855PM Memory Controller Hub (MCH) is an Intel® Centrino mobile technology
component. The MCH manages the flow of information between its four interfaces: the processor
side bus (communication with the Intel® Pentium® M processor), memory interface, AGP interface,
1-4
Page 6
and hub interface. The MCH arbitrates between the four interfaces when each initiates an operation.
The Intel® 855PM memory controller hub (MCH) is designed for use with the Intel® Pentium® M
processor. The MCH supports data coherency via snooping and must perform address translation for
access to AGP Aperture memory. To increase system performance, the MCH incorporates several
queues.
The Intel® 855PM MCH may contain design defects or errors known as errata, which may cause
the product to deviate from published specifications. This information will be available in
Specification Updates.
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Features
Processor/Host Bus Support
Supports the Intel® Pentium® M processor
2x Address, 4x Data
Supports system bus at 400 MT/s
Supports host bus Dynamic Bus Inversion (DBI)
Supports 32-bit host bus addressing
12 deep In-Order Queue
AGTL+ bus driver technology with integrated GTL termination resistors and low voltage
operation (1.05 V)
Support for DPWR# signal to Intel® Pentium® M processor for PSB power
management
Memory System
Directly supports one DDR channel, 64b wide (72b with ECC)
Supports 200-MHz and 266-MHz DDR devices
Supports 64-Mb, 128-Mb, 256-Mb, and 512-Mb technologies for x16 devices and x8 devices.
All supported devices have four banks
Configurable optional ECC operation (single bit Error Correction and multiple bit Error
Detection)
Supports up to 16 simultaneous open pages
Supports page sizes of 2 kB, 4 kB, 8 kB, and 16 kB. Page size is individually selected for every
row.
Thermal throttling scheme to selectively throttle reads and/or writes. Throttling can be
triggered by preset read/write bandwidth limits.
For DDR, Max of two, double-sided SODIMMs (four rows populated) with unbuffered
PC1600/PC2100 DDR (with or without ECC)
By using stacked 512-Mb technology, the largest memory capacity possible is 2.0 GB
1-5
Page 7
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
System Interrupts
Supports 8259 and processor system bus interrupt delivery mechanism
Supports interrupts signaled as upstream Memory Writes from AGP/PCI (PCI semantics only)
and hub interface
MSI sent to the CPU through the System Bus
From IOxAPIC in ICH4-M
Supports peer MSI between hub interface and AGP
Provides redirection for upstream interrupts to the System Bus
Accelerated Graphics Port (AGP) Interface
Supports a single AGP device (either through a connector or on the motherboard)
AGP Support
Supports AGP 2.0 including 1x, 2x, and 4x AGP data transfers and 2x/4x Fast Write protocol
Supports only 1.5-V AGP electricals
32 deep AGP request queue
PCI semantic (FRAME# initiated) accesses to DRAM are snooped
AGP semantic (PIPE# and SBA) accesses to DRAM are not snooped
High priority access support
Hierarchical PCI configuration mechanism
Delayed transaction support for AGP-to- DRAM FRAME# semantic reads that can not be
serviced immediately
32-bit upstream address support for inbound AGP and PCI cycles
32-bit downstream address support for outbound PCI and Fast Write cycles
AGP Busy/Stop Protocol
AGP Clamping and Sense Amp Control
Hub Interface to ICH4-M
266 MB/s point-to-point hub interface to ICH4-M
66-MHz base clock
Supports the following traffic types to the ICH4-M
1 Hub interface-to-AGP memory writes 2 Hub interface-to-DRAM 3 CPU-to-hub interface 4 Messaging
-MSI Interrupt messages
-Power Management state change
-SMI, SCI, and SERR error indication
1-6
Page 8
Power Management
SMRAM space remapping to A0000h (128 kB)
Supports extended SMRAM space above 256 MB, additional 128k/256k/512k/1 MB TSEG
from Top of Memory, cacheable (cacheability controlled by CPU)
APM Rev 1.2 compliant power management
Suspend to System Memory
ACPI 1.0b, 2.0 Support
Enhanced Intel SpeedStep® Technology Support
Cache coherency with CPU in sleep mode
Dynamic Memory Power-down
Package
Package options
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
593-pin Micro-FCBGA (37.5 x 37.5 mm)
C. South Bridge – ICH4-M
The ICH4 provides extensive I/O support. Functions and capabilities include:
PCI Local Bus Specification, Revision 2.2-compliant with support for 33-MHz PCI operations. PCI slots (supports up to 6 Req/Gnt pairs) ACPI Power Management Logic Support Enhanced DMA Controller, Interrupt Controller, and Timer Functions Integrated IDE controller supports Ultra ATA100/66/33 USB host interface with support for 6 USB ports; 3 UHCI host controllers; 1 EHCI high-speed
USB 2.0 Host Controller
Integrated LAN Controller System Management Bus (SMBus) Specification, Version 2.0 with additional support for I2C
devices
Supports Audio Codec 97, Revision 2.3 specification (a.k.a., AC ’97 Component Specification,
Revision 2.3). Link for Audio and Telephony codecs (up to 7 channels)
Low Pin Count (LPC) interface Firmware Hub (FWH) interface support Alert On LAN* (AOL) and Alert On LAN 2* (AOL2)
1-7
Page 9
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
The ICH4 incorporates a variety of PCI functions that are divided into three logical devices (29, 30,
and 31) on PCI Bus 0 and one device on Bus 1. Device 30 is the Hub Interface-To-PCI bridge.
Device 31 contains all the other PCI functions, except the USB Controllers and the LAN Controller,
as shown in Table 1-2. The LAN controller is located on Bus 1.
PCI Devices and Functions
Feature
PCI Bus Interface
Ø Supports PCI Revision 2.2 Specification at 33 MHz Ø 133 MB/sec maximum throughput Ø Supports up to 6 master devices on PCI Ø One PCI REQ/GNT pair can be given higher arbitration priority (intended for external
1394 host controller)
Ø Support for 44-bit addressing on PCI using DAC protocol
Integrated LAN Controller
Ø WfM 2.0 and IEEE 802.3 compliant Ø LAN Connect Interface (LCI) Ø 10/100 Mbit/sec ethernet support
Integrated IDE Controller
Ø Supports Native Mode register and interrupts Ø Independent timing of up to 4 drives, with separate primary and secondary IDE cable
connections
1-8
Page 10
Ø Ultra ATA/100/66/33, BMIDE and PIO modes Ø Tri-state modes to enable swap bay
USB
Ø Includes 3 UHCI host controllers that support 6 external ports Ø New: Includes 1 EHCI high-speed USB 2.0 Host Controller that supports all six ports Ø New: Supports a USB 2.0 high-speed debug port Ø Supports wake-up from sleeping states S1-M–S5 Ø Supports legacy keyboard/mouse software
AC'97 Link for Audio and Telephony CODECs
Ø New: Third AC_SDATA_IN line for three codec support Ø Supports AC 97 2.3 Ø New: Independent bus master logic for 7 channels (PCM In/Out, Mic 1 input, Mic 2 input,
modem in/out, S/PDIF out)
Ø Separate independent PCI functions for audio and modem
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Ø Support for up to six channels of PCM audio output (full AC3 decode) Ø Supports wake-up events
Interrupt Controller
Ø Support up to 8 PCI interrupt pins Ø Supports PCI 2.2 message signaled interrupts Ø Two cascaded 82C59 with 15 interrupts Ø Integrated I/O APIC capability with 24 interrupts Ø Supports serial interrupt protocol Ø Supports processor system bus interrupt delivery
New: 1.5 V operation with 3.3 V I/O
Ø 5V tolerant buffers on IDE, PCI, USB over-current and legacy signals
Timers Based on 82C54
Ø System timer, refresh request, speaker tone output
Power Management Logic
Ø ACPI 2.0 compliant Ø ACPI-defined power states (C1–C4, S1-M, S3–S5) Ø ACPI power management timer Ø Support for Intel® SpeedStepTM technology processor power control Ø Support for Deeper Sleep power state Ø PCI CLKRUN# and PME# support Ø SMI# generation Ø All registers readable/restorable for proper resume from 0 V suspend states
External Glue Integration
1-9
Page 11
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Ø Integrated pull-up, pull-down and series termination resistors on IDE, processor interface Ø Integrated Pull-down and Series resistors on USB
Enhanced Hub Interface buffers improve routing flexibility (Not available with all Memory
Controller Hubs)
Firmware Hub (FWH) Interface supports BIOS memory size up to 8 MB Low Pin Count (LPC) Interface
Ø Supports two Master/DMA devices.
Enhanced DMA Controller
Ø Two cascaded 8237 DMA controllers Ø PCI DMA: Supports PC/PCI Includes two PC/PCI REQ#/GNT# pairs Ø Supports LPC DMA Ø Supports DMA collection buffer to provide Type-F DMA performance for all DMA
channels
Real-Time Clock
Ø 256-byte battery-backed CMOS RAM
System TCO Reduction Circuits
Ø Timers to generate SMI# and Reset upon detection of system hang Ø Timers to detect improper processor reset Ø Supports ability to disable external devices
SMBus
Ø New: Hardware packet error checking Ø New: Supports SMBus 2.0 Specification Ø Host interface allows processor to communicate via SMBus Ø Slave interface allows an external microcontroller to access system resources Ø Compatible with most 2-wire components that are also I2C compatible
GPIO
Ø TTL, open-drain, inversion
Package 31x31 mm 421 BGA
D. Clock Generator
1-10
Page 12
The ICS950813 is a single chip clock solution for desktop designs using the
Brookdale/Odem/Montara-GM for P4/Banias processor.
The ICS950813 is part of a whole new line of ICS clock generators and buffers called TCHTM
( Timing Control Hub ). This part incorporates ICS’s newest clock technology with offers more
robust features and functionality. Employing the use of a serially programmable I2C interface, this
device can adjust the output clocks by configuring the frequency setting, the output divider rations,
selecting the ideal spread percentage, the output skew, the output strength, the enabling / disabling
each individual output clock. M/N control can configure output frequency with resolution up to 0.1
MHz increment.
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Output Features
3 Differential CPU Clock Pairs @ 3.3V
7 PCI (3.3V) @ 33.3MHz including 2 early PCI clocks
3 PCI_F (3.3V) @ 33.3MHz
1 USB (3.3V) @ 48MHz, 1 DOT (3.3V) @ 48MHz
1 REF (3.3V) @ 14.318MHz
5 3V66 (3.3V) @ 66.6MHz
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
Features / Benefits
Provides standard frequencies and additional 3%, 5% and 10% over-clocked frequencies
Supports spread spectrum modulation: No spread, Center Spread (±0.3%, ±0.55%), or Down Spread
(-0.5%, -0.75%)
Offers adjustable PCI early clock via latch inputs
Selectable 1X or 2X strength for REF via I2C interface
Programmable group to group skew
Linear programmable frequency and spreading %
Efficient power management scheme through PD#, CPU_STOP# and PCI_STOP#.
Uses external 14.318MHz crystal
Stop clocks and functional control available through I2C interface.
1-11
Page 13
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Key Specifications
n CPU Output Jitter <150ps n 3V66 Output Jitter <250ps n CPU Output Skew <100ps
E. Video Graphics – ATi M11P
The MOBILITY M11 provides one of the fastest and most advanced 2D, 3D, and multimedia
graphics performance for notebooks. Its architecture introduces the latest achievements in the
graphics industry, which enable the use of the progressive new features in upcoming applications,
but without compromising performance. ATIs support of DirectX® 9 features, highly optimized
OpenGL® support, and flexible memory configurations allow implementations targeted at the
gaming enthusiast, consumer, business and workstation platforms.
SMARTSHADER 2.0 Advanced Shader Technology
Ø Provides complete hardware-accelerated support for the new DirectX® 9 programmable
shader model, enabling more complex and realistic texture and lighting effects than ever
before.
Ø Significant improvement over first-generation shaders introduced in DirectX® 8, with a
much more powerful and intuitive instruction set.
Ø Offers full support for this feature in OpenGL® applications.
SMOOTHVISION 2.0 Flexible Anti-Aliasing and Anisotropic Filtering
Ø 2x/4x/6x full-scene anti-aliasing modes Ø Adaptive algorithm with programmable sample patterns Ø 2x/4x/8x/16x anisotropic filtering modes Ø Adaptive algorithm with bi-linear (performance) and tri-linear (quality) options
High Performance Memory Support
Ø Incorporates support for DDR SDRAM/SGRAM. Ø Features key items from ATIs third generation HYPER Z III technology that conserves
memory bandwidth for improved performance in demanding applications.
Dual Display Support
Ø Leading-edge technology, fully optimized with HYDRA VISION, flexibly supports
multiple combinations of notebook LCD, traditional CRT monitors, flat panel displays and
1-12
Page 14
TV.
Ø Features Dual Channel DVI support. Ø 230MHz LVDS transmitter supports LCD panels up to QXGA (2048x1536) resolution. Ø Integrated 165MHz TMDS transmitter supports external flat panels up to UXGA
(1600x1200) resolution.
Ø High performance DAC speeds of 400MHz.
VIDEO Acceleration
Ø M11 allows the integration of industry leading digital video features, including advanced
de-interlacing algorithms for unprecedented video quality and integrated digital TV
decode capability. Includes programmable, independent gamma control for the video
overlay.
Ø New FULLSTREAM technology removes blocky artifacts from streaming and Internet
video and provides sharper image quality.
Ø Integrated general purpose xDCT engine (capable of performing both forward and inverse
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
discrete cosine transform) and motion compensation (MC) support for the acceleration of
MPEG encoding and decoding as well as DV (digital video) encoding and decoding.
Features In Detail
2D Acceleration Features
Ø A highly optimized 128-bit engine, capable of processing multiple pixels/clock. Ø Hardware acceleration is provided for Bitblt, line drawing, polygon and rectangle fills, bit
masking, monochrome expansion, panning and scrolling, scissoring, and full ROP support
(including ROP3).
Ø Optimized handling of fonts and text using ATI proprietary techniques. Ø Game acceleration including support for Microsoft's DirectDraw: Double Buffering,
Virtual Sprites, Transparent Blit, and Masked Blit.
Ø Acceleration in 8/15/16/32 bpp modes. Ø Support for WIN 2000 & WIN XP GDI extensions: Alpha BLT, Transparent BLT,
Gradient Fill.
Ø Hardware cursor support up to 64x64x32bpp, with alpha channel for direct support of
WIN 2000 & WIN XP alpha cursor standard.
3D Acceleration Features
Ø Four parallel 3D rendering pipelines. Ø Full DirectX9 Pixel Shader 2.0 support. Ø Full DX9 conformance, including floating point per component at full speed. Ø Support for 2xAA, 4xAA and 6xAA subsamples, with little performance loss in most
cases.
1-13
Page 15
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Ø Advanced AA quality algorithms, generating visuals that are superior to other solutions
with an equivalent number of samples.
Ø 2x/4x/8x/16x anisotropic filtering modes. Adaptive algorithm with bi-linear (performance)
and tri-linear (quality) options.
Ø Up to 16 unique textures, sharing 8 texture addresses. Ø Dedicated geometry acceleration for Direct3D and OpenGL, which incorporates 2 parallel
Vector / Scalar Engines performing HW transformation, clipping and lighting, including:
Texture Coordinate Generation.
Vertex Blending (skinning) with 4 matrices.
6 user defined clip planes.
8 light support.
Directional and Local Lighting.
Ø Fully compliant DirectX 9, Shader Model 2.0, Programmable Vertex Shader (full operand
and operation support) with up to 256 instructions and 256 vectors of constant store. This
includes Vertex Shader Loops, Branches, and Subroutines, which allow for vertex shader
programs of around 64,000 instructions in length.
Motion Video Acceleration Features
Ø Video scaling and fully programmable YCrCb to RGB color space conversion for
full-screen / full-speed video playback and fully adjustable color controls.
Ø Hardware I2C. Ø VIP 2.0 with multi channel DMA transfer. Ø 16-bit Zoom Video port. Ø Front end scaler support for 8, 15, 16, and 32 bpp color depths. Ø Back end overlay/scaler supports up to 8x4 tap filtering, and always ensures at least 4x2
tap filtering even in extreme cases. 4x4 tap is typical. Back-end scaler also supports
upscaling and downscaling, filtered scaling of all supported YUV formats, RGB32 and
RGB15/16, and filtered display of images up to 1536 pixels wide.
Ø Enhanced MPEG-2 hardware encode/decode acceleration, including support for:
1-14
Page 16
Integrated general purpose xDCT engine (capable of performing
both forward and inverse discrete cosine transform)
Motion compensation (MC) support for the acceleration of MPEG
encoding and decoding as well as DV (digital video) encoding and
decoding.
Parallel operation of the xDCT and MC and high processing rates
with minimal software overhead
Ø Provides dramatically reduced CPU utilization without incurring the cost of a full
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
MPEG-2 decoder.
Ø MPEG-4 simple profile support.
Ø Supports all format DTV/HDTV decode and top quality DVD with lowest CPU usage.
(Note: DTV/HDTV support is through component output, not DVI.)
Ø Adaptive de-interlacing filter eliminates video artifacts caused by displaying interlaced
video on non-interlaced displays, by analyzing image and using optimal de-interlacing
function on a per-pixel basis.
Dual Display Features
General
Ø Hydravision for dual monitor support. Ø Dual independent displays (LCD/DVI, DVI/CRT, LCD/TV, CRT/TV, etc.) Ø Two independent CRT controllers to support two asynchronous simultaneous display
paths.
Ø Integrated second DAC for the second CRT (TV) support. Ø Two triple 10-bit palette DACs with gamma correction for true WYSIWYG color. Pixel
rates up to 400MHz standard.
Ø Resolution, refresh rates and display data can be completely independent. Ø Primary display path supports VGA and accelerated modes, video overlay, hardware
cursor, and palette gamma correction.
Ø Secondary display path supports accelerated modes, video overlay, hardware cursor, and
palette gamma correction. However, it does not support VGA.
1-15
Page 17
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Ø Single video overlay using back-end scaler is switchable between displays. Ø Supports two new graphics formats: 16bpp aRGB 4444 and 16bpp alpha and index 88.
Also supports 8/15/16/24/32 bpp graphics formats with gamma correction in all modes.
Ø Support for auxiliary window signal. Ø Support for up to 4k x 4k resolution display. Ø Support for DDC1 and DDC2B+ for plug and play monitors, and AppleSense monitor
detection support.
Ø 8-bit alpha blending of graphics and video overlay. Ø Independent DDC lines for DAC and TMDS connections. Also full AppleSense support
on DAC connection.
Ø Hardware cursor up to 64x64 pixels in 2bpp, full color AND/XOR mix, and full color 8-bit
alpha blend.
Ø Independent h/w icon & h/w cursor on both display paths (simultaneous h/w cursor &
icon).
Ø Virtual desktop support.
TV Out
An integrated TV encoder with on-chip triple DAC allows simultaneous CRT/LCD/TV
output with these outstanding TV-out characteristics:
Ø 10-bit DAC with 8-tap filter producing scaled, flicker removed, artifact suppressed
display on a PAL or NTSC TV with Composite, S-Video, and RGB outputs.
Ø Support for Macrovision 7.02 copy protection standard (required by DVD players) - a
fully programmable timing capability, it will accommodate potential changes in the
Macrovision algorithm without any hardware changes.
Ø YUV Direct/Pass through mode for video/MPEG playback and DVD provides the best
quality movie playback, it also allows titles to be displayed on TV with their original high
quality and without any artifact from the TV-out circuit.
Ø Secondary display support for the RGB mode. Ø 1024x768 32bpp support. Modes supported include 800x600 and 16:9 modes such as
848x480, with user flexibility for moving and sizing the screen.
Ø Line 21 Closed Caption and Extended Data Service support for encoding in Vertical
Blanking Interval (VBI) of TV signal.
Ø CGMS-A DVD copy management support in VBI through Line-20 and/or Extended Data
Service (Line-21 Field 2).
Ø UV filtering based on color averaging results in a sharper picture as well as reduced
flicker.
Ø ATI's exclusive "Composite Dot Crawl" freeze option for PAL and NTSC to improve
picture quality.
Component output
1-16
Page 18
Ø Component output (YPbPr) for 480i, 480p, 720p and 1080i (NTSC only). Ø No support for scaling or flicker removal to component video outputs. Ø Includes NTSC Macrovision and CGMS.
Digital Display Support
General
Ø Support for fixed resolution displays (e.g. panels) from VGA (640x480) to wide UXGA
(1600x1200) resolution with full ratiometric expansion ability for source modes up to
1280x1024. Higher resolution panels and digital CRTs may be possibly supported -
contact ATI for details.
Ø Improved auto expansion. Ø Optional auto-centering mode to display desktop at native size without ratiometric
expansion.
Ø Support for VGA text modes in centering panel modes (up to approximately 165 MHz
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
pixel frequency).
Ø Support for reduced blanking intervals, as defined by VESA. Ø HDCP ready.
LVDS
An integrated LVDS transmitter for excellent LCD image quality:
Ø Single and dual pixel per clock, up to 230MHz dual-channel (115MHz per channel) Ø Supports LCD panels up to QXGA (2048x1536) 60Hz resolution. Ø General purpose I/O pins that allows support of LCD panel detection. Ø Conformance with OpenLDI and VESA FPDI specifications. Ø Common Panel Interface Specification (CPIS) compliant. Ø Ratiometric expansion with improved sharpness for top image quality when scaling up
from a non-native resolution.
TMDS
Ø Integrated TMDS transmitter running up to 165MHz (supports both coherent and
non-coherent clocking systems) for support up to 1600x1200 at 60Hz. Fully Compliant
with DVI and DFP connection standards. Ratiometric expansion.
Ø Support for external TMDS transmitter via digital output (configurable as a 12 bit or 24 bit
DDR bus) to drive most popular TMDS transmitters up to 165MHz frequency.
Ø Supports DVI, DFP and VESA P&D interfaces with integrated TMDS transmitter. Ø TMDS transmitter fully supports reduced blanking.
Bus Support Features
Ø Comprehensive AGP support:
1-17
Page 19
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
AGP3.0 mode: 4X and 8X operation.
AGP2.0 mode (1.5V signaling only)
Sideband Addressing.
AGP Texturing (Execute mode).
Both AGP reads and writes (with support for the fast write
capability defined in revision 2.0 of the AGP specification).
Ø PCI 2.3 compliance (using AGP electrical interface).
Memory Support Features
Ø 128/64-bit memory interface using DDR SGRAM, SDRAM or DDRII SDRAM to build
16/32/64/128/256 MB configurations.
Ø Support for SSTL-2, and SSTL-1.8 (1.8V self-terminated) memory interfaces. Ø Supports Elpida DDR SDRAM, which is similar to the DDR protocol with the following
exceptions:
Lower power through the use of data inversion signals for both
writes and reads
Higher clock speeds with no external termination required
Power Management Features
Ø Single chip solution in 0.13 micron, 1.0V-1.2V CMOS technology Ø Full ACPI 1.0b, OnNow, and IAPC (Instantly Available PC) power management. Ø PCI bus power management 1.1 and AGP Busy and Stop signals Rev 1.61 and Solano
2-M.
Ø Static and dynamic Power Management support (APM as well as ACPI) with full VESA
DPM and Energy Star compliance.
Ø AGP_BUSY/STP_AGP power management. Ø Full POWERPLAYTM, including enhanced POWER ON DEMAND support. Ø The Chip Power Management Support logic supports four device power states - On,
Standby, Suspend and Off - defined for the OnNow Architecture. Each power state can be
1-18
Page 20
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
achieved by software control bits.
Ø Clocks to every major functional block are controlled by a unique dynamic clock
switching technique which is completely transparent to the software. By turning off the
clock to the block that is idle or not used at that point, the power consumption is
significantly reduced during normal operation.
Internal LVDS Spread Spectrum Support
Ø The MOBILITY M11 Spread Spectrum controller is capable of generating a triangular
frequency modulation profile. The amount of spread and the modulation frequency is fully
programmable.
Ø Only the LVDS display is available to be spread (i.e., 1 PLL).
External Spread Spectrum Support
Ø Memory and/or core clock spread spectrum support via the GPIO16 pin. Ø External spread spectrum supported for TMDS or LVDS transmitters via the
SSIN/SSOUT pin.
PC Design Guide Compliance
MOBILITY M11 complies with all relevant sections of the current PC design guide specifications
from Intel/Microsoft.
Ø Fully compliant with PC99, PC99a, and PC 2001 requirements. Ø Fully compliant with Mobile PCI rev 1.0. Ø Bi-endian support for compliance on a variety of processor platforms.
Test Capability Features
The MOBILITY M11 has a variety of test modes and capabilities that provide a very high fault
coverage and low DPM (defect per million) ratio:
Ø Full scan implementation on the digital core logic which provides high fault coverage
through ATPG (Automatic Test Pattern Generation Vectors).
Ø Dedicated test logic for the on-chip custom memory macros to provide complete coverage
on these modules.
Ø A JTAG test mode (which is not entirely compliant to the IEEE 1149.1 standard) for access
to chip-level test functions and for board level connectivity testing.
Ø Integrated hardware diagnostic tests performed automatically upon initialization.
Ø High quality components through at-speed testing, built-in Scan, Iddq, CRC, chip
1-19
Page 21
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
diagnostics, and XOR tree.
Ø IEEE 1149.1 Scan path interface. Ø An XORTREE test mode on all the digital I/O's to allow for proper soldering verification
at the board level.
Ø Improved access to the analog modules and PLLs in the MOBILITY M11 in order to allow
full evaluation and characterization of these modules.
Ø Improved IDDQ mode support to allow chip evaluation through current leakage
measurements.
Other Features
Ø Support for ROM or Flash RAM parallel or serial video BIOS. Ø Includes patent pending hardware support for the Windows 2000 and Windows XP alpha
cursor, as well as acceleration of new GDI extensions such as Alpha BLTs, Transparent
BLTs, and Gradient Fills.
Compliance with Wassenaar Agreement
Ø 3D vector rate (as defined by the Wassenaar Agreement) is 18 - 23 M 10-pixel
vectors/sec for all of M11-CSP64, M11-CSP128.
F. PCMCIA
OZ711MC1
Feature
Ø Single-Slot CardBus Controller Ø Integrated Smart Card Reader (SCR) Controllers Ø Integrated Flash Media Reader (FMR) Controllers Ø One Optional Dedicated Reader (ODR) Port
PC Card/PCI Features
Ø Pin Compatible with OZ6912, OZ711EC1, and
OZ711M1 Single Socket Controllers
Ø Pin Upgradeable to OZ711MP1, Adding 1394 Ø PC Card Standard Release 8.1 Compliant Ø Supports USB PC Cards with NewSwitch Device
1-20
Page 22
Ø Compliant with PCI Local Bus Specification Version 2.3 Ø Provides Pipelined PCI/CardBus burst data transfers Ø Supports Parallel and Serial Interfaces to O2Micros
OZ2211, OZ2216, and NewSwitch Power Switches
Smart Card Features
Ø Supports Patented SmartCardBus® Operating Mode Ø Provides Optional Dedicated Smart Card Reader Ø Supports SmartCardBus® PC Card Passive Adapters Ø EMV Certified Smart Card Reader Core Ø Supports Asynchronous and Synchronous Cards Ø ODR Interface Supports USB Smart Cards Ø Complies to ISO7816, PC/SC, EMV, and CT-API (B1)
Flash Media Features
Ø Host Controller Supports MultiMediaCard (MMC), and SD Memory Cards
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Ø MS/MSPro Host Controller Supports 1-bit Memory Stick and 4-bit Memory Stick PRO
Media Cards
Ø PC Card Socket Supports MMC/SD/MS/MSPro Using O2Micros MemoryCardBus Passive
Adapters
Ø MultiMediaCard (MMC) Version 2.2 Compliant Ø Supports SD Memory Card CPRM Security Mode
Power Management Features
Ø Auxiliary Power Supply (VAUX) For D3COLD Standby Ø ACPI-PCI Bus Power Management Rev 1.1 Compliant Ø Supports OnNow LAN Wake-up, Ring Indicate,
CardBus Wake Signaling via PME#, and CLKRUN#
OZ2216
The OZ2216 is a dual slot PCMCIA (Personal Computer Memory Card International Association)
PC Card and CardBus power controller. It is used in conjunction with a serial data output, CardBus
controller to control and distribute VCC and VPP voltages to two PC Card slots. When connected to
3.3V, 5V, and 12V system power supplies, the OZ2216 can switch its VCC and VPP outputs between
0V, 3.3V, and 5.0V, in accordance with the control commands from the three-wire serial interface.
The OZ2216 also features low on-resistance MOSFET switches for 5V and 3.3V VCC.
The OZ2216 operation does not require 12V and 5V supplies, making it possible to operate the PC
cards in lowpower 3.3V modes. The internal logic and the MOSFET
1-21
Page 23
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
drive circuitry are powered by the 3V supply input. The OZ2216 also features a standby mode that
changes all the output-current limits to 50mA (typical).
The OZ2216 is protected by over temperature shutdown, and it protects itself and the system with
current limiting and cross-conduction lockout.
The OZ2216 is designed for full compatibility with the PCMCIA PC Card Specification,
including the CardBus and Zoomed Video (ZV) options, and is pin-to-pin compatible with
O2Micro’s OZ2206 and Texas Instruments
TPS2206/2216.
Feature
Ø Complete VCC and VPP switch for dual-slot PC Card interface Ø Standard 3-wire serial interface compatible with CardBus Controllers Ø High-efficiency, low-resistance switches Ø Meets PC Card standard Ø Compatible with 3.3V, 5V and 12V PC Cards Ø Operates in 3.3V low voltage mode when 3.3V is the only available input voltage Ø Standby Mode: 50-mA Current Limit (Typical) Ø Current limit and over temperature shutdown Ø 12V supply can be disabled except during 12V Flash memory programming Ø Break-before-make switching Ø Low on-resistance for 5V VCC Ø Low on-resistance for 3.3V VCC
G. IEEE 1394 – TSB43AB22A
The Texas Instruments TSB43AB22A device is an integrated 1394a-2000 OHCI PHY/link-layer
controller (LLC) device that is fully compliant with the PCI Local Bus Specification, the PCI Bus
Power Management Interface Specification, IEEE Std 1394-1995, IEEE Std 1394a-2000, and the
1394 Open Host Controller Interface
Specification. It is capable of transferring data between the 33-MHz PCI bus and the 1394 bus at
100M bits/s, 200M bits/s, and 400M bits/s. The TSB43AB22A device provides two 1394 ports that
have separate cable bias (TPBIAS). The TSB43AB22A device also supports the IEEE Std
1394a-2000 power-down features for battery-operated applications and arbitration enhancements.
1-22
Page 24
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
As required by the 1394 Open Host Controller Interface Specification (OHCI) and IEEE Std
1394a-2000, internal control registers are memory-mapped and nonprefetchable. The PCI
configuration header is accessed through configuration cycles specified by PCI, and it provides
plug-and-play (PnP) compatibility. Furthermore, the TSB43AB22A device is compliant with the
PCI Bus Power Management Interface Specification as specified by the PC 2001 Design Guide
requirements. The TSB43AB22A device supports the D0, D1, D2, and D3 power states.
The TSB43AB22A design provides PCI bus master bursting, and it is capable of transferring a
cacheline of data at 132M bytes/s after connection to the memory controller. Because PCI latency
can be large, deep FIFOs are provided to buffer the 1394 data. The TSB43AB22A device provides
physical write posting buffers and a highly-tuned physical data path for SBP-2 performance. The
TSB43AB22A device also provides multiple isochronous contexts, multiple cacheline burst
transfers, advanced internal arbitration, and bus-holding buffers.
An advanced CMOS process achieves low power consumption and allows the TSB43AB22A
device to operate at PCI clock rates up to 33 MHz.
The TSB43AB22A PHY-layer provides the digital and analog transceiver functions needed to
implement a two-port node in a cable-based 1394 network. Each cable port incorporates two
differential line transceivers. The transceivers include circuitry to monitor the line conditions as
needed for determining connection status, for initialization and arbitration, and for packet reception
and transmission.
The TSB43AB22A PHY-layer requires only an external 24.576-MHz crystal as a reference for
the cable ports. An external clock may be provided instead of a crystal. An internal oscillator drives
an internal phase-locked loop (PLL), which generates the required 393.216-MHz reference signal.
This reference signal is internally divided to provide the clock signals that control transmission of
the outbound encoded strobe and data information. A 49.152-MHz clock signal is supplied to the
integrated LLC for synchronization and is used for resynchronization of the received data.
Data bits to be transmitted through the cable ports are received from the integrated LLC and are
latched internally in synchronization with the 49.152-MHz system clock. These bits are combined
serially, encoded, and transmitted at 98.304M, 196.608M, or 393.216M bits/s (referred to as S100,
S200, or S400 speeds, respectively) as the outbound data-strobe information stream. During
transmission, the encoded data information is transmitted differentially on the twisted-pair B (TPB)
cable pair(s), and the encoded strobe information is transmitted differentially on the twisted-pair A
(TPA) cable pair(s).
1-23
Page 25
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
During packet reception, the TPA and TPB transmitters of the receiving cable port are disabled,
and the receivers for that port are enabled. The encoded data information is received on the TPA
cable pair, and the encoded strobe information is received on the TPB cable pair. The received
data-strobe information is decoded to recover the receive clock signal and the serial data bits. The
serial data bits are resynchronized to the local 49.152-MHz system clock and sent to the integrated
LLC. The received data is also transmitted (repeated) on the other active (connected) cable ports.
Both the TPA and TPB cable interfaces incorporate differential comparators to monitor the line
states during initialization and arbitration. The outputs of these comparators are used by the internal
logic to determine the arbitration status. The TPA channel monitors the incoming cable
common-mode voltage. The value of this
common-mode voltage is used during arbitration to set the speed of the next packet transmission. In
addition, the TPB channel monitors the incoming cable common-mode voltage on the TPB pair for
the presence of the remotely supplied twisted-pair bias voltage.
The TSB43AB22A device provides a 1.86-V nominal bias voltage at the TPBIAS terminal for port
termination. The PHY layer contains two independent TPBIAS circuits. This bias voltage, when
seen through a cable by a remote receiver, indicates the presence of an active connection. This bias
voltage source must be stabilized by an external filter capacitor of 1.0 μF.
The line drivers in the TSB43AB22A device operate in a high-impedance current mode and are
designed to work with external 112- line-termination resistor networks in order to match the 110-
cable impedance. One network is provided at each end of a twisted-pair cable. Each network is
composed of a pair of series-connected 56- resistors. The midpoint of the pair of resistors that is
directly connected to the TPA terminals is connected to its corresponding TPBIAS voltage terminal.
The midpoint of the pair of resistors that is directly connected to the TPB terminals is coupled to
ground through a parallel R-C network with recommended values of 5 k and 220 pF. The values of
the external line-termination resistors are designed to meet the standard specifications when
connected in parallel with the internal receiver circuits. An external resistor connected between the
R0 and R1 terminals sets the driver output current and other internal operating currents. This
current-setting resistor has a value of 6.34 k ±1%.
When the power supply of the TSB43AB22A device is off and the twisted-pair cables are
connected, the TSB43AB22A transmitter and receiver circuitry present a high impedance to the
cable and do not load the TPBIAS voltage at the other end of the cable.
When the device is in a low-power state (for example, D2 or D3) the TSB43AB22A device
automatically enters a low-power mode if all ports are inactive (disconnected, disabled, or
1-24
Page 26
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
suspended). In this low-power mode, the TSB43AB22A device disables its internal clock generators
and also disables various voltage and current reference circuits, depending on the state of the ports
(some reference circuitry must remain active in order to detect new cable connections,
disconnections, or incoming TPBIAS, for example). The lowest power consumption (the
ultralow-power sleep mode) is attained when all ports are either disconnected or disabled with the
port interrupt enable bit cleared.
The TSB43AB22A device exits the low-power mode when bit 19 (LPS) in the host controller
control register at OHCI offset 50h/54h (see Section 4.16, Host Controller Control Register) is set to
1 or when a port event occurs which requires that the TSB43AB22A device to become active in
order to respond to the event or to notify the LLC of the event (for example, incoming bias is
detected on a suspended port, a disconnection is detected on a suspended port, or a new connection is
detected on a nondisabled port). When the TSB43AB22A device is in the low-power mode, the
internal 49.153-MHz clock becomes active (and the integrated PHY layer becomes operative) within
2 ms after bit 19 (LPS) in the host controller control register at OHCI offset 50h/54h (see Section
4.16, Host Controller Control Register) is set to 1.
The TSB43AB22A device supports hardware enhancements to better support digital video (DV)
and MPEG data stream reception and transmission. These enhancements are enabled through the
isochronous receive digital video
enhancements register at OHCI offset A88h (see Chapter 5, TI Extension Registers). The
enhancements include automatic timestamp insertion for transmitted DV and MPEG-formatted
streams and common isochronous packet (CIP) header stripping for received DV streams.
The CIP format is defined by the IEC 61883-1:1998 specification. The enhancements to the
isochronous data contexts are implemented as hardware support for the synchronization timestamp
for both DV and MPEG CIP formats. The TSB43AB22A device supports modification of the
synchronization timestamp field to ensure that the value inserted via software is not stalethat is,
the value is less than the current cycle timer when the packet is transmitted.
1.1.1.Features
Fully compliant with provisions of IEEE Std 1394-1995 for a high-performance serial bus and
IEEE Std 1394a-2000
Fully interoperable with FireWire and i.LINK implementations of IEEE Std 1394
Compliant with Intel Mobile Power Guideline 2000
Full IEEE Std 1394a-2000 support includes: connection debounce, arbitrated short reset,
multispeed concatenation, arbitration acceleration, fly-by concatenation, and port
disable/suspend/resume
Power-down features to conserve energy in battery-powered applications include: automatic device
1-25
Page 27
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
power down during suspend, PCI power management for link-layer, and inactive ports powered
down
Ultralow-power sleep mode
Two IEEE Std 1394a-2000 fully compliant cable ports at 100M bits/s, 200M bits/s, and 400M bits/s
Cable ports monitor line conditions for active connection to remote node
Cable power presence monitoring
Separate cable bias (TPBIAS) for each port
1.8-V core logic with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling
environments
Physical write posting of up to three outstanding transactions
PCI burst transfers and deep FIFOs to tolerate large host latency
PCI_CLKRUN# protocol
External cycle timer control for customized synchronization
Extended resume signaling for compatibility with legacy DV components
PHY-Link logic performs system initialization and arbitration functions
PHY-Link encode and decode functions included for data-strobe bit level encoding
PHY-Link incoming data resynchronized to local clock
Low-cost 24.576-MHz crystal provides transmit and receive data at 100M bits/s, 200M bits/s, and
400M bits/s
Node power class information signaling for system power management
Serial ROM interface supports 2-wire serial EEPROM devices
Two general-purpose I/Os
Register bits give software control of contender bit, power class bits, link active control bit, and
IEEE Std 1394a-2000 features
Fabricated in advanced low-power CMOS process
PCI and CardBus register support
Isochronous receive dual-buffer mode
Out-of-order pipelining for asynchronous transmit requests
Register access fail interrupt when the PHY SCLK is not active
H. LAN – Ethernet Controller – RTL8100C
1-26
Page 28
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
The Realtek RTL8100C(L) is a highly integrated, cost-effective single-chip Fast Ethernet controller
that provides 32-bit performance,
PCI bus master capability, and full compliance with IEEE 802.3u 100Base-T specifications and
IEEE 802.3x Full Duplex Flow Control. It also supports the Advanced Configuration Power
management Interface (ACPI), PCI power management for modern operating systems that are
capable of Operating System Directed Power Management (OSPM) to achieve the most efficient
power
management possible. The RTL8100C(L) does not support CardBus mode as the RTL8139C does.
In addition to the ACPI feature, the RTL8100C(L) also supports remote wake-up (including AMD
Magic Packet, LinkChg, and Microsoft® wake-up frame) in both ACPI and APM environments.
The RTL8100C(L) is capable of performing an internal reset through the application of auxiliary
power. When auxiliary power is applied and the main power remains off, the RTL8100C(L) is ready
and waiting for the Magic Packet or Link Change to wake the system up. Also, the LWAKE pin
provides 4 different output signals including active high, active low, positive pulse, and negative
pulse. The versatility of the RTL8100C(L) LWAKE pin provides motherboards with
Wake-On-LAN (WOL) functionality.
The RTL8100C(L) also supports Analog Auto-Power-down, that is, the analog part of the
RTL8100C(L) can be shut down temporarily according to user requirements or when the
RTL8100C(L) is in a power down state with the wakeup function disabled.
In addition, when the analog part is shut down and the IsolateB pin is low (i.e. the main power is off),
then both the analog and digital parts stop functioning and the power consumption of the
RTL8100C(L) will be negligible. The RTL8100C(L) also
supports an auxiliary power auto-detect function, and will auto-configure related bits of their own
PCI power management registers in PCI configuration space.
The PCI Vital Product Data(VPD) is also supported to provide the information that uniquely
identifies hardware (i.e., the OEM brand name of RTL8100C(L) LAN card). The information may
consist of part number, serial number, and other detailed
information.
To provide cost down support, the RTL8100C(L) is capable of using a 25MHz crystal or OSC as
its internal clock source.
The RTL8100C(L) keeps network maintenance costs low and eliminates usage barriers. It is the
easiest way to upgrade a network
from 10 to 100Mbps. It also supports full-duplex operation, making 200Mbps bandwidth possible at
no additional cost. To improve compatibility with other brands. products, the RTL8100C(L) is also
capable of receiving packets with InterFrameGap no less than 40 Bit-Time. The RTL8100C(L) is
highly integrated and requires no .glue. logic or external memory.
1-27
Page 29
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
1.1.2.Feature
Ø 128 pin QFP/LQFP Ø Integrated Fast Ethernet MAC, Physical chip and transceiver in one chip Ø 10 Mb/s and 100 Mb/s operation Ø Supports 10 Mb/s and 100 Mb/s N-way
Auto-negotiation operation
Ø PCI local bus single-chip Fast Ethernet controller Ø Compliant to PCI Revision 2.2 Ø Supports PCI clock 16.75MHz-40MHz Ø Supports PCI target fast back-to-back transaction Ø Provides PCI bus master data transfers and PCI memory space or I/O space mapped data
transfers of RTL8100C(L)s operational registers
Ø Supports PCI VPD (Vital Product Data) Ø Supports ACPI, PCI power management Ø Supports 25MHz crystal or 25MHz OSC as the internal clock source. The frequency deviation
of either crystal or OSC must be within 50 PPM.
Ø Compliant to PC99/PC2001 standard Ø Supports Wake-On-LAN function and remote wake-up (Magic Packet*, LinkChg and
Microsoft® wake-up frame)
Ø Supports 4 Wake-On-LAN (WOL) signals (active high, active low, positive pulse, and negative
pulse)
Ø Supports auxiliary power-on internal reset, to be readyfor remote wake-up when main power
still remains off
Ø Supports auxiliary power auto-detect, and sets the related capability of power management
registers in PCI configuration space.
Ø Includes a programmable, PCI burst size and early Tx/Rx threshold. Ø Supports a 32-bit general-purpose timer with the external PCI clock as clock source, to generate
timer-interrupt
Ø Contains two large (2Kbyte) independent receive and transmit FIFOs Ø Advanced power saving mode when LAN function or wakeup function is not used Ø Uses 93C46 (64*16-bit EEPROM) to store resource configuration, ID parameter, and VPD
data.
Ø Supports LED pins for various network activity indications Ø Supports loop back capability Ø Half/Full duplex capability Ø Supports Full Duplex Flow Control (IEEE 802.3x) Ø 2.5/3.3V power supply with 5V tolerant I/Os.
1-28
Page 30
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Ø 0.25u CMOS process
I. Audio
AC97 Controller – VIA: VT1612A
VIA Technologies VT1612ATM 18-bit ∑∆ audio codec conforms to the AC97 2.2 and the S/PDIF
specification. The VT1612A integrates Sample Rate Converters and can be adjusted in 1Hz
increments. The analog mixer circuitry integrates a stereo enhancement to provide a pleasing 3D
surround sound effect for stereo media.
Furthermore, an integrated headphone amplifier with thermal shutdown adds signal value by
reducing the BOM. This codec is designed with aggressive power management to achieve low
power consumption. When used with 3.3V analog
supply, power consumption is further reduced. The primary applications for this part are desktop and
portable personal computers multimedia subsystems. However, it is suitable for any audio
subsystem requiring stereo audio input/output with S/PDIF digital output at competitive prices.
Feature
Ø AC97 2.2 S/PDIF extension compliant codec Ø 18-bit stereo full duplex SD codec Ø 1Hz resolution VSR (Variable Sampling Rate) Ø Integrated IEC958 line driver for S/PDIF Ø S/PDIF compressed digital or LPCM audio out Ø 3D stereo expansion for simulated surround Ø 18-bit independent rate stereo ADC/DAC Ø Hardware VU peak meters for PCM streams Ø 4 stereo, 2 mono analog line-level inputs Ø Alt. line-level output with volume control, or Ø Headphone Amplifier with Thermal Protection Ø Low Power consumption mode Ø Exceeds Microsoft® WHQL logo requirements Ø 3.3V digital, 3.3 or 5V analog power supply
Ø 48-pin LQFP small footprint package.
Amplifier – TI : TPA6011A
1-29
Page 31
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
The TPA6011A4 is a stereo audio power amplifier that drives 2 W/channel of continuous RMS
power into a 3- load. Advanced dc volume control minimizes external components and allows
BTL (speaker) volume control and SE (headphone) volume control. Notebook and pocket PCs
benefit from the integrated feature set that
minimizes external components without sacrificing functionality.
To simplify design, the speaker volume level is adjusted by applying a dc voltage to the VOLUME
terminal. Likewise, the delta between speaker volume and headphone volume can be adjusted by
applying a dc voltage to the SEDIFF terminal. To avoid an unexpected high volume level through
the headphones, a third terminal, SEMAX, limits the headphone volume level when a dc voltage is
applied. Finally, to ensure a smooth transition between active and shutdown modes, a fade mode
ramps the volume up and down.
Feature
Ø Advanced DC Volume Control With 2-dB Steps From –40 dB to 20 dB Ø Fade Mode Ø Maximum Volume Setting for SE Mode Ø Adjustable SE Volume Control Referenced to BTL Volume Control Ø 2 W Into 3-Speakers Ø Stereo Input MUX Ø Differential Inputs APPLICATIONS Ø Notebook PC Ø LCD Monitors Ø Pocket PC
Woofer LM4871
The LM4871 is a mono bridged audio power amplifier capable of delivering 3W of continuous
average power into a 3W load with less than 10% THD when powered by a 5V power supply (Note
1). To conserve power in portable applications, the LM4871s micropower shutdown mode (IQ =
0.6µA, typ) is activated when VDD is applied to the SHUTDOWN pin.
Boomer audio power amplifiers are designed specifically to provide high power, high fidelity audio
output. They require few external components and operate on low supply voltages from 2.0V to
5.5V. Since the LM4871 does not require output coupling capacitors, bootstrap capacitors, or
snubber networks, it is ideally suited for low-power portable systems that require minimum volume
and weight.
Additional LM4871 features include thermal shutdown protection, unity-gain stability, and external
1-30
Page 32
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
gain set.
Note 1: An LM4871LD that has been properly mounted to a circuit board will deliver 3W into 3W
(at 10% THD). The other package options for the LM4871 will deliver 1.5W into 8W (at 10% THD).
See the Application Information sections for further information concerning the LM4871LD,
LM4871MM, LM4871M, and the LM4871N.
Key Specifications
PO at 10% THD+N, 1kHz
LM4871LD: 3W , 4W loads 3W (typ), 2.5W (typ)
All other LM4871 packages: 8W load 1.5W (typ)
Shutdown current 0.6µA (typ)
Supply voltage range 2.0V to 5.5V
THD at 1kHz at 1W continuous average output power into 8W 0.5% (max)
Features
No output coupling capacitors, bootstrap capacitors, or snubber circuits required Unity-gain
stable
LLP, MSOP, SO, or DIP packaging
External gain configuration capability
Pin compatible with the LM4861
Applications
Ø Portable computers Ø Desktop computers Ø Low voltage audio systems
LMV821
The LMV821/LMV822/LMV824 bring performance and economy to low voltage low power
systems. With a 5 MHz unity-gain frequency and a guaranteed 1.4 V/µs slew rate, the quiescent
current is only 220 µA/amplifier (2.7 V). They provide rail-to-rail (R-to-R) output swing into heavy
loads (600 Guarantees). The input common-mode voltage range includes ground, and the
maximum input offset voltage is 3.5mV (Guaranteed). They are also capable of comfortably driving
large capacitive loads (refer to the application notes section).
The LMV821 (single) is available in the ultra tiny SC70-5 package, which is about half the size of
the previous title holder, the SOT23-5.
Overall, the LMV821/LMV822/LMV824 (Single/Dual/Quad) are low voltage, low power,
performance op amps, that can be designed into a wide range of applications, at an economical price.
1-31
Page 33
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Features
(For Typical, 5 V Supply Values; Unless Otherwise Noted)
Ultra Tiny, SC70-5 Package 2.0 x 2.0 x 1.0 mm
Guaranteed 2.5 V, 2.7 V and 5 V Performance
Maximum VOS 3.5 mV (Guaranteed)
VOS Temp. Drift 1 uV/° C
GBW product @ 2.7 V 5 MHz
ISupply @ 2.7 V 220 µA/Amplifier
Minimum SR 1.4 V/us (Guaranteed)
CMRR 90 dB
PSRR 85 dB
VCM @ 5V -0.3V to 4.3V
Rail-to-Rail (R-to-R) Output Swing
Ø @600 Load 160 mV from rail Ø @10 k Load 55 mV from rail
Stable with High Capacitive Loads (Refer to Application Section)
J. Embedded Controller IT8510E
The bridge provides the host to access the shared memory. It also provides EC code address space
mapped into host domain address space, and locking mechanism for read/write protection.
Read Cycle Time and Write Cycle Time of the flash/EPROM have to be faster than or equal to
tFRDD (Refer to Table 9-8. Flash Read Cycle AC Table).
Host to M Bus Translation
The SMFI provides an interface between the host bus and the M bus, the flash is mapped into the
host memory address space for host accesses, the flash is also mapped into the EC memory address
space for EC accesses.
An M bus transaction is generated by the host bus translations and has the following thee types:
Ø 8-bit LPC Memory Read/Write Ø 8-bit FWH Read/Write Ø 8-bit Indirect Memory Read/Write
After the LPC address translation is done, the host memory transaction is forwarded to M-bus
(flash interface) if it is accessing an unprotected region. The host side can’t issue a write transaction
until the firmware write 1 to HOSTWA bit SMECCS register. See also Table 3-3 on page 8 and
Table 3-4 on page 8.
1-32
Page 34
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Note: The flash bus doesnt have the highest performance until writing 00h to MZCFG register and
08h to SMZCFG register.
Memory Mapping
The host memory addresses are mapped into the following regions shown in the following table.
Some regions are always mapped and some are mapped only when the corresponding register is
active. And these regions may be mapped into the same range in the flash space
Features
Ø Supports memory mapping between host domain and EC domain Ø Supports read/write/erase flash operations and locking mechanism Ø Supports two shared memory access paths: host and EC Ø Supports two flash contents protection: different access paths and different memory block Ø Supports timing control for memory device (flash)
1.2 Software Specification
A. System Memory
The System consists of DDR SDRAM memory on 64-bit bus and the size options are
8/16/32/64/128/256/512MB on each DIMM slot. The BIOS will automatically detect the amount of
memory during the POST. But the total RAM size can be used by user must be substrated by the size
of the video shared memory.
4.2
Enhanced IDE
The enhanced IDE specification has defined many data transfer modes as following:
1. PIO Mode 0, 1, 2, 3, 4
2. Multiword DMA Mode 0, 1, 2, 3, 4 ,5
3. Ultra DMA-33/66/100/133
4. Which transfer mode will be set depend on the used devices, core chip IDE interface
and BIOS supported. This model’s BIOS support all the data transfer modes above,
and it will auto detect and initialize it during POST. The Ultra DMA-33/66/100/133 is
a new physical protocol used to transfer data between an Ultra DMA-33/66 capable
IDE controller and one or more Ultra DMA-33/66 capable IDE devices.
1-33
Page 35
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
B. Audio
The audio controller is integrated in south bridge ICH4 and through the AC97 data line to external
CODEC to reduce the noise caused by PCBs layout. However the H/W architecture is, the BIOS
will recognize it as a PCI device and initialize it in PCI bus initialization. The PCI legacy audio mode
is not to be supported.
C. Modem
The system can use all of the modem that is AC97 compliance and the MDC form factor. During
POST need to detect the existence and setting proper registers in south bridge ICH4.
D. PCMCIA
The system BIOS need to support some devices (especially the LAN card) need to work in
Pure-DOS, such as MS-DOS 6.22.
E. LED Indicator
In the system has some LED and listed below:
Indicator Function Description
HDD LED The LED will turn on when the hard disk drive is activated or accessed CDROM LED The LED will turn on when the CDROM drive is activated or accessed NumLock LED The LED will turn on when the function of NumLock is active CapsLock LED The LED will turn on when the function of CapsLock is active. ScrollLock LED The LED will turn on when the function of ScrollLock is active.
Additionally, there are two LEDs more complicate than above, they have compound status and
style to indicate the system state and battery status. So that will be listed in below table:
System Off (w/o charging) Off Off System Off (w/ charging) Off Orange Blinking System On (w/o charging) Off Green System On (w/ charging) Off Orange Blinking
1-34
Page 36
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
Suspend Mode (w/o charging) Green Blinking Green Suspend Mode (w/ charging) Green Blinking Orange Blinking System State (Battery Status) Suspend LED Adapter LED
F. Keyboard Controller
The system uses the NS 87591 as the keyboard controller and ACPI embedded controller. Following will summarize all
the features of keyboard firmware.
l External Keyboard and Auxiliary Device Support Standard AT or OADG Support l IBM PS/44 Numeric Keypad Support and PS/2 Style Auxiliary Device Support. l Internal Keyboard and Auxiliary Device Support and Internal Pointing Device Support. l Internal Keyboard Scan Code Controller Support and Internal Numeric Keypad Support. l Simultaneous Operation of Internal and External Devices l Simultaneous Operation of internal and External Keyboards l Simultaneous Operation of Internal and External Auxiliary l Device Hot Pluggability l Hot Pluggability of External PS/2 Devices (Keyboard or Mouse) and Hot Port Swapping l Embedded Controller PC87591E 176-Pin LQFP package (share BIOS ) l LPC System Interface l ACPI Embedded Controller Power Management Event Control. l Internal 8 x 16 Keys Matrix Scanning. l Single Pin Keys Support . l PS/2 Interface External 2 Ports Support and one internal PS/2 Touch-PAD support. l On-Board Keyboard LEDs NumLock,CapsLock, ScrollLock Support. l System Power On/Off ATX Power Sequence Control. l System BIOS ROM Flash Protect. l FAN DAC or PWM Control. l Battery Low/Very Low Beep Control l LID Function Support. l Function Hotkey and Quick Keys Support. l LCD Backlight Brightness Adjust. l System SmartBattery Li-Ion Charger Control.
l Direct LEDs Support.
G. Power Management Mode Definitions
PM Mode Definitions
1-35
Page 37
The CPU run in full speed and all the devices are power on. The system can respond to all applications
ng and monitor power
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
Full-On
with maximum performance.
1. The system in the state S0.
2. The CPU in the state C0.
3. All the devices in the state D0.
Idle This mode is similar to Full-On except the CPU will change to C1 or C2 state depend on the OS, to
save CPU power consumption.
1. The system in the state S0.
2. The CPU in the state C1 or C2.
3. All the devices in the state D0.
Suspend The state is more power saving than above, the CPU will change to C3 state and most of power
consumption parts will enter to suspend or idle mode.
1. The system in the state S3.
2. The CPU in the state C3.
3. HDD, CDROM and LCD enter to suspend mode, otherwise in state D0.
SOFF/STD The state is the most power saving mode, all of the parts in the system will power off, except the
keyboard controller enter to idle mode continuously to control the battery chargi button. Note: Before enter to S4, the OS or BIOS will save all of data or registers in the parts.
1. The system in the state S5 or S4.
2. The CPU and all of devices power off.
When system in suspend mode (S3 state ), external keyboard/mouse and touch pad cant be the wake up event source.
H. The backlight control of LCD
The LCD panel is another key parts that will consume more power of the notebook system, so there
is a way to reduce the power consumption on battery only, e.i. reduce the brightness of backlight
when end-user plug out the AC adaptor.
The backlight is controled through the KBC controller, and it is divide into 5 levels from
darkest to brightest. The KBC bios know the status of power source and the current backlights
brightness any time. When the AC adaptor plug out, the KBC will reduce the brightness one or two
level automatically.
There is another approach to control the backlight, it will be turn off when LCD cover
close(LID switch), conversly, it will be turn on when LCD cover open
1-36
Page 38
Page 39
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
2.1. System Block Diagram …………………………………………………...
2.2. Major Component Definition.……..……………………………….……
2.3. Connector Definition…….………………………………………………..
3
4
35
2-2
Page 40
2.1 System Block Diagram
Pentium M Processor
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
RJ11 Con.
Amplifier
ATI M11P
Page 14
MDC
Audio Codec
VIA : VT1612A
HDD
CD-ROM
1.5V AGP 66MHz
AC97
IDE
( Primary )
IDE
( Secondary )
478 uFCPGA
PSB
Intel 855PM
MCH
593 uFCBGA
Page 5 , 6 , 7
Hub Interface 66MHz
ICH4M
Page 11,12,13
Page 3 , 4
IEEE 1394
DDR SO-DIMM
Page 8,9
LAN
RTL8100CL
USB_Port X 4
PCI 33 MHz
PCMCIA
OZ 711MC1TI:TSB43AB22
MINI PCI
MINI PCI
LPC I/F
BIOS
EC
ITE : IT8510E
Touch Pad
LED
CPU Pentium M (U2A)
2-3
Page 41
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U2A
W1 W2
AA3 AA2
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1
AE5
A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25
L23 M26 H24 F25 G24
J23 M23
J25
L26 N24 M25 H26 N25 K25 Y26
AA24
T25 U23 V23 R24 R26 R23
AA23
U26 V24 U25 V26 Y23
AA26
Y25
AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
P4 U4 V3 R3 V2
T4
Y4 Y1 U1
Y3
U3
R2 P3
T2
P1
T1
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#
ADSTB#0 ADSTB#1
REQ0# REQ1# REQ2# REQ3# REQ4#
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
Centrino CPU
Pentium M 1/3
ADDR GROUP
DATA GROUP
Legacy
ITP
SIGNALS
PROCHOT#
THERMDA THERMDC
THERMTRIP#
THERMH CLK
PWRGOOD
MISC CONTROL
MOLEX_500210-4782
Pentium-M
A20M#
FERR#
IGNNE#
STPCLK#
LINT0 LINT1
SMI#
ADS# BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM#0 BPM#1 BPM#2 BPM#3
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
ITP_CLK1 ITP_CLK0
BCLK1 BCLK0
COMP0 COMP1 COMP2 COMP3
DPSLP#
DPWR#
SLP#
TEST1 TEST2
GTLREF3 GTLREF2 GTLREF1 GTLREF0
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5
NC0 NC1
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0# DINV1# DINV2# DINV3#
C2 D3 A3
C6 D1 D4 B4
N2 L1 J3
L4 H2 M2
N4 A4
B5 J2 B11
H1 K1 L2 M3
K3 K4
C8 B8 A9 C9
A10 B10
A13 C12 A12 C11 B13 A7
B17 B18 A18
C17 A15
A16 B14 B15
P25 P26 AB2 AB1
B7 C19 E4 A6
C5 F23
AC1 G1 E26 AD26
C14 C3 AF7 C16 E1
A1 B2
C23 C22 K24 L24 W25 W24 AE24 AE25
D25 J26 T24 AD20
IERR#
H_CPURST#
H_BPM0_ITP# H_BPM1_ITP# H_BPM2_ITP# H_BPM3_ITP#
H_BPM4_PRDY# H_BPM5_PREQ#
H_TCK H_TDI H_TDO H_TMS H_TRST# ITP_DBRESET#
H_PROCHOT_S# H_THERMDA H_THERMDC
PM_THRMTRIP# CLK_ITP_CLK#
CLK_ITP_CLK CLK_CPU_BCLK# CLK_CPU_BCLK
COMP0 COMP1 COMP2 COMP3
H_DPSLP# H_PWRGD
H_TEST1 H_TEST2
TP_GTLREF3 TP_GTLREF2 TP_GTLREF1 GTL_REF0
TP_NC_1 TP_NC_2 TP_NC_3 TP_NC_4 PSI#
TZ0301
CPU Pentium M (U2B)
2-4
Page 42
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
VID0 VID1 VID2 VID3 VID4 VID5
+VCC_CORE
G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6
F26 B1 N1 AC26
D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21
P23 W4
E2 F2 F3 G3 G4 H4
AE7 AF6
+V1.8S_PROC
+VCCP
H_VID023,34 H_VID123,34 H_VID223,34 H_VID323,34 H_VID423,34 H_VID523,34
VCCSENSE37 VSSSENSE37
+VCC_CORE
AA11 AA13 AA15 AA17 AA19 AA21
AA5 AA7
AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22
AB6
AB8
AC11 AC13 AC15 AC17 AC19
AC9 AD10 AD12 AD14 AD16 AD18
AD8
AE11 AE13 AE15 AE17 AE19
AE9 AF10 AF12 AF14 AF16 AF18
AF8
D18
D20
D22
G21
D6
D8 E17 E19 E21
F18 F20 F22
E5 E7 E9
F6 F8
U2B
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58
VCC59
Pentium M 2/3
VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71
VCCA0 VCCA1 VCCA2 VCCA3
VCCP0 VCCP1 VCCP2
POWER
VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8
VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24
VCCQ0 VCCQ1
VCCSENSE
VSSSENSE
MOLEX_500210-4782
Pentium-M
CPU Pentium M (U2C)
2-5
Page 43
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U2C
A11 A14 A17 A20 A23
A26 AA1 AA4 AA6 AA8
AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25
AB3 AB5 AB7 AB9
AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26
AC2 AC5
AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24
AD1
AD4
AD7
AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25
AE3 AE6
AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26
AF2
AF5
AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
B12 B16 B19 B22 B25
C1 C4
C7 C10 C13 C15 C18 C21 C24
D2
D5
D7
D9 D11
A2
VSS0
A5
VSS1
A8
VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74
B3
VSS75
B6
VSS76
B9
VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96
MOLEX_500210-4782
Pentium-M
VSS97
Pentium M 3/3
VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121
VSS
VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191
D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24
855PM (U3A)
2-6
Page 44
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U3A
AA2 AB5 AA5 AB3 AB4 AC5 AA3 AA6 AE3 AB7 AE5 AF3 AC6 AC3 AF4 AE2 AG4 AG2 AE7 AE8 AH2 AC7 AG3 AD7 AH7 AE6 AC8 AG8 AG7 AH3 AF8 AH5 AC11 AC12 AE9 AC10 AE10 AD9 AG9 AC9 AE12 AF10 AG11 AG10 AH11 AG12 AE13 AF12 AG13 AH13 AC14 AF14 AG14 AE14 AG15 AG16 AG17 AH15 AC17 AF16 AE15 AH17 AD17 AE16
U7 V4 W2 Y4 Y3 Y5 W3 V7 V3 Y7 V5 W7 W5 W6
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
AC13 AD13
AC2
AA7
AD4
AF6 AD11 AC15
AD3 AG6
AE11
AC16
AD5 AG5 AH9
AD15
AE17
AA9
AB12 AB16
P25
P24
N27
P23
M26
M25
L28
L27 M27 N28 M24
N25 N24 P27 P26
U6 R2
U3 R3
R6 N2 N5 N3
M3 M4 M5
N6
U2 R7
U5
R5 N7
M7
T5
P7
T3 P4 P3 P5
J3
L5 K3
J2
L6
L2 K5
L3
L7 K4
J5
T7
T4
K8
J8
P8
HA#3 HA#4 HA#5
Intel 855PM 1/3
HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HADSTB#0 HADSTB#1
BCLK# BCLK HRCOMP1 HSWNG1 HRCOMP0 HSWNG0
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DBI#0 DBI#1 DBI#2 DBI#3
CPURST# HVREF0
HVREF1 HVREF2 HVREF3 HVREF4
HI_0 HI_1 HI_2 HI_3 HI_4 HI_5 HI_6 HI_7 HI_8 HI_9 HI_10
HI_STB HI_STB# HLRCOMP HI_REF
HOST
HUB I/F
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8
HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BR0#
BNR#
BPRI#
DBSY#
RS#0 RS#1 RS#2
855PM SL752
SIS 962 POWER (U3B)
2-7
Page 45
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U3B
M_A0 M_A1 M_A2 M_A3 M_A4 M_A5 M_A6 M_A7 M_A8 M_A9 M_A10 M_A11 M_A12
M_D0 M_D1 M_D2 M_D3 M_D4 M_D5 M_D6 M_D7 M_D8 M_D9 M_D10 M_D11 M_D12 M_D13 M_D14 M_D15 M_D16 M_D17 M_D18 M_D19 M_D20 M_D21 M_D22 M_D23 M_D24 M_D25 M_D26 M_D27 M_D28 M_D29 M_D30 M_D31 M_D32 M_D33 M_D34 M_D35 M_D36 M_D37 M_D38 M_D39 M_D40 M_D41 M_D42 M_D43 M_D44 M_D45 M_D46 M_D47 M_D48 M_D49 M_D50 M_D51 M_D52 M_D53 M_D54 M_D55 M_D56 M_D57 M_D58 M_D59 M_D60 M_D61 M_D62 M_D63 M_CB0 M_CB1 M_CB2 M_CB3 M_CB4 M_CB5 M_CB6 M_CB7
M_DQS0 M_DQS1 M_DQS2 M_DQS3 M_DQS4 M_DQS5 M_DQS6 M_DQS7 M_DQS8
MCH_TEST# TP_M_NC_0 TP_M_NC_1
E12 F17 E16 G17 G18 E18 F19 G20 G19 F21 F13 E20 G21 G22
G28 F27 C28 E28 H25 G27 F25 B28 E27 C27 B25 C25 B27 D27 D26 E25 D24 E23 C22 E21 C24 B23 D22 B21 C21 D20 C19 D18 C20 E19 C18 E17 E13 C12 B11 C10 B13 C13 C11 D10 E10
E11
C16 D16 B15 C14 B17 C17 C15 D14
F26 C26 C23 B19 D12
E15 G11 F11
J27 H27 H26
AD26 AD27
SMA0 SMA1 SMA2
Intel 855PM 2/3
SMA3 SMA4 SMA5 SMA6 SMA7 SMA8 SMA9 SMA10 SMA11 SMA12 RSVD2
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40
C9
SDQ41
D8
SDQ42
E8
SDQ43 SDQ44
B9
SDQ45
B7
SDQ46
C7
SDQ47
C6
SDQ48
D6
SDQ49
D4
SDQ50
B3
SDQ51
E6
SDQ52
B5
SDQ53
C4
SDQ54
E4
SDQ55
C3
SDQ56
D3
SDQ57
F4
SDQ58
F3
SDQ59
B2
SDQ60
C2
SDQ61
E2
SDQ62
G4
SDQ63 SDQ64 SDQ65 SDQ66 SDQ67 SDQ68 SDQ69 SDQ70 SDQ71
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4
C8
SDQS5
C5
SDQS6
E3
SDQS7 SDQS8
SWE#
G8
SCAS# SRAS#
RSTIN# RSVD1 TESTIN# NC0 NC1
DDR
AGP
GFRAME#
GDEVSEL#
GRCOMP
AD_STB0
AD_STB#0
AD_STB1
AD_ATB#1
SB_STB#
SMVREF1 SMVREF0
DDR
SMRCOMP
RCVENIN#
RCVENOUT#
855PM SL752
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8
GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GCBE#0 GCBE#1 GCBE#2 GCBE#3
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
AGPREF
66IN
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SB_STB
RBF# WBF# PIPE#
ST0 ST1 ST2
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCKE0 SCKE1 SCKE2 SCKE3
SBS0
SBS1
SCS#0 SCS#1 SCS#2 SCS#3
DPSLP#
DPWR#
R27 R28 T25 R25 T26 T27 U27 U28 V26 V27 T23 U23 T24 U24 U25 V24 Y27 Y26 AA28 AB25 AB27 AA27 AB26 Y23 AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
V25 V23 Y25 AA23
Y24 W28 W27 W24 W23 W25 AG24 AH25 AD25 AA21 P22
R24 R23 AC27 AC28
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25 AF27 AF26
AE22 AE23 AF22 AG25 AF24 AG26
J25 K25 G5 F5 G24 E24 G25 J24 G6 G7 K23 J23
J21 J9
G23 E22 H23 F23
G12 G13 E9 F7 F9 E7
J28 G15 G14
V8 Y8
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
SM_VREF_MCH
M_RCOMP M_RCV#
855PM (U3C)
2-8
Page 46
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
A11 A15 A19 A23 A27
AA1
AA29
AA4
AA8 AB11 AB13 AB15 AB17 AB19 AB22
AB6
AB9
AC1
AC18 AC20 AC21 AC23 AC26
AC4
AD10 AD12 AD14 AD16 AD19 AD22
AD6
AD8
AE1 AE18 AE20 AE29
AE4 AF11 AF13 AF15 AF17 AF19 AF21 AF25
AF5
AF7
AF9
AG1
AG18 AG20 AG22 AH19 AH21 AH23
AJ11 AJ13 AJ15 AJ17 AJ27
AJ3 AJ5 AJ7
AJ9 D13 D17 D21
E14
E26
E29
F12
F15
F20
F24
G26 H11 H13 H15 H17 H19 H21
J22
J26
J29
U3C
A3 A7
D5 D9
E1
F6 F8
H6 H9
J1
J4 J7
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GN D
K27K6L1
R22
R29
AA22
AA26
U22
U26
W22
W29
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
N14
VCC
VCCAGP
VCCAGP
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
VCC AG P
AGP I/O (1.5V)
1.2V
Intel 855PM 3/3
1.8V
PLL power(1.8V)
GroundPower
The AGTL bus termination voltage(1.05V)
DDR (2.5V)
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
W26W4W8
GN D
Y22
Y6
GND
L22
L24
L26L4L8
M23M6N1
N13
N15
N17
N22
N29N4N8
P14
P16P6R1
R13
R15
R17
R26R4R8
T14
T16
T22T6U1
U13
U15
U29U4U8
V22V6W1
U17
VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCHL VCCHL VCCHL VCCHL VCCHL
RSVD3 RSVD4 RSVD5 RSVD6
ETS# RSVD7 RSVD8 RSVD9
VCCGA VCCHA
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
GN D
855PM SL752
N16 P13 P15 P17 R14 R16 T15 U14 U16
L25 L29 M22 N23 N26
G16 G10 G9 H7 H4 H3 G3 G2
T17 T13
AB10 AB14 AB18 AB20 AB8 AC19 AD18 AD20 AE19 AE21 AF18 AF20 AG19 AG21 AG23 AJ19 AJ21 AJ23 M8 T8
A13 A17 A21 A25 A5 A9 C1 C29 D11 D15 D19 D23 D25 D7 E5 F10 F14 F16 F18 F22 G1 G29 H10 H12 H14 H16 H18 H20 H22 H24 H5 H8 J6 K22 K24 K26 K7 L23
MCH_ETS#
+V1.2S_MCH
+V1.8S_MCH
MCH_RSVD3 MCH_RSVD4 MCH_RSVD5 MCH_RSVD6 MCH_ETS#33 MCH_RSVD7 MCH_RSVD8 MCH_RSVD9
+V1.8S_MCH
+VCCP
Clock Generator
2-9
Page 47
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U12
1
VDDREF
8
VDDPCI
14
VDDPCI
19
VDD3V66
32
VDD3V66
37
VDD48
46
VDDCPU
50
VDDCPU
40
PWRSAVE#*
55
FS1
54
FS0
25
*PD#
34
PCI_STOP#
53
CPU_STOP#
28
Vtt_PWRGD#
43
MULTSEL*
33
3V66_0/FS4**
35
3V66_1/VCH-CLK/FS3**
29
SDATA
30
SCLK
2
X1
3
X2
Z1001
42
IREF
41
GND
4
GND
9
GND
15
GND
20 31
GNDGND
* : 120K PU. ** : PD.
*ASEL/PCICLK_F2
**E_PCICLK3/PCICLK3 **E_PCICLK1/PCICLK1
48Mhz_USB/FS2**
VDDA
GND
CPUCLKT2
CPUCLK2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5 3V66_4 3V66_3 3V66_2
PCICLK_F1 PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK2
PCICLK0
48MhZ_DOT
REF
GND GND
26 27
45 44
49 48
52 51
24 23 22 21
7 6 5
18 17 16 13 12 11
10 39
38 56
47 36
CPU2 CPU2#
CPU1 CPU1#
CPU0 CPU0#
TZ1001 66BUF2 66BUF1 66BUF0
PCIF2 TZ1002 TZ1003
TZ1004
CLK_REF0
ICS950813BG
MULT0 = 0 -> Ioh = 20mA/1.0V [IREF(5.0mA / 221R) X 4)] = 1 -> Ioh = 14mA/0.7V [IREF(2.32mA / 475R) X 6]
ICH4-M (U16A)
2-10
Page 48
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U16A
H5
PCI_AD0
J3
PCI_AD1
H3
PCI_AD2
K1
PCI_AD3
G5
PCI_AD4
J4
PCI_AD5
H4
PCI_AD6
J5
PCI_AD7
K2
PCI_AD8
G2
PCI_AD9
L1
PCI_AD10
G4
PCI_AD11
L2
PCI_AD12
H2
PCI_AD13
L3
PCI_AD14
F5
PCI_AD15
F4
PCI_AD16
N1
PCI_AD17
E5
PCI_AD18
N2
PCI_AD19
E3
PCI_AD20
N3
PCI_AD21
E4
PCI_AD22
M5
PCI_AD23
E2
PCI_AD24
P1
PCI_AD25
E1
PCI_AD26
P2
PCI_AD27
D3
PCI_AD28
R1
PCI_AD29
D2
PCI_AD30
P4
PCI_AD31
J2
PCI_CBE0#
K4
PCI_CBE1#
M4
PCI_CBE2#
N4
PCI_CBE3#
C1
PCI_GNT0#
E6
PCI_GNT1#
A7
PCI_GNT2#
B7
PCI_GNT3#
D6
PCI_GNT4#
B1
PCI_REQ0#
A2
PCI_REQ1#
B3
PCI_REQ2#
C7
PCI_REQ3#
B6
PCI_REQ4#
P5
PCI_CLK
M3
PCI_DEVSEL#
F1
PCI_FRAME#
B5
PCI_REQA#/GPIO0
A6
PCI_REQB#/REQ5#/GPIO1
E8
PCI_GNTA#/GPIO16
C5
PCI_GNTB#/GNT5#/GPIO17
L5
PCI_IRDY#
G1
PCI_PAR
L4
PCI_PERR#
M2
PCI_LOCK#
W2
PCI_PME#
U5
PCI_RST#
K5
PCI_SERR#
F3
PCI_STOP#
F2
PCI_TRDY#
S ys tem
CPU I/F
PCI I/F
Hub I/F
ICH4-M 1/3
SM_INTRUDER#
SM_LINK0 SM_LINK1
SMB_DATA
SMB_ALERT#/GPIO11
M anage m en t
I/F
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT#
CPU_INTR
CPU_PWRGD
CPU_RCIN#
CPU_SLP# CPU_SMI#
CPU_STPCLK#
HUB_PD10 HUB_PD11
HUB_STB#/HUB_STBF
HUB_STB/HUB_STBS
HUB_COMP
HUB_VREF
HUB_VSWING
INT_APICCLK
INT_APICD0 INT_APICD1 INT_PIRQA#
INT_PIRQB# INT_PIRQC# INT_PIRQD#
INT_PIRQE#/GPIO2 INT_PIRQF#/GPIO3
In te r ru p t I/FL AN I/F
INT_PIRQG#/GPIO4 INT_PIRQH#/GPIO5
INT_IRQ14 INT_IRQ15
INT_SERIRQ
EEP_DOUT
I/F
LAN_RSTSYNC
EEP_SHCLK
LAN_RXD0 LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_RST#
E E P RO M
SMB_CLK
CPU_NMI
HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9
HUB_CLK
EEP_CS
EEP_DIN
LAN_CLK
W6 AC3 AB1 AC4 AB4 AA5
Y22 AB23 U23 AA21 W21 V22 AB22 V21 Y23 U22 U21 W23 V23
L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 T21
N20 P21 R23 M23 R22
J19 H19 K20 D5 C2 B4 A3 C8 D7 C3 C4 AC13 AA19 J22
D10 D11 A8 C12
A10 A9 A11 B10 C10 A12 C11 B11 Y5
+V3.3
ICH4-M
ICH4-M (U16B)
2-11
Page 49
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U16B
GPIO7
GPIO8 GPIO12 GPIO13 GPIO25 GPIO27 GPIO28
RTC_X1 RTC_X2
SPKR
R3 V4 V5 W3 V2 W1 W4
Y13 AB14 AB21 AC22
AA13 AB13 W13 AA20 AC20 AC21
AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11
W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17
Y12 AB19 AA11 AB18 AC12 Y18 W12 AA18 AB12 AC19
J23 F19 W7 AC7 AC6 Y6
H23
PM_THRMTRIP#_D
W20
PM_THRM#_ICH
ACSYNC_D LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
USB_RBIAS
TZ1201
TZ1202 TZ1203 TZ1204 TZ1205
R2
PM_AGPBUSY#
Y3
PM_SYS_RST#
AB2
PM_BATLOW#
T3
PM_C3_STAT#
AC2
PCI_CLKRUN#
V20
PM_DPRSLPVR
AA1
PM_PWRBTN#
AB6
PM_PWROK
Y1
PM_RI#
AA6
PM_RSMRST#
W18
PM_SLP_S1#
Y4
PM_SLP_S3#
Y2
PM_SLP_S4#
AA2
PM_SLP_S5#
W19
PM_STP_CPU#
Y21
PM_STP_PCI#
AA4
PM_SUS_CLK
AB3
PM_SUS_STAT#/LPCPD#
V1
PM_THRM#
J21
PM_SSMUXSEL
Y20
PM_CPUPERF#
V19
PM_VGATE/VRMPWRGD
B8
AC_BITCLK
C13
AC_RST#
D13
AC_SDATAIN0
A13
AC_SDATAIN1
B13
AC_SDATAIN2
D9
AC_SDATAOUT
C9
AC_SYNC
T2
LPC_AD0/FWH0
R4
LPC_AD1/FWH1
T4
LPC_AD2/FWH2
U2
LPC_AD3/FWH3
U3
LPC_DRQ0#
U4
LPC_DRQ1#
T5
LPC_FRAME#/FWH4
C20
USB_PP0
A21
USB_PP1
C18
USB_PP2
A19
USB_PP3
C16
USB_PP4
A17
USB_PP5
D20
USB_PN0#
B21
USB_PN1#
D18
USB_PN2#
B19
USB_PN3#
D16
USB_PN4#
B17
USB_PN5#
B15
USB_OC0#
C14
USB_OC1#
A15
USB_OC2#
B14
USB_OC3#
A14
USB_OC4#
D14
USB_OC5#
A23
USB_RBIAS
B23
USB_RBIAS#
J20
GPIO32
G22
GPIO33
F20
GPIO34
G20
GPIO35
F21
GPIO36
H20
GPIO37
F23
GPIO38
H22
GPIO39
G23
GPIO40
H21
GPIO41
F22
GPIO42
E23
GPIO43
ICH4-M
P owe r Ma nage m en t
IS T
AC ' 97 I/F
LPC I/F
USB I/F
ICH4-M 2/3
GPIO
IDE I/F
Clock
MISC
Unmuxed
IDE_PDCS1# IDE_PDCS3# IDE_SDCS1# IDE_SDCS3#
IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_SDA0 IDE_SDA1 IDE_SDA2
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8
IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15
IDE_PDDACK# IDE_SDDACK#
IDE_PDDREQ IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR# IDE_PDIOW# IDE_SDIOW# IDE_PIORDY IDE_SIORDY
ICH4_CLK_14M
USB_CLK_48M
RTC_RST#
RTC_VBIAS
PM_THRMTRIP#
ICH4-M (U16C)
2-12
Page 50
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U16C
Z1301
VCC5REF
+V5A_ICH
+V1.5S_ICH
+V3.3S_ICH
+V1.8S_ICHHUB
VCCPLL
+V1.5A_ICH
+V1.5_ICHLAN
+V3.3_ICHLAN
+V3.3_AUX_ICH
C202
0.1U
2 1
+V_RTC
A16 A18 A20 A22
B12 B16 B18 B20 B22
C15 C17 C19 C21 C23
D12 D15 D17 D19 D21 D22 D23
E10 E14 E16 E17 E18 E19 E21 E22
G19 G21
K11 K13 K19 K23 L10 L11 L12 L13 L14 L21
M11 M12 M13 M20 M22
N10 N11 N12 N13 N14 N19 N21 N23
P11 P13 P20 P22
R18 R21
T19 T23
U20
V15 V17
W5 W8
A1 A4
B9
C6
D1 D4 D8
F8 G3 G6
H1 K3
M1
N5
P3
R5
V3
V5REF V5REF
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
P14 U18 AA23
E7 V6
E15 K10
K12 K18 K22 P10 T18 U19 V14
A5 B2 H6 H18 J1 J18 K6 M10 P6 P12 U1 V10 V16 V18 AC8 AC17
L23 M14 P18 T22
C22 E12
E13 E20 F14 G18 R6 T6 U6
F6 F7
F9 E9
E11 F10 F15 F16 F17 F18 K14 V7 V8 V9
AB5 W22
Y7 Y19 AA3 AA9 AA12 AA16 AA22 AB7 AB20 AC1 AC5 AC10 AC14 AC18 AC23
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
J6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
T1
VSS VSS VSS VSS VSS VSS VSS VSS VSS
ICH4-M 3/3
POWER &
VSS
V_CPU_IO V_CPU_IO V_CPU_IO
V5REF_SUS
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCC_HUB VCC_HUB VCC_HUB VCC_HUB
VCC_PLL
VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5
VCCLAN1_5 VCCLAN1_5
VCCLAN3_3 VCCLAN3_3
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
RTC_VCC
ICH4-M
MOBILITY M11-P_A (U8A)
2-13
Page 51
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U8A
H29 H28
J29
J28 K29 K28
L29
L28 N28 P29 P28 R29 R28
T29
T28 U29 N25 R26 P25 R27 R25
T25
T26 U25 V27
W26 W25
Y26 Y25
AA26 AA25 AA27
N29 U28 P26 U26
AG30 AG28
AF28
AD26
M25 N26 V29 V28
W29 W28
AE26
AC26
AE29
M28 V25
AB29
AD28 AD29 AC28 AC29
AA28 AA29
Y28 Y29
AF29
AD27
AE28 AB28
M29 V26
M26 M27
AB26 AB25
AC25
AK21 AJ23
AJ22 AK22
AJ24 AK24
AG23 AG24
AK25 AJ25
AH28
AJ29
AH27
AE25
AG26 AH30 AH29 AG29
E8 B6
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
PCICLK RST# REQ# GNT# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# INTA#
WBF# RBF#
AD_STBF_0 AD_STBF_1 SB_STBF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
SB_STBS ADSTBS_0 ADSTBS_1
AGPREF AGPTEST
DBI_LO DBI_HI AGP8X_DET#
R2SET C_R
Y_G COMP_B
H2SYNC V2SYNC
DDC3CLK DDC3DATA
SSIN SSOUT XTALIN XTALOUT TESTEN
TEST_YCLK(NC) TEST_MCLK(NC) PLLTEST(NC)
SUS_STAT# STP_AGP# AGP_BUSY# RSTB_MSK(NC)
M11-P_A15-FSC
Part 1 of 7
GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16
DVOMODE
ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5
DVO / EX T TMDS / G PIOLVDSTMDSDAC1
ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8
ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11
PCI / AGPAGP2X4XDAC2SSCLK
ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19 ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA23
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
(NC)VREFG
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
AGP
8X
DDC2CLK
DDC2DATA
HSYNC VSYNC
DDC1DATA
DDC1CLK
AUXWIN
MAN
PWR
DMINUS
THERM
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9
DIGON
BLON
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
HPD1
RSET
DPLUS
R G
B
AJ5 AH5 AJ4 AK4 AH4 AF4 AJ3 AK3 AH3 AJ2 AH2 AH1 AG3 AG1 AG2 AF3 AF2
AE10 AH6
AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10
ZV_LCDCNTL0
AJ10
ZV_LCDCNTL1
AK10
ZV_LCDCNTL2
AJ11
ZV_LCDCNTL3
AH11
M11_VREFG
AG4
AK16 AH16 AH17 AJ16 AH18 AJ17 AK19 AH19 AK18 AJ18 AG16 AF16 AG17 AF17 AF18 AE18 AH20 AG20 AF19 AG19
AE12 AG12
AJ13 AH14 AJ14 AH15 AJ15 AK15 AH13 AK13
AE13 AE14
AF12 AK27
AJ27 AJ26
AG25 AH25
AH26 AF25
AF24 AF26
AF11 AE11
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
MEM_ID0 GPIO8 GPIO9 GPIO10
ROM_ID1
ROM_ID2 ROM_ID3 MEM_ID1
MCLK_SS DVOMODE TZ1419
TZ1420 TZ1421 TZ1422 TZ1423 TZ1424 TZ1425 TZ1426 TZ1427 TZ1428 TZ1429 TZ1430 TZ1431 TZ1432 TZ1433 TZ1434 TZ1435 TZ1436 LDDCDATA LDDCCLK ZV_LCDDATA20 TZ1437 PANEL_ID0 PANEL_ID1
TZ1407 TZ1408 TZ1409 TZ1410 TZ1411 TZ1412 TZ1413 TZ1414
TZ1415 TZ1416
TZ1417
Z1424
M11_ALERT#
DPLUS DMINUS
MOBILITY M11-P_B (U8B)
2-14
Page 52
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U8B
L25
DQA0
L26
DQA1
K25
DQA2
K26
DQA3
J26
DQA4
H25
DQA5
H26
DQA6
G26
DQA7
G30
DQA8
D29
DQA9
D28
DQA10
E28
DQA11
E29
DQA12
G29
DQA13
G28
DQA14
F28
DQA15
G25
DQA16
F26
DQA17
E26
DQA18
F25
DQA19
E24
DQA20
F23
DQA21
E23
DQA22
D22
DQA23
B29
DQA24
C29
DQA25
C25
DQA26
C27
DQA27
B28
DQA28
B25
DQA29
C26
DQA30
B26
DQA31
F17
DQA32
E17
DQA33
D16
DQA34
F16
DQA35
E15
DQA36
F14
DQA37
E14
DQA38
F13
DQA39
C17
DQA40
B18
DQA41
B17
DQA42
B15
DQA43
C13
DQA44
B14
DQA45
C14
DQA46
C16
DQA47
A13
DQA48
A12
DQA49
C12
DQA50
B12
DQA51
C10
DQA52
C9
DQA53
B9
DQA54
B10
DQA55
E13
DQA56
E12
DQA57
E10
DQA58
F12
DQA59
F11
DQA60
E9
DQA61
F9
DQA62
F8
DQA63
M11-P_A15-FSC
Part 2 of 7
MEMORY IN TERFACE
MAA10
MAA11 (MAA13)MAA12 (MAA12)MAA13
(NC)MAA14
DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7
RASA#
CASA#
CSA0#
CSA1#
A
CLKA0
CLKA0#
CLKA1
CLKA1#
MVREFD
MVREFS
DIMA_0 DIMA_1
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9
QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7
WEA#
CKEA
E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19
J25 F29 E25 A27 F15 C15 C11 E11
J27 F30 F24 B27 E16 B16 B11 F10
A19 E18 E19 E20 F20 B19
B21 C20
C18 A18
B7 B8
D30 B13
MEM_MAA0 MEM_MAA1 MEM_MAA2 MEM_MAA3 MEM_MAA4 MEM_MAA5 MEM_MAA6 MEM_MAA7 MEM_MAA8 MEM_MAA9 MEM_MAA10 MEM_MAA11 MEM_MAA12 MEM_MAA13 MEM_MAA14
MEM_DQMA#0 MEM_DQMA#1 MEM_DQMA#2 MEM_DQMA#3 MEM_DQMA#4 MEM_DQMA#5 MEM_DQMA#6 MEM_DQMA#7
MEM_QSA0 MEM_QSA1 MEM_QSA2 MEM_QSA3 MEM_QSA4 MEM_QSA5 MEM_QSA6 MEM_QSA7
MEM_RASA# MEM_CASA# MEM_WEA# MEM_CSA0# MEM_CSA1# MEM_CKEA
Z1507 Z1508
Z1509 Z1510
Z1511 Z1512
TZ1501 TZ1502
MOBILITY M11-P_C (U8C)
2-15
Page 53
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U8C
D7
DQB0
F7
DQB1
E7
DQB2
G6
DQB3
G5
DQB4
F5
DQB5
E5
DQB6
C4
DQB7
B5
DQB8
C5
DQB9
A4
DQB10
B4
DQB11
C2
DQB12
D3
DQB13
D1
DQB14
D2
DQB15
G4
DQB16
H6
DQB17
H5
DQB18
J6
DQB19
K5
DQB20
K4
DQB21
L6
DQB22
L5
DQB23
G2
DQB24
F3
DQB25
H2
DQB26
E2
DQB27
F2
DQB28
J3
DQB29
F1
DQB30
H3
DQB31
U6
DQB32
U5
DQB33
U3
DQB34
V6
DQB35
W5
DQB36
W4
DQB37
Y6
DQB38
Y5
DQB39
U2
DQB40
V2
DQB41
V1
DQB42
V3
DQB43
W3
DQB44
Y2
DQB45
Y3
DQB46
AA2
DQB47
AA6
DQB48
AA5
DQB49
AB6
DQB50
AB5
DQB51
AD6
DQB52
AD5
DQB53
AE5
DQB54
AE4
DQB55
AB2
DQB56
AB3
DQB57
AC2
DQB58
AC3
DQB59
AD3
DQB60
AE1
DQB61
AE2
DQB62
AE3
DQB63
M11-P_A15-FSC
Part 3 of 7
MEMORY INTERFACE
(MAB13)MAB12
(MAB12)MAB13
(NC)MAB14
DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7
RASB#
B
CASB#
CLKB0#
CLKB1#
DIMB_0 DIMB_1
ROMCS#
MEMVMODE_0 MEMVMODE_1
MEMTEST
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8
MAB9 MAB10 MAB11
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
WEB# CSB0# CSB1#
CKEB
CLKB0
CLKB1
N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2
E6 B2 J5 G3 W6 W2 AC6 AD2
F6 B3 K6 G1 V5 W1 AC5 AD1
R2 T5 T6 R5 R6 R3 N1
N2 T2
T3
E3 AA3
AF5 C6
C7 C8
MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11 MEM_MAB12 MEM_MAB13 MEM_MAB14
MEM_DQMB#0 MEM_DQMB#1 MEM_DQMB#2 MEM_DQMB#3 MEM_DQMB#4 MEM_DQMB#5 MEM_DQMB#6 MEM_DQMB#7
MEM_QSB0 MEM_QSB1 MEM_QSB2 MEM_QSB3 MEM_QSB4 MEM_QSB5 MEM_QSB6 MEM_QSB7
MEM_RASB# MEM_CASB# MEM_WEB# MEM_CSB0# MEM_CSB1# MEM_CKEB
Z1519 Z1520
Z1521 Z1522
TZ1503 TZ1504
Z1524 Z1525
Z1526
MEMV_MODE(1:0)=
MOBILITY M11-P_D(U8D)
0:1=VDDR1 2.5V 1:0=VDDR1 1.8V 1:1=VDDR1 2.8V
2-16
Page 54
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U8D
T7
Z1601
VDDR1
R4
VDDR1(CLKBFB)
R1
VDDR1
N8
VDDR1
N7
VDDR1
M4
VDDR1
L27
VDDR1
L8
VDDR1
J24
VDDR1
J23
VDDR1
J8
VDDR1
J7
VDDR1
J4
VDDR1
J1
VDDR1
H10
VDDR1
H13
VDDR1
H15
VDDR1
H17
VDDR1
T8
VDDR1
V4
VDDR1
V7
VDDR1
V8
VDDR1
AA1
VDDR1
AA4
VDDR1
AA7
VDDR1
AA8
VDDR1
A3
VDDR1
A9
VDDR1
A15
VDDR1
A21
VDDR1
A28
VDDR1
B1
VDDR1
B30
VDDR1
D26
VDDR1
D23
VDDR1
D20
VDDR1
D17
VDDR1
D14
VDDR1
D11
VDDR1
D8
VDDR1
D5
VDDR1
E27
VDDR1
F4
VDDR1
G7
VDDR1
G10
VDDR1
G13
VDDR1
G15
VDDR1
G19
VDDR1
G22
VDDR1
G27
VDDR1
H22
VDDR1
H19
VDDR1
AD4
VDDR1
T4
VDDR1
N4
VDDR1
D19
VDDR1(CLKAFB)
D13
VDDR1
AE17
LVDDR_25(LVDDR18_25)
AE20
LVDDR_25(LVDDR18_25)
AE15
LVDDR_18
AF21
LVDDR_18
AJ20
LPVDD
AK12 AJ12
TPVDDTPVSS
AF13
TXVDDR
AF14
TXVDDR
F18
VDDRH0
N6
VDDRH1
AG21
A2VDD
AH21
A2VDD
AF22
A2VDDQ
AH24
AVDD
AE24
VDD1DI
AE22
VDD2DI
AK28 AJ28
PVDDPVSS
A7 A6
MPVDDMPVSS
M11-P_A15-FSC
Part 4 of 7
I/O
VDDC VDDC VDDC VDDC VDDC
(VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15 (VDDC18)VDD15
VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3
VDDR4 VDDR4 VDDR4 VDDR4 VDDR4
VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP VDDP
AVSSQ
LVSSR LVSSR LVSSR LVSSR
LPVSS
TXVSSR TXVSSR TXVSSR
VSSRH0
POWER
VSSRH1
A2VSSN A2VSSN
A2VSSQ
AVSSN
VSS1DI VSS2DI
AC13 AD13 AD15 AC15 AC17
P8 Y8 AC11 AC20 Y23 L23 H20 H11
AD7 AD19 AD21 AD22 AC22 AC21 AC19 AC8
AG7 AD9 AC9 AC10 AD10
J30 AF27 AE30 AC27 AC23 AB30 AA24 AA23 Y27 W30 V23 V24 M23 M24 N30 P23 P27 T23 T24 T30 U27
AD24 AF20
AE19 AE16 AF15
AJ19
AH12 AG13 AG14
F19 M6
AH22 AJ21
AF23 AH23
AE23 AE21
+V1.2S_M11
Z1603
M11P_VDD15/18
+V3.3S
R5040R/B
R507@0R/B
+V1.5S
AVSSQ
LTPVSS
A2VSSQ
AVSSDI PVSS MPVSS
12 12
MOBILITY M11-P_E(U8E)
2-17
Page 55
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U8E
A2
VSS
A10
VSS
A16
VSS
A22
VSS
A29
VSS
C1
VSS
C3
VSS
C28
VSS
C30
VSS
D27
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
D9
VSS
D6
VSS
D4
VSS
F27
VSS
G9
VSS
G12
VSS
G16
VSS
G18
VSS
G21
VSS
G24
VSS
H27
VSS
H23
VSS
H21
VSS
H18
VSS
H16
VSS
H14
VSS
H12
VSS
H9
VSS
H8
VSS
H4
VSS
K30
VSS
K27
VSS
K24
VSS
K23 AG15 AD12
AE27
AG11 AG18 AG22 AG27 AJ1
VSS VSS VSS VSS
AG5
VSS
AG9
VSS VSS VSS VSS VSSVSS
E4
VSS
AB4
VSS
M11-P_A15-FSC
Part 5 of 7
CORE GND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS
K8 K7 K1 L4 M30 M8 M7 N23 N24 N27 P4 R7 R8 R23 R24 R30 T27 T1 U4 U8 U23 V30 W7 W8 W23 W24 W27 Y4 AA30 AB27 AB24 AB23 AB8 AB7 AB1 AC4 AC12 AC14 AD16 AC16 AC18 AD30 AD25 AD18 AK2 AK29 AJ30
D10 D25
MOBILITY M11-P_F(U8F)
2-18
Page 56
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
+V1.2S_M11
P17 P18
P19 U12 U13 U14 U17 U18 U19
V19
V18
V17
V14
V13
V12 N18 N17 N14
W17 W18 W12 W13 W14
N13 N19 M19 M18 M12 N12 M13 M14
P12
P13
P14 M17
U8F
VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC
Part 6 of 7
M10-P
CENTER
ARRAY
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VDDC1 VDDC1 VDDC1 VDDC1 VDDC1
M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15 W15 V16 V15 U15 U16 T19 T18 T17 T16
+V1.2S_M11
W19 W16 M15 R19 T12
M11-P_A15-FSC
VDDC1
DDR CHANNEL A (U13)(U36)
2-19
Page 57
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U13
MEM_MAA12 MEM_MAA13
MEM_MAA0 MEM_MAA1 MEM_MAA2 MEM_MAA3 MEM_MAA4 MEM_MAA5 MEM_MAA6 MEM_MAA7 MEM_MAA8 MEM_MAA9 MEM_MAA10 MEM_MAA11 MEM_MAA14
MEM_CSA0# MEM_RASA# MEM_CASA# MEM_WEA#TZ1804
MEM_CLKA0 MEM_CLKA0# MEM_CKEA
MEM_QSA1 MEM_QSA0
MEM_DQMA#1 MEM_DQMA#0
DDRVREFA0
MEM_MAA12 MEM_MAA13
MEM_MAA0 MEM_MAA1 MEM_MAA2 MEM_MAA3 MEM_MAA4 MEM_MAA5 MEM_MAA6 MEM_MAA7 MEM_MAA8 MEM_MAA9 MEM_MAA10 MEM_MAA11 MEM_MAA14
MEM_CSA0# MEM_RASA# MEM_CASA# MEM_WEA#
MEM_CLKA0 MEM_CLKA0# MEM_CKEA
MEM_QSA2 MEM_QSA3
MEM_DQMA#2 MEM_DQMA#3
DDRVREFA1
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
U38
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
MEM_MDA10 MEM_MDA9 MEM_MDA11 MEM_MDA12 MEM_MDA15 MEM_MDA8 MEM_MDA14 MEM_MDA13 MEM_MDA1 MEM_MDA2 MEM_MDA0 MEM_MDA3 MEM_MDA4 MEM_MDA6 MEM_MDA5 MEM_MDA7
TZ1801 TZ1802 TZ1803
TZ1806 TZ1807 TZ1808
+V2.5S
MEM_MDA23 MEM_MDA20 MEM_MDA22 MEM_MDA18 MEM_MDA19 MEM_MDA17 MEM_MDA21 MEM_MDA16 MEM_MDA28 MEM_MDA27 MEM_MDA25 MEM_MDA24 MEM_MDA31 MEM_MDA30 MEM_MDA29 MEM_MDA26
TZ1817 TZ1818 TZ1819 TZ1820 TZ1822 TZ1823 TZ1824
+V2.5S
DDR CHANNEL A (U11)(U38)
2-20
Page 58
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U11
MEM_MAA12 MEM_MAA13
MEM_MAA0 MEM_MAA1 MEM_MAA2 MEM_MAA3 MEM_MAA4 MEM_MAA5 MEM_MAA6 MEM_MAA7 MEM_MAA8 MEM_MAA9 MEM_MAA10 MEM_MAA11 MEM_MAA14
MEM_CSA0# MEM_RASA# MEM_CASA# MEM_WEA#
MEM_CLKA1 MEM_CLKA1# MEM_CKEA
MEM_QSA4 MEM_QSA5
MEM_DQMA#4 MEM_DQMA#5
DDRVREFA0_BOT
MEM_MAA12 MEM_MAA13
MEM_MAA0 MEM_MAA1 MEM_MAA2 MEM_MAA3 MEM_MAA4 MEM_MAA5 MEM_MAA6 MEM_MAA7 MEM_MAA8 MEM_MAA9 MEM_MAA10 MEM_MAA11 MEM_MAA14
MEM_CSA0# MEM_RASA# MEM_CASA# MEM_WEA#
MEM_CLKA1 MEM_CLKA1# MEM_CKEA
MEM_QSA7 MEM_QSA6
MEM_DQMA#7 MEM_DQMA#6
DDRVREFA1_BOT
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
U36
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
MEM_MDA37 MEM_MDA38 MEM_MDA39 MEM_MDA36 MEM_MDA34 MEM_MDA35 MEM_MDA33 MEM_MDA32 MEM_MDA41 MEM_MDA40 MEM_MDA42 MEM_MDA47 MEM_MDA43 MEM_MDA46 MEM_MDA45 MEM_MDA44
TZ1809 TZ1810 TZ1811 TZ1812 TZ1814 TZ1815 TZ1816
+V2.5S
MEM_MDA56 MEM_MDA59 MEM_MDA63 MEM_MDA62 MEM_MDA60 MEM_MDA58 MEM_MDA61 MEM_MDA57 MEM_MDA48 MEM_MDA49 MEM_MDA51 MEM_MDA50 MEM_MDA52 MEM_MDA55 MEM_MDA53 MEM_MDA54
TZ1825 TZ1826 TZ1827 TZ1828 TZ1830 TZ1831 TZ1832
+V2.5S
DDR CHANNEL B (U34)(U7)
2-21
Page 59
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
U34
MEM_MAB12 MEM_MAB13
MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11
MEM_MAB14 MEM_CSB0#
MEM_RASB# MEM_CASB# MEM_WEB#
MEM_CLKB0 MEM_CLKB0# MEM_CKEB
MEM_QSB0 MEM_QSB1
MEM_DQMB#0 MEM_DQMB#1
DDRVREFB0
MEM_MAB12 MEM_MAB13
MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11
MEM_MAB14 MEM_CSB0#
MEM_RASB# MEM_CASB# MEM_WEB#
MEM_CLKB0 MEM_CLKB0# MEM_CKEB
MEM_QSB3 MEM_QSB2
MEM_DQMB#3 MEM_DQMB#2
DDRVREFB1
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
U7
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
PLACE NEAR U
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD VDD
VDD VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD VDD
VDD VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
MEM_MDB4 MEM_MDB3 MEM_MDB1 MEM_MDB5 MEM_MDB2 MEM_MDB6 MEM_MDB7 MEM_MDB0 MEM_MDB9 MEM_MDB10 MEM_MDB12 MEM_MDB14 MEM_MDB8 MEM_MDB11 MEM_MDB13 MEM_MDB15
TZ1901 TZ1902 TZ1903 TZ1904 TZ1906 TZ1907 TZ1908
MEM_MDB26 MEM_MDB29 MEM_MDB31 MEM_MDB24 MEM_MDB28 MEM_MDB30 MEM_MDB27 MEM_MDB25 MEM_MDB22 MEM_MDB19 MEM_MDB23 MEM_MDB20 MEM_MDB21 MEM_MDB17 MEM_MDB18 MEM_MDB16
TZ1917 TZ1918 TZ1919 TZ1920 TZ1922 TZ1923 TZ1924
+V2.5S
DDR CHANNEL B (U6)(U33)
2-22
Page 60
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
U6
MEM_MAB12 MEM_MAB13
MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11
MEM_MAB14 MEM_CSB0#
MEM_RASB# MEM_CASB# MEM_WEB#
MEM_CLKB1 MEM_CLKB1# MEM_CKEB
MEM_QSB5 MEM_QSB4
MEM_DQMB#5 MEM_DQMB#4
DDRVREFB0_BOT
MEM_MAB12 MEM_MAB13
MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11
MEM_MAB14 MEM_CSB0#
MEM_RASB# MEM_CASB# MEM_WEB#
MEM_CLKB1 MEM_CLKB1# MEM_CKEB
MEM_QSB6 MEM_QSB7
MEM_DQMB#6 MEM_DQMB#7
DDRVREFB1_BOT
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
U33
26
BA0
27
BA1
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
42
A12
24
CS
23
RAS
22
CAS
21
WE
45
CLK
46
CLK
44
CKE
16
LDQS
51
UDQS
20
LDM
47
UDM
49
VREF
66
VSS
48
VSS
34
VSS
8Mx16_K4D261638F-TC40
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
NC1
NC1
NC1
NC1
NC1
NC1
NC1
VDD
VDD
VDD
VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65
14 17 19 25 43 50 53
1 18 33 3 9 15 55 61
6 12 52 58 64
MEM_MDB46 MEM_MDB47 MEM_MDB44 MEM_MDB45 MEM_MDB42 MEM_MDB43 MEM_MDB40 MEM_MDB41 MEM_MDB36 MEM_MDB38 MEM_MDB37 MEM_MDB39 MEM_MDB34 MEM_MDB33 MEM_MDB32 MEM_MDB35
TZ1909 TZ1910 TZ1911 TZ1912 TZ1914 TZ1915 TZ1916
+V2.5S
MEM_MDB52 MEM_MDB54 MEM_MDB53 MEM_MDB55 MEM_MDB51 MEM_MDB48 MEM_MDB50 MEM_MDB49 MEM_MDB56 MEM_MDB58 MEM_MDB57 MEM_MDB59 MEM_MDB63 MEM_MDB62 MEM_MDB60 MEM_MDB61
TZ1925 TZ1926 TZ1927 TZ1928 TZ1930 TZ1931 TZ1932
+V2.5S
CODEC (U24)
2-23
Page 61
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
12
R334 0R
Z2443
Z2401
Z2402 PHONE AUX_L
AUX_R VIDEO_L
VIDEO_R
Z2406
Z2407
Z2408 MIC1
MIC2 LINE_L
LINE_R TEST1
VAUX
U24
1
VDD
9
VDD
11
RESET#
6
BIT-CLK
10
SYNC
5
SDATA-OUT
8
SDATA-IN
12
PC-BEEP
13
PHONE
14
AUX-L
15
AUX-R
16
VIDEO-L
17
VIDEO-R
18
CD-L
19
CD-GND
20
CD-R
21
MIC1
22
MIC2
23
LINE-L
24
LINE-R
44
TEST1
34
VAUX
4
VSS
7 26
VSSAVSS
Codec
AVDD AVDD
LINE-OUTL
DC_VOL
LINE-OUTR MONO-OUT
VREF
VREFOUT
AFILT1 AFILT2
VRAD VRDA
HP-OUT-L
NC
HP-OUT-R
JD/SDIN1
EAPD
SPDIFO
XTL-IN
XTL-OUT
ID0# ID1#
AVSS
VT1612A
25 38
Z2415
35
TZ2410
33
Z2416
36 37 27
28 29
30 31 32
TZ2407
39
TZ2401
40
TZ2408
41
TZ2402
43
TZ2403
47
SPDIFO
48
Z2418
2
TZ2409
3
TZ2404
45
TZ2405
46 42
GND_AUD
+V5S_AUD
C3001U21
C3161U21
MONO VREF
VREFOUT AFILT1
AFILT2 VRAD CAP2
AMPLIFIER(U19)
U19
LOUT-
PVDD PVDD
VDD
PGND PGND AGND
14 12 2 24
22 23
3 11 7
1 13 18
SPK_L+ SPK_L­SPK_R­SPK_R+
+V5S_AUD
Z2424 Z2425 Z2426
Z2427 Z2428 Z2429
BYPASS/A
9
LLINEIN
10
LHPIN
8
LIN
5
RLINEIN
4
RHPIN
6
RIN
21
VOLUME
20
SEDIFF
19
SEMAX
15
SHUTDOWN#
16
FADE#
17
BYPASS
Audio Amp.
LOUT+ ROUT-
ROUT+
HP/LINE#
SE/BTL#
TPA6011A
7/8
IEEE1394(U22)
2-24
GND_AUD
Page 62
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
1527395159
12 0
78
10 8
10 721111
624835
7
AV D D
A V D D
A V D D
D V D D
D V D D
D G N D
D G N D
D G N D
A V D D
P LL V D D
AG N D
AG N D
D G N D
D G N D
D G N D
D G N D
110
109
10383756864554433231793
20
V D D P
A V D DA G N D
V D D P
V D D P
V D D P
V D D P
112
XTPB0M
TPB0-
113
XTPB0P
TPB0+
114
XTPA0M
TPA0-
115
XTPA0P
TPA0+
116
TPB1-
TPB1+
TPA1-
TPA1+
CPS
CNA
PC0 PC1 PC2
R1 R0
TEST0 TEST1 TEST2 TEST3 TEST8 TEST9
SDA
SCL
XI
XO
121 122 123 124 125
106 96 87 86
99 98 97
119 118 3 4
105 104 102 101 95 94 11 10 90 89
92 91 5 6
XTPBIAS0
Z2603 Z2604 Z2605 Z2606
TZ2601 TZ2602 TZ2603 TZ2604 TZ2605
1394_CPS 1394_CNA 1394_CYCLEIN 1394_CYCLEOUT
1394_PC0 1394_PC1 1394_PC2
R3126.34K/F1 2
1394_TEST0 1394_TEST1 1394_TEST2 1394_TEST3 1394_TEST8 1394_TEST9 1394_TEST16 1394_TEST17 1394_GPIO2 1394_GPIO3
1394_SDA 1394_SCL XI_1394 XO_1394
TPBIAS0
TPBIAS1
CYCLEIN
CYCLEOUT
FILTER0 FILTER1
TEST16 TEST17
GPIO2 GPIO3
AG N D
AG N D
A N G D
A G N D
R E G _E N #
P L LG N D 1
TSBA43AB22A
128
127
126
117
9
8
R332@0R12
U22
84
PCI_AD0
82
PCI_AD1
81
PCI_AD2
80
PCI_AD3
79
PCI_AD4
77
PCI_AD5
76
PCI_AD6
74
PCI_AD7
71
PCI_AD8
70
PCI_AD9
69
PCI_AD10
67
PCI_AD11
66
PCI_AD12
65
PCI_AD13
63
PCI_AD14
61
PCI_AD15
46
PCI_AD16
45
PCI_AD17
43
PCI_AD18
42
PCI_AD19
41
PCI_AD20
40
PCI_AD21
38
PCI_AD22
37
PCI_AD23
32
PCI_AD24
31
PCI_AD25
29
PCI_AD26
28
PCI_AD27
26
PCI_AD28
25
PCI_AD29
24
PCI_AD30
22
PCI_AD31
73
PCI_CBE0#
60
PCI_CBE1#
47
PCI_CBE2#
34
PCI_CBE3#
58
PCI_PAR
49
PCI_FRAME#
50
PCI_IRDY#
52
PCI_TRDY#
54
PCI_STOP#
36
PCI_IDSEL
53
PCI_DEVSEL#
19
PCI_REQ#
18
PCI_GNT#
56
PCI_PERR#
57
PCI_SERR#
13
PCI_INTA#
16
PCI_CLK
85
PCI_RST#
14
G_RST#
12
PCI_CLKRUN#
21
PCI_PME#
728810 0
D V D D
D V D D
D V D D
D V D D
D V D D
D V D D
D G N D
D G N D
D G N D
R E G 18
R E G 18
30
T Z 2 6 0 6
T Z 26 0 7
PCMCIA(U20)
2-25
Page 63
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3
CB_MF0
GBRST_CB#
183050
PCI_VCC
57
AD0
56
AD1
55
AD2
54
AD3
53
AD4
52
AD5
51
AD6
49
AD7
47
AD8
46
AD9
45
AD10
43
AD11
41
AD12
40
AD13
39
AD14
38
AD15
26
AD16
25
AD17
24
AD18
23
AD19
19
AD20
17
AD21
16
AD22
15
AD23
11
AD24
10
AD25
9
AD26
8
AD27
7
AD28
5
AD29
4
AD30
3
AD31
48
C/BE0#
37
C/BE1#
27
C/BE2#
12
C/BE3#
36
PAR
28
FRAME#
29
IRDY#
31
TRDY#
33
STOP#
13
IDSEL
32
DEVSEL#
1
REQ#
2
GNT#
34
PERR#
35
SERR#
60
MF0--INTA#
21
PCI_CLK
20
RST# GBRST
69
MF6--CLKRUN#
59
RI_OUT#/PME#
65
MF3--IRQSER
62
SPKR_OUT#
44
ODR_CD#(PCI_VCC)
72
ODR_CLK(VPPD1/VPP_VCC)
68
MS_BS(MF5)
67
MS_CD#(MF4)
64
DWP(MF2)
61
ODR_DATA0(MF1)
58
ODR_DATA1(GND)
78
ODR_DATA2(GND)
90
ODR_DATA3(SKT_VCC)
PCI_VCC
146686
102
122
138
63
70
PCI_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC(SUSPEND#)
126
SKT_VCC
AUX_VCC
SLATCH/VPPD0/VPP_PGM
SCLK/VCCD1#/VCC3# SDAT/VCCD0#/VCC5#
U20
CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10
CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0
CCLK
CFRAME#
CIRDY#
CTRDY#
CDEVSEL#
CSTOP#
CPAR CPERR# CSERR#
CREQ# CGNT#
CINT#
CBLOCK#
CCLKRUN#
CRST#
R2_D2 R2_D14 R2_A18
CVS1
CVS2 CCD1# CCD2#
CAUDIO
CSTSCHG
CC/BE3# CC/BE2# CC/BE1# CC/BE0#
144 142 141 140 139 129 128 127 124 121 120 118 116 115 113 98 96 97 93 95 92 91 89 87 85 82 83 80 81 77 79 76
108 111 110 109 107 105 101 104 133 123 106 132 103 136 119 143 84 100 131 117 75 137 134 135
125 112 99 88
71 74 73
CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10 CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0
Z2712
GND
GND
GND
GND
GND
GND
6224294114
130
IEEE1394 (U37)
2-26
711MC1
Page 64
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
3
7
10
16
24
32
45
54
64
99
78
110
26
41
56
94
84
126
116
71
107
20
U37
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3
PCI_IDSEL#LAN
Z2901 Z2902
104
AD0
103
AD1
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
CBE0B
77
CBE1B
60
CBE2B
44
CBE3B
61
FRAMEB
46
IDSEL
63
IRDYB
67
TRDYB
76
PAR
68
DEVSELB
30
REQB
29
GNTB
69
STOPB
70
PERRB
75
SERRB
25
INTAB
28
CLK
88
NC/M66EN/M66EN
27
RSTB
65
CLKRUNB
31
PMEB
VD D33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
NC/VDD18/VDD12
NC/VDD18 /VDD12
NC/VDD18/VDD12
VD D25/ V DD1 8 / V DD1 2
VDD25/VDD18/VDD12
N C/V DD1 8/ VDD12
NC /VD D18/VD D12
NC/VDD18/VDD12
VDD25/VD D 18/VDD 12
VDD25/VDD18/VDD12
NC/AV DDL/AVD DL
AVD D33/ AVDDL/AVDDL
AVD D33/ AVDDL/AVDDL
AVD D33/ AVDDL/AVDDL
RTL8100C/RTL8110S-32/RTL8110SB
(NC)SMBCLK
(NC)SMBDATA
NC/AVDDH/AVDDH
GND/VSS/VSS GND/VSS/VSS
(NC)HSDAC+
AVDD25/NC/NC
NC/CTRL18/CTRL12
MDI0+
MDI0-
MDI1+
MDI1-
NC/MDI2+
NC/AV DDH/ A VDDH
NC/MDI2-
NC/MDI3+
NC/MDI3-
EECS
EEDO
LWAKE
CTRL25
ISOLATEB
XTAL2
XTAL1
LED0 LED2 LED1 LED3
EESK
EEDI
RSET
1 2 5 6
14 15 18 19
117 114 115 113
106 111 109 108
72 74
127
120 123 124 11 12 105
125 8
23
122
121
LINK_UP# ACTIVITY# LINK100# LINK1000#
LAN_EE_CS LAN_EE_SK LAN_EE_DI LAN_EE_DO
TZ2902 TZ2903
Z2903
Z2904
R1280R1 2
Z2905
R1290R1 2
Z2906
R1410R1 2
HSDAC+ Z2907
R5850R1 2
LWAKE
ISOLATE#
Z2908
Z2909
GND/VSS/VS S
NC/VS S/VSS
NC/VSS/VSS
NC/GN D/ GND
GND
NC/GN D/ GND
GND
NC/GND/GND
GND
NC /GN D /GND
22
35
48
52
62
80
73
GND/VSSPST/VSS PST
GND/VSSPST/VSS PST
GND/VSSPST/VSS PST
GND
NC/GND/GND
NC /GN D /GN D
21
100
118
112
GND /VSSPST/VSSPST
GND/VSSPST/VSS PST
GND/VSSPST/VSS PST
GND/VSSPST/VSSPST
GND/VSSPST/VSSPST
38
51
101
91
81
66
119
GND/VSS/VS S
GND/VSS/VSS
4
9
RTL8100CL
13
17
128
KEYBOARD CONTROLLER (U40)
2-27
Page 65
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
16
3445123
136
U40
10
LAD3
13
LAD2
14
LAD1
15
LAD0
9
LFRAME
19
WRST
18
LPCCLK
23
PWUREQ
7
SERIRQ
22
ECSMI
31
ECSCI/GPD3
5
GA20/GPB5
6
KBRST/GPB6
158
CK32K
160
CK32KE
80
KSI7
79
KSI6
78
KSI5
77
KSI4
74
KSI3
73
KSI2
72
KSI1
71
KSI0
68
KSO15
67
KSO14
66
KSO13
65
KSO12
64
KSO11
61
KSO10
60
KSO9
59
KSO8
58
KSO7
57
KSO6
56
KSO5
53
KSO4
52
KSO3
51
KSO2
50
KSO1
49
KSO0
81
ADC0
82
ADC1
83
ADC2
84
ADC3
87
ADC4/GPE0
88
ADC5/GPE1
89
ADC6/GPE2
90 2
ADC7/GPE3PWRSW/GPE4
148
GPI0
149
GPI1
152
GPI2
155
GPI3
156
GPI4
168
GPI5
174
GPI6
48
GPH0
54
GPH1
55
GPH2
69
GPH3
70
GPH4
75
GPH5
76
GPH6
105
GPH7
3
GPG4/FA20
4
GPG5/FA21
27
GPG6/LPC80HL
28
GPG7/LPC80LL
153
GPB0/RXD
154
GPB1/TXD
162
GPB2
163
GPB3/SMCLK0
164
GPB4/SMDAT0
165
GPB7/RING/PWRFAIL/LPCRST
8
GPJ0
11
GPJ1
12
GPJ2
20
GPJ3
21
GPJ4
85
GPJ5/KSO16
86
GPJ6/KSO17
91
GPJ7
IT8510
VCC
IT8511E
Embedded Controller
KB Matrix Interface
VSS
173546
166167
VSTBY
VSTBY
VSTBY
VSTBY
VSS
VSS
VSS
VSS VSTBY
VSS
122
159 157
137
95
161
VBAT
VSTBYVSS
AVCC
BADDR0/FA2 BADDR1/FA3
FLASHTRI/FA4
GPG1/FA17 GPG2/FA18 GPG3/FA19
PS2CLK0/GPCF0 PS2DAT0/GPCF1 PS2CLK1/GPCF2 PS2DAT1/GPCF3
PS2CLK2/GPCF4 PS2DAT2/GPCF5 PS2CLK3/GPCF6 PS2DAT3/GPCF7
WUI5/GPE5
LPCPD/WUI6/GPE6
CLKRUN/WUI7/GPE7
RI1/WUI0/GPD0 RI2/WUI1/GPD1
LPCRST/WUI4/GPD2
GINT/GPD5 TACH0/GPD6 TACH1/GPD7
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 PWM7/GPA7
CLKOUT/GPC0 SMCLK1/GPC1
SMDAT1/GPC2 TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6
CK32KOUT/GPC7
ISAD/GPK4
ISCLK/GPK6
AVSS
96
FA0 FA1
SHBM/FA5
FA6
FA7 FA8/ID0 FA9/ID1
FA10/ID2 FA11/ID3
FA12 FA13 FA14 FA15 FA16
FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7
FCS FRD
FWR
DAC0 DAC1 DAC2 DAC3 DAC4 DAC5
GPD4
CRX/GPC3
CTX/GPC5
GPK0 GPK1 GPK2 GPK3
ISAS/GPK5
124 125 126 127 128 131 132 133 143 142 135 134 130 129 121 120 113 112 104 103
138 139 140 141 144 145 146 147
173 150 151
110 111 114 115
116 117 118 119
99 100 101 102 97 98
44 24 25
26 29 30
41 42 62 63
32 33 36 37 38 39 40 43
47 169 170 171 172 175 176 1
92 93 94 106 107 108 109
3V,5V,&12V(PU2)
2-28
Page 66
17181920212223
24
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
21
22
PU2
Z3603Z3612
25
BST3
V+
Z3604
27
DH3
26
PHASE3
DL3
CSH3
CSL3
COMP3
PSAVE
SHDN
TIME/ON5
RUN/ON3
SC1404
R E S E T
11
PC103
21
4.7U/16V/C
Z3606
Z3607
Z3608
Z3609
Z3620
Z3610
24
1
2
3
10
23
7
28
PR56
10K
1 2
8
VL
GN D
12OUT
VDD
BST5
DH5
PHASE5
PGND
CSH5
CSL5
COMP5
SEQ
REF
SYNC
4
Z3613
5
Z3614
18
Z3615Z3605
16
Z3616
17
Z3617
19
DL5
20
Z3618
14
Z3619
13
Z3625
12
Z3628
15
Z3622
9
Z3623
6
VCORE (PU12)
28
29
30
31
32
PU12
1
VOA+
2
VOA-
3
OAOUT
4
STP_CPUB
5
SGND
6
SENSE+
7
SENSE-
8
RDPRSLP
PSIB
FREQSET
RDPSLP
RUN/SS
SVCC
DPRSLPVR
LTC3734
ITH
RBOOT
DDR & 1.8 POWER (PU9)
25
26
27
VFB
BOOST
PGOOD
MCH_PG
TG
SW
PVCC
BG
PGND
VID5 VID4 VID3
VID0
VID1
VID2
N/C
2-29
Page 67
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
PU9
ISL6225CA
1
GND
2
LGATE1
3
PGND1
4
PHASE1
5
UGATE1
6
BOOT1
7
ISEN1
8
EN1
9
VOUT1
10
VSEN1
11
OCSET1
12
SOFT1
13
DDR
14 15
VINPG1
LGATE2
PGND2 PHASE2 UGATE2
OCSET2
PG2/REF
VCC
BOOT2
ISEN2
EN2 VOUT2 VSEN2
SOFT2
28 27 26 25 24 23 22 21 20 19 18 17 16
1.2V & 1.5 POWER (PU8)
PU8
ISL6225CA
1
Z3903
Z3904 Z3905 Z3906 Z3907 Z3908 Z3909
Z3913
1
PC106
0.1U/25V
GND
2
LGATE1
3
PGND1
4
PHASE1
5
UGATE1
6
BOOT1
7
ISEN1
8
EN1
9
VOUT1
10
VSEN1
11
OCSET1
12
SOFT1
13
DDR
14 15
VINPG1
LGATE2
PGND2 PHASE2 UGATE2
BOOT2
VOUT2 VSEN2
OCSET2
SOFT2
PG2/REF
VCC
ISEN2
EN2
28 27 26 25 24 23 22 21 20 19 18 17 16
2.3 Connectors Definition
2-30
Page 68
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
DDR (CN12)
SM_VREF_DIMM
91021223334364546575869708182929394113
CN12
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
197 199
112 111 110 109 108 107 106 105 102 101 115 100
117 116
134 148 170 184
133 147 169 183
118 120 119
121 122
160 158
123 124 200
1 2
99
12 26 48 62
78 11
25 47 61
77 71
73 79 83 72 74 80 84
96 95
35 37
89 91
85 86 97 98
VREF VREF VddSPD VddID
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 / AP A11 A12
BA0 BA1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
RAS# CAS# WE#
CS0# CS1#
CKE0 CKE1
CK0 CK0# CK1 CK1# CK2 CK2#
NC NC/(RESET#) NC/A13 NC/BA2 NC NC NC
114
131
132
143
144
155
156
157
167
168
179
180
191
192
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
195
SCL
193
SDA
194
SA0
196
SA1
198
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3415162728383940515263647576878890103
DDR (CN11)
2-31
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AMP=DDR_1376409-1(RVS)
104
125
126
137
138
149
150
159
161
162
DDR_REV
173
174
185
186
Page 69
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
SM_VREF_DIMM
91021223334364546575869708182929394113
CN11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
197 199
112 111 110 109 108 107 106 105 102 101 115 100
117 116
134 148 170 184
133 147 169 183
118 120 119
121 122
160 158
123 124 200
1 2
99
12 26 48 62
78 11
25 47 61
77 71
73 79 83 72 74 80 84
96 95
35 37
89 91
85 86 97 98
VREF VREF VddSPD VddID
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 / AP A11 A12
BA0 BA1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
RAS# CAS# WE#
CS0# CS1#
CKE0 CKE1
CK0 CK0# CK1 CK1# CK2 CK2#
NC NC/(RESET#) NC/A13 NC/BA2 NC NC NC
114
131
132
143
144
155
156
157
167
168
179
180
191
192
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
195
SCL
193
SDA
194
SA0
196
SA1
198
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3415162728383940515263647576878890103
INVERTER CONN. (CN21)
2-32
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AMP=DDR_1376408-1(STD)
104
125
126
137
138
149
150
159
161
162
DDR_STD
173
174
185
186
Page 70
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
F5 FCC32202_2A/32V
CN21
Z2101
1 2 3 4
Z2102
5 6 7 8
ACES=85204-0800
INVERTER_CONN
1
L51 BLM11P600S
C343
@0.1U/25V
2 1
Z2103
S-VIDEO CONN. (CN6)
LDDCDATA
2
LCD CONN. (CN3)
+V3.3S_LCD
CN3
12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930
CN6 S-VIDEO_35146S-04T1-F
S-VIDEO_CONN
34 1
5
6
TV_GND
+V3.3S_LCD
TXD1­TXD1+
TXC0­TXC0+
TXD5­TXD5+
TXC1­TXC1+
PNLID1 LDDCCLK
ACES=87216-3012
LCD_CON
TV IN CONN. (CN1)
2-33
Page 71
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
89
AUDIO_INR
3 7
2 1
89
3 7
2 1
TV BOARD CONN. (CN4)
CN1
@TV IN CONN
6
6
5
5
4
4
CN4
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
S_CIN
RF_IN S_YIN
@TV BOARD CON
CRT CONN. (CN2)
CN2 D-SUB_15P_DZ11A91-WL_31
16
17
CRT_CONN
111 12 13 14 15
TZ2101
C330 22P
2 1
6 7
2 8 3
Z2107
9
TZ2102
4
Z2110
10
Z2111
C329 22P
2 1
5
DVD CONN. (CN9)
2-34
Page 72
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
IDE_SD_CSEL
TZ2201
+V5S_HDD
CN9
12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546 4748 4950
51
52
DVD_CON
HDD CONN. (CN31)
+V5S_HDD
IDECD_R IDE_SDD8
IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_SDDREQ IDE_SDIOR#
IDE_SDDACK#
TZ2202
IDE_SATADET IDE_SDA2 IDE_SDCS3#
TZ2203
CN31
12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546
HDD CONN
IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 TZ2204
IDE_PD_CSEL TZ2205
IDE_PATADET IDE_PDA2 IDE_PDCS3#
TZ2206
USB CONN.(CN23)
2-35
Page 73
1
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
1 2 3 4
5
6
CN23 C71080-A01
USB_CON
USB CONN. (CN24)
2 3 4
5
6
CN24 C71080-A01
USB_CON
USB CONN. (CN25)
Z2307
1
Z2308
2
Z2309 CN25
3 4
5
6
C71080-A01
USB_CON
+V3.3
Z2301
MDCLK
MDC CONN. (CN33)
CN33
1
MONO_OUT
3
GND
5
AUXR
7
AUXL
9
CD_GND
11
CD_R
13
CD_L
15
GND
17
3.3Vaux/dual
19
GND
21
3.3Vmain
23
SDATA_OUT
25
RESET#
27
GND
29 30
MSTRCLKBITCLK
88018-3000-0.8MM
MDC_CONN
AUDIO_PD
MONO_PHONE
PRIMARY_DN
RES
GND
5Vmain
RES RES
GND
SYNC SDATA_INB SDATA_INA
GND
5V
05/29 Modify
2 4 6 8 10 12 14 16 18 20 22 24 26 28
Z2302 TZ2307
TZ2308 TZ2309 TZ2310 Z2303 TZ2311
Z2304 TZ2312
Z2305
R2871K
1 2
R2880R
1 2
1 2
R28933R
1 2
R29033R
MDCPHONE
AC_SYNC AC_SDATAIN1
AC_BITCLK
1
R291 @10K
SPEAKER CONN. (CN22)
2-36
Page 74
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
CN22
1
1
2
2
3 4
1
C340
SPEAKER CONN
680P
34NC
NC
NC1 NC2
MIC JACK CONN. (CN28)
4/28 follow 255ii
TZ2501 TZ2502 TZ2503
Z2502
GND_AUD
5 4 3 6 2 1
CN28
8
2SJ-S820-027
7
MIC_JACK
MIC JACK CONN. (CN36)
4/28 follow 255ii
CN36
5 4 3 6 2 1
@2SJ-S820-027
7
8
MIC_JACK
GND_AUD
1394 CONN. (CN26)
CN26
TPB0-/1394 TPB0+/1394 TPA0-/1394 TPA0+/1394
1
TPB-
2
TPB+
3
TPA-
4
TPA+
MOLEX=1394_54030-0491
1394_CONN
SHLD SHLD
5 6
LINE IN (CN29)
2-37
Page 75
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
C133 @1000P
2 1
GND_AUD
1
@1000P
4/28 follow 255ii
5 4 3 6 2 1
05/28
CN29
8
7
TZ2504 TZ2505 Z2527 TZ2506 Z2528
C126
2SJ-S820-027
LINE_IN
2-38
Page 76
Page 77
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
3.1. TOP Cabinet Assembly …………………………….……………………
3
3.2. BUTTOM Cabinet Assembly………………………………….……..…
3.3. ODD Cabinet Assembly…………………………………………………...
3.4. LCD Assembly ………………………………………………….……….
4
5
6
3-2
Page 78
3.1 Top Cabinet Assembly.
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
ITEM PART.NO. DESCRIPTION QTY.
A 22-325040-00 SPEAKER SUB WOOFER 25SB04 259IA1 1 B XXXXXX MB-259IA1 1 C 83-UG8010-00 TOP CAB ASSY #8100/8151 259IA1 1 D 35-UG8050-00 HDD TRANSFER BD 259IA1 1
3-3
Page 79
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
3.2 Buttom Cabinet Assembly.
ITEM PART.NO. DESCRIPTION QTY.
A 83-UG5090-00 DOOR BTM ASSY #8155 255II1 1 B 40-UG9040-00 THERMAL MODULE YDT&BISONIC 255/259IAX 1
C 83-UG6020-00 BTM CAB ASSY(W/O TV) #8155 259IA1 1 D 52-UG5012-00 RUBBER FOOT ADD 2MM FOR 255II1 1 E 50-UG5010-00 COVER HDD #8155 255II1 1
F 86-UG5020-01 HDD ASSY 40GB 255II1 1
G 50-UG5061-00 DOOR USB DONGLE #8155 255II1 1
3-4
Page 80
3.3 ODD Assembly.
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
ITEM PART. NO. DESCRIPTION QTY
1 50-UG5133-00 BEZEL DVD DUAL QSI #8155 255II1 1 2 50-UG5076-00 KNOB DVD DUAL QSI #8155 1 3 70-240006-10 DVD-DUAL SDW-042 4X QUANTA FW:DX71 1 4 40-UG6023-00 MYLAR HDD PULL BAR 258SA0 1 5 41-720120-04 SCREW M2.0*4 I #1 NI 2 6 41-910217-03 SCREW TP1.7*3 I #0 BLACK H=0.6 1
3-5
Page 81
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
3.6 LCD Module Assembly.
3-6
Page 82
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
ITEM PART. NO. DESCRIPTION QTY
1 83-UG8052-00 BACK CAB ASSY #8100/8151 259IA1 1 2 29-UG8080-00 CABLE FOR MICPHONE FG259IA1 1 3 40-UD7800-00 MAGNETIC FOR SUSPEND SENSOR 258SA0 1 4 40-UG8030-00 SHIELDING FOR LCD 259IA1 1 5 29-UG8060-00 CABLE FOR LCD INVERTER CMI 259IA1 1 6 73-03D169-1A INVERTER MPT N169 MPS R:1A 1 7 50-UG8210-00 MYLAR FOR LCD INVERTER 259IA1 1 8 40-UG6025-00 HINGE+BKT LCD-R 15.4” (HONTECH) 159IA1 1
9 72-115262-00 LCD 15.4” TFT WXGA QD15TL01 QDI 1 10 50-UG8211-00 MYLAR LCD FRONT #8151 259IA1 2 11 50-UG6030-00 FRONT CAB #8151 259IA1 1 12 52-UG8030-00 RUBBER LCD UP #8155 259IA1 4 13 40-UG6025-10 HINGE+BKT LCD-L 15.4”(HONTECH)259IA1 1 14 29-UG8054-00 CABLE LCD 15.4” WXGA CMI 259IA1 1 15 41-720102-03 SCREW M2*3 I#0 D2.8~3.1 T0.3~0.4 NI 20 16 41-720525-06 SCREW M2.5*6 I#1 NI+NYLOK 6 17 41-721520-06 SCREW M2*6 ISOT #1 NI+NYLOK 2
3-7
Page 83
Page 84
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
4.1. System Disassembly Procedures……………………………………………
4.2. LCD Display Panel Disassembly Procedure………………….…………...
3
11
4-2
Page 85
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
4.1. System Disassembly Procedures
1. Please refer to the disassembly procedures of the Nobile 159W
2. Unlock the battery knob and pull out the battery pack.
3. Unfasten 6 screws and
remove the CPU and DDR cover.
4-3
Page 86
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
4. Unfasten 1 screw and
remove the ODD.
5. Unfasten 5 screws.
6.
(a) Unlock CPU lock and
remove CPU .
(b) Gently remove the DDR
4-4
Page 87
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
7. Unfasten 1 screw of the
HDD cover.
8. Disconnect the HDD
casing to the HDD Connector to remove it.
9. Unfasten 20 screws.
4-5
Page 88
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
10. Unfasten 3 screws.
11. Unlock 3 Latches of the
Keyboard.
12. Disconnect KB cable from
the connector.
4-6
Page 89
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
13. Remove 2 hinge cover and
speaker cover.
14. Disable LCD cable.
15. Unfasten 4 screws from
LCD hinge.
4-7
Page 90
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
16. Unlock LCD Knob and
gently remove LCD panel..
17. Gently remove Bottom
cover.
18. Disconnect USB cable.
4-8
Page 91
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
22. Unplug speaker cable and
unfasten 2 hexnuts.
23. (a)Remove 1 hexnuts and 2
screws .
(b)Unplug touch pad cable
and HDD cable.
(c)Remove 4 cables
24. Remove 2 screws before
remove modem board
4-9
Page 92
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
25. System Disassembly.
4-10
Page 93
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
4.2 LCD Display disassembly procedure.
1. Remove the 6 rubber stoppers.
2. Unfasten 6 screws.
3. Gently remove the LCD Front cabinet.
4-11
Page 94
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
4. Unfsaten 12 screws.
5. Disconnect LCD cable from the inverter board and remove the LCD from LCD back cabinet
6. Unfasten 8 screws and remove left and right hinge.
4-12
Page 95
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
7. Disconnect LCD connector and
remove LCD cable.
8. LCD display panel disassembly
finished.
4-13
Page 96
Page 97
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
5.1. CPU, RAM, HDD Installation……………………………………………
5.2. Upgrade System & Keyboard BIOS…………..…………….…………...
3
8
5-2
Page 98
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
5.1. CPU, RAM, HDD Installation
Warning Notice
For precautionary measures, please disconnect the AC adapter and remove the battery from the
battery compartment while doing the installation procedure of the CPU, Memory & HDD.
Procedure to remove the battery
Unlock the battery knob and pull out the battery pack.
A. CPU Installation Guide
Important Notice
The CPU thermal pad of the CPU fan heat sink (black color) is one time use only. Meaning that if you remove the CPU heat sink from the CPU, you must REPLACE the CPU thermal pad with a new thermal pad (black color). Clean any residue on the CPU and the CPU heat sink assembly before putting the new CPU thermal pad. Otherwise, there might be an overheat problem on the CPU.
1.Unfasten 6 screws and remove the CPU and DDR cover.
5-3
Page 99
TECHNICAL SERVICE MANUAL Prestigio Nobile 159W
2.Unfasten 5 screws from CPU Fan cover and disconnect Fan cable from the connector.
3. Align the pin 1 of CPU with pin 1 of CPU socket and gently put the CPU into the CPU socket.
4. Fasten the CPU Lock clockwise.
5-4
Page 100
TECHNICAL SERVICE MANUALPrestigio Nobile 159W
5. Fasten 5 screws from CPU Fan cover and connect Fan cable from the connector.
6. Put CPU and DDR cover then fasten 6 screws.
5-5
Loading...