Prestigio CAVALIERE 142 Technical & Service Manual

PRESTIGIO CAVALIERE 142

TECHNICAL SERVICE

MANUAL

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Outline of the Prestigio Cavaliere 142

1.1 Introduction

This chapter provides the outline features and operation of the Cavaliere 142 including the BIOS
Setup program and other system options.

The Cavaliere 142 notebook offers the latest in advanced portable computing and multimedia
technology that even outperforms most desktop computers. It incorporates the latest Intel
Pentium-IV PGA Processor or Intel Celeron PGA processor and fully compatibles with an
entire library of PC software based on operating systems such as MS-DOS, Windows 2000 /
XP. It also runs on future versions of Windows. It comes with a built-in keyboard, glide pad
pointing device, sound system, PCMCIA slots, USB (Universal Serial Bus) port, IEEE 1394
port, advanced power management and more new multimedia features.

1.2 Feature Highlights

The Cavaliere 142 includes a variety of innovative features:

Category Specification Stepping

CPU Intel Pentium – M Processor

: Banias 1.3/1.4/1.5/1.6/1.7 GHZ

Core Logic

Intel Montara-GM (North Bridge) :

CPU(Banias) I/F
VGA Controller

LVDS I/F
DVOB&DVOC IF.

RGB analog I/F
200/266 DDR MEMORY I/F
Hub-Link I/F

Intel ICH4-M (South Bridge) :

Integrated Hub-Link I/F to connect with PCI

Bridge
Dual IDE Master/Slave Controller ,Integrated
DMA Controller

1.1/2.0 Universal Serial Bus Host Controller
Integrated 10/100M Fast Ethernet MAC
Controller
Integrated Audio Controller with AC97 V2.2
Interface
Advanced Power Management(ACPI)

RTC
Integrated PCI to LPC Bridge
Integrated Audio Controller with AC97 Interface
PCI Bus Interface (PCI 2.2 compliant)
GPIO

Advance PIC

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Cache Memory L1 Cache (Pentium Processor internal):

12KB code and 8KB data
8-way cache associativity provides

L2 Cache (Pentium Processor internal):
256KB Advanced Transfer Cache,8 way associativity
8-way set associative, 32-byte line size, 1 line per
sector

System Memory Expansion Memory: 2 SO-DIMM Slot (1.25”)

Size: 128/256/512MB/1G
Type: DDR DRAM, 3.3V
Data Path: 64Bit
Frequency : 266/200MHz

Refer to the Cavaliere 142 Key component list in detail.

BIOS ROM Flash ROM

1st Vendor : SST 49LF004A TSSOP Package 4Mbit LPC
flash ROM
2nd Vendor : <TBD>
4Mbit, 32 pin TSSOP package

PS: PLCC32 Package is just for DEBUG
Super I/O
RTC + NVRAM Integrated in South Bridge (Intel ICH4-M)

K/B Controller

PMU New PMU08

VGA Controller Embedded in Intel Montara-GM

VRAM Share system memory, UMA (using DVMT

TV out encoder None
CardBus
Controller

Sound

None

Real Time Clock with 256 byte extended

CMOS.

IBM AT Clock/Calendar/Alarm (14 Bytes)

Mitsubishi M38859 LPC KBC

Internal K/B, Touch Pad, External K/B or M/S

Supported A20Gate,firmware version 2.14

Mitsubishi M38859FFHP

Embedded Controller

High Performance and high quality 3D

accelerator

Integrated dual DVO bridge

Integrated LVDS Interface

Integrated RGB analog Interface

High performance 2D accelerator

Complete TV-OUT/Digital Flat Panel Solution

configuration)

RICOH R5C551 (PCI Card Bus controller)

PC/Card Bus Type II x1

Build in smart card (none)
AC’97 CODEC
Realtek ALC202
AC’97 Revision 2.2 Compliant

TBD

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Modem Askey / Actiontec MDC modem

V.90, K56flex, ITU-T V.34, V.32, RJ11 Jack
TIA/EIA 602, V.42
ITU-T V.17, V.29, V.27ter, V.21 Ch2
TIA/EIA 578 Class1 FAX
Wake up on Ring

On board LAN Intel ICH4-M + Intel 82562EZ

Support LAN boot
Support for auto-negotiation (10BASE-T and 100BASE­TX)
Wake up On LAN

3com Combo

802.11b Support by Intel Calexico Mini-PCI Wireless LAN Card
<Design Ready Only>

1394 RICOH R5C551, support one port
Cellular I/F Support PDC/PIAFS/CdmaOne/Dupa(None) Support by

USB
Intel ICH4-M

IDE Interface
(Intel ICH4-M)

Printer Interface
Serial Interface
External PS/2
Port
(M38859)

Universal Serial
Bus
(Intel ICH4-M)

Infrared
Modem
LAN

Integrated in South Bridge Intel ICH4-M)
USB v.1.1 and Intel Universal HCI v.1.1 compatible
USB v.2.0 and Enhance Universal HCI v.2.0 compatible
Eighteen level (doublewords) data FIFO with full scatter
and gather capability
Root hub and four function ports
Integrated physical layer transceivers with optional over­current detection status on USB inputs

Fast IDE, 2 ports:

--Integrated multithreaded I/O link mastering with read
pipelined streaming

--Dual independent IDE channel each with 16 DW FIFO

--Native and compatibility mode

--PIO mode 0,1,2,3,4, and multiword DMA mode 0,1,2

--Ultra DMA 33/66/100

None
None

External Keyboard or PS/2 Mouse
Exclusively connected.
Can use both device by using branch
cable(option)

--Integrated multithreaded IO link mastering

--Dual independent OHCI controllers with root hub

--Support up to 6 USB ports

--Support legacy devices

--Over current detection equipped

--Option to separately configure each port as a wake-up
source

None

56K Data/Fax Modem (v.90)
10/100 Base TX LAN
Lan boot support and WFM 2.0

Cellular I/F
USB Cable

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

LCD Panel 14.1” XGA

; Refer to the Cavaliere 142 Key component list in detail.

HDD 2.5 inch HDD (Standard)

9.5mm Height

; Refer to the Cavaliere 142 Key component list in detail.
CD-ROM
(Option)
FDD(None)

DVD
(Option)

CD-RW,Combo 9.5mm Height ,24X

Pointing Device Internal Touch Pad

Keyboard Internal Keyboard

Speakers (audio) Two built-in dynamic speakers

Microphone Built-in non-directional Back Electric Condenser

Buzzer Not support
Battery Battery Pack

RTC Battery Ni-MH Battery

DC/DC
Converter

CD-ROM (9.5mm Height)

; Refer to the Cavaliere 142 Key component list in detail.

USB FDD

3 mode Support

; Refer to the Cavaliere 142 Key component list in detail.

DVD

9.5mm Height ,8X

; Refer to the Cavaliere 142 Key component list in detail.

; Refer to the Cavaliere 142 Key component list in detail.

Pad SYNAPTICS : TM41P-351

Refer to the Cavaliere 142 Key component list in detail.

6.5mm Height, 3.0mm Stroke, 19mm Pitch

Vendor: ALLTOP

PAN-international

; Refer to the Cavaliere 142 Key component list in detail.

40 x 20mm, 1W 4Ω

Microphone

Panasonic : WM62PCX

Type: 8 cell Li-ION Battery with EEPROM

Voltage: 14.4V

Cell: 1800mAh Prisamtic

Method: 4P2S

Capacity: 3600mAh/52Wh Panasonic

Vendor: SANYO/ Panasonic

; Refer to the Cavaliere 142 Key component list in

detail.

Model: 3/V 15H

Voltage: 3.6V

Capacity: 15mAh

Vendor: VARTA

Daughter board

5.0 V Max 7.0 A

3.3 V Max 4.5 A

1.5V Max 2A

1.8V Max1A

.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

CPU Vcore 1.3V Max 32A
AC Adapter PA-1600-05 : Liteon

Input: AC100 – 240V, 50/60Hz
Output: 19V, 60W Peak 80W
Size: 110mm x 50mm x 29mm (Liteon)
Vendor: Liteon
Color : TBD
; Refer to the Cavaliere 142 Key component list in detail.

Size 310MM X 266MM X 27.3 MM (H)

SUPPORTS KENSINGTON LOCK

Weight AROUND 2.54 KG OR 4.5 LBS WITH 14.1” LCD SYSTEM

WITH HDD, FDD, CD-ROM AND ONE LI-ION BATTERY

PACK

Battery Handling

Category

Battery Charging

Max Change Current:

1.7A-1.75A±150mA

Battery Life

Save to RAM 1st Li-ion 3 Days TBD

Consumption power

Specification

Power On Li-ion 3.5 h

Power Off Li-ion 3.5 h

1st Li-ion 4.5 h TBD

Charge 24 h CMOS Battery

System on

Discharge 3 month

System off
Maximum 75W
Typical 25W TBD
MobileMark 10W Target

Remark

5

1.3 System Configuration

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Figure 1-1 System Configuration Diagram

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

1.4 Quick Tour of the Notebook

Please take a moment to become familiar with the location and purpose of every control, the
LED status panel, connectors and ports, which are illustrated in this section. It is
recommended to first go through the User Guide of the notebook, which is shipped together
with the notebook for information on how to operate its features.

1.4.1 The Inside of the Notebook

To open the LCD cover of the notebook, find the cover latch located at the front center of the
LCD cover. Push the latch to the right to release and tilt the LCD cover up. Inside, you will
see the LCD display panel, keyboard, touch pad, status LED, and power switch.

Figure 1-2 The Inside side of the Notebook

Color LCD Display

Œ

Integrated Microphone

•
’

Power On/Resume

Button

Built-in Stereo Speakers

•

Status LED Indicator

•

➑

Keyboard

Easy Buttons

Ž

Built-in Stereo Speakers

‘

❾

Touchpad Pointing

Device

• Color LCD Display

The notebook computer comes with a color LCD that you can adjust for a
comfortable viewing position. The LCD can be 14.1" TFT color LVDS with
1024x768 XGA (Extended Graphics Array) or 1400x1050 SXGA+ resolution
panels. The features of the Color LCD Display are summarized as follows:

⇓ TFT color LVDS with 14.1" 1024x768 XGA or 14.1" 1400x1050

SXGA+ resolution panels.

⇓ Capable of displaying 16M colors (32-bit true color) on either size

panels.

⇓ LCD display control hot-keys allows you to adjust the brightness of the

LCD.

⇓ Simultaneous display capability for LCD and external desktop computer

monitor.

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

• Built-in Stereo Speakers

Integrated left and right mini stereo speakers located at the bottom of LCD
panel for sound and audio output for your multimedia presentations or
listening pleasure.

• Easy Buttons

There are two easy buttons used for accessing Internet and e-mail functions
instantly and easily. Description of the easy buttons appears in the latter part
of this section.

• Integrated Microphone

Integrated mono microphone for instant voice recording and simultaneous
voice conversation.

• Status LED Indicator

Keeps you informed of your notebook computer’s current power status and
operating status. Description of the status icons appears in the latter part of
this section.

• Power On/Resume Button

Switches the computer power on and off, or resumes whenever it is in
Suspend mode.

• Keyboard

⇓ Standard QWERTY-key layout and full-sized 82/84 keys keyboard with

Windows system hot-keys, embedded numeric keypad, 7 hot keys,

inverted "T" cursor arrow keys, and separate page screen control keys.

⇓ Wide extra space below the keyboard panel for your wrist or palm to sit-

on comfortably during typing.

• Touchpad Pointing Device

Microsoft and IBM PS/2 mouse compatible with three select buttons as one
Scroll button and two Touchpad click buttons. These three buttons array
below the Glide pad. The middle one is located with the Scroll button that
lets you execute the scroll page function. The two click buttons located at
each side support tapping selection and dragging functions. These buttons
work like a standard computer mouse. Simply move your fingertip over the
Glide Pad to control the position of the cursor. Use the selection buttons
below the Glide Pad to select menu items.

Easy Buttons

There are three easy buttons, two use for accessing Internet and e-mail functions instantly and
easily, the other one lets you define certain functions by yourself. Descriptions of the easy
buttons appear in the latter part of this section.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Internet Button

Œ

Figure 1-3 Easy Button

E-Mail Button

•

• Internet Button

This technology is designed specifically for providing a very convenient way
in connecting Internet only by pressing Internet button as shown in the
graphics. For more understanding and interesting, you can refer Section 2.5
to recognize the driver installation procedures in activating Internet button.

• E-mail Button

This is the most convenient way to access the outlook 98/2000/2002... utility
just by pressing this button. You can simplify several procedures in entering
into Outlook 98/2000/2002... environment.

Status LED Indicator

Located just in front of the palmrest assembly, you will find three LEDs for the power and
battery charge status. These LEDs are positioned to be visible even if the LCD cover is closed.

Figure 1-4 Status LED Indicator

Power Indicator

Œ

Wireless LAN Access

•

❼

Num Lock

Battery charging LED

•

Caps Lock

•

Drive Access

Ž

Scroll Lock

‘

• Power Indicator

Lets you know that power to the system is turned on. This LED is positioned
so that you can see the power state whether the LCD panel is opened or

closed.

9

⇓ Lights green when the system is powered on

⇓ Lights green blinking when the system is in Suspend to RAM.

• Battery Charging LED

Lights to indicate battery in charging status.

⇓ Lights green to indicate that the battery is in charging.
⇓ Lights off to indicate the battery is fully charged or no battery installed.

• Drive Access

When LED in green light indicates that the system is accessing either the
Hard Disk or Combo drive.

• Wireless LAN access

When LED in green light indicates that the wireless LAN module is installed.
When LED in blinking green light indicates that the system is accessing or
retrieving data by wireless device.

• Caps Lock

When LED in green light indicates that the Caps Lock key on the keyboard is
activated. When activated, all alphabet keys typed in will be in uppercase or
capital letters.

1.4.2 The Front Side of the Notebook

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Œ

Cover Switch

Figure 1-8 The Front Side of the Notebook

•

Battery

• Cover Switch

The cover (LCD panel) is locked when it is closed. Slide the button right
aside to release the latch for opening the cover of the computer.

• Battery

The battery pack is inserted here.

•

1.4.3 The Rear Side of the Notebook

The rightt side of the notebook computer offers the features shown in the following figure.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Air-Outlet Vent

Œ

CRT Port

•

Modem Port

’

Figure 1-9 The Rear side of the Notebook

• Air-Outlet Vent

Emits the heat out of your computer and keeps it within operating
temperature.

• DC Power Port

Lets you connect the AC power adapter in supplying continuous power to
your notebook and recharging the battery.

• Air Inhalant

Inhale the air into your computer to keep it within operating temperature.

• Monitor Port

Lets you attach an external monitor or projector for wider display. You can
run the LCD display and the external monitor simultaneously or switch it to
monitor only using the display hot-key.

AC Power Port

•

USB Port

•

Air-Outlet Vent

Ž

LAN Port

‘

• USB Port

The Universal Serial Bus (USB) port allows you to connect up to 127 USB­equipped peripheral devices (for example, printers, scanners and so on) to
your notebook computer.

• LAN Port

An internal 10Base-T/100Base-TX LAN module connects your computer to
other computers/networks through a local area network (LAN).

• Modem Port

A 56K internal fax/data modem is installed. It keeps you connected to the
outside world through networks.

1.4.4 The Left Side of the Notebook

The left side of your notebook computer provides the features shown in the following figure.
To see all the ports located on the left side, you can open the cover first.

Microphone Jack

Œ

PC Card Slot

•

Headphone Jack

•

Figure 1-10 The Left side of the Notebook

Ž

IEEE 1394

11

• Microphone Jack

Allows you to connect an external microphone for monophonic sound
recording directly into your notebook computer.

• Headphone Jack

Lets you plug in a stereo headphone, powered speakers, or earphone set with
1/8 inch phono plug for personal listening.

• IEEE 1394

IEEE 1394 port is a high speed I/O port that can transfer high levels of data
in real-time, such as external hard disk, Digital Video Camera.

• PC Card Slot

⇓ Lets you connect various PC cards such as memory card
⇓ Supports both 3V, 5V 32-bit CardBus and 16-bit PC cards.

1.4.5 The Right Side of the Notebook

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

CD-ROM, DVD-ROM,

Œ

CD-RW module

Figure 1-11 The Right side of the Notebook

Locking Device

•

Keyhole

• CD-RW/DVD Combo Drive

Allows you to load and start programs from a compact disc (CD) or a digital
video disc (DVD) and play conventional audio CDs. It also can make CD by
using CD-R or CD-RW.

• Locking Device Keyhole

Lets you attach a Kensington security system or a compatible lock to secure
your notebook computer.

1.4.6 The Under Side of the Notebook

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Battery Release Latch

Œ

•

Battery Bay

Hard Disk Compartment

Ž

Figure 1-12 Under Side of the Notebook

• Battery Release Latch

Push the latch to the left end to remove the battery pack.

• Battery Bay

Equipped with a choice of Lithium-Ion (Li-Ion) battery pack.

• Hard Disk Compartment

Open this cover of this compartment to replace with other Hard Disk Drive.
Please refer to Chapter 7 for how to replace it.

1.5 Notebook Accessories and System Options

It is also important to understand the accessories that come along with the notebook and the
options for fully utilizing the capabilities of the computer. This section describes briefly what
these accessories and options are.

1.5.1 AC Adapter and Power Cord

The AC Adapter supplies external power to your computer and at the same time charges the
internal battery pack. The AC adapter has an auto-switching design that can connect to any
100VAC ~ 240VAC power outlets. Connect the adapter to the AC wall outlet using the power
cord. You just change the power cord if you are going to use your notebook in other countries
with different connector outlets. When you connect the AC adapter, it charges the battery
whether or not the notebook computer is powered on. There is an LED on the AC adapter to
indicate if DC power is already available.

1.5.2 Battery Pack

Aside from the AC adapter, your computer can also be powered through the internal battery
pack. The battery pack uses rechargeable Lithium-Ion (Li-Ion) battery cells that provide long
computing hours when fully charged and power management enabled. You should always
leave the battery inside your computer even when using the AC adapter as it also acts as a
back-up power supply in case power from the AC adapter is cut off. It is also very important
to have the battery pack always charged to prevent battery cell degradation.

1.5.3 Internal Modem Module

The notebook allows you to insert a proprietary internal 56Kbps-modem card to the notebook
found on the underside of the notebook. The internal modem card supports only fax and data
communication and is V.90-compliant. You connect the telephone line to the RJ-11 jack
found on the rear side of the notebook.

1.5.4 Internal Ethernet LAN Module

This notebook comes with an optional 10Base-T/100Base-TX LAN module that supports data
transfer rates at 10Mbps and can be up to 100Mbps.

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1.5.5 DVD-ROM Drive

Other than the internal CD-ROM drive, the notebook also provides optional factory built-in
DVD-ROM drive. DVD-ROM drives are also backward compatible with CD-ROM, so you
can also use any audio CDs, video CDs, photo CDs, and CD-R. Using a software MPEG­2/DVD program, the notebook can playback any commercial DVD movie titles.

1.6 System BIOS SETUP Program

Your computer is likely to have been properly setup and configured by your dealer prior to
delivery. However, you may find it necessary to use the computer’s BIOS (Basic Input­Output System) Setup program to change system configuration information, such as the
current date and time, or your hard disk drive type. The Setup program can be accessed when

you power on the system and pressing the <F2> function key.

The settings that you specify within the Setup program are recorded in a special area memory

called the CMOS RAM. This memory is backed up by a battery so that is will not be erased

when you turn off or reset the system. Whenever you turn on the computer, the system will
read the settings stored in the CMOS RAM and compare them to the equipment check
conducted during the Power On Self Test (POST). If an error occurs, an error message will be
displayed on the screen, and you will then be prompted to run the Setup Program.
As the POST (Power-On Self Test) executes during the boot up process, the screen will
display the following message:

Press <F2> to Enter SETUP

Press the <F2> key to run the BIOS Setup program. The BIOS Setup program is organized
into five menus which you can select using the ß and à keys. To move from one option to

another, you use the up and down arrow keys while using the <F5> and <F6>, or <+>and <->
keys to change the settings. On the right hand side of the screen are some brief help
descriptions of each item you want to change.
On the BIOS Setup program, you will find the following parts on the screen:

• Item Specific Help

The right side of the screen. This area describes each parameter and its
available settings.

• Menu Bar

The top line of the screen. Each of the five selections displays its own screen.

• Parameters

The left side of the screen. This area lists the parameters and their current
settings.

• Key Status Bar

The bottom part of the screen. These lines display the keys available to move

the cursor, select a particular function and so forth.
To exit the BIOS Setup program, simply press the <Esc> key and select from the Exit menu
whether you want to Save changes and exit; Discard Changes and exit.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

1.6.1 Using the Main Menu Setup

PhoenixBIOS Setup Utility

Main Advanced Security Boot Exit

Item Specific Help
System Time: [12 :00 :00] <Tab>, <Shift-Tab>,

System Date: [05/20/2002] or <Enter> selects
Language: [English (US)] field.

Legacy USB Support: [Enabled]
Internal HDD: [20004MB]

4

Internal DVD/CD-ROM Installed

Boot Display Device: [Both]

System Memory: 640 KB
Extended Memory: 114687 KB
CPU Type: Celeron (TM)
CPU Speed: 1066 MHz
BIOS Version: 0.3C-0022-0713

F1 Help

Esc Exit

Select Item -/+ Change Values F9 Setup Defaults

á â

Select Menu Enter Select 4Sub-Menu F10 Save and Exit

ßà

• System Time

Allows you to change the system time using the hour:minute:second format
of the computer.
Enter the current time for reach field and use the <Tab>, <Shift>+<Tab>, or
<Enter> key to move from one field or back to another.
You can also change the system time from your operating system.

• System Date

Allows you to set the system date using the month/date/year format.
Enter the current time for reach field and use the <Tab>, <Shift>+<Tab>, or
<Enter> key to move from one field or back to another.
You can also change the system time from your operating system.

• Language

This field shows the Language version of the BIOS.

• Legacy USB Support

Allow you to select the Enabled or Disabled option for enabled or disabled
the USB port.

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

• Internal HDD

This field displays various parameters for the hard disk drive. If type [Auto]

is selected, the system automatically sets these parameters. If type [User] is

selected, Cylinders, Heads and Sectors can be edited.

• Internal DVD/CD-ROM

This field is for information only as the BIOS automatically detects the CD-

ROM/DVD-ROM.

• Boot Display Device

Lets you select the display device.

• System Memory

This field reports the amount of base (or conventional) memory found by the

BIOS during Power-On Self-Test (POST).

• Extended Memory

This field reports the amount of extended memory found by the BIOS during

Power-On Self-Test (POST).

• CPU Type

This field reports the CPU type information detected by the BIOS during

Power-On Self-Test (POST).

• CPU Speed

This field reports the CPU speed information detected by the BIOS during

Power-On Self-Test (POST).

• BIOS Version

This field is for information only as the BIOS displays the BIOS version

during the Power-On Self-Test (POST).

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

1.6.2 Internal HDD Sub-Menu

PhoenixBIOS Setup Utility

Main Advanced Security Boot Exit

Internal HDD: [20004MB] Item Specific Help

Type: [Auto] User = you enter
parameters of hard­ Multi-Sector Transfers: [16 Sectors] disk drive installed
LBA Mode Control: [Enabled] at the Connection.
Auto = autotypes
32 Bit I/O: [Disabled] Hard-disk drive
Transfer Mode: [FPIO 4/DMA 2] installed here.
SMART Monitoring: Enabled None = no device is
Ultra DMA Mode: [Mode 5] installed here.

CD-ROM = a CD­ ROM drive is
installed here.

F1 Help

Esc Exit

Use the Type field to select the drive type installed. You can select different drive types as

CD-ROM, User, Auto, or None by pressing <Space> bar. Set this option to Auto so your

computer will automatically detect the drive type during power on. Set this option to None

when your computer is not installed any devices. Press <Esc> to return to the Main Menu.

Select Item -/+ Change Values F9 Setup Defaults

á â

Select Menu Enter Select 4Sub-Menu F10 Save and Exit

ßà

1.6.3 Using the Advanced CMOS Setup

PhoenixBIOS Setup Utility

Main Advanced Security Boot Exit

Item Specific Help

PS/2 Mouse: [Enabled] ‘Disabled’ prevents any
LCD Panel View Expansion: [Enabled] installed PS/2 mouse
from functioning, but
Silent Boot: [Enabled] frees up IRQ12.
Frame Buffer Size: [16 MB] 'Enabled' allows the
operating system to
I/O Device Configuration determine whether to

4

enable or disable the
mouse

F1 Help

Esc Exit

Select Item -/+ Change Values F9 Setup Defaults

á â

Select Menu Enter Select 4Sub-Menu F10 Save and Exit

ßà

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• PS/2 Mouse

[Enable] allows the OS to enable or disable the PS/2 mouse when it is

detected. [Disabled] prevents any installed PS/2 mouse from functioning.

• LCD Panel View Expansion

Expands or keeps the original LCD Screen View during the booting

procedure. Expands may get full screen LCD display, however, it degrades

the graphic/text quality.

• Silent Boot

Lets you specify the boot screen as Logo screen, POST screen, or Black

screen by choosing Enabled, Disabled, or Black option, respectively.

• Frame Buffer Size:

Lets you specify the sharing memory size of the Video chip from SDRAM.

The Default sharing size is 16MB. You should carefully specify the value,

since while the set value is too high, the memory size of your software

application will be reduced.

• I/O Device Configuration

Lets you configure input/output device such as Serial Port, Parallel Port, and

Floppy disk controller.

I/O Device Configuration Sub-Menu

Main Advanced Security Boot Exit

Serial port A: [Auto] Configure serial port A
Infrared port: [Enabled] using options:
Mode: [IrDA] [Disabled]
Base I/O address: [2E8 IRQ3] No configuration,
Parallel port: [Auto]
Mode: [EPP] [Enabled]
User configuration
Floppy disk controller: [Disabled]
[Auto]
BIOS or OS chooses
configuration

F1 Help

Esc Exit

á â
ßà

PhoenixBIOS Setup Utility

I/O Device Configuration Item Specific Help

Select Item -/+ Change Values F9 Setup Defaults
Select Menu Enter Select 4Sub-Menu F10 Save and Exit

• Serial port

You can select the Enabled, Disabled, or Auto option for enabled or disabled

the port, or automatically sensed by BIOS or OS. If you select Enable, you

also need to set the parameter of Base I/O address and IRQ.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

• Infrared port

You can select the Enabled, Disabled, or Auto option for enabled or disabled
the port, or automatically sensed by BIOS or OS. If you select Enable, you
also need to set the IR mode, Base I/O and IRQ for the IR device.

• Mode

This field is for information only as the BIOS displays the IR device type of
this notebook.

• Parallel port

Allows you to select the Enabled, Disabled, or Auto option for enabled or
disabled this port, or automatically sensed by BIOS or OS. If you select
Enable, you also need to set the parameter of Base I/O address.

• Mode

Allows you to select a parallel mode as Uni-directional, EPP or ECP when
the parallel port is configured.

• Floppy disk controller

This field is for information only as the BIOS displays the floppy disk
controller of this notebook.

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1.6.4 Security Menu Setup

Main Advanced Security Boot Exit

Item Specific Help

Set Supervisor Password [Enter] Supervisor Password
Set User Password [Enter] controls access to the
setup utility.
Password on boot [Disabled]
Fixed disk boot sector [Normal]
Diskette access [Supervisor]

F1 Help

Esc Exit

Select Item -/+ Change Values F9 Setup Defaults

á â

Select Menu Enter Select 4Sub-Menu F10 Save and Exit

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

PhoenixBIOS Setup Utility

• Set Supervisor Password

Supervisor password gives you the authority in accessing the setup utility.

You also need to enter this password in system booting and resuming from

suspend mode. When you press <Enter> in this field, the Set Supervisor

Password dialog box appears. Enter a new password with up to 8 alpha-

numeric characters, and then re-enter it for confirmation.

• Set User Password

This field is only available when Supervisor Password has set. Enter the user

password when boot the system or resume from suspend mode. But if the

Write Protect is set in the Fixed disk boot sector field, you should enter a

supervisor password to access the fixed disk when boot the system or resume

from suspend mode.

• Password on Boot

If you set this field to Enabled, your computer will always ask for the

password every time you boot your computer.

• Fixed Disk Boot Sector

If you set this field to Write Protect, the write protect boot sector on hard disk

will protect against viruses. In this situation, only the supervisor can access

the Boot Sector of fixed disk.

• Diskette Access

If you set this field to Supervisor, only the supervisor can access to the

diskette drives. If you set to User, both the supervisor and user can access to

the diskette drives.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

1.6.5 Using the Boot Setup

This item allows you to set the search drive sequence where the system will try to boot up
first.

PhoenixBIOS Setup Utility

Main Advanced Security Boot Exit

Item Specific Help

Removable Devices Use <á> or <â> to

+Hard Drive select a device, then

CD-ROM Drive press <+> or <-> to move

the device up or down

<Enter> expands or

collapses device.

F1 Help

Esc Exit

To select the boot device, you can use the up or down arrow key, then press <+> to move up
the device in the list or press <-> to move down the device in the list. To exit from this menu,
press <Esc>.

Select Item -/+ Change Values F9 Setup Defaults

á â

Select Menu Enter Select 4Sub-Menu F10 Save and Exit

ßà

1.6.6 How to Exit the Setup Program

There are two choices to escape from the Setup program.

PhoenixBIOS Setup Utility

Main Advanced Security Boot

Item Specific Help

Exit Saving Changes

Exit Discarding Changes

Load Setup Defaults changes to CMOS.

Discard Changes

Save Changes

Battery Refresh

F1 Help

Esc Exit

• Exit Saving Changes

Saves all changes to CMOS while running the BIOS setup program and exit
from the system setup program.

Select Item F5/F6 Change Values F9 Setup Defaults

á â

Select Menu Enter Execute Command F10 Save and Exit

ßà

Exit

Exit System Setup
and save your

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

• Exit Discarding Changes

Allows you to discard all changes made while running the BIOS setup

program and exit from the system setup program.

• Load Setup Defaults

Lets you load the default values for all setup items.

• Discard Changes

Reverts to previously selected settings.

• Save Changes

Saves Setup data to CMOS.

• Battery Refresh

Conditions the battery so that the battery can be fully charged.

1.6.7 How to Upgrade the BIOS

Your computer uses EPROM Flash BIOS chip that allows you to easily upgrade the BIOS
program. When you update the BIOS, any customized settings you made are lost.
To upgrade the BIOS:

1. Insert the BIOS Update diskette into the diskette drive.

2. Power on the system with the diskette in the diskette drive.

3. On the DOS prompt, type the following command.

A:\>Phlash XXXXXX.ROM (BIOS filename) or

A:\>XXXXXX.BAT (Batch file for BIOS file)

4. Press <Enter> to run this BIOS utility. After the system has been successfully

run this program, a message similar to the following appears:

Flash memory has been successfully programmed, press any key to restart the
system. If the system does not restart, turn it off, then turn on again.

5. Press any key to restart this system.

Contact your dealer for the latest BIOS update file.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Installation and Upgrade

2.1 Overview

This chapter provides guidelines on installing the device drivers for the built-in features of the
Cavaliere 142. Most of the driver installation procedures mentioned here are only for and Windows
XP. This chapter also includes procedures on how to upgrade major internal system
components like CPU, memory, hard disk, and feature card modules.

2.2 Notebook Drivers and Utilities

The notebook requires several device drivers that you need to install and setup before you can
fully operate the notebook. These are:

• Intel 855GM VGA Driver – Windows XP

ALC201A Audio Driver – Windows XP

•

• Synatics Touch Pad Driver – Windows XP

Montara-GM Chipset Driver – Windows XP

•

• Easy Button PRO utility – Windows XP

Ambit MDC Modem – Windows XP

•

• Intel 562EZ LAN driver– Windows XP

Intel Wireless LAN driver – Windows XP

•

Audio Volume Status utility

•

Intel Wireless LAN utility

•

i Visit Prestigio website http://www.prestigio.com for the latest

driver updates.

2.2.1 Installing Windows XP from CD / DVD ROM

This section provides Windows XP installation guide from the CD-ROM or DVD-ROM
device.

Installing Windows XP from CD-ROM / DVD-ROM

To install Windows XP directly from your CD-ROM, insert the Windows XP installation CD
into CD-ROM drive with following the instructions on the screen to finish the installation.

You could go to Boot menu of BIOS setup menu to confirm the priority of boot device. Use
arrow key to select "ATAPI CD-ROM Drive", and then use "+" or "-" to move it to the top.
Go to Exit menu and select “Exit Saving Changes”.

2.2.2 Installing the VGA Device Driver

Your notebook computer uses the high-performance Intel 855GM VGA controller, which is
an AGP 4x video local bus, 2D/3D Graphic Engine. Following is the procedure for installing
the VGA Driver for Windows XP :

Installing VGA Driver for Windows XP

1. Click the Start button, then point to Settings, and click Control Panel.

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2. Double-click on the System icon, Hardware, and then click on the Device Manager

folder tab.

3. Under the Other Devices line, you will find the Video Controller (VGA compatible),
click Uninstall, OK, and then Scan for Hardware Changes buttons to appear the New
Hardware Found Message Box.

4. In the Found New Hardware Wizard message box which shows searching

Controller (VGA compatible) driver. Click Next to proceed the further step.

5. Select "Search for a suitable driver for my device", and click Next.

6. Tick on "Specify a location box", then, click Next and Browse buttons, and then
navigate to the VGA driver location as "\Drivers\ WinXP\VGA".

7. Click OK and Next to begin searching the driver. Click Next to continue installing the

driver.

1. Click

button to finish installing VGA driver and Click

Finish

to restart the computer.

Yes

Video

2.2.3 Installing the Audio Device Driver

Your notebook computer uses Realtek Audio controller.

Installing Audio Driver for Windows XP

1. Click the Start button, then point to Settings, and click Control Panel.

2. Double-click on the System icon, Hardware and then click on the Device Manager

folder tab.

3. Under the Other Devices line, you will find the Multimedia Audio Controller, click

Uninstall, OK, and then Scan for hardware changes buttons to appear the New
Hardware Found Message Box.

4. In the Found New Hardware Wizard message box which shows searching Multimedia
Audio Controller driver. Click Next to proceed to the next step.

5. Select

6. Tick on "Specify a location box", then click Next and Browse buttons, and navigate to

7. Click OK and Next to begin searching the driver. The Add New Hardware will found

8. Click Yes to continue installing the driver. Click Finish button to finish installing Audio

"Search for a suitable driver for my device"
the Audio driver location as "\Drivers\ WinXP\Audio".
Intel ALC201A Audio.

driver.

, and click

Next

.

2.2.4 Installing Touch Pad Driver

Following is the procedure for installing Synaptics touch pad driver.

Installing Touch Pad Driver for Windows XP

1. Boot Windows from your hard disk and insert the diskette containing touch pad driver.

2. Click the

navigate to the directory as "\Driver\WinXP\Touch Pad\setup.exe", path according to
your Operating System and run "Setup.exe".

3. Execute the setup program and then select the language for this installation. After that, a

Welcome dialog box appears.

4. Click Next continuously three times when the screen appears the Next button.

5. Click OK to restart your system.

button, then click

Start

. In the Run dialog box, click

Run

Browse

button and

2.2.5 Installing Internal Modem Device Driver

Your notebook computer may come with an optional internal modem. The internal modem is
a 56Kps V.90 Ambit MDC modem.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Installing Internal Modem for Windows XP

1. Boot Windows from your hard disk and insert the disc containing the Modem driver for
Windows.

2. Click the

and navigate to the directory as "\driver\WinXP\MODEM\setup.exe" where the

modem driver is located.

3. Click OK to process the installation of modem driver. Follow the instruction to finish

the installation.

4. With “Yes, I want to restart my computer now” selected, click Finish to complete the

modem installation.

button and then click

Start

. In the Run dialog box, click

Run

Browse

button

2.2.6 Installing Internal LAN Device Driver

Your notebook computer may come with an optional internal LAN, which uses the Intel
562EZ chip. Please follow the procedures below for installing the LAN driver:

Installing Internal LAN for Windows XP

1. Click the Start button, then point to Settings, and click Control Panel.

2. Double-click on the System icon, Hardware and then click on the Device Manager

folder tab.

3. Under the Other Devices line, you will find the Ethernet Controller, click Uninstall,
OK, then Scan for hardware changes buttons to appear the New Hardware Found

Message Box.

4. In the Found New Hardware Wizard message box which shows searching

Controller driver. Click Next to proceed to the next step.

5. Select "Search for a suitable driver for my device", and click Next.

6. Tick on "Specify a location box". Then, click Next and Browse buttons and navigate to
the LAN driver location as "\Drivers\WinXP\LAN". Click OK and Next to begin

searching the driver.

7. The Add New Hardware will found Intel Fast Ethernet . Click Yes to continue installing

the driver.

Click Finish button to finish installing LAN driver.

Ethernet

2.2.7 Installing EzButton Driver

Following is the procedure for installing Easy Button driver.

Installing Easy Button driver for Windows XP

1. Boot Windows from your hard disk and insert the disc containing the Easy Button driver.

2. Click the Start button, then click Run. In the Run dialog box, click Browse button and

navigate to the directory as "\Drivers\WinXP\Easy Button\Ez Button.exe".

3. Run the execution file for installing the Easy Button driver, and then click

complete the installing procedure.

Finish

after

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2.3 System Upgrades

This section provides an easy step in doing system upgrades for your notebook computer.

2.3.1 Jumper Settings

This section provides a jumper setting lists of configuring the notebook.

DSW1

Keyboard Type Select

K/B Type Pos #1 POS #2

US KEYBOARD OFF OFF

JP KEYBOARD ON OFF

UK KEYBOARD ON ON

DVDSEL

ODD select Pos #5

KME UJDA745 DVD/CD-RW

Combo

BIOS Crisis

BIOS Crisis Pos#4

Default OFF

BIOS Crisis ON

Password Override ( CMOS / RTC Data ) Jumper Setting

CMOS clear select Pos#6

RTC Battery Normal OFF

Clear (RTC) DATA ON

ON

Figure 2-1 Location of DSW1

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

2.3.2 CPU Upgrade Procedure

The Cavaliere 142 features Mobile Intel Pentium-M FCPGA Processors. It is located on the upper
right side of the system motherboard.

How to Access the CPU Socket

To install or replace the CPU, follow the steps below:

1. Turn off the system and remove both AC adapter and the battery pack from the notebook
unit.

2. There are four screws on the bottom case and that should be removing as the picture
indicated.

Figure 2-2 Location of screws

3. Remove keyboard cover by gently bending it and sliding it towards in front of you.

Figure 2-3 Remove keyboard Cover

4. Lift the keyboard and tilt it towards the LCD panel.

5. Release keyboard cable by sliding the ZIF connector towards up direction.

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Figure 2-4 Remove keyboard

6. Release two screws as shown in the picture below, and then remove Middle plate.

Figure 2-5 Remove Middle plate

7. Release four screws and one cable as shown in the picture below, and then remove heat
sink plate and Fan.

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Figure 2-6 Remove heat sink plate and Fan

8. Use a flat screwdriver to unlock CPU.

Figure 2-7 Remove CPU

9. Remove CPU and insert the preferred CPU.

10. Use a flat screwdriver to lock CPU.

11. Place back the heat plate and keyboard cover. Boot on the computer, and then BIOS will
automatically detect the type of the CPU which just be installed.

2.3.3 Memory Upgrade Procedure

The notebook computer offers two memory slot using DDR DIMM at 128MB, 256MB,
512MB and 1024MB DDR-RAM. Two memory slots are found inside the memory
compartment. The memory compartment is located on the underside of your computer inside
the memory compartment. With two memory slots, you can have several combinations up to
2048MB.

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Using the Memory Slot inside the Memory Compartment

Follow the steps below on how to upgrade the memory modules:

1. Make sure the system is powered off and that no peripheral devices are attached.

2. Turn the system over and locate the screw on the memory compartment.

3. Remove the K/B cover, K/B and Middle plate.

4. Locate the memory module socket. Align the notch with the notch in the socket connector
and insert the module as follows:

Hold the DIMM at a 60-degree angle and align the DIMM connector with the

−

socket in the system. Push the connector into the socket.

− Press down on the edge of the DIMM until the locking tabs on the sides snap into

place, securing the module.

5. To remove a DIMM, press the locking tabs away from the sides of the module until the
module pops up. Then, remove the DIMM.

6. Reassemble the notebook components as follows.

Put the DIMM door back.

−

− Replace the screw and turn the system over.

2.3.4 Hard Disk Upgrade Procedure

The notebook provides a built-in hard disk for the primary IDE controller. The HDD is an
industry standard 2.5” IDE disk drive and can be upgraded with another standard 2.5” HDD.

1. Make sure the system is powered off and that no peripheral devices are attached.

2. Remove the four screws.

Figure 2-8 Remove HDD module

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

3. Remove the HDD module from the base unit.

4. Remove four screws of frame HDD bracket plate.

Figure 2-9 Screws Locations of the frame HDD bracket plate

2.3.5 System BIOS Upgrade Procedure

The notebook supports EPROM Flash BIOS that allows you to easily update the system BIOS

using the Phoenix BIOS Flash utility program called “PHLASH.COM”. This program runs
under MS-DOS and requires the system not to load high memory like HIMEM.SYS. It also
needs the “PLATFORM.BIN” file in order to activate.

Follow the steps below on how to update the system BIOS:

1. Prepare a clean bootable diskette without loading the HIMEM.SYS. Copy the files

PHLASH.COM and PLATFORM.BIN into the diskette along with the BIOS ROM file.

Restart the computer and boot from the diskette. At the DOS prompt, type the command

2.

“PHLASH <BIOSfile.ROM>” to activate Flash BIOS programming utility. The

computer will then start to update the system BIOS inside the notebook.

3. After programming is complete, the system will prompt you to press any key to shutdown

the computer. The BIOS version is displayed inside the BIOS Setup Main menu. Press
<F2> after power on to run CMOS Setup program.

BIOS Version : 1.0A-0716-0724

i It is very important not to power off the system whenever the FLASH BIOS

program is running. Otherwise, the system may not be able to power on and you
need to replace the BIOS EPROM chip from another working notebook.

i Always plug in the AC adapter when updating the BIOS.

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Software Functional Overview

3.1 Overview

The is an IBM PC/AT compatible Notebook PC, which supports the Intel Micro­PGA Pentium M CPU processors family. The following are the major features that Cavaliere
142 supports.

Microsoft PC99 logo and Win XP logo approval.

§

Offer 1024x768 XGA display with 13.3 XGA LCD panel.

§

§ Support ACPI 1.0B (or above).

§ Support PCI 2.1 (or above).

§ Support AGP 2.0.

Support SMBIOS 2.3.

§

Support DDR266/200 SDRAM.

§

Support 100/133 Mhz CPU front side bus.

§

3.2 Summary of the BIOS Specification

The summary of the BIOS specification is as the below description:

Controller Chip Description

Shadow Always enable VGA and System BIOS shadow
Display

Hard Disk

Multi Boot Allow the user to select boot from FDD, HDD and CD-ROM
Plug and Play Support PnP Run Time Service and conflict-free allocation of

Smart Battery Support BIOS interface to pass battery information to the

Keyboard Controller Support Fn hot keys, one Win95 hot keys, built-in Glide Pad.
PCMCIA Compliant with PCMCIA 2.1 specification

§ System auto detects LCD or CRT presence on boot and lid

closed.

§ Support Panning while LCD in a display resolution greater

than supported.

§ Support Microsoft Direct 3D.

§ Support AGP 4x BUS.

§ Enhanced IDE spec.

Support auto IDE detection.

§

§ Support LBA mode for larger capacity HDD.

§ Support Ultra DMA 33/66/100.

§ Support Fast PIO mode 1-4 transfer.

§ Support 32 bit PIO transfer.

§ Support Multi-Sector transfer.

§ Support SMART monitoring.

resource during POST

application via SMBus

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Power Management
Support (ACPI Mode)

The power management is compliant with ACPI 1.0B

specification and supports the following power state:

§ S0 (Full-On) Mode

§ S3 (STR) Mode

§ S4 (STD) Mode

§ S5 (Soft-Off) Mode

3.3 Subsystem Software Functions

This section provides introduction on the software functions of the notebook subsystems and
BIOS related function.

3.3.1 Key Chipset Summary

Following are the main chipsets used in the notebook:

Controller Chip Vendor Description

Processor
North Bridge
South Bridge
Video Controller
PCMCIA Controller
Audio Chip
Audio Codec
Keyboard Controller
PMU Controller
ROM BIOS
Clock Generator
Temperature Sensor
IEE 1394

LAN

Modem

Intel Mobile Banias
Intel Montara GM
Intel ICH4
Intel Embedded in Montara GM
RICOH R5C551
Intel South Bridge Integrated
Intel ICH4
Misubishi M3885x
NEC PMU08
SST 49LF004A
IMI CY28346
NS MAX6690
RICOH R5C551

Intel ICH4

Intel MDC AC’97

3.3.2 System Memory

The system memory consists of SDRAM memory on 64-bit bus and the module size options
are 128/256/512/1GMB upward. The BIOS will automatically detect the amount of memory
in the system and configure CMOS accordingly during the POST (Power-On Self Test)
process. This must be done in a way that requires no user interaction.

Base SO-DIMM DRAM

slot

Expansion SO-DIMM DRAM

slot

Total Size

(Bank 0&1) (Bank 2&3)

NIL 128MB 128MB

NIL 256MB 256MB

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NIL 512MB 512MB

128MB NIL 128MB

128MB 128MB 256MB

128MB 256MB 384MB

128MB 512MB 640MB

256MB NIL 256MB

256MB 128MB 384MB

256MB 256MB 512MB

256MB 512MB 768MB

512MB NIL 512MB

512MB 128MB 640MB

512MB 256MB 768MB

512MB 512MB 1024MB

3.3.3 Video

The Video subsystem used External DDR memory of Video memory. The system will
support the true ZV port, the Microsoft Direct 3D assist, simultaneous display, monitor
sense for auto display on boot and VESA Super VGA function call.

Supported Video Mode

The following is the display modes supported by the SIS Mobility Video control in
LCD only, CRT only, and simultaneous mode. The VGA BIOS will allow mode sets of
resolutions greater than the panel size but only show as much mode display as will fit
on the panel.

Supported standard VGA modes:

The VGA BIOS supports the IBM VGA Standard 7-bit VGA modes numbers.

Mode Pixel Resolution Colors Memory

00h/01h 40*25 16 Text

02h/03h 80*25 16 Text

04h/05h 320*200 4 2-bit Planar

06h 640*200 2 1-bit Planar

07h 80*25 Mono Text

0Dh 320*200 16 4-bit Planar

0Eh 640*200 16 4-bit Planar

0Fh 640*350 Mono 1-bit Planar

10h 640*350 16 4-bit Planar

11h 640*480 2 2-bit Planar

12h 640*480 16 4-bit Planar

13h 320*200 256 8-bit Planar

Note: All Standard VGA Modes are limited to the standard VGA refresh rates.

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Supported extended video modes:

CRT device will support all listed VESA mode; and other devices such as PANEL & TV may
be limited to the mode support due to their characteristics.

VESA

Mode

100h 640 x 400 8-bit Packed 70 2MB

101h 640 x 480 8-bit Packed 60, 72, 75, 85 2MB

102h 800 x 600 4-bit Planar 60, 72, 75, 85, 100 2MB

103h 800 x 600 8-bit Packed 60, 72, 75, 85, 100 2MB

104h 1024 x 768 4-bit Planar 43(I), 60, 70, 75, 85, 100 2MB

105h 1024 x 768 8-bit Packed 43(I), 60, 70, 75, 85, 100 2MB

106h 1280 x 1024 4-bit Planar 43(I), 60, 75, 85

107h 1280 x 1024 8-bit Packed 43(I), 60, 75, 85

10Eh 320 x 200 16-bit Packed 70

10Fh 320 x 200 32-bit Unpacked 70

111h 640 x 480 16-bit Packed 60, 72, 75, 85

112h 640 x 480 32-bit Unpacked 60, 72, 75, 85

114h 800 x 600 16-bit Packed 60, 72, 75, 85, 100

115h 800 x 600 32-bit Unpacked 60, 72, 75, 85, 100

117h 1024 x 768 16-bit Packed 43(I), 60, 70, 75, 85, 100

118h 1028 x 768 32-bit Unpacked 43(I), 60, 70, 75, 85, 100

11Ah 1280 x 1024 16-bit Packed 43(I), 60, 75, 85

11Bh 1280 x 1024 32-bit Unpacked 43(I), 60, 75, 85

11Dh 640 x 400 16-bit Packed 70

11Eh 640 x 400 32-bit Packed 70

120h 1600 x 1200 8-bit Packed 48(I), 60, 75, 85

122h 1600 x 1200 16-bit Packed 48(I), 60, 75, 85

124h 1600 x 1200 32-bit Unpacked 48(I), 60, 75, 85

12Ah 640 x 480 24-bit Packed 60, 72, 75, 85

12Bh 800 x 600 24-bit Packed 60, 72, 75, 85, 100

12Ch 1024 x 768 24-bit Packed 43(I), 60, 70, 75, 85, 100

12Dh 1280 x 1024 24-bit Packed 43(I), 60, 75, 85

12Eh 320 x 200 8-bit Packed 70

131h 320 x 200 8-bit Packed 72

133h 320 x 200 16-bit Packed 72

134h 320 x 200 32-bit Packed 72

13Bh* 1400 x 1050 8-bit Packed 60, 75

13Ch* 1400 x 1050 16-bit Packed 60, 75

13Eh* 1400 x 1050 32-bitUnpacked 60, 75

Pixel

Resolution

Memory Model Refresh Rates In (Hz) Minimum

Memory

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

4MB

4MB

8MB

2MB

2MB

2MB

4MB

8MB

2MB

2MB

4MB

4MB

2MB

2MB

2MB

2MB

2MB

4MB

8MB

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TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

141h 400 x 300 8-bit Packed 72

143h 400 x 300 16-bit Packed 72

144h 400 x 300 32-bitUnpacked 72

151h 512 x 384 8-bit Packed 70

153h 512 x 384 16-bit Packed 70

154h 512 x 384 32-bitUnpacked 70

171h 720 x 480 8-bit Packed 75

173h 720 x 480 16-bit Packed 75

174h 720 x 480 24-bit Packed 75

175h 720 x 480 32-bitUnpacked 75

176h 720 x 576 8-bit Packed 75

178h 720 x 576 16-bit Packed 75

179h 720 x 576 24-bit Packed 75

17Ah 720 x 576 32-bitUnpacked 75

Note: “*” The modes may not be available. Their availability should be determined by VESA
function calls.

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

2MB

Panel Type Initialization

The VGA BIOS will issue INT 15h function call during POST. This function call
allows the system BIOS to specify the panel type to the VGA BIOS. The system BIOS
should get the panel type from GPIO pins before the VGA chip initialized, and pass
this information to VGA BIOS through INT 15 Function 4E00h.

LCD Panel ID pin Definition:

VT82C686B GPI Pins

GPI
[23]

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

GPI

[17]

GPI

[11]

GPI
[10]

Panel Type

ID0

ID1

ID2

ID3

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TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

1 1 0 1

1 1 1 0

1 1 1 1

3.3.4 Enhanced IDE

The system BIOS must be ready to support 4 IDE devises on two controllers. The BIOS
support Ultra DMA33/66/100 and also supports automatic configuration of drives using
both the LBA and CHS large drive remapping method. In addition to supporting
standard drives through an auto-configuration process that does NOT require user
involvement or confirmation. The system should automatically do this at POST time in a
way that is transparent to the user. If a drive is connected to the bus, the drive should be
automatically recognized, configured and available for use under MS-DOS 6.2x.

3.3.5 Audio

The audio subsystem will support the requirements identified by the AC’97 specification.
Both software and hardware will control the volume level for the internal audio subsystem. In
addition to the volume control, the user will be able to mute the sound to completely cut off
the volume using both software and hardware.

3.3.7 PCMCIA

The PCMCIA controller chip of the notebook provides the following features:

• Individually accessed, dual-buffer implementation

Support for 2 separate CardBus slots (one type III or two type II stacked)

•

• Support for 3.3v, 5v and 12v (flash programming) cards

3.3.8 LED Indicator

The table below lists down the functions of the Status LED indicator:

Indicator Function Description

IDE accessing LEDΠThis LED will turn on while accessing the IDE Device.

Battery Charging LED Turn on (Blue) – Battery is under charging mode

Turn off – Battery full charged or no battery

CapsLock LEDΠThis LED will turn on when the function of CapsLock is active.
ScrollLock LEDΠThis LED will turn on when the function of ScrollLock is active.
NumLock LEDΠThis LED will turn on when the function of NumLock is active.

Power Status LED Blue – System is powered on.

Blue Blinking- System is entered suspend mode.
Trun off – Battery Low.

Mail LEDΠThis LED will turn on while Mail was arrived.

i

Π- These LEDs will be turned off during Suspend mode.

37

170~177, 1F0~1F7,

220~22F, 300~301,

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

3.3.9 Hot Keys Definition

All Hot keys must be active at all times under all operation systems.

Function Function Handler

Fn + F3 Toggle Display (LCD/CRT/TV/LCD&CRT) BIOS Handler

Fn + F2 RF ON/OFF BIOS Handler

Fn + F6 System Speaker On/Off BIOS Handler
Fn + F8 Brightness Increase Controlled by PMU08
Fn + F9 Brightness Decrease Controlled by PMU08
ScrLock Scroll Lock
Internet
Button
Mail Button Mail Function Key Controlled by Driver

Internet Function Key Controlled by Driver

3.3.10 Plug & Play

The BIOS supports the Plug and Play Specification 1.0A. (Include ESCD)
This section describes the device management. The system board devices and its resources are
as follows:

Device Connect

Type
I/O IRQ DMA Memory
DMA Controller Static 00~0F, 81~8F - DMA5 ­Interrupt Controller Static 20~21, A0~A1 IRQ2 - ­System Timer Static 40~43 IRQ0 - ­RTC Static 70~71 IRQ8 - ­ISA Bus Static - - - ­System Speaker Static 61 - - ­System Board Static - - - E0000~FFFFF
PnP Mother Board Static 80 - - ­Keyboard Controller Static 60, 64 IRQ1 - ­PMU08 Controller Static 68, 6C - - ­Math Coprocessor Static F0~FF IRQ13 - ­Glide Pad Static - IRQ12 - ­Video Controller Static 3B0~3BB,

Dual IDE Controller Static

CardBus Controller Dynamic 3E0~3E1 IRQ10 - ­Audio chip Dynamic

IEEE1394 Dynamic IRQ10
Modem Dynamic 3E8~3EF IRQ10 - ­LAN Dynamic 1080~10FF IRQ10 - ­USB Host Controller Dynamic EF80~EF9F IRQ5 - -

Resources

IRQ5 - A0000~BFFFF

3C0~3DF

IRQ14, 15 - -

3F6

IRQ5 DMA3 -

388~38B

,
C0000~CFFFF

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3.3.11 PCI Device

The table below summarizes the PCI IDSEL Pin Allocation:

IDSEL Pin PCI Device
Device Number Function

Number
AD23 Device 07 Function 0 RICOH Card Bus
Function 1 RICOH IEEE1394
AD17 Device 01 Function 0 MINI PCI

The table below summarizes the INT Pin Allocation:

INT Pin PCI Device
INTA CardBus/MiniPCI/LAN
INTB Cardbus/MiniPCI
INTC
INTD

The table below summarizes the PCI bus master Allocation:

Device Name

Arbiter Signal Agents

(Master)

REQ00/GNT00

REQ20/GNT20

REQ30/GNT30

REQ10/GNT10 RICOH Card Bus Controller

Function Use

3.3.12 SMBus Devices

The SMBus is a two-wire interface through which the system can communicate
with power-related chips. The BIOS should initialize the SMBus devices during
POST.

ICH4 SMBus Connection Devices

SMBus Device Host/Slave Address BIOS Need to Initialization
SO-DIMM Slave A0h/A2h Memory Auto Sizing (SPD).

CY28346
CLK Generator

Slave D2h Program the desired clock frequency

(Pin23 output 24MHz, Pin22 output
48MHz)

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PMU 08 SMBus Connection Devices

SMBus Device Host/Slave Addres

s
A7 ~

A1
PMU08 Master 10h Enable PS01 decode interface
MAX6690 (Thermal

Slave 9Ch Program the desired temperature
sensor)
Battery (1st Battery) Slave A8h No Need

I/O Map

Hex Address Device
000 - 01F 8237-1
020 - 021 8259-1
022
040 - 05F 8254
060 - 064 Keyboard Controller
068 – 06C PMU08 Controller
070 - 07F RTC & NMI Mask
080 - 08F DMA Page Registers
092 System Control Port
0A0 - 0A1 8259-2
0B2 Advanced Power Management Control Port
0B3 Advanced Power Management Status Port
0C0 – 0DF 8237-2
0F0 – 0FF Math Coprocessor
170 - 177 IDE Secondary Command Block
1F0 - 1F7 IDE Primary Command Block
220 - 22F Sound Blaster
279 ISA PnP Address
330 - 333 MIDI
376 IDE Secondary Control Block
388 - 38B FM Synthesizer
3B0 - 3DF Video Controller
3E0 - 3E1 PCMCIA Controller
3F0 - 3F5, 3F7 Floppy Disk Controller
3F6 IDE Primary Control Block
A79 ISA PnP Address
CF8 – CFF PCI BUS configuration Register

ISA DMA Map

DMA Channel Device
DMA 0 Unused
DMA 1 Unused
DMA 2 Floppy Disk
DMA 3 Audio

BIOS Need to Initialization

range

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DMA 4 Unused
DMA 5 Unused
DMA 6 Unused
DMA 7 Unused

Memory Map

Address Range Length Description
00000 - 9FFFFh 640 KB System Memory
A0000 – BFFFFh 128 KB Video Memory
C0000 – C9FFFh 40 KB Video ROM
CA000 – DBFFFh 72 KB Unused
DC000 - DFFFFh 16 KB DMI information
E0000 – FFFFFh 128 KB System ROM BIOS

IRQ Map

IRQ# Description
IRQ 0 System Timer
IRQ 1 Keyboard
IRQ 2
IRQ 3
IRQ 4
IRQ 5 Audio/VGA/USB
IRQ 6 Floppy Disk Drive
IRQ 7
IRQ 8 RTC Alarm
IRQ 9 ACPI
IRQ10 LAN / Modem or Combo, (Card Bus), IEEE 1394
IRQ11 Reserved for PCMCIA card
IRQ12 Glide Pad
IRQ13 FPU (FERR)
IRQ14 Hard Disk Drive
IRQ15 CD-ROM or DVD-ROM

3.3.13 GPIO Pin Assignment

The GPI and GPO pins connected to system devices. The BIOS can get device’s
status and control the device via the GPI and GPO pins.

ICH4 GPI pin assignment

GPIO
Number
GPIO0 PanelID0 I Panel ID setting
GPIO1 PanelID1 I Panel ID setting

GPIO2 PanelID2 I Panel ID setting

GPIO3 PanelID3 I Panel ID setting

Signal Name Default I/O Notes

41

R5C551 Hardware suspend control

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

GPIO8

GPIO11 LPC_QPME0 1 O 0:LPC_QPME0 Event Enable

GPIO12 EC_SCI0 I 0:PMU SCI Detect

GPIO13 PM_RI0 I 0:PMU GPIO detect

GPIO25 CB_HWSUS

GPIO32 SPDMUX0 1 O SMBus select 1

GPIO33 SPDMUX1 1 0 SMBus select 0

Q_SMI0 I 0:External K/B SMI0

1:Normal operation

1:Normal operation --

1:PMU SCI not Detect

1:PMU GPIO not Detect

1 O

P0

pin

3.3.14 PMU08 GPIO pin assignment

GPIO
number
GPIO B6 PM_SLP_S

GPIO B5 N.C. -- -- No used

Signal
Name

10

Default I/O Notes Remar

1 I Suspend Plane A control for

ICH4
0: POS, STR and STD
suspend state.
1: not suspend state.

k

GPIO B4 N.C. -- -- No used

GPIO B1 N.C. 1 O No used

GPIO B0 N.C. -- -- No use
GPIO A7 N.C -- -- No use
GPIO A6 PCMRI0 1 I PC Card Ring event

0: Ring
1: No Ring

GPIO A0 LID0 1 I LCD Open/Close Status

0: LCD Close
1: LCD Open

GPIO C1 NC -- -- No Use

GPIO B7 PM_RI0 1 O Wake Up event request

0: Wake SMI(SCI)
1: There is no demand.

GPIO B2 N.C. -- - No Use

GPIO B0 N.C. -- -- No Use

GPIO A5 PRSTMSK0 1 O PCI Reset Mask

0: Reset Mask
1: Reset Enable

GPIO A4 PCMUTE0 1 O Mute PC Speaker

GPIO A1 N.C. -- -- No use

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GPIO C2 CHGLED Charge Battery indicator :

1 : charging Battery
0 : Stop charging Battery

GPIO C3 N.C. -- -- No Use

GPIO C0 N.C. -- -- No Use

3.4 ACPI

General Requirements

The BIOS must meet the following general Power Management requirements:
Refers to the portion of the firmware that is compatible with the ACPI 1.0b specifications.
Support for Power ON(S0 state), Suspend-to-RAM (S3 state) , Suspend-to-Disk mode (S4
state) and Soft OFF(S5 state).

Global System State Definitions

Global system states (Gx states) apply to the entire system and are visible to the user.
Following is a list of the system states:
G0/S0 - Working:

A computer state where the system dispatches user mode (application) threads and
they execute. In this state, devices (peripherals) are dynamically having their power
state changed. The user will be able to select (through some user interface) various
performance/power characteristics of the system to have the software optimize for
performance or battery life. The system responds to external events in real time. It is
not safe to disassemble the machine in this state.

G1 - Sleeping:

A computer state where the computer consumes a small amount of power, user
mode threads are not being executed, and the system “appears” to be off (from an
end user’s perspective, the display is off, etc.). Latency for returning to the Working
state varies on the wakeup environment selected prior to entry of this state (for
example, should the system answer phone calls, etc.). Work can be resumed without
rebooting the OS because large elements of system context are saved by the
hardware and the rest by system software. It is not safe to disassemble the machine

in this state.

G2/S5 - Soft Off:

A computer state where the computer consumes a minimal amount of power. No
user mode or system mode code is run. This state requires a large latency in order to
return to the Working state. The system’s context will not be preserved by the

hardware. The system must be restarted to return to the Working state. It is not safe

to disassemble the machine.

G3 – Mechanical Off:

A computer state that is entered and left by a mechanical means. It is implied by

the entry of this off state through a mechanical means that the no electrical current is

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running through the circuitry and it can be worked on without damaging the
hardware or endangering the service personnel. The OS must be restarted to return to
the Working state. No hardware context is retained. Except for the real time clock,
power consumption is zero.

Sleeping State Definitions

Sleeping states (Sx states) are types of sleeping states within the global sleeping
state, G1. The Sx states are briefly defined below. For a detailed definition of the
system behavior within each Sx state, refer to ACPI specification section 7.5.2. For a
detailed definition of the transitions between each of the Sx states, refer to ACPI
specification section 9.1.

S1 Sleeping State:

The S1 sleeping state is a low wake-up latency sleeping state. In this state, no

system context is lost (CPU or chip set) and hardware maintains all system context.

S3 Sleeping State:

The S3 sleeping state is a low wake-up latency sleeping state where all system
context is lost except system memory. CPU, cache, and chip set context are lost in
this state. Hardware maintains memory context and restores some CPU and L2
configuration context. Control starts from the processor’s reset vector after the wake­up event.

S4 Sleeping State:

The S4 sleeping state is the lowest power, longest wake-up latency sleeping state
supported by ACPI. In order to reduce power to a minimum, it is assumed that the
hardware platform has powered off all devices. Platform context is saved in disk.

S5 Soft Off State:

The S5 state is similar to the S4 state except the OS does not save any context nor

enable any devices to wake the system. The system is in the “SOFT” off state and
requires a complete boot when awakened. Software uses a different state value to
distinguish between the S5 state and the S4 state to allow for initial boot operations
within the BIOS to distinguish whether or not the boot is going to wake from a saved
memory image.

System Power Plane

The system components are grouped as the following parties to let the system to

control the On/Off of power under different power management modes.

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3.4.1 System Power Plane

The system components are grouped as the following parties to let the system to control the
On/Off of power under different power management modes.

The power plane is divided as following:

Power Group Power

Controlled Devices

Control Pin
+B Nil IMM, (9V~20V)
+3VA Nil RTC I/F, PMU08
+12V PWRON PCMCIA Card, AC97 Codec
+5V PWRON PCMCIA Slot 5V
+3V PWRON VGA, PCMCIA, PCMCIA Slot 3V, DRAM, Twister(DRAM

I/F), M3885x, MAX3243

+5VS SUSB# FLASH ROM, HDD, CD-ROM, USB, Internal K/B, Glide Pad,

Audio AMP, Fan
+3VS SUSB# ISA I/F Power, Clock Generator & Buffer (W137)
+RTCVCCS Nil RTC

3.4.2 Power Management Mode Transition Flow Chart

From a user-visible level, the system can be thought of as being one of the states in the
following diagram:

G2 (S5) -

Soft Off

ACPI
Boot

(SCI_EN=1)

SLP_TYPx=S5

and

SLP_EN

or

PWRBTN_OR

Wake
Event

G0 (S0) -

Working

S4BIOS_REQ

to

SMI_CMD

OEM S4 BIOS

Handler

SLP_TYPx=S1

SLP_EN

SLP_TYPx=S2

SLP_TYPx=S4

and

and

SLP_EN

SLP_TYPx=S3

and

SLP_EN

and

SLP_EN

SLP_TYPx=S4

and

SLP_EN

S1

Sleeping

S2

Sleeping

G1

S3

Sleeping

S4

Sleeping

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3.4.3 Power States transition event

The following table summarizes the entry events and wake-up events of each power:
The following table summarize the entry events and wake-up events of each power state

Power State Entry Event Wake up Event
S3 OSPM control

Lid Close
Power Button
Sleep Button
Battery Low

Power Button
Ring Wake up
RTC Alarm
LAN Wake Up
Lid open

S4 OSPM control,

Power button
Sleep button
Lid Close
Battery Low

S5 Power Button

Battery Low
OSPM control

x OSPM: OS-directed Power Management

Power Button
RTC Alarm

Power Button

Device Power Control Methodology

Power state of local devices table

This section illustrates the power control status of each key device/component of the
system under each power management mode.

PowerState
Component
CPU Stop

L2 CACHE ON Power Down Power Off Power Off
MontaraGM ON Stop Clock Power Off (except

ICH4 ON ON Power Off (except

DRAM ON Self Refresh Self Refresh Power Off
Clock Synthesizer ON Low Power Power Off Power Off
CDROM ON Power Down Power Off Power Off
HDD ON Power Down Power Off Power Off
FDD ON Power Down Power Off Power Off
KBC ON ON Power Down Power Off
PMU08 ON ON Power Down Power Down
VGA/VRAM ON Power Down Power Down Power Off
PCMCIA ON Power Down Power Down Power Off
AUDIO ON Power Down Power Off Power Off
Audio AMP ON Power Down Power Off Power Off
LCD Backlight ON Power Off Power Off Power Off

Doze Stand By STR STD/SOff

Stop Clock Power Off Power Off

Grant

Power Off

Vcc)

Power Off (except

SUSVcc, RTCVcc )

SUSVcc, RTCVcc)

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LAN ON Power Down Power Down Power Down
Internal Modem ON Power Down Power Down Power Down

Device Power control Methodology During S3 Mode

This section illustrates the control methodology of each device/component and its details
under Stand by mode.

Device Power Down Controlled by Description
CPU Hardware Controlled by SUSB# pin
L2 CACHE Hardware Power off
ICH4 Hardware Controlled by SUSB# pin
DRAM Software Self Refresh
Clock Synthesizer Hardware Controlled by SUSB# pin
CDROM Hardware Power off
HDD Hardware Power off
FDD Hardware Power off
KBC Software Controlled by M3885xM8 power

down command

PMU08 Sofeware Controlled by PMU08 power down

command
VGA/VRAM Software Controlled by MontaraGM
PCMCIA Software Controlled by SUSB# pin
AUDIO Hardware Controlled by ICH4
Audio AMP Hardware Controlled by BIOS
LCD Backlight Hardware Power off
LAN Hardware Controlled by Driver enter Dx status
Internal Modem Hardware Controlled by Driver enter Dx ststus

Power Button

The function of Lid Switch is depends on the ACPI aware OS.

Lid Switch (Cover Switch)

The function of Lid Switch is depends on the ACPI aware OS.

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3.4.4 Expanding Event Through the Embedded Controller

The following figure shows the relationships between the devices that are wired to the
embedded controller, the embedded controller queries, and ACPI general

Figure 3-2 The Relationships between ACPI, Controller, and Device

SCI Source and GPE Event from PMU08

The system will issue a beep to inform user while the following SCI alerted:

PMU08 Input Event GPE Event Handler
ADPIN# AC Plug In/Out GPI12 AML Handler
BAT0# Battery Plug In/Out GPI12 AML Handler
GPIOA0 LID Event GPI13 AML Handler
GPIOA3 Keyboard SMI GPI8 AML Handler
GPIOA6 PCMCIA Ring In GPI13 AML Handler
GPIOA7 COM Port Ring In GPI13 AML Handler
THRM Thermal Event GPI12 AML Handler

Control Method Battery Subsystem

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EC should support all the battery information to ACPI-OS

− Designed Battery capacity

Designed Voltage

−

− Designed Low battery capacity

Designed Low – Low battery capacity

−

− Latest Full charged capacity

Present Remaining capacity

−

− Present drain rate

Present voltage

−

Present Battery Status

−

ACPI BIOS should support an independent device object in the name space, and
implement the following methods.

3.4.5 Thermal Control

There are primary cooling policies that the OS use to control the thermal state of the
hardware

Cooling Policy
Action cooling Fan On Always On

Action cooling Fan High On

Fan High Off

Passive cooling Throttling CPU On

Throttling CPU Off

Critical trip point System Shutdown

Action

Temperature Setting

Over 70 oC

Below 65oC

Over 90 oC

Below 85oC

Over 110 oC

3.5 Battery Management

3.5.1 Battery Sub-system

§ The charger will stop charge the battery when the following condition is detected.

- The temperature of the system is too high

- The remaining capacity is 95% and more.
Note that the battery life is depending on different configuration running. E.g. with
CD-ROM battery life is shorter, document keyin only battery life is longer, PMU
disable battery life is short, PMU enable battery life is longer.

- Battery reading methodology is through PMU08 SMBus.

3.5.2 Battery Low

When the battery voltage is approaching to the Low level, the PMU08 will generate a
battery low SMI. The system will do the following action.

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1) The Power Indicator will become blinking.

2) The system will issue a Warning beep.

3.5.3 Battery Low - Low

When the battery voltage is approaching to the Low-Low level, the PMU08 will
generate a battery low-low SMI. The system will do the following action.

1) The Power Indicator will keep on Blinking.

2) The system will enter Suspend To Disk mode even the power management is
disabled. The function of power-on or Resume will be inhibited until the battery
Low – Low condition is removed.

3.5.4 AC Adapter

When plug in the AC adapter, the system will do the following action:

- The charger will charge the Main Battery, if remaining capacity is not full.

- The Battery Charging Indicator will turn on if the battery is in changing mode.

3.6 PMU08

The Embedded controller PMU08 acts as a supplement for power management control. It
supports a lot of functions via SMBus interface.

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3.6.1 The System EC RAM with PMU08

Embedded Controller Command Set
The EC I/F command set allows the OS to communicate with the PMU08.
For detail information refer to ACPI 1.0B specification.

Com

EC I/F Command

mand
Byte
Enco

ding

Byte

Register

R/W

Description Interrupt

Read Embedded
Controller

(RD_EC)

Write Embedded
Controller

(WR_EC)

Burst Enable
Embedded Controller

(BE_EC)

Burst Disable
Embedded Controller

(BD_EC)
Query Embedded

Controller
(QR_EC)

0x80

0x81

0x82

0x83 #1 EC_SC W

0x84

#1 EC_SC W Command byte

#2 EC_DATA W

#3 EC_DATA R

#1 EC_SC W

#2

EC_DATA W

#3

EC_DATA W Data to write

#1 EC_SC W

#2 EC_DATA R

#1 EC_SC W

#2 EC_DATA R

Header
Address byte to

read
Read data to

host
Command byte

Header
Address byte to

write

Command byte
Header

Burst
acknowledge
byte

Command byte
Header

Command byte
Header

Query value to
host

Interrupt on
IBF=0

No Interrupt

Interrupt on
OBF=1

Interrupt on
IBF=0

Interrupt on
IBF=0

Interrupt on
IBF=0

No Interrupt

Interrupt on
OBF=1

Interrupt on
IBF=0

No Interrupt

Interrupt on
OBF=1

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3.6.2 PMU08 EC RAM List

The micro controller PMU08 acts as a supplement for power management control. It supports
the following functions via SMBus Command

Function Address

1st Battery

[ _BIF ]

00h

*3

02h

*3

04h

*3

06h

*3

08h

*3

0Ah

*3

0Ch

*3

0Eh

*3

10h

*3

12h

*3

14h

*3

16h

*3

Register

Name

Power
unit

Design
capacity

Last Full
Charge
Capacity

Battery
Technolo
gy

Design
Voltage

Design
capacity
of
Warning

Design
capacity
of Low

Battery
capacity
Granulari
ty 1

Battery
capacity
Granulari
ty 2

Model
number

Serial
Number

Battery
type

R/W

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

R(/W)

Bit Number

7 6 5 4 3 2 1 0

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff 0x0000 [Not support]

DATA[15:0] *1 - 0xffff 0x0000 [Not support]

DATA[15:8]

All bits are 0

CELL_TYP

*1

( 0x80 , 0xC0 )

Logic Default Description

E

[7:0]

- 0xffff

0x0000: mWh [Fixed value]

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000 : Primary

0x0001: Secondary [Fixed value]

0xffff: Unknown.

0x0000-0xfffe(mV)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

CELL_TYPE [3:0] This code
depends on battery data format. In
the future, this code may be added.

0x00: NiMH

0x01: Li-ion

0x10: Non-rechargeable battery
(Reserved)

52

C R I T C H G D C H G

PMU06A use this data with 02/03h.

PMU06A use this data with 04/05h.

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Function Address

18h

*3

Function Address

1Ah

*3

1st Battery

[ _BST ]

1st Battery

[ _BTP ]

2nd

Battery

[ _BIF ]

2nd

Battery

[ _BST ]

2nd

Battery

[ _BTP ]

-

1st Battery

[_BIF]

1Ch

*3

1Eh

*3

20h

*3

22h

24h

to

3Ch

*3

3Eh

to

44h

*3

46h *2 *2 *2 *2 *2 *2

48h

49h

4Ah

Register

OEM
Informati
on

Register

Battery
State

Battery
Present
rate

Battery
Remainin
g
Capacity

Battery
present
Voltage

Battery
Trip Point

Battery
data

Size

Design
capacity

Last Full

Capacity

R/W

Name

R(/W)

R/W

Name

R (/W)

R (/W)

R (/W)

R (/W)

R/W DATA[15:0] *1 - 0x0000

*2 *2 *2 *2 *2 *2

*2 *2 *2 *2 *2 *2

R (/W)

R (/W) DATA [23:16] *1 *7 - 0xff

R (/W) DATA [23:16] *1 *7 - 0xff

Charge

Bit Number

7 6 5 4 3 2 1 0

DATA

[15:8]

All bits

are 0

7 6 5 4 3 2 1 0

DATA[15:3] *1

All bits are 0

Vender [7:0] - 0xffff

*1

Bit Number

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA[15:0] *1 - 0xffff

DATA [7:0] - -

Logic Default Description

Logic Default Description

- -

Vender [7:0] This code depends on
battery data format.

And the following name should be
described in the ASL with the same
character code.

In the future, these codes will be
added.

0: “MoliEnergy”

1: “Panasonic”

2: “” (SANYO does not
agree the vender

name display)

3: “TBCL” (Toshiba)

4: “Sony”

The battery is

DCHG=1:

CHG =1:

CRIT =1:

0x0000-0xfffe(mW)

0xffff: Unknown

0x0000-0xfffe(mWh)

0xffff: Unknown

0x0000-0xfffe(mV)

0xffff: Unknown

0x0000: Clear the trip point

0x0001-0xffff(mWh)

0x01: DATA size is
3byte.(PMU06A)

0x00: DATA size is 2 byte.
(PMU06) *8

*7 *8

*7 *8

discharged

The battery is
charged

The battery is
critical (Empty)

53

PMU06A use this data with 1E/1Fh.

PMU06A use this data with 22/23h.

PMU06A use this data with 26/27h.

PMU06A use this data with 28/29h.

PMU06A use this data with 42/43h.

PMU06A use this data with 46/47h.

PMU slave mode or charger mode is

For detail information, refer to PMU

slave communication section in this

O N E A L R M R E S

E S

E S

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Function Address

1st Battery

[_BST]

1st Battery

[_BTP]

2nd

Battery

[_BIF]

2nd

Battery

[_BST]

2nd

Battery

[_BTP]

Function Address

PMU

Access

SMBus

4Bh

4Ch

4Dh

4Eh

4Fh

50h

51h

to

6Bh

*3

6Ch

6Dh

6Eh

6Fh

70h

*7

71h

*7

72h

73h

74h

to

93h

94h

95h

Register

Name

Battery
Remainin
g

Capacity

Battery
Trip

Point

Design
capacity

Last Full

Charge

Capacity

Battery
Remaing
Capacity

Battery
Trip

Point

Reserved

Register

Name

PMU_LO

W_

ADR

PMU_HI

G_

ADR

CHECK_

SUM

PMU_DA

TA

SMB_PT
CL

SMB_ST
S

SMB_AD
DR

SMB_CM
D

SMB_DA
TA

[0-31]

SMB_BC
NT

SMB_

ALARM_

ADDR

R/W

R (/W) DATA [23:16] *1 *7 - 0xff

R (/W) DATA [23:16] *1 *7 - 0x00

R (/W) DATA [23:16] *1 *7 - 0xff

R/(/W) DATA [23:16] *1 *7 - 0xff

R (/W) DATA [23:16] *1 *7 - 0xff

R (/W) DATA [23:16] *1 *7 0x00

R/W Don’t care - -

R/W

R/W DATA [7:0] - -

R/W DATA [15:8] - -

R/W DATA [7:0] - -

R/W DATA [7:0] - -

R/W PROTOCOL [7:0] - -

R/W

R/W

R/W COMMAND - -

R/W DATA - -

R/W

R (/W) ADDRESS [6:0]

Bit Number

7 6 5 4 3 2 1 0

Bit Number

7 6 5 4 3 2 1 0

D

STATUS

[4:0]

ADDRESS

[6:0]

RES
[7:5]

BCNT [4:0] - -

Logic Default Description

Logic Default Description

- -

R

- -

R

- -

*7 *8

*7 *8

*7 *8

*7 *8

*7 *8

*7 *8

These registers are available when

selected.

document

For detail information, refer to
ACPI 1.0 specification

[13.9 SMBus Host controller
Interface via Embedded controller]

These registers are not available
when PMU slave mode or charger
mode is selected.

The PMU06 has access protect
function for the EEPROM in the
battery, to cancel the protection,
set the access protect cancel bit.

For detail, refer to SMBus section

54

RT

TheSMBus address

AE) protection

PMU slave mode or charger mode is

For detail information, refer to PMU

ave communication section in this

O N E A L R M R E S

E S

E S

RT

TheSMBus address

AE) protection

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Function Address

96h

to

97h

98h

99h

Reserved

Function Address

PMU

Access

SMBus

Reserved

to

9Fh

6Ch

6Dh

6Eh

6Fh

70h

*7

71h

*7

72h

73h

74h

to

93h

94h

95h

96h

to

97h

98h

99h

to

9Fh

Register

AMB_

ALARM_

DATA [0­1]

SMB_CN
RL

Reserved R/W Don't care - -

Register

PMU_LO

PMU_HI

CHECK_

PMU_DA

SMB_PT
CL

SMB_ST
S

SMB_AD
DR

SMB_CM
D

SMB_DA
TA

[0-31]

SMB_BC
NT

SMB_

ALARM_

ADDR

AMB_

ALARM_

DATA [0­1]

SMB_CN
RL

Reserved R/W Don't care - -

R/W

Name

R (/W)

R/W RES [7:1]

R/W

Name

W_

R/W DATA [7:0] - -

ADR

G_

R/W DATA [15:8] - -

ADR

R/W DATA [7:0] - -

SUM

R/W DATA [7:0] - -

TA

R/W PROTOCOL [7:0] - -

R/W

R/W

R/W COMMAND - -

R/W DATA - -

R/W

R (/W) ADDRESS [6:0]

R (/W)

R/W RES [7:1]

Bit Number

7 6 5 4 3 2 1 0

DATA - -

Bit Number

7 6 5 4 3 2 1 0

D

STATUS

[4:0]

ADDRESS

[6:0]

RES

[7:5]

BCNT [4:0] - -

DATA - -

Logic Default Description

P

0x00

Logic Default Description

- -

R

- -

R

- -

P

0x00

PRT =1:

These registers are available when

selected.

sl
document

For detail information, refer to
ACPI 1.0 specification

[13.9 SMBus Host controller
Interface via Embedded controller]

These registers are not available
when PMU slave mode or charger
mode is selected.

The PMU06 has access protect
function for the EEPROM in the
battery, to cancel the protection,
set the access protect cancel bit.

For detail, refer to SMBus section

PRT =1:

(A8­is cancelled.

(A8­is cancelled.

55

*3

O N

*3

*3

B T P E M P L O W W A R E R R D C H G C H G C O N

*3

*3

*3

*3

E S

same time, the least address

*5

*5

*5

0

To clear the notified event

flag without unexpected

event loss, clear the

For this operation, this

register has special writing

(STS_X)

Function

Status

Addre

Register Bit Number

ss

A0h

ADP_STS R(/W)

Name

R/W

7 6 5 4 3 2 1 0

RES [7:1]

Logic Default Description

C

- - CON = 1:

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

AC adapter is
connected

A1h

BAT1_STS

(1st Battery)

A2h

BAT2_STS

(2nd Battery)

A3h

Reserved

A4h

BAT1_CAP R(/W)

A5h

BAT2_CAP R(/W)

A6h

Reserved

SMB_Alert_

A7h

ADDR

R(/W)

R(/W)

R/W Don’t care - -

BCAP - -

BCAP - -

R/W Don’t care - -

R

R/W ADDRESS[6:0]

- -

- -

- 0x00

Battery trip
point is
detected.

Battery is

BTP =1:

EMP =1:

LOW =1:

WAR=1:

ERR =1:

DCHG=1:

CHG=1:

CON=1:

0x00-0x64 = 0-100(%)

0x7F = Unknown

0x80 = Not installed

SMBAlert output device
address

The alert response function
is available when this
register is cleared (0x00)
only.

When the several devices
assert the alert signal at the

empty.

Battery is Low
battery state.

Battery is
Warning state.

Battery is Error
state.

Battery is
discharged.

Battery is
charged.

Battery is
connected.

A8h

A9h

AAh

GPIO-A_

EVT_STS

GPIO-B_

EVT_STS

GPIO-C_
EVT_STS

R/W STS_A [7:0] 0x00

R/W 0

R/W 0 0 0 0 0

STS_B [6:0] 0x00

Read

0:No event

1:EVT detection

Write

STS

0:Clear event

_C

1:Ignore

[1:0]

56

is stored to this register.
And when this register is
cleared , next alert address
is stored to this register.

corresponding bit flag only.

manner as follows.

0x00

STS_X

AND (Written data)

ß

*5

*5

T P 2 S M B A L R T G P I O

E

B A T 2 B A T 1 A D P

*5

H

*5

H

*5

E R R L O W H I G H

To clear the notified event

flag without unexpected

vent loss, clear the

For this operation, this

register has special writing

(STS_X)

T P 2 S M B A L R T

D P

T P E M P L O W W A R E R R C A P C / D C O N

For detail information, refer

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Function

Addre

ss

ABh

ACh

ADh

AEh

Register Bit Number

Name

RUN_
EVT_STS

WAKE_
EVT_STS

RUN_

EVT_STS_2

WAKE

EVT_STS_2

R/W

7 6 5 4 3 2 1 0

R/W 0x00

B

R/W

R/W Reserved [7:1]

R/W Reserved [7:1]

Logic Default Description

BTP2 event
is detected

SMBus event
is detected.

SMBAlert is

BTP2 =1:

SMB =1 :

Read

0:No event

R

S

1:EVT detection

Write

0:Clear event

1:Ignore

T

T

ALRT=1 :

GPIO =1 :

BATn=1 :

ADP =1 :

TH =1 :

HIGH=1 :

0x00

LOW =1 :

ERR =1 :

0x00

e
corresponding bit flag only.

0x00

detected.

GPIO event
is detected.

Battery event
is detected.

Battery event
is detected.

Thermal
event is
detected

High alarm
point is
detected.

Low alarm
point is
detected.

Polling
communicati
on failure
with retry.

Event/

GPIO

Control

AFh

B0h

B1h

B2h

B3h

B4h

B5h

B6h

B7h

THERMAL_
EVT_STS

EC_RUN_

ENB

EC_WAKE_

ENB

BATT_RUN
_

ENB

BATT_WA
KE

_ENB

GPIO-A_

IO_CONF

GPIO-A_

DATA

GPIO-A_

RUN_ENB

GPIO-A_

EVT_POL

R/W Reserved [7:3]

B

R/W

R/W

R/W

B

R/W

R/W CONF_A [7:0]

R/W DATA_A [7:0] -

R/W RUN_ENB_A [7:0]

R/W POL_A [7:0]

RES[4:1]

0: Disable

A

1: Enable

0: Disable

1: Enable

0: Disable

1: Enable

0: Disable

1: Enable

0: Input

1: Output

0: Disable

1: Enable

0: Falling edge

1: Rising edge

0x00

0x00

0x00

0x00

0x00

0x00

0x00

0x00

manner as follows.
STS_X ß

AND (Written data)

BTP2:

BTP2 event

SMB :

SMBus event.

ALRT:

SMBAlert event.

ADP:

Adapter event.

BTP:

Battery trip point

EMP:

Empty.

LOW:

Low battery

WAR:

Warning

ERR:

Error

CAP:

Capacity learning

C/D:

Charge/Discharge

CON:

Battery presence

to GPIO section in this
document.

57

0

C

0

E_

_C

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Function

Event/

GPIO

Control

Addre

ss

B8h

B9h

BAh

BBh

BCh

BDh

BEh

BFh

C0h

C1h

Register Bit Number

Name

GPIO-A_

WAKE_EN
B

GPIO-B_

IO_CONF

GPIO-B_

DATA

GPIO-B_

RUN_ENB

GPIO-B_

EVT_POL

GPIO-B_

WAKE_EN
B

GPIO-C_
DATA

GPIO-C_
RUN_ENB

GPIO-C_
EVT_POL

GPIO-C_
WAKE_EN

B

R/W

7 6 5 4 3 2 1 0

R/W WAKE_ENB_A [7:0]

R/W 1 CONF_B [6:0]

R/W 0 DATA_B [6:0] -

R/W 0 RUN_ENB_B [6:0]

R/W 0

R/W 0 WAKE_ENB_B [6:0]

R/W

R/W 0 0 0 0 0

R/W 0 0 0 0 0

R/W 0 0 0 0 0

POL_B [6:0]

RES [7 :4]

*4

DATA_C

[3:0]

RUN

ENB

[1:0]

PO

L_C

[1:0

WA

0

ENB

Logic Default Description

0: Disable

1: Enable

0: Input

1: Output

0: Disable

1: Enable

0: Falling edge

1: Rising edge

0: Disable

1: Enable

-

_

0: Disable

_

1: Enable

0: Falling edge

1: Rising edge

]

K

0: Disable

1: Enable

0x00

0x80

0x00

0x00

0x00

0x00

0x00

0x00

58

[1:0]

W A K E S C I

R E S

*4 Q _ R U N

W A K E _ O U T S

US _ X

output when the

shows the output

=0: Runtime and

(GPIO B6 is

=1: Runtime and

(GPIO B6 is

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Function

Addre

Register Bit Number

ss

Name

C2h EVT_CONT R/W

R/W

7 6 5 4 3 2 1 0

RES

[7:6]

Logic Default Description

0x00

WAKE

SCI

Q_RUN

WAKE_
OUT

SUS_X

=0: Wake#
output is
“Level”.

=1: Wake#
output is
“Pulse”.

=0: SCI is
always output
by event

detection
and SCI_EVT
shows

the query
data is stored.

And next
SCI is not
output

until
SCI_EVT is
cleared.

=1: SCI is

command
set is not
executed

and OBF=0.

SCI_EVT

SCI is for
event
notification.

=0: Runtime
event ststus is

reflected to
RUN_EVT_STS

register.

=1: Runtime
event status is

reflected to
Query data.

=0: Wake event
output is always

enable.( in
S0-S3)

=1: Wake event
output is enable

when
SUS_X=L.

Wakeup is

selected by
SUS_B.

enable)

Wakeup is

selected by
SUS_A.

used as SUS_A

input.)

59

H

To

*6

*6

formation, refer

*6

C H

R D Y #

H G 2 C H G 1

C H G 2 D C H G 1

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Function

Battery
control

Addre

Register Bit Number

ss

Name

EC_RUN_

C3h

ENB_2

EC_WAKE_

C4h

ENB_2

C5h

Reserved R/W

C7h

C8h

GPI_AD0 R AD0_DATA [7:0] - -

C9h

GPI_AD1 R AD1_DATA [7:0] - -

CAh

Reserved

CBh D/A_CONT R/W DATA [7:0] - 0xff

BAT_CHG_

D0h

CONT

R/W

7 6 5 4 3 2 1 0

C

0: Disable

T

1: Enable

0: Disable

1: Enable

R/W

Reserved [7:1]

R/W

Don’t care

R/W Don’t care - -

G
_

R/W RES[7:5]

RES
[3:2]

Logic Default Description

0x00

TH: Thermal event

0x00

- -

For detail in
to GPIO section in this
document.

0x00-0xfe: D/A converter
output data

0xff : Battery
capacity(%) output

CHG_RDY# =0 : Charge

- -

ready

CHGn =1 : The nth
battery is charged

D1h

D2h

D3h

D5h

D7h

BAT_DCH_
PRI

BAT_DCH_
CONT

BAT_WAR_

ABS

BAT_LOW_

ABS

BAT_WAR_

REL

R/W RES[7:3]

R/W

R/W DATA[15:0] *1 - 0x0000

R/W DATA[15:0] *1 - 0x0000

R/W DATA [7:0] - 0x10

RES[7:2]

PAT

[2:0]

D

- 0x00

0: Not discharge

1: Discharge

-

Battery discharge priority

0 : 2 1
1 : 1 2
2 : 2 1
3 : 2 1
4 : 1 2
5 : 1 2

6 : Same as 0

7 : Simultaneously
discharge (Read only :

This data can be set
using PMU register)

The discharge battery can
be selected one of the
batteries can be discharged.

Absolute capacity battery
Warning detection point

0x0000-0xffff (mWh)

Absolute capacity battery
Low detection point

0x0000-0xffff (mWh)

Relative capacity battery
Warning detection point

00-C8h (0-100% step 0.5%)

60

*3

This register is “read only”,

the value, use the

To

To

C _ R E G

B A Y _ L E D P O

W_ L E D

not initialize

EC register

when system

power is off.

indicates the

status to the

LED_BAY#

n, when the

The Power

S _ S T S

S

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

Function

Addre

Register Bit Number

ss

Name

BAT_LOW_

D8h

REL

D9h

FULL_DAT
A

CC_CUR_

Dah

DATA

DBh

BTP2 R/W DATA [15:0] - 0x0000

DCh

DDh

Reserved R/W Don't care - -

DFh

R/W

7 6 5 4 3 2 1 0

R/W DATA [7:0] - 0x06

R/W DATA [7:0] - 0xbe

R DATA [7:0] - 0x00

Logic Default Description

Relative capacity battery
Low detection point

00-C8h (0-100% step 0.5%)

Full charge cancel point

00-C8h (0-100% step 0.5%)

Battery charging current
setting

0x01-0xff (0.02-5.10A step

0.02A)

0x00 Depends on the
battery

to change
register in PMU registers
area.

0x0000: Clear the trip point

0x0001-0xffff : (mWh)

When all of the battery’s
capacities lesser than this
setting value, the BTP2 is
detected if event is enabled.

PMU does

PMU
control

Thermal

Sensor

Polling

E

E0h PMU_CONT R/W RES[7:3]

O

ACPI_ACC_

E1h

ENB

E2h OFF_TIME R/W DATA [7:0] - 0x64

POLLING_

E3h

ADDRESS

R/W RES [7:1]

R/W Slave Address [6:0] RE

- 0x00

- 0x00

0x00

EC_REG =1:

BAY_LED =1:

POW_LED =1:

OS_STS = 1:

= 0:

Power switch over ride
function timer

01h-FFh (0.1-25.5esc step

0.1sec)

00h : Reserved

Address: 0x00-0x7F

The polling slave address
setting

If this address is 00, the
Polling is disabled.

PMU

Battery
discharge

battery is
installed.

LED blink

ACPI mode

Legacy
mode

61

If the received data GE this

value, the event will be

If the received data LE this

value, the event will be

To

After writing to the register

To

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

Function

PMU
control

Addre

Register Bit Number

ss

Name

HIGH_

E4h

ALARM

LOW_

E5h

ALARM

POLLING_

E6h

INTERVAL

POLLING_

E7h

DATA

HARDWAR

E8h

E_SHUT_D
OWN

POLLING_

E9h

COMMAND

RETRY_

EAh

COUNT

EBh

Reserved R/W Don't care

EFh

BURST_FL

F0h

G_CLR

F1h

Reserved R/W Don't care

FFh

R/W

7 6 5 4 3 2 1 0

R/W DATA [7:0] Signed value 0x00

R/W DATA [7:0] Signed value 0x00

R/W DATA [7:0] 0x00

R(/W)

R/W DATA [7:0] Signed value 0x7D

R/W DATA [7:0] 0x00

R/W DATA [7:0] 0x10

R/W DATA [7:0] - -

DATA [7:0] Signed value 0x00

Logic Default Description

detected.

detected.

0x00 :Polling
disable

0x01 – 0xFF [x 250ms]
(250ms to 63.75sec)

This register shows data at
latest polling.

If the thermal sensor read
value GE this value, the
PMU automatically off the
power.

Polling command (data
register) address.

0x00 - 0xFF: Retry count
value (0-255)

addressed A8h-AFh,

Set the 00h to this register.

3.6.3 Security

The user may enter up to eight standard text characters for a password. The password includes
two levels. The higher priority is the Supervisor Password. The lower priority is the User
Password. The Supervisor Password can access all the system resource, while the User
Password may not access the floppy disk when it is protected by Supervisor Password. Also,
the User Password may not access the floppy disk when the Supervisor Password protects it.

When the security function is enabled, the system will request the user to enter password
during the following situation:

• Power On → The system will prompt the user to enter the password before booting

the OS. If the user key in the wrong password for 3 times, then the system will halt..

Entering CMOS Setup → The system will prompt the user to enter the password

•

before entering the CMOS Setup. If the user keys in the wrong password for 3 times,
then the system will halt.

62

TECHNICAL SERVICE MANUAL Prestigio Cavaliere 142

3.7 CMOS Setup Utility

The Setup utility is used to configure the system. The Setup contains the information
regarding the hardware for boot purpose. The changed settings will take effect after the
system rebooted. Refer to Chapter 1 on running BIOS Setup Program for more detailed
information.

3.8 Definitions of Terms

10Base-T (Ethernet) - A networking standard that supports data transfer rates up to
10Mbps (10 megabits per second).

100Base-T (Fast Ethernet) ­transfer rates up to 100Mbps.
ACPI - Advanced Configuration and Power Management Interface, a power

management specification developed by Intel, Microsoft, and Toshiba.

CardBus - The 32-bit version of the PCMCIA PC Card standard. In addition to

supporting a wider bus (32 bits instead of 16 bits), CardBus also supports bus mastering
and operation speeds up to 33MHz.

Clock Throttling

started at a known duty cycle using the STPCLK# pin to enter and exit Stop Grant mode.
Clock throttling is used for power saving, thermal management, and reducing the
processing speed.

DIMM (SODIMM) - Dual In-line Memory Module, a small circuit board that holds

memory chips. A Single In-line Memory Module (SIMM) has a 32-bit path to the
memory chips whereas a DIMM has 64-bit path. Because the Pentium processor
requires a 64-bit path to memory, you need to install SIMMs two at a time. With
DIMMs, you can install one DIMM at a time. SODIMM is Small Outline Dual In-line

Memory Module used in notebook computers.
DMI - Desktop Management Interface, an API to enable software to collect information

about a computer environment about a computer environment. For example, using DMI
a program can determine what hardware and expansion boards are installed on a

computer.

GPI - General Purpose Input.
GPO - General Purpose Output.
Lid Switch - A switch that indicates the notebook LCD Panel has been closed and it can

be turned off.

MPEG-2 - Moving Picture Experts Group, a working group of ISO. The term also

refers to the family of digital video compression standards developed by the group.
There are two major MPEG standards : MPEG-1 and MPEG-2. The most common
implementations of the MPEG-1 standard provide a video resolution 352x240 at 30
frames per second(fps). A newer standard, MPEG-2, offers resolution of 720x480 and

1280x720 at 60 fps, with full CD-quality audio.
North Bridge - The CPU to PCI interface, also contains the memory and cache

controllers.

South Bridge - The PCI to ISA interface, also contains many legacy devices.
SMM - System Management Mode, Mode of operation while an SMI is active.
SMI - System Management Interrupt, non-maskable interrupt that causes the system to

enter SMM. SMM functions include power management, USB legacy keyboard control,
security, hot keys, and thermal monitoring.

SMB - System Management Bus, that is used for managing smart batteries, reading

SDRAM configuration information, and other miscel1aneous system function.

– South bridge function that allows the CPU clock to be stopped and

A relatively new networking standard that supports data

63

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

TBD -To Be Discussed. The mentioned specification is not final that should be

discussed with related engineers.

Ultra DMA-33 - A protocol developed by Quantum Corporation and Intel that supports
burst mode data transfer rates of 33.3 MBps.
USB - A new external bus standard that supports data transfer rates of 12 MBps. A

single USB port can be used to connect up to 127 peripheral devices, such as mice,
modems, and keyboards. USB also supports Plug-and-Play installation and hot plugging.

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Hardware Functional Overview

4.1 Overview

The Cavaliere 142 consists of several important functions and subsystems including:

Notebook size, 2 spindle, IBM PC/AT compatible personal computer with PCI­bus and Multimedia functions , provide full basic function with lowest price and

easy of use.

The following is a summary of Cavaliere 142 features:

CPU

CPU Type uFCPGA 479pin

Intel Banias 1.3/1.4/1.5/1.6/1.7 GHZ

TDP(Target) 24.5W

Chip Set

Core Logic Intel Montara-GM (North) :CPU(Banias) I/F, LVDS I/F,

RGB analog I/F 200/266 DDR MEMORY I/F, Hub-Link
I/F, DVOB&DVOC IF….

Intel ICH4-M (South) : PCI I/F, LPC I/F, ATA100 IDE I/F,

Hub-Link I/F ,AC97 V2.2 I/F, RTC, 2.0/1.1USB I/F,
10/100M LAN I/F, GPIO, ACPI, APIC….

Memory

Support Memory DDR266/200 SDRAM 128/256/512MB/1G SO-DIMM
Memory Slots 2 Slots SO-DIMM (1.25”)
Max Memory 2GB (1GB per DIMM )

Video

Controller Embedded in Intel Montara-GM.

UMA (using DVMT configuration)
High performance & High quality 3D accelerator
High performance 2D accelerator
Complete TV-OUT/Digital flat panel solution
MPEG-2/1 video decoder
Video accelerator

LCD Panel 14.1” XGA

Controlled by hot key (8 level)

PCMCIA

Controller RICOH R5C551 Single Slot PCI-CARDBUS BRIDGE

Built in Smart Card reader(None)
ZV-Port Support (None)
Ring wakeup support(None)

Power Switch TPS2211A(TI)

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Sound

Controller Integrated in Intel ICH4-M (PCI audio)

CODEC Realtek ALC202 AC97 CODEC 2.2 S/PDIF
Function Sound Blaster Compatible

S/W Wave Table
Buzzer Support (None)
Volume SW control.

IEEE 1394(Option)

Controller RICOH R5C551 two IEEE1394 ports BRIDGE
Function Compliant with Link Layer Services as defined in 1394

Storage

USB FDD 3.5” 3 mode(option)
IDE bus IDE bus

Internal HDD 2.5” 9.5 mmH Pack
Internal Optical Drive
DVD Combo 8x DVD , 8x CDR, CDRW write , 20x CD-ROM 9.5mm

Communication

Internal Modem ASKEY (1456VQL19V) (MDC Modem AC97 Interface)
(Option)

Internal Bluetooth/Modem Combo

(Option)

V.90, K56flex

Internal LANIntel ICH4-M + Intel 82562EZ

Internal LAN Intel 82541EI (PCI device) (Option)

Giga Lan solution

Support one port

Open Host Controller Interface specification release 1.0

Compliant with Physical Layer Services as defined in

P1394a draft 2.0(Data Rate 100/200/400 Mbps)

Bus Mastering

Ultra DMA 33/66/100

PIO mode 0,1,2,3,4

type (KME: UJDA745, Toshiba: SD-R9022)

V.90, K56flex

RJ11 Jack

Wake up on Ring support S1 or S3

Voice Function not support

ActionTec (MBC) (MDC Modem AC97 Interface / USB)

MDC Modem:

RJ11 Jack

Wake up on Ring support S1 or S3

Voice Function not support

Bluetooth:

2.4GHz~2.4835GHz
CSR solution
Support Coexistence function.

10Base-T/100Base-TX

RJ-45 jack

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RJ-45 jack

I/O

Serial port Not support

Parallel port Not support
CRT D-sub 15pin x1
USB 4pin x3 port
IEEE 1394 one port
H/P Min Jack x1
Mic In Min Jack x1
PDC/PIAFS Special 24pin cancel (support by USB)
Modem RJ11 x1
LAN RJ45 x1
Docking Not support
IR Not support
Versa Bay III Not support

Keyboard

Pitch/Travel 19mm/3mm

Language US, Japan, French, UK, Italian, Spanish, Germany, Belgian
Norwegian, Danish, Swedish, Portuguese, T.Chinless, Korean
Tbits

Hot Key Fn+F2: Wireless On/Off
Fn+F3: Display Mode
Fn+F4: Sleep
Fn+F6: Speaker On/Off
Fn+F8: Brightness Up (8 level)
Fn+F9: Brightness Down (8 level)
Fn+F12: Scroll Lock
Fn+ArrowR: Sound up
Fn+ArrowL: Sound down

Point Device SYNAPTICS TM41PDG351-1 Glide Pad
AC Adapter

LITEON PA-1600-05
Input AC 100-240V
Output 19V, 60W Peak80W
Color Black or White

Battery
1

st

battery Li-ion (8 cell) :Pansonic 52Wh

Battery Life Under ACPI

RTC battery x1
Bridge battery Not support

Switch

Power SW Push button type (As asserted switch over 4s,system will

be powered down by force )

Short Cut Key User define button x2 , define by user
( Internet button , support power on from S1/S4/S5
E-Mail button , support power on from S1/S4/S5 )
LED

Power Status Yes (Need see while LCD is closed)

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Battery Charge Yes (Need see while LCD is closed)
IDE Device Access Yes (HDD & CD-ROM )
FDD Access No
Caps Lock Yes
Scr Lock Yes
Num Lock Yes
Mail arrival No
RF Access Yes

Security

Kensington Lock Hole x1

PMU PMU08

Compliance

PC2001 compliant
ACPI compliant
Plug and Play Support
Auto Configuration
16bit I/O Address Decoded
Selectable I/O Address, IRQ and DMA

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4.2 System Hardware Block Diagram

Figure 1-1 Cavaliere 142 Block Diagram

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4.3 Chipset Summary

The Cavaliere 142 notebook consists of following major chipsets:

Controller Chip Vendor Description

Processor
North Bridge
South Bridge
Video Controller
PCMCIA Controller
Audio Chip
Audio Codec
Keyboard Controller
PMU Controller
ROM BIOS
Clock Generator
Temperature Sensor
IEE 1394

LAN

Modem

Intel Mobile Banias
Intel MontaraGM
Intel ICH4
Intel Embedded in MontaraGM
RICOH R5C551
Intel South Bridge Integrated
Intel ICH4
Misubishi M3885x
NEC PMU08
SST 49LF004A
IMI CY28346
NS MAX6690
RICOH R5C551

Intel ICH4

Intel MDC AC’97

TECHNICAL SERVICE MANUALPrestigio Cavaliere 142

4.4 System Processor (CPU)

The Cavaliere 142 runs on Intel Banias based on uFCPGA packaging. It supports CPU with
up to 1.3/1.4/1.5/1.6/1.7 GHZ clock speed rating. The processor operates in conjunction
with the RAM and ROM memory and the system control logic to process software
instructions (BIOS, Windows, and Applications).

Intel Pentium M Features

The Intel® Pentium® M processor is a high performance, low power mobile processor
with several micro-architectural enhancements over existing Intel mobile processors.
The following list provides some of the key features on this processor:

• Supports Intel® Architecture with Dynamic Execution

• High performance, low-power core

• On-die, primary 32-kbyte instruction cache and 32-kbyte write-back data cache

• On-die, 1-MByte second level cache with Advanced Transfer Cache Architecture

• Advanced Branch Prediction and Data Prefetch Logic

• Streaming SIMD Extensions 2 (SSE2)

• 400-MHz, Source-Synchronous processor system bus

• Advanced Power Management features including Enhanced Intel® SpeedStep®

technology

• Micro-FCPGA and Micro-FCBGA packaging technologies
The Intel Pentium M processor is manufactured on Intel’s advanced 0.13 micron process
technology with copper interconnect. The processor maintains support for MMX™
technology and Internet Streaming SIMD instructions and full compatibility with IA-32
software. The high performance core features architectural innovations like Micro-op
Fusion and Advanced Stack Management that reduce the number of micro-ops handled by
the processor. This results in more efficient scheduling and better performance at lower

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power. The on-die 32-kB Level 1 instruction and data caches and the 1-MB Level 2 cache
with Advanced Transfer Cache Architecture enable significant performance improvement
over existing mobile processors. The processor also features a very advanced branch
prediction architecture that significantly reduces the number of mispredicted branches. The
processor’s Data Prefetch Logic speculatively fetches data to the L2 cache before an L1
cache requests occurs, resulting in reduced bus cycle penalties and improved performance.
The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in
multimedia applications including 3-D graphics, video decoding/encoding, and speech
recognition.The new packed double-precision floating-point instructions enhance
performance for applications that require greater range and precision, including scientific
and engineering applications and advanced 3-D geometry techniques, such as ray tracing.
The Intel Pentium M processor’s 400-MHz processor system bus utilizes a split-transaction,
deferred reply protocol. The 400-MHz processor system bus uses Source-Synchronous
Transfer (SST) of address and data to improve performance by transferring data four times
per bus clock (4X data transfer rate, as in AGP 4X). Along with the 4X data bus, the
address bus can deliver addresses two times per bus clock and is referred to as a “double­clocked” or 2X address bus.Working together, the 4X data bus and 2X address bus provide
a data bus bandwidth of up to 3.2 Gbytes/second. The processor system bus uses Advanced
Gunning Transceiver Logic (AGTL+)signal technology, a variant of GTL+ signalling
technology with low power enhancements.

The processor features Enhanced Intel SpeedStep technology, which enables real-time
dynamic switching between multiple voltage and frequency points instead of two points
supported on previous versions of Intel SpeedStep technology. This results in optimal
performance without compromising low power. The processor features the Auto Halt,
Stop-Grant, Deep Sleep, and Deeper Sleep low power states.
The Intel Pentium M processor utilizes socketable Micro Flip-Chip Pin Grid Array (Micro­FCPGA) and surface mount Micro Flip-Chip Ball Grid Array (Micro-FCBGA) package
technology. The Micro-FCPGA package plugs into a 479-hole, surface-mount, Zero
Insertion Force (ZIF) socket, which is referred to as the mPGA479M socket.
This document includes specifications for the Intel Pentium M processor at Highest
Frequency Mode (HFM) core frequencies of 1.30, 1.40, 1.50, and 1.60 GHz, the Low
Voltage Intel Pentium M processor at HFM core frequency of 1.10 GHz and the Ultra Low
Voltage Intel Pentium M processor at HFM core frequency of 900 MHz.

4.5 System Core Logic

4.5.1 Intel 852GM Chipset GMCH Features

Processor/Host Bus Support

― Mobile Intel® Pentium® 4 Processor-M (478-pin package)
. Supports the Intel Pentium 4 Processor-M subset of the Enhanced Mode Scalable Bus

Protocol
. 2X Address, 4X data
. Intel Pentium 4 Processor-M System Bus interrupt delivery
. Supports system bus at 400-MHz or 3.2 GB/s
. Supports host Dynamic Bus Inversion (DBI)
. Supports 32-bit host bus addressing

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. 12-deep In-Order-Queue
. AGTL+ bus driver technology with integrated AGTL termination resistors (1.3-V

operation)

. Supports Enhanced Intel® SpeedStep® technology

Memory System
. Directly supports one DDR SDRAM channel, 64-bits wide
. Supports 200/266-MHz DDR SDRAM devices with max of 2 Double-Sided SO-DIMMs

(4 rows populated) with unbuffered PC1600/PC2100 DDR SDRAM (without ECC).

. Supports 128-Mbit, 256-Mbit, and 512-Mbit technologies providing maximum capacity

of 1-GB with x16 devices
. All supported devices have 4 banks
. Supports up to 16 simultaneous open pages
. Supports page sizes of 2-kB, 4-kB, 8-kB, and 16-kB. Page size is individually selected for

every row
. UMA support only

System Interrupts
. Supports Intel 8259 and Processor System Bus interrupt delivery mechanism
. Supports interrupts signaled as upstream Memory Writes from PCI and Hub Interface
. MSI sent to the CPU through the System Bus
. From IOxAPIC in ICH4-M
. Provides redirection for upstream interrupts to the System Bus

Hub Interface to ICH4-M
. 266 -MB/s point-to-point Hub Interface to ICH4-M
. 66-MHz base clock

Power Management

. SMRAM space remapping to A0000h (128-kB)
. Supports extended SMRAM space above 256-MB, additional 1-MB TSEG from Top of

Memory,cacheable (cacheability controlled by CPU)
. APM Rev 1.2 compliant power management
. Supports Suspend to System Memory (S3), Suspend to Disk (S4) and Hard Off/Total

Reboot (S5)
. ACPI 1.0b, 2.0 Support

Package
. 732-pin Micro-FCBGA (37.5 x 37.5 mm)

4.5.2 Intel ICH4 Features

The ICH4 provides extensive I/O support. Functions and capabilities include:

•PCI Local Bus Specification, Revision 2.2-compliant with support for 33-MHz PCI
operations.

•PCI slots (supports up to 6 Req/Gnt pairs)

•ACPI Power Management Logic Support

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•Enhanced DMA Controller, Interrupt Controller, and Timer Functions

•Integrated IDE controller supports Ultra ATA100/66/33

•USB host interface with support for 6 USB ports; 3 UHCI host controllers; 1 EHCI

high-speed USB 2.0 Host Controller

•Integrated LAN Controller

•System Management Bus (SMBus) Specification, Version 2.0 with additional support

for I2C devices

•Supports Audio Codec ’97, Revision 2.3 specification (a.k.a., AC ’97 Component
Specification, Revision 2.3). Link for Audio and Telephony codecs (up to 7 channels)

•Low Pin Count (LPC) interface

•Firmware Hub (FWH) interface support

•Alert On LAN* (AOL) and Alert On LAN 2* (AOL2)

Hub Architecture

As I/O speeds increase, the demand placed on the PCI bus by the I/O bridge has become
significant. With AC ’97, USB 2.0, and Ultra ATA/100, coupled with the existing USB, I/O
requirements could impact PCI bus performance. The chipset’s hub interface architecture
ensures that the I/O subsystem; both PCI and the integrated I/O features (IDE, AC ‘97,
USB, etc.), receive adequate bandwidth. By placing the I/O bridge on the hub interface
(instead of PCI), the hub architecture ensures that both the I/O functions integrated into the
ICH4 and the PCI peripherals obtain the bandwidth necessary for peak performance.

PCI Interface

The ICH4 PCI interface provides a 33-MHz, Rev. 2.2 compliant implementation. All PCI
signals are 5-V tolerant, except PME#. The ICH4 integrates a PCI arbiter that supports up
to six external PCI bus masters in addition to the internal ICH4 requests.

IDE Interface (Bus Master Capability and Synchronous DMA Mode)

The fast IDE interface supports up to four IDE devices providing an interface for IDE hard
disks and ATAPI devices. Each IDE device can have independent timings. The IDE
interface supports PIO IDE transfers up to 16 Mbytes/sec and Ultra ATA transfers up 100
Mbytes/sec. It does not consume any ISA DMA resources. The IDE interface integrates
16x32-bit buffers for optimal transfers.

The ICH4’s IDE system contains two independent IDE signal channels. They can be
electrically isolated independently. They can be configured to the standard primary and
secondary channels (four devices). There are integrated series resistors on the data and
control lines (see Section 5.15, “IDE Controller (D31:F1)” on page 5-175 for details).

Low Pin Count (LPC) Interface

The ICH4 implements an LPC Interface as described in the LPC 1.0 specification. The

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Low Pin Count (LPC) Bridge function of the ICH4 resides in PCI Device 31:Function 0. In
addition to the LPC bridge interface function, D31:F0 contains other functional units
including DMA, Interrupt Controllers, Timers, Power Management, System Management,
GPIO, and RTC.

Note that in the current chipset platform, the Super I/O (SIO) component has migrated to
the Low Pin Count (LPC) interface. Migration to the LPC interface allows for lower cost
Super I/O designs.

Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)

The DMA controller incorporates the logic of two 82C37 DMA controllers, with seven
independently programmable channels. Channels 0–3 are hardwired to 8-bit, count-by-byte
transfers, and channels 5–7 are hardwired to 16-bit, count-by-word transfers. Any two of
the seven DMA channels can be programmed to support fast Type-F transfers.

The ICH4 supports two types of DMA (LPC and PC/PCI). DMA via LPC is similar to ISA
DMA. LPC DMA and PC/PCI DMA use the ICH4’s DMA controller. The PC/PCI
protocol allows PCI-based peripherals to initiate DMA cycles by encoding requests and
grants via two PC/PCI REQ#/GNT# pairs.

LPC DMA is handled through the use of the LDRQ# lines from peripherals and special
encodings on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes are
supported on the LPC interface. Channels 0–3 are 8 bit channels. Channels 5–7 are 16 bit
channels. Channel 4 is reserved as a generic bus master request.

The timer/counter block contains three counters that are equivalent in function to those
found in one 82C54 programmable interval timer. These three counters are combined to
provide the system timer function, and speaker tone. The 14.31818-MHz oscillator input
provides the clock source for these three counters.

The ICH4 provides an ISA-Compatible Programmable Interrupt Controller (PIC) that
incorporates the functionality of two 82C59 interrupt controllers. The two interrupt
controllers are cascaded so that 14 external and two internal interrupts are possible. In
addition, the ICH4 supports a serial interrupt scheme.

All of the registers in these modules can be read and restored. This is required to save and
restore system state after power has been removed and restored to the platform.

Advanced Programmable Interrupt Controller (APIC)

In addition to the standard ISA compatible Programmable Interrupt Controller (PIC)
described in the previous section, the ICH4 incorporates the Advanced Programmable
Interrupt Controller

Universal Serial Bus (USB) Controller

The ICH4 contains an Enhanced Host Controller Interface (EHCI) compliant host ontroller
that supports USB high-speed signaling. High-speed USB 2.0 allows data transfers up to
480 Mb/s which is 40 times faster than full-speed USB. The ICH4 also contains three
Universal Host Controller Interface (UHCI) controllers that support USB full-speed and

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low-speed signaling.

The ICH4 supports 6 USB 2.0 ports. All six ports are high-speed, full-speed, and low­speed capable. ICH4’s port-routing logic determines whether a USB port is controlled by
one of the UHCI controllers or by the EHCI controller. See Section 5.16, “USB UHCI
Controllers (D29:F0, F1 and F2) and Section 5.17, “USB EHCI Controller (D29:F7) for
details.

LAN Controller

The ICH4’s integrated LAN Controller includes a 32-bit PCI controller that provides
enhanced scatter-gather bus mastering capabilities and enables the LAN Controller to
perform high speed data transfers over the PCI bus. Its bus master capabilities enable the
component to process high-level commands and perform multiple operations; this lowers
processor utilization by off-loading communication tasks from the processor. Two large
transmit and receive FIFOs of 3 kB each help prevent data underruns and overruns while
waiting for bus accesses. This enables the integrated LAN Controller to transmit data with
minimum interframe spacing (IFS).

The LAN Controller can operate in either full duplex or half duplex mode. In full duplex
mode the LAN Controller adheres with the IEEE 802.3x Flow Control specification. Half
duplex performance is enhanced by a proprietary collision reduction mechanism. See
Section 5.2, “LAN Controller (B1:D8:F0)” on page 5-78 for details.

RTC

The ICH4 contains a Motorola* MC146818A-compatible real-time clock with 256 bytes of
battery-backed RAM. The real-time clock performs two key functions: keeping track of the
time of day and storing system data, even when the system is powered down. The RTC
operates on a 32.768 KHz crystal and a separate 3-V lithium battery that provides up to
seven years of protection.

The RTC also supports two lockable memory ranges. By setting bits in the configuration
space, two 8-byte ranges can be locked to read and write accesses. This prevents
unauthorized reading of passwords or other system security information.

The RTC also supports a date alarm that allows for scheduling a wake up event up to 30
days in advance, rather than just 24 hours in advance.

4.6 Clock Frequency Generator

The notebook utilizes the IMI CY28346 chip to supply the system clock needed to run the
computer. The following are the available clock frequencies:

System clock:

Clock generator IMI CY28346 support:

- 66/100 MHz for Pentium III Mobile CPU

- 30/33 MHz for PCI device bus clock use

- 48 MHz for PIIX4M

- 14.318 MHz for PIIX4M refresh use

•

14.318 MHz XTAL for Clock Generator use

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•

32.768 KHz XTAL for RTC real time clock

• 8.0 MHz XTAL for K/B controller use

• 14.318 MHz OSC for sound blaster use

4.7 Cache Memory

The primary (L1) and secondary (L2) level cache are integrated on the CPU. By
incorporating the cache on-die (meaning it is combined with the CPU into one component),
Intel eliminates the need for separate components. The 512KB on-die L2 cache provides
three (3X) times faster processor access, resulting in significant improvements in
performance. Likewise, an integrated cache means a reduction of connections resulting in
increased reliability.

4.8 System Memory

The memory subsystem, implemented on the motherboard, includes System and Video
memory. The Intel 852GM System Controller chip provides primary control for the system
memory.

4.8.1 System Memory

The notebook offers two 64-bit SODIMM (Small Outline Dual Inline Memory Module)
sockets for main memory configuration. The memory sockets accept any standard 144-pin
SODIMM modules at 128MB, 256MB,512MB and 1GMB sizes. Memory modules are
DDR 200/266 SDRAM type.

4.8.2 Video Memory

The video memory of the notebook is using share system memory with 8~32MB UMA
video memory that can support display resolutions of up to 1024 x 768 at 32-bit 16M color
(TFT LCD).

4.9 System BIOS

The notebook utilizes the Phoenix BIOS 4.0 Release 6.0 (Basic I/O System) that contains
both the main system BIOS and the VGA BIOS with Shadow BIOS capability. It utilizes
Flash EPROM BIOS that allows instant erasing and programming without replacing the
EPROM chip.

The BIOS is stored in a 32-pin PLCC package FLASH ROM SST 49LF040A with 4Mbit
size and is mounted into the motherboard. While posting the system, the Shadow RAM
will be enabled and the ROM will be disabled.

4.10 Video Subsystem

The video subsystem, embedded inside the North Bridge chip and the LCD panel, controls
the display output to both the LCD Panel screen and to the external VGA port.

4.10.1 Video Chip Controller

Features summary of the Intel 852GM Video Chip Controller:

Video Stream Decoder

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. Improved HW Motion Compensation for MPEG2
. All format decoder (18 ATSC formats) supported
. Dynamic Bob and Weave support for Video Streams
. Software DVD at 60 fields/second and 30 frames/second full screen
. Support for standard definition DVD (i.e. NTSC pixel resolution of 720x480, etc.) quality

encoding at low CPU utilization

Video Overlay
. Single high quality scalable Overlay and second Sprite to support second Overlay
. Multiple Overlay functionality provided via Arithmetic Stretch Blt
. 5-tap horizontal, 3-tap vertical filtered scaling
. Multiple Overlay formats
. Direct YUV from Overlay to TV-out
. Independent Gamma Correction
. Independent Brightness / Contrast/ Saturation
. Independent Tint/Hue support
. Destination Colorkeying
. Source Chromakeying

Multiple hardware color cursor support (32-bit with alpha and legacy 2-bpp mode)
Accompanying I2C and DDC channels provided through multiplexed interface
Display

. Analog Display Support
. 350-MHz integrated 24-bit RAMDAC that can drive a standard progressive scan analog

monitor with pixel resolution up to 1600x1200 at 85-Hz and up to 1920x1440 at 60 Hz

. Dual independent pipe support

‧ Concurrent: Different images and native display timings on each display device
‧ Simultaneous: Same images and native display timings on each display device

. DVO (DVOC) support
‧ Digital video out port DVOC with 165-MHz dot clock on 12-bit double pumped

interface

‧ Variety of DVO devices supported
‧ Compliant with DVI Specification 1.0, thereby providing support for a display

resolution up to 1400x1050 @ 75-Hz, up to 1600x1200 at 60-Hz, or up to 1920x1200 @
60 Hz
. Dedicated LFP (local flat panel) LVDS interface

‧ Single or dual channel LVDS panel support up to SXGA+(1400x1050 @ 60 Hz) panel
resolution with frequency range from 25-MHz to 112-MHz (single channel/dual channel)

‧ SSC support of 0.5%, 1.0%, and 2.5% center and down spread with external SSC clock
‧ Supports data format of 18-bpp
‧ LCD panel power sequencing compliant with SPWG timing specification
‧ Compliant with ANSI/TIA/EIA –644-1995 spec
‧

Integrated PWM interface for LCD backlight inverter control

‧ Bi-linear Panel fitting
. Tri-view support through LFP interface, DVO C port, and CRT Internal Graphics

Features
. Up to 64 MB of Dynamic Video Memory Allocation
. Display Image Rotation
. Core Frequency

‧ Display Core frequency of 133-MHz

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‧ Render Core frequency of 133-MHz
.
2D Graphics Engine

‧ Optimized 128-bit BLT engine
‧ Ten programmable and predefined monochrome patterns
‧ Alpha Stretch Blt (via 3D pipeline)
‧ Anti-aliased lines
‧ Hardware-based BLT Clipping and Scissoring
‧ 32-bit Alpha Blended cursor
‧

Programmable 64 x 64 3-color Transparent cursor

‧ Color Space Conversion
‧ 3 Operand Raster BLTs
‧ 8-bit, 16-bit, and 32-bit color
‧ ROP support
‧ DIB translation and Linear/Tile addressing

.
3D Graphics Engine

‧ 3D Setup and Render Engine
‧ Viewpoint Transform and Perspective Divide
‧ Triangle Lists, Strips and Fans support
‧ Indexed Vertex and Flexible Vertex formats
‧ Pixel accurate Fast Scissoring and Clipping operation
‧ Backface Culling support
‧ DirectX* and OGL Pixelization rules
‧ Anti-Aliased Lines support
‧ Sprite Points support
‧ Provides the highest sustained fill rate performance in 32-bit color and 24-bit W mode
‧

High quality performance Texture Engine

‧ 266-MegaTexel/s peak performance
‧ Per Pixel Perspective Corrected Texture Mapping
‧ Single Pass Texture Compositing (Multi-Textures) at rate
‧ Enhanced Texture Blending functions
‧ Twelve Level of Detail MIP Map Sizes from 1x1 to 2Kx2K
‧ Numerous Texture formats including 32-bit RGBA
‧ Alpha and Luminance Maps
‧ Texture Chromakeying
‧ Bilinear, Trilinear, and Anisotropic MIP - Mapped Filtering
‧ Cubic Environment Reflection Mapping
‧ Embossed Bump-Mapping
‧ DXTn Texture Decompression
‧ FX1 Texture Compression
‧ 3D Graphics Rasterization enhancements
‧ One Pixel per clock

‧ Flat and Gouraud Shading

‧ Color Alpha Blending for Transparency
‧ Vertex and Programmable Pixel Fog and Atmospheric effects

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‧ Color Specular Lighting
‧ Z Bias support
‧ Dithering
‧ Line and Full-Scene Anti-Aliasing
‧ 16 and 24-bit Z Buffering
‧ 16 and 24-bit W Buffering
‧ 8-bit Stencil Buffering
‧ Double and Triple Render Buffer support
‧ 16 and 32-bit color
‧ Destination Alpha
‧ Vertex Cache
‧ Maximum 3D resolution of 1600x1200 at 85- Hz (contact your Intel Field

Representative for detailed display information, i.e. pixel depths, etc.)

‧ Optimal 3D resolution supported
‧ Fast Clear support
‧ ROP support

4.10.2 Video Clock

Intel 852GM North Bridge provides input to generate VGA internal slate machine, MCLK,
and DCLK. Also provides 32.768 KHz O/P for video RAM refresh.

4.11 PCMCIA Controller

The PCMCIA controller of the notebook is implemented on the motherboard using the
RICOH R5C551 CardBus Controller. The Cavaliere 142 notebook only supports single
PCMCIA slot for PCI-Cardbus Bridge.

CARDBUS CONTROLLERS

The R5C551 is an ACPI and PC98/99 logo certified high performance, single slot PC Card
controller with a synchronous 32-bit bus master/target PCI interface. This PC Card to PCI
bridge host controller is compliant with the 2000 PC Card Standard. This standard
incorporates the new 32-bit CardBus while retaining the 16-bit PC Card specification as
defined by PCMCIA release 2.1. CardBus is intended to support "temporal" add-in
functions on PC Cards, such as Memory cards, Network interfaces, FAX/Modems and
other wireless communication cards, etc. The high performance and capability of the
CardBus interface will enable the new development of many new functions and
applications.

The R5C551 CardBus controller is compliant with the latest ACPI-PCI Bus Power
Management interface Specification. It supports all four power states and the PME#
function for maximum power savings and ACPI compliance. Additional compliance to On
Now Power Management includes D3 cold state support, paving the way for low sleep
state power consumption and minimized resume times. To allow host software to reduce
power consumption further, the R5C551 provides a power-down mode in which internal
clock distribution and the PC Card socket clocks are stopped. An advanced CMOS process
is also used to minimize system power consumption.

The R5C551 single PCMCIA socket supports the 3.3V/5V 8/16-bit PC Card R2 cards or

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32-bit CardBus R3 cards. The R2 card support is compatible with the Intel 82365SL PCIC
controller, and the R3 card support is fully compliant with the 2000 PC Card Standard
CardBus specification. The R5C551 is an additional buffer chip for the PC Card socket
interface. In addition, the R5C551 supports dynamic PC Card hot insertion and removal,
with auto configuration capabilities.

The R5C551 is fully complains with the 33Mhz PCI Bus specification, v2.2. It supports a
master device with internal CardBus direct data transfer. The R5C551 implements FIFO
data buffer architecture between the PCI bus and CardBus socket interface to enhance data
transfers to CardBus Devices. The bi-directional FIFO buffer permits the R5C551 to
accept data from a target bus (PCI or CardBus interface) while simultaneously transferring
data. This architecture not only speeds up data transfers but also prevents system deadlocks.

The R5C551 is a PCMCIA R2/CardBus controller, providing the most advanced design
flexibility for PC Cards that interface with advanced notebook designs.

R5C551 FEATURES – Slot Solution

• Supports only one PCMCIA 2.1 and JEIDA 4.2 R2 cards or 2 CardBus cards

• ACPI-PCI Bus Power Management Interface Specification Rev 1.1 Compliant

• Supports OnNow LAN wakeup, OnNow Ring Indicate, PCI CLKRUN#, PME#,

and CardBus CCLKRUN#

• Compliant with the 33Mhz PCI Specification V2.2, 2000 PC Card Standard 7.1 for

R5C551

• Yenta™ PCI to PCMCIA CardBus Bridge register compatible

• ExCA (Exchangeable Card Architecture) compatible registers map-able in

memory and I/O space

• Intel™ 82365SL PCIC Register Compatible

• Supports PCMCIA_ATA Specification

• Supports 5V/3.3V PC and 3.3V Cardbus cards

• Supports two PC Card or CardBus slots with hot insertion and removal

• Supports multiple FIFOs for PCI/CardBus data transfer

• Supports Direct Memory Access for PC/PCI and PCI/Way on PC Card socket

• Programmable interrupt protocol: PCI, PCI+ISA, PCI/Way, or PC/PCI interrupt

signaling modes

• Win'98 IRQ and PC-98/99 compliant

• Parallel or Serial interface for socket power control devices including Micrel and

TI

• Integrated PC 98/99 -Subsystem Vendor ID support, with auto lock bit

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• LED Activity Pins

• R5C551 supports D3cold state PME# wakeup; 3.3Vaux Power; and Zoomed video

buffer enable pins

• R5C551: "Built-in" live video, high throughput, multimedia ZV ports support

without additional buffers; 3V card protection during host system suspend with
Auto Card VS# resensing; dedicated ZV output port to LCD controller

SmartCardBus™ combines a Smart Card reader and CardBus controller in a single IC. In
addition to meeting PC Card standards, SmartCardBus is compliant to Microsoft PC/SC,
ISO 7816-1, -2, -3 electrical specifications, standard protocols including T = 0, T = 1, and
synchronous and asynchronous formats. SmartCardBus lowers the cost of ownership of e­commerce and corporate security Smart Card applications.

4.12 Audio Subsystem

The audio subsystem is integrated inside the South Bridge chip on the motherboard. Refer
to the System Core Logic section of this chapter.

An internal two-way mini speaker and microphone provide the notebook with mobile
sound generation and recording capabilities. In addition, a set of 3.5mm bayonet socket
(1/8” minijack) connectors allow for external microphone, line inputs, and headphone
outputs.

4.13 Keyboard and Pointing Device

The Keyboard Subsystem of the notebook is implemented on the Motherboard and
Keyboard Assembly using the Mitsubishi M38859 keyboard controller chip and the
Mitsubishi M38859 keyboard controller firmware. This chip controls the internal built-in
keyboard, the built-in touchpad pointing device, as well as the external PS/2 keyboard and
mouse port. The keyboard controller allows simultaneous use of both the internal and
external keyboard and PS/2 mouse.

The Cavaliere 142 membrane keyboard is an 86-key IBM 101-key enhanced compatible
keyboard with standard characters and 12 function keys including an embedded numeric keypad.
See Chapter 1 for more information.

The pointing device subsystem consists of the built-in Synaptics touch pad pointing device
module on the system top cover assembly and a pre-programmed Mitsubishi M38859
micro-controller that interfaces the mouse device to the Motherboard. The touch pad
module is connected to battery board through a 6-pin FPC cable. An external PS/2 port
also supports the use of an external PS/2 compatible mouse where the system
automatically detects on system power up and runs both internal and external mouse
simultaneously.

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The Synaptic touch pad, a pointing device for personal computers, detects the position of a
finger over a touch-sensitive area. To move the cursor, the user lightly slides a finger over
the smooth sensor area. To ‘click’, the user gently taps on the surface.

The ultra-thin module is the thinnest PCB based touchpad available today. It is a capacitive
sensor - the finger is detected by measuring its effect on an array of capacitive lines
integrated into the PC board. The pad senses both the finger’s position and its contact area
(X, Y, and Z). The area of contact is a measure of applied pressure. One side of the module
PC board is the sensor surface; electronic components are mounted on the other side. The
sensitive area is protected by a layer of smooth and durable mylar.

The Synaptic touch pad communicates with the host via a standard PS/2 mouse or trackball
interface. It is fully compatible with the standard Microsoft mouse driver. The module
connector includes the PS/2 signal pins, power supply pins and two connections for
external button switches.

The Synaptic touch pad includes a special “edge-motion” feature that allows the user to
extend a drag operation when the finger reaches the edge of the sensor pad. The cursor
continues to coast in the indicated direction when the finger is held against the edge.

4.14 Disk Drives Subsystem

The disk drives subsystem, implemented on the Motherboard and on the associated internal
hard disk drive assembly and device bay, provides disk storage for all system software and
user files.

The notebook is equipped with high capacity hard disk drive using Enhanced IDE
controller with LBA (Logical Block Addressing) and Ultra DMA mode support.

The ICH4 controller chip provides the Primary IDE controller for the internal hard disk,
and the Secondary Master for the CD-ROM.

The notebook uses the 24X-speed IDE CD-ROM Drive that reads digital data stored on
CD-ROM at 24 times faster rotational speed. The CD-ROM drive supports CD-DA
transfer over ATAPI function that the host system can read CD audio data. The drive also
supports Photo-CD Multi-session disc compatibility and Multimedia PC-3 specification
compatibility. The notebook also could use the 8X+ speed IDE DVD-ROM Drive that
reads DVD digital data stored on DVD-ROM at 8 times faster rotational speed.

4.15 Power Subsystem

The Power Subsystem consists of the following major sections:

4.15.1 AC Power Adapter

The computer is equipped with a 60W Peak 80W universal AC power adapter that converts
AC voltage (100 to 240VAC, 50 to 60Hz) into DC voltage used to operate the notebook
and charge the batteries.

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4.15.2 Internal Battery Pack

The computer utilizes Lithium-Ion (Li-Ion) that provides DC power for the notebook and
real time clock battery on the motherboard when the AC Adapter is not connected to the
computer.

The normal charging time for the battery is around 3.5 hours when computer is turn off
while it should take around 8 hours when the computer is running. Running time of battery
is around 4.5 hours.

4.15.3 DC-DC Module of Motherboard

The DC-DC module receives approximately 12VDC from the battery pack and uses this
input voltage to generate multiple regulated output voltages to provide power for all
internal notebook board assemblies.

4.15.4 LCD Inverter Board Assembly

The LCD Inverter Board Assembly is located in the LCD Panel Assembly. It converts the
+12VDC input directly from the Battery Pack into a high voltage AC output used to light
the CCFT (Cold-Cathode Fluorescent Tube).

4.16 Micro- P Subsystem (PMU-08)

The micro controller NEC PMU08 acts as a supplement for the power management control.
It supports many functions via the SMBus interface.

The system communicates with the PMU08 via the SMBus interface. The SMBus host
should be first initialized before starting the transaction. The following is the procedure for
system communication with PMU08:

1. Enable SMBus interface by writing 01h to SmbHstCfg register.

2. Get SMBus I/O port base address by reading from SmbBA register.

3. Clear SMBus status by writing 1Eh to SmbHstSts register.

4. Write the PMU07 slave address to SmbHstAdd register.

− Send command to PMU08 -- Slave address is 04h.

−

Read data from PMU08 -- Slave address is 05h.

5. Write the desired command to SmbHstCmd register.

6. Write the desired parameters to SmbHstDat0 (High byte) and SmbHstDat1 (Low
byte) registers if the system wants to send command to PMU08.

7. Wait for SMBus interrupt occurred by monitoring SmbHstSts register INTR bit.

8. Get the desired data by reading from SmbHstDat0 (High byte) and SmbHstDat1
(Low byte) registers if the system wants to read data from PMU08.

Features Summary of the Micro-P:

• 5 channels 8-bit analog to digital converter

•

Timer0: 8-bit tuner/counter with 8-bit prescaler

• Timer1: 16-bit timer/counter. TMR1 can be incremented during sleep via external

crystal/clock

• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler

• Capture, Compare, PWM module

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• Synchronous Serial port (SSP) with SPI and I

2

C

• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI)

•

Brown-out detection circuitry for Brown-out Reset (BOR)

• 2K bytes program memory

• 128 bytes data memory

• 22 I/O pin

•

8 interrupt sources

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Maintenance & Disassembly

5.1 Introduction

This section contains preventive and corrective maintenance procedures for the Cavaliere

142. The first part of the section describes the computer cleaning procedures and
preferred handling procedures for sensitive components (e.g. disk drives, LCD, CPU,
batteries).

The second part of the chapter identifies all field replaceable parts with the remainder
explaining the removal and replacement procedures for the field replaceable parts.

5.2 Preventive Maintenance

Preventive maintenance is limited to cleaning the plastic case, the keyboard, and the display
screen and cleaning the floppy drive heads as required.

5.2.1 Cleaning the Computer

When it is necessary to clean the plastic case and keyboard, use a soft lint-free cloth, slightly
dampened with a mild detergent solution, or use the contents of any commercially available
computer cleaning kit.

i Never use alcohol, petroleum-based solvents, or harsh detergents to clean the

notebook. Also, do not spray any liquids directly on the computer case,
keyboard, or screen. If the liquid-crystal display (LCD) screen has become
smeared or dusty, clean the screen by first applying a mild glass cleaner to a
soft, clean, lint-free cloth, and gently wipe the glass. Never apply liquids directly
on the screen surface. Moreover, do not use paper towels to clean the display
screen. Paper can scratch the display screen matte.

5.2.2 Maintaining the LCD Quality

When it comes to screen problems, heat plays a big part. After a good working session, the
typical routine is to shut the machine and close the cover. But the display surface - no matter
what type it is - and the components inside the computer radiates heat; when you close the
cover, you trap the heat against the screen. Leave the computer's cover open for about ten
minutes while the heat disperses. Make this a habit.

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5.2.3 Maintaining the Hard Disk Drive

The hard disk drive is one of the most common parts that always gets problem. Here is some
preventive maintenance that you can do when handling the hard disk.

• Always back up the data files from the hard disk.

• Run a virus detecting program for possible virus infected area on the hard disk.

• Use SCANDISK to correct any errors found in the directory and File Allocation Table

(FAT). This will also free up space from any unused sectors.

• Never turn the computer off when the hard disk is being accessed.

• Never move or raise the computer while the hard disk is being accessed, most especially

don't jar the hard disk as this may cause a hard disk crash.

• Use hard disk system tools like Disk Defragmenter under Windows. This reorganizes

your hard disk by eliminating fragmentation and improves the hard disk access time.

5.2.4 Handling the Computer Battery Packs

The battery packs furnished with the computer require reasonable care and handling to ensure
efficient operation and maximum life. Periodically inspect the battery terminals and the
batteries for evidence of corrosion and oxide build-up.

To ensure that the battery packs endure normal life cycle, always observe the following
precautions when handling the battery packs:

• Do not drop the battery packs or subject them to excessive shock and vibration.

• Do not expose the battery packs to direct sunlight, moisture, or chemical compounds.

• Do not disassemble the battery packs.

• Do not use the battery packs to power other devices.

• Do not short the battery leads or connect the battery with reversed polarity.

• Never attempt to charge the battery packs in any way other than as described in this

manual and the User’s Manual.

• Always charge the battery packs as soon as possible after a low battery indication.

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5.3 Required Tools and Equipment

To troubleshoot and repair PC systems properly, you need a few basic tools:

• Tweezers

• Small flat-blade screwdriver

• Small Cross screwdriver

• Regular size Cross screwdriver

• Small Hex-bolt screwdriver

i All boards, options, and peripherals contain components that are sensitive to

static electricity. When handling any of these items, use wrist or ankle grounding
straps and grounded working mats. When moving or storing items, use the anti­static bags supplied with the items.

5.4 Notebook Field-Replaceable Parts and Assemblies

The notebook contains two major assemblies: The Cover Display LCD Assembly and the
System Unit Assembly.

Easy Buttons

Built-in Stereo

Speakers

Touchpad Pointing

Device

Color LCD Display

Œ

•
’

Integrated

Microphone

Power On/Resume

Button

Figure 5-1 Cover Display and System Unit Assembly

Built-in Stereo

•

Speakers
Status LED Indicator

•

➑

Keyboard

Ž
‘

❾

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5.4.1 Cover-Display LCD assembly

The Cover-Display LCD Assembly includes the following major Field Replaceable
Units/parts (FRUs):

• LCD Face and Back Panel Cover

These parts are used to cover the whole LCD Panel assembly, which includes the LCD
Display Module, the LCD FPC cables, and inverter board.

• LCD Display Module

“13.3” LCD (Liquid Crystal Display) screen is used for output display. This part is
assembled together with LCD Power Inverter Board, and LCD cables contained inside the
whole LCD Panel. Handle this part with care against static electricity and accidents that
can break the LCD.

• LCD Power Inverter Board

This part or PCB (Printed Circuit Board) is used to provide high voltage to the CCFT
(Cold Cathode Fluorescent Tube) of the notebook’s LCD backlighting. It is connected to
the right side of the LCD display screen and attached to the back panel by a screw.
Exercise safety electrical precautions in handling and servicing this part. The circuit board
also includes the function for displaying the power status and battery charge LED
indicators.

• LCD FPC Cable

The LCD FPC cable is used to convert output signals from the motherboard in driving the
LCD display screen. The cable is connected to the back of the LCD Panel.

5.4.2 System Unit Assembly

The System Unit Assembly comprise of several assemblies of which can be divided into two
major sub-assemblies.

• The System Top Unit Assembly.

• The System Base Unit Assembly.

The following System Top Unit Assembly includes the following major Field Replaceable
Units/parts (FRUs):

• Glidepad Touch Pad Module Assembly

The touch pad (glide pad) pointing device module is assembled at the underside of the top
cover with the sensor pad exposed on the top. The assembly comprises of the glide pad
board, the glide pad converter board, the select buttons bracket casing, the insulator sheet,
the glide pad FPC cable, and the glidepad wire cable. The glide pad board is assembled
just underneath the select button assembly. It provides a FPC cable connector for the
mother board.

• Keyboard Panel Assembly

The keyboard is assembled on top of the system unit and connected to the main board’s
keyboard FPC type connector. The keyboard is also secured on the system’s top unit
casing. There are no screws attached to the keyboard.

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• Heat Plate and Fan Exhaust Unit

The Fan Exhaust unit is assembled on the upper-right side of the system unit. It comprises
of a heat plate and one fan. There are seven screws securing the heat plate to the CPU
module inserted on the motherboard. The exhaust fan is secured beside the heat plate.

• Keyboard Cover Assembly

The keyboard cover is a thin bracket for holding the keyboard as well as covering the
base unit. It is also includes the power button, easy buttons, and status LED cover
moldings.

The following System Base Unit Assembly includes the following major Field Replaceable
Units/parts (FRUs):

• Battery Pack

This is one of more easily replaceable parts. The battery pack is found on the right side on
the base unit and can be easily removed by pressing the latch underneath the unit and
pulling the battery on its handle. The battery pack is replaced as a whole and must not be
opened for repair.

• Hard Disk Drive Module

The Hard Disk Drive is attached on the lower-left side of the system base unit located just
below the keyboard. The HDD is secured by only one screw. The HDD module is a 2.5­inch hard disk drive with a maximum height of 9.5mm. The hard drive module assembly
is attached to the motherboard through the HDD connector.

• CD-ROM / DVD-ROM Drive Assembly

The CD-ROM / DVD-ROM / Drive Assembly is attached on the right side of the base
unit and is lock with one latch.

• CPU

The Pentium socket is found on the top right part of the motherboard. You will need a flat
screwdriver and CPU tooling for removing or installing the CPU. Refer to Chapter 2 on
how to install and upgrade the CPU.

• Speaker Assembly

The internal speakers of the notebook are assembled into front side of the system. They
are secured into a slot and speaker cable connector is attached into the main board.

• Motherboard Assembly

The Motherboard assembly is the most important part of the notebook. It contains the
entire major chipsets including the core logic, PCMCIA, memory, and BIOS to operate
the whole computer. It also includes the sockets, connectors and ports completing the
functionality.

• Internal Modem / LAN / Combo Module Assembly

If the computer includes an internal modem, LAN

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• System Base Unit Case

The System Base Unit Case is where the Motherboard is placed. It includes openings for
the battery, FDD, CD-ROM and PCMCIA equipment.

5.5 Parts Removal and Replacement Procedures

This section contains the field service-level removal/ replacement procedures for the
notebook. The notebook is designed for optimum modularity in order to make field
replacement and maintenance easy and efficient.

5.5.1 Removing the Battery Pack

The procedure for removing and replacing the battery pack is as follows:

To remove the battery pack, slide the latch to right side and hold it, then take out the battery
pack with your finger.

Figure 5-2 Removing the battery pack

5.5.2 Removing the Keyboard

The internal keyboard is located above the system top unit and is fitted in without screws on
the top unit case. Follow the steps below on how to remove the keyboard:

1. There are four screws on the bottom case and that should be removing as the picture

indicated.

Figure 5-3 Four screws of Keyboard cover

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2. Remove keyboard cover by gently bending it and sliding it towards in front of you.

Figure 5-4 Remove Keyboard Cover

3. Lift the keyboard and tilt it towards the LCD panel.

4. Release keyboard cable by sliding the ZIF connector towards up direction.

Figure 5-5 Remove keyboard

5.5.3 Removing the Internal Hard Disk Drive

The notebook provides a built-in hard disk for the primary IDE controller. The HDD is an
industry standard 2.5” IDE disk drive with a maximum height of 9.5mm.

1. Find out the built-in hard disk secured with four screws at the upper lift of the bottom

case. Remove this screw and carefully pull the hard disk module from the connector.

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Figure 5-6 The disassembly of Hard Disk Drive

2. Remove four screws of frame HDD bracket plate.

Figure 5-7 Screws Locations of the frame HDD bracket plate

5.5.4 Removing the LCD Panel

The procedure for removing the LCD Panel is as follows:

1. There are three screws as the picture indicated for removing LCD panel .

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Figure 5-8 Removing the three screws on the bottom case

2. To remove the two screws and two hex-bolds of rear side for the system unit.

Figure 5-9 Two Screws and two hex-bolds

3. Removing the two screws of LCD connector and one LCD cable.

Figure 5-10 Two Screws and one LCD cable

2. Slowly pullout the LCD panel from the system unit.

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5.5.5 Removing the Heat Sink and Sub-board

1. Removing the heat sink, there are four screws and one FAN cables as the picture shown.

Figure 5-11 Removing Heat Sink and Sub-board

5.5.6. Removing the Intel CPU

The Cavaliere 142 features Intel Pentium M uFC-PGA Processors. It is located on the upper left side
of the system motherboard.

To install or replace the CPU, follow the steps below:

1. Before removing the CPU module, you need first to disassemble keyboard and heat sink

plate.

2. Using a flat screwdriver, turn the socket lock counter-clockwise direction to unlock CPU

from the socket.

Figure 5-12 CPU Assembly

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5.5.7 Removing the Top Cover

The procedure for removing the top cover is as follow:

Please see the location of top cover as the below picture shown.

1. To remove the top cover, you also need to remove the three screws and four cables ----

one is called MDC cable, the other one is Microphone cable and another one is MDC
FPC and also G/P FPC from the Top case .

Figure 5-13 Location of Top Cover

2. There are total eleven screws on the bottom case

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Figure 5-14 Removing the eleven screws of bottom case

5.5.8 Removing / Replacing the Motherboard

The motherboard contains the major chipset and components needed to run the Cavaliere 142
notebook. Follow the steps below on how to remove and replace the motherboard:

1. Before removing the motherboard, you need first to disassemble the all basis unit

modules mentioned in the previous sections.

2. On the motherboard, there are two screws and one hex bolt . Remove these hex bolts and

screws.

Figure 5-15 Motherboard Screws Location

3. When all screws ,bolts, slowly detached the main board from the base unit casing. Notice

the close gap between the volume control knob and button case and may use the specific
tooling to separate them more easily.

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Notebook Specification

This appendix provides the technical specification of the Prestigio Cavaliere 142 notebook:

A.1 System Specification

CPU Intel Pentium – M Processor

: Banias 1.3/1.4/1.5/1.6/1.7 GHZ

Core Logic

Cache Memory L1 Cache (Pentium Processor internal):

Intel Montara-GM (North Bridge) :

CPU(Banias) I/F
VGA Controller

LVDS I/F
DVOB&DVOC IF.

RGB analog I/F
200/266 DDR MEMORY I/F
Hub-Link I/F

Intel ICH4-M (South Bridge) :

Integrated Hub-Link I/F to connect with PCI

Dual IDE Master/Slave Controller ,Integrated
DMA Controller

1.1/2.0 Universal Serial Bus Host Controller
Integrated 10/100M Fast Ethernet MAC
Controller
Integrated Audio Controller with AC97 V2.2
Interface
Advanced Power Management(ACPI)

RTC

Integrated PCI to LPC Bridge
Integrated Audio Controller with AC97 Interface
PCI Bus Interface (PCI 2.2 compliant)
GPIO

Advance PIC

12KB code and 8KB data
8-way cache associativity provides

L2 Cache (Pentium Processor internal):
256KB Advanced Transfer Cache,8 way associativity
8-way set associative, 32-byte line size, 1 line per
sector

Bridge

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System
Memory

BIOS ROM Flash ROM

Super I/O
RTC +
NVRAM

K/B Controller

PMU New PMU08

VGA
Controller

VRAM Share system memory, UMA (using DVMT configuration)
TV out encoder None
CardBus
Controller

Sound

Modem Askey / Actiontec MDC modem

Expansion Memory: 2 SO-DIMM Slot (1.25”)
Size: 128/256/512MB/1G
Type: DDR DRAM, 3.3V
Data Path: 64Bit
Frequency : 266/200MHz

Refer to the Cavaliere 142 Key component list in detail.

1st Vendor : SST 49LF004A TSSOP Package 4Mbit LPC
flash ROM
2nd Vendor : <TBD>
4Mbit, 32 pin TSSOP package
PS: PLCC32 Package is just for DEBUG
None
Integrated in South Bridge (Intel ICH4-M)
Real Time Clock with 256 byte extended CMOS.
IBM AT Clock/Calendar/Alarm (14 Bytes)

Mitsubishi M38859 LPC KBC

Internal K/B, Touch Pad, External K/B or M/S
Supported A20Gate,firmware version 2.14

Mitsubishi M38859FFHP
Embedded Controller
Embedded in Intel Montara-GM
High Performance and high quality 3D
accelerator
Integrated dual DVO bridge
Integrated LVDS Interface
Integrated RGB analog Interface
High performance 2D accelerator
Complete TV-OUT/Digital Flat Panel Solution

RICOH R5C551 (PCI Card Bus controller)

PC/Card Bus Type II x1

Build in smart card (none)
AC’97 CODEC
Realtek ALC202
AC’97 Revision 2.2 Compliant

V.90, K56flex, ITU-T V.34, V.32, RJ11 Jack
TIA/EIA 602, V.42
ITU-T V.17, V.29, V.27ter, V.21 Ch2
TIA/EIA 578 Class1 FAX
Wake up on Ring

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On board LAN Intel ICH4-M + Intel 82562EZ

Support LAN boot
Support for auto-negotiation (10BASE-T and 100BASE­TX)
Wake up On LAN

3com Combo

802.11b Support by Intel Calexico Mini-PCI Wireless LAN Card
<Design Ready Only>

1394 RICOH R5C551, support one port
Cellular I/F Support PDC/PIAFS/CdmaOne/Dupa(None)

USB
Intel ICH4-M

IDE Interface
(Intel ICH4-M)

Printer
Interface

Serial Interface
External PS/2

Port
(M38859)

Universal Serial
Bus
(Intel ICH4-M)

Integrated in South Bridge Intel ICH4-M)
USB v.1.1 and Intel Universal HCI v.1.1 compatible
USB v.2.0 and Enhance Universal HCI v.2.0 compatible
Eighteen level (doublewords) data FIFO with full scatter
and gather capability
Root hub and four function ports

Integrated physical layer transceivers with optional

over-current detection status on USB inputs

Fast IDE, 2 ports:

--Integrated multithreaded I/O link mastering with read
pipelined streaming

--Dual independent IDE channel each with 16 DW FIFO

--Native and compatibility mode

--PIO mode 0,1,2,3,4, and multiword DMA mode 0,1,2

--Ultra DMA 33/66/100

None

None

External Keyboard or PS/2 Mouse
Exclusively connected.
Can use both device by using branch cable(option)

--Integrated multithreaded IO link mastering

--Dual independent OHCI controllers with root hub

--Support up to 6 USB ports

--Support legacy devices

--Over current detection equipped

--Option to separately configure each port as a wake-up
source

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