Philips VES1.1E Schematic

Colour Television Chassis

VES1.1E

See table of contents on page 3

Published by MB/SC 1363 Quality Printed in the Netherlands Subject to modification EN 3122 785 19393

2013-Mar-29

2013 ©

TP Vision Netherlands B.V.

All rights reserved. Specifications are subject to change without notice. Trademarks are the property of Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change pr oducts at any time without being obliged to adjust earlier supplies accordingly. PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.

EN 2 VES1.1E LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Manual xxxx xxx xxxx.1

• Added the Service Mode menu

Manual xxxx xxx xxxx.2

• Added several new sets to this chassis, see table 2-1

Described

model numbers.

• Added the section Hotel Mode setup menu

Manual xxxx xxx xxxx.3

• Added several schematics of the SSB

• Added the schematics of the PSU

2. Technical Specifications and Connections

Index of this chapter:

Technical specifications Directions for Use

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described model numbers

CTN Styling Published in:

19PFL2908H/12 2900 3122 785 19392 22PFL2807H/12 2800 3122 785 19390 22PFL2908H/12 2900 3122 785 19392 24HFL2808D/12 24PFL2908H/12 26HFL2808D/12 2800 3122 785 19392 26PFL2908H/12 32PFL2807H/12

2800 3122 785 19392 2900 3122 785 19392

2900 3122 785 19392 2800 3122 785 19390

Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

2013-Mar-29

back to

div. table

Contents

1 Introduction ............................................................................................................................................. 6

1.1

1.2 SSB Placement of Blocks .................................................................................................................. 8

2 Tuner (TU3) .............................................................................................................................................. 9

2.1 General description of the Sony RE216 tuner .................................................................................. 9

3 Audio amplifier stage with AZAD2102 (U163, U164) ............................................................................. 11

3.1 General description ........................................................................................................................ 11

3.2 Features .......................................................................................................................................... 12

3.3 Absolute

3.4 Pinning ............................................................................................................................................ 15

4 Audio amplifier stage with TPA3113 (U168) .......................................................................................... 15

4.1 General Description ....................................................................................................................... 15

4.2 Absolute Ratings ............................................................................................................................. 16

General

3.3.1 Electrical

3.3.2 Operating

4.2.1 Electrical Characteristics ........................................................................................................ 16

Block

Diagram

Ratings

Characteristics

specifications

................................................................................................................... 7

........................................................................................................................... 13

....................................................................................................... 13

....................................................................................................... 14

4.2.2 Operating

4.3

5 Power stage ............................................................................................................................................ 18

5.1 Power management ....................................................................................................................... 21

6 Microcontroller – MSTAR (U5) ............................................................................................................... 23

6.1 Description ..................................................................................................................................... 23

6.2 MSTAR block diagram .................................................................................................................... 27

6.3 Reset circuit .................................................................................................................................... 28

7 CI interface ............................................................................................................................................. 28

8 USB interface .......................................................................................................................................... 29

9 DDR2 SDRAM K4T1G164QF (U155) ....................................................................................................... 30

9.1 Description ..................................................................................................................................... 30

9.2 Features .......................................................................................................................................... 30

Pinning ........................................................................................................................................................ 31

10 Scaler and LVDS sockets ..................................................................................................................... 32

Pinning

........................................................................................................................................... 17

Specifications

...................................................................................................... 17

10.1 LVDS sockets block diagram .......................................................................................................... 32

10.2 Panel supply switch circuit ............................................................................................................. 32

11 SPI flash memory - MX25L1005 (U158) ............................................................................................. 33

11.1 General Description ....................................................................................................................... 33

11.2 Features.......................................................................................................................................... 33

11.3 Absolute maximum ratings ............................................................................................................ 34

11.4 Pinning ............................................................................................................................................ 34

12 NAND Flash memory – NAND512XXA2C (U162) ................................................................................ 35

12.1 General Description ....................................................................................................................... 35

12.2 Features .......................................................................................................................................... 35

12.3 Pinning ............................................................................................................................................ 36

13 LNBH23L (U6) ..................................................................................................................................... 37

13.1 Description ..................................................................................................................................... 37

13.2 Features.......................................................................................................................................... 37

13.3 Block diagram ................................................................................................................................. 38

14 Advanced DVB-S/S2 demodulator M88DS3002 (U3) ....................................................................... 38

14.1 Description ..................................................................................................................................... 38

14.2 Features.......................................................................................................................................... 38

14.3 Pin Assignment .............................................................................................................................. 40

15 LM1117 (U175, U180, U181) .............................................................................................................. 41

15.1 General description ........................................................................................................................ 41

15.2 Features .......................................................................................................................................... 41

15.3 Applications .................................................................................................................................... 41

15.4 Absolute maximum ratings ............................................................................................................ 41

15.5 Pinning ............................................................................................................................................ 42

16 MP2012 (U176) .................................................................................................................................. 42

17 General description ............................................................................................................................ 42

17.1 Features .......................................................................................................................................... 42

17.2 Pinning ............................................................................................................................................ 43

18 RTA8283A (U23, U173) ....................................................................................................................... 43

18.1 General description ........................................................................................................................ 43

18.2 Features .......................................................................................................................................... 43

18.3 Pinning ............................................................................................................................................ 45

19 MP1583 (U174) .................................................................................................................................. 46

19.1 General description ........................................................................................................................ 46

19.2 Features .......................................................................................................................................... 46

19.3 Pinning ............................................................................................................................................ 46

20 FDC642 ............................................................................................................................................... 47

20.1 General description ........................................................................................................................ 47

20.2 Features .......................................................................................................................................... 47

20.3 Pinning ............................................................................................................................................ 47

21 FDC604P ............................................................................................................................................. 48

21.1 General description ........................................................................................................................ 48

21.2 Features .......................................................................................................................................... 48

21.3 Pinning ............................................................................................................................................ 48

22 Connectors ......................................................................................................................................... 49

22.1 SCART (SC1) .................................................................................................................................... 49

22.2 HDMI (CN707, CN708) ................................................................................................................... 49

22.3

VGA (CN711)

................................................................................................................................. 50

23 Service menu mode ............................................................................................................................ 51

23.1 Main service menu ......................................................................................................................... 51

23.2 Video Settings ................................................................................................................................. 52

23.3 Audio Settings ................................................................................................................................ 52

23.4 Options 1 ........................................................................................................................................ 53

23.5 Options 2 ........................................................................................................................................ 53

23.6 Tuning Settings ............................................................................................................................... 54

23.7 Source Settings ............................................................................................................................... 54

23.8 Diagnostic ....................................................................................................................................... 54

23.9 USB operations ............................................................................................................................... 54

23.10 Profile Operations ...................................................................................................................... 57

23.10.1 Upload profile Data from USB ............................................................................................ 57

23.10.2 PQ Files Operations ............................................................................................................ 57

23.10.3 Upload PQ files from USB ................................................................................................... 57

23.10.4 Ci+ credentials key update ................................................................................................. 57

23.10.5 HDCP keys update .............................................................................................................. 57

23.10.6 Edid update ....................................................................................................................... 58

23.10.7 DDR settings update ........................................................................................................... 58

23.10.8 MAC address update .......................................................................................................... 58

23.11 Hotel Mode setup menu ............................................................................................................ 58

23.11.1 Hotel TV welcome image update (only available in Hotel TVs) ......................................... 58

24 Software update ................................................................................................................................. 59

25 Troubleshooting ................................................................................................................................. 59

25.1 No backlight problem ..................................................................................................................... 59

25.2 CI module problem ......................................................................................................................... 61

25.3 LED blinking problem ..................................................................................................................... 63

25.4 IR problem ...................................................................................................................................... 63

25.5 Keypad touchpad problems ........................................................................................................... 64

25.6 USB problems ................................................................................................................................. 65

25.7 No sound problem.......................................................................................................................... 65

25.8 No sound problem at headphone .................................................................................................. 66

25.9 Standby On/Off problem................................................................................................................ 66

25.10 DVD problems ............................................................................................................................ 67

25.11 No signal problem ...................................................................................................................... 67

26 Styling sheet ....................................................................................................................................... 69

27 Schematics .......................................................................................................................................... 70

27.1 SSB .................................................................................................................................................. 70

27.2 PSU ................................................................................................................................................. 79

1 Introduction

The SSB is driven by a MStar SOC. This IC is capable of handling Video and audio processing, Scaling-Display processing, 3D comb filter, OSD and text processing, LVDS transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C demodulator and media center functionality.

The TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’ including German and NICAM stereo. Also DVB T, DVB-C are supported internal demodulators of Mstar IC and DVB-S/S2 is supported with external demodulator.

Sound system output is supplying max. 2 × 2.5 W (less 10% THD at maximum output) with 4

Ω

speakers or 2 × 6 W for stereo 8 Ω

speakers.

Supported peripherals are:

1 RF input VHF I, VHF III, UHF @ 75 Ω (Common) 1 Side AV (CVBS, R/L_Audio) 1 SCART socket (Common) 1 YPbPr (Optional) 1 PC input (Common) 2 HDMI 1.3 input (1 HDMI input is common, 1 input is optional) 1 S/PDIF output (Optional) 1 Headphone (Optional) 1 Common interface (Common) 1 USB (Common) 1 DVD (Optional) 1 On-board Keypad (Optional) 1 External Keypad (Optional) 1 External TouchPad (Optional)

1.1

GPIO

General

Block

Diagram

D3K

••

HDIJI1

Mstar

VGA

-HPOEre

cr-.

2XIi'H

.O.UDIO AU'

Block Diagram

V1.1

Drawn

By Ulas

03.01.2011

Dere i

1.2 SSB Placement of Blocks

Sat Demod

Tuner(T3 )

External Keyboard Touchboard

DVD Connector

Power Connector

CI Connector

Nand Flash (U162)

LVDS

Connectors

USB

Main IC

(U5)

DDR2 RAM (U155)

YPbPr SAV HP

Satellite Tuner

SPI Flash

HDMI Connectors

Adapter DC Input

VGA

SPDIF Out

Keypad

SCART Connec tor

Speaker Con.

Led Con

Inv. Con

2 Tuner (TU3)

A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3 Bands (From 48 MHz to 862 MHz for COFDM, from 45.25 MHz to 863.25 MHz for CCIR channels). The tuning is available through the digitally controlled I2C bus (PLL).

In the active antenna option, the following circuits are used. ANT_CTRL pin is controlled by microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR will be high.

OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by circuits and microcontroller.

2.1 General description of the Sony RE216 tuner

The SUT-RE216 is designed for terrestrial TV (digital & analog) and digital cable reception. It includes a full band tuner and a channel filtering for digital signals. It provides a low IF output after channel filtering to drive a channel demodulator. Tuning, band switching and initialization are made via an I interface. The module is built on a low-loss printed circuit board carrying all the components in a metal housing frame with top and rear covers. The single aerial connector is mounted on one frame side and all other connections are made via pins at the bottom.

Features:

 Full frequency range from 47 to 870 Mhz

• Digital Platform (DVB-T/T2, DVB-C, ISDB-T & ATSC)

 Analog platforms (PAL B/G/I/D/K, NTSC M & SECAM L/L’)  Low IF tuner concept

C bus

Programmable channel Filter

Fully

I2C

bus

controlled

For Hybrid TV

AGC:

applications

---------------------------------------•

bandwidth

----{)-------w.

---

---o

..-----'M'h\--{®f-----....-!-'N\\-OIAocI

1000

1KO

3.3V pull up

1uF

---Pinning Table

and Application Block Diagram of Tuner---

3 Audio amplifier stage with AZAD2102 (U163, U164)

3.1 General description

This chassis uses two 2.5 W Class D Mono Audio Amplifers for from 16" to 24" TVs.

AZAD2102B AVdd = DVdd = 5.5 Volt) with high efficiency filter-free class-D audio power amplifier in a 1613 mm x 1613 mm wafer chip scale package (W CSP). AZAD2102B uses Current- switch technology to achieve high performance class-d amplifier that features 0.03% THD, 85% efficiency, –70 dB PSRR, to improve RF-rectification immunity.

AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output. This vibration frequency is around 10 kHz shift (+/- 5 kHz of Fpwm).

The advantage of the small size package (WCSP) makes AZAD2102B very suitable for mobile phone and PDA device application. And the Class-D amplifier structure let AZAD2102B to have highly efficiency power consumption than Class-AB amplifier. AZAD2102B can shrink the application board, reduce system cost, and external components.

ESD level protection I/O embedded in AZAD2102B. For general applications, there is no need to add extra ESD protection devices (like Varistors) in application systems for AZAD2102B’s I/O.

is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3 Ω,THD = 10%,

3.2 Features

• CMOS Technology

• High Efficiency 85%

• High PSRR 70 dB at 217 Hz

• Differential OP-amp Input

• AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI

• Provide Mute function (set Mute_B to GND will go into Mute status)

• For the input stage AZAD2102B built-in a 10Kohm resistors (Gain

setting = 29.5 dB)

• Maximum Battery Life and Minimum Heat

• Efficiency With an 8 Ω

• 3.5 mA Quiescent Current

• Output Power at 10% THD

• 2.85 Watts at AVdd = DVdd = 5.0 Volt, Rload = 4 Ω

• 1.45 Watts at AVdd = DVdd = 3.6 Volt, Rload = 4Ω

• 0.30 Watts at AVdd = DVdd = 3.0 Volt, Rload = 4Ω

• 1.75 Watts at AVdd = DVdd = 5.5 Volt, Rload = 8Ω

• 0.87 Watts at AVdd = DVdd = 3.6 Volt, Rload = 8Ω

• 0.41 Watts at AVdd = DVdd = 3.0 Volt, Rload = 8Ω

• Eliminate Power on and Power-off “Pop” noise

• A fewer external components

• Optimized PWM output stage eliminates LC output filter

• Internally generate 290 kHz switching frequency to eliminate capacitor and resistor

• Improve PSRR (–70 dB) and wide supply voltage (3.0 V to 5.5 V)

•

Fully differential design reduces RF rectification

• This chip has been built-in a very strong ESD protection.

• System level ESD 4 KV (IEC 61000-4-2 ESD Contact Level)

• Wafer chip scale package (WCSP)

•

TSSOP package with exposed pad

Speaker:

Operating Votl

age

Vop AVdd-DVdd

AVss-DVss

3.0 5

5.5

RL=80 f=

217Hz

Common mode

rejectio

High level nput

current

Under

Voltage

3.3 Absolute

Ratings

3.3.1 Electrical

VDD = AVdd = DVdd, VSS = AVss = DVss = Ground

TA =

25˚C, Filter

ARAMETER

Output offset vol

Power supply ra

tio

Low level

current

Input

Operation cur

Characteristics

Bandwidth =

tage

rejection

rent

20 Hz -20 kHz

Symbo

vos

PSRR

Cf':lRR

IIHII

IlLI

lop

VDD = 5.5

VDD = 3.0

VDD

3.0 V

nput ac grounded with

Ci=2.2uF,Vripple=

= 3.0 V to 5.5 V,Vic =

VDD

0.5 V,Vi c = VDD/2

VDD=

5.5V,Vi=5.8V

VDD=

5.5V,Vi=-0.3V

5.5 V,no load

VDD

VDD = 3.6 V,no load

TEST COND TIONS

V,VI=

0 V,AV = 6 V/V

V,VI=

0 V,AV = 6 V/V

V,VI=

0 V,AV = 6 V/V 1.2

5.5 V, AV = 2 V/V

200mVpp,

0.5 VDD

3.0

VDD/2 to

-0.8 V,

MNI

TYP

4.5

MAX

6.5

UNIT

2.1

4.0

3.0

-68

-65

3.6

5.0

4.2

VDD = 3.6

Output

switchin

frequency

Vibration-Spectrum

Modulation

Protect

Mute_B

Gain

clock Ranqe

ion

pin Impedance

VDD = 3.0 V,no load

pwm

Fvs

UVP

RMuB

Gain

VDD = 5.5 V,no load

VDD = 3.6 V,no load

VDD = 3.0 V,no load

VDD = 5.0

Vin+

Mute_B

VDD=5.0V,Ri=5K0+10K

(Av=20V/V)

and

V,no load

Vin-

Ground

connect

GND,no load

2.5

3.5

290

300

315

+/-5 +/-10

2.0

270

2.5

KHz

V/V

VDD = 3.0 V

0.60

weighting

3.3.2 Operating

TA = 25°C,Gain = 20

THD+N

PSRR

SNR

Vnoise

CMRR

ARAMETER TEST COND

Output

power

Total ha

distortion

Supply

rejection ratio

Signal-to-noise r

Output noise

Common

rejecti

Input impedance

Feedback res

rmonic

ripple

specifications

V/V,

THO+ N = 10%,

= 4Q

THO + N

RL = 4 Q

THO+ N =

= 8Q

THO + N

VDD

plus

noise

VDD = 3.0 V,PO = 200

VDD Av=20V/V,Inputs grounded with

atio

VDD

kHz, nputs ac-grounded wi

Ci = l.OJJF

VDD = 3.6

level

mode

ratio

istor

TIONS

f = 1

kHz,RL

= 1%, f = 1

10%, f = 1kHz,RL

= 1%, f = 1 kH

= 8 Q

5.0 V,PO = 1W,RL = 8 Q,f = 1

3.6 V,PO = 0.5 W,RL = 8 Q, f = 1

3.6

connect

Ci = l.OJ,JF

5 V,PO = 1W,RL = 8 Q

3.6 V,f = 20 Hz

V,Vin = 100mVpp f

kHz,

mW,

RL = 8 Q, f = 1

= 5.0V

VDD

VDD = 3.6

VDD = 3.0 V

5.0 V

VDD

VDD = 3.6

VDD = 5.0

VDD = 3.6 V

VDD = 3.0

VDD

5.0 V

VDD = 3.6

VDD = 3.0 V

kHz

217 H.

VRipple mVpp

A wei

= 217Hz

= 200

ghting

MIN

TYP MAX

2.85

.45

0.77

2.25

1.15

1.75

0.87

0.47

1.39

0.70

0.36

0.15

0.12

0,09

-67

120

-72

10 12

150 180

UNIT

VDD

J,JVRMS

3.4 Pinning

4 Audio amplifier stage with TPA3113 (U168)

4.1 General Description

This chassis uses a 6 W Class D Mono Audio Amplifier for from 26” to 32” TVs. The TPA3113D2 is a 6 W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard™ speaker protection circuitry includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs.

The TPA3113D2 can drive stereo speakers as low as 4 Ω. The high efficiency of the TPA3113D2, 87%, eliminates the need for an external heat sink when playing music.

The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an auto-recovery feature.

3.2. Features

• 6 W/ch into an 8-Ω Loads at 10% THD+N From a 10-V Supply

• 12-W into a 4-Ω Mono Load at 10% THD+N From a 10-V Supply

• 87% Efficient Class-D Operation Eliminates Need for Heat Sinks

• Wide Supply Voltage Range Allows Operation from 8 V to 26 V

• Filter-Free Operation

• SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC

Protection

• Flow Through Pin Out Facilitates Easy Board Layout

• Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto

Recovery Option

• Excellent THD+N / Pop-Free Performance

• Four Selectable, Fixed Gain Settings

• Differential inputs

4.2 Absolute Ratings

4.2.1 Electrical Characteristics

IJV

·c

4.2.2 Operating

CHARACTERISTICS

= 25•c, Vee =

KsvR

THO+N Total

SNR Signa-l

fosc

V, RL

PARAMETER TEST CONDITIONS

Supply

ripple rejection

harmonic

Output integrated nois

Crosstalk

to-noise ratoi

Oscillator frequency

hermal trip

The

point

rmal hysteresis

4.3

NAME

FAULT

LINN

GAlNO

GAIN1

AVCC

AGNO

GVOO

PLIMIT

RINN

RINP

PBTL

PVCCR

BSPR

OUTPR

PGNO

OUTNR

BSNR

BSNL

OUTNL

PGNO

OUTPL

BSPL

PVCCL

Pinning

Specifications

= 8 0

(unless

distortion +noise RL = 8

Number

otherwise noted

200 mVpp Gain

20 Hz to 22 kHz,A-weighted fi

P0 = 1 W,Gain

Maxi

Gain

110/P

Gani select

Gani seel ct most

Bootstrap 110

Bootstrap 1/0 for right channel,

Bootstrap 1/0

Bootstrap 1/0 for left c

)

ripple

from 20

= 20 dB,Inputs ac-coupled to AGNO

0, f = 1kHz, Po = 3 W (half-p

= 20 dB, f = 1 kHz

mum output at = 20 dB, A-weighted

Shutdown enabled).TTL l

Open compilant to

FAULT pin

be reset by cycling PVCC.

Postiive

Negative audio input for left channeL

Analog supply

Analog signalgrou

High-side

Power powerlimit. Connect di

Negative

Positive

Not connected

ParallelBTL

Power supply for right channel H-bridge. Right c

supply inputs

Power supply for right channel H-bri channel

Class-0

Power ground for the H-bri

Class-0

Class-0 H-bridge ne

Power

Class-0

Power supply for left supply

logic input for audio amp (LOW =

drain output

audio

FET gate drive suppl

supply for PLIMIT function

limti leveladjust

audio input for right ch

audio

power

H-bridge

ground

H-bridge

inputs are

nputs

Hz-1kHz,

lter, Gani = 20 dB

THO+N

1%, f = 1 kHz

ogic l

evels with

used to display short cir

AVCC.Short circuit

SO pin. Otherwise,

input

for left channeL

least sign

ifi

cant bit. TTL

significant bit TTL logic l

nd.

Connect to the thermal pad.

Connect a resistor divi

rectly to

input

for right

channeL Bi

mode switch

are connect internally.

supply inputs

for

right channel, positive

positive output

negative

for left c

for the H-bri

positive output

connect internally.

are connect internally.

dges.

output for right c

hanne,l n

egative high-side FET.

gative output

dges.

hanne,l positive

channelH-bridge.

channelH-bri

ower)

DESCRIPTION

compli

ance to AVCC.

faults can be set

y.Nominalvol

GVOO for no power limit.

anne.l Biased at

negative

cuit

both

short circuit

Biased at

Biased at 3V.

logic levels with complian

evels with

ase

d at

dge. Right

high-side

for right c

for left

hannel.

high-side FET.

for left

channel.

channeL

high-side FET.

Right channel and left

dge. Right

MIN

TYP

250

outputs Hi-Z,HIGH = outputs

or de detect fault status.Vot

to auto-recovery

faults

and de

3V.

compliance

tage is 7V. Also

der

from GVOO

3V.

hanneland left channel

channelandleft

FET.

channel

and left

MAX UNIT

-70

0.06

-80

-100

102

310 350 kHz

150

by connecting

detect faults must

ce to AVCC.

AVCC.

should be

GND to se

channel power

lag

used

powe

dBV

5 Power stage

The DC voltages required at various parts of the chassis and panel are provided by a main power supply unit. This chassis can operate with the different supplies: IPS60, IPS16, IPS17, PW26, PW27 as main power supply and also with 12V adaptor.

CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW27.

JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with CN706 is used to supply backlight.

The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand- by mode DC voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V, 8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis block diagram is indicated below.

The blocks on power block diagram is using dependent to main supply. For PW26 and PW27 just common blocks are enough for proper operation.

For IPS16, IPS17, IPS60 below blocks must work properly.

For adapter case also below blocks are necessary.

Short CCT Protection Circuit

Short circuit protection is necessary for protecting chassis and main IC against damages when any Vcc supply shorts to ground. Protect pin should be logic high while normal operation. W hen there is a short circuit protect pin shold be logic low. After any short detection, SW forces LEDs on LED card to blink.

5.1 Power management

--- Power Management with Adaptor---

--- Power Management with PW25/ PW26---

--- Power Management with IPS16/IPS17/IPS60/PW05---

--- Power Management with PW03/PW04/PW07---

6 Microcontroller – MSTAR (U5)

6.1 Description

MSD9WB9PT-2 (Main IC) (U5)

The MSD9WB9PT-2 is MStar’s most up-to-date system-on-chip solution for flat panel integrated digital television products. Building on the success of MStar’s preceding SOC series, the MSD9WB9PT-2 provides most cost-effective solution for DTV application with creative and attractive features exclusively presented by MStar. The MSD9WB9PT-2 integrates DTV/multi-media all-purpose AV decoder, DVB-T demodulator, VIF demodulator, and Sound/Video processor into a single device. This allows the overall BOM to be reduced significantly making the MSD9WB9PT-2 a very competitive multi-media DTV solution. For ATV users, the MSD9WB9PT-2 provides multistandard analog TV support with adaptive 3D video decoding and VBI data extraction. The build-in audio decoder is capable of decoding FM, AM, NICAM, A2, BTSC and EIA-J sound standards. The MSD9WB9PT-2 supplies all the necessary A/V inputs and outputs to complete a receiver design including a multi-port HDMI receiver and component video ADC. All input selection multiplexed for video and audio are integrated, including full SCART support with CVBS output. The equipped MStar MACE-5 color engine is the latest masterpiece from MStar famous color engine series providing excellent video and picture quality in Full-HD and large-scale displaying system. To meet the increasingly popular energy legislative requirements without the use of additional hardware, the MSD9WB9PT-2 has an ultra low power standby mode during which an embedded MCU can act upon standby events and wake up the system as required.

The MSD9WB9PT-2 is composed of several modules:

• High Performance Micro-processor

o Ultra high speed/performance 32-bit RISC CPU o One full duplex UARTs o Supports USB and ISP programming o DMA Engine

• Transport Stream De-multiplexer

o Supports parallel and serial TS interface, with or without sync signal o Supports TS input and output for external CI module o Maximum TS data rate is 104 Mb/sec for serial or 16 MB/sec for parallel o 32 general purpose PID filters and section filters for each transport stream

de-multiplexer

o Supports additional audio/video/PCR filters o Supports TS DMA channel for time-shift o Supports 3DES/DES and AES encryption/decryption

• MPEG-2 Video Decoder

o ISO/IEC 13818-2 MPEG-2 video MP@HL o Automatic frame rate conversion o Supports resolution up to HDTV (1080i, 720p) and SDTV

•

MPEG-4

•

Hardware

•

NTSC/PAL/SECAM

•

Multi-Standard TV Sound Processor

•

Audio Interface

Video Decoder

o ISO/IEC 14496-2 MPEG-4 ASP video decoding o Supports resolutions up to HDTV (1080p@30fps) o

Supports DivX1 Home Theater & HD profilesOptional

o Supports VC-1Optional, FLV video format decoding

JPEG

o Supports sequential mode, single scan o

Supports both color and grayscale pictures

o Following the file header scan the hardware decoder fully handles the

decode process

o Supports programmable Region of Interest (ROI) o Supports formats: 422/411/420/444/422T o Supports scaling down ratios: 1/2, 1/4, 1/8 o Supports picture rotation

o Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B,D, G, H, M, N, I, Nc),

and SECAM standards

o Automatic standard detection o Motion adaptive 3D comb filter o Five configurable CVBS & Y/C S-video inputs o

Supports Teletext, Closed Caption (analog CC 608/ analog CC 708/digital

608/digital CC708), V-chip and SCTE

o SIF audio decoding o Supports BTSC/A2/EIA-J demodulation o Supports NICAM/FM/AM demodulation o Supports MTS Mode Mono/Stereo/SAP in BTSC/ EIA-J mode o Supports Mono/Stereo/Dual in A2/NICAM mode o Built-in audio sampling rate conversion (SRC) o Audio processing for loudspeaker channel, including volume, balance,

mute, tone, EQ,virtual stereo/surround and treble/bass controls

o Advanced sound processing options available,for example: SRS1, BBE2,

QSound3, Audyssey4

o Supports digital audio format decoding:

MPEG-1,

  Supports Optional Dolby Digital Plus, Dolby mPulse, and MS10

multistream decoder, including Dolby Digital Encoder for transcoding streams to Dolby Digital 5.1 (DDCO)

 Supports MPEG Audio, Dolby Digital, Dolby Digital Plus format AD

(Audio Description)

o Supports PVR and time-shifting

o One SIF audio input interface with minimal external saw filters o Four L/R audio line-inputs o Two L/R outputs for main speakers and additional line-outputs o Supports stereo headphone driver

o I

S digital audio input & output

o S/PDIF digital audio output o HDMI audio channel processing o Programmable delay for audio/video synchronization

Video

Decoder

MPEG-2 (Layer I/II), MP3, Dolby Digital (AC-3), AAC-LC

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