Datasheet UBA2070 Datasheet (Philips)

INTEGRATED CIRCUITS
DATA SH EET
UBA2070
600 V CCFL ballast driver IC
Product specification Supersedes data of 2001 Sep 27
2002 Oct 24
600 V CCFL ballast driver IC UBA2070

FEATURES

Current controlled operation
Adaptive non-overlap time control
Integrated high voltage level shift function
Power-down function
Protected against lamp failures or lamp removal
Capacitive mode protection.

APPLICATION

The circuit topology enables a broad range of backlight inverters.

ORDERING INFORMATION

TYPE NUMBER
NAME DESCRIPTION VERSION
UBA2070T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 UBA2070P DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1

GENERAL DESCRIPTION

TheUBA2070isahighvoltageintegratedcircuitfordriving electronically ballasted Cold Cathode Fluorescent Lamps (CCFL) at mains voltages up to 277 V (RMS) (nominal value). The circuit is made in a 650 V Bipolar CMOS DMOS (BCD) power logic process. The UBA2070 provides the drive function for the two discrete MOSFETs. Besides the drive function the UBA2070 also includes the level-shift circuit, the oscillator function, a lamp voltage monitor, a current control function, a timer function and protections.
PACKAGE
2002 Oct 24 2
600 V CCFL ballast driver IC UBA2070

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT
High voltage supply
V
hs
Start-up state
V
DD(high)
V
DD(low)
I
DD(start)
Reference voltage (pin V
V
ref
Voltage controlled oscillator
f
bridge(max)
f
bridge(min)
Output drivers (pins GH and GL)
I
source
I
sink
Lamp voltage sensor (pin LVS)
V
LVS(fail)
V
LVS(max)
Average current sensor (pin CS)
V
offset
g
m
Ignition timer (pin CT)
V
OL
V
OH
high side supply voltage Ihs<30µA; t < 1 s −−600 V
oscillator start voltage 12.4 13 13.6 V oscillator stop voltage 8.6 9.1 9.6 V start-up current VDD<V
)
REF
DD(high)
170 200 µA
reference voltage IL=10µA 2.86 2.95 3.04 V
maximum bridge frequency 90 100 110 kHz minimum bridge frequency 38.9 40.5 42.1 kHz
source current VGH− VSH= 0; VGL= 0 135 180 235 mA sink current VGH− VSH=13V;
265 300 415 mA
VGL=13V
fail voltage level 1.19 1.25 1.31 V maximum voltage level 1.67 1.76 1.85 V
offset voltage VCS= 0 to 2.5 V 2 0 +2 mV transconductance f = 1 kHz 100 200 400 µA/mV
LOW-level output voltage 1.4 V HIGH-level output voltage 3.6 V
2002 Oct 24 3
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2002 Oct 24 4
V
DD
V
REF
book, full pagewidth

BLOCK DIAGRAM

Philips Semiconductors Product specification
600 V CCFL ballast driver IC UBA2070
n.c.
GND
CT
8
5
1
REFERENCE
CURRENT
SUPPLY
IGNITION TIMER
VOLTAGE
CONTROLLED
OSCILLATOR
I
V
714
reference
voltages
digital
supply (5 V)
analog
V
DD(low)
reset
LOGIC
3 V
V
DD(clamp)
STATE LOGIC
reset state
ignition state
burn state
hold state
powerdown state
LAMP
VOLTAGE
SENSOR
V
LVS(fail)VLVS(max)
BOOTSTRAP
DRIVER
LOGIC
FREQUENCY
CONTROL
LOGIC
LEVEL
SHIFTER
ANT/CMD
HS DRIVER
LS DRIVER
AVERAGE CURRENT
SENSOR
9
FV
DD
10
GH
11
SH
6
GL
12
ACM
15 16
CS CS
+
I
REF
4
CF
3
LVS
13
2
MGT990
CSW
Fig.1 Block diagram.
600 V CCFL ballast driver IC UBA2070

PINNING

SYMBOL PIN DESCRIPTION
CT 1 ignition timer output CSW 2 voltage controlled oscillator input CF 3 voltage controlled oscillator output I
REF
GND 5 ground GL 6 gate of the low side switch output V
DD
n.c. 8 not connected FV
DD
GH 10 gate of the high side switch output SH 11 source of the high side switch ACM 12 capacitive mode input LVS 13 lamp voltage sensor input V
REF
CS+ 15 average current sensor positive input CS 16 average current sensor negative input
4 internal reference current input
7 low voltage supply
9 floating supply; supply for the high side switch
14 reference voltage output
handbook, halfpage
CT
CSW
CF
I
REF
GND
GL
V
DD
n.c.
1 2 3 4
UBA2070T
5 6 7 8
MGT985
16
CS
15
+
CS V
14
REF
13
LVS
12
ACM
11
SH
10
GH FV
9
DD
Fig.2 Pin configuration (SO16).
2002 Oct 24 5
handbook, halfpage
CT
CSW
CF
I
REF
GND
GL
V
DD
n.c.
1 2 3 4
UBA2070P
5 6 7 8
MGT984
16
CS
15
+
CS V
14
REF
13
LVS
12
ACM
11
SH
10
GH FV
9
DD
Fig.3 Pin configuration (DIP16).
600 V CCFL ballast driver IC UBA2070
FUNCTIONAL DESCRIPTION Start-up state
Initial start-up can be achieved by charging C
VDD
using an externalstart-upresistor.Thestart-upofthecircuitissuch, that the MOSFETs Tls and Ths shall be non-conductive. The circuit will be reset in the start-up state. If the V supply reaches the value of V
the circuit starts
DD(high)
DD
oscillating. A DC reset circuit is incorporated in the high side (hs) driver. Below the lockout voltage at pin FVDDthe output voltage (VGH− VSH) is zero. The voltages at pins CF and CT are zero during the start-up state.
Oscillation
The internal oscillator is a Voltage Controlled Oscillator circuit (VCO) which generates a sawtooth waveform between the high level at pin CF and 0 V (see Fig.4). The frequency of the sawtooth is determined by CCF, R
and the voltage at pin CSW. The minimum and
IREF
maximum frequencies are determined by CCF and R
IREF
The minimum to maximum ratio is fixed internally. The sawtooth frequency is twice the half bridge frequency. The IC brings the MOSFETs Thsand Tls alternately into conduction with a duty factor of 50%.The oscillator starts oscillating at f
. During the first switching cycle the
max
MOSFET Tls is switched on. To charge the bootstrap capacitorthe first conduction time after thestart-upstate is made extra long. In all other cases the duty factor at the start is 50%.
Non-overlap time
The non-overlap time is realized with an Adaptive Non-Overlap circuit (ANT). By using this circuit, the application determines the duration of the non-overlap time (determined by the slope of the half bridge voltage and detected by the signal across R
) and makes the
ACM
non-overlap time optimum for each frequency (see Fig.4). The minimum non-overlap time is internally fixed. The maximum non-overlap time is internally fixed at approximately 25% of the bridge period time.
Ignition state
After the start at f
the frequency will decrease due to
max
charging the capacitor at pin CSW with an internally fixed current. During this continuous decrease in frequency, the circuit approaches the resonant frequency of the lamp. This will cause a high voltage across the lamp, which ignites the lamp. The ignition voltage of the lamp is designedtobeabovethe V
level.Ifthelampvoltage
LVS(fail)
exceeds this voltage level the ignition timer is started (see Fig.5).
Burn state
If the lamp voltage does not exceed the V
LVS(max)
voltage at pin CSW will continue to increase until the clamp level at pin CSW is reached. As a consequence the frequency will decrease until the minimum frequency is reached. When the frequency reaches its minimum level it is assumed that the lamp has ignited, the circuit will enter the burn state and the Average Current Sensor (ACS)
.
circuit will be enabled (see Fig.5). As soon as the average voltage across R
(measured at pin CS) reaches the
sense
reference level at pin CS+, the average current sensor circuit will take over the control of the lamp current. The average current through R
is transferred to a voltage
sense
at the voltage controlled oscillator to regulate the frequency and, as a result, the lamp current.
Lamp failure
DURING IGNITION STATE Ifthe lamp fails to ignite, thevoltage level increases. When
the lamp voltage exceeds the V
LVS(max)
level, the voltage will be regulated at that level. The ignition timer is started when the V pin LVS is above the V
level is exceeded. If the voltage at
LVS(fail)
level at the end of the
LVS(fail)
ignition time the circuit stops oscillation and is forced into aPower-downstate(seeFig.6).Thisstateisterminatedby switching off the VDD supply.
DURING BURN STATE
level the
Timing circuit
Atiming circuit is included (a clockgenerator)to determine the maximum ignition time. The ignition time is defined as 1 pulseat pin CT; the lamp has toignite within the duration of this pulse. The timer circuit starts operating when a critical value of the lamp voltage [V
LVS(fail)
] is exceeded. When the timer is not operating the capacitor at pin CT is discharged by 1 mA to 0 V.
2002 Oct 24 6
If the lamp fails during normal operation, the voltage across the lamp will increase and the lamp voltage will exceedthe V
level.This forces the circuit to re-enter
LVS(fail)
the ignition state and results in an attempt to re-ignite the lamp. If during restart the lamp still fails, the voltage remains high until the end of the ignition time. At the end of the ignition time the circuit stops oscillating and enters the Power-down state (see Fig.7).
600 V CCFL ballast driver IC UBA2070
handbook, full pagewidth
GH-SH
V
half bridge
V
CF
GL
ACM
0
0
0
0
V
+
CMD
0
V
CMD
Fig.4 Oscillator and driver timing.
MGT989
t
handbook, full pagewidth
V
LVS
V
LVS(max)
V
LVS(fail)
Timer
on off
start timer stop timer
Fig.5 Normal ignition behaviour.
2002 Oct 24 7
f
min
Burn stateIgnition state
detection
MGT986
t
600 V CCFL ballast driver IC UBA2070
handbook, full pagewidth
V
LVS
V
LVS(max)
V
LVS(fail)
Timer
start timer
on off
Fig.6 Lamp failure during ignition state.
Power-downIgnition state
MGT987
t
handbook, full pagewidth
V
LVS
V
LVS(max)
V
LVS(fail)
Timer
start timer
on off
Ignition
Fig.7 Lamp failure during burn state.
2002 Oct 24 8
Power-downBurn state
MGT988
t
600 V CCFL ballast driver IC UBA2070
Power-down state
The Power-down state will be entered if, at the end of the ignition time, the voltage at pin LVS is above V
LVS(fail)
. In thePower-downstatetheoscillation will be stopped and MOSFETs Thsand Tls will be non-conductive. The V
DD
supply is internally clamped. The circuit is released from the Power-down state by reducing the supply voltage to below V
DD(reset)
.
Capacitive mode protection
The signal across R
also gives information about the
ACM
switching behaviour of the half bridge. If the voltage at R
does not exceed the V
ACM
level during the
CMD
Charge coupling
Due to parasitic capacitive coupling to the high voltage circuitry all pins are charged with a repetitive charge injection. Given the typical application the pins I
and CF are sensitive to this charge injection. For
REF
charge coupling of ±8 pC, a safe functional operation of the IC is guaranteed, independent of the current level.
Charge coupling at current levels below 50 µA will not interfere with the accuracy of the VCS and V
Charge coupling at current levels below 20 µA will not interfere with the accuracy of any parameter.
non-overlap time (see Fig.4), the Capacitive Mode Detection (CMD) circuit assumes that the circuit is in capacitivemodeofoperation.Consequently the frequency will be directly increased to f
. In this event the
max
frequency behaviour is decoupled from the voltage at pin CSWuntilthevoltageisdischargedtozero.Aninternal filter of 30 ns is included at pin ACM to increase the noise immunity.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages referenced to ground.
ACM
levels.
SYMBOL PARAMETER CONDITION MIN. MAX. UNIT
V
hs
V
ACM
V
LVS
V
CS+
V
CS
V
CSW
T
amb
T
j
T
stg
V
esd
high side supply voltage Ihs<30µA; t<1s 600 V
<30µA 510 V
I
hs
voltage on pin ACM 5+5V voltage on pin LVS 0 5 V voltage on pin CS+ 0 5 V voltage on pin CS−−0.3 +5 V voltage on pin CSW 0 5 V ambient temperature 25 +80 °C junction temperature 25 +150 °C storage temperature 55 +150 °C electrostatic discharge voltage note 1
pins FV
, GH, SH and V
DD
DD
pins GL, ACM, CS+, CS, CSW, LVS, CF, I
, CT and V
REF
REF
1000 +1000 V
2500 +2500 V
Note
1. In accordance with the human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series
resistor.
2002 Oct 24 9
600 V CCFL ballast driver IC UBA2070

THERMAL CHARACTERISTICS

SYMBOL PARAMETER DESCRIPTION VALUE UNIT
R
th(j-a)
R
th(j-t)

QUALITY SPECIFICATION

thermal resistance from junction to ambient in free air
SO16 100 K/W DIP16 60 K/W
thermal resistance from junction to tie-point
SO16 50 K/W DIP16 30 K/W
In accordance with
“SNW-FQ-611D”
.

CHARACTERISTICS

VDD=13V,V
VSH=13V;T
FVDD
=25°C; all voltages referenced to ground; see Fig.8; unless otherwise specified.
amb
SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT
High voltage supply
I
L
leakage current on high voltage pins voltage at pins FVDD,
−− 30 µA
GH and SH = 600 V
Start-up state (pin VDD)
V
DD
supply voltage for defined driver
Ths= off; Tls= off −− 6V
output
V
DD(high)
V
DD(low)
V
DD(hys)
I
DD(start)
V
DD(clamp)
I
DD(pd)
V
DD(reset
I
DD
) reset voltage Ths= off; Tls= off 4.5 5.5 7 V
oscillator start voltage 12.4 13 13.6 V oscillator stop voltage 8.6 9.1 9.6 V start-stop hysteresis voltage 3.5 3.9 4.4 V start-up current VDD<V
DD(high)
170 200 µA clamp voltage Power-down mode 10 11 12 V Power-down current VDD=9V 170 200 µA
operating supply current f
= 40 kHz without
bridge
1.5 2.2 mA
gate drive
Reference voltage (pin V
V
ref
I
ref
reference voltage IL=10µA 2.86 2.95 3.04 V reference current source 1 −−mA
REF
)
sink 1 −−mA
Z
o
V
/T temperature coefficient of V
ref
Current supply (pin I
V
I
I
I
output impedance IL= 1 mA source 3 −Ω
REF
ref
IL=10µA; T
=25to150°C
amb
)
−−0.64 %/K
input voltage 2.5 V input current 65 95 µA
2002 Oct 24 10
600 V CCFL ballast driver IC UBA2070
SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT
Voltage controlled oscillator
t
start
f
bridge(max)
f
bridge(min)
f
stab
t
no(min)
t
no(max)
PIN CSW V
i
V
clamp
PIN CF I
start
I
min
I
max
V
OH
Output drivers
V
boot
V
FVDD
I
FVDD
PINS GH AND GL I
source
I
sink
V
OH
V
OL
HIGH SIDE AND LOW SIDE
R
on
R
off
Adaptive non-overlap timing and capacitive mode detection (pin ACM)
I
i
V
det
first output oscillator stroke after start-up state only 50 −µs maximum bridge frequency 90 100 110 kHz minimum bridge frequency 38.9 40.5 42.1 kHz frequency stability T
= 20 to +80 °C 1.3 %
amb
minimum non-overlap time GH to GL 0.68 0.90 1.13 µs
GL to GH 0.75 1 1.25 µs
maximum non-overlap time at f
= 40 kHz; note 1 6.7 −µs
bridge
input voltage 2.7 3 3.3 V clamp voltage burn state 2.8 3.1 3.4 V
start current VCF= 1.5 V 3.8 4.5 5.2 µA minimum current VCF= 1.5 V 21 −µA maximum current VCF= 1.5 V 54 −µA HIGH-level output voltage f = f
min
2.5 V
bootstrap diode forward drop I = 5 mA 1.3 1.7 2.1 V lockout voltage on pin FV
DD
floating well supply current on pin FV
DD
DC level at VGH− VSH=13V
2.8 3.5 4.2 V
35 −µA
source current VGH− VSH= 0; VGL= 0 135 180 235 mA sink current VGH− VSH=13V;
265 300 415 mA
VGL=13V HIGH-level output voltage Io= 10 mA 12.5 −−V LOW-level output voltage Io=10mA −− 0.5 V
on resistance Io=10mA 32 39 45 off resistance Io=10mA 16 21 26
input current V
= 1.25 V −− 1µA
ACM
capacitive mode detection voltage positive 80 100 120 mV
negative 68 85 102 mV
2002 Oct 24 11
600 V CCFL ballast driver IC UBA2070
SYMBOL PARAMETER CONDITION MIN. TYP. MAX. UNIT
Lamp voltage sensor (pin LVS)
I
i
V
LVS(fail)
V
LVS(fail)(hys)
V
LVS(fail)(hys)
V
LVS(max)
I
o(sink)
I
o(source)(ign)
input current V fail voltage 1.19 1.25 1.31 V fail voltage hysteresis 112 140 168 mV
/T temperature coefficient hysteresis 0.65 mV/K
maximum voltage 1.67 1.76 1.85 V output sink current V ignition output source current V
Average current sensor (pins CS+ and CS)
I
i
V
offset
I
o(source)
I
o(sink)
g
m
input current VCS=0V −− 1µA offset voltage VCS= 0 to 2.5 V 2 0 +2 mV output source current V output sink current V transconductance f = 1 kHz 100 200 400 µA/mV
Ignition timer (pin CT)
I
o
V
OL
V
OH
V
hys
t
ign
output current VCT= 2.5 V 5.5 5.9 6.3 µA LOW-level output voltage 1.4 V HIGH-level output voltage 3.6 V output hysteresis 2.05 2.20 2.35 V ignition time 0.257 s
Note
1. The maximum non-overlap time is determined by the level of the CF signal. If this signal exceeds a level of 1.25 V the non-overlap will end. This equals a maximum non-overlap time of 6.7 µs at a bridge frequency of 40 kHz.
= 1.25 V −− 1µA
LVS
= 2 V 2.8 3.2 3.6 µA
CSW
= 2 V 9.0 10 11 µA
CSW
= 2.0 V 9.0 10 11 µA
CSW
= 2.0 V 9.0 10 11 µA
CSW
2002 Oct 24 12
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2002 Oct 24 13
R
VDD
470 k
BOOTSTRAP
V
7
DD
SUPPLY
DRIVER
CONTROL
UBA2070
+
V
DC
300 V
C
VDD 1 µF
CT
IGNITION
TIMER
REFERENCE
CURRENT
DIVIDER
VOLTAGE
CONTROLLED
OSCILLATOR
HIGH SIDE
DRIVER
LOW SIDE
DRIVER
ADAPTIVE
NON-OVERLAP
TIMING
CAPACITIVE
MODE DETECTOR
LAMP
VOLTAGE
SENSOR
AVERAGE CURRENT
SENSOR
− +
FV
9
DD
GH
10 11
SH
6
GL
ACM1
12
LVS
13
CS
16
+
CS
15
dbook, full pagewidth
C
boot
100 nF
R
GH
47
R
GL
47
R
8.2 k
avg
T
T
hs
ls
R
ACM
1.5
D
C
LVS3
56 nF
VDD
C
BR1
1 nF
C
BR2
18 nF
220 nF
Z
D
LVS1
R
LVS
150 k
C
DC
VDD
13 V
D
LVS2
C
LVS1
8.2 nF
C
LVS2
8.2 nF
C
1 nF
C
1 nF
res1
res2
C
lamp1
47 pF
Lamp1
C
lamp2
47 pF
Lamp2
APPLICATION AND TEST INFORMATION
Philips Semiconductors Product specification
600 V CCFL ballast driver IC UBA2070
C
CT
330 nF
45 3 2 14
REF
R
IREF
33 k
C
CF
100 pF
CSWCFGNDI
C
CSW
220 nF
V
REF
R
pwr1
220 k
Fig.8 Test application circuit.
C
1 nF
pwr
R
pwr2
8.2 k
C
avg
12 nF
MGT991
R
sense
2.2
600 V CCFL ballast driver IC UBA2070

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 3.9 mm

SOT109-1

Z
16
pin 1 index
1
D
c
y
9
A
2
A
1
8
e
w M
b
p
E
H
E
detail X
A
X
v M
A
Q
(A )
L
p
L
A
3
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
A
max.
1.75
0.069
OUTLINE VERSION
SOT109-1
A1A
0.25
0.10
0.010
0.004
A
0.25
0.01
b
3
p
0.49
0.25
0.36
0.19
0.0100
0.019
0.0075
0.014
2
1.45
1.25
0.057
0.049
IEC JEDEC EIAJ
076E07 MS-012
(1)E(1) (1)
cD
10.0
4.0
3.8
0.16
0.15
1.27
0.050
9.8
0.39
0.38
REFERENCES
2002 Oct 24 14
eHELLpQZywv θ
1.05
0.041
1.0
0.4
0.039
0.016
0.7
0.25
0.6
0.028
0.01 0.004
0.020
EUROPEAN
PROJECTION
0.25 0.1
0.01
0.7
0.3
0.028
0.012
ISSUE DATE
97-05-22 99-12-27
o
8
o
0
6.2
5.8
0.244
0.228
600 V CCFL ballast driver IC UBA2070
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
D
seating plane
L
Z
16
pin 1 index
e
b
b
1
9
A
w M

SOT38-1

M
E
A
2
A
1
c
(e )
1
M
H
E
1
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
A
max.
4.7 0.51 3.7
OUTLINE
VERSION
SOT38-1
min.
A
1 2
max.
0.15
IEC JEDEC EIAJ
050G09 MO-001 SC-503-16
b
1.40
1.14
0.055
0.045
b
1
0.53
0.38
0.021
0.015
cEe M
0.32
0.23
0.013
0.009
REFERENCES
(1) (1)
D
21.8
21.4
0.86
0.84
2002 Oct 24 15
6.48
6.20
0.26
0.24
8
(1)
Z
e
0.30
1
0.15
0.13
M
L
3.9
3.4
E
8.25
7.80
0.32
0.31
EUROPEAN
PROJECTION
9.5
8.3
0.37
0.33
w
H
0.2542.54 7.62
0.010.100.0200.19
ISSUE DATE
95-01-19 99-12-27
max.
2.2
0.087
600 V CCFL ballast driver IC UBA2070
SOLDERING Introduction
Thistextgivesaverybriefinsight to a complex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011). There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when through-holeandsurfacemountcomponentsaremixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
Surface mount packages
REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied tothe printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
stg(max)
). If the
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages.
WAVE SOLDERING Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
Forpackageswithleadsonfoursides,thefootprintmust be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
MANUAL SOLDERING Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
2002 Oct 24 16
600 V CCFL ballast driver IC UBA2070
Suitability of IC packages for wave, reflow and dipping soldering methods
MOUNTING PACKAGE
(1)
Through-hole mount DBS, DIP, HDIP, SDIP, SIL suitable
SOLDERING METHOD
WAVE REFLOW
(3)
suitable
(2)
DIPPING
Surface mount BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP,
not suitable
(4)
suitable
HTQFP, HTSSOP, HVQFN, HVSON, SMS
(5)
PLCC LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO not recommended
, SO, SOJ suitable suitable
(5)(6)
suitable
(7)
suitable
Notes
1. Formoredetailed information on the BGA packages refer tothe
“(LF)BGAApplication Note
”(AN01026);order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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DATA SHEET STATUS

LEVEL
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS

DISCLAIMERS

Short-form specification The data in a short-form
specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device attheseorat any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make norepresentationorwarrantythatsuchapplicationswillbe suitable for the specified use without further testing or modification.
Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury.Philips Semiconductorscustomersusingorsellingtheseproducts for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes  Philips Semiconductors reserves the right to make changes in the products ­including circuits, standard cells, and/or software ­described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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600 V CCFL ballast driver IC UBA2070
NOTES
2002 Oct 24 19
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands 613502/02/pp20 Date of release: 2002 Oct 24 Document order number: 9397 750 10257
SCA74
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