Philips TEA1067-C2 Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC03A
June 1990
INTEGRATED CIRCUITS
TEA1067
Low voltage versatile telephone transmission circuit with dialler interface
June 1990 2
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
GENERAL DESCRIPTION
The TEA1067 is a bipolar integrated circuit performing all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between dialling and speech. The circuit is able to operate down to a DC line voltage of 1.6 V (with reduced performance) to facilitate the use of more telephone sets in parallel.
Features
Low DC line voltage; operates down to 1.6 V (excluding polarity guard)
Voltage regulator with adjustable static resistance
Provides supply with limited current for external circuitry
Symmetrical high-impedance inputs (64 kΩ) for
dynamic, magnetic or piezoelectric microphones
Asymmetrical high-impedance input (32 k) for electret microphone
DTMF signal input with confidence tone
Mute input for pulse or DTMF dialling
Power down input for pulse dial or register recall
Receiving amplifier for magnetic, dynamic or
piezoelectric earpieces
Large gain setting range on microphone and earpiece amplifiers
Line current dependent line loss compensation facility for microphone and earpiece amplifiers
Gain control adaptable to exchange supply
DC line voltage adjustment capability
QUICK REFERENCE DATA
PACKAGE OUTLINES
PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
Line voltage I
line
= 15 mA V
LN
3.65 3.9 4.15 V
Line current operating range normal operation
TEA1067 I
line
11 140 mA
TEA1067T I
line
11 140 mA
with reduced performance I
line
1 11 mA
Internal supply current power down
input LOW I
CC
1 1.35 mA
input HIGH I
CC
55 82 µA
Supply voltage for peripherals I
line
= 15 mA; Ip= 1.4 mA;
mute input HIGH V
CC
2.2 2.4 V
I
line
= 15 mA; Ip= 0.9 mA;
mute input HIGH V
CC
2.5 −− V
Voltage gain range
microphone amplifier G
v
44 52 dB
receiving amplifier G
v
20 45 dB
Line loss compensation
gain control range G
v
5.5 5.9 6.3 dB
Exchange supply voltage range V
exch
36 60 V
Exchange feeding bridge
resistance range R
exch
0.4 1k
TEA1067: 18-lead DIL; plastic (SOT102). SOT102-1; 1998 Jun 18. TEA1067T: 20-lead mini-pack; plastic (SO20; SOT163A). SOT163-1; 1998 Jun 18.
June 1990 3
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
Fig.1 Block diagram.
Figures in parenthesis refer to TEA1067T.
handbook, full pagewidth
+
MGR082
CURRENT
REFERENCE
LOW
VOLTAGE
CIRCUIT
AGC
CIRCUIT
SUPPLY AND REFERENCE
16 (18)10 (11)
V
EE
REG AGC STAB SLPE
GAS2
GAS1
QR
QR+
GAR
LN
V
CC
12 (14)
14 (16)
13 (15)
dB
dB
(1)
7 (7)
8 (9)
+
+
17 (19) 9 (10) (20)18
11 (12)
IR
MIC+ MIC
DTMF
MUTE
PD
+
+−+
+
(1)1
15 (17)
TEA1067 TEA1067T
(6) 6
(5) 5 (4) 4
(2) 2
(3) 3
June 1990 4
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
PINNING
Fig.2 Pinning diagram for TEA1067 18-lead DIL
version.
handbook, halfpage
LN GAS1 GAS2
QR QR+
GAR MIC MIC+
STAB
SLPE AGC REG
V
CC
DTMF PD
MUTE
IR V
EE
1 2 3 4 5 6 7 8 9
10
11
12
18 17 16 15 14 13
TEA1067
MGR084
1 LN positive line terminal 2 GAS1 gain adjustment; transmitting amplifier 3 GAS2 gain adjustment; transmitting amplifier 4QR inverting output; receiving amplifier 5QR+ non-inverting output receiving amplifier 6 GAR gain adjustment; receiving amplifier 7 MIC inverting microphone input 8 MIC+ non-inverting microphone input 9 STAB current stabilizer
10 V
EE
negative line terminal 11 IR receiving amplifier input 12 PD power-down input 13 DTMF dual-tone multi-frequency input 14 MUTE mute input 15 V
CC
positive supply decoupling 16 REG voltage regulator decoupling 17 AGC automatic gain control input 18 SLPE slope (DC resistance) adjustment
Fig.3 Pinning diagram for TEA1067T 20-lead
mini-pack version.
handbook, halfpage
1 2 3 4 5 6 7 8 9
10
11
12
20 19 18 17 16 15 14 13
TEA1067T
MGR083
LN GAS1 GAS2
QR QR+
GAR
MIC
MIC+
STAB
SLPE AGC REG
V
CC
DTMF
n.c. n.c.
PD
MUTE
IR V
EE
1 LN positive line terminal 2 GAS1 gain adjustment; transmitting amplifier 3 GAS2 gain adjustment; transmitting amplifier 4QR inverting output; receiving amplifier 5QR+ non-inverting output receiving amplifier 6 GAR gain adjustment, receiving amplifier 7 MIC inverting microphone input 8 n.c. not connected
9 MIC+ non-inverting microphone input 10 STAB current stabilizer 11 V
EE
negative line terminal 12 IR receiving amplifier input 13 n.c. not connected 14 PD power-down input 15 DTMF dual-tone multi-frequency input 16 MUTE mute input 17 V
CC
positive supply decoupling 18 REG voltage regulator decoupling 19 AGC automatic gain control input 20 SLPE slope (DC resistance) adjustment
June 1990 5
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
FUNCTIONAL DESCRIPTION Supply: V
CC
, LN, SLPE, REG and STAB
Power for the TEA1067 and its peripheral circuits is usually obtained from the telephone line. The IC develops its own supply at V
CC
and regulates its voltage drop. The supply voltage VCCmay also be used to supply external circuits e.g. dialling and control circuits.
Decoupling of the supply voltage is performed by a capacitor between VCCand VEEwhile the internal voltage regulator is decoupled by a capacitor between REG and VEE.
The DC current drawn by the device will vary in accordance with varying values of the exchange voltage (V
exch
), the feeding bridge resistance (R
exch
), and the DC
resistance of the telephone line (R
line
).
The TEA1067 has an internal current stabilizer working at a level determined by a 3.6 kresistor connected between STAB and VEE(see Fig.7). When the line current (I
line
) is more than 0.5 mA greater than the sum of the IC supply current (ICC) and the current drawn by the peripheral circuitry connected to VCC(Ip) the excess current is shunted to VEEvia LN. The regulated voltage on the line terminal (VLN) can be calculated as:
VLN=V
ref
+ I
SLPE
× R9; or
VLN= V
ref
+ [(I
line
ICC− 0.5 × 103A) Ip] × R9
Where V
ref
is an internally generated temperature compensated reference voltage of 3.6 V and R9 is an external resistor connected between SLPE and VEE.
In normal use the value of R9 would be 20. Changing the value of R9 will also affect microphone gain, DTMF gain, gain control characteristics, side-tone level and maximum output swing on LN, and the DC characteristics (especially at the lower voltages).
Under normal conditions, when I
SLPE
>> ICC+ 0.5 mA + Ip, the static behaviour of the circuit is that of a 3.6 V regulator diode with an internal resistance equal to that of R9. In the audio frequency range the dynamic impedance is largely determined by R1. Fig.4 shows the equivalent impedance of the circuit.
At line currents below 9 mA the internal reference voltage is automatically adjusted to a lower value (typically 1.6 V at 1 mA). This means that the operation of more sets in parallel is possible with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of
1.6 V. With line currents below 9 mA the circuit has limited sending and receiving levels. The internal reference voltage can be adjusted by means of an external resistor (RVA). This resistor connected between LN and REG will decrease the internal reference voltage, connected between REG and SLPE it will increase the internal reference voltage.
Current (Ip) available from VCCfor peripheral circuits depends on the external components used. Fig.10 shows this current for VCC> 2.2 V. If MUTE is LOW when the receiving amplifier is driven the available current is further reduced. Current availability can be increased by connecting the supply IC (TEA1081) in parallel with R1, as shown in Fig.17 (c), or by increasing the DC line voltage by means of an external resistor (RVA) connected between REG and SLPE.
June 1990 6
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
Microphone inputs (MIC+ and MIC) and gain adjustment pins (GAS1 and GAS2)
The TEA1067 has symmetrical microphone inputs. Its input impedance is 64 k(2 × 32 k) and its voltage gain is typically 52 dB (when R7 = 68 k, see Fig.14). Dynamic, magnetic, piezoelectric or electret (with built-in FET source followers) microphones can be used. Microphone arrangements are shown in Fig.11.
The gain of the microphone amplifier can be adjusted between 44 dB and 52 dB to suit the sensitivity of the transducer in use. The gain is proportional to the value of R7 which is connected between GAS1 and GAS2. Stability is ensured by the external capacitor C6 which is connected between GAS1 and SLPE. The value of C6 is 100 pF but this may be increased to obtain a first-order low-pass filter. The cut-off frequency corresponds to the time constant R7 × C6.
Mute input (MUTE)
When MUTE is HIGH the DTMF input is enabled and the microphone and receiving amplifier inputs are inhibited. The reverse is true when MUTE is LOW or open-circuit. MUTE switching causes only negligible clicking on the earpiece outputs and line. If the number of parallel sets in use causes a drop in line current to below 6 mA the speech amplifiers remain active independent to the DC level applied to the MUTE input.
Fig.4 Equivalent impedance circuit.
Rp= 16.2 k L
eq
= C3 × R9 × R
p
handbook, halfpage
MBA454
R9 20
REG
LN
C3
4.7 µF
R
p
V
ref
L
eq
V
CC
V
EE
C1 100 µF
R1
Dual-tone multi-frequency input (DTMF)
When the DTMF input is enabled dialling tones may be sent onto the line. The voltage gain from DTMF to LN is typically 25.5 dB (when R7 = 68 k) and varies with R7 in the same way as the microphone gain. The signalling tones can be heard in the earpiece at a low level (confidence tone).
Receiving Amplifier (IR, QR+, QRand GAR)
The receiving amplifier has one input (IR), one non-inverting complementary output (QR+) and an inverting complementary output (QR). These outputs may be used for single-ended or differential drive depending on the sensitivity and type of earpiece used (see Fig.12). IR to QR + gain is typically 31 dB (when R4 = 100 k), this is sufficient for low-impedance magnetic or dynamic microphones which are suited for single-ended drive. Using both outputs for differential drive gives an additional gain of 6 dB. This feature can be used when the earpiece impedance exceeds 450 (high-impedance dynamic or piezoelectric types).
The receiving amplifier gain can be adjusted between 20 and 39 dB with single-ended drive and between 26 and 45 dB with differential drive, to match the sensitivity of the transducer in use. The gain is set with the value of R4 which is connected between GAR and QR+. Overall receive gain between LN and QR+ is calculated by substracting the anti-sidetone network attenuation (32 dB) from the amplifier gain. Two external capacitors C4 and C7, ensure stability. C4 is normally 100 pF and C7 is 10 × the value of C4. The value of C4 may be increased to obtain a first-order low-pass filter. The cut-off frequency will depend on the time constant R4 × C4. The output voltage of the receiving amplifier is specified for continuous-wave drive. The maximum output voltage will be higher under speech conditions where the peak to RMS ratio is higher.
June 1990 7
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
Automatic gain control input (AGC)
Automatic line loss compensation is achieved by connecting a resistor (R6) between AGC and VEE. The automatic gain control varies the gain of the microphone amplifier and the receiving amplifier in accordance with the DC line current. The control range is 5.9 dB. This corresponds to a line length of 5 km for a 0.5 mm diameter copper twisted-pair cable with a DC resistance of 176 /km and an average attenuation 1.2 dB/km. Resistor R6 should be chosen in accordance with the exchange supply voltage and its feeding bridge resistance (see Fig.13 and Table 1). The ratio of start and stop currents of the AGC curve is independent of the value of R6. If no automatic line loss compensation is required the AGC may be left open-circuit. The amplifiers, in this condition, will give their maximum specified gain.
Power-down input (PD)
During pulse dialling or register recall (timed loop break) the telephone line is interrupted. During these interruptions the telephone line provides no power for the transmission circuit or circuits supplied by V
CC
. The charge held on C1 will bridge these gaps. This bridging is made easier by a HIGH level on the PD input which reduces the typical supply current from 1 mA to 55 µA and switches off the voltage regulator preventing discharge through LN. When PD is HIGH the capacitor at REG is disconnected with the effect that the voltage stabilizer will have no switch-on delay after line interruptions. This minimizes the contribution of the IC to the current waveform during pulse dialling or register recall. When this facility is not required PD may be left open-circuit.
Side-tone suppression
The anti-sidetone network, R1//Z
line
, R2, R3, R9 and Z
bal
, (see Fig.5) suppresses transmitted signal in the earpiece. Compensation is maximum when the following conditions are fulfilled:
(a) R9 × R2 = R1 (R3 + [R8//Z
bal
]);
(b) (Z
bal
/ [Z
bal
+ R8]) = (Z
line
/ [Z
line
+ R1])
If fixed values are chosen for R1, R2, R3, and R9 then condition (a) will always be fulfilled whenR8//Z
bal
<< R3. To obtain optimum side-tone suppression condition (b) has to be fulfilled resulting in:
Z
bal
= (R8/R1) Z
line
= k.Z
line
where k is a scale factor;
k = (R8/R1) The scale factor (k), dependent on the value of R8, is
chosen to meet the following criteria: (a) Compatibility with a standard capacitor from the E6 or
E12 range for Z
bal
(b) Z
bal
//R8<< R3 to fulfil condition (a) and thus
ensuring correct anti-sidetone bridge operation (c) Z
bal
+ R8>> R9 to avoid influencing the transmitter
gain In practice Z
line
varies considerably with the line type and
length. The value chosen for Z
bal
should therefore be for an average line length thus giving optimum setting for short or long lines.
June 1990 8
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
Example
The line balance impedance (Z
bal
) at which the optimum suppression is present can be calculated by: suppose Z
line
= 210 Ω+ (1265 //140 nF), representing a 5 km line of 0.5 mm diameter, copper, twisted-pair cable matched to 600 (176 /km; 38 nF/km). When k = 0.64 then R8 = 390 ; Z
bal
= 130 Ω+ (820 //220 nF).
The anti-sidetone network for the TEA1060 family shown in Fig.5 attenuates the signal received from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. Fig.6 shows a conventional Wheatstone bridge anti-sidetone circuit that can be used as an alternative. Both bridge types can be used with either resistive or complex set impedances.
More information can be found in the designer guide; 9398 341 10011
Fig.5 Equivalent circuit of TEA1060 anti-sidetone bridge.
handbook, full pagewidth
MSA500
R1
R2
R9
R3
IR
R8
V
EE
SLPE
LN
Z
line
R
t
i
m
Z
bal
Fig.6 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.
handbook, full pagewidth
MSA501
R1
R9
IR
R8
V
EE
SLPE
LN
Z
line
R
t
i
m
R
A
Z
bal
June 1990 9
Philips Semiconductors Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1067
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Notes
1. Mostly dependent on the maximum required T
amb
and on the voltage between LN and SLPE. See Figs 7 and 8 to determine the current as a function of the required voltage and the temperature.
2. Calculated for the maximum ambient temperature specified T
amb
= 75 °C and a maximum
junction temperature of 125 °C.
THERMAL RESISTANCE
PARAMETER CONDITIONS SYMBOL MIN. MAX. UNIT
Positive continuous line voltage V
LN
12 V
Repetitive line voltage during
switch-on line interruption V
LN
13.2 V
Repetitive peak line voltage for a
1 ms pulse per 5 s R9 = 20 ;
R10 = 13 (Fig.16) V
LN
28 V
Line current TEA1067 (note 1) R9 = 20 I
line
140 mA
Line current TEA1067T (note 1) R9 = 20 I
line
140 mA
Voltage on all other pins V
i
VCC+ 0.7 V
V
i
0.7 V
Total power dissipation (note 2) R9 = 20
TEA1067 P
tot
769 mW
TEA1067T P
tot
550 mW
Storage temperature range T
stg
40 + 125 °C
Operating ambient temperature range T
amb
25 + 75 °C
Junction temperature T
j
−+ 125 °C
From junction to ambient in free air
TEA1067 R
th j-a
typ. 65 K/W
TEA1067T mounted on glass epoxy board 41 × 19 × 1.5 mm R
th j-a
typ. 90 K/W
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