Philips TEA0678 Technical data

TEA0678

INTEGRATED CIRCUITS

TEA0678

Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute

Preliminary specification

1996 Jun 06

Supersedes data of August 1993

File under Integrated Circuits, IC01

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

FEATURES

∙Dual noise reduction (NR) channels

∙Head pre-amplifiers

∙Reverse head switching

∙Automatic Music Search (AMS)

∙Mute position

∙Equalization with electronically switched time constants

∙Dolby reference level = 387.5 mV

∙32 pins

∙Switch inputs TTL compatible

∙Differential output stage has:

–Capability to drive 1.2 nF capacitive load

–Capability to drive 1 kΩ load

–Short-circuit proof

–Short-circuit proof to 16 V via coupling capacitor.

∙Improved EMC behaviour.

GENERAL DESCRIPTION

The TEA0678 is a bipolar integrated circuit that provides two channels of Dolby B noise reduction for playback applications in car radios. It includes head and equalization amplifiers with electronically switchable time constants. Furthermore it includes electronically switchable inputs for tape drivers with reverse heads. This device also detects pauses of music in Automatic Music Search (AMS) mode, with a delay time fixed externally by a resistor. The short-circuit proof output stage of the TEA0678 is differential and provides muting. The device will operate with power supplies in the range of 7.6 to 12 V, output overload level increasing with increase in supply voltage. Current drain varies with supply voltage, noise reduction on/off and AMS on/off so it is advisable to use a regulated power supply or a supply with a long time constant.

.Current drain varies with these variables:

Supply voltage

Noise reduction on/off

AMS on/off.

Because of this current drain variation it is advisable to use a regulated power supply or a supply with a long time constant.

QUICK REFERENCE DATA

SYMBOL		PARAMETER		MIN.	TYP.	MAX.	UNIT
VCC	supply voltage			7.6	10	12	V
ICC	supply current			−	25	28	mA
S + N	signal plus noise-to-noise ratio			78	84	−	dB
--------------
N
ORDERING INFORMATION
TYPE			PACKAGE
NUMBER	NAME		DESCRIPTION			VERSION
TEA0678	SDIP32	plastic shrink dual in-line package; 32 leads (400 mil)				SOT232-1
TEA0678T	SO32	plastic small outline package; 32 leads; body width 7.5 mm				SOT287-1

Remark Dolby*: Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111, USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby Laboratories Licensing Corporation.

1996 Jun 06

2

199606Jun

LOW: MUTE ON

DIAGRAMBLOCK

search,music

B Dolby*Dual

SemiconductorsPhilips

HIGH: MUTE OFF

from

Vref

EQ switch from

head switch

microprocessor

10 μF

24

microprocessor

180 Ω

input

kΩ

LOW: 120 μs

LOW: INPUT 1

RL RL

27

10

4.7 nF

OPEN: 70 μs

330

HIGH: INPUT 2

kΩ

1 kΩ

470

from

470

kΩ

μ

F

AMSout

pF

microprocessor

pF

output

CL

output

330

100

180 kΩ

10

B−

B+

1 μF

nF

nF

18

nF

with

type-

8.2

kΩ

4.7 μF

4.7 μF

270 kΩ

15 nF

kΩ

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

and outputs differential

circuit, reduction noise

EQ

AMP.

DOLBY B NR CIRCUIT

PRE

AMP.

AMS

TEA0678

15

AMS

PROCESSOR

kΩ

LOGIC

GND

EQ

3

DELAY

LEVEL

POWER

Vref

MUTE

NR

TIME

DETECTOR

SUPPLY

15

VCC

HEAD-

kΩ

mute

automatic

SWITCH

PRE

DOLBY B NR CIRCUIT

AMP.

EQ

AMP.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

4.7 μF

4.7 μF

270 kΩ

15 nF

VCC

8.2

100

kΩ

330

100

μF

output

output

1 μF

10

180 kΩ

A−

A+

nF

nF

specification Preliminary

CL

nF

4.7 nF

Rt

470

470

from

330

pF

pF

RL RL

AMS

kΩ

1 kΩ

10

μ

F

microprocessor

delay

180 Ω

TEA0678

24

LOW: NR ON

time

OPEN: OFF

kΩ

Vref

HIGH: AMS ON

MED769

Fig.1 Block and application diagram.

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

PINNING

SYMBOL	PIN	DESCRIPTION
OUTA−	1	negative output channel A
OUTA+	2	positive output channel A
NR/AMS	3	noise reduction/music search switch
INCA	4	input mute/output stage channel A
OUTCA	5	output Dolby B processor channel A
INTA	6	integrating filter channel A
CONTRA	7	control voltage channel A
HPA	8	high-pass filter channel A
SCA	9	side chain channel A
TD	10	delay time constant
EQA	11	equalizing output channel A
EQFA	12	equalizing feedback channel A
VCC	13	supply voltage
INA1	14	input channel A1 (forward or reverse)
Vref	15	reference voltage
INA2	16	input channel A2 (reverse or forward)
INB2	17	input channel B2 (reverse or forward)
HS	18	head switch input
INB1	19	input channel B1 (forward or reverse)
GND	20	ground
EQFB	21	equalizing feedback channel B
EQB	22	equalizing output channel B
AMSEQ	23	AMS output and EQ switch input
SCB	24	side chain channel B
HPB	25	high-pass filter channel B
CONTRB	26	control voltage channel B
INTB	27	integrating filter channel B
OUTCB	28	output Dolby B processor channel B
INCB	29	input mute/output stage channel B
MUTE	30	mute switch
OUTB+	31	positive output channel B
OUTB−	32	negative output channel B

handbook, halfpage
OUTA−	1		32	OUTB−
OUTA+				OUTB+
	2		31
NR/AMS				MUTE
	3		30
INCA				INCB
	4		29
OUTCA				OUTCB
	5		28
INTA				INTB
	6		27
CONTRA				CONTRB
	7		26
HPA				HPB
	8	TEA0678	25
SCA				SCB
	9		24
TD				AMSEQ
	10		23
EQA				EQB
	11		22
EQFA				EQFB
	12		21
VCC				GND
	13		20
INA1				INB1
	14		19
Vref				HS
	15		18
INA2				INB2
	16		17
		MED770

Fig.2 Pin configuration.

1996 Jun 06

4

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

FUNCTIONAL DESCRIPTION

Noise Reduction (NR) is enabled when pin NR/AMS is connected to ground and disabled when open-circuit (left floating from a 3-state output).

Dolby noise reduction only operates correctly if 0 dB Dolby level is adjusted at 387.5 mV.

Automatic Music Search (AMS) is enabled when pin NR/AMS is connected to HIGH (5 V) and disabled when open-circuit (left floating from a 3-state output). In AMS mode the signal of both channels are rectified and then added. This means, even if one channel signal appears inverted to the other channel, with the TEA0678 the normal AMS function is ensured (see Figs 4, 5 and 6).

Equalization time constant switching (70 μs or 120 μs) is achieved when pin AMSEQ is connected to GND via an 18 kΩ resistor (120 μs), or left open-circuit (70 μs).

This does not affect the AMS output signal during AMS mode (see Fig.1).

LIMITING VALUES

Head switching is achieved when pin HS is connected to GND (input IN1 active) or connected to HIGH (5 V) level (input IN2 active). If left open-circuit IN1 is active.

Mute is enabled when pin MUTE is connected to ground and off when connected to HIGH (5 V) level. For smooth switching a time constant is recommended. If left open-circuit MUTE is active.

The differential output stage of each channel is connected via a provision to the Dolby and pre-amplifier part. This provision may be used for any processing of the tape signal or to add another signal. Each output drives a resistive load of nominal 10 kΩ and is capable of driving 1 kΩ, also a capacitive load of 1.2 nF to ground and between differential outputs. Each output can be short-circuited to a battery (16 V) via a coupling capacitor (4.7 μF).

In accordance with the Absolute Maximum Rating System (IEC 134); note1.

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCC	supply voltage		0	16	V
Vi	input voltage (pins 1 to 32) except pin 15 (Vref); pin 3		−0.3	+VCC	V
	(NR/AMS), pin 18 (HS) and pin 30 (MUTE) to VCC
	input voltage at pin 3 (NR/AMS), pin 18 (HS) and	note 2	−0.3	+6.5	V
	pin 30 (MUTE)
tshort	pin 15 (Vref) to VCC short-circuiting duration		−	5	s
Tstg	storage temperature		−55	+150	°C
Tamb	operating ambient temperature		−40	+85	°C
Ves	electrostatic handling voltage for all pins	note 3	−2	+2	kV
		note 4	−500	+500	V

Notes

1.The device may not operate correctly when subjected to these ratings when the ratings exceed the electrical characteristics of the device as specified in Chapter “Characteristics”. The device will recover automatically when the environment is reduced to the requirements of the characteristics.

2.The TEA0678 allows a HIGH-level at switching pins without supply voltage (VCC = 0; stand-by mode). This means a maximum input voltage of 6.5 V for the switching input pins.

3.Human body model (1.5 kΩ, 100 pF).

4.Machine model (0 Ω, 200 pF).

1996 Jun 06

5

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

CHARACTERISTICS

VCC = 10 V; f = 20 Hz to 20 kHz; Tamb = 25 °C; nominal load 10 kΩ; all levels are referenced to 775 mV (RMS) (0 dB) at differential outputs (Vo = Vo+ − Vo−), this corresponds to Dolby level 387.5 mV (RMS) (0 dB) at test point (OUTC);

see Fig.1; NR on/AMS off; EQ switch in the 70 μs position; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VCC	supply voltage		7.6	10	12	V
ICC	supply current	pins 14, 16, 17 and 19 connected to	−	25	28	mA
		Vref
		f = 1 kHz; Vo = 0 dB at each output	−	26	37	mA
αm	channel matching	f = 1 kHz; Vo = 0 dB; NR off;	−0.5	−	+0.5	dB
		OUTA/OUTB
Gv	voltage gain (output stage)	between OUT and OUTC; f = 1 kHz;	5.5	6	6.5	dB
		NR off
Gmm	voltage gain mismatch	mismatch between OUT+ and	−0.5	−	+0.5	dB
	(output stage)	OUT−; f = 1 kHz; NR off
THD	total harmonic distortion (2nd	f = 1 kHz; Vo = 0 dB	−	0.08	0.15	%
	and 3rd harmonic)	f = 10 kHz; Vo = 6 dB	−	0.15	0.3	%
HR	headroom at output	VCC = 9 V; THD = 1%; f = 1 kHz	13	−	−	dB
S + N	signal plus noise-to-noise	internal gain 40 dB; linear;	78	84	−	dB
--------------	ratio	CCIR/ARM weighted; decode mode;
N
		see Fig.10
Vno(rms)	equivalent input noise voltage	NR off; unweighted;	−	−	1.4	μV
	in decode mode (RMS value)	f = 20 Hz to 20 kHz; Rsource = 0 Ω
PSRR	power supply ripple rejection	Vi(rms) = 0.25 V; f = 1 kHz; see Fig.7	52	57	−	dB
		for unsymmetrical signal at OUTC
		at differential OUT; note 1	49	52	−	dB
fo	frequency response	see Fig.10
	measured in encode mode;	Vo = −25 dB; f = 0.2 kHz	−22.9	−24.4	−25.9	dB
	referenced to TP	Vo = 0 dB; f = 1 kHz	−1.5	0	+1.5	dB
		Vo = −25 dB; f = 1 kHz	−17.8	−19.3	−20.8	dB
		Vo = −25 dB; f = 5 kHz	−18.1	−19.6	−21.1	dB
		Vo = −35 dB; f = 10 kHz	−24.4	−25.9	−27.4	dB
αcs	channel separation	Vo = +10 dB; f = 1 kHz; see Fig.8	61	67	−	dB
αcc	crosstalk between active and	NR off; f = 1 kHz; Vo = +10 dB;	70	77	−	dB
	inactive input	see Fig.8
RL	load resistance at each output	AC-coupled f = 1 kHz; Vo = 12 dB;	10	−	−	kΩ
	OUTA+, OUTA−, OUTB+ and	THD = 1%
	OUTB− (corresponds to 2 kΩ
		THD = 1%; note 2	1	−	−	kΩ
	at differential output)
CL	capacitive load at each output	CLmin at each output to ground	0.3	−	1.3	nF
	(between OUT+ and OUT−)	(pins 1, 2, 31 and 32)
	and ground
Gv	voltage gain of pre-amplifier	from pin INA1 or INA2 to pin EQFA	29	30	31	dB
		and from pin INB1 or INB2 to
		pin EQFB; f = 1 kHz

1996 Jun 06

6

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VI(offset)(DC)	DC input offset voltage		−	2	−	mV
Ii(bias)	input bias current		−	−	0.4	μA
REQ	equalization resistor		4.7	5.8	6.9	kΩ
RI	input resistance head inputs		60	100	−	kΩ
Av	open-loop amplification	pin INA1 or INA2 to pin EQA and
		pin INB1 or INB2 to pin EQB
		f = 10 kHz	80	86	−	dB
		f = 400 Hz	104	110	−	dB
VO(offset)(DC)	DC offset voltage at pins	pins INA1, INA2, INB1 and INB2	−10	−	+10	mV
	OUT+ to OUT−	connected to Vref
Vmute(offset)	MUTE offset voltage at pins	pins INA1, INA2, INB1 and INB2	−10	−	+10	mV
	OUT+ to OUT−	connected to Vref
Vref − VOUTC	DC output offset voltage at	NR off; pins INA1, INA2, INB1 and	−0.15	−	+0.15	V
	pins OUTCA and OUTCB	INB2 connected to Vref
IO	DC output current	pins INA1, INA2, INB1 and INB2
		connected to Vref
		pin OUTC to ground	−2	−	−	mA
		pin OUTC to VCC	0.3	−	−	mA
		pin OUT± to ground	−2.5	−	−	mA
		pin OUT± to VCC	2.5	−	−	mA
Ri	input resistance output stage		10	16	−	kΩ
	at pins INCA and INCB
Zo	output impedance at each		−	90	110	Ω
	output OUTA+, OUTA−,
	OUTB+ and OUTB−
dmute	mute depth at differential	NR off
	output	f = 1 kHz	−80	−	−	dB
		f = 10 kHz	−80	−	−	dB
AMSL	AMS threshold level at	NR off; f = 10 kHz; see Fig.9	−25	−22	−19	dB
	music to pause
AMSH	AMS threshold level at	note 3	−24	−21	−18	dB
	pause to music
td	AMS delay time range	f = 10 kHz; 0 dB burst; see Table 1	−	23 to 160	−	ms
tr	AMS rise/delay time	f = 10 kHz; 0 dB burst	2	−	10	ms
EMC	DC offset voltage at	f = 900 MHz; Vi = 3 V(RMS);	−	100	−	mV
	pins OUTA−, OUTA+,	see Figs 11, 12 and13
	OUTB+ and OUTB−

1996 Jun 06

7

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Switching thresholds
NR/AMS SWITCH (PIN 3)
VIL	LOW level input voltage	NR on	−0.3	−	+0.8	V
IIL	LOW level input current	NR on	−10	−20	−40	μA
Ii(float)	allowed floating input current	pin left open-circuit; NR/AMS off	−10	0	+10	μA
Vfloat	floating voltage	pin left open-circuit; NR/AMS off	−	2.4	5	V
VIH	HIGH level input voltage	AMS on	4	−	5.5	V
IIH	HIGH level input current	AMS on	10	20	40	μA
EQUALIZATION (PIN 23)
IEQ70	floating leakage current	time constant 70 μs active	+0.002	−	−0.15	mA
VEQ70	floating voltage	time constant 70 μs active	−	4.6	5	V
IEQ120	input current	time constant 120 μs active	−0.25	−	−1	mA
AMS OUTPUT (PIN 23)
VOH	HIGH level output voltage	music present	4	4.6	5	V
IOH	HIGH level output current	current capability	+0.01	−	−1	mA
IOH	HIGH level output current	current capability; note 4	+0.01	−	−0.15	mA
VOL	LOW level output voltage	music not present	−	−	0.8	V
IOL	LOW level output current	current capability	−0.01	−	+1	mA
MUTE SWITCH (PIN 30)
VIL	LOW level input voltage	MUTE on	−0.3	−	+0.8	V
IIL	LOW level input current	MUTE on	−	−4	−100	μA
VIH	HIGH level input voltage	MUTE off	4	−	5.5	V
IIH	HIGH level input current	MUTE off; smooth switching with a	−	10	100	μA
		time constant is recommended
HEAD SWITCH (PIN 18)
VIL	LOW level input voltage	INPUT 1 on	−0.3	−	+0.8	V
IIL	LOW level input current	INPUT 1 on	−	−	−100	μA
VIH	HIGH level input voltage	INPUT 2 on	4	−	5.5	V
IIH	HIGH level input current	INPUT 2 on	−	30	100	μA

1996 Jun 06

8

Philips Semiconductors	Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

Notes to the characteristics

1.For the signal to be doubled (+6 dB) at differential output as a function of OUTC, the signal-to-ripple ratio is improved at differential output for approximately 3 dB.

2.By using the small load, the output voltage may be divided by −0.8 dB.

3.The high speed of the tape (FF, REW) at the tape head during AMS mode causes a transformation of level and

frequency of the originally recorded signal. It means a boost of signal level of approximately 10 dB and more for recorded frequencies from 500 Hz up to 4 kHz. So the threshold level of −22 dB corresponds to signal levels in PB mode of approximately −32 dB. The AMS inputs for each channel are pin SCA and pin SCB. As the frequency

spectrum is transformed by a factor of approximately 10 to 30 due to the higher tape speed in FF, REW, the high-pass filter (4.7 nF/24 kΩ) removes the effect of offset voltages but does not affect the music search function. In the application circuit (Fig.1) the frequency response of the system between tape heads input, e.g. pins INA2/INB2, to the AMS input pins SCA and SCB is constant over the whole frequency range (see Fig.3). The frequency dependence of threshold level is shown in Fig.3.

4.In AMS OFF mode, pin AMSEQ is HIGH level, the equalization time constant will be switched by pulling approximately 200 μA out of pin AMSEQ. This means for the device connected to pin AMSEQ, a restriction of input current at HIGH level less than 200 μA during AMS off; otherwise the switching of the time constants is disabled but fixed at 120 μs. If the following devices, input consumes more than 200 μA, this input has to be disconnected in AMS off mode. (To ensure switching the currents for the different switched modes are specified with a tolerance of ±50 μA in Chapter “Characteristics”.) For an application with a fixed EQ time constant of 120 μs the equalizing network may

be applied completely external. Change 8.2 kΩ resistor to 14 kΩ the internal resistor REQ = 5.8 kΩ is short-circuited by fixing the EQ switch input at the 70 μs position (IEQ70).

Table 1 Blank delay time set by resistor Rt at pin TD

RESISTOR VALUE Rt	DELAY TIME td	TOLERANCE
(kΩ)	TYP. (ms)	(%)
68	23	20
150	42	15
180	48	15
220	56	15
270	65	10
330	76	10
470	98	10
560	112	10
680	126	10
820	142	10
1000	160	10

1996 Jun 06

9