Philips TDA9818T, TDA9818, TDA9817TS, TDA9817T, TDA9817 Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TDA9817; TDA9818

Single/multistandard VIF/SIF-PLL and FM-PLL/AM demodulators

Preliminary specification

2001 Oct 19

Supersedes data of 1997 May 12

File under Integrated Circuits, IC02

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

FEATURES

∙5 V supply voltage

∙Applicable for Intermediate Frequencies (IFs) of 38.9, 45.75 and 58.75 MHz

∙Gain controlled wide band Video IF (VIF) amplifier (AC-coupled)

∙True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics and excellent pulse response)

∙Robustness for over-modulation better than 105% due to gated phase detector at L/L accent standard and PLL-bandwidth control at negative modulated standards

∙Voltage Controlled Oscillator (VCO) frequency switchable between L and L accent (alignment external) picture carrier frequency

∙VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for B/G, peak white detector for L; signal controlled reaction time for L

∙Tuner AGC with adjustable TakeOver Point (TOP)

∙Automatic Frequency Control (AFC) detector without extra reference circuit

∙AC-coupled limiter amplifier for sound intercarrier signal

∙Alignment-free FM Phase-Locked Loop (PLL) demodulator with high linearity

∙Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled); SIF AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode

∙AM demodulator without extra reference circuit

∙Stabilizer circuit for ripple rejection and to achieve constant output signals

∙ElectroStatic Discharge (ESD) protection for all pins.

GENERAL DESCRIPTION

The TDA9817 is an integrated circuit for single standard vision IF signal processing and FM demodulation.

The TDA9818 is an integrated circuit for multistandard vision IF signal processing, sound AM and FM demodulation.

ORDERING INFORMATION

	TYPE NUMBER		PACKAGE
		NAME	DESCRIPTION	VERSION
	TDA9817	SDIP24	plastic shrink dual in-line package; 24 leads (400 mil)	SOT234-1
	TDA9817T	SO24	plastic small outline package; 24 leads; body width 7.5 mm	SOT137-1
	TDA9817TS	SSOP24	plastic shrink small outline package; 24 leads; body width 5.3 mm	SOT340-1
	TDA9818	SDIP24	plastic shrink dual in-line package; 24 leads (400 mil)	SOT234-1
	TDA9818T	SO24	plastic small outline package; 24 leads; body width 7.5 mm	SOT137-1
	TDA9818TS	SSOP24	plastic shrink small outline package; 24 leads; body width 5.3 mm	SOT340-1

2001 Oct 19

2

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

QUICK REFERENCE DATA

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VP	supply voltage		4.5	5	5.5	V
IP	supply current		76	90	104	mA
Vi(VIF)(rms)	vision IF input signal voltage sensitivity	−1 dB video at output	−	60	100	μV
	(RMS value)
Vo(CVBS)(p-p)	video output signal voltage		0.97	1.1	1.23	V
	(peak-to-peak value)
Bv(−3dB)	−3 dB video bandwidth on pin CVBS	B/G and L standard;	7	8	−	MHz
		CL < 50 pF; RL > 1 kΩ; AC load
S/NW	weighted signal-to-noise ratio for video		56	60	−	dB
αIM(1.1)	intermodulation attenuation at ‘blue’	f = 1.1 MHz	58	64	−	dB
αIM(3.3)	intermodulation attenuation at ‘blue’	f = 3.3 MHz	58	64	−	dB
αH(sup)	suppression of video signal harmonics		35	40	−	dB
Vi(SIF)(rms)	sound IF input signal voltage	−3 dB at intercarrier output	−	50	100	μV
	sensitivity (RMS value)
Vo(FM)(rms)	audio output signal voltage for FM	B/G standard; 27 kHz,	0.4	0.5	0.6	V
	(RMS value)	54% modulation
		M/N standard;	0.36	0.45	0.54	V
		25 kHz modulation
Vo(AM)(rms)	audio output signal voltage for AM	L standard; 54% modulation	0.4	0.5	0.6	V
	(RMS value)
THDaudio	total harmonic distortion audio signal	54% modulation
	FM		−	0.2	0.5	%
	AM		−	0.5	1.0	%
S/NW(audio)	weighted signal-to-noise ratio audio	54% modulation
	signal
	FM		55	60	−	dB
	AM		47	53	−	dB

2001 Oct 19

3

_

19 Oct 2001

L/L accent switch

and adjust

2 × fpc

TOP

CBL

CVAGC

TPLL

LADJ VCO2

VCO1

AFC

VP

GND

22

15(1)

4

6

7(1)

19

18

17

21

20

TAGC

14

TUNER

VIF

VOLTAGE

AGC

AGC

REFERENCE

AFC

DETECTOR

VIF1

1

VIF

VIF2

2

VIF AMPLIFIER

FPLL

VCO

SAW

TWD

VIDEO

16

CVBS

SOUND

video

DEMODULATOR

TRAP

1 V (p-p)

AND AMPLIFIER

4

SIF1

23

QSS MIXER

1.1 V (p-p)

SIF

SIF2

24

SIF AMPLIFIER

INTERCARRIER MIXER

8

audio

SAW

AF

AM DEMODULATOR

intercarrier

mode

SIF

INTERCARRIER

TDA9817

FM-PLL

AGC

MODE SWITCH

TDA9818

DEMODULATOR

5

3(1)

12

13

9

10

11

MHA663

CDEC

CSAGC

STD

QSS

FMin

Vde-em

Cde-em

5.5 MHz

standards

selection

mute

switch

switch

(1) Not connected for TDA9817, TDA9817T and TDA9817TS.

Fig.1 Block diagram.

DIAGRAM BLOCK	VIF/SIF Single/multistandard demodulators PLL/AM-FM
	and PLL-

TDA9818 TDA9817;

Semiconductors Philips

specification Preliminary

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

PINNING

SYMBOL	PIN	DESCRIPTION
VIF1	1	VIF differential input signal voltage 1
VIF2	2	VIF differential input signal voltage 2
STD	3	standards selection switch; note 1
CVAGC	4	VIF AGC capacitor
CSAGC	5	SIF AGC capacitor
TPLL	6	PLL filter
LADJ	7	L/L accent switch and adjust; note 1
AF	8	audio output
Vde-em	9	de-emphasis output
Cde-em	10	de-emphasis input
CDEC	11	decoupling capacitor
QSS	12	single reference QSS/intercarrier
		output voltage
FMin	13	sound intercarrier input voltage
TAGC	14	tuner AGC output
CBL	15	black level detector; note 1
CVBS	16	composite video output voltage
AFC	17	AFC output
VCO1	18	VCO1 resonance circuit
VCO2	19	VCO2 resonance circuit
GND	20	ground
VP	21	supply voltage
TOP	22	tuner AGC takeover point adjust
SIF1	23	SIF differential input signal voltage 1
SIF2	24	SIF differential input signal voltage 2

Note

1.Not connected for TDA9817, TDA9817T and TDA9817TS.

	handbook, halfpage				SIF2
	VIF1	1		24
					SIF1
	VIF2	2		23
	STD(1)				TOP
		3		22
					VP
	CVAGC	4		21
	CSAGC				GND
		5		20
	TPLL				VCO2
		6	TDA9818	19
	LADJ(1)		TDA9817		VCO1
		7		18
					AFC
	AF	8		17
					CVBS
	Vde-em	9		16
					CBL(1)
	Cde-em	10		15
	CDEC	11		14	TAGC
	QSS	12		13	FMin
			MHA664

(1) Not connected for TDA9817.

Fig.2 Pin configuration SDIP24.

2001 Oct 19

5

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

VIF1						handbook, halfpage
	1			24	SIF2	VIF1		1		24	SIF2
VIF2
	2			23	SIF1	VIF2		2		23	SIF1
STD(1)						STD(1)
	3			22	TOP			3		22	TOP
CVAGC						CVAGC
	4			21	VP			4		21	VP
CSAGC					GND	CSAGC
	5			20				5		20	GND
TPLL					VCO2	TPLL
	6		TDA9818T	19				6	TDA9818TS	19	VCO2
LADJ(1)			TDA9817T		VCO1	LADJ(1)			TDA9817TS
	7			18				7		18	VCO1
AF					AFC	AF
	8			17				8		17	AFC
Vde-em					CVBS	Vde-em					CVBS
	9			16				9		16
					CBL(1)	Cde-em					CBL(1)
Cde-em	10			15				10		15
CDEC						CDEC
	11			14	TAGC			11		14	TAGC
QSS					FMin	QSS					FMin
	12			13				12		13
			MGU397						MGU398

(1) Not connected for TDA9817T.	(1) Not connected for TDA9817TS.
Fig.3 Pin configuration SO24.	Fig.4 Pin configuration SSOP24.

2001 Oct 19

6

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

FUNCTIONAL DESCRIPTION

The integrated circuit comprises the functional blocks as shown in Fig.1:

∙Vision IF amplifier and VIF AGC detector

∙Tuner AGC

∙Frequency Phase Locked Loop detector (FPLL)

∙VCO, Travelling Wave Divider (TWD) and AFC

∙Video demodulator and amplifier

∙Sound IF amplifier and SIF AGC

∙Single reference QSS mixer

∙AM demodulator

∙FM-PLL demodulator

∙Audio Frequency (AF) signal processing

∙Internal voltage stabilizer.

Vision IF amplifier and VIF AGC detector

The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration.

The AGC detector generates the required VIF gain control voltage for constant video output by charging/discharging the AGC capacitor. Therefore for negative video modulation the sync level and for positive video modulation the peak white level of the video signal is detected. In order to reduce the reaction time for positive modulation, where a very large time constant is needed, an additional level detector increases the discharging current of the AGC capacitor (fast mode) in the event of a decreasing VIF amplitude step. The additional level information is given by the black-level detector voltage.

Tuner AGC

The AGC capacitor voltage is converted to an internal IF control signal, and is fed to the tuner AGC to generate

the tuner AGC output current at pin TAGC (open-collector output). The tuner AGC takeover point can be adjusted at pin TADJ. This allows to match the tuner to the SAW filter in order to achieve the optimum IF input level.

Frequency Phase Locked Loop detector (FPLL)

The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current

proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. In the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion for overmodulated VIF signals.

VCO, Travelling Wave Divider (TWD) and AFC

The VCO operates with a resonance circuit (with L and C in parallel) at double the picture carrier frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the picture carrier frequency is generated by the frequency-phase detector (FPLL) and fed via the loop filter to the first variable capacitor. This control voltage is amplified and additionally converted into a current which represents the AFC output signal. At centre frequency the AFC output current is equal to zero.

For TDA9818: the VCO centre frequency can be decreased (required for L accent standard) by activating an additional internal capacitor. This is achieved by using the L accent switch. In this event the second variable capacitor can be controlled by a variable resistor at the

L accent switch for setting the VCO centre frequency to the required L accent value.

The oscillator signal is divided by 2 with a TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency.

Video demodulator and amplifier

The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in phase’ signal of the travelling wave divider output. In the demodulator stage the video signal polarity can be switched in accordance with the TV standard.

The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics for B/G and

L standard. The standard dependent level shift in this stage delivers the same sync level for positive and negative modulation. The video output signal at pin CVBS is 1.1 V (p-p) for nominal vision IF modulation, in order to achieve 1 V (p-p) at sound trap output.

2001 Oct 19

7

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

Sound IF amplifier and SIF AGC

The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration.

The SIF AGC detector is related to the SIF input signal (average level of AM or FM carrier) and controls the SIF amplifier to provide a constant SIF signal to the

AM demodulator and single reference QSS mixer. At

L standard (AM sound) the SIF AGC reaction time is set to ‘slow’ for nominal video conditions. But with a decreasing VIF amplitude step the SIF AGC is set to ‘fast’ mode controlled by the VIF AGC detector. In FM mode this reaction time is always ‘fast’.

Single reference QSS mixer

The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin QSS. With this system a high performance hi-fi stereo sound processing can be achieved.

For a simplified application without a sound IF SAW filter the single reference QSS mixer can be switched to the intercarrier mode by connecting pin SIF2 to ground. In this mode the sound IF passes the vision IF SAW filter and the composite IF signal is fed to the single reference QSS mixer. This IF signal is multiplied with the 90 degree TWD output signal for converting the sound IF to intercarrier frequency. This composite intercarrier signal is fed to the output pin QSS, too. By using this quadrature detection, the low frequency video signals are removed.

AM demodulator

The AM demodulator is realized by a multiplier. The modulated SIF amplifier output signal is multiplied in phase with the limited (AM is removed) SIF amplifier output signal. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the AF amplifier.

FM-PLL demodulator

The FM-PLL demodulator consists of a limiter and an FM-PLL. The limiter provides the amplification and limitation of the FM sound intercarrier signal. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset.

Furthermore the AF output signal can be muted by connecting a resistor between the limiter input pin FMin and ground.

The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM demodulator.

Audio Frequency signal processing

The AF amplifier consists of two parts:

1.The AF pre-amplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal

pin Vde-em at which the de-emphasis network for FM sound is applied. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread.

2.The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to AM, FM de-emphasis or mute state, controlled by the standard switching voltage and the mute switching voltage.

Internal voltage stabilizer

The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage.

2001 Oct 19

8

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VP	supply voltage	TDA9817, TDA9817T,	−	5.5	V
		TDA9818 and TDA9818T:
		maximum chip temperature
		of 120 °C; note 1
		TDA9817TS and	−	5.5	V
		TDA9818TS: maximum chip
		temperature of 130 °C;
		note 1
Vn	voltage at pins VIF1, VIF2, STD, CVAGC,		0	VP	V
	CSAGC, TPLL, Vde-em, Cde-em, CDEC, FMin,
	TAGC, CBL, AFC, VP, TOP, SIF1 and SIF2
tsc(max)	maximum short-circuit time to ground or VP		−	10	s
VTAGC	tuner automatic gain control output voltage		0	13.2	V
Tstg	storage temperature		−25	+150	°C
Tamb	ambient temperature		−20	+70	°C
Vesd	electrostatic handling voltage	note 2	−300	+300	V

Notes

1.IP = 104 mA; Tamb = 70 °C; Rth(j-a) = 65 K/W for TDA9817 and TDA9818, Rth(j-a) = 85 K/W for TDA9817T and TDA9818T, Rth(j-a) = 110 K/W for TDA9817TS and TDA9818TS.

2.Machine model class B (L = 2.5 μH).

THERMAL CHARACTERISTICS

SYMBOL	PARAMETER	CONDITIONS	VALUE	UNIT
Rth(j-a)	thermal resistance from junction to ambient	in free air
	TDA9817; TDA9818		65	K/W
	TDA9817T; TDA9818T		85	K/W
	TDA9817TS; TDA9818TS		110	K/W

2001 Oct 19

9

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

CHARACTERISTICS

VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and levels; input level Vi(VIF)(rms) = 10 mV (sync level for B/G, peak white level for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation DSB; residual carrier B/G: 10%; L = 3%; video signal in accordance with “CCIR, line 17” or “NTC-7 Composite”; measurements taken in Fig.15; unless otherwise specified.

	SYMBOL				PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Supply (pin VP)
VP					supply voltage	note 1	4.5	5	5.5	V
IP					supply current		76	90	104	mA
Vision IF amplifier (pins VIF1 and VIF2)
Vi(VIF)(rms)					input signal voltage	B/G standard; −1 dB video	−	60	100	μV
					sensitivity (RMS value)	at output
Vi(VIF)(max)(rms)					maximum input signal	B/G standard; 1 dB video	120	200	−	mV
					voltage (RMS value)	at output
V(IF)(int)					internal IF amplitude	within AGC range;	−	0.7	1	dB
					difference between picture	B/G standard;
					and sound carrier	f = 5.5 MHz
GIF(ctrl)					IF gain control range	see Fig.5	65	70	−	dB
Ri(dif)					differential input resistance	note 2	1.7	2.2	2.7	kΩ
Ci(dif)					differential input	note 2	1.2	1.7	2.5	pF
					capacitance
VI(VIF)					DC input voltage	note 2	−	3.4	−	V
True synchronous video demodulator; note 3
fVCO(max)					maximum oscillator	f = 2fpc	125	130	−	MHz
					frequency for carrier
					regeneration
f	osc	/	T		oscillator drift as a function	oscillator is free-running;	−	−	±20 × 10−6	K−1
					of temperature	IAFC = 0; note 4
f	osc	/	V	P	oscillator shift as a	oscillator is free-running;	−	−	±1.5 × 10−3	V−1
					function of supply voltage	note 4
VVCO(rms)					oscillator voltage swing at		50	80	110	mV
					pins VCO1 and VCO2
					(RMS value)
fcr(pc)					picture carrier capture	B/G, M/N and L standard	±1.4	±1.8	−	MHz
					range	L accent standard;	±0.9	±1.2	−	MHz
						fpc = 33.9 MHz;
						RLADJ = 5.6 kΩ
fpc(fr)					picture carrier frequency	L accent standard;	−	±200	±400	kHz
					(free-running) accuracy	fpc = 33.9 MHz;
						RLADJ = 5.6 kΩ
falgn(Laccent)					L accent alignment	L accent standard; IAFC = 0	±400	±600	−	kHz
					frequency range
tacq					acquisition time	BL = 70 kHz; note 5	−	−	30	ms

2001 Oct 19

10

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Vi(VIF)(sens)(rms)	VIF input signal voltage	maximum IF gain; note 6	−	30	70	μV
	sensitivity for PLL to be
	locked (RMS value);
	pins VIF1 and VIF2
Composite video amplifier (pin CVBS); sound carrier off
Vo(CVBS)(p-p)	output signal voltage	see Fig.10	0.97	1.1	1.23	V
	(peak-to-peak value)
V/S	ratio between video		1.9	2.33	3.0
	(black-to-white) and sync
	level
Vo(CVBS)	output signal voltage	difference between B/G	−	−	±12	%
	difference	and L standard
Vsync	sync voltage level	B/G and L standard	1.4	1.5	1.6	V
Vclip(u)	upper video clipping		VP − 1.1	VP − 1	−	V
	voltage level
Vclip(l)	lower video clipping		−	0.7	0.9	V
	voltage level
Ro	output resistance	note 2	−	−	10	Ω
Ibias(int)	internal DC bias current for		2.2	3.0	−	mA
	emitter-follower
Io(sink)(max)	maximum AC and DC		1.6	−	−	mA
	output sink current
Io(source)(max)	maximum AC and DC		2.9	−	−	mA
	output source current
Vo(CVBS)(B/G)	deviation of CVBS output	50 dB gain control	−	−	0.5	dB
	signal voltage at	30 dB gain control	−	−	0.1	dB
	B/G standard
Vo(BL)(B/G)	black level tilt in	gain variation; note 7	−	−	1	%
	B/G standard
Vo(BL)(L)	vertical black level tilt for	vision carrier modulated by	−	−	1.9	%
	worst case in L standard	test line (VITS) only; gain
		variation; note 7
Gdif	differential gain	“CCIR, line 330”	−	2	5	%
ϕdif	differential phase	“CCIR, line 330”	−	1	2	deg
Bv(−1dB)	−1 dB video bandwidth	B/G and L standard;	5	6	−	MHz
		CL < 50 pF; RL > 1 kΩ;
		AC load
Bv(−3dB)	−3 dB video bandwidth	B/G and L standard;	7	8	−	MHz
		CL < 50 pF; RL > 1 kΩ;
		AC load
S/NW	weighted signal-to-noise	see Fig.7; note 8	56	60	−	dB
	ratio
S/N	unweighted signal-to-noise	see Fig.7; note 8	49	53	−	dB
	ratio

2001 Oct 19

11

Philips Semiconductors	Preliminary specification

Single/multistandard VIF/SIF-PLL and

TDA9817; TDA9818

FM-PLL/AM demodulators

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
αIM(1.1)	intermodulation	f = 1.1 MHz; see Fig.8;	58	64	−	dB
	attenuation at ‘blue’	note 9
	intermodulation	f = 1.1 MHz; see Fig.8;	60	66	−	dB
	attenuation at ‘yellow’	note 9
αIM(3.3)	intermodulation	f = 3.3 MHz; see Fig.8;	58	64	−	dB
	attenuation at ‘blue’	note 9
	intermodulation	f = 3.3 MHz; see Fig.8;	59	65	−	dB
	attenuation at ‘yellow’	note 9
funwanted(p-p)	robustness for unwanted	L standard;	−	−	12	kHz
	frequency deviation of	residual carrier: 3%;
	picture carrier	serration pulses: 50%;
	(peak-to-peak value)	note 2
Δϕ	robustness for modulator	L standard;	−	−	3	%
	imbalance	residual carrier: 0%;
		serration pulses: 50%;
		note 2
αvc(rms)	residual vision carrier	fundamental wave and	−	2	5	mV
	(RMS value)	harmonics; B/G and
		L standard
αH(sup)	suppression of video	note 10a	35	40	−	dB
	signal harmonics
αH(spur)	spurious elements	note 10b	40	−	−	dB
PSRR	power supply ripple	video signal; grey level;
	rejection at pin CVBS	see Fig.13
		B/G standard	30	35	−	dB
		L standard	26	30	−	dB
VIF AGC detector (pins CVAGC and CBL)
Ich	charging current	B/G and L standard; note 7	0.75	1	1.25	mA
	additional charging current	L standard in event of	1.9	2.5	3.1	μA
		missing VITS pulses and
		no white video content
Idch	discharging current	B/G standard	15	20	25	μA
		normal mode L	225	300	375	nA
		fast mode L	30	40	50	μA
tresp(inc)	AGC response to an	B/G and L standard;	−	0.05	0.1	ms/dB
	increasing VIF step	note 11
tresp(dec)	AGC response to a	B/G standard	−	2.2	3.5	ms/dB
	decreasing VIF step	fast mode L	−	1.1	1.8	ms/dB
		normal mode L; note 11	−	150	240	ms/dB
IF	VIF amplitude step for	L standard	−2	−6	−10	dB
	activating fast AGC mode
Vth(CBL)	threshold voltage level	see Fig.10
	additional charging current	L standard	1.95	2.0	2.05	V
		L standard; fast mode L	1.6	1.66	1.72	V

2001 Oct 19

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