Philips TDA9812T-V1, TDA9812-V1 Datasheet

DATA SH EET

Preliminary speciﬁcation File under Integrated Circuits, IC02

1995 Mar 21

INTEGRATED CIRCUITS

Philips Semiconductors

TDA9812

Multistandard VIF-PLL and FM-PLL/AM demodulator

1995 Mar 21 2

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

FEATURES

• 5 V positive supply voltage

• Gain controlled wide band VIF-amplifier (AC-coupled)

• True synchronous demodulation with active carrier

regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response)

• Gated phase detector for L/L accent standard

• VCO frequency switchable between L and L accent

(alignment external) picture carrier frequency

• Separate video amplifier for sound trap buffering with high video bandwidth

• VIF AGC detector for gain control, operating as peak sync detector for B/G (optional external AGC) and peak white detector for L; signal controlled reaction time for L

• Tuner AGC with adjustable Take Over Point (TOP)

• AFC detector without extra reference circuit

• AC-coupled limiter amplifier for sound intercarrier signal

• Alignment-free FM-PLL demodulator with high linearity,

switchable de-emphasis for FM

• AM-SIF AGC detector for gain controlled SIF amplifier

• AM demodulator without extra reference circuit

• Stabilizer circuit for ripple rejection and to achieve

constant output signals.

GENERAL DESCRIPTION

The TDA9812/T is an integrated circuit for multistandard vision IF signal processing and AM and FM sound demodulation in TV and VTR sets.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA9812 SDIP32 plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 TDA9812T SO28 plastic small outline package; 28 leads body width 7.5 mm SOT136-1

1995 Mar 21 3

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

supply voltage 4.5 5 5.5 V

supply current 82 96 110 mA

i VIF(rms)

vision IF input signal voltage sensitivity (RMS value)

−1 dB video at output − 60 100 µV

o CVBS(p-p)

CVBS output signal voltage (peak-to-peak value)

1.7 2.0 2.3 V

−3

−3 dB video bandwidth on pin CVBS B/G and L standard;

< 20 pF; RL> 1kΩ;

AC load

78−MHz

S/N(W) weighted signal-to-noise ratio for

video

56 60 − dB

α1.1

intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB

α3.3

intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB

H(sup)

suppression of harmonics in video signal

35 40 − dB

i SIF(rms)

sound IF input signal voltage sensitivity (RMS value)

−3 dB video at AF output − 70 100 µV

o(rms)

audio output signal voltage for FM (RMS value)

B/G standard; 54% modulation

− 0.5 − V

audio output signal voltage for AM (RMS value)

L standard; 54% modulation − 0.5 − V

THD total harmonic distortion 54% modulation

FM − 0.15 0.5 % AM − 0.5 1.0 %

S/N (W) weighted signal-to-noise ratio 54% modulation

FM − 60 − dB AM 47 53 − dB

1995 Mar 21 4

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

BLOCK DIAGRAM

handbook, full pagewidth

INTERCARRIER

MIXER AND

AM DEMODULATOR

VCO TWD

AFC DETECTOR

TUNER AND VIF-AGC

FPLL

VIDEO DEMODULATOR

AND AMPLIFIER

SIF

AMPLIFIER

SIF-AGC

INTERNAL VOLTAGE

STABILIZER

FM DETECTOR (PLL)

AF AMPLIFIER

VIF AMPLIFIER

SIF

VIF

5.5

TDA9812

(26)

(24)

(23)

(7)

(6)

(9)

(17)

(15)

(14)

(12)

(11)

12 (10)

15 (13)

22 (19)

10 (8)

21 (18)

23

(20)

24

(21)

25

(22)

7

(5)

19

(16)

28

(25)

2 (2)

1 (1)

32 (28)

31 (27)

6

(4)

3

(3)

3018

i VIF2

i VIF1

i SIF2Vi SIF1

5 V

GND

1/2

ref

SAGC

standard

switch

STD

L/L

switch

SIF

o(int)

DEEM

n.c.

iFM

AF/AM

o AF

DEEM

de-emphasis

VIDEO

BUFFER

(vid)

o (vid)

CVBS

2 V (p-p)

video

1 V (p-p)

n.c.n.c.n.c. n.c.

AFC

VCO1

VCO2

2 x f

tuner

AGC

loop

filter

PLL

TOP

AGC

TADJ

TAGC

MBE452

Fig.1 Block diagram (TDA9812T pinning in parenthesis).

1995 Mar 21 5

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

PINNING

SYMBOL PIN SDIP32 PIN SO28 DESCRIPTION

i VIF1

1 1 VIF differential input signal voltage 1

i VIF2

2 2 VIF differential input signal voltage 2

3 3 black level detector n.c. 4 − not connected n.c. 5 − not connected TADJ 6 4 tuner AGC take-over adjust (TOP) T

PLL

7 5 PLL loop ﬁlter C

SAGC

8 6 SIF AGC capacitor STD 9 7 standard switch V

o CVBS

10 8 CVBS output signal voltage LSWI 11 9 L/L accent switch V

oAF

12 10 audio voltage frequency output DEEM

13 11 de-emphasis input DEEM

14 12 de-emphasis output C

DEC

15 13 decoupling capacitor n.c. 16 14 not connected V

iFM

17 15 sound intercarrier input voltage n.c. 18 − not connected TAGC 19 16 tuner AGC output V

o(int)

20 17 sound intercarrier output voltage V

o(vid)

21 18 composite video output voltage V

i(vid)

22 19 video buffer input voltage AFC 23 20 AFC output VCO1 24 21 VCO1 reference circuit for 2f

VCO2 25 22 VCO2 reference circuit for 2f

ref

26 23

⁄2VP reference capacitor

GND 27 24 ground C

VAGC

28 25 VIF AGC capacitor V

29 26 supply voltage n.c. 30 − not connected V

i SIF1

31 27 SIF differential input signal voltage 1 V

i SIF2

32 28 SIF differential input signal voltage 2

1995 Mar 21 6

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

Fig.2 Pin configuration (SDIP32).

handbook, halfpage

TDA9812

MBE436

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

V V

TADJ

n.c.

STD

LSWI

DEEM

n.c.

V V

V C

GND

n.c.

VCO2 VCO1 AFC

V V V

TAGC n.c.

DEC

o AF

o CVBS

SAGC

PLL

i VIF2

i VIF1

i SIF1

i SIF2

VAGC

ref

i FM

o(int)

o(vid)

i(vid)

Fig.3 Pin configuration (SO28).

handbook, halfpage

TDA9812T

MBE435

1 2 3 4 5 6 7 8

9 10 11 12 13 14

V V

TADJ

STD

LSWI

DEEM

n.c.

28 27 26 25 24 23 22 21 20 19 18 17 16 15

V V V C

GND C

VCO2 VCO1 AFC

V V V

TAGC V

DEC

o AF

o CVBS

SAGC

PLL

i VIF2

i VIF1

i SIF1

i SIF2

VAGC

ref

i FM

o(int)

o(vid)

i(vid)

1995 Mar 21 7

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

FUNCTIONAL DESCRIPTION Vision IF ampliﬁer

The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration.

Tuner and VIF AGC

The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC take-over point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level.

The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level and for positive video modulation the peak white level of the video signal is detected. In order to reduce the reaction time for positive modulation, where a very large time constant is needed, an additional level detector increases the discharging current of the AGC capacitor (fast mode) in the event of a decreasing VIF amplitude step. The additional level information is given by the black-level detector voltage.

Frequency-Phase detector (FPLL)

The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. In the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion for overmodulated VIF signals.

VCO, travelling wave divider and AFC

The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its freerunning frequency to actually double the PC frequency is generated by the Frequency-Phase detector and fed via the loop filter to the first variable capacitor (FPLL). This control voltage is amplified and additionally converted into a current which represents the AFC output signal. The VCO centre frequency can be decreased (required for L/L accent standard) by activating an additional internal capacitor. This is achieved by using the L/L accent switch. In this event the second variable capacitor can be controlled by a variable resistor at the L/L accent switch for setting the VCO centre frequency to the required L/L accent value. At centre frequency the AFC output current is equal to zero.

The oscillator signal is divided-by-two with a Travelling Wave Divider (TWD) which generates two differential output signals with a 90 degree phase difference independent of the frequency.

Video demodulator and ampliﬁer

The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in phase’ signal of the travelling wave divider output. In the demodulator stage the video signal polarity can be switched in accordance with the TV standard.

The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics for B/G and L standard. The standard dependent level shift in this stage delivers the same sync level for positive and negative modulation. The video output signal is 1 V (p-p) for nominal vision IF modulation.

1995 Mar 21 8

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

Video buffer

For an easy adaption of the sound traps an operational amplifier with internal feedback is used in the event of B/G and L standard. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided.

SIF ampliﬁer and AGC for AM sound

The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration.

The SIF AGC detector is related to the SIF input signals (average level of AM carrier) and controls the SIF amplifier to provide a constant SIF signal to the AM demodulator. The SIF AGC reaction time is set to ‘slow’ for nominal video conditions. But with a decreasing VIF amplitude step the SIF AGC is set to ‘fast’ mode controlled by the VIF AGC detector.

Intercarrier mixer

The intercarrier mixer is realized by a multiplier. The VIF amplifier output signal is fed to the intercarrier mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components.

AM demodulator

The AM demodulator is realized by a multiplier. The modulated SIF amplifier output signal is multiplied in phase with the limited (AM is removed) SIF amplifier output signal. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the AF amplifier.

FM detector

The FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling.

The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator

The AF amplifier consists of two parts:

• The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal, at which the de-emphasis network for FM sound is applied. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread.

• The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to AM, FM de-emphasis or mute state, controlled by the standard switching voltage and the mute switching voltage.

Internal voltage stabilizer and

⁄2VP-reference

The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage.

For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the

⁄2VP voltage has to be filtered via a low-pass filter by

using an external capacitor together with an integrated resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal start-up circuit is added.

1995 Mar 21 9

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

LIMITING VALUES

SDIP32 In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. I

= 110 mA; T

amb

= +70 °C; R

th j-a

= 60 K/W for SDIP32 and R

th j-a

= 80 K/W for SO28.

2. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

supply voltage (pin 29) maximum chip temperature

of +120 °C; note 1

0 5.5 V

voltage at pins 1 to 9, 11 to 19, 22, 23 and 28 to 32

s(max)

maximum short-circuit time − 10 s

tuner AGC output voltage 0 13.2 V

stg

storage temperature −25 +150 °C

amb

operating ambient temperature −20 +70 °C

esd

electrostatic handling voltage note 2 −300 +300 V

SYMBOL PARAMETER VALUE UNIT

th j-a

thermal resistance from junction to ambient in free air

SDIP32 60 K/W SO28 80 K/W

1995 Mar 21 10

Philips Semiconductors Preliminary speciﬁcation

Multistandard VIF-PLL and FM-PLL/AM demodulator

TDA9812

CHARACTERISTICS

SDIP32 pinning; VP=5V; T

amb

= +25 °C; see Table 1 for input frequencies and level; input level V

iIF1,2

=10mV RMS value (sync-level for B/G, peak white level for L); video modulation DSB; residual carrier B/G: 10%; L = 3%; video signal in accordance with

“CCIR, line 17”

; measurements taken in Fig.17 unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 29)

supply voltage note 1 4.5 5 5.5 V

supply current 82 96 110 mA

Vision IF ampliﬁer (pins 1 and 2)

i(VIF)(rms)

input signal voltage sensitivity (RMS value)

B/G standard; −1 dB video at output

− 60 100 µV

i(max)(rms)

maximum input signal voltage (RMS value)

B/G standard; +1 dB video at output

120 200 − mV

∆V

o(int)

internal IF amplitude difference between picture and sound carrier

within AGC range; B/G standard;

∆f = 5.5 MHz

− 0.7 1 dB

IF gain control range see Figs 5 and 6 65 70 − dB

i(diff)

differential input resistance note 2 1.7 2.2 2.7 kΩ

i(diff)

differential input capacitance note 2 1.2 1.7 2.5 pF

1/2

DC input voltage − 3.4 − V True synchronous video demodulator; see note 3 f

VCO(max)

maximum oscillator frequency

for carrier regeneration

f=2f

125 130 − MHz

∆f

VCO

oscillator drift (free-running) as a

function of temperature

AFC

= 0; note 4 −20 − +20 ppm/K

0 ref(rms)

oscillator voltage swing at

pins 24 and 25 (RMS value)

B/G and L standard 70 100 130 mV L/L accent standard 45 65 85 mV

∆f

pc(capt)

vision carrier capture frequency

range

B/G and L standard ±1.5 ±2.0 − MHz L/L accent standard;

= 33.9 MHz;

R11= 5.6 kΩ

±1.0 ±1.3 − MHz

∆f

pc(ff)

vision carrier frequency

(free-running) accuracy

L/L accent standard; fpc= 33.9 MHz; R11= 5.6 kΩ

−±200 ±400 kHz

∆f

pc(alg)

L/L accent alignment frequency

range

AFC

=0 ±400 ±600 − kHz

acqu

acquisition time BL = 60 kHz; note 5 −−30 ms V

i (VIF)(rms)

VIF input signal voltage

sensitivity for PLL to be locked

(RMS value; pins 1 and 2)

maximum IF gain; note 6 − 30 70 µV

PLL(os)

FPLL offset current at pin 7 note 7 −−±4.5 µA

+ 22 hidden pages