Philips TDA9810T-V2, TDA9810T-V1 Datasheet

DATA SH EET

Product speciﬁcation Supersedes data of 1997 Jun 19 File under Integrated Circuits, IC02

1999 May 07

INTEGRATED CIRCUITS

TDA9810

Multistandard VIF-PLL with QSS-IF and AM demodulator

1999 May 07 2

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

FEATURES

• 5 V supply voltage

• Gain controlled wide band Video Intermediate

Frequency (VIF)-amplifier (AC-coupled)

• True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response)

• Gated phase detector for L/L accent standard; robustness for over-modulation until 105%

• Voltage Controlled Oscillator (VCO) frequency switchable between L and L accent (alignment external) picture carrier frequency

• Separate video amplifier for sound trap buffering with high video bandwidth

• VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for B/G (optional external AGC) and peak white detector for L; signal controlled reaction time for L

• Tuner AGC with adjustable TakeOver Point (TOP)

• AFC detector without extra reference circuit

• SIF-input for single reference Quasi Split Sound (QSS)

mode (Phase Locked Loop (PLL) controlled); Sound Intermediate Frequency (SIF) AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode

• AM demodulator without extra reference circuit

• AM mute (especially for NICAM)

• Stabilizer circuit for ripple rejection and to achieve

constant output signals.

GENERAL DESCRIPTION

The TDA9810 is an integrated circuit for multistandard vision IF signal processing and sound AM demodulation, with single reference QSS-IF in TV and VCR sets.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA9810 SDIP24 plastic shrink dual in-line package; 24 leads (400 mil) SOT234-1 TDA9810T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

1999 May 07 3

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

supply voltage 4.5 5 5.5 V

supply current 77 90 103 mA

i(VIF)(rms)

vision IF input signal voltage sensitivity (RMS value)

−1 dB video at output − 60 100 µV

o(CVBS)(p-p)

CVBS output signal voltage (peak-to-peak value)

1.7 2.0 2.3 V

−3

−3 dB video bandwidth on pin CVBS B/G and L standard;

CL< 20 pF; RL> 1kΩ; AC load

78−MHz

S/N

W(video)

weighted signal-to-noise ratio for video 56 60 − dB

IM(1.1)

intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB

IM(3.3)

intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB

H(sup)

suppression of video signal harmonics 35 40 − dB

i(SIF)(rms)

sound IF input signal voltage sensitivity (RMS value)

−3 dB at intercarrier output − 30 70 µV

o(intercarrier)(rms)

IF intercarrier level (RMS value) SC1 output signal 100 140 180 mV

output signal 100 140 180 mV

NICAM

output signal 14 20 26 mV

o(AF)(rms)

AF output signal voltage (RMS value) L standard;

54% modulation

− 500 − mV

THD total harmonic distortion 54% modulation − 0.5 1.0 % S/N

weighted signal-to-noise ratio 54% modulation 47 53 − dB

1999 May 07 4

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and

AM demodulator

TDA9810

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BLOCK DIAGRAM

handbook, full pagewidth

SINGLE REFERENCE

MIXER AND

AM DEMODULATOR

VCO TWD

AFC DETECTOR

TUNER AND VIF-AGC

L/L accent

gating switch

FPLL

VIDEO DEMODULATOR

AND AMPLIFIER

SIF

AMPLIFIER

SIF-AGC

INTERNAL VOLTAGE

STABILIZER

VIF AMPLIFIER

SIF

SAW

VIF

SAW

TDA9810

22 20 8 5

1719184162114 315

2 1

23 24

VP = +5 V

SAGC

GND

standards

selection

switch

AF AMPLIFIER

AMPLIFIER SWITCH

AF/AM

i(vid)

VIDEO

BUFFER

CVBS

2 V (p-p)

video

1 V (p-p)

AFC

2 x f

tuner AGC

loop filter

TOP

VAGCCBL

TOP

MHA713

AM mute

switch

QSS

intercarrier

output

L/L accent

switch

Fig.1 Block diagram.

1999 May 07 5

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

PINNING

SYMBOL PIN DESCRIPTION

i VIF1

1 VIF differential input signal voltage 1

i VIF2

2 VIF differential input signal voltage 2 TADJ 3 tuner AGC takeover point adjust T

PLL

4 PLL loop ﬁlter C

SAGC

5 SIF AGC capacitor V

oAF

6 AM audio frequency output voltage LSWI 7 L/L accent switch STD 8 standard switch V

o(vid)

9 composite video output voltage V

o QSS

10 single reference QSS output voltage MUTE 11 AM mute switch V

o CVBS

12 CVBS output signal voltage

i(vid)

13 video buffer input voltage LGATSWI 14 L/L accent gating switch C

15 black level detector TAGC 16 tuner AGC output AFC 17 AFC output VCO1 18 VCO1 reference circuit for 2f

VCO2 19 VCO2 reference circuit for 2f

GND 20 ground C

VAGC

21 VIF AGC capacitor V

22 supply voltage V

i SIF1

23 SIF differential input signal voltage 1 V

i SIF2

24 SIF differential input signal voltage 2

SYMBOL PIN DESCRIPTION

Fig.2 Pin configuration SDIP24 package.

handbook, halfpage

TDA9810

MHA712

1 2 3 4 5 6 7 8

9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

i VIF1

i VIF2

PLL

SAGC V

o AF

o(vid)

o QSS

o CVBS

TADJ

LSWI

STD

MUTE

i SIF2

i SIF1

VAGC

i(vid)

GND VCO2 VCO1 AFC TAGC

LGATSWI

Fig.3 Pin configuration SO24 package.

handbook, halfpage

MHA722

1 2 3 4 5 6 7 8

9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

i VIF1

i VIF2

PLL

SAGC V

o AF

o(vid)

o QSS

o CVBS

TADJ

LSWI

STD

MUTE

i SIF2

i SIF1

VAGC

i(vid)

GND VCO2 VCO1 AFC TAGC

LGATSWI

TDA9810T

1999 May 07 6

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

FUNCTIONAL DESCRIPTION Vision IF ampliﬁer

The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration.

Tuner and VIF AGC

The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (pin TAGC, open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level.

The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level and for positive video modulation the peak white level of the video signal is detected. In order to reduce the reaction time for positive modulation, where a very large time constant is needed, an additional level detector increases the discharging current of the AGC capacitor (fast mode) in the event of a decreasing VIF amplitude step. The additional level information is given by the black-level detector voltage.

Frequency Phase Locked Loop detector (FPLL)

The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. In the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion for overmodulated VIF signals. This mode can be switched off by the L/L accent gating switch.

VCO, Travelling Wave Divider (TWD) and AFC

The VCO operates with a resonance circuit (with L and C in parallel) at double the Picture Carrier (PC) frequency.

The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the Frequency-Phase detector and fed via the loop filter to the first variable capacitor (FPLL). This control voltage is amplified and additionally converted into a current which represents the AFC output signal. The VCO centre frequency can be decreased (required for L accent standard) by activating an additional internal capacitor. This is achieved by using the L/L accent gating switch. In this event the second variable capacitor can be controlled by a variable resistor at the L/L accent gating switch for setting the VCO centre frequency to the required L accent value. At centre frequency the AFC output current is equal to zero.

The oscillator signal is divided-by-two with a TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency.

Video demodulator and ampliﬁer

The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in phase’ signal of the travelling wave divider output. In the demodulator stage the video signal polarity can be switched in accordance with the TV standard.

The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics for B/G and L standard. The standard dependent level shift in this stage delivers the same sync level for positive and negative modulation. The video output signal is 1 V (p-p) for nominal vision IF modulation.

Video buffer

For an easy adaption of the sound traps an operational amplifier with internal feedback is used in the event of B/G and L standard. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided.

1999 May 07 7

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

SIF ampliﬁer and AGC

The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration.

The SIF AGC detector is related to the SIF input signals (average level of AM or FM carriers) and controls the SIF amplifier to provide a constant SIF signal to the AM demodulator and single reference QSS mixer. The SIF AGC reaction time is set to ‘slow’ for nominal video conditions. But with a decreasing VIF amplitude step the SIF AGC is set to ‘fast’ mode controlled by the VIF AGC detector. In FM mode this reaction time is also set to ‘fast’ controlled by the standard switch.

Single reference QSS mixer

The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin 10. With this system a high performance hi-fi stereo sound processing can be achieved.

AM demodulator

The AM demodulator is realized by a multiplier. The modulated SIF amplifier output signal is multiplied in phase with the limited (AM is removed) SIF amplifier output signal. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the AF amplifier. This AM output signal can be muted by using the AM mute switch.

Internal voltage stabilizer and

⁄2VP-reference

The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage.

For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the

⁄2VP voltage has to be filtered via a low-pass filter by

using an external capacitor together with an integrated resistor (f

−3dB

= 5 Hz). For a fast setting to 1⁄2VP an internal

start-up circuit is available.

1999 May 07 8

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. I

= 103 mA; T

amb

=70°C; R

th j-a

= 69 K/W for SDIP24 and R

th j-a

= 90 K/W for SO24.

2. Machine Model class B: L = 2.5 µH.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

supply voltage (pin 22) maximum chip temperature

of 125 °C; note 1

0 5.5 V

input voltage at pins 1 to 8, 1 1, 13 to 17 and 20 to 24

sc(max)

maximum short-circuit time − 10 s

TAGC

tuner AGC output voltage 0 13.2 V

stg

storage temperature −25 +150 °C

amb

operating ambient temperature −20 +70 °C

electrostatic handling voltage note 2 −300 +300 V

SYMBOL PARAMETER CONDITIONS VALUE UNIT

th j-a

thermal resistance from junction to ambient in free air

SOT234-1 69 K/W SOT137-1 90 K/W

1999 May 07 9

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

CHARACTERISTICS

VP=5V; T

amb

=25°C; see Table 1 for input frequencies and level; input level V

i(IF)(rms)

= 10 mV (sync-level for B/G, peak white level for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation DSB; residual carrier B/G: 10%; L = 3%; video signal in accordance with

“CCIR, line 17”

; measurements taken in Fig.14; unless otherwise

speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 22)

supply voltage note 1 4.5 5 5.5 V

supply current 77 90 103 mA

Vision IF ampliﬁer (pins 1 and 2)

i(VIF)(rms)

input signal voltage sensitivity (RMS value)

B/G standard; −1 dB video at output

− 60 100 µV

i(max)(rms)

maximum input signal voltage (RMS value)

B/G standard; +1 dB video at output

120 200 − mV

∆V

o(int)

internal IF amplitude difference between picture and sound carrier

within AGC range; B/G standard;

∆f = 5.5 MHz

− 0.7 1 dB

IFcr

IF gain control range see Fig.4 65 70 − dB

i(diff)

differential input resistance note 2 1.7 2.2 2.7 kΩ

i(diff)

differential input capacitance note 2 1.2 1.7 2.5 pF

I(1,2)

DC input voltage note 2 − 3.4 − V True synchronous video demodulator; note 3 f

VCO(max)

maximum oscillator

frequency for carrier

regeneration

f=2f

125 130 − MHz

∆f

osc

/∆T oscillator drift as a function

of temperature

oscillator is free-running; I

AFC

= 0; note 4

−−±20 × 10−6K

−1

VCO(rms)

oscillator voltage swing at

pins 18 and 19 (RMS value)

70 100 130 mV

cr(pc)

picture carrier capture

frequency range

B/G and L standard ±1.5 ±2.0 − MHz L accent standard;

= 33.9 MHz;

R7= 5.6 kΩ

±1.0 ±1.3 − MHz

∆f

pc(fr)

picture carrier frequency

(free-running) accuracy

L accent standard; fpc= 33.9 MHz; R7= 5.6 kΩ

−±200 ±400 kHz

alg(L accent)

L accent alignment

frequency range

AFC

=0 ±400 ±600 − kHz

acq

acquisition time BL = 70 kHz; note 5 −−30 ms V

i(VIF)(rms)

VIF input signal voltage

sensitivity for PLL to be

locked (RMS value;

pins 1 and 2)

maximum IF gain; note 6 − 30 70 µV

offset(FPLL)

FPLL offset current at pin 4 note 7 −−±4.5 µA

1999 May 07 10

Philips Semiconductors Product speciﬁcation

Multistandard VIF-PLL with QSS-IF and AM demodulator

TDA9810

Composite video ampliﬁer (pin 9; sound carrier off)

o(video)(p-p)

output signal voltage

(peak-to-peak value)

see Fig.9 0.88 1.0 1.12 V

V/S ratio between video

(black-to-white) and

sync level

1.9 2.33 3.0 −

sync(9)

sync voltage level B/G and L standard − 1.5 − V V

clu(9)

upper video clipping voltage

level

VP− 1.1 VP− 1 − V

cll(9)

lower video clipping voltage

level

− 0.3 0.4 V

o(9)

output resistance note 2 −−10 Ω I

bias(9)(int)

internal DC bias current for

emitter-follower

2.2 3.0 − mA

sink(9)(max)

maximum AC and DC output

sink current

1.6 −− mA

source(9)(max)

maximum AC and DC output

source current

2.9 −− mA

−1

−1 dB video bandwidth B/G and L standard;

CL< 50 pF; RL> 1kΩ; AC load

56− MHz

−3

−3 dB video bandwidth B/G and L standard;

CL< 50 pF; RL> 1kΩ; AC load

78− MHz

H(sup)

suppression of video signal

harmonics

CL< 50 pF; RL> 1kΩ; AC load; note 8a

35 40 − dB

PSRR power supply ripple rejection

at pin 9

video signal; grey level; see Fig.12

B/G standard 32 35 − dB L standard 26 30 − dB

CVBS buffer ampliﬁer (only) and noise clipper (pins 12 and 13)

i(13)

input resistance note 2 2.6 3.3 4.0 kΩ C

i(13)

input capacitance note 2 1.4 2 3.0 pF V

I(13)

DC input voltage 1.4 1.7 2.0 V G

voltage gain B/G and L standard; note 9 6.5 7 7.5 dB V

clu(12)

upper video clipping voltage

level

3.9 4.0 − V

cll(12)

lower video clipping voltage

level

− 1.0 1.1 V

o(12)

output resistance note 2 −−10 Ω I

bias(12)(int)

DC internal bias current for

emitter-follower

2.0 2.5 − mA

sink(12)(max)

maximum AC and DC output

sink current

1.4 −− mA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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