2 x 7 W stereo Bridge Tied Load (BTL) audio amplifier
Rev. 02 — 14 February 2000Product specification
1.General description
The TDA8944J is a dual-channel audio power amplifier with an output power of
2 × 7 W at an 8 Ω load and a 12 V supply. The circuit contains two Bridge Tied Load
(BTL) amplifierswith an all-NPN output stage and standby/mutelogic. The TDA8944J
comes in a 17-pin DIL-bent-SIL (DBS) power package. The TDA8944J is
printed-circuit board (PCB) compatible with all other types in the TDA894x family.
One PCB footprint accommodates both the mono and the stereo products.
2.Features
■ Few external components
■ Fixed gain
■ Standby and mute mode
■ No on/off switching plops
■ Low standby current
■ High supply voltage ripple rejection
■ Outputs short-circuit protected to ground, supply and across the load
n.c.13not connected
OUT2−14negative loudspeaker terminal 2
GND215ground channel 2
V
CC2
OUT2+17positive loudspeaker terminal 2
8.Functional description
The TDA8944J is a stereo BTL audio power amplifier capable of delivering 2 × 7W
output power to an 8 Ω load at THD = 10%, using a 12 V power supply and an
external heatsink. The voltage gain is fixed at 32 dB.
With the three-level MODE input the device can be switched from ‘standby’ to ‘mute’
and to ‘operating’ mode.
The TDA8944J outputs are protected by an internal thermal shutdown protection
mechanism and a short-circuit protection.
8.1 Input configuration
The TDA8944J inputs can be driven symmetrical (floating) as well as asymmetrical.
In the asymmetrical mode one input pin is connected via a capacitor to the signal
ground which should be as close as possible to the SVR (electrolytic) capacitor
ground. Note that the DC level of the input pins is half of the supply voltage VCC, so
coupling capacitors for both pins are necessary.
As shown in Equation 1 and 2, large capacitor values for the inputs are not
necessary; so the switch-on delay during charging of the input capacitors, can be
minimized. This results in a good low frequency response and good switch-on
behaviour.
Remark: TopreventHF oscillations do not leave the inputs open, connect a capacitor
of at least 1.5 nF across the input pins close to the device.
9397 750 06861
Product specificationRev. 02 — 14 February 20004 of 21
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output
stage, capable of delivering a peak output current of 2 A.
The BTL principle offers the following advantages:
•
•
•
•
8.2.1 Output power measurement
The output power as a function of the supply voltage is measured on the output pins
at THD = 10%; see Figure 8. The maximum output power is limited by the maximum
supply voltage of 12 V and the maximum available output current: 2 A repetitive peak
current.
8.2.2 Headroom
Typical CD music requires at least 12 dB (factor 15.85) dynamic headroom –
compared to the average power output – for transferring the loudest parts without
distortion. At VCC=12V, RL=8Ω and Po= 4 W at THD = 0.1% (see Figure 6), the
Average Listening Level (ALL) – music power – without any distortion yields:
P
TDA8944J
2 x 7 W stereo BTL audio amplifier
Lower peak value of the supply current
The ripple frequency on the supply voltage is twice the signal frequency
No expensive DC-blocking capacitor
Good low frequency performance.
= 4 W/15.85 = 252 mW.
o(ALL)
The power dissipation can be derived from Figure 11 on page 10 for 0 dB
respectively 12 dB headroom.
For the average listening level a power dissipation of 4 W can be used for a heatsink
calculation.
8.3 Mode selection
The TDA8944J has three functional modes, which can be selected by applying the
proper DC voltage to pin MODE. See Figure 4 and 5 for the respective DC levels,
which depend on the supply voltage level. The MODE pin can be driven by a 3-state
logic output stage: e.g. a microcontroller with additional components for DC-level
shifting.
Standby — In this mode the current consumption is very low and the outputs are
floating. The device is in standby mode when (VCC− 0.5 V) < V
the MODE pin is left floating (high impedance). The power consumption of the
TDA8944J will be reduced to <0.18 mW.
MODE<VCC
, or when
9397 750 06861
Product specificationRev. 02 — 14 February 20005 of 21
Mute — In this mode the amplifier is DC-biased but not operational (no audio output);
the DC level of the input and output pins remain on half the supply voltage. This
allows the input coupling and Supply Voltage Ripple Rejection (SVRR) capacitors to
be charged to avoid pop-noise. The device is in mute mode when
3V<V
Operating — In this mode the amplifier is operating normally. The operating mode is
activated at V
8.3.1 Switch-on and switch-off
To avoid audible plops during supply voltage switch-on or switch-off, the device is set
to standby mode before the supply voltage is applied (switch-on) or removed
(switch-off).
The switch-on and switch-off time can be influenced by an RC-circuit on the MODE
pin. Rapid on/off switching of the device or the MODE pin may cause ‘click- and
pop-noise’. This can be prevented by proper timing of the RC-circuit on the MODE
pin.
<(VCC− 1.5 V).
MODE
MODE
TDA8944J
2 x 7 W stereo BTL audio amplifier
< 0.5 V.
8.4 Supply Voltage Ripple Rejection (SVRR)
The SVRR is measured with an electrolytic capacitor of 10 µF on pin SVR at a
bandwidth of 10 Hz to 80 kHz. Figure 13 on page 11 illustrates the SVRR as function
of the frequency. A larger capacitor value on the SVR pin improves the ripple rejection
behaviour at the lower frequencies.
8.5 Built-in protection circuits
The TDA8944J contains two types of protection circuits, i.e. short-circuit and thermal
shutdown.
8.5.1 Short-circuit protection
Short-circuit to ground or supply line — This is detected by a so-called ‘missing
current’ detection circuit which measures the current in the positive supply line and
the current in the ground line. A difference between both currents larger than 0.4 A,
switches the power stage to standby mode (high impedance).
Short-circuit across the load — This is detected by an absolute-current
measurement. An absolute-current larger than 2 A, switches the power stage to
standby mode (high impedance).
8.5.2 Thermal shutdown protection
The junction temperature is measured by a temperature sensor; at a junction
temperature of approximately 150 °C this detection circuit switches the power stage
to standby mode (high impedance).
9397 750 06861
Product specificationRev. 02 — 14 February 20006 of 21
Fig 4. Quiescent current as function of mode voltage.
voltage.
12. Dynamic characteristics
Table 8:Dynamic characteristics
VCC=12V; T
22 Hz to 22 kHz; unless otherwise specified.
SymbolParameterConditionsMinTypMaxUnit
P
o
THDtotal harmonic distortionP
G
v
Z
i(dif)
V
n(o)
SVRRsupply voltage ripple rejectionf
V
o(mute)
α
cs
=25°C; RL=8Ω; f = 1 kHz; V
amb
= 0 V; measured in test circuit Figure 14; audio pass band
MODE
output powerTHD = 10%67-W
THD = 0.5%45-W
= 1 W-0.030.1%
o
voltage gain313233dB
differential input impedance7090110kΩ
noise output voltage
ripple
f
ripple
= 1 kHz
= 100 Hz
[1]
-90120µV
[2]
5065-dB
[2]
-60-dB
to 20 kHz
output voltagemute mode
[3]
--50µV
channel separationRs=0Ω5075-dB
[1] The noise output voltage is measured at the output in a frequency range from 20 Hz to 20 kHz (unweighted), with a source impedance
Rs=0Ω at the input.
[2] Supply voltage ripple rejection is measured at the output, with a source impedance Rs=0Ω at the input. The ripple voltage is a sine
wave with a frequency f
and an amplitude of 707 mV (RMS), which is applied to the positive supply rail.
ripple
[3] Output voltage in mute mode is measured with an input voltage of 1 V (RMS) in a bandwidth of 20 kHz, so including noise.
For a high system performance level certain grounding techniques are essential.
The input referencegrounds haveto be tied with their respective source grounds and
must have separate tracks from the power ground tracks; this will prevent the large
(output) signal currents from interfering with the small AC input signals.
The small-signal ground tracks should be physically located as far as possible from
the power ground tracks. Supply and output tracks should be as wide as possible for
delivering maximum output power.
Proper supply bypassing is critical for low-noise performance and high supply voltage
ripple rejection. The respective capacitor locations should be as close as possible to
the device and grounded to the power ground. Proper power supply decoupling also
prevents oscillations.
For suppressing higher frequency transients (spikes) on the supply line a capacitor
with low ESR – typical 100 nF – has to be placed as close as possible to the device.
For suppressing lower frequency noise and ripple signals, a large electrolytic
capacitor – e.g. 1000 µF or greater – must be placed close to the device.
The bypass capacitor on the SVR pin reduces the noise and ripple on the midrail
voltage. For good THD and noise performance a low ESR capacitor is recommended.
9397 750 06861
Product specificationRev. 02 — 14 February 200014 of 21
The measured maximum thermal resistance of the IC package, R
th(j-mb)
is 6.9 K/W.
A calculation for the heatsink can be made, with the following parameters:
T
amb(max)
=50°C
VCC= 12 V and RL=8Ω
T
= 150 °C.
j(max)
R
is the total thermal resistance between the junction and the ambient
th(tot)
including the heatsink. In the heatsink calculations the value of R
th(mb-h)
is ignored.
At VCC= 12 V and RL=8Ω the measured worstcase sine-wave dissipation is 8 W;
see Figure 11. For T
= 150 °C the temperature raise - caused by the power
j(max)
dissipation - is: 150 – 50 = 100 °C.
P × R
R
th(tot)
R
th(h-a)=Rth(tot)–Rth(j-mb)
= 100 °C
th(tot)
= 100/8 = 12.5 K/W
= 12.5 – 6.9 = 5.6 K/W.
The calculation above is for an application at worstcase (stereo) sine-wave output
signals. In practice music signals will be applied, which decreases the maximum
power dissipation to approximately half of the sine-wave power dissipation (see
Section 8.2.2). This allows for the use of a smaller heatsink:
P × R
R
th(tot)
R
th(h-a)=Rth(tot)–Rth(j-mb)
= 100 °C
th(tot)
= 100/4 = 25 K/W
= 25 – 6.9 = 18.1 K/W.
To increase the lifetime of the IC, T
heatsink of approximately 12 K/W for music signals.
15. Test information
15.1 Quality information
The
applicable.
15.2 Test conditions
T
amb
unless otherwise specified.
Remark: In the graphs as function of frequency no bandpass filter was applied; see
Figure 7, 12 and 13.
should be reduced to 125 °C. This requires a
j(max)
General Quality Specification for Integrated Circuits, SNW-FQ-611D
is
=25°C; VCC= 12 V; f = 1 kHz; RL=8Ω; audio pass band 22 Hz to 22 kHz;
9397 750 06861
Product specificationRev. 02 — 14 February 200015 of 21
Product specificationRev. 02 — 14 February 200016 of 21
Page 17
Philips Semiconductors
17. Soldering
17.1 Introduction to soldering through-hole mount packages
This text gives a brief insight to wave, dip and manual soldering. A more in-depth
account of soldering ICs can be found in our
Packages
Wave soldering is the preferred method for mounting of through-hole mount IC
packages on a printed-circuit board.
17.2 Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is 260 °C; solder at this
temperature must not be in contact with the joints for more than 5 seconds. The total
contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the
plastic body must not exceed the specified maximum storage temperature (T
If the printed-circuit board has been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within the permissible limit.
2 x 7 W stereo BTL audio amplifier
Data Handbook IC26; Integrated Circuit
(document order number 9398 652 90011).
TDA8944J
).
stg(max)
17.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the
seating plane or not more than 2 mm above it. If the temperature of the soldering iron
bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit
temperature is between 300 and 400 °C, contact may be up to 5 seconds.
17.4 Package related soldering information
Table 10: Suitability of through-hole mount IC packages for dipping and wave soldering
methods
PackageSoldering method
DippingWave
DBS, DIP, HDIP, SDIP, SILsuitablesuitable
[1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the
printed-circuit board.
[1]
9397 750 06861
Product specificationRev. 02 — 14 February 200017 of 21
Objective specificationDevelopmentThis data sheet contains the design target or goal specifications for product development. Specification may
change in any manner without notice.
Preliminary specification QualificationThis data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design and
supply the best possible product.
Product specificationProductionThis data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any
time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
20. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
[1]
21. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 14 February 2000Document order number: 9397 750 06861
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