Philips TDA8705AT-C1, TDA8705AT-C3, TDA8705AT-C2, TDA8705AT-C1-S1 Datasheet
DATA SH EET
Product specification
Supersedes data of November 1994
File under Integrated Circuits, IC02
1996 Jan 12
INTEGRATED CIRCUITS
TDA8705A
6-bit high-speed dual
Analog-to-Digital Converter (ADC)
1996 Jan 12 2
Philips Semiconductors Product specification
6-bit high-speed dual Analog-to-Digital
Converter (ADC)
TDA8705A
FEATURES
• 2 times 6-bit resolution
• Sampling rate up to 80 MHz
• High signal-to-noise ratio over a large analog input
frequency range (5.5 effective bits at 20 MHz full-scale
input at f
clk
= 80 MHz)
• TTL output
• Two separated inputs (AC-coupling)
• TTL compatible digital inputs
• Low-level AC clock input signal allowed
• Internal reference voltage regulator
(external reference regulation possible)
• Power dissipation only 250 mW (typical)
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
APPLICATIONS
High-speed analog-to-digital conversion for:
• DBS (Digital Broadcast Satellite)
• QPSK (Quadrature Phase Shift Keying) demodulation
• Video.
GENERAL DESCRIPTION
The TDA8705A is a 6-bit high-speed dual analog-to-digital
converter (ADC) for satellite video and other applications.
It converts the two analog input signals into two 6-bit
binary-coded digital words at a maximum sampling rate of
80 MHz. All digital inputs and outputs are TTL compatible,
although a low-level sine wave clock input signal is
allowed.
QUICK REFERENCE DATA
Note
1. Full-scale sine wave (f
i
= 20 MHz; f
clk
= 80 MHz).
ORDERING INFORMATION
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
analog supply voltage 4.75 5.0 5.25 V
V
CCD
digital supply voltage 4.75 5.0 5.25 V
V
CCO
output stages supply voltage 4.75 5.0 5.25 V
I
CCA
analog supply current 20 27 32 mA
I
CCD
digital supply current 10 14 18 mA
I
CCO
output stages supply current 10 14 18 mA
ILE DC integral linear error −±0.25 ±0.5 LSB
DLE DC differential linearity error −±0.25 ±0.5 LSB
AILE AC integral linearity error note 1 −±0.5 ±1.0 LSB
f
clk(max)
maximum clock frequency 80 −−MHz
P
tot
total power dissipation − 250 − mW
TYPE
NUMBER
PACKAGE
NAME DESCRIPTION VERSION
TDA8705AT SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1
1996 Jan 12 3
Philips Semiconductors Product specification
6-bit high-speed dual Analog-to-Digital
Converter (ADC)
TDA8705A
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BLOCK DIAGRAM
handbook, full pagewidth
7
AGND
10
DEC
V
RTA
V
CCA
V
CCD
V
CCO
17
18
19
16 D1B
D2B
D3B
D4B
1520D0B
D5B
TTL OUTPUTS
LATCHES
ANALOG -TO-DIGITAL
CONVERTER
B
MLC374
TDA8705A
analog ground
data
outputs
LSB
MSB
6
25
26
27
24 D1A
D2A
D3A
D4A
2328D0A
D5A
TTL OUTPUTS
LATCHES
ANALOG -TO-DIGITAL
CONVERTER
A
data
outputs
LSB
MSB
6
9
5
12
14
REGULATOR
CLOCK DRIVER
V
RBA
V
RMA
V
RTB
V
RMB
4
V
IA
R
INTA
R
INTB
6
V
RBB
13
V
IB
11
8 2 21
3
DGND
1
CLK
digital ground
22
OGND
output ground
reference
voltage TOP
A
reference
voltage TOP
B
analog
voltage input
A
reference
voltage BOTTOM
A
analog
voltage input
B
reference
voltage BOTTOM
B
reference
voltage MIDDLE
A
reference
voltage MIDDLE
B
Fig.1 Block diagram.
1996 Jan 12 4
Philips Semiconductors Product specification
6-bit high-speed dual Analog-to-Digital
Converter (ADC)
TDA8705A
PINNING
SYMBOL PIN DESCRIPTION
CLK 1 clock input
V
CCD
2 digital supply voltage (+5 V)
DGND 3 digital ground
V
RBA
4 reference voltage BOTTOM for
ADC A (decoupling)
V
RTA
5 reference voltage TOP for ADC A
(decoupling)
V
IA
6 analog input voltage for ADC A
AGND 7 analog ground
V
CCA
8 analog supply voltage (+5 V)
V
RMA
9 reference voltage MIDDLE for ADC A
(decoupling)
DEC 10 decoupling input
V
IB
11 analog input voltage for ADC B
V
RTB
12 reference voltage TOP for ADC B
(decoupling)
V
RBB
13 reference voltage BOTTOM for
ADC B (decoupling)
V
RMB
14 reference voltage MIDDLE for ADC B
(decoupling)
D0B 15 data output; bit 0 (LSB), ADC B
D1B 16 data output; bit 1, ADC B
D2B 17 data output; bit 2, ADC B
D3B 18 data output; bit 3, ADC B
D4B 19 data output; bit 4, ADC B
D5B 20 data output; bit 5 (MSB), ADC B
V
CCO
21 supply voltage for output stages
(+5 V)
OGND 22 output ground
D0A 23 data output; bit 0 (LSB), ADC A
D1A 24 data output; bit 1, ADC A
D2A 25 data output; bit 2, ADC A
D3A 26 data output; bit 3, ADC A
D4A 27 data output; bit 4, ADC A
D5A 28 data output; bit 5 (MSB), ADC A
Fig.2 Pin configuration.
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
1514
TDA8705A
CLK
DGND
V
IA
V
CCD
V
RBA
V
RTA
V
RMA
V
IB
V
RTB
V
RBB
V
RMB
V
CCA
AGND
DEC
D5B
D4B
D3B
D2B
D1B
D0B
D3A
D2A
D1A
D0A
V
CCO
OGND
D5A
D4A
MLC375
1996 Jan 12 5
Philips Semiconductors Product specification
6-bit high-speed dual Analog-to-Digital
Converter (ADC)
TDA8705A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. The supply voltages V
CCA
, V
CCO
and V
CCD
may have any value between −0.3 V and +7 V provided the difference
between V
CCA
, V
CCO
and V
CCD
is between −1 V and +1 V.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
analog supply voltage note 1 −0.3 +7.0 V
V
CCD
digital supply voltage note 1 −0.3 +7.0 V
V
CCO
output stages supply voltage note 1 −0.3 +7.0 V
∆V
CC
supply voltage differences between V
CCA
and V
CCD
−1.0 +1.0 V
∆V
CC
supply voltage differences between V
CCO
and V
CCD
−1.0 +1.0 V
∆V
CC
supply voltage differences between V
CCA
and V
CCO
−1.0 +1.0 V
V
I
input voltage referenced to AGND −0.3 +7.0 V
V
clk(p-p)
AC input voltage for switching
(peak-to-peak value)
referenced to DGND − V
CCD
V
I
O
output current − 10 mA
T
stg
storage temperature −55 +150 °C
T
amb
operating ambient temperature 0 +70 °C
T
j
junction temperature − +150 °C
SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 70 K/W
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