Philips TDA8586 User Manual

INTEGRATED CIRCUITS

DATA SH EET

TDA8586

Power amplifier with load detection
and auto BTL/SE selection

Preliminary specification
Supersedes data of 1999 Apr 08
File under Integrated Circuits, IC01

2001 Jul 23

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

FEATURES
General

• Operating voltage from 8 to 18 V

• Low distortion

• Few external components, fixed gain

• Automatic mode selection (SE or BTL) depending on

connected rear loads

• Can be used as a stereo amplifier in Bridge-Tied Load
(BTL) or quad Single-Ended (SE) amplifiers

• Single-ended mode without loudspeaker capacitor

• Soft clipping, to guarantee good clip behaviour with

inductive loads

• Mute and standby mode with one-pin operation

• Diagnostic information for Dynamic Distortion Detector

(DDD), high temperature (140 °C) operation mode and
short-circuit

• Noswitch-on/offplopswhenswitchingbetweenstandby
and mute and from mute to on

• Load detection on rear channels when switching from
standby to mute

• Fast mute on supply voltage drops (low VP mute).

TDA8586

GENERAL DESCRIPTION

The device incorporates the following functions:

• 4 × 6 W SE amplifies without SE capacitor, because of
the availability of 2 half supply voltage power buffers

• 2 × 20 W BTL amplifiers

• Automatic switching between 2 and 4 speaker

operation. The mode of operation is determined during
start-up.

This amplifier is protected for all general short-circuit
conditions to battery or ground, overvoltage, 45 V load
dump and short-circuits on the speaker outputs.

Thedevice is contained in a 20-pin power HSOP package,
but is also available in a 17-pin SIL power package. When
packaged in the 20-pin HSOP package additional
functions are available:

• DDD level selection between 2 and 10%

• Overrule pin for changing mode of operation

(from SE to BTL or from BTL to SE).

Protection

• Short-circuit proof to ground, positive supply voltage on
all pins and across load

• ESD protected on all pins

• Thermal protection against temperatures exceeding
150 °C

• Load dump protection

• Overvoltage protection.

ORDERING INFORMATION

TYPE

NUMBER

TDA8586Q DBS17P plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1
TDA8586TH HSOP20 heatsink small outline package; 20 leads; low stand-off SOT418-2

NAME DESCRIPTION VERSION

PACKAGE

2001 Jul 23 2

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

q(tot)

I

stb

G

v

Bridge-tied load application

P

o

THD total harmonic distortion f

V

OO

V

n(o)

Single-ended application

P

o

THD total harmonic distortion f

V

OO

V

n(o)

operating supply voltage 8.0 − 18 V
total quiescent current VP= 14.4 V, SE mode − 140 170 mA
standby supply current VP= 14.4 V − 1 100 µA
voltage gain SE mode 25 26 27 dB

BTL mode 31 32 33 dB

output power VP= 14.4 V; RL=4Ω

THD = 0.5% 14 15 − W
THD = 10% 17 21 − W

= 1 kHz; Po=1W;

i

− 0.05 0.15 %

VP= 14.4 V; RL=4Ω

DC output offset voltage VP= 14.4 V; RL=4Ω;

− 10 20 mV

mute condition
V

= 14.4 V; on condition − 0 100 mV

P

noise output voltage Rs=1kΩ; VP= 14.4 V − 100 200 µV

output power VP= 14.4 V; RL=4Ω

THD = 0.5% 4 4.5 − W
THD = 10% 5 6 − W

= 1 kHz; Po=1W;

i

− 0.08 0.15 %

VP= 14.4 V; RL=4Ω

DC output offset voltage VP= 14.4 V; RL=4Ω;

− 10 20 mV

mute condition
V

= 14.4 V; on condition − 0 100 mV

P

noise output voltage Rs=1kΩ; VP= 14.4 V − 80 150 µV

2001 Jul 23 3

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

BLOCK DIAGRAM

handbook, full pagewidth

IN1

IN2

5

TDA8586Q

6

V

60
kΩ

60
kΩ

60
kΩ

P1

2

TDA8586

V

P2

16

−

V/I

+

+

V/I

−

+

V/I

−

−

OA

1

OUT1

+

−

V

Pn

OA

3

HVP1

+

+

OA

4

OUT2

−

IN3

ACREF

IN4

MSO

7

11

V

Pn

30 kΩ

BUFFER

8

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

17

OUT3

+

+

V/I

−

−

V

Pn

OA

15

HVP2

+

+

+

V/I

OA

−

14

OUT4

−

13

INTERFACE DIAGNOSTIC

10

PGND2

9

PGND1

12

MGR023

DIAG

Fig.1 Block diagram SOT243-1.

2001 Jul 23 4

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, full pagewidth

IN1

n.c.

IN2

2

TDA8586TH

1

3

V

60
kΩ

60
kΩ

60
kΩ

P1

18

TDA8586

V

P2

13

−

V/I

+

+

V/I

−

+

V/I

−

−

OA

17

OUT1

+

−

V

Pn

OA

19

HVP1

+

+

OA

20

OUT2

−

IN3

ACREF

IN4

MSO

4

6

V

Pn

30 kΩ

BUFFER

5

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

14

OUT3

+

+

V/I

−

−

V

Pn

OA

12

HVP2

+

+

+

V/I

OA

−

11

OUT4

−

8

INTERFACE DIAGNOSTIC

10

DDDSEL9OVERRULE

15

PGND2

16

PGND1

MGR024

7

DIAG

Fig.2 Block diagram SOT418-2 (HSOP20 heatsink up).

2001 Jul 23 5

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

PINNING

SYMBOL

n.c. − 1 not connected
IN1 5 2 non-inverting input 1
IN2 6 3 inverting input 2
IN3 7 4 non inverting input 3
IN4 8 5 inverting input 4
ACREF 11 6 common signal input
DIAG 12 7 diagnostic output/mode fix
MSO 13 8 mode select mute, standby or on
OVERRULE − 9 mode selection overrule
DDDSEL − 10 2 or 10% dynamic distortion detection
OUT4 14 11 SE output 4 (negative)
HVP2 15 12 buffer output/BTL output 2 (negative)
V

P2

OUT3 17 14 SE output 3/BTL output 2 (positive)
PGND2 10 15 power ground 2
PGND1 9 16 power ground 1
OUT1 1 17 SE output 1/BTL output 1 (positive)
V

P1

HVP1 3 19 buffer output/BTL output 1 (negative)
OUT2 4 20 SE output 2 (negative)

TDA8586Q TDA8586TH

16 13 supply voltage 2

2 18 supply voltage 1

PIN

DESCRIPTION

2001 Jul 23 6

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, halfpage

PGND1
PGND2
ACREF

OUT1

V

P1

HVP1
OUT2

IN1
IN2
IN3
IN4

DIAG

MSO
OUT4
HVP2

V

P2

OUT3

1
2
3
4
5
6
7
8
9

TDA8586Q

10
11
12
13
14
15
16
17

MGR025

handbook, halfpage

OUT2
HVP1

V

P1

OUT1
PGND1
PGND2

OUT3

V

P2

HVP2

OUT4

20
19
18
17
16

TDA8586TH

15
14
13
12
11

MGR026

TDA8586

1

n.c.

2

IN1

3

IN2

4

IN3

5

IN4

6

ACREF

7

DIAG

8

MSO

9

OVERRULE

10

DDDSEL

Fig.3 Pin configuration (SOT243-1).

2001 Jul 23 7

Fig.4 Pin configuration (SOT418-2).

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

FUNCTIONAL DESCRIPTION

The TDA8586 is a multi-purpose power amplifier with four
amplifiers and 2 buffer stages, which can be connected in
the following configurations with high output power and
low distortion:

• Dual Bridge-Tied Load (BTL) amplifiers

• Quad Single-Ended (SE) amplifiers.

IntheBTLmodeofoperation,the2 bufferamplifiersactas
inverting amplifiers to complete the bridge across the front
amplifiers (OUT1 and OUT3) and the rear outputs (OUT2
and OUT4) enter a high-impedance state.

In the SE mode of operation, the buffers act as an AC
ground path thereby eliminating the need for series
capacitors on the speaker outputs.

Diagnostics:

• While the IC is in the mute mode, the diagnostic output
will signal the mode of operation when the IC is not
overruled

• In the on mode the diagnostic output will signal any fault
in the IC or if the output of any amplifier is clipping with
a distortion of 10% (or 2% depending on selected
clip-mode).

Special attention is given to the dynamic behaviour as
follows:

• Noise suppression during engine start

• No plops when switching from standby to on

• Slow offset change between mute and on (controlled by

MSO pin)

• Low noise levels, which are independent of the supply
voltage.

TDA8586

The presence of the load is measured after the transition
between standby and mute. The IC will determine if there
is an acceptable load on both outputs (OUT2 and OUT4).
If both outputs are unloaded, the IC will switch to a
2 speaker mode of operation (BTL mode), unless it is
overruled.

There are two options to overrule:

1. Before transition from mute to on, after a load
detection, pulling the diagnostic output above 9.5 V
will force the IC into 4 speaker mode

2. TDA8586TH: pulling the OVERRULE pin according
pinning table.

Care should be taken with the OVERRULE function as it
works during the on mode. If there is a 2 or 4 speaker
mode change during the on mode a large plop can be
heard on the speakers.

The ACREF input (common signal input) acts with the four
signal inputs (IN1 to IN4) to provide quasi differential
inputs. A capacitor must be connected to this pin of which
the ground pin should be connected to the ground at the
signal source (usually the ground at the audio signal
processor). This capacitor has a dual function. During the
speaker detection, the signal ground capacitor is used to
set the time constant of the measurement (and thus
determines the minimum required switch-on time).
The capacitorontheMSOpin allows the integrate function
to provide immunity to outside noises during load
detection.

Protections are included to avoid the IC being damaged at:

• Over temperature: Tj> 150 °C

• Short-circuit of the output pin(s) to ground or supply rail.

When short-circuited, the power dissipation is limited

• ESD protection (Human Body Model 3000 V and
Machine Model 300 V).

2001 Jul 23 8

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, full pagewidth

state

condition

V

P

MSO

diagnostic

information

V

9 V

3 V

5 V

standby

P

0

0

0

mute

load detect

minimum 1 s

SE detection

BTL detection

mute

no load detect

BTL detected

SE detected

on

no clipping/shorts

on

clipping

TDA8586

on

short-circuit

diagnostic

overrule

mode select

amplifier

output

buffer/amplifier

output

10 V

0.5V

0.5V

5 V

The mode is overruled only from
BTL to SE when the diagnostic pin
is excited with a pulse of 10 V.

0

This voltage must remain present.
Whatever the load detection has found the mode of operation will be inverted.

0

P

0

P

0

Toggling between the 2 modes is possible.

short-circuit to supply

short-circuit over load

short-circuit to ground

short-circuit to supply

short-circuit over load

short-circuit to ground

MGR027

Fig.5 Timing diagram including diagnostics.

2001 Jul 23 9

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

V

DIAG

I

OSM

I

ORM

V

rp

V

sc

P

tot

T

j

T

stg

T

amb

Note

1. A large reverse current will flow, therefore external protection is needed (fuse and reverse diode).

supply voltage operating 8 18 V

load dump protected;

− 45 V

see Fig.6
voltage on diagnostic pin − 18 V
non-repetitive peak output current − 6A
repetitive peak output current − 4A
reverse polarity voltage note 1 − 6V
ACand DC short-circuit voltage of output pins

− 18 V

across loads and to ground or supply pins
total power dissipation − 75 W
junction temperature − 150 °C
storage temperature −55 +150 °C
operating ambient temperature −40 +150 °C

handbook, halfpage

45 V

V

P

14.4 V

t

r

t

f

MGL404

t (ms)

Fig.6 Load dump voltage waveform.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R
R

th(j-a)
th(j-c)

thermal resistance from junction to ambient in free air 40 K/W
thermal resistance from junction to case 2 K/W

2001 Jul 23 10

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

CHARACTERISTICS

VP= 14.4 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

P

I

q(tot)

I

stb

V

O

V

P(mute)

V

o

V

I

PIN MSO
V

MSO

I

MSO

Diagnostic; output buffer (open-collector); see Figs 7 to 8
V

DIAG(L)

I

LI

V

DIAG(or)

V

DIAG(4ch)

CD2 clip detector LOW THD mode; V

CD10 clip detector HIGH THD mode (default);

CLIP DETECT CONTROL PIN
V

DDDSEL

I

DDDSEL

Stereo BTL application (see Fig.7)
THD total harmonic distortion f

P

o

=25°C; fi= 1 kHz; RL= ∞; measured in test circuit of Fig.8; unless otherwise specified.

amb

operating supply voltage 8.0 14.4 18 V
total quiescent current SE mode − 140 170 mA
standby current − 1 100 µA
DC output voltage VP= 14.4 V − 7.0 − V
low supply voltage mute 6.0 7.0 8.0 V
single-ended and bridge-tied

load output voltage

VP= 14.4 V; RL=4Ω

mute condition −−20 mV
on condition −−100 mV

DC input voltage VP= 14.4 V − 4.0 − V

voltage at pin MSO standby condition 0 − 0.8 V

mute condition; note 1 2.0 3.0 4 V
on condition 8.0 − 10.5 V

input current mute pin at standby condition;

V

< 0.8 V

MSO

diagnostic output voltage LOW I
leakage current V

=1mA − 0.3 0.8 V

sink

= 14.4 V −−1µA

DIAG

diagnostic override voltage in mute mode after load

− 540µA

10.5 − 18 V

detection

diagnostic4 channel indication
voltage

mute, after load detection with
4 speakers connected

>3V;

DIAG

− 0.3 0.8 V

0.5 2 3.5 %

R=10kΩ

71013%

V

>3V; R=10kΩ

DIAG

voltage at DDD select pin to
obtain:

Input current DDD select pin V

10% DDD 0 − 1V
2% DDD 3 − 6V

DDDSEL

= 1 kHz; Po= 1 W; RL=4Ω− 0.05 0.15 %

i

45 Hz < f

=5V 15 − 140 µA

< 10 kHz; Po=1W;

i

− 0.3 − %

RL=4Ω; filter: f < 30 kHz

output power VP= 14.4 V; RL=4Ω; note 2

THD = 0.5% 14 15 − W
THD = 10% 17 21 − W

2001 Jul 23 11

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

G

v

∆G

v

α

cs

V

OO

V

n(o)

V

n(o)(mute)

V

o(mute)

SVRR supply voltage ripple rejection: R

Z

i

Quad SE application (see Fig.8)
THD total harmonic distortion f

P

o

G

v

∆G

v

α

cs

V

OO

V

n(o)

V

n(o)(mute)

V

o(mute)

SVRR supply voltage ripple rejection R

voltage gain V
channel unbalance V

=15mV 313233dB

i(rms)

=15mV −0.7 0 +0.7 dB

i(rms)

channel separation Po= 2 W; fi= 1 kHz; RL=4Ω 45 55 − dB
DC output offset voltage VP= 14.4 V; on condition − 0 100 mV

V

= 14.4 V; RL=4Ω;

P

− 10 20 mV

mute condition
noise output voltage on Rs=1kΩ; VP= 14.4 V; note 3 − 100 150 µV
noise output voltage mute note 3 − 020µV
output voltage mute V

=1V − 3 500 µV

i(rms)

=0Ω; fi= 1 kHz;

s

V

= 2 V (p-p)

ripple

on condition 45 55 − dB
mute condition 55 70 − dB

input impedance input referenced to ground 40 60 90 kΩ

= 1 kHz; Po= 1 W; RL=4Ω− 0.05 0.15 %

i

45 Hz < f

< 10 kHz; Po=1W;

i

− 0.5 − %

RL=4Ω; filter: f < 30 kHz
output power VP= 14.4 V; RL=4Ω; note 2

THD = 0.5% 4 4.5 − W

THD = 10% 5 6 − W
voltage gain V
channel unbalance V

=15mV 252627dB

i(rms)

=15mV −0.7 0 +0.7 dB

i(rms)

channel separation Po= 2 W; fi= 1 kHz; RL=4Ω 40 50 − dB
DC output offset voltage VP= 14.4 V; on condition − 0 100 mV

V

= 14.4 V; RL=4Ω;

P

− 10 20 mV

mute condition
noise output voltage on Rs=1kΩ; VP= 14.4 V; note 3 − 80 150 µV
noise output voltage mute note 3 − 020µV
output voltage mute V

=1V − 3 500 µV

i(rms)

=0Ω; fi= 1 kHz;

s

V

= 2 V (p-p)

ripple

on condition 43 47 − dB
mute condition 55 70 − dB

Notes

1. Tolerances on the mute level is tight because of the usage of this pin for integration during load detection.

2. The output power is measured directly on the pins of the IC.

3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz.

2001 Jul 23 12

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

APPLICATION INFORMATION

handbook, full pagewidth

220 nF

V

front

INL

220 nF

IN1

IN2

5

TDA8586Q

6

60
kΩ

60
kΩ

60
kΩ

TDA8586

V

P

1

3

4

OUT1

HVP1

OUT2

100
nF

+

4 or 8 Ω

−

1000 µF

(16/40 V)

V

P1

2

V

P2

16

−

V/I

+

−

OA

+

+

V/I

−

−

V

Pn

OA

+

+

+

V/I

OA

−

−

220 nF

V

front

INR

220 nF

switched

+9 V

30 kΩ

15 kΩ

switch

ACREF

47 µF

(10 V)

4.7 µF
(10 V)

IN3

IN4

MSO

7

11

V

Pn

30 kΩ

BUFFER

8

13

INTERFACE DIAGNOSTIC

10
PGND2

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

OUT3

17

+

+

4 or 8 Ω

+

V/I

−

−

V

Pn

OA

15

−

HVP2

+

+

+

V/I

OA

−

−

9
PGND1

14

12

MGR028

OUT4

+5 V

10 kΩ

DIAG

Fig.7 Stereo bridge-tied load application (SOT243-1).

2001 Jul 23 13

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, full pagewidth

220 nF

V

front

INL

220 nF

V

rear

INL

IN1

IN2

5

TDA8586Q

6

60
kΩ

60
kΩ

60
kΩ

TDA8586

V

P

1

3

4

OUT1

HVP1

OUT2

100
nF

+

4 or 8 Ω

−

+

4 or 8 Ω

−

1000 µF

(16/40 V)

V

P1

2

V

P2

16

−

V/I

+

−

OA

+

+

V/I

−

−

V

Pn

OA

+

+

+

V/I

OA

−

−

V

V

INR

INR

front

rear

220 nF

220 nF

30 kΩ

15 kΩ

switch

47 µF
(10 V)

switched

+9 V

IN3

ACREF

IN4

MSO

8

13

4.7 µF
(10 V)

7

11

V

Pn

30 kΩ

BUFFER

INTERFACE DIAGNOSTIC

10
PGND2

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

OUT3

17

+

+

4 or 8 Ω

+

V/I

−

−

V

Pn

OA

15

+

−

HVP2

+

4 or 8 Ω

−

+

+

V/I

OA

−

−

9
PGND1

14

12

MGR029

OUT4

+5 V

10 kΩ

DIAG

Fig.8 Quad single-ended application (SOT243-1).

2001 Jul 23 14

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, full pagewidth

220 nF

V

front

INL

220 nF

IN1

n.c.

IN2

2

TDA8586TH

1

3

60
kΩ

60
kΩ

60
kΩ

TDA8586

V

P

1000 µF

(16/40 V)

V

P1

18

V

P2

13

−

V/I

+

−

OA

+

+

V/I

−

−

V

Pn

OA

+

+

+

V/I

OA

−

−

100
nF

OUT1

17

+

4 or 8 Ω

−

HVP1

19

OUT2

20

220 nF

V

front

INR

220 nF

switched

+9 V

30 kΩ

15 kΩ

switch

ACREF

47 µF

(10 V)

4.7 µF
(10 V)

IN3

IN4

MSO

4

6

V

Pn

30 kΩ

BUFFER

5

8

INTERFACE DIAGNOSTIC

10
DDDSEL9OVERRULE

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

OUT3

14

+

+

4 or 8 Ω

+

V/I

−

−

V

Pn

OA

12

−

HVP2

+

+

+

V/I

OA

−

−

15
PGND2

16
PGND1

OUT4

11

+5 V

10 kΩ

DIAG

7

MGR030

Fig.9 Stereo bridge-tied load application (SOT418-2).

2001 Jul 23 15

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

handbook, full pagewidth

220 nF

V

front

INL

220 nF

V

rear

INL

IN1

n.c.

IN2

2

TDA8586TH

1

3

60
kΩ

60
kΩ

60
kΩ

TDA8586

V

P

1000 µF

(16/40 V)

V

P1

18

V

P2

13

−

V/I

+

−

OA

+

+

V/I

−

−

V

Pn

OA

+

+

+

V/I

OA

−

−

100
nF

OUT1

17

+

4 or 8 Ω

−

HVP1

19

+

4 or 8 Ω

−

OUT2

20

220 nF

V

front

INR

220 nF

V

rear

INR

switched

+9 V

30 kΩ

15 kΩ

switch

ACREF

47 µF
(10 V)

IN3

IN4

MSO

4.7 µF
(10 V)

4

6

V

Pn

30 kΩ

BUFFER

5

8

INTERFACE DIAGNOSTIC

10

DDDSEL9OVERRULE

60
kΩ

60
kΩ

60
kΩ

−

V/I

+

−

OA

OUT3

14

+

+

4 or 8 Ω

+

V/I

−

−

V

Pn

OA

12

+

−

HVP2

+

4 or 8 Ω

−

+

+

V/I

OA

−

−

15
PGND2

16
PGND1

OUT4

11

+5 V

10 kΩ

DIAG

7

MGR031

Fig.10 Quad single-ended application (SOT418-2).

2001 Jul 23 16

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

INTERNAL PIN CONFIGURATION

PIN

TDA8586TH

2, 3, 4, 5 and 6 inputs

11, 12, 14, 17,

19 and 20

NAME EQUIVALENT CIRCUIT

handbook, halfpage

outputs

handbook, halfpage

TDA8586

V

P

IN

MGE014

V

P

OUT

8 mode select

handbook, halfpage

0.5 V

P

MGE015

V

P

MGE016

2001 Jul 23 17

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

PACKAGE OUTLINES

DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)

non-concave

D

d

x

E

h

view B: mounting base side

TDA8586

SOT243-1

D

h

A

2

117

e

Z

DIMENSIONS (mm are the original dimensions)

UNIT A e

mm

A2bpcD

17.0

4.6

4.4

0.75

0.60

15.5

0.48

0.38

1

e

(1)

deD

24.0

20.0

23.6

19.6

w M

b

p

(1)

E

h

12.2

10 2.54

11.8

0 5 10 mm

B

j

L

3

scale

1.27

L

E

e

1

2

h

6

5.08

Q

LL3m

3.4

12.4

3.1

11.0

2.4

1.6

e

4.3

m

E

A

c

2

2.1

1.8

v M

(1)

v

Qj

0.8

0.4w0.03

Z

x

2.00

1.45

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE
VERSION

SOT243-1

IEC JEDEC EIAJ

REFERENCES

2001 Jul 23 18

EUROPEAN

PROJECTION

ISSUE DATE

97-12-16
99-12-17

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

HSOP20: plastic, heatsink small outline package; 20 leads; low stand-off height

D

c

y

D

1

1

pin 1 index

10

D

2

x

E

E

2

H

E

TDA8586

SOT418-2

A

X

v M

A

E

1

20

Z

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

Notes

1. Limits per individual lead.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

A

2

max.

3.5

3.5 0.35

3.2

e

(1)

bpc

A

A

4

3

+0.12

0.53

−0.02

0.40

0.32

0.23

D

16.0

15.8

11

w M

b

p

0 5 10 mm

scale

(2)

D

1

13.0

12.6

D

1.1

0.9

(2)

E

E

2

11.1

10.9

1

6.2

5.8

E

2.9

2.5

Q

A

2

A

4

detail X

H

L

Q

1.7

1.5

v

0.25w0.25

e

E

14.5

13.9

p

1.1

0.8

2

1.27

L

x

0.03

(A3)

p

0.07

A

θ

yZ

2.5

2.0

θ

8°
0°

OUTLINE
VERSION

SOT418-2

IEC JEDEC EIAJ

REFERENCES

2001 Jul 23 19

EUROPEAN

PROJECTION

ISSUE DATE

98-02-25
99-11-12

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

SOLDERING
Introduction

Thistextgivesavery brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC

packages. Wave soldering is often preferred when
through-holeandsurface mount componentsaremixedon
one printed-circuit board. Wave soldering can still be used
for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is
recommended.

Through-hole mount packages

SOLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the

package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.

Surface mount packages

REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreenprinting,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

stg(max)

). If the

TDA8586

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.

WAVE SOLDERING
Conventional single wave soldering is not recommended

forsurfacemountdevices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleads on four sides, the footprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

MANUAL SOLDERING
Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C. When using a dedicated tool, all other leads can
be soldered in one operation within 2 to 5 seconds
between 270 and 320 °C.

2001 Jul 23 20

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

Suitability of IC packages for wave, reflow and dipping soldering methods

MOUNTING PACKAGE

Through-hole mount DBS, DIP, HDIP, SDIP, SIL suitable
Surface mount BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable −

HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, SMS

(4)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.

3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

, SO, SOJ suitable suitable −

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

not suitable

SOLDERING METHOD

WAVE REFLOW

(2)

(3)

− suitable

suitable −

(4)(5)

suitable −

(6)

suitable −

(1)

DIPPING

.

2001 Jul 23 21

Philips Semiconductors Preliminary specification

Power amplifier with load detection and

TDA8586

auto BTL/SE selection

DATA SHEET STATUS

PRODUCT

DATA SHEET STATUS

Objective data Development This data sheet contains data from the objective specification for product

Preliminary data Qualification This data sheet contains data from the preliminary specification.

Product data Production This data sheet contains data from the product specification. Philips

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

(1)

STATUS

(2)

development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.

DEFINITIONS

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyother conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationor warranty that such applicationswillbe
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusing or selling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofany of these products, conveys nolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakesnorepresentationsorwarrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

2001 Jul 23 22

Philips Semiconductors Preliminary specification

Power amplifier with load detection and
auto BTL/SE selection

NOTES

TDA8586

2001 Jul 23 23

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© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.

2001

Internet: http://www.semiconductors.philips.com

72

Printed in The Netherlands 753503/03/pp24 Date of release: 2001 Jul 23 Document order number: 9397750 08407