Philips TDA5345HT Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TDA5345HT

5V spindle & VCM driver combo

Preliminary specification

1999June10

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

FEATURES

•Single chip voice coil and spindle motor drivers:

•Complementary outputs (Nmos & Pmos): No step-up converter needed

•On-chip isolation switch to allow synchronous rectification at power-down

•Suited for ramp load operation

•Register based architecture: on-chip serial interface

•Temperature shut down protection

•Linear 3.3V regulator using one external NPN transistor

•Power monitor circuitrymonitoring the 5V supply

•1 axis shock sensor amplifier

•Switched capacitor regulator (-3V) using 2 external capacitors and 2 external shottky diodes

•All main internal functions can be independently put in Sleep mode

•Small low profile package: TQFP64 (1.2mm high).

Spindle motor driver:

•High efficiency drivers: 1.5Ω Max

•0.62 Amp capability, full wave (bipolar) drive

•Internal current mirrors to measure the motor curren

•Controlled fly-back pulse slopes, programmable through the serial interface

•Active fly-back pulse limitation, using the Power MOS instead of diodes

•Internal digital timing to control the commutations by back-EMF sensing (Start-up & running)

•Internal speed loop combining FLL and PLL

•Start-up current control by an internal 6-bit DAC (shared with the VCM loop).

Voice coil motor (VCM) driver:

•High efficiency drivers: 1.5Ω Max (without the external sense resistor); 0.4 Amp capability

•External sense resistor to accurately control the VCM current

•True AB Class linear amplifier with no crossover distortion

•Internal 12-bit DAC to control the VCM transconductance input voltage

•Internal 6-bit DAC to cancel the VCM loop offsets

•Active fly-back pulse limitation, using the Power transistors instead of diodes

•3-step programmable retract function activated by either the serial port or the power monitor circuitry

•Back-EMF amplifier to monitor the actuator speed when ramp loading.

Power Monitor:

•Monitors the 5V power supply

•Power fault output (battery too low); threshold=4.2V

•Power on Reset output; threshold=4.1V (Vdd5)

•Threshold accuracy:+/-3%.

1999June10 2

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

GENERAL DESCRIPTION

The TDA5345HT is a combination of a voice coil motor and a spindle motor driver, designed for 5V high performance
portable small form factor hard disk drives. Communications with the micro-controller take place through a 16-bit 3-wire
uni-directional serial port. Power dissipation is a major concern in portable drives, therefore each main function can be
individually put in sleep mode when it is not used, to save as much power as possible. The serial port and the power
monitor are the only functions which remain always active.

The TDA5345HT integrates a spindle driver and the commutation logic that drives a three-phase brushless, sensorless
DC motor in full wave mode. Commutations are generated from the internal back-EMF sensing circuitry from start-up to
the running mode. An internal speed loop combining FLL and PLL technics makes sure that the spindle reaches the right
speed, programmed through the serial port. The 6-bit DAC is used to limit the Start-up current by limiting the voltage on
the speed loop filter. To reduce acoustical noise and current noise on both power supply and ground, the fly-back pulse
leading edge slew-rate is controlled. 4 different slope values are programmable.
To prevent internal parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors
themselves: lower NMOS transistors are turned ON to limit the negative fly-back pulses just below ground while upper
PMOS limit the positive fly-backs just above the power supply. This active limitation is still active at power down during
the VCM retract. In this way, an efficient back-EMF rectification is obtained (no diodes losses).

The VCM driver is a linear transconductance amplifier; it is a true AB class with a 8mA quiescent current. It means that
there is absolutely no crossover distortion. An external compensation network is used to set the loop bandwidth and
ensure the loop stability. With common VCM characteristics, the bandwidth can go up to 40kHz. To prevent internal
parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors themselves.
An on-chip 12-bit DAC is used to generate the VCM amplifier input voltage. This a signed converter, with an output range
of [1.25V;1.75V] when the low gain is selected and an output range of [0.5V;2.5V] when the high gain is selected.
The all VCM transconductance works then around a 1.5V reference (available on one pin). It is possible to add an
external notch filter between the 12-bit DAC output and the VCM loop intput. An other 6-bit DAC is used to cancel the
Vcm loop offsets. An additional Vcm back-EMF amplifier is provided to monitor the actuator speed when ramp loading.
A ramp unload circuitry is included as well. It can be activated through the serial bus (SoftRetract) or automatically
initiated in case of temperature shut down or at power-down. The ramp unload sequence is made of 3 steps : brake, slow
retract and then full power. The retract steps duration is set by means of internal programmable counters, clocked by the
spindle back-EMF. In case of power down, this sequence is followed by a spindle brake. The three spindle lower power
NMOS are switched fully ON together.

The linear 3.3V DC-DC converter is designed to drive an external power NPN that will supply the 3.3V chips. It can be
enabled or disabled by hardware, using the external Reg3v3On pin.

The switched capacitor -3V regulator is designed to supply a very clean negative voltage to the PreAmp IC in the drive.

The shock sensor amplifier is intended to be connected to an external 1 axis shock sensor. The window comparator
threshold is programmable through the serial bus.

An internal circuitry provides either an analog or a digital information about the junction temperature. These two
informations can be selected through the serial bus. When the analog output is selected, the voltage is proportional to
the internal chip temperature. When the digital output is selected, it indicates that the temperature exceeds 145°C. An
internal thermal shut down mode is initiated when the temperature is higher than 160°C: the 3 spindle outputs are
disabled while the vcm is immediately retracted.

The power monitor circuitry monitors the 5V power supply. The Power On Reset PORN output is driven low when the
5V supply is below 4.1V. This threshold can be changed by an external resistor divider. Once the power supplies is
above its threshold, the Power On Reset output goes high after a delay that is set by an external capacitor. A second
output, called Power Fault (active HIGH), indicates that the 5V power supply is below 4.2V when high. There is no delay
between the supply crossing the threshold and the PowerFault output change.

1999June10 3

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

SpinCompens

SpinSpeedFilter

MechClock

CLOCK

SpinDigOut

SEN_N

SDATA
SCLK

BrakePower
RetReset

RegSense

RegNPNBase

Reg3v3PwrUp

PowerFault

PorN
PorCap

Por5Adj

Fig.1

Speed Loop

(FLL/PLL)

(digital)

commutation

manager

(digital)

Serial

interface

(digital)

3.3V

Regulator

reference
generator

Power On Reset

Thermal

monitor

TempMux

Charge
Pumps

Start-Up

current

limiter

6-bit

DAC

12-bit

DAC

3-step

Retract

& spindle

brake

Shock
sensor

amplifier

Bemf
Comp

SpinCenterTap

SpinMotA

Spindle
drivers

SpinMotB

SpinMotC

Power stage

VcmCompensIn

+

+

VcmDacOut

VcmInput

VcmCompensOut

Vcm

VcmMinus
AB class
drivers

VcmPlus

Power stage

VcmBemf

Vcm
back-EMF
Amplifier

OpAmpInM
OpAmpOut

Vcm

Current sense

Amplifier

Negative

supply

VcmSenseInM

VcmSenseInP

Neg3V
PumpNeg3V

regulator

ShockInput

ShockFiltOut

ShockCompOutShockFiltOut

GENERAL BLOCK DIAGRAM

1999June10 4

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

PINNING (GREY ROWS MEANS NEW PINS))

SYMBOL PIN # DESCRIPTION I/O

SpinVddA 1 spindle MotA half bridge power supply I
SpinRectBemf 2 spindle “Clamp”: rectified Bemf O
SpinMotA 3 spindle power output: A O
VcmVddM 4 VCM- half bridge power supply SUPPLY
SpinGndAB 5 spindle MotA & MotB half bridges ground GROUND
VcmMinus 6 VCM inverted power output (VCM-) O
n.c.1 7 not connected ; connect it to ground GROUND
SpinMotB 8 spindle power output: B O
VcmGndPow 9 VCM H-bridge ground GROUND
SpinVddBC 10 spindle MotC & MotB half bridges power supply I
VcmPlus 11 VCM non-inverted power output O
n.c.2 12 not connected; connect it to ground GROUND
SpinMotC 13 spindle power output: C O
VcmVddP 14 VCM+ half bridge power supply SUPPLY
SpinGndC 15 spindle MotC half bridge ground GROUND
GNDAna1 16 analog ground GROUND

VcmCompensOut 17 VCM error amplifier output O

VcmRef 18 VCM loop reference voltage (1.5V) O
VcmCompensIn 19 VCM error amplifier inverted input I
VcmInput 20 VCM loop input I
VcmVdd5Div2 21 internal Vdd5/2 reference voltage for the VCM I/O
VcmSenseInM 22 VCM sense amplifier inverted input I
VcmSenseInP 23 VCM sense amplifier non-inverted input I
Vdd5Ana1 24 analog power supply SUPPLY
PorN 25 power On Reset output O
PorCap 26 external capacitor used to set the Power On Reset delay O
BdGap 27 internal band-gap reference voltage (for production trimming) I
Por5Adj 28 5V power on reset threshold adjustment I
VcmBemf 29 VCM Back-Emf amplifier output O
OpAmpInM 30 VCM Back Emf Operational Amplifier inverted input I
OpAmpOut 31 VCM Back Emf Operational Amplifier output O
GNDAna2 32 analog ground GROUND
RefCurRes 33 external 33kΩ resistor O
Reg3v3PwrUp 34 hardware enable / disable for the 3.3V regulator (at Power Up) I
PumpNeg3V 35 -3V regulator pump capacitor O
Neg3V 36 -3V regulator output sense pin I
PowerFault 37 battery low warning O
CLOCK 38 digital timing clock I
SDATA 39 serial port Data line I
Vdd5Dig 40 digital power supply SUPPLY

1999June10 5

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

SYMBOL PIN # DESCRIPTION I/O

SCLK 41 serial port Clock I
SEN_N 42 serial port ENABLE line: active low I
SpinMechClock 43 spindle rotation speed (1 pulse / revolution) O
SpinDigOut 44 spindle back-EMF comparator output or commutation clock O
RetReset 45 external capacitor used to reset the retract sequence state machine I
RegNPNBase 46 3v3 DC-DC converter output (drives an external NPN) O
RegSense 47 3v3 DC-DC converter input I
GndDig 48 digital ground GROUND
VcmDacOut 49 12-bit VCM DAC output O
ShockRef 50 shock sensor reference voltage O
ShockFiltOut 51 shock sensor RC low pass filter output O
ShockCompOut 52 shock sensor comparator output O
ShockCom 53 shock sensor input common mode I
ShockAmpOut 54 shock sensor amplifier output O
ShockInput 55 shock sensor input I
Vdd5Ana2 56 analog power supply SUPPLY
TempMux 57 internal thermal monitor circuitry voltage output O
SpinSpeedFilter 58 external FLL/PLL speed loop filter O
SpinCompens 59 spindle current loop compensation capacitor O
BrakePower 60 external capacitor to supply the spindle brake at power down I
SpinCenterTap 61 spindle centre tap connection I
RetPmosDrain 62 retract Pmos transistor drain connection O
IsoSwSo 63 spindle power outputs supply SUPPLY
GNDAna3 64 analog ground GROUND

1999June10 6

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

GNDANA3

ISOSWSO

PMRETDRAIN

SPINCENTERTAP

BRAKEPOWER

SPINCOMPENS

SPINSPEEDFILTER

TEMPMUX

VDD5ANA2

SHOCKINPUT

SHOCKAMPOUT

SHOCKCOM

SHOCKCOMPOUT

SHOCKFILTOUT

SHOCKREF

VCMDACOUT

646362616059585756555453525150

49

SPINVDDA

SPINRECTBEMF

SPINMOTA
VCMVDDM

SPINGNDAB

VCMMINUS

n.c.1

SPINMOTB

VCMGNDPOW

SPINVDDBC

VCMPLUS

n.c.2

SPINMOTC

VCMVDDP

SPINGNDC

GNDANA1

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

171819202122232425262728293031

VCMREF

VCMINPUT

VCMCOMPENSIN

VCMCOMPENSOUT

TDA5345HT

VCMVDD5DIV2

VCMSENSELNP

VCMSENSELNM

PORN

VDD5ANA1

PORCAP

BDCAP

POR5ADJ

VCMBEMF

OPAMPLNM

OPAMPOUT

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

32

FCK121

GNDANA2

GNDDIG
REGSENSE
REGNPNBASE
RETRESET
SPINDIGOUT
SPINMECHCLOCK
SEN_N
SCLK
VDD5DIG
SDATA
CLOCK
POWERFAULT
NEG3V
PUMPNEG3V
REG3v3PWRUP
REFCURRES

Fig.3 Pin configuration

1999June10 7

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

Vdd5

Current
mirror

I

spindle

530

R

SpinLoopGain

I

spindle

530

PorN

25

OTA

+

On/Off

On/Off

1

On/Off

1

530

530

63

IsoSwSo

SpinRectBemf

2

1

SpinVddA

3

SpinGndAB

5

10

SpinVddBC

8

VDD

SpinMotA

SpinMotB

58

SpinSpeedFilter

voltage
limiter

(ext.)

(ext.)

SpinDigOut

FLL/PLL
CHARGE
PUMPS

6-bit DAC

33

RefCurRes

59

SpinCompens

44

On/Off

On/Off

1

On/Off

+

Fig.4 Spindle section diagram.

530

(ext.)

SpinMotC

13

SpinGndC

15

61

SpinCenterTap

1999June10 8

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

(ext.)

1719

SpinRectBemf

VcmCompenIn

20

VcmInput

49

6-bit
DAC

(current)

12-bit

VcmCompensOut

+ 2.5

-2.5

2

VcmVddP

4

6

9

VcmGnd

11

VcmVddM

VcmMinus

(ext.)

14

VCM

VcmPlus

R

sense

VcmDacOut

DAC

(voltage)

VcmRef

18

Fig.5 VCM section diagram.

1999June10 9

1

1.5V

1

26KΩ

VcmVdd5Div2

(ext.)

VDD

26KΩ

21

22

VcmSenseInM

3

23

VcmSenseInP

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

FUNCTIONAL DESCRIPTION
Serial interface

The serial interface is a uni-directional port for writing data to the internal registers of TDA5345HT. Each write is
composed of 16 bits. For data transfer SEN_N is brought low, serial data is presented at SDATA pin, and a serial clock
is applied to the SCLK pin. After the SEN_N pin goes low, the first 16 pulses applied to the SCLK pin shifts the data
presented at the SDATA pin into an internal shift register on the rising edge of each clock. An internal counter prevents
more than 16 bits from being shifted into the register. The data in the shift register is latched when SEN_N goes high. If
less than 16 clock pulses are provided before SEN_N goes high, the data transfer is aborted.

All transfers are shifted into the serial port MSB first. The first 4 bits of the transfer determine the internal register to be
accessed. The other 12 bits contain the programming data. During sleep modes, the serial port remains active and
register programming data is retained.

SEN_N

Address

Receive data

T

st

T

su

T

hd

SCLK

12

456789

3

10

11

12

13 14 15 16

SDATA A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Write to TDA5345HT

Fig.6 Serial port timing information.

Table 1 Address of registers

A3 A2 A1 A0 REG. DESCRIPTION

00000clock dividers programmation, spindle mode control
00011start-up,comdelim & watch-dog delays
00102blank delay, bandgap adjust, 3-step retract param (begin)
001133-step retract parameters (end)
01004fly-back slope, shock sensor threshold & sleep control bits
01015speed factor (MSBs), PLL control and 6-bit DAC
01106speed factor(LSBs)
01117Vcm 12-bit DAC (low gain)
10008Vcm 12-bit DAC (high gain)
1 0 0 1 9 shock sensor threshold

T

ex

1999June10 10

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

Table 2 Serial Interface REGISTERS floorplan

BIT\

REG

0 RegNeg

1 StartUp

2 Blank

3 T_Full

4 FlyBack

5 Speed

6 Speed

7 Dac12a

8 Dac12b

9 Shock

11109876543210

Clk2

Delay3

Delay3

Power2

Slope1

bit14

bit11

bit11

bit11

RegNeg

[0]

StartUp

Delay2

Delay2

Power1

FlyBack

Slope0

Dac12a

Dac12b

Thresh2

Clk1

[1]

Blank

T_Full

Speed

bit13

Speed

bit10

bit10

bit10

[0]

RegNeg

Clk0

[0]

StartUp

Delay1

Blank

Delay1

T_Full

Power0

Shock

Thresh1

Speed

bit12

Speed

bit9

Dac12a

bit9

Dac12b

bit9

Presc

Factor1

[0]

StartUp

Delay0

Blank

Delay0

T_Slow

Ret5

Shock

Thresh0

PllCur1PllCur0Dac6

Speed

bit8

Dac12a

bit8

Dac12b

bit8

Presc

Factor0

[0]

ComDe

Lim3

DigOut

Mux

[1]

T_Slow

Ret4

Vcm

Retract

[0]

Speed

bit7

Dac12a

bit7

Dac12b

bit7

BiasCT

ComDe

Lim2

BdGap

Adj2

T_Slow

Ret3
Vcm

Sleep

ToVCM

Speed

bit6

Dac12a

bit6

Dac12b

bit6

[0]

[0]

[1]

[0]

Run/
Stop

[0]

ComDe

Lim1

BdGap

Adj1

[0]

T_Slow

Ret2

Dac12

Sleep

[1]

Dac6

bit5

Speed

bit5

Dac12a

bit5

Dac12b

bit5

Pll

Enable

[0]

ComDe

Lim0

BdGAp

Adj0

[0]

T_Slow

Ret1

RegNeg

Sleep

[1]

Dac6

bit4

Speed

bit4

Dac12a

bit4

Dac12b

bit4

Manual

[0]

Watch

Dog3

VcmRet

SoftRis

T_Slow

Ret0

Shock

Sleep

[1]

Dac6

bit3

Speed

bit3

Dac12a

bit3

Dac12b

bit3

Man

Com2

Watch

Dog2

Vretract2Vretract1Vretract

T_Vcm
Brake2

Spin

Sleep

[1]

Dac6

bit2

Speed

bit2

Dac12a

bit

Dac12b

bit2

Man

Com1

Watch

Dog1

T_Vcm
Brake1

Reg3v3

Enable

[0]

Dac6

bit1

Speed

bit1

Dac12a

bit1

Dac12b

bit1

Man

Com0

Watch

Dog0

0

T_Vcm
Brake0

Temp

Select

[0]

Dac6

bit0

Speed

bit0

Dac12a

bit0

Dac12b

bit0

Note:

1.[1] (or [0]) means that the bit is set to 1 (or 0) when PorN is low => default value at power up.

2.Use register 7 (Dac12a) for low VCM loop gain and register 8 (Dac12b) for high gain.

Control bits:

REGISTER#0:
Bits [11,9] (RegNegClk[2,0]):The Negative supply (-3V) regulator needs a 500kHz clock. A programmable divider

genreates this frequency from the external clock ([15-33] Mhz). Programmation is on 3 bits.

Bits [8,7] (PrescFactor[1,0]):used to select the prescaler division factor (see next section: “commutation control”).
Bit 6 (BiasCT):used to bias the spindle centre tap at Vdd5/2 when the spindle outputs are disabled (Run/Stop = 0). The

back-EMF comparator remains operational when BiasCT = 1, to check if the spindle is running for instance.
Bit 5 (Run/Stop):after the power supply is turned on and PorN is high, the motor will start spinning when Run/Stop is

set to ‘1’. The spindle power output starts from state code 0 (see table 3). The motor will stop when this bit is set to ‘0’.
The 3 spindle power outputs are then switched off. No brake is applied.

bit 4 (PllEnable):enables the PLL to improve the speed accuracy.
Bit 3 (Manual):selects the manual commutation mode (Run/Stop bit also needs to be high). When getting out of the

manual mode (=> Manual = ‘0’) and keeping the Run/Stop bit high, the internal commutation block will start from the last
state programmed in manual mode.

Bits [2,0] (ManCom[2,0]):control the commutation in manual mode when Run/Stop = 1 & Manual = 1.

1999June10 11

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

Table 3 Spindle power output states according to ManCom0, ManCom1, ManCom2 bit values.

MANCOM[2] MANCOM[1] MANCOM[0] SPINMOT A SPINMOT B SPINMOT C STATE CODE

0 0 0 low high float 0
0 0 1 low float high 1
0 1 1 float low high 2
1 1 1 high low float 3
1 1 0 high float low 4
1 0 0 float high low 5
1 0 1 low low low 6 (brake)
0 1 0 high low high 7 (tripolar)

REGISTER#1

bit [11,8] (StartUp[3,0]):programmable delay used to detect if the spindle is standing still at start-up.
bit [7,4] (ComDeLim[3,0]):Used to set a default value for the spindle commutation delay.
bit [3,0] (WatchDog[3;0]):programmable delay used to detect if the spindle is running backward at star-up.

REGISTER#2

bit [11,8] (BlankDelay[3,0]):programmable delay used to blank the first edge of the spindle inductive fly-backs.
bit 7 (DigOutMux):SpinDigOut pin is the commutation clock when DigOutMux = ‘1’ else back-EMF comparator output.
bit [6,4] (BdGapAdj[2,0]):used to adjust the internal BandGap reference voltage to improve several parameters.
bit 3 (VcmRetSoftRising):Enables the digital soft rising slope on the “full power retract” step.
bit [2,0] (Vretract[2;0]):used to program the VcmMinus output voltage during the “soft retract” step.

REGISTER#3

bit [11,9] (T_FullPower[2,0]):used to program how much time the full power retract step is applied.
bit [8,3] (T_SlowRetract[5,0]):used to program how much time the slow retract step is applied.
bit [2,0] (T_VcmBrake[2,0]):used to program how much time the VCM brake step is applied.

R

EGISTER#4

bit [11,10] (FlyBackSlope[1,0]):used to program the fly-back pulse leading edge slew rate.
bit [9,8] (ShockThresh[1,0]):set the shock sensor threshold value.
bit 7 (VcmRetract):activates a VCM retract when VcmRetract = ‘1’.
bit 6 (VcmSleep):puts the VCM section (except the VCM sense amplifier and the VCM 12-bit DAC) in sleep mode when

VcmSleep = ‘1’.

bit 5 (DAC12Sleep):puts the VCM 12-bit DAC & the VCM sense amplifier in sleep mode when Dac12Sleep = ‘1’.
bit 4 (RegNegSleep):puts the -3V regulator in sleep mode whenRegNegSleep = ‘1’.
bit 3 (ShockSleep):puts the Shock sensor section in sleep mode when ShockSleep = ‘1’.
bit 2 (SpinSleep):puts the Spindle section in sleep mode when SpinSleep = ‘1’ ; SpinMotA, B, C are floating then.
bit 1 (Reg3v3Enable):Enables the internal 3.3V regulator when bit 1= ‘1’.

1999June10 12

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

bit 0 (TempSelect):selects whether the TempMux pin is a digital output (temperature-high warning) when
TempSelect = ‘0’ or an analog output (temperature monitor) when TempSelect = ‘1’.

REGISTER#5

bit [11,9] (Speed[14,12]):division factor used to set the spindle speed controlled by onboard FLL/PLL (2 MSBs only).
bit [8,7] (PllCur[0,1]):Programmable current for the PLL charge pump.
bit 6 (Dac6ToVcm):6-bit DAC is connected to the VCM section when Dac6ToVcm = ‘1’, else connected to the spindle.
bit [5,0] (Dac6[5,0]):6-bit word converted to a current by the 6-bit DAC.

REGISTER#6
bit [11,0] (Speed[11,0]):division factor used to set the spindle speed controlled by onboard FLL/PLL (12 LSBs only).

REGISTER#7
bit [11,0] (Dac12a[11,0]):12-bit word sent to the VCM 12-bit DAC. Low gain selected for the VCM loop.

REGISTER#8
bit [11,0] (Dac12b[11,0]):12-bit word sent to the VCM 12-bit DAC. High gain selected for the VCM loop.
REGISTER#9

bit [10] (Shock thresh[23):set the shnock sensor threshold value.

1999June10 13

Philips Semiconductors Preliminary specification

5V spindle & VCM driver combo TDA5345HT

Commutation control

DELAYS
The spindle block contains both the low-side and high-side drivers configured as a H bridge for a three phase DC

brushless, sensorless motor. In each of the six possible states, two outputs are active, one sourcing current and one
sinking current. The third output presents a high impedance to the motor which enables measurement of the BEMF in
the corresponding motor coil. The back-EMF comparator output (available on pin SpinDigOut) is processed by the
commutation logic circuit to calculate the correct time for the next commutation, which will change the output state.

The commutation block measures then the time between 2 consecutive zero-crossings and determines the actual
commutation time and the next motor coils state. All the following situations must be taken into account:
=> Start up, No start, Backwards spin, Run and Manual commutation.

The commutation logic keeps the motor spinning by commutating the motor each time a zero-crossing is detected. The
delay between the zero-crossing and the actual output driver change is either internally calculated or programmable via
the serial port (useful at start-up: no delay has been measured!).

The internal commutation clock can be monitored on pin SpinDigOut (44). The falling edges are the relevant
informations: they are caused by the zero-crossings. If preferred, SpinDigOut can be set to become the back-EMF
comparator output, to check if the spindle is already spinning at power up for instance. If the spindle outputs are floating,
don’t forget to bias them, using the “BiasCT” bit, before considering the BemfCompOut value.
Fig.6 and Fig.7 show typical motor commutation timing diagrams.

State Code

SpinMotA

SpinMotB

SpinMotC

Commutation
Clock

BemfCompOut

0

L

H

F

Zero-crossing

1

L

F

HH

234

F

LL

Fig.7 Input commutations to output drivers

HH

F

F

L

5

F

H

L

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