Philips tda5153 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

TDA5153

Pre-amplifier for Hard Disk Drive
(HDD) with MR-read/inductive write
heads

Preliminary specification
File under Integrated Circuits, IC11

1997 Jul 02

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads

CONTENTS

1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 QUICK REFERENCE DATA
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION

8.1 Read mode

8.2 Write mode

8.3 Sleep mode

8.4 Standby mode

8.5 Active mode

8.6 Bi-directional serial interface

8.7 Addressing

8.8 Programming data

8.9 Reading data

8.10 Operation of the serial interface

8.10.1 Configuration

8.10.2 Power control

8.10.3 Head select

8.10.4 Servo write

8.10.5 Test

8.10.5.1 MR head test

8.10.5.2 Temperature monitor

8.10.5.3 Thermal asperity detector

8.10.6 Write amplifier programmable capacitors

8.10.7 High frequency gain attenuator pole register

8.10.8 High frequency gain boost register

8.10.9 Settle pulse

8.10.10 Address registers

8.11 Head unsafe

8.12 HUS survey
9 LIMITING VALUES
10 HANDLING
11 THERMAL RESISTANCE
12 RECOMMENDED OPERATION

CONDITIONS
13 CHARACTERISTICS
14 PACKAGE OUTLINE
15 SOLDERING
16 DEFINITION
17 LIFE SUPPORT APPLICATIONS

TDA5153

1997 Jul 02 2

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads

1 FEATURES

• Designed for 4 (TDA5153BG) or 6 dual-stripe

MR-read/inductive write heads

• Current bias-current sense architecture

• Single supply voltage (5.0 V ±10%); a separate write

drivers supply pin can be biased from VCC to 8 V +10%

• MR elements connected to ground (GND)

• Equal bias currents in the two MR stripes of each head

• On-chip AC couplings eliminate MR head DC offset

• 3-wire serial interface for programming

• Programmable high-frequency zero-pole gain boost

• Programmable write driver compensation capacitance

• Programmable MR bias currents and write currents

• 1-bit programmable read gain

• Sleep, standby, active and test modes available

• Measurement of head resistances in test mode

• In test mode, one MR bias current may be forced to a

minimum current

• Short write current rise and fall times with near rail-to-rail

voltage swing

• Head unsafe pin for signalling of abnormal conditions

and behaviour

• Low supply voltage write-current inhibit (active or

inactive)

• Supports servo writing

• Provides temperature monitor

• Thermal asperity detection with programmable

threshold level

• Requires only one external resistor.

2 APPLICATIONS

• Hard Disk Drive (HDD).

TDA5153

3 GENERAL DESCRIPTION

The 5.0 V pre-amplifier for HDD described here is
designed for five terminals, dual stripe Magneto-Resistive
(MR)-read/inductive-write heads. The disks of the disk
drive are connected to ground. To avoid voltage
break-through between the heads and the disk, the MR
elements of the heads are also connected to ground. The
symmetry of the dual-stripe head-amplifier combination
automatically distinguishes between the differential
signals such as signals and the common-mode effects like
interference. The latter are rejected by the amplifier.

The IC incorporates read amplifiers, write amplifiers, serial
interface, digital-to-analog converters, reference and
control circuits which operate on a single supply voltage of
5V±10%. The output drivers have a separate supply
voltage pin which can be connected to a higher supply
voltage of up to 8 V +10%. The complementary output
stages of the write amplifier allow writing with near
rail-to-rail peak voltages across the inductive write head.

The read amplifier has a low input impedance. The DC
offset between the two stripes of the MR head is eliminated
using on-chip AC coupling. Fast settling features are used
to keep the transients short. As an option, the read
amplifier may be left biased during writing so as to reduce
the duration of these transients even more. Series
inductance in the leads between the amplifier and MR
heads influences the bandwidth which can be
compensated by using a programmable high-frequency
gain-boost (HF zero). HF noise and bandwidth can be
attenuated using a programmable high-frequency
gain-attenuator (HF pole).

On-chip digital-to-analog converters for MR bias currents
and write currents are programmed via a 3-wire serial
interface. Head selection, mode control, testing and servo
writing can also be programmed using the serial interface.
In sleep mode the CMOS serial interface is operational.
Figure 1 shows the block diagram of the device.

4 ORDERING INFORMATION

TYPE

NUMBER

TDA5153X − naked die −
TDA5153AG;

TDA5153BG

1997 Jul 02 3

NAME DESCRIPTION VERSION

LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2

PACKAGE

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)

TDA5153

with MR-read/inductive write heads

5 QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

V

CC(WD)

F noise figure R

V

nir

G

v(dif)

B

−3db

CMRR common mode rejection ratio;

PSRR power supply rejection ratio

t

, t

r

f

I

MR(PR)

I

WR(PR)(b-p)

f

SCLK

supply voltage 4.5 5.0 5.5 V
write drivers supply voltage V

=28Ω; IMR=10mA;

MR

T

=25°C; f = 20 MHz

amb

input referred noise voltage; see
note 3 in Chapter 13

RMR=28Ω; IMR=10mA;
T

=25°C; f = 20 MHz

amb

CC

− 3.0 3.2 dB

− 0.9 1.0 nV/√Hz

8.0 8.8 V

differential voltage gain from head inputs to RDx, RDy;

RMR=28Ω; IMR=10mA

d4 = logic 0 − 160 −
d4 = logic 1 − 226 −

−3 dB frequency bandwidth upper bandwidth without gain

− 220 − MHz

boost (4 nH lead inductance)
IMR= 10 mA; f < 1 MHz − 45 − dB

R

mismatch <5%

MR

I

= 10 mA; f < 100 MHz − 25 − dB

MR

f < 1 MHz − 80 − dB

(input referred);

mismatch <5%

R

MR

f < 100 MHz − 50 − dB

rise/fall times (10% to 90%) Lh= 150 nH; IWR=35mA;

f = 20 MHz

programming MR bias current R
programming write current

V
V

ext

R

ext

= 8.0 V −−1.8 ns

CC(WD)

= 6.5 V −−2.1 ns

CC(WD)

=10kΩ 5 − 20.5 mA
=10kΩ 20 − 51 mA

range (base-to-peak)
serial interface clock rate −−25 MHz

1997 Jul 02 4

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads

6 BLOCK DIAGRAM

handbook, full pagewidth

WDlx
WDly

(1)

IWDlx

(1)

IWDly

HUS

R

ext

2
3

1

12

WRITE DRIVER

INPUT

HEAD UNSAFE

INDICATOR

LOW SUPPLY

VOLTAGE

INDICATOR

V

CC

11

TDA5153

FF

WRITE

CURRENT

SOURCE

VOLTAGE

REFERENCE

TDA5153

V

CC(WD)

(5 to 8 V)

48

(2)

15

(3)

6

(3)

6

(3)

6

WRITE DRIVER

AND

READ PREAMP

(3)

(6×)

, 20, 26,

33, 39, 44

(2)

14

, 19, 25,

32, 38, 43

(2)

nWy
nWx

(2)

+V

CC

4

R/W

SEN

RDx
RDy

7
5

6

9
10

SCLK

SDATA

Pin numbers correspond to TDA5153AG and TDA5153BG only. See Fig.3 and Chapter 7 for pinning of TDA5153X.
(1) Only available on naked die.
(2) Absent on TDA5153BG (4 channel version).
(3) 4 on TDA5153BG.

SERIAL

INTERFACE

20 kΩ

5

4
4

GND n

TAS

DETECTOR

4

head select

CURRENT

SOURCE

8, 13

5
3

(3)

6

R

MR

6

6

6

(3)

(3)

(3)

(2)

18

, 23, 29,

36, 42, 47

(2)

17

, 22, 28,

35, 41, 46

(2)

16

, 21, 27,

34, 40, 45

(2)

(2)

(2)

MGK422

nRy

nGND

nRx

Fig.1 Block diagram.

1997 Jul 02 5

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)

TDA5153

with MR-read/inductive write heads

7 PINNING

SYMBOL

HUS 1 1 1 head unsafe output
WDIx 2 2 2 write data input (differential; voltage input)
WDIy 3 3 3 write data input (differential; voltage input)
IWDIx −−4 write data input (differential; current input)
IWDIy −−5 write data input (differential; current input)

W 4 4 6 read/write (read = HIGH; write = LOW)

R/
SEN 5 5 7 serial bus enable
SDATA 6 6 8 serial bus data
SCLK 7 7 9 serial bus clock
GND1 8 8 10 ground connection 1
RDx 9 9 11 read data output (differential x − y)
RDy 10 10 12 read data output (differential x − y)
GND3 −−13 ground connection 3
V

CC

R

ext

GND2 13 13 16 ground connection 2
0Wx 14 − 17 inductive write head connection for head H0 (differential x − y)
0Wy 15 − 18 inductive write head connection for head H0 (differential x − y)
0Rx 16 − 19 MR-read head connection for head H0 (differential x − y)
0GND 17 − 20 ground connection for head H0
0Ry 18 − 21 MR-read head connection for head H0 (differential x − y)
n.c. − 14 − not connected
n.c. − 15 − not connected
n.c. − 16 − not connected
n.c. − 17 − not connected
n.c. − 18 − not connected
1Wx 19 19 22 inductive write head connection for head H1 (differential x − y)
1Wy 20 20 23 inductive write head connection for head H1 (differential x − y)
1Rx 21 21 24 MR-read head connection for head H1 (differential x − y)
1GND 22 22 25 ground connection for head H1
1Ry 23 23 26 MR-read head connection for head H1 (differential x − y)
n.c. 24 24 − not connected
2Wx 25 25 27 inductive write head connection for head H2 (differential x − y)
2Wy 26 26 28 inductive write head connection for head H2 (differential x − y)
2Rx 27 27 29 MR-read head connection for head H2 (differential x − y)
2GND 28 28 30 ground connection for head H2
2Ry 29 29 31 MR-read head connection for head H2 (differential x − y)
n.c. 30 30 − not connected

TDA5153AG TDA5153BG TDA5153X

PIN PAD

DESCRIPTION

11 11 14 supply voltage

12 12 15 10 kΩ external resistor

1997 Jul 02 6

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)

TDA5153

with MR-read/inductive write heads

SYMBOL

n.c. 31 31 − not connected
3Wx 32 32 32 inductive write head connection for head H3 (differential x − y)
3Wy 33 33 33 inductive write head connection for head H3 (differential x − y)
3Rx 34 34 34 MR-read head connection for head H3 (differential x − y)
3GND 35 35 35 ground connection for head H3
3Ry 36 36 36 MR-read head connection for head H3 (differential x − y)
n.c. 37 37 − not connected
4Wx 38 38 37 inductive write head connection for head H4 (differential x − y)
4Wy 39 39 38 inductive write head connection for head H4 (differential x − y)
4Rx 40 40 39 MR-read head connection for head H4 (differential x − y)
4GND 41 41 40 ground connection for head H4
4Ry 42 42 41 MR-read head connection for head H4 (differential x − y)
5Wx 43 − 42 inductive write head connection for head H5 (differential x − y)
5Wy 44 − 43 inductive write head connection for head H5 (differential x − y)
5Rx 45 − 44 MR-read head connection for head H5 (differential x − y);
5GND 46 − 45 ground connection for head H5
5Ry 47 − 46 MR-read head connection for head H5 (differential x − y)
n.c. − 43 − not connected
n.c. − 44 − not connected
n.c. − 45 − not connected
n.c. − 46 − not connected
n.c. − 47 − not connected
V

CC(WD)

GND4 −−48 ground connection 4

TDA5153AG TDA5153BG TDA5153X

PIN PAD

DESCRIPTION

48 48 47 supply voltage for the write drivers

1997 Jul 02 7

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads

handbook, full pagewidth

HUS
WDIx
WDIy

R/W

SEN

SDATA

SCLK

GND1

RDx
RDy

V

CC

R

ext

CC(WD)

V
48

1
2
3
4
5
6
7
8

9
10
11
12

5Ry
47

5Rx

5GND
464544

TDA5153AG

5Wy

5Wx
43

4Ry
42

4GND
41

4Rx
40

4Wy
39

4Wx
38

n.c.

TDA5153

36

3Ry

35

3GND

34

3Rx

33

3Wy

32

3Wx

31

n.c.
n.c.

30
29

2Ry
2GND

28
27

2Rx

26

2Wy
2Wx

25

handbook, full pagewidth

HUS
WDIx
WDIy

R/W

SEN

SDATA

SCLK

GND1

RDx
RDy

V

CC

R

ext

13

14

151617

0Wx

0Wy

GND2

CC(WD)

n.c.

V

n.c.

48

47

46

1
2
3
4
5
6
7
8

9
10
11
12

0Rx

0GND

n.c.

n.c.

n.c.

45

44

43

TDA5153BG

18
0Ry

19

1Wx

4Ry
42

20

1Wy

4GND
41

21

1Rx

4Rx
40

4Wy
39

22

1GND

23

1Ry

4Wx
38

24 37

n.c.

n.c.

MGK424

36
35
34
33
32
31
30
29
28
27
26
25

3Ry
3GND
3Rx
3Wy
3Wx
n.c.
n.c.
2Ry
2GND
2Rx
2Wy
2Wx

13

14

15

16

17

n.c.

n.c.

n.c.

GND2

n.c.

Fig.2 Pin configurations.

1997 Jul 02 8

18
n.c.

19

1Wx

20

1Wy

21

1Rx

22

1GND

23

1Ry

24 37
n.c.

MGK420

Philips Semiconductors Preliminary specification

Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads

handbook, full pagewidth

CC(WD)

5Ry

5GND

5Rx

5Wy

TDA5153X

GND4

HUS

WDIx

WDIy

IWDIx

IWDIy

R/W

SEN

SDATA

SCLK

V

48

47 46 45 44 43 42 41 40 39 38 37

1

2

3

4

5

6

7

8

9

5Wx

4Ry

4GND

4Rx

4Wy

4Wx

TDA5153

3Ry

36

3GND

35

3Rx

34

3Wy

33

3Wx

32

GND1

RDx

RDy

GND3

V

CC

R

ext

10

11

12

13

14

16 17 18 19 20 21 22 23 24 25 26

15

GND2

0Wx

0Wy

0Rx

0GND

0Ry

1Wx

1Wy

1Rx

Fig.3 TDA5153X pad configuration.

1GND

1Ry

31

30

29

28

27

MGK421

2Ry

2GND

2Rx

2Wy

2Wx

1997 Jul 02 9