Product specification
Supersedes data of 2000 Oct 13
File under Integrated Circuits, IC01
2001 Jun 29
Philips SemiconductorsProduct specification
Multiple voltage regulators with switchTDA3608Q; TDA3608TH
FEATURES
General
• Two VP-state controlled regulators (regulator 1 and
regulator 3) and a power switch
• Regulator 2 and reset circuit operate during load dump
and thermal shutdown
• Separate control pins for switching regulator 1,
regulator 3 and power switch
• Supply voltage range from −18 to +50 V
• Low reverse current of regulator 2
• Low quiescent current (when regulator 1, regulator 3
and power switch are switched off)
• Hold output circuit for regulator 1 (only valid when
regulator 3 output voltage >1.3 V)
• Reset and hold outputs (open-collector outputs)
• Adjustable reset delay time
• High ripple rejection
• Backup capacitor connection to supply regulator 2 and
reset circuit up to 25 V.
Protections
• Reverse polarity safe (down to −18 V without high
reverse current)
• Able to withstand voltages up to 18 V at the outputs
(supply line may be short circuited)
• ESD protection on all pins
• Thermal protection
• Load dump protection
• Foldback current limit protection for regulator 1,
regulator 2 and regulator 3
• Delayed foldback current limit protection for power
switch (at short-circuit); delay time fixed by reset delay
capacitor
• All regulator outputs and power switch are
DC short-circuited safe to ground and VP.
GENERAL DESCRIPTION
The TDA3608 isamultiple output voltage regulator with a
power switch, intended for use in car radios with or without
a microcontroller. It contains:
• Two fixed output voltage regulators with a foldback
current protection (regulator 1 and regulator 3) and one
fixed output voltage regulator (regulator 2) intended to
supply a microcontroller, which also operates during
load dump and thermal shutdown
• A power switch with protections, operated by an enable
input
• Reset and hold outputs that can be used to interface
with the microcontroller; the reset output can be used to
call up the microcontroller and the hold output indicates
thattheregulator 1 output voltage is available and within
the range
• A supply pin which can withstand load dump pulses and
negative supply voltages
• Regulator 2 which is switched on at a backup voltage
higher than 6.5 V and switched off when the regulator 2
output drops below 1.9 V
• A provision for the use of a reserve (backup) supply
capacitor that will hold enough energy for regulator 2
(5 Vcontinuous) to allow a microcontrollertoprepare for
loss of voltage.
ORDERING INFORMATION
TYPE
NUMBER
TDA3608QDBS13Pplastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)SOT141-6
TDA3608THHSOP20plastic, heatsink small outline package; 20 leads; low stand-off heightSOT418-2
2001 Jun 292
NAMEDESCRIPTIONVERSION
PACKAGE
Philips SemiconductorsProduct specification
Multiple voltage regulators with switchTDA3608Q; TDA3608TH
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply
V
P
I
q
T
j
Voltage regulators
V
REG1
V
REG2
V
REG3
Power switch
V
drop
I
M
supply voltageoperating9.514.418V
regulator 2 on2.414.418V
reverse polarity; non-operating−−−18V
jump start for t ≤ 10 minutes−−30V
load dump protection for t ≤ 50 ms
Multiple voltage regulators with switchTDA3608Q; TDA3608TH
FUNCTIONAL DESCRIPTION
The TDA3608 is a multiple output voltage regulator with a
power switch, intended for use in car radios with or without
a microcontroller. Because of low-voltage operation of the
car radio, low-voltage drop regulators are used in the
TDA3608.
Backup supply
The charge of the backup capacitor connected to pin BU
can be used to supply regulator 2 for a short period when
the supply voltage VP drops to 0 V (the time depends on
the value of the capacitor).
Regulator 1
When the output voltage of regulator 2 and the supply
voltage (VP> 4.5 V) are both available, regulator 1 can be
operated by means of enable pin EN1 (see Fig.4).
Regulator 2
Regulator 2 switches on (see Fig.5) when the backup
voltage exceeds 6.5 V for the first time and switches off
when the output voltage of regulator 2 drops below 1.9 V
(this is far below an engine start).
The hold output is only activated when V
REG3
> 1.3 V.
When pin HOLD is connected via a pull-up resistor to the
output of regulator 3 spikes will be minimized to 1.3 V
(maximum value) because the hold output is only disabled
when V
REG3
< 1.3 V.
Pin HOLD will be forced LOW when the load dump
protection is activated and also in the standby mode.
Power switch
The power switch can be controlled by means of enable
pin ENSW (see Fig.6).
Protections
All output pins are fully protected.
The regulators are protected against load dump
(regulator 1 and regulator 3 switch off at VP> 18 V) and
short-circuit (foldback current protection).
The power switch contains a foldback current protection,
but this protection is delayed at a short-circuit condition by
the reset delay capacitor. During this time the output
current is limited to at least 2 A (peak value) and
1.8 A (continuous value) at VP≤ 18 V. During the foldback
mode the current is limited to 0.5 A (typical value).
Regulator 3
When the output voltage of regulator 2 and the supply
voltage (VP> 4.5 V) are both available, regulator 3 can be
operated by means of enable pin EN3 (see Fig.4).
Reset
When regulator 2 is switched on and the output voltage of
this regulator is within its voltage range, the reset output
(see Fig.5) will be enabled (pin RES goes HIGH through
an external pull-up resistor) to generate a reset to the
microcontroller.
The reset cycles can be extended by means of anexternal
capacitor connected to pin C
. This start-up feature is
RES
included to secure asmooth start-up ofthe microcontroller
at first connection, without uncontrolled switching of
regulator 2 during the start-up sequence.
Hold
Regulator 1 has an open-collector hold output (see Fig.4)
indicating that the output voltage is settled at 8.5 V.
Pin HOLD is held HIGH by an external pull-up resistor.
When the supply voltage VPdrops or during high load, the
output voltage drops out-of-regulationand pin HOLD goes
LOW.
The timing diagram is shown in Fig.7.
The foldback protection is activated when VSW<4V.
When regulator 2 is out-of-regulation and generates a
reset, the power switch is in the foldback mode
immediately when VSW<4V.
In the standby mode the voltage on the reset delay
capacitor is about 4 V and the voltage on the power switch
output is VP− 0.45 V (typical value) at ISW= 1 A. During
an overload condition or short-circuit the reset delay
capacitor will be charged to a higher voltage. The power
switch is in the high current mode while the capacitor is
charged, after this the switch is in the foldback mode
(VSW< 4 V).Whilethe reset delay capacitor is charged the
power switch output can reach its correct output voltage.
Now the voltage on the reset delay capacitor is decreased
rapidlyto 4 V. The resetoutput voltage is not influencedby
this change of voltages. The time of the high current mode
depends on the value of the reset delay capacitor.
At VP> 18 V the power switch is clamped at maximum
17.2 V (to avoid that external connected circuitry is being
damaged by an overvoltage) and the power switch will
switch off at load dump.
2001 Jun 296
Philips SemiconductorsProduct specification
Multiple voltage regulators with switchTDA3608Q; TDA3608TH
handbook, full pagewidth
V
P
enable
regulator 1
regulator 1
enable
regulator 3
regulator 3
hold output
18.0 V
9.5 V
4.5 V
4.0 V
≥2.2 V
≤2.0 V
8.5 V
0 V
≥2.2 V
≤2.0 V
5.0 V
0 V
load dump
MGT568
Fig.4 Timing diagram of regulator 1, regulator 3 and hold output.
handbook, full pagewidth
V
P
backup
regulator 2
reset
delay
capacitor
reset
output
18.0 V
4.0 V
6.5 V
5.4 V
5.0 V
1.9 V
0 V
5.0 V
3.0 V
0 V
5.0 V
t
d(res)
load dump
Fig.5 Timing diagram of backup, regulator 2 and reset output.
2001 Jun 297
MGT567
Philips SemiconductorsProduct specification
Multiple voltage regulators with switchTDA3608Q; TDA3608TH
handbook, full pagewidth
V
P
enable
power
switch
power
switch
output
handbook, full pagewidth
regulator 2
reset
delay
voltage
reset
output
enable
power
switch
power
switch
voltage
power
switch
current
18.0 V
4.5 V
4.0 V
≥2.2 V
≤2.0 V
16.2 V
0 V
5 V
6.4 V
4 V
3 V
0 V
5 V
0 V
>
2.2 V
<
2.0 V
14 V
4 V
0 V
2 A
0.5 A
0 A
current limit mode
load dump
Fig.6 Timing diagram of power switch output.
t
d(sw)
foldback modefoldback mode
t
d(res)
MGT569
MGT570
Fig.7 Timing diagram of current protection of power switch.
2001 Jun 298
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