Philips TDA1592T Datasheet

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INTEGRATED CIRCUITS

TDA1592

PLL stereo decoder and noise blanker

Preliminary specification

1996 May 31

Supersedes data of June 1993

File under Integrated Circuits, IC01

Philips Semiconductors

Preliminary specification

 

 

PLL stereo decoder and noise blanker

TDA1592

 

 

 

 

FEATURES

Adjustment-free voltage controlled PLL oscillator for ceramic resonator (f = 456 kHz)

Pilot signal dependent mono/stereo switching

Analog control of mono/stereo change over [stereo blend, Stereo Noise Controller (SNC)]

Adjacent channel noise suppression (114 kHz)

Pilot canceller

Analog control of de-emphasis; High Cut Control (HCC)

Reduced and controlled de-emphasis for AM operation (pin 7 to GND)

Applicable as source selector for AM/FM/cassette switching

Soft mute for silent tuning

Separate interference noise detector

Integrated input low-pass filter for delayed noise blanking

Noise blanking at MPX-demodulator outputs.

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA1592 is a monolithic bipolar integrated circuit providing the stereo decoder function and noise blanking for FM car radio applications.

The device operates in a power supply range of 7.5 to 12 V.

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

VP

supply voltage (pin 5)

7.5

10

12

V

IP

supply current

15

20

mA

Vo(rms)

audio output signal (RMS value)

800

900

1000

mV

THD

total harmonic distortion

0.1

0.3

%

 

 

 

 

 

 

S/N

signal-to-noise ratio

82

dB

 

 

 

 

 

 

αcs

channel separation

30

40

dB

Vtrigg

interference voltage trigger level

10

mV

ORDERING INFORMATION

TYPE

 

PACKAGE

 

 

 

 

NUMBER

NAME

DESCRIPTION

VERSION

 

 

 

 

 

TDA1592

DIP20

plastic dual in-line package; 20 leads (300 mil)

SOT146-1

 

 

 

 

TDA1592T

SO20

plastic small outline package; 20 leads; body width 7.5 mm

SOT163-1

 

 

 

 

1996 May 31

2

Philips TDA1592T Datasheet

31 May 1996

3

 

 

 

 

 

 

pilot

 

andbook,

 

 

 

 

 

 

 

 

auxiliary

 

 

 

 

 

 

 

 

full

Vref

VSNC

 

 

 

VHCC

 

Rout

MPX input

 

 

 

 

indicator

 

 

 

 

 

input

 

 

 

 

 

pagewidth

 

 

 

 

100 nF

 

750

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100 nF

kΩ

mono

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rout R

164 kΩ

Rin

 

 

 

 

 

 

 

 

 

 

 

 

6.8

6.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47 kΩ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

nF

nF

 

 

20

19

 

 

 

18

 

 

17

16

 

 

 

 

15

14

13

12

11

 

Vref

PILOT

 

 

 

 

 

 

SNC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SWITCH

 

 

 

TDA1592

 

 

 

 

 

 

75

 

DETECTOR

 

 

 

 

 

 

 

 

 

 

6.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

kΩ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

kΩ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7.4 kΩ

 

 

 

 

 

Vref

 

4-POLE

 

 

 

 

 

 

 

 

 

 

2-POLE

 

GATE

 

 

 

 

 

 

 

PILOT

 

 

 

 

 

 

 

 

 

 

 

 

 

FILTER

 

 

 

MUTE

 

 

FILTER

7.4 kΩ

 

AND

 

 

 

 

 

 

 

CANCEL

 

 

 

 

 

 

 

 

 

(80 kHz)

 

 

 

 

 

 

 

 

(30 kHz)

 

HCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PHASE

 

 

 

 

 

 

 

 

 

 

INTERFERENCE

 

 

 

 

 

 

DETECTOR

 

 

 

 

 

 

Vref

 

 

DETECTOR

 

 

 

6.8 kΩ

 

 

 

19

19

19

38

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LOGIC

 

 

 

 

 

 

HIGH-PASS

 

PULSE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AMPLIFIER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FORMER

 

 

 

 

 

 

 

Vref

 

 

 

 

 

 

 

(120 kHz)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCO

POWER

 

Iref

 

 

 

 

 

AGC

NOISE AND AGC

 

 

 

 

Vref

 

 

 

SUPPLY

 

 

 

 

 

 

 

 

DETECTOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47 kΩ

 

 

 

 

 

 

 

 

 

 

1

2

3

 

 

4

5

 

 

6

 

7

8

 

 

 

 

9

10

 

 

 

 

 

 

 

 

 

 

 

VCO

 

 

 

BC548

 

 

47 kΩ

 

 

 

 

 

 

 

 

 

 

27 kΩ

 

 

33 kΩ

 

 

 

68 kΩ

 

CSB

 

 

 

 

 

 

 

off

68

 

 

 

Rout L

 

 

 

 

100 kΩ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10 nF

456 F11

 

100 nF

 

 

 

33 pF

 

pF

47

820

 

 

 

 

 

100 nF

 

 

 

 

 

 

 

 

 

 

 

nF

kΩ

 

27 kΩ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VP

 

interference

 

 

 

 

mute

auxiliary

Lout

 

 

 

 

 

 

 

 

 

input

 

 

 

 

 

 

input

MED724

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig.1 Block diagram with external components, also used as test circuit.

DIAGRAM BLOCK

blanker noise and decoder stereo PLL

TDA1592

Semiconductors Philips

specification Preliminary

Philips Semiconductors

Preliminary specification

 

 

PLL stereo decoder and noise blanker

TDA1592

 

 

PINNING

SYMBOL

PIN

DESCRIPTION

 

 

 

PLL

1

phase locked loop filter

 

 

 

OSC

2

oscillator input/output pin for

 

ceramic resonator

 

 

 

 

 

GND

3

ground (0 V)

 

 

 

Iref

4

reference current

VP

5

supply voltage (+10 V)

INFI

6

interference signal input

 

 

 

PUFO

7

pulse former time constant; VCO

 

off

 

 

 

 

 

NDET

8

noise detector time constant; mute

 

on

 

 

 

 

 

FB-L

9

AF feedback input for left audio

 

signal

 

 

 

 

 

VoL

10

AF output signal left

VoR

11

AF output signal right

FB-R

12

AF feedback input for right audio

 

signal

 

 

 

 

 

CDEEL

13

de-emphasis capacitor for left

 

channel

 

 

 

 

 

CDEER

14

de-emphasis capacitor for right

 

channel

 

 

 

 

 

HCC

15

HCC input for de-emphasis control

 

 

 

SNC

16

stereo blend input

 

 

 

Vref

17

externally applied reference

 

voltage of 1 to 5 V

 

 

 

 

 

IDENT

18

identification output (HIGH = pilot

 

existing; stereo)

 

 

 

 

 

PILOT

19

pilot detector level (forced mono

 

input)

 

 

 

 

 

Vi MPX

20

MPX input signal from IF

 

demodulator

 

 

 

 

 

handbook, halfpage

PLL

1

 

20

Vi MPX

 

 

 

 

 

 

 

OSC

2

 

19

PILOT

 

 

 

 

 

 

 

GND

3

 

18

IDENT

 

 

 

 

 

 

 

Iref

4

 

17

Vref

 

 

 

 

 

 

 

VP

5

 

16

SNC

INFI

 

 

TDA1592

 

HCC

6

 

15

PUFO

 

 

 

 

 

CDEER

7

 

14

 

 

 

 

 

 

 

NDET

8

 

13

CDEEL

FB-L

 

 

 

 

 

FB-R

9

 

12

VoL

 

 

 

 

 

VoR

10

 

11

 

 

 

 

 

 

 

 

 

 

MED726

 

Fig.2 Pin configuration.

1996 May 31

4

Philips Semiconductors

Preliminary specification

 

 

PLL stereo decoder and noise blanker

TDA1592

 

 

FUNCTIONAL DESCRIPTION

The MPX input of the TDA1592 (pin 20) is the null-node of an operational amplifier with internal feedback resistor. Adapting the stereo decoder input to the level of the FM demodulator output is realized by the value of input resistor Rin (see Fig.3). The total gain of the stereo decoder is applicable by varying the feedback resistors

Rout (pins 9, 10, 11 and 12) of the output operational amplifiers (see Fig.4).

The input amplifier is followed by an integrated 4th order Bessel low-pass filter with a cut-off frequency of 80 kHz. It provides necessary signal delay for noise blanking and damping of high frequency interferences at the stereo decoder input.

The soft mute facility (pin 8) provides silent tuning for RDS processing. The mute time constant may be adjusted from pin 8. In mute position and the VCO switched off (pin 7), the output amplifiers can be used for cassette playback, AM stereo purpose or other signal sources.

The voltage to current converted MPX signal is fed to phase detector, pilot detector and pilot canceller circuits. The oscillator is alignment-free with an external ceramic resonator at 456 kHz as reference (pin 2). The required 19 kHz and 38 kHz signals are generated by division of the oscillator output signal in a logical circuit. For regeneration of the 38 kHz subcarrier, a PLL is used. The 19 kHz quadrature phase signal is fed to the 19 kHz

phase detector, where it is compared with the incoming pilot tone. The DC output signal of the phase detector (pin 1) controls the oscillator (PLL).

The pilot presence detector is driven by internally generated in-phase 19 kHz. Its pilot-dependent DC output voltage (pin 19) is fed to a threshold switch, which activates the pilot indicator logic output (pin 18) and turns the stereo decoder to stereo operation. The same

DC voltage is used to control the amplitude of an anti-phase internally generated 19 kHz signal. In the pilot canceller, the pilot tone is compensated by this anti-phase 19 kHz signal.

The pilot cancelled signal is fed to the multiplex decoder. There, the side signal is demodulated and combined with the main signal in a matrix to left and right audio channel.

Compensation for roll-off in the incoming MPX signal caused by IF filters and FM demodulator is realized by corresponding side signal amplification.

A smooth mono to stereo take-over, which is controlled by the level detector voltage of the IF part, is achieved by the SNC (pins 16 and 17; see Fig.6).

From the output of the MPX demodulator the signals are fed to 2-pole low-pass filters with a cut-off frequency of 30 kHz to provide additional signal delay for noise blanking and attenuation of the subcarrier and its harmonics.

These filters are followed by the noise suppression gates, which are combined with de-emphasis and HCC. The de-emphasis is defined by internal resistors (aligned by an external current) and external capacitors (pins 13 and 14). For HCC, the de-emphasis time constant can be changed to higher values (pins 15 and 17; see Figs 7 to 9). This function is controlled by an analog input signal, derived from the level detector voltage of the IF part. When the VCO is turned off (pin 7 to GND), de-emphasis is reduced to 20 μs for full frequency response when AM-AF is fed through the stereo decoder. De-emphasis remains controllable.

From the gate circuits audio is fed through internal series resistors to the inverting inputs of the output operational amplifiers (pins 9 and 12), which can also be used as signal inputs for cassette playback or other sources when the mute is activated. The gain of these amplifiers is defined by external feedback resistors Rout

(pins 9, 10, 11 and 12).

The input of the ignition noise blanker is the null node of an operational amplifier (pin 6). It can be driven by the level detector output of the FM-IF limiter and/or the MPX signal. Its sensitivity is dependent on the value of the series input resistor at pin 6.

The operational amplifier output signal is fed through an integrated 120 kHz high-pass filter, becomes amplified and is then fed in parallel to the noise detector and the interference detector. The noise detector is a negative peak detector. Its output (pin 8) controls the trigger sensitivity (prevention to false triggering at noisy input signals) and the attenuation of the input operational amplifier. The output of the interference detector, when receiving a steep pulse, triggers a mono flip-flop, which is a part of the pulse former circuit. The time constant of the mono flip-flop is defined by an external capacitor (pin 7) and its output activates the blanking gates in the audio.

1996 May 31

5

Philips Semiconductors

 

Preliminary specification

 

 

 

 

 

 

PLL stereo decoder and noise blanker

 

 

TDA1592

 

 

 

 

 

 

LIMITING VALUES

 

 

 

 

 

In accordance with the Absolute Maximum Rating System (IEC 134).

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

MIN.

MAX.

 

UNIT

 

 

 

 

 

 

VP

supply voltage (pin 5)

0

13.2

 

V

Ptot

total power dissipation

0

0.25

 

W

Tstg

storage temperature

55

+150

 

°C

Tamb

operating ambient temperature

40

+85

 

°C

Ves

electrostatic handling for all pins; note 1

400

+400

 

V

Note

1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.

CHARACTERISTICS

VP = 10 V; Tamb = 25 °C; input signal Vi MPX(p-p) = 1.7 V; m = 100% ( f = ±75 kHz, fmod = 1 kHz); de-emphasis of 50 μs and series resistor at input R1 = 164 kΩ; measurements taken in Fig.1; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

VP

supply voltage (pin 5)

 

7.5

10

12

V

IP

supply current

 

15

20

mA

Stereo decoder

 

 

 

 

 

 

 

 

 

 

 

 

Vi MPX(p-p)

MPX input signal

 

1.7

V

Vi MPX(p-p)

overdrive margin of MPX input signal

THD = 1%

6

dB

Vo(rms)

AF mono output signal at pins 10 and 11

without pilot

800

900

1000

mV

 

(RMS value)

 

 

 

 

 

 

 

 

 

 

 

 

Vo

overdrive margin of output signal

THD = 1%

6

dB

V10-11/Vo

difference of output voltage levels

 

1

dB

Vo 10,11

DC output voltage (pins 10 and 11)

 

3.2

3.7

4.2

V

Ro 10,11

output resistance

 

150

Ω

Io

output current

 

330

400

μA

R2,3

maximum feedback resistor

 

68

kΩ

V4,3

reference voltage

 

3.7

3.8

3.9

V

αcs

channel separation

pin 16 open-circuit;

30

40

dB

 

 

see Fig.6

 

 

 

 

 

 

 

 

 

 

 

THD

total harmonic distortion

 

0.1

0.3

%

 

 

 

 

 

 

 

S/N

signal-to-noise ratio

f = 20 to 16000 Hz

77

82

dB

 

 

 

 

 

 

 

α19

pilot signal suppression

f = 19 kHz

40

50

dB

α38

subcarrier suppression

f = 38 kHz

35

50

dB

α57

 

f = 57 kHz

46

dB

α76

 

f = 76 kHz

60

dB

IM2

intermodulation for fspur = 1 kHz

fmod = 10 kHz; note 1

60

dB

IM3

 

fmod = 13 kHz

58

dB

α57 VF

traffic radio (VWF)

f = 57 kHz; note 2

70

dB

α67

SCA (Subsidiary Communications

f = 67 kHz; note 3

70

dB

 

Authorization)

 

 

 

 

 

 

 

 

 

 

 

 

1996 May 31

6

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