Philips SAA6581T Datasheet

INTEGRATED CIRCUITS

DATA SHEET

SAA6581T

RDS/RBDS demodulator

Product specification			2001 May 07
File under Integrated Circuits, IC01

Philips Semiconductors	Product specification
RDS/RBDS demodulator	SAA6581T

FEATURES

∙Integrated switched capacitor filter

∙Demodulates European Radio Data System (RDS) or the USA Radio Broadcast Data System (RBDS) signals

∙Oscillator frequencies: 4.332 or 8.664 MHz

∙Integrated ARI clamping

∙CMOS device

∙Single supply voltage: 5 V

∙Extended temperature range: −40 to +85 °C

∙Low number of external components.

GENERAL DESCRIPTION

The RDS/RBDS demodulator is a CMOS device with integrated filtering and demodulating of RDS/RBDS signals coming from a multiplexed input data stream. Data signal RDDA and clock signal RDCL are provided as outputs for further processing by a suitable microcomputer, for example CCR921 and CCR922.

The SAA6581T replaces SAA6579 in function and pin-compatibility.

QUICK REFERENCE DATA

APPLICATIONS

The RDS/RBDS system offers a large range of applications from the many functions that can be implemented. For car radios the most important are:

∙Program Service (PS) name

∙Traffic Program (TP) identification

∙Traffic Announcement (TA) signal

∙Alternative Frequency (AF) list

∙Program Identification (PI)

∙Enhanced Other Networks (EON) information.

SYMBOL		PARAMETER		MIN.	TYP.		MAX.	UNIT
VDDA	analog supply voltage			4.0	5.0		5.5	V
VDDD	digital supply voltage			4.0	5.0		5.5	V
IDD(tot)	total supply current			−	6.0		−	mA
Vi(MPX)	RDS input sensitivity at pin MPX			1	−		−	mV
fi(xtal)	crystal input frequency			−	4.332		−	MHz
				−	8.664		−	MHz
ORDERING INFORMATION
TYPE				PACKAGE
NUMBER	NAME		DESCRIPTION					VERSION
SAA6581T	SO16	plastic small outline package; 16 leads; body width 7.5 mm						SOT162-1

2001 May 07

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Philips Semiconductors	Product specification
RDS/RBDS demodulator	SAA6581T

BLOCK DIAGRAM

560 pF

+5 V

C7

SCOUT

C6

CIN

VDDD

100 nF

8

7

12

10 SYNC

C1

MPX

4

57 kHz

CLOCKED

16

RDCL

multiplex

RDS/RBDS

8th ORDER

input

COMPARATOR

DEMODULATOR

2

RDDA

BANDPASS FILTER

330 pF

SAA6581T

SIGNAL QUALITY

1

QUAL

DETECTOR

+5 V

VDDA

5

POWER

TEST

OSCILLATOR

SUPPLY

CONTROL

AND CLOCK

C2

AND RESET

100 nF

6

3

15

9

13

14

11

MHB899

VSSA

Vref

TCON

MODE

OSCI

OSCO

VSSD

C3

2.2 F

C4

C5

Q1

47 pF

56 pF

Fig.1 Block diagram.

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Philips Semiconductors	Product specification
RDS/RBDS demodulator	SAA6581T

PINNING

SYMBOL	PIN	DESCRIPTION
QUAL	1	signal quality indication output
RDDA	2	RDS data output
V	3	reference voltage output (1/	V	DDA	)
ref		2
MPX	4	multiplex signal input
VDDA	5	analog supply voltage (5 V)
VSSA	6	analog ground (0 V)
CIN	7	comparator input
SCOUT	8	switched capacitor filter output
MODE	9	oscillator frequency select input
SYNC	10	ARI clamping control input
VSSD	11	digital ground (0 V)
VDDD	12	digital supply voltage (5 V)
OSCI	13	oscillator input
OSCO	14	oscillator output
TCON	15	test control input
RDCL	16	RDS clock output

FUNCTIONAL DESCRIPTION

RDS/RBDS signal demodulation

BANDPASS FILTER

The bandpass filter has a centre frequency of 57 kHz. It selects the RDS/RBDS sub-band from the multiplex signal MPX and suppresses the audio signal components. The filter block contains an analog anti-aliasing filter at the input followed by an 8th order switched capacitor bandpass filter and a reconstruction filter at the output.

CLOCKED COMPARATOR

The comparator digitizes the output signal from the 57 kHz bandpass filter for further processing by the digital RDS/RBDS demodulator. To attain high sensitivity and to avoid phase distortion, the comparator input stage has automatic offset compensation.

DEMODULATOR

The demodulator provides all functions of the SAA6579 and improves performance under weak signal conditions.

handbook, halfpage

QUAL	1				16			RDCL
RDDA	2					15		TCON
Vref	3					14		OSCO
MPX	4					13		OSCI
			SAA6581T
VDDA	5					12		VDDD
VSSA	6					11		VSSD
CIN	7					10		SYNC
SCOUT	8					9		MODE
				MHB900

Fig.2 Pin configuration.

Demodulator functions include:

∙57 kHz carrier regeneration from the two sidebands (Costas loop)

∙Symbol integration over one RDS clock period

∙Bi-phase symbol decoding

∙Differential decoding

∙Synchronization of RDS/RBDS output data.

The RDS/RBDS demodulator recovers and regenerates the continuously transmitted RDS/RBDS data stream in the MPX signal and provides clock RDCL for the output signals and data output RDDA for further processing by an RDS/RBDS decoder, for example CCR921 or CCR922.

ARI CLAMP

The demodulator checks the input signal for presence of RDS only, or RDS plus ARI transmissions. After a fixed test period, if the SYNC input is set HIGH the demodulator locks in the ‘verified’ condition (see Table 1). If SYNC is set LOW, the ARI clamping is reset (disabled). After SYNC returns to HIGH, the demodulator resumes checking the input signal.

2001 May 07

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Philips Semiconductors	Product specification
RDS/RBDS demodulator	SAA6581T

Table 1 Control pin SYNC

SYNC	ARI CLAMPING
LOW	internal ARI clamping disabled
HIGH	ARI clamping allowed to be logged

SIGNAL QUALITY DETECTION

Output QUAL indicates the safety of the regenerated RDS data (HIGH = ‘good’ data; LOW = ‘unsafe’ data).

Table 2 Control pins TCON and MODE

TCON	MODE	OSCILLATOR FREQUENCY
HIGH	LOW	4.332 MHz
HIGH	HIGH	8.664 MHz

The clock generator generates the internal 4.332 MHz system clock and timing signal derivatives.

Power supply and internal reset

Oscillator and system clock generator

For good performance of the bandpass and demodulator stages, the demodulator requires a crystal oscillator with a frequency of 4.332 or 8.664 MHz. The demodulator can operate with either frequency (see Table 2), so that a radio set with a microcontroller can run, in this case, with one crystal only. The demodulator oscillator can drive the microcontroller, or vice versa.

LIMITING VALUES

The demodulator has separate power supply inputs for the digital and analog parts of the device. For the analog functions an additional reference voltage (1¤2VDDA) is internally generated and available via the output pin Vref. The demodulator requires a defined reset condition. The demodulator generates automatically a reset signal after the power supply VDDA is switched on, or at a voltage-drop.

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VDD	supply voltage		0	6.5	V
Vn	voltage at pins 1 to 4, 7 to 10, and	pins 5 and 12 are	-0.5	VDD + 0.5 £ 6.5	V
	13 to 16 with respect to pins 6 and 11	connected to VDD
Ii	input current at pins 1 to 5, 7 to 11 and	pins 6 and 11 are	-10	+10	mA
	13 to 16	connected to ground
Ilu(prot)	latch-up protection current in pulsed	Tamb = -40 to +85 °C with	-100	+100	mA
	mode	voltage limiting -2 to +10 V
		Tamb = 25 °C with voltage	-200	+200	mA
		limiting -2 to +12 V
		Tamb = -40 to +85 °C	-10	+10	mA
		without voltage limiting
Tamb	ambient temperature		-40	+85	°C
Tstg	storage temperature		-65	+150	°C
Ves	electrostatic handling voltage	note 1	-4000	+4000	V
		note 2	-500	+500	V

Notes

1.Human body model (equivalent to discharging a 100 pF capacitor through a 1.5 kW series resistor).

2.Machine model (equivalent to discharging a 200 pF capacitor through a 0 W series resistor and 0.75 mH inductance).

THERMAL CHARACTERISTICS

SYMBOL	PARAMETER	CONDITIONS	VALUE	UNIT
Rth(j-a)	thermal resistance from junction to ambient	in free air	104	K/W

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