Philips saa5254 DATASHEETS

DATA SH EET

Preliminary specification

Supersedes data of July 1993

File under Integrated Circuits, IC02

1996 Nov 07

INTEGRATED CIRCUITS

SAA5254

Integrated VIP and teletext decoder

(IVT1.1X)

www.freeservicemanuals.info

1996 Nov 07 2

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

FEATURES

• Complete teletext decoder including page memory and

FASTEXT links in a 40-pin DIP package

• Automatic processing of extension packet 26 for widest

possible language decoding. All our standard language

options can be available, and language option is

readable via I

2

C-bus

• 100% hardware compatible with the SAA5244A; plug-in

replacement and extra market

• 100% hardware compatible with the SAA5244A, except

if the special OSD symbols were used with the

SAA5244A, except ROM identification number

• The device is pin-aligned with the other members of the

new Philips teletext decoder family, i.e. SAA5280 and

the SAA5249, making one hardware solution for the full

range

• Low software overhead for the control microprocessor

• Single page acquisition system

• RGB interface to standard colour decoder ICs, push-pull

output drive

• Separate text and video signal quality detectors.

DESCRIPTION

The Integrated VIP and Teletext decoder (IVT1.1X) is

designed to decode 625-line based World System Teletext

transmissions. This single-chip teletext decoder hardware

is based on the SAA5244A with which it is completely

compatible.

Like the SAA5244A the device contains all the hardware

necessary to decode the teletext, but the SAA5254 also

contains extra hardware to process the extension packet

26 characters automatically, extending the markets to

which the TV chassis can be shipped and opening the

possibility of many more language options.

ORDERING INFORMATION

QUICK REFERENCE DATA

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

SAA5254P DIP40

plastic dual in-line package; 40 leads (600 mil)

SOT129-1

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

DD

supply voltage 4.5 5.0 5.5 V

I

DD

supply current − 90 120 mA

V

sync

sync voltage amplitude 0.1 0.3 0.6 V

V

video

video voltage amplitude 0.7 1.0 1.4 V

f

XTAL

crystal frequency − 27 − MHz

T

amb

operating ambient temperature −20 − +70 °C

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1996 Nov 07 3

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

BLOCK DIAGRAM

Fig.1 Block diagram; SOT129 (DIP40).

DATA

SLICER

AND

CLOCK

REGENERATOR

TELETEXT

ACQUISITION

AND

DECODING

ANALOG

TO

DIGITAL

CONVERTER

TIMING

CHAIN

PAGE

MEMORY

I

2

C-BUS

INTERFACE

CRYSTAL

OSCILLATOR

INPUT

CLAMP

AND SYNC

SEPARATOR

DISPLAY

CLOCK

PHASE

LOCKED

LOOP

25

24

1

10

14

SDA

SCL

V

DD1

V

DD2

V

SS2

20

V

SS3

DCVBS

5

V

SS1

6

OSCOUT

OSCIN

2

3

REF

4 7 9 8 11 13 12

OSCGND BLACK IREF CVBS POL STTV/LFB

MLB207

SAA5254

VCR/FFB

DISPLAY

Y BLAN RGBREF RGB

23 19 21 18 15 to 17 22

ODD/EVENCOR

HAMMING

CHECKER

AND

PACKET 26

PROCESSING

ENGINE

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1996 Nov 07 4

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

PINNING

SYMBOL PIN DESCRIPTION

V

DD1

1 +5 V supply 1

OSCOUT 2 27 MHz crystal oscillator output

OSCIN 3 27 MHz crystal oscillator input

OSCGND 4 0 V crystal oscillator ground

V

SS1

5 0 V ground 1

REF+ 6 Positive reference voltage for the ADC. This pin should be connected to +5 V.

BLACK 7 Video black level storage pin, connected to ground via a 100 nF capacitor.

CVBS 8 Composite video input pin. A positive-going 1 V (peak-to-peak) input is required,

connected via a 100 nF capacitor.

IREF 9 Reference current input pin, connected to ground via a 27 kΩ resistor.

V

DD2

10 +5 V supply 2

POL 11 STTV/LFB/FFB polarity selection pin

STTV/LFB 12 Sync to TV output pin/line flyback input pin. Function controlled by an internal register bit

(scan sync mode).

VCR/FFB 13 PLL time constant switch/field flyback input pin. Function controlled by an internal register

bit (scan sync mode).

V

SS2

14 0 V ground 2

R 15 Dot rate character output of the RED colour information.

G 16 Dot rate character output of the GREEN colour information.

B 17 Dot rate character output of the BLUE colour information.

RGBREF 18 DC input voltage to define the output high level on the RGB pins.

BLAN 19 Dot rate fast blanking output.

V

SS3

20 0 V ground 3

COR 21 Programmable active LOW output to provide contrast reduction of the TV picture for mixed

text and picture displays or when viewing newsflash/subtitle pages; open drain output.

ODD/

EVEN 22 25 Hz output synchronized with the CVBS inputs field sync pulses to produce a

non-interlaced display by adjustment of the vertical deflection currents.

Y 23 Dot rate character output of teletext foreground colour information; open drain output.

SCL 24 Serial clock input for the I

2

C-bus. It can still be driven during power-down of the device.

SDA 25 Serial input/output data port for the I

2

C-bus; open drain output. It can still be driven during

power-down of the device.

i.c. 26 to 40 Internally connected. Must be left open-circuit in application.

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1996 Nov 07 5

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

Fig.2 Pin configuration; SOT129 (DIP40).

1

2

3

4

5

6

7

8

9

10

11

12

13

40

39

38

37

36

35

34

33

32

31

30

29

28

2714

15

16

17

18

19

20

21

22

23

24

25

26

V

DD1

OSCOUT

OSCIN

OSCGND

V

SS1

BLACK

CVBS

IREF

V

DD2

POL

STTV/LFB

R

G

B

RGBREF

BLAN

Y

SCL

SDA

i.c.

REF

V

SS3

VCR/FFB

ODD/EVEN

COR

SAA5254

MLB208

V

SS2

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1996 Nov 07 6

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

QUALITY AND RELIABILITY

This device will meet Philips Semiconductors General Quality Specification for Business group

“Consumer Integrated

Circuits SNW-FQ-611-Part E”

. The principal requirements are shown in Tables 1 to 4.

Group A

Table 1 Acceptance tests per lot

Group B

Table 2 Processability tests (by package family)

Group C

Table 3 Reliability tests (by process family)

Table 4 Reliability tests (by device type)

Notes to Tables 1 to 4

1. ppm = fraction of defective devices, in parts per million.

LTPD = Lot Tolerance Percent Defective.

FPM = fraction of devices failing at test condition, in Failures Per Million.

FITS = Failures In Time Standard.

TEST CONDITIONS REQUIREMENTS

(1)

Mechanical cumulative target < 100 ppm

Electrical cumulative target < 100 ppm

TEST CONDITIONS REQUIREMENTS

(1)

Solderability < 7% LTPD

Mechanical < 15% LTPD

Solder heat resistance < 15% LTPD

TEST CONDITIONS REQUIREMENTS

(1)

Operational life 168 hours at T

j

= 150 °C < 1500 FPM; equivalent to

< 100 FITS at T

j

=70°C

Humidity life temperature, humidity, bias

(1000 hours, 85 °C, 85% RH or

equivalent test)

< 2000 FPM

Temperature cycling performance T

stg(min)

to T

stg(max)

< 2000 FPM

TEST CONDITIONS REQUIREMENTS

(1)

ESD and latch-up ESD Human body model

2000 V, 100 pF, 1.5 kΩ

< 15% LTPD

ESD Machine model

200 V, 100 pF, 1.5 kΩ

< 15% LTPD

latch-up 100 mA, 1.5 × V

DD

(absolute maximum)

< 15% LTPD

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1996 Nov 07 7

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

CHARACTERISTICS

V

DD

=5V±10%; T

amb

= −20 to +70 °C, unless otherwise specified.

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

supply voltage (all supplies) −0.3 +6.5 V

V

I

input voltage (any input) −0.3 V

DD

+ 0.5 V

V

O

output voltage (any output) −0.3 V

DD

+ 0.5 V

I

O

output current (each output) −10 +10 mA

I

IOK

DC input or output diode current −20 +20 mA

T

amb

operating ambient temperature −20 +70 °C

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

DD

supply voltage 4.5 5.0 5.5 V

I

DD(tot)

total supply current − 90 120 mA

Inputs

CVBS

V

sync

sync voltage amplitude 0.1 0.3 0.6 V

t

d(sync)

delay from CVBS to TCS output from

STTV buffer (nominal video, average

of leading/trailing edge)

−150 0 +150 ns

∆t

d(sync)

change in sync delay between all

black and all white video input at

nominal levels

0 − 25 ns

V

video(p-p)

video input voltage amplitude

(peak-to-peak value)

0.7 1.0 1.4 V

PLL

catch

display PLL catching range ±7 −−%

Z

source

source impedance −−250 Ω

C

i

input capacitance −−10 pF

IREF

R

GND

resistance to ground − 27 − kΩ

POL

V

IL

LOW level input voltage −0.3 − +0.8 V

V

IH

HIGH level input voltage 2.0 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

C

i

input capacitance −−10 pF

www.freeservicemanuals.info

1996 Nov 07 8

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

LBF

V

IL

LOW level input voltage −0.3 − +0.8 V

V

IH

HIGH level input voltage 2.0 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

I

I

input current note 1 −1 − +1 mA

t

d(LFB)

delay between LFB front edge and

input video line sync

− 250 − ns

VCR/FFB

V

IL

LOW level input voltage −0.3 − +0.8 V

V

IH

HIGH level input voltage 2.0 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

I

I

input current note 1 −1 − +1 mA

RGBREF (note 2)

V

I

input voltage −0.3 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

I

DC

DC current −−10 mA

SCL

V

IL

LOW level input voltage −0.3 − +1.5 V

V

IH

HIGH level input voltage 3.0 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

f

SCL

clock frequency 0 − 100 kHz

t

i(r)

input rise time 10% to 90% −−2µs

t

i(f)

input fall time 90% to 10% −−2µs

C

i

input capacitance −−10 pF

Inputs/outputs

C

RYSTAL OSCILLATOR (OSCIN; OSCOUT)

f

XTAL

crystal frequency − 27 − MHz

G

v

small signal voltage gain 3.5 −−

G

m

mutual conductance f = 100 kHz 1.5 −− mA/V

C

i

input capacitance −−10 pF

C

FB

feedback capacitance −−5pF

BLACK

C

black

storage capacitor to ground − 100 − nF

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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1996 Nov 07 9

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

SDA

V

IL

LOW level input voltage −0.3 − +1.5 V

V

IH

HIGH level input voltage 3.0 − V

DD

+ 0.5 V

I

LI

input leakage current V

I

=0toV

DD

−10 − +10 µA

C

i

input capacitance −−10 pF

t

i(r)

input rise time 10% to 90% −−2µs

t

i(f)

input fall time 90% to 10% −−2µs

V

OL

LOW level output voltage I

OL

= 3 mA 0 − 0.5 V

t

o(f)

output fall time 3 to 1 V −−200 ns

C

L

load capacitance −−400 pF

Outputs

STTV

G

STTV

gain of STTV relative to video input 0.9 1.0 1.1

V

TCS

TCS voltage amplitude 0.2 0.3 0.45 V

V

DCshift

DC voltage shift between TCS output

and nominal video output

−−0.15 V

I

O

output drive current −−3.0 mA

C

L

load capacitance −−100 pF

R, G AND B

V

OL

LOW level output voltage I

OL

= 2 mA 0 − 0.2 V

V

OH

HIGH level output voltage I

OH

= −1.6 mA;

RGBREF ≤ V

DD

− 2V

RGBREF

−0.25 V

RGBREF RGBREF

+0.25 V

V

Z

o

 output impedance −−200 Ω

C

L

load capacitance −−50 pF

I

DC

DC current −−−3.3 mA

t

o(r)

output rise time 10% to 90% −−20 ns

t

o(f)

output fall time 90% to 10% −−20 ns

BLAN

V

OL

LOW level output voltage I

OL

= 1.6 mA 0 − 0.4 V

V

OH

HIGH level output voltage I

OH

= −0.2 mA;

V

DD

= 4.5 V

1.1 −− V

I

OH

= 0 mA; V

DD

= 5.5 V −−2.8 V

V

O(max)

allowed output voltage at pin with external pull-up −−V

DD

V

C

L

load capacitance −−50 pF

t

o(r)

output rise time 10% to 90% −−20 ns

t

o(f)

output fall time 90% to 10% −−20 ns

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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1996 Nov 07 10

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

Notes

1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.

Series current limiting resistors must be used to limit the input currents to ±1 mA.

2. RGBREF is the positive supply for the RGB output pins and it must be able to source the I

OH

current from the

R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.

ODD/

EVEN

V

OL

LOW level output voltage I

OL

= 1.6 mA 0 − 0.4 V

V

OH

HIGH level output voltage I

OH

= −1.6 mA V

DD

− 0.4 − V

DD

V

C

L

load capacitance −−120 pF

t

o(r)

output rise time 0.6 to 2.2 V −−50 ns

t

o(f)

output fall time 2.2 to 0.6 V −−50 ns

COR AND Y(OPEN DRAIN)

V

pu

pull-up voltage at pin −−V

DD

V

V

OL

LOW level output voltage I

OL

= 5 mA 0 − 1.0 V

C

L

load capacitance −−25 pF

t

o(f)

output fall time load resistor of

1.2 kΩ to V

DD

;

measured between

V

DD

− 0.5 and 1.5 V

−−50 ns

I

LO

output leakage current V

I

=0toV

DD

−10 − +10 µA

T

skew

skew delay between display outputs

R, G, B, COR, Y and BLAN

−−20 ns

Timing

I

2

C-BUS (see Fig.3)

t

LOW

clock LOW period 4 −− µs

t

HIGH

clock HIGH period 4 −− µs

t

SU;DAT

data set-up time 250 −− ns

t

HD;DAT

data hold time 170 −− ns

t

SU;STO

set-up time from clock HIGH to

STOP

4 −− µs

t

BUF

START set-up time following a STOP 4 −− µs

t

HD;STA

START hold time 4 −− µs

t

SU;STA

START set-up time following clock

LOW-to-HIGH transition

4 −− µs

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

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1996 Nov 07 11

Philips Semiconductors Preliminary specification

Integrated VIP and teletext decoder

(IVT1.1X)

SAA5254

Fig.3 I

2

C-bus timing.

handbook, full pagewidth

MBC764

t

BUF

t

f

t

HIGH

t

SU;DAT

t

SU;STO

t

HD;DAT

t

SU;STA

t

r

t

LOW

t

HD;STA

SDA

SCL

SDA

TIMING CHAIN

Fig.4 Display output timing (a) line rate (b) field rate.

(1) Also BLAN in character and box blanking.

handbook, full pagewidth

0 4.66

0

0

LSP

MLA662 - 1

(TCS)

16.67

41

R, G, B, Y

(1)

R, G, B, Y

(1)

display period

display period

lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)

291

312

line numbers

56.67 µs

40 µs

64 µs

(b)

(a)

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