Philips SAA4995WP-V1 Datasheet

DATA SH EET

Preliminary speciﬁcation File under Integrated Circuits, IC02

1997 Jun 10

INTEGRATED CIRCUITS

SAA4995WP

PANorama-IC (PAN-IC)

1997 Jun 10 2

Philips Semiconductors Preliminary speciﬁcation

PANorama-IC (PAN-IC) SAA4995WP

FEATURES

• Horizontal sample rate conversion in both zoom and compress direction, with a sample rate conversion factor between 0.5 and 2 (in 384 steps)

• Dynamic sample rate conversion for panorama mode display e.g. 4 : 3 material on a 16 : 9 display

• Dynamic sample rate conversion for amaronap mode display of e.g. 16 : 9 material on a 4 : 3 display

• Operates with 1fh and 2f

h

• Programmable via microcontroller SNERT (Synchronous No parity Eight bit Receive Transmit) bus.

GENERAL DESCRIPTION

The PAN-IC is an add-on IC to be used, for example, between analog-to-digital conversion and a serial (field) memory. The device performs the following tasks:

• Linear horizontal sample rate conversion in both zoom and compress direction, with a sample rate conversion factor between 0.5 and 2

• Dynamic sample rate conversion for panorama mode display of e.g. 4 : 3 material on a 16 : 9 display

• Dynamic sample rate conversion for amaronap mode display of e.g. 16 : 9 material on a 4 : 3 display.

The PAN-IC has the ability to increase the data rate from the ADC to a maximum of twice the data rate at the output. To achieve this a clock rate at twice the normal output clock rate is needed to write data to the memory. All actions to generate a lower data rate, produces disable cycles in Write Enable (WE).

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

DD

supply voltage 4.5 5 5.5 V

I

DD

supply current − 110 − mA

f

CLK

operating clock frequency −−33 MHz

T

amb

operating ambient temperature 0 − 70 °C

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

SAA4995WP PLCC44 plastic leaded chip carrier; 44 leads SOT187-2

1997 Jun 10 3

Philips Semiconductors Preliminary speciﬁcation

PANorama-IC (PAN-IC) SAA4995WP

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MGK176

37 to 44

Y

I7

to

Y

I0

WE

I

WE

O

WE

od

5 31

SECAM NOTCH

CL16

7

SNDA

34

SNCL

35

VRST

36

LINE CONTROL

SNERT BUS INTERFACE

X0rX0IX1rX1IX2rX

2I

SPL

init

notch

out-phase

in-phase

29 to 22

21 to 18

1 to 4

UI1/U

I0

and

VI1/V

I0

Y

O7 to

Y

O0

VO0/V

O1

and

UO0/U

O1

CL16

CLK

∆Y∆UV

CL16

CLK

8 9

TEST

SCANIN

10 12

V

DD1

GND1

15 16

V

DD2

GND2

33 30

V

DD3

GND3

6 32

V

DD4

GND4

CL16 CLK

CLK

MUX

notch

SAA4995WP

VPD

FRONT-END

VPD

BACK-END

VPD

FRONT-END

VPD

BACK-END

17

14

T1 T0

13 11

INTEGRATOR

DTO

INTEGRATORMUX

C

2

C

0

'0'

C

1

C1

C0

C2

+

1997 Jun 10 4

Philips Semiconductors Preliminary speciﬁcation

PANorama-IC (PAN-IC) SAA4995WP

PINNING

SYMBOL PIN DESCRIPTION

U

I1

1 U input bit 1

U

I0

2 U input bit 0

V

I1

3 V input bit 1

V

I0

4 V input bit 0 CL16 5 half system clock V

DD4

6 supply voltage 4 WE

I

7 write enable input TEST 8 test mode switch SCANIN 9 input for scan chain V

DD1

10 supply voltage 1 T0 11 test mode switch 0 GND1 12 ground 1 T1 13 test mode switch 1 WE

od

14 write enable odd samples V

DD2

15 supply voltage 2 GND2 16 ground 2 WE

O

17 write enable output V

O0

18 V output bit 0 V

O1

19 V output bit 1 U

O0

20 U output bit 0 U

O1

21 U output bit 1 Y

O0

22 luminance output bit 0 Y

O1

23 luminance output bit 1

Y

O2

24 luminance output bit 2

Y

O3

25 luminance output bit 3

Y

O4

26 luminance output bit 4

Y

O5

27 luminance output bit 5

Y

O6

28 luminance output bit 6

Y

O7

29 luminance output bit 7 GND3 30 ground 3 CLK 31 system clock GND4 32 ground 4 V

DD3

33 supply voltage 3 SNDA 34 data input from interface

SNERT bus

SNCL 35 clock input from interface

SNERT bus

VRST 36 reset input in the vertical

blanking interval

Y

I7

37 luminance input bit 7 Y

I6

38 luminance input bit 6 Y

I5

39 luminance input bit 5 Y

I4

40 luminance input bit 4 Y

I3

41 luminance input bit 3 Y

I2

42 luminance input bit 2 Y

I1

43 luminance input bit 1 Y

I0

44 luminance input bit 0

SYMBOL PIN DESCRIPTION

1997 Jun 10 5

Philips Semiconductors Preliminary speciﬁcation

PANorama-IC (PAN-IC) SAA4995WP

Fig.2 Pin configuration.

handbook, full pagewidth

12 13 14 15 16 17

7 8

9 10 11

39 38 37 36 35 34 33 32 31 30 29

18

19

20

21

22

23

24

25

26

27

28

6

5

4

3

2

1

44

43

42

41

40

SAA4995WP

MGK175

Y

I5

Y

I6

Y

I7

VRST

SDNA V

DD3

GND4 CLK GND3 Y

O7

WE

I

TEST

SCANIN

V

DD1

T0

GND1

WE

od

V

DD2

WE

O

SNCL

CL16

VI0VI1UI0UI1Y

I0

YI2YI3Y

I4

V

DD4

Y

I1

V

O1UO0UO1YO0YO1YO2

YO4YO5Y

O6

V

O0

Y

O3

T1

GND2

FUNCTIONAL DESCRIPTION

The PAN-IC is an add-on IC to be used, for example, between analog-to-digital conversion and a serial (field) memory. The device performs the following tasks:

• Linear horizontal sample rate conversion in both zoom and compress direction, with a sample rate conversion factor between 0.5 and 2

• Dynamic sample rate conversion for panorama mode display of e.g. 4 : 3 material on a 16 : 9 display

• Dynamic sample rate conversion for amaronap mode display of e.g. 16 : 9 material on a 4 : 3 display.

The PAN-IC has the ability to increase the data rate from the ADC (maximum 16 MHz in a 16/32 MHz concept) to a maximum of twice the data rate. For this, a 32 MHz clock rate is needed to write to the memory. All actions to generate a lower data rate produces disable cycles in write enable.

In panorama and amaronap modes, the sample rate conversion factor is modulated along the video line.

In the centre of the line a high quality compression (e.g. with a factor

4

⁄3) has to be made. Towards the sides of the

line, more and more expansion and compression respectively is made. The sample rate conversion factor over a line will have a bathtub shape, with parameters illustrated in Fig.3:

• X0l and X0r, where in-between a constant data rate is maintained (area I) and starting points from where a curve can be programmed for its 2nd derivative (in areas II and V)

• X1l and X1r, points from where a new curve can be programmed for its 2nd derivative (for areas III and IV)

• X2l corresponds to the first sample in the output data stream, defined by start of WE

I

• X2r corresponds to the last sample in the output data stream, defined by the programmed number of samples

• C1, which controls the second derivatives of the data rate in areas II and V

• C2, which controls the second derivatives of the data rate in areas III and IV.