INTEGRATED CIRCUITS
DATA SH EET
SAA1305T
On/off logic IC
Product specification
Supersedes data of 1998 Sep 04
2004 Jan 15
Philips Semiconductors Product specification
On/off logic IC SAA1305T
FEATURES
• 8 accurate Schmitt trigger inputs with clamp circuits
• Very low quiescent current
• Reset generator circuit
• Changed information output
• On/offoutputtocontrolaregulator ICwhichsuppliesthe
microcontroller
• 32.768 kHz RC oscillator and/or a 32.768 kHz crystal
oscillator
• No delayed reset needed (start-up behaviour oscillator
fixed by internal logic)
• Watchdog timer function
• Blinking LED oscillator with drive circuit for LED
• Watch function.
TheSAA1305Tcanreplaceanexistingon/offlogicbuilt-up
with discrete components.
The SAA1305T contains 8 inputs with accurate Schmitt
triggers and clamp circuits. The main function of this IC is
an intelligent I/O expander with 2 modes of operation:
1. Normal I/O expander: the microcontroller (master) is
running and the SAA1305T acts like a slave.
2. Sleepmodeofthetotalapplication:themicrocontroller
is stopped and the SAA1305T acts like a master.
During an event, the microcontroller is awakened.
GENERAL DESCRIPTION
TheSAA1305Tis an on/off logic IC, intended for use in car
radios to interface between a microcontroller and various
input signals such as ignition, low supply detection, on/off
key and external control signals.
I2C-bus (400 kHz). Extra functions of the SAA1305T are:
• LED blinker circuit
• One-day watch
• Watchdog timer.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
The communication with the IC is performed via the
V
DD
I
q
f
SCL(max)
T
vj
supply voltage operating 4.5 5.0 5.5 V
quiescent supply current VDD= 5 V; standby mode − 130 200 µA
maximum SCL clock frequency −−400 kHz
virtual junction temperature −−150 °C
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
SAA1305T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
2004 Jan 15 2
Philips Semiconductors Product specification
On/off logic IC SAA1305T
BLOCK DIAGRAM
handbook, full pagewidth
1
D0
D1
D2
D3
D4
D5
D6
D7
SDA
SCL
2
3
4
NEW
5
LATCH
6
7
8
18
20
INTERFACE
LED DRIVER
OLD
LATCH
I2C-BUS
COMPARATOR MASK
SAA1305T
STATUS
SUPPLY
WATCH TIMER
ALARM TIMER
OSCILLATOR
RESET
GENERATOR
VL TIMER
WATCHDOG
TIMER
ERROR
COUNTER
24
CHI
23
RP
9
ON/OFF
12
TS
11
WD
LED
RES
21
10
V
SS
V
DD
16
17
XTAL2
14
OSC2
OSC1
19
XTAL1
22
13
15
TST
MGR200
Fig.1 Block diagram.
2004 Jan 15 3
Philips Semiconductors Product specification
On/off logic IC SAA1305T
PINNING
SYMBOL PIN DESCRIPTION
D0 1 input D0; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D1 2 input D1; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D2 3 input D2; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D3 4 input D3; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D4 5 input D4; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D5 6 input D5; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D6 7 input D6; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
D7 8 input D7; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI
ON/OFF 9 on/offoutput (off is active LOW); for controlling the enable of a separate power supply IC from the
microcontroller
RES 10 reset input (active LOW); for power-on or system reset for the IC
WD 11 Watchdog timer trigger input signal from the microcontroller
TS 12 timer start input (active LOW); to trigger the VL (is an undervoltage) timer (250 ms)
TST 13 test purpose input; must be connected to V
OSC1 14 RC oscillator output (32.768 kHz)
OSC2 15 RC oscillator input (32.768 kHz)
XTAL1 16 crystal oscillator output (32.768 kHz)
XTAL2 17 crystal oscillator input (32.768 kHz)
SDA 18 I2C-bus serial data input/output; interface to the microcontroller
V
SS
19 ground supply (0 V)
SCL 20 I2C-bus serial clock line input; interface to the microcontroller
V
DD
21 supply voltage; 5 V ±10% with a current consumption of maximum 200 µA (without LED current)
LED 22 light emitting diode output; to drive a LED up to 20 mA (high side switch to VDD)
RP 23 reset pulse output
CHI 24 change information output (active LOW); note 1
SS
Note
1. The following results in a LOW-level voltage on pin CHI:
a) A change on any of the (non-masked) inputs D0 to D7.
b) A device reset.
c) An alarm or VL timer event.
d) An oscillator fault or a failed I2C-bus read sequence after a change information signal.
e) A failed Watchdog timer trigger sequence.
2004 Jan 15 4
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Reset time
The pulse time on pin RP is selectable via an I2C-bus
handbook, halfpage
D0
D1
D2
D3
D4
D5
D6
D7
ON/OFF
RES
WD
TS
1
2
3
4
5
6
7
8
9
10
11
12
SAA1305T
MGR201
15
14
13
24
23
22
21
20
19
18
17
16
CHI
RP
LED
V
DD
SCL
V
SS
SDA
XTAL2
XTAL1
OSC2
OSC1
TST
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Figure 1 shows the block diagram for the SAA1305T.
Details are explained in the subsequent sections.
Watch and alarm functions
An internal RAM (watch register) counts automatically the
seconds for one-day (one-day reset also automatically).
The watch register can be set and read from the I2C-bus.
An alarm function is possible via a second RAM (alarm
register) and is programmable via the I2C-bus. The alarm
timer triggers pin CHI and if enabled the reset pulse on
pin RP. After a device reset the content of the alarm
register is FFFFH (alarm function is disabled) and the
content of watch register is 0000H.
LED control
The I2C-bus interface control (see Table 10) for the LED
contains:
• Two function control bits
• Two control bits for the blink LED frequency
• Two control bits for the blink LED duration time.
command; see Table 8. The default value after Power-on
reset is the longest time (20 ms). Selectable pulse times
via the control register are: 1, 5, 10 and 20 ms.
Withtherisingedgeofthereset pulse all inputs, except the
Watchdog timer and VL timer, are disabled until the
I2C-bus command ENABLE-RESET. Each pulse on
pin RP resets the internal I2C-bus interface.
On/off
The output signal on pin ON/OFF remains HIGH after a
trigger event. Trigger sources are:
• Alterations on any of the inputs D0 to D7
• An impedance detection
• A device reset
• A VL (is an undervoltage) timer or alarm timer event
• An oscillator fault.
In the event of a five time failed Watchdog timer trigger or
missedI2C-busreadsequence(afterachangeinformation
indication), an internal logic circuit will reset pin ON/OFF
and set the IC in the standby mode. It is also possible to
control pin ON/OFF during the run mode via an I2C-bus
command (see Table 8, bit 1). In principal two stable IC
modes are possible; see Fig.3:
1. Standby mode: an oscillator fault and the following IC
function groups can trigger a reset pulse to enter the
run mode;
a) Watch (alarm timer).
b) Supply (device reset).
c) Inputs D0 to D7 (a change on any of these inputs
or an impedance detection).
The Watchdog timer and the VL timer are disabled in
the standby mode.
2. Run mode: only the Watchdog timer (WD), an
oscillator fault, a missed I2C-bus communication and
the reset input (RES) can trigger a reset pulse. It is
possible to enter the standby mode via control register
bit 0; see Table 8.
The dynamic mode or wait mode is possible but can only
be started from the run mode (see Section “VL timer”).
All bits are combined within the LED register.
2004 Jan 15 5
Philips Semiconductors Product specification
h
On/off logic IC SAA1305T
andbook, full pagewidth
RES = HIGH
RESET
RES = LOW
(1) See Section “Run mode entries”.
(2) See Section “Run mode events”.
(3) Possible events are: alterations on any of the inputs D0 to D7, an impedance detection, an alarm timer event and an oscillator fault.
(4) See Section “Standby mode entries”.
(5) Not available.
(6) See Section “Wait mode entries”.
entry
event
SAA1305T
OPERABLE
I2C-bus error counter = 5
Watchdog timer error counter = 5
RUN
(1)
(2)
VL timer start
VL timer end
input D0 = logic 1
oscillator fault
(3)
; CHI
event
control register bit 0
entry
event
WAIT
(6)
(5)
STANDBY
(4)
entry
(5)
event
MGR202
Fig.3 State diagram for IC modes.
RUN MODE ENTRIES
• Reset Watchdog timer error counter
• Enable Watchdog timer
• Enable VL timer function
• Generate reset pulse
• Disable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
WAIT MODE ENTRIES
• Disable Watchdog timer
• Reset I2C-bus error counter
• Reset Watchdog timer error counter
• Start VL timer
• Set pin CHI in 3-state
• Set pin ON/OFF to LOW (OFF is active).
• Reset I2C-bus interface
• Set pin CHI to LOW (LOW = active)
• Set pin ON/OFF to HIGH (ON is active).
STANDBY MODE ENTRIES
• Disable Watchdog timer
• Reset Watchdog timer error counter
RUN MODE EVENTS
• I2C-bus read and write commands
• Watchdog timer reset
• Missed I2C-bus communication after a (CHI) change
information signal
• Oscillator fault.
• Reset I2C-bus error counter
• Disable VL timer function
• Enable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
• Set pin ON/OFF to LOW (OFF is active)
• Set pin CHI in 3-state.
2004 Jan 15 6
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Serial I/O
The hardware of the I2C-bus interface (slave) operates
with a maximum clock frequency of 400 kHz.
Inputs
Pins D0 to D7 are connected to latches (new register).
Each latch contains and stores the input change until the
read out via the I2C-bus (read out of new register).
A second register (old register, latches) contains the input
situation before a ‘reset pulse’ signal or HIGH-to-LOW
transition of pin CHI. After a level change on any of the
inputs D0 to D7 (content of new register into ‘old’ register),
pin CHI will indicate this event. Reading the ‘old’ register
has no influence on any latch content. Reading the new
register will shift the content into the old register. During
the I2C-bus read sequence of the new register the latch
content will be shifted into the corresponding old latch and
afterwards the new latches are enabled until the next
change on this input. The functions of the inputs D0 to D7
are shown in Table 1.
Table 1 Input logic levels and functions
INPUT
D7 X − X −−
D6 X − X −−
D5 X − X −−
D4 − XX−−
D3 − X −−−
D2 − X −−−
D1 X −−−X
D0 X −−X −
SCHMITT
TRIGGER INPUT
SPECIAL INPUT MASKABLE
Due to the fact, that a ‘reset pulse’ signal or a ‘change
information’ signal are also possible via the Watchdog
timer, VLtimer, alarm timer, impedance detection,
oscillatorfaultoraftera device reset, the information about
these different events is also available via corresponding
bits within the status register; see Table 5.
A status I2C-bus read sequence resets the status register
and pin CHI. Only after a change on any of the inputs
D0 to D7, an I2C-bus read sequence of the status register,
old register and new register is it necessary to reset
pin CHI. The inputs D4 to D7 are maskable via the
I2C-bus; see Table 8. All masked inputs (defined via the
control register) are blocked to trigger pins CHI and RP.
During the disable phase of the masked inputs the
corresponding bits within the old and new registers will be
continuously refreshed with the actual input level.
VL TIMER
INTERRUPT
IMPEDANCE
DETECTION
2004 Jan 15 7
Philips Semiconductors Product specification
On/off logic IC SAA1305T
IMPEDANCE DETECTION
Input D1 is a normal input with comparable behaviour like
the other seven inputs. The only difference is an additional
internal exclusive-NOR (EXNOR) connected between the
two comparator outputs for high and low detection;
see Fig.4. The EXNOR signal indicates, in combination
with a special external circuit on input D1, a voltage of
1
⁄2VDD on this input.
The simple input description for impedance detection is
probably not the real solution, but helps to explain the
function. Input D1 can be used as a normal input and for
impedance detection as described in Table 2. For normal
use the output Q acts like every other input, but for
impedance detection the EXNOR output S is also
important.Output Sislinkedtothe status register bit 6 and
indicates the1⁄2VDD; see Table 5.
10 kΩ
5 V12 V
100 kΩ
input D1
handbook, full pagewidth
ignition
key
Between detection and indication via the status register
bit 6, a delay time is integrated (programmable via the
impedance register bits 1 and 0; see Table 15). When the
1
⁄2VDD value is detected the EXNOR output will be set to
logic 1 (active) and after the programmed delay time the
statusregisterbit 6willbesettologic 1(active).Thisevent
will also be indicated via pin CHI and (if enabled) pin RP.
The impedance information (bit 6 is active) within the
status register is present until the I2C-bus status is read.
With the disappearance of the impedance information no
further actions will be generated. Every impedance signal
change during the delay time will restart the delay time.
However an impedance detection is only possible in the
event of a stable signal, at least for the programmed delay
time. Setting the status register bit 6 with a repetition time
which equals the ‘impedance delay time’ as long as
input D1 stays in high-impedance state is implemented.
O1
3.5 V
S
R
Q
100 kΩ
1.5 V
O2
S
MGR203
Fig.4 Simple input description for impedance detection.
Table 2 Logic levels for impedance detection
IGNITION KEY O1 O2 Q S
12V 1010
Open-circuit (VI= 2.5 V) 0 0 0 or 1 1
Ground (VI<1.5V) 0100
2004 Jan 15 8
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Watchdog timer
An internal Watchdog timer is active after each reset pulse
output and can be triggered via pin WD. In the event of a
not specified pulse, a delayed or missing trigger pulse, a
reset on pin RP will be the immediate reaction.
handbook, halfpage
RP
WD
(1) In the event of a not specified, a delayed or missing trigger signal, a reset on pin RP will be the immediate reaction.
(2) The maximum time until signal change for first Watchdog timer is 500 ms.
(3) The time until next signal change is minimum 200 ms and maximum 300 ms.
(1)
(2)
AftertheHIGH-to-LOWtransitionoftheresetpulseoutput,
the first transition change within 500 ms on pin WD will be
detected as the first trigger from the microcontroller. The
timing diagram for the Watchdog timer trigger signal is
shown in Fig.5.
(3)
MGR220
Fig.5 Watchdog timer trigger timing.
Oscillators
Two oscillator types are built-in, a RC oscillator (designed
for 32.768 kHz) and a crystal oscillator (32.768 kHz), both
with separate pins. For a proper device function an
oscillator control circuit is integrated. This circuit
supervises the oscillator function and creates a reset and
oscillator restart in the event of an oscillator failure.
Intheevent of an oscillator fault, the event will be indicated
after a restart via the status register bit 5. During the
oscillator failure phase some outputs remain at a defined
level as shown in Table 3.
The RC oscillator accuracy is 5%.
When operating with the RCoscillator, pin XTAL2 must be
connected to VDDor VSS to minimize the quiescent
current. When operating with the crystal oscillator
pin OSC2 must be connected to VSSor VDD.
VL timer
A built-in timer, which can be started with a HIGH-to-LOW
transition on pin
TS, triggers, after 250 ms, pins RP
and CHI and sets pin ON/OFF. The VL timer starts only
once after a valid start condition. Default state after a
Power-on reset is not active. A VL timer start resets the
Watchdog timer. During run time of the V
timer is
L
ON/OFF = LOW, CHI = 3-state and the Watchdog timer is
disabled.
Pin TS is only active during the run mode. During run time
of the VL timer the IC remains in the wait mode. Only a
HIGH-level signal on input D0 can stop the VLtimer in the
same way as after 250 ms. In the event of an oscillator
fault the IC also enters the run mode but without an
influence on the status register bit 2. During the wait mode
an influence of the status register via other sources (e.g.
timer and inputs) is possible, but a transition from wait
mode to run mode is only possible as described above.
2004 Jan 15 9
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Power-on or system reset
Theresetinput (pin RES) is of the CMOS input levels type.
During a LOW level on pin RES the outputs are as shown
in Table 3 for RES = LOW.
Table 3 Logic levels for the reset input and oscillator failure
PIN RES=LOW RES = HIGH OSCILLATOR FAILURE
RP HIGH HIGH (voltage on VDD)
3-state [after a defined time (maximum reset time)]
ON/OFF LOW HIGH LOW
LED LOW LOW LOW
SDA 3-state 3-state (receiving mode if RP = LOW) 3-state
CHI 3-state LOW (information for microcontroller) LOW
Table 4 Defined condition after reset for the registers; RES = HIGH
REGISTER CONTENTS
Status register 02 (HEX)
New register all input latches are enabled
Old register same levels as corresponding inputs during falling edge on pin RES
Control register 03 (HEX)
LED register 04 (HEX)
Alarm register FFFF (HEX); see Table 7
Watch register 0000 (HEX)
Impedance register 03 (HEX)
After the system reset (rising edge on pin RES) all internal
registers are in a defined condition (see Table 4) and the
outputs are as shown in Table 3 for RES = HIGH.
3-state
2004 Jan 15 10
Philips Semiconductors Product specification
On/off logic IC SAA1305T
I2C-BUS INTERFACE COMMANDS
I2C-bus communication is only possible in the run mode.
Read mode operations
Only the sequential read mode is possible. The IC starts
after every device select (code 48) to output data 1.
However, in this event the master does acknowledge the
data output and the IC continues to output the next data in
sequence; see Figs 6 and 7.
andbook, full pagewidth
START
condition
acknowledge
S PDEVICE SELECT DATA 1
R/W
acknowledge acknowledge no acknowledge
To terminate the stream of bytes, the master must not
acknowledge the last byte output, but must generate a
STOP condition. The output data is from consecutive byte
addresses, with the internal byte address counter
automatically incremented after each byte output. In the
event of higher read sequences than available data bytes,
the 7th and 8th bit content are 0 and the address counter
will generate a wrap around (output at address 0).
The definitions of the bits are given in Tables 5, 6 and 7.
DATA N
STOP
condition
MGR221
Fig.6 I2C-bus read mode sequence.
handbook, full pagewidth
START DEVICE SELECT STATUS OLD NEW WATCH
byte 0 1 2 3, 4, 5, 6, 7
Fig.7 I2C-bus read data sequence.
2004 Jan 15 11
STOP
MGR222
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Table 5 Definition of the status register bits
BIT DESCRIPTION
7 a logic 1 indicates a change on any of the inputs D7 to D0
6 a logic 1 indicates a1⁄2VDD on input D1 (impedance detection)
5 a logic 1 indicates a reset after an oscillator fault
4 a logic 1 indicates a reset caused by a missed I2C-bus communication after a change information signal
(no communication between two Watchdog timer trigger pulses)
3 a logic 1 indicates a timer alarm
2 a logic 1 indicates a VL timer reset
1 a logic 1 indicates a device reset (via pin RES)
0 a logic 1 indicates a Watchdog timer reset
Table 6 Definition of the old and new register bits
BIT DESCRIPTION
7 data of input D7
6 data of input D6
5 data of input D5
4 data of input D4
3 data of input D3
2 data of input D2
1 data of input D1
0 data of input D0
Table 7 Definition of the watch and alarm register bits (read mode); note 1
ADDRESS
(HEX)
2 4 to 0 hours of alarm 0 to 31 31
3 5 to 0 minutes of alarm 0 to 63 63
4 5 to 0 seconds of alarm 0 to 63 63
5 4 to 0 hours of watch 0 to 23 0
6 5 to 0 minutes of watch 0 to 59 0
7 5 to 0 seconds of watch 0 to 59 0
Note
1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.
DATA BITS DESCRIPTION VALUES DEFAULT
2004 Jan 15 12
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Write mode operations
After a START condition the master sends a device select
code with the R/W bit reset to logic 0; see Fig.8. The IC
acknowledge this and waits for the address byte. After the
address the master sends the corresponding data, which
is acknowledged by the IC. It is possible to continue with
the data transfer, each byte is acknowledged by the IC.
The internal byte address counter is incremented after
each data transmission.
handbook, full pagewidth
S PDEVICE SELECT ADDRESS
START
condition
acknowledge
R/W
acknowledge acknowledge acknowledge acknowledge
The transfer is terminated when the master generates a
STOPcondition. In the event of a wrong address decoding
the IC sends a no acknowledge signal and ignores all
following data.
Figure 9 shows the sequence for write data mode. Both
alarm and watch registers consist of 3 bytes. The first byte
(2 and 5) is the most significant byte. The definitions of the
bits are given in Tables 8, 10, 14 and 15.
DATA 1 DATA N
MGR223
STOP
condition
handbook, full pagewidth
Fig.8 I2C-bus write mode sequence.
START DEVICE SELECT ADDRESS CONTROL LED ALARM WATCH IMPEDANCE
byte 0 1 2, 3, 4 5, 6, 7 8
Fig.9 I2C-bus write data sequence.
STOP
MGR224
2004 Jan 15 13
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Table 8 Definition of the control register bits
BIT DESCRIPTION
7 part of the mask register; corresponds to input D7; a logic 1 disables input D7 (no influence on pin CHI)
6 part of the mask register; corresponds to input D6; a logic 1 disables input D6 (no influence on pin CHI)
5 part of the mask register; corresponds to input D5; a logic 1 disables input D5 (no influence on pin CHI)
4 part of the mask register; corresponds to input D4; a logic 1 disables input D4 (no influence on pin CHI)
3 content of bits 3 and 2 corresponds with the pulse width of the reset pulse output; see Table 9
2
1 control bit for pin ON/OFF; a logic 0 sets pin ON/OFF to VSS; a logic 1 sets pin ON/OFF to V
0 control bit (ENABLE-RESET) for the IC modes; only setting a logic 0 is possible; standby mode with disabled
Watchdog timer, enabled reset generation, ON/OFF = LOW and CHI = 3-state; with the rising edge of the
reset pulse output the IC enters the run mode with enabled Watchdog timer, disabled reset generation,
ON/OFF = HIGH (but controllable via control register bit 1) and CHI = HIGH (is active, not in 3-state)
DD
Table 9 Pulse width of the reset pulse output
BIT 3 BIT 2 PULSE WIDTH (ms)
00 20
01 10
10 5
11 1
Table 10 Definition of the LED register bits
BIT DESCRIPTION
7 bits 7 and 6 are function control bits;
see Table 11
6
5 no function
4 reset I2C-bus error counter
3 bits 3 and 2 are control bits for the blink LED
frequency (output LOW time); see Table 12
2
1 bits 1 and 0 are control bits for the blink LED
duration time; see Table 13
0
Table 11 Function control bits
BIT 7 BIT 6 FUNCTION
0 0 LED output switched to ground
0 1 blink function according the LED
register bits 0 to 3
1 0 LED output switched to V
DD
1 1 blink function according the LED
register bits 0 to 3
Table 12 Control bits for the blink LED frequency
BIT 3 BIT 2 FREQUENCY
0 0 2 Hz (0.5 s)
0 1 1 Hz (1 s)
1 0 0.67 Hz (1.5 s)
1 1 0.5 Hz (2 s)
Table 13 Control bits for the blink LED duration time
BIT 1 BIT 0 DURATION TIME (ms)
00 20
01 30
10 40
11 50
2004 Jan 15 14
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Table 14 Definition of the watch and alarm register bits (write mode); notes 1, 2 and 3
ADDRESS (HEX) DATA BITS DESCRIPTION VALUES DEFAULT
2 4 to 0 hours of alarm 0 to 31 31
3 5 to 0 minutes of alarm 0 to 63 63
4 5 to 0 seconds of alarm 0 to 63 63
5 4 to 0 hours of watch 0 to 23 0
6 5 to 0 minutes of watch 0 to 59 0
7 5 to 0 seconds of watch 0 to 59 0
Notes
1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.
The alarm is also disabled if hours >23 or minutes >59 or seconds >59.
2. There are several attention points if a senseless time is written to the alarm register, for example:
a) Write 25 to address 2; data bits 4 to 0 = 25 ⇒ hours = 25 (alarm disabled).
b) Write 70 to address 3; data bits 5 to 0 = 6 ⇒ minutes = 6.
c) Write 81 to address 4; data bits 5 to 0 = 17 ⇒ seconds = 17.
3. There are several attention points if a senseless time is written to the watch register, for example:
a) Write 25 to address 5; data bits 4 to 0 = 25 ⇒ hours = 23 (limited).
b) Write 70 to address 6; data bits 5 to 0 = 6 ⇒ minutes = 6.
c) Write 81 to address 7; data bits 5 to 0 = 17 ⇒ seconds = 17.
Table 15 Definition of the impedance register bits
BIT DESCRIPTION
7 no function
6 no function
5 no function
4 no function
3 no function
2 enable or disable bit for the impedance detection
0 = inactive (1⁄2VDD detection without influence on the status register)
1 = active (1⁄2VDD detection with influence on the status register)
1 bits 1 and 0 are control bits for the impedance detection delay time; see Table 16
0
Table 16 Control bits for the impedance detection delay time
BIT 1 BIT 0 DELAY TIME
0 0 100 ms
0 1 250 ms
1 0 500 ms
11 1s
2004 Jan 15 15
Philips Semiconductors Product specification
On/off logic IC SAA1305T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD
I
q
V
I(n)
V
O(n)
f
SCL(max)
T
vj
T
stg
T
amb
supply voltage operating −0.5 +6.5 V
quiescent supply current VDD= 5 V; standby mode − 200 µA
input voltage on pins f
=32kHz
osc
SDA, SCL, RES, WD and TS −0.5 +6.5 V
D0 to D7 with 5 kΩ series resistor −0.5 +17 V
output voltage on pins CHI, RP,
f
=32kHz −0.5 +6.5 V
osc
ON/OFF and LED
maximum SCL clock frequency − 400 kHz
virtual junction temperature − 150 °C
storage temperature −65 +150 °C
ambient temperature −40 +85 °C
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to
in free air 78 K/W
ambient
CHARACTERISTICS
VDD=5V; T
=25°C; unless otherwise specified.
amb
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
DD
I
q
supply voltage operating 4.5 5.0 5.5 V
quiescent supply current note 1 − 130 200 µA
Inputs
PINS D0 TO D7
V
i(clamp)
I
clamp(h)
I
LI
input clamping voltage I
high clamping current VD0to VD7>V
= 2 mA 5.5 6.5 8.3 V
clamp
DD
−−2mA
input leakage current VDx=5V −−1 µA
SCHMITT TRIGGER INPUTS FOR PINS D0, D1 AND D5 TO D7
V
th(r)
V
th(f)
V
hys
rising threshold voltage 3.4 3.5 3.6 V
falling threshold voltage 1.4 1.5 1.6 V
hysteresis voltage 1.8 2 2.2 V
SPECIAL INPUTS FOR PINS D2, D3 AND D4
V
th(r)
V
th(f)
V
hys
rising threshold voltage 2.4 2.5 2.6 V
falling threshold voltage 1.7 1.8 1.9 V
hysteresis voltage 0.5 0.7 0.9 V
2004 Jan 15 16
Philips Semiconductors Product specification
On/off logic IC SAA1305T
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
PIN SCL
V
IL
V
IH
I
LI
f
SCL(max)
t
i(r)
t
i(f)
C
i
PINS RES, WD AND TS
V
IL
V
IH
I
LI
C
i
Inputs/outputs
LOW-level input voltage 0 − 1.5 V
HIGH-level input voltage 3 − V
DD
V
input leakage current Vi= 5 V; with output off −−1 µA
maximum SCL clock frequency −−400 kHz
input rise time − tbf −µs
input fall time − tbf −µs
input capacitance −−7pF
LOW-level input voltage 0 − 0.2V
HIGH-level input voltage 0.8V
DD
− V
DD
DD
V
V
input leakage current Vi= 5 V; with output off −−1 µA
input capacitance −−7pF
PIN SDA
V
V
V
I
t
t
t
C
C
IL
IH
OL
off
i(r)
i(f)
o(f)
i
L
LOW-level input voltage 0 − 1.5 V
HIGH-level input voltage 3 − V
DD
LOW-level output voltage IOL= 3 mA 0 − 1V
3-state off current Vi=5or0V −−10 µA
input rise time −−2 µs
input fall time −−2 µs
output fall time 1 V ≤ Vi≤ 3V −−200 ns
input capacitance −−7pF
load capacitance −−400 pF
CRYSTAL OSCILLATOR; notes 2 and 3; see Fig.10
P
C
R
f
dr
L
s
osc
drive level power − 10 −µW
load capacitance − 7to12 − pF
series resistance − 40 − kΩ
oscillator frequency − 32.768 − kHz
Q Q factor − 40000 100000
RC OSCILLATOR; note 4; see Fig.11
C
osc
R
osc
f
osc
f
clk(min)
oscillator capacitance 100 300 − pF
oscillator resistance 5 90 − kΩ
oscillator frequency C
= 300 pF;
osc
R
=90kΩ; note 5
osc
− 32.768 − kHz
minimum clock frequency note 6 −−10 kHz
V
2004 Jan 15 17
Philips Semiconductors Product specification
On/off logic IC SAA1305T
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Outputs
IN LED
P
V
OL
V
OH
I
OH
PIN ON/OFF
V
OL
V
OH
PIN CHI
V
OL
I
LO
PIN RP
V
OH
I
off
Notes
1. The IC is programmedto standby mode via the I2C-bus command, no LEDis connected, no I2C-bus communication,
one oscillator is running and the Watchdog timer is disabled.
2. When running on crystal oscillator, the input of the RC oscillator must be connected to VDDor VSS.
3. Preferable crystal types: MU206S and DMX38.
4. When running on RC oscillator, the input of the crystal oscillator must be connected to VDDor VSS.
LOW-level output voltage IOL=16mA 0 − 0.5 V
HIGH-level output voltage IOL=16mA 4 − V
DD
V
HIGH-level output current VOH>1V −20 −−mA
LOW-level output voltage IOL= 4 mA 0 − 0.5 V
HIGH-level output voltage IOH= −600 µA 4.8 − V
IOH= −4mA 4 − V
DD
DD
V
V
LOW-level output voltage IOL= 200 µA0− 0.5 V
output leakage current VOH=V
DD
HIGH-level output voltage IOH= −4mA 4 − V
3-state off current Vo=VDDor V
SS
−−5 µA
DD
V
−−5 µA
5. The RC oscillator frequency
The RC oscillator frequency tolerance
f
osc
0.87
=
-----------------------------R
oscCosc
∆ R
f
×
osc
2
∆
osc
C
∆
++=
6. Below this maximum value the IC will detect an oscillator fault.
2004 Jan 15 18
osc
2
0.05 f
×()
osc
2
Philips Semiconductors Product specification
On/off logic IC SAA1305T
APPLICATION CIRCUITS
andbook, full pagewidth
R1
33 kΩ
R2
20 kΩ
input D4
input D7
(1) Crystal oscillator type MU206S (32.768 kHz).
1
R3
25 kΩ
2
3
4
5
6
7
8
18
20
R5
1 kΩ
10
SAA1305T
21
15 pF
C1
16
17 14 15 131922
(1)
Fig.10 Application circuit for crystal oscillator.
C2
15 pF
MGR204
V
DD
R4
1 kΩ
24
23
9
12
11
handbook, full pagewidth
R1
33 kΩ
R2
20 kΩ
input D4
R3
25 kΩ
1
2
3
4
5
6
7
8
18
20
R5
1 kΩ
10
SAA1305T
21
input D7
Fig.11 Application circuit for RC oscillator.
2004 Jan 15 19
16 17 14 15 131922
90 kΩ
V
DD
R4
4.7 kΩ
24
23
9
12
11
R
osc
C
osc
300 pF
MGR205
Philips Semiconductors Product specification
On/off logic IC SAA1305T
ON/OFF LOGIC WITH MICROCONTROLLER IN POWER-DOWN STATE
handbook, full pagewidth
handbook, full pagewidth
14 V
5 V
CONTINUOUS
REGULATOR
14 V
RES
5 V
RES
D0 to D7
21
10
1 to 8
SAA1305T
9
23
11
24
18
20
ON/OFF
RP
WD
CHI
SDA
SCL
Fig.12 Block diagram with continuous microcontroller supply.
Dx
MICRO-
CONTROLLER
MGR206
ON/OFF
(1) Level not defined.
CHI
RP
WD
RP
ON/OFF
CHI
WD
(1) (1)
MGR207
a. First power-on. b. Normal switch-on.
Fig.13 Timing diagrams with continuous microcontroller supply.
2004 Jan 15 20
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Scenarios for ON/OFF logic with microcontroller in power-down state
handbook, full pagewidth
5 V continuous
regulator
220 ms (hardware specific)
SAA1305T microcontroller
RES = LOW RP = HIGH
RES = HIGH
ON/OFF = HIGH (A/D supply)
CHI = LOW
RP = LOW
I2C-bus read status/old/new register
CHI = HIGH
2
I
C-bus write reset time/blink/LED status
I2C-bus write ENABLE-RESET
Fig.14 Proper first connection on power supply.
20 ms
MGR208
handbook, full pagewidth
SAA1305T main supplymicrocontroller
Dx RP = HIGH
ON/OFF = HIGH
1 ms
I2C-bus read status/old/new register
250 ms
250 ms
CHI = LOW
RP = LOW
CHI = HIGH
WD = LOW
WD = HIGH
WD = LOW
Fig.15 Switch-on after a valid input change.
2004 Jan 15 21
POWER-ON
MGR209
Philips Semiconductors Product specification
On/off logic IC SAA1305T
handbook, full pagewidth
input D0 = LOW
250 ms
250 ms
SAA1305T main supplymicrocontroller
TS = LOW
ON/OFF = LOW
RP = HIGH
1 ms
1 ms
CHI = LOW
ON/OFF = HIGH
RP = LOW
I2C-bus read status register
CHI = HIGH
TS = LOW
ON/OFF = LOW
RP = HIGH
CHI = LOW
ON/OFF = HIGH
RP = LOW
Fig.16 VL timer behaviour (voltage drops >250 ms).
POWER-OFF
sequence runs untill signal input D0 = HIGH
MGR210
handbook, full pagewidth
input D0 = LOW
input D0 = HIGH
SAA1305T main supplymicrocontroller
TS = LOW
t < 250 ms
1 ms
I2C-bus read status/old/new register
250 ms
250 ms
ON/OFF = LOW
RP = HIGH
CHI = LOW
ON/OFF = HIGH
RP = LOW
CHI = HIGH
WD = LOW
WD = HIGH
WD = LOW
Fig.17 VL timer behaviour (voltage drops <250 ms).
2004 Jan 15 22
POWER-OFF
POWER-ON
MGR211
Philips Semiconductors Product specification
On/off logic IC SAA1305T
handbook, full pagewidth
programmable
time
(1) See Fig.5.
SAA1305T main supplymicrocontroller
2
C-bus write alarm timer
I
2
I
C-bus write ENABLE-RESET
ON/OFF = LOW (A/D supply is off)
RP = HIGH
ON/OFF = HIGH (A/D supply is on)
1 ms
I2C-bus read status/old/new register
Watchdog timer trigger sequence
CHI = LOW
RP = LOW
CHI = HIGH
(1)
Fig.18 Wake-up via alarm.
POWER-OFF
POWER-ON
MGR212
handbook, full pagewidth
input Dx
0 to 300 ms
0 to 300 ms
SAA1305T main supplymicrocontroller
CHI = LOW
WD = HIGH (LOW)
WD = LOW (HIGH)
RP = HIGH
1 to 20 ms
RP = LOW
Fig.19 Behaviour after missed I2C-bus read sequence.
2004 Jan 15 23
POWER-OFF
MGR213
Philips Semiconductors Product specification
On/off logic IC SAA1305T
ON/OFF LOGIC WITH SWITCHED MICROCONTROLLER SUPPLY
handbook, full pagewidth
handbook, full pagewidth
14 V
5 V
CONTINUOUS
REGULATOR
14 V
RES
5 V
RES
D0 to D7
21
10
1 to 8
SAA1305T
9
23
11
24
18
20
ON/OFF
RP
5 V
REGULATOR
RESET
WD
CHI
SDA
SCL
5 V
Fig.20 Block diagram with switched microcontroller supply.
Dx
MICRO-
CONTROLLER
MGR214
ON/OFF
(1) Level not defined.
RP
CHI
WD
ON/OFF
RP
CHI
WD
(1) (1)
MGR215
a. First power-on. b. Normal switch-on.
Fig.21 On/off description with switched microcontroller supply.
2004 Jan 15 24
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Scenarios for ON/OFF logic with switched microcontroller supply
handbook, full pagewidth
5 V continuous
regulator
SAA1305T 5 V regulator microcontroller
RES = LOW RP = HIGH
200 ms
RES = HIGH RESET = HIGH
ON/OFF = HIGH
20 ms
RP = LOW
6 ms
I2C-bus read status/old/new register
2
I
C-bus write reset time/blink/LED status
I2C-bus write ENABLE-RESET
CHI = LOW
RESET = LOW
CHI = HIGH
RESET = HIGHON/OFF = LOW
Fig.22 Proper first connection on power supply.
MGR216
handbook, full pagewidth
SAA1305T 5 V regulator microcontroller
Dx RP = HIGH
ON/OFF = HIGH
10 ms
CHI = LOW
RP = LOW
CHI = HIGH
250 ms
250 ms
Fig.23 Switch-on after a valid input change.
2004 Jan 15 25
RESET = HIGH
RESET = LOW
I2C-bus read status/old/new register
WD = LOW
WD = HIGH
WD = LOW
6 ms
MGR217
Philips Semiconductors Product specification
On/off logic IC SAA1305T
handbook, full pagewidth
input D0 = LOW
input D0 = HIGH
(1) If input D0 = LOW, the microcontroller will restarttheVLtimer.
SAA1305T 5 V regulator microcontroller
TS = LOW
250 ms
10 ms
(1)
250 ms
250 ms
ON/OFF = LOW
RP = HIGH
CHI = LOW
ON/OFF = HIGH
RP = LOW
CHI = HIGH
25 ms
RESET = HIGH
I2C-bus read status/old/new register
WD = LOW
WD = HIGH
WD = LOW
MGR218
Fig.24 VL timer behaviour.
andbook, full pagewidth
SAA1305T 5 V regulator microcontroller
RP = HIGH
1 to 20 ms
300 ms
1 to 20 ms
300 ms
RP = LOW
CHI = LOW
RP = HIGH
RP = LOW
ON/OFF = LOW
Fig.25 Wrong or missed Watchdog timer trigger.
2004 Jan 15 26
wrong or missed Watchdog timer trigger signal
wrong or missed Watchdog timer trigger signal
wrong or missed Watchdog timer trigger signal
4 times
MGR219
Philips Semiconductors Product specification
On/off logic IC SAA1305T
PACKAGE OUTLINE
SO24: plastic small outline package; 24 leads; body width 7.5 mm
D
c
y
Z
24
pin 1 index
1
e
13
12
w
b
p
M
SOT137-1
E
H
E
Q
A
2
A
1
L
p
L
detail X
(A )
A
X
v
M
A
A
3
θ
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT137-1
A
max.
2.65
0.1
A1A2A
0.3
2.45
0.1
2.25
0.012
0.096
0.004
0.089
IEC JEDEC JEITA
075E05 MS-013
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
(1)E(1) (1)
cD
15.6
15.2
0.61
0.60
REFERENCES
eHELLpQ
7.6
1.27
7.4
0.30
0.05
0.29
2004 Jan 15 27
10.65
10.00
0.419
0.394
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
0.25
0.25 0.1
0.01
0.01
EUROPEAN
PROJECTION
ywv θ
Z
0.9
0.4
0.035
0.004
0.016
ISSUE DATE
99-12-27
03-02-19
o
8
o
0
Philips Semiconductors Product specification
On/off logic IC SAA1305T
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesaverybriefinsighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,butitisnotsuitableforfinepitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
• below 225 °C (SnPb process) or below 245 °C (Pb-free
process)
– for all BGA, HTSSON-T and SSOP-T packages
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 240 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
2004 Jan 15 28
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Philips Semiconductors Product specification
On/off logic IC SAA1305T
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
WAVE REFLOW
(2)
BGA, HTSSON..T
PACKAGE
(3)
, LBGA, LFBGA, SQFP, SSOP..T
(1)
(3)
, TFBGA,
not suitable suitable
USON, VFBGA
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,
not suitable
(4)
suitable
HTQFP, HTSSOP, HVQFN, HVSON, SMS
(5)
PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO, VSSOP not recommended
CWQCCN..L
, SO, SOJ suitable suitable
(5)(6)
suitable
(7)
suitable
(8)
, PMFP
(9)
, WQCCN..L
(8)
not suitable not suitable
Notes
1. Formoredetailed information on the BGA packages refer to the
“(LF)BGAApplicationNote
”(AN01026);ordera copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted
on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
9. Hot bar or manual soldering is suitable for PMFP packages.
2004 Jan 15 29
Philips Semiconductors Product specification
On/off logic IC SAA1305T
DATA SHEET STATUS
LEVEL
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabove those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to resultin personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
2004 Jan 15 30
Philips Semiconductors Product specification
On/off logic IC SAA1305T
PURCHASE OF PHILIPS I2C COMPONENTS
2
Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
C components conveys a license under the Philips’ I2C patent to use the
2004 Jan 15 31
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands R32/02/pp32 Date of release:2004 Jan 15 Document order number: 9397 750 12586
SCA76
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