Philips SA56600-42 Datasheet

INTEGRATED CIRCUITS

SA56600-42

System reset for lithium battery backup

Product data
Supersedes data of 2001 Apr 24
File under Integrated Circuits, Standard Analog

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2001 Jun 19

Philips Semiconductors Product data

TYPE NUMBER

SA56600-42System reset for lithium battery back-up

GENERAL DESCRIPTION

The SA56600-42 is designed to protect SRAM data in computer
systems during periods of sagging power supply voltages and power
outages. When the power supply voltage drops to typically 4.2 V , the
CS output goes to a logic LOW state pulling CE to a LOW state,
disabling the SRAM device. In addition, a reset logic LOW is asserted
for system use. If the supply voltage drops further, to 3.3 V typically
or lower, the SA56600-42 switches the system’s operation from the
main power supply source to the Lithium back-up battery. As the
main supply is restored and the voltage rises to 3.3 V or higher, the
SRAM support voltage transfers from the Lithium back-up battery to
the main supply. When the main supply voltage rises to greater than
typically 4.2 V, the CS output goes to a logic HIGH state for SRAM
CE control. Reset assertion is released and normal operation is
resumed. This sequence ensures reliable preservation of SRAM
data during periods of supply deficiency and interruptions.

The SA56600-42 is offered in the SO8 surface mount package.

FEA TURES

• Supply switching at 4.2 V

threshold (falling supply)

DC

• RESET output

• Both CS and CS outputs available for SRAM control

• During battery back-up operation:

– Low supply current (0.3 µA typical)
– Low input/output voltage drop (0.3 V typical at 100 µA)
– Low reverse current leakage (0.1 µA max.)

• During normal operation:

– Low input/output voltage drop (0.2 V typical at 50 mA)
– 4.8 V typical output voltage at 50 mA with V
– Restoration of main supply operation at 3.3 V

SIMPLIFIED SYSTEM DIAGRAM

SA56600-42

V

CC

8

= 5.0 V

CC

3.3 V

DETECTION

CITCUIT

4.2 V

DETECTION

CITCUIT

APPLICATIONS

• Memory cards (SRAM)

• PCs, word processors

• FAX machines, photocopiers, office equipment

• Sequence controllers

• Video games and other equipment with SRAM

V

OUT

6

V

BATT

4

V

CC

V

DD

SRAM

CE

GND

2

CS

3

5CS

R

PU

RESET

LITHIUM

BATTERY

R

ORDERING INFORMATION

GND

1

7
Y

SL01277

Figure 1. Simplified system diagram.

PACKAGE
NAME DESCRIPTION

TEMPERATURE
RANGE

SA56600-42D SO8 plastic small outline package; 8 leads; body width 3.9 mm –40 to +85 °C

2001 Jun 19 853–2249 26559

2

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

Part number marking

The package is marked with a four letter code in the first line to the
right of the logo. The first three letters designate the product. The
fourth letter, represented by ‘x’, is a date tracking code. The
remaining two or three lines of characters are internal manufacturing
codes.

5

6

7

8

PIN CONFIGURATION

1

GND

2

RESET

3

CS

4

V

BATT

TOP VIEW

SO8

8

7

6

5

SL01278

V

Y

V

CS

CC

OUT

Figure 2. Pin configuration.

2

1

3

4

Part number Marking

SA56600-42 A A A x

PIN DESCRIPTION

PIN SYMBOL DESCRIPTION

1 GND Circuit ground for the device.
2 RESET Asserted open collector output LOW whenever the VCC input source voltage falls below VS (4.2 V typical).

3 CS Chip select HIGH output signal, asserted whenever the VCC input source voltage is above VS (4.2 V typical).

4 V

BATT

5 CS Asserted chip select LOW output signal whenever the VCC input source voltage is above VS (4.2 V typical)

6 V

OUT

7 Y Open Emitter input to microcontroller used to enable CS output (microcontroller controls CS function).
8 V

CC

The open collector topology requires an external pull-up resistor.

Can be used as a chip enable HIGH (CE) signal for system SRAM.
Positive polarity connection for lithium back-up battery.

and Y is grounded. Can be used as a chip enable LOW (CE) signal for system SRAM.
Primary power with lithium battery back-up power for the protected system. Switch over to lithium battery

back-up operation occurs when VCC falls below VS.

Primary input power source for device.

MAXIMUM RATINGS

SYMBOL PARAMETER RATING UNIT

V

CC(max)

V

CC(op)

IO (VCC) Output current 80 mA
IO (V
T
T

) Output current 200 µA

BATT
oper
stg

P Power dissipation 250 mW

2001 Jun 19

Power supply voltage –0.3 to +7.0 V
Operating voltage –0.3 to +7.0 V

Operating temperature –40 to +85 °C
Storage temperature –40 to +125 °C

3

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

ELECTRICAL CHARACTERISTICS

Characteristics measured with VCC = 5.0 V, and T

SYMBOL

I

CC

V

SAT1

V

O1

V

O2

V

S

∆V

S

V

RSL

I

RSH

V

OPL

V

CSL

V

CSH

V

CSL

V

CSH

Supply current VCC = 5.0 V; V
I/O voltage difference 1 VCC = 5.0 V; V
Output voltage 1 VCC = 5.0 V; V
Output voltage 2 VCC = 5.0 V; V
Detection threshold VCC falling 4.00 4.20 4.40 V
Detection hysteresis ∆VS = VSH (rising VCC) – VSL (falling VCC) – 100 – mA
Reset output LOW VCC = 3.7 V – 0.2 0.4 V
Reset leakage current HIGH VCC = 5.0 V; VRS = 7.0 V – ±0.01 ±0.1 µA
Reset assertion

(minimum operating voltage)
CS output voltage LOW VCC = 3.7 V; V
CS output voltage HIGH VCC = 5.0 V; V
CS output voltage LOW VCC = 5.0 V; V
CS output voltage HIGH VCC = 3.7 V; V

PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆VS/∆T Detection voltage temperature

characteristic

V

BT

V

BT(HYS)

Battery back-up threshold VCC falling 3.15 3.30 3.45 V
Battery back-up hysteresis V

VBT/∆T Switching voltage temperature

characteristic

I

L

V
V
V
V
I

BL

I

YLO

t

PLH

t

PHL

SAT2
O3
O4
REF

Loss current VCC = 0 V; V
I/O voltage difference 2 VCC = 0 V; V
Output voltage 3 VCC = 0 V; V
Output voltage 4 VCC = 0 V; V
Reference voltage (typical) – 1.25 – V
V

leakage current VCC = 5.0 V; V

BATT

Y current VCC = 5.0 V; V
Y propagation delay time (Note 1) VY = logic LOW to logic HIGH – 8.0 20 ns
Y propagation delay time (Note 1) VY = logic HIGH to logic LOW – 8.0 20 ns

NOTE:

1. Y

input rise and fall time less than 6.0 ns. 15 pF capacitance load on CS (Pin 5 to GND).

= 25 °C, unless otherwise specified.

amb

BATT

= 3.0 V; IO = 1.0 mA – 0.03 0.05 V

BATT

= 3.0 V; IO = 1.0 mA 4.95 4.97 – V

BATT

= 3.0 V; IO = 15 mA 4.75 4.90 – V

BATT

V

≤ 0.4 V; VCC falling; RPU = 10 kΩ – 0.8 1.2 V

RSL

= 3.0 V; ICS = 1.0 µA – – 0.1 V

BATT

= 3.0 V; ICS = –1.0 µA 4.90 – – V

BATT

= 3.0 V; ICS = 1.0 µA – – 0.2 V

BATT

= 3.0 V; ICS = –1.0 µA VO – 0.1 – – V

BATT

–40 ≤ T

amb

V

(VCC rising) – V

BTH

BT(HYS)

–40 ≤ T

amb

= 3.0 V; IO = 0 µA – 0.3 0.5 µA

BATT

= 3.0 V; IO = 1.0 µA – 0.2 0.3 V

BATT

= 3.0 V; IO = 1.0 µA 2.7 2.8 – V

BATT

= 3.0 V; ICS = 100 µA 2.6 2.7 – V

BATT

BATT

= 3.0 V; IO = 0 mA – 1.4 2.2 mA

≤ +85 – – ±0.05 %/°C

=

(VCC falling)

BTL

– 100 1.0 mV

≤ +85 – – ±0.05 %/°C

= 0 V – – 0.1 µA

BATT

= 3.0 V; VY = 0 V – 150 400 µA

2001 Jun 19

4