Philips Q549.2E User Manual

Colour Television Chassis

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Q549.2E

LA

Contents Page Contents Page

1. Revision List 2

2. Technical Specifications and, Connections 2

3. Precautions, Notes, and Abbreviation List 6

4. Mechanical Instructions 10

5. Service Modes, Error Codes, and Fault Finding 15

6. Alignments 36

7. Circuit Descriptions 42

8. IC Data Sheets 53

9. Block Diagrams Wiring Diagram 32" (Elite Core) 59 Wiring Diagram 37" (Elite Core) 60 Block Diagram Video 62 Block Diagram Audio 63 Block Diagram Control & Clock Signals 64

Block Diagram I2C 65

Supply Lines Overview 66

10. Circuit Diagrams and PWB Layouts Drawing PWB Interface Ambilight: Interface + Single DC-DC Interface Ambilight: Dual DC-DC (AB2) 68 70 Interface Ambilight: Microcontrollerblock (AB3) 69 70 6 LED Low-Pow: Microcontroller Block Liteon(AL1)71 74 6 LED Low-Pow: Microcontroller Block Liteon(AL2)72 74 6 LED Low-Pow: LED Liteon (AL3) 73 74 8 LED Low-Pow: Microcontroller Block Liteon(AL1)75 79 8 LED Low-Pow: Microcontroller Block Liteon(AL2)76 79 8 LED Low-Pow: LED Liteon (AL3) 77 79 8 LED Low-Pow: LED Drive Liteon (AL4) 78 79 10 LED Low-Pow: Microcontroller Block Liteon(AL1)80 84 10 LED Low-Pow: Microcontroller Block Liteon(AL2)81 84 10 LED Low-Pow: LED Liteon (AL3) 82 84 10 LED Low-Pow: LED Drive Liteon (AL4) 83 84

SSB (B01A-B10) 85-133 137-138

SSB: SRP List Explanation 134 SSB: SRP List Part 1 135

©

Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

(AB1)67 70

SSB: SRP List Part 2 136 Light guide 139 140 Wi-Fi Antenna 141 141

Published by ER/EL 0965 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18311

2009-May-08

EN 2 Q549.2E LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Manual xxxx xxx xxxx.1

• All Chapters: the following sets to the manual: see Table

2-1 Described Model numbers.

• Chapter 5: paragraph 5.8.10 PCI bus

• Chapter 6: paragraph 6.6 Service SSB delivered without

main software loaded added.

added.

2. Technical Specifications and, Connections

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:

32PFL9604H/12

32PFL9604H/60

37PFL9604H/12

37PFL9604H/60

56PFL9954H/12

Elite Core 3122 785 18310

3122 785 18310

3122 785 18311

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

2009-May-08

2.3 Connections

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NETWORK

AUDIO IN VGA

VGASERVICE UART

1234

Technical Specifications and, Connections

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Figure 2-1 Connection overview

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6

10

11

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Technical Specifications and, Connections

Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

Head phone (Output)

Bk - Head phone 32 - 600 ohm / 10 mW ot

Cinch: Video CVBS - In, Audio - In

Rd - Audio R 0.5 V Wh - Audio L 0.5 V Ye - Video CVBS 1 V

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

/ 75 ohm jq

PP

S-Video (Hosiden): Video Y/C - In

1 - Ground Y Gnd H 2 - Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V

/ 75 ohm j

PP

/ 75 ohm j

PP

USB2.0

Figure 2-2 USB (type A)

1-+5V k 2 - Data (-) jk 3 - Data (+) jk 4 - Ground Gnd H

HDMI: Digital Video, Digital Audio - In (see HDMI 1, 2, 3 & 4 - Rear Connections)

Common Interface

68p - See diagram B07A SSB: CI: PCMCIA

Connector jk

2.3.2 Rear Connections

Service Connector (UART)

1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j

VGA: Video RGB - In

Cinch: S/PDIF - Out

Bk - Coaxial 0.4 - 0.6V

/ 75 ohm kq

PP

Cinch: Audio - Out

Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 10 kohm kq

RMS

/ 10 kohm kq

RMS

EXT3: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out

20

21

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Figure 2-4 SCART connector

1 - Audio R 0.5 V 2 - Audio R 0.5 V 3 - Audio L 0.5 V 4 - Ground Audio Gnd H

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

5 - Ground Blue Gnd H 6 - Audio L 0.5 V 7 - Video Blue 0.7 V 8 - Function Select 0 - 2 V: INT

/ 10 kohm j

RMS

/ 75 ohm jk

PP

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

9 - Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V 12 - n.c.

/ 75 ohm j

PP

13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V 16 - Status/FBL 0 - 0.4 V: INT

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - Video CVBS/Y 1 V 20 - Video CVBS 1 V 21 - Shield Gnd H

/ 75 ohm k

PP

/ 75 ohm j

PP

Aerial - In

- - IEC-type (EU) Coax, 75 ohm D

1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V 4-n.c. 5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H 9-+5V 10 - Ground Sync Gnd H 11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j

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Figure 2-3 VGA Connector

/ 75 ohm j

PP

/ 75 ohm j

PP

/ 75 ohm j

PP

+5 V j

DC

RJ45: Ethernet (if present)

Figure 2-5 Ethernet connector

1 - TD+ Transmit signal k 2 - TD- Transmit signal k 3 - RD+ Receive signal j 4 - CT Centre Tap: DC level fixation 5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal j 7 - GND Gnd H 8 - GND Gnd H

Technical Specifications and, Connections

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Cinch: Audio - In (VGA/DVI)

Rd - Audio R 0.5 V Wh - Audio L 0.5 V

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

HDMI 1, 2, 3 & 4: Digital Video, Digital Audio - In

Figure 2-6 HDMI (type A) connector

1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

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Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages

with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

-9

), or pico-farads (p =× 10

. Select

-12

-6

),

).

3.2 Warnings

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

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Precautions, Notes, and Abbreviation List

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128W

AG 1A0617 000001

VHF+S+H+UHF

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EN 7Q549.2E LA 3.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion

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Precautions, Notes, and Abbreviation List

DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

I

C Inter IC bus

2

I

D Inter IC Data bus

2

I

S Inter IC Sound bus

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used

for broadcast grade video.

Uncompressed digital component or

digital composite signals can be used.

The SDI signal is self-synchronizing,

uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MIPS Microprocessor without Interlocked

Pipeline-Stages; A RISC-based

microprocessor MOP Matrix Output Processor MOSFET Metal Oxide Silicon Field Effect

Transistor, switching device MPEG Motion Pictures Experts Group MPIF Multi Platform InterFace MUTE MUTE Line NC Not Connected NICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital

sound system, mainly used in Europe. NTC Negative Temperature Coefficient,

non-linear resistor NTSC National Television Standard

Committee. Color system mainly used

in North America and Japan. Color

carrier NTSC M/N= 3.579545 MHz,

NTSC 4.43= 4.433619 MHz (this is a

VCR norm, it is not transmitted off-air) NVM Non-Volatile Memory: IC containing

TV related data such as alignments O/C Open Circuit OSD On Screen Display OTC On screen display Teletext and

Control; also called Artistic (SAA5800) P50 Project 50: communication protocol

between TV and peripherals PAL Phase Alternating Line. Color system

mainly used in West Europe (color

carrier= 4.433619 MHz) and South

America (color carrier PAL M=

3.575612 MHz and PAL N= 3.582056

MHz) PCB Printed Circuit Board (same as “PWB”) PCM Pulse Code Modulation PDP Plasma Display Panel PFC Power Factor Corrector (or Pre-

conditioner) PIP Picture In Picture PLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer

can give directly the desired frequency POD Point Of Deployment: a removable

CAM module, implementing the CA

system for a host (e.g. a TV-set) POR Power On Reset, signal to reset the uP PTC Positive Temperature Coefficient,

non-linear resistor PWB Printed Wiring Board (same as “PCB”)

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Precautions, Notes, and Abbreviation List

EN 9Q549.2E LA 3.

PWM Pulse Width Modulation QRC Quasi Resonant Converter QTNR Quality Temporal Noise Reduction QVCP Quality Video Composition Processor RAM Random Access Memory RGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are

reproduced. RC Remote Control RC5 / RC6 Signal protocol from the remote

control receiver RESET RESET signal ROM Read Only Memory RSDS Reduced Swing Differential Signalling

data interface R-TXT Red TeleteXT SAM Service Alignment Mode S/C Short Circuit SCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et

Téléviseurs SCL Serial Clock I SCL-F CLock Signal on Fast I SD Standard Definition SDA Serial Data I SDA-F DAta Signal on Fast I

2

C

2

C bus

2

C

2

C bus SDI Serial Digital Interface, see “ITU-656” SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France and East Europe. Color carriers=

4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switched Mode Power Supply SoC System on Chip SOG Sync On Green SOPS Self Oscillating Power Supply SPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link

standard S/PDIF Sony Philips Digital InterFace SRAM Static RAM SRP Service Reference Protocol SSB Small Signal Board STBY STand-BY SVGA 800 × 600 (4:3) SVHS Super Video Home System SW Software SWAN Spatial temporal Weighted Averaging

Noise reduction SXGA 1280 × 1024 TFT Thin Film Transistor THD Total Harmonic Distortion TMDS Transmission Minimized Differential

Signalling TXT TeleteXT TXT-DW Dual Window with TeleteXT UI User Interface uP Microprocessor UXGA 1 600 × 1 200 (4:3) V V-sync to the module VESA Video Electronics Standards

Association VGA 640 × 480 (4:3) VL Variable Level out: processed audio

output toward external amplifier VSB Vestigial Side Band; modulation

method WYSIWYR What You See Is What You Record:

record selection that follows main

picture and sound WXGA 1280 × 768 (15:9) XTAL Quartz crystal XGA 1024 × 768 (4:3)

Y Luminance signal Y/C Luminance (Y) and Chrominance (C)

signal

YPbPr Component video. Luminance and

scaled color difference signals (B-Y and R-Y)

YUV Component video

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Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing and Taping

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

4.1 Cable Dressing and Taping

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

2009-May-08

Figure 4-1 Cable dressing 32”

Mechanical Instructions

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Figure 4-2 Cable dressing 37"

Figure 4-3 Cable dressing 56" (21:9)

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42"

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Mechanical Instructions

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:

• The buffers from the packaging.

• Foam bars (created for Service).

4.2.1 Foam Bars

4.3.3 Ambi Light

Each Ambi Light unit is mounted on a subframe. Refer to

Figure 4-5

for details.

Figure 4-4 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-4

for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.

Removing the Piezo Touch Control Panel PWB requires special attention. Refer to Piezo Touch Control Panel details.

1. Remove all screws of the rear cover.

2. Lift the rear cover from the TV. Make sure that wires and

flat coils are not damaged while lifting the rear cover from

4.3.2 Speakers

the set.

Each speaker unit is mounted with two screws. A sticker on the the unit indicates if it is the right (“R”) or left (“L”) box, seen from the front side of the set. When defective, replace the whole unit.

Figure 4-5 Ambi Light unit

1. Remove the Ambi Light cover [1].

2. Unplug the connector(s).

3. The PWB can now be taken from the subframe. When defective, replace the whole unit. Note: the screws that secure the AmbiLight units are longer than the other screws.

4.3.4 Main Supply Panel

1. Unplug all connectors.

2. Remove the fixation screws.

3. Take the board out. When defective, replace the whole unit.

4.3.5 IR & LED Board

Refer to Figure 4-6

for details.

for

2009-May-08

Figure 4-6 IR & LED Board

1. Remove the Main Supply Panel as earlier described.

18310_216_090318.eps

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2

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3

4

2. Remove the stand [1] and its subframe [2].

3. Now you gain access the IR & LED board. When defective, replace the whole unit.

4.3.6 Piezo Touch Control Panel

The flexfoil between Piezo Flexfoil Assy (mounted on the plastic rim of the set), and the PWB as described below, is extremely vulnerable. Do not pull hard at the PWB or flexfoil. Once the flexfoil has been damaged, the entire plastic rim of the set (with the touch-control pads) has to be swapped!

The Piezo Touch Control Panel PWB contains ESD sensitive components, implying that necessary industrial ESD precautions must be taken during removing or remounting. Refer to Figure 4-7

, Figure 4-8 and Figure 4-9 for details.

Mechanical Instructions

Figure 4-9 Piezo Touch Control Panel -3-

1. To unplug the flexfoil connector, first the outer part of the connector has to be moved upwards [3], before this part can be turned sidewards [4] as shown in the picture. Now the flexfoil can be removed from the connector and the PWB can be taken out of the set.

When defective, replace the whole unit.

EN 13Q549.2E LA 4.

4.3.7 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original

position during re-assembly. Failure to do so may result in damaging the SSB.

1. Remove the Wi-Fi module that is mounted on the SSB.

2. Unplug all connectors.

3. Remove the screws that secure the board.

1

4. The SSB can now be taken out of the set.

4.3.8 LCD Panel

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Figure 4-7 Piezo Touch Control Panel -1-

1. Gently pull the bottom side of the PWB out of the cabinet until you can unplug the connector [1].

090319

Refer to Figure 4-10

and Figure 4-11 for details.

1. Remove the Piezo Touch Control Panel PWB as earlier described.

2. Remove the AL covers as earlier described.

3. Remove both Main Supply Panel and SSB as earlier described.

4. Remove the subframes of Main Power Supply and SSB [1].

5. Remove both AL subframes (with the AL unit still mounted on it) by unplugging the connector [2] and removing the screws [3].

6. Remove all remaining adhesive tapes and remove all cables from their clamps.

7. Carefully remove the conducting tape [4], it must be reused during re-assembly!

8. Remove the remaining screws (indicated with an arrow) that hold the plastic rim and remove the rim.

9. Now the LCD Panel can be lifted from the front cabinet. The panel has to be slided downwards once it has been lifted, because the brackets on the top cannot be removed from the cabinet. You will see a conducting foam between metal front and panel, near the location of the Piezo Touch Control Panel.

When mounting a new LCD Panel:

1. Check if this conducting foam between panel and metal front is in place !

Figure 4-8 Piezo Touch Control Panel -2-

2. Re-attach the conducting tape between LCD Panel and metal rim [4] !

1. Now gently pull the top side of the PWB out of the cabinet without damaging the flexfoil until you can unplug the connector [2].

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Mechanical Instructions

Figure 4-10 LCD Panel -1-

Figure 4-11 LCD Panel -2-

4.3.9 Wi-Fi antenna

Follow the instructions for LCD Panel until “remove plastic rim”. After removal of this rim, you gain access to the Wi-Fi antennas.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position.

• Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

2009-May-08

Service Modes, Error Codes, and Fault Finding

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5. Service Modes, Error Codes, and Fault Finding

EN 15Q549.2E LA 5.

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Stepwise Start-up

5.4 Service Tools

5.5 Error Codes

5.6 The Blinking LED Procedure

5.7 Protections

5.8 Fault Finding and Repair Tips

5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair

”).

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.

How to Activate SDM

For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according Table 5-1

• Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU”(or HOME) button again.

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.

• Analog SDM can also be activated by grounding for a moment the solder pad on the SSB, with the indication “SDM” (see Service mode pad

).

.

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3 Stepwise Start-up

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz)

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID

• All picture settings at 50% (brightness, colour, contrast).

• All sound settings at 50%, except volume at 25%.

”.

Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

Default system

DVB-T

Figure 5-1 Service mode pad

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

”).

How to Navigate

When the “MENU” (or HOME) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.

How to Exit SDM

Use one of the following methods:

• Switch the set to STAND-BY via the RC-transmitter.

• Via a standard customer RC-transmitter: key in “00”sequence.

5.2.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

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MODEL:

32PF9968/10

PROD.SERIAL NO:

AG 1A0620 000001

040

39mm

27mm

(CTN Sticker)

Display Option

Code

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Service Modes, Error Codes, and Fault Finding

2009-May-08

• To view operation hours.

• To display (or clear) the error code buffer.

How to Activate SAM

Via a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Contents of SAM (see also Table 6-4

)

• Hardware Info. – A. SW Version. Displays the software version of the

main software (example: Q5492-1.2.3.4 = AAAAB_X.Y.W.Z).

• AAAA= the chassis name.

• B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. STBY PROC Version. Displays the software

version of the stand-by processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes

”).

• Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu. See Chapter 6. Alignments.

• Dealer Options. Extra features for the dealers.

• Options. Extra features for Service. For more info regarding option codes, 6. Alignments

. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments

for details. To adapt this option, it’s advised to use ComPair (the correct HEX values for the options can be found in Chapter 6.

Alignments) or a method via a standard RC (described below).

Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-3 digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence

). Make sure to key in all three

was correct. After the display option is changed in the NVM, the

TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• SW Maintenance. – SW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this info.

– HW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this info.

• Operation hours display. Displays the accumulated total of display operation hours. So, this one keeps up the lifetime of the display itself, mainly to compensate the degeneration behaviour.

• Test settings. For development purposes only.

• Development file versions. Not useful for Service purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a

directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item

separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download to USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.

Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this info.

How to Navigate

• In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

Service Modes, Error Codes, and Fault Finding

EN 17Q549.2E LA 5.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Switch the TV set to STAND-BY via the RC-transmitter.

• Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When in this chassis CSM is activated, a testpattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX5100. So if this test pattern is shown, it could be determined that the back end video chain (PNX5100, LVDS, and display) of the SSB is working. When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.

Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes

How to Activate CSM

Key in the code “123654” via the standard RC transmitter.

Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, can be navigated through the menus.

Contents of CSM

The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

).

NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display.

• 12NC supply. Shows the 12NC of the supply.

• 12NC “fan board”. Shows the 12NC of the “fan board”module (for sets with LED backlight)

• 12NC “LED Dimming Panel”. Shows the 12NC of the LED dimming Panel (for sets with LED backlight).

Software versions

• Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5492_1.2.3.4

• Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9 Software

Upgrading).

Example: STDBY_88.68.1.2.

• MOP ambient light SW. Displays the MOP ambient light EPLD SW.

• LED Dimming SW. Displays the LED Dimming EPLD SWversion (for sets with LED backlight).

• Local contrast SW. Displays the MOP local contrast SWversion.

Quality items

• Signal quality. Poor / average /good

• Child lock. Not active / active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.

• HDMI HDCP key. Indicates if the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the customer wants to make use of the HDMI functionality, the SSB has to be replaced.

• Ethernet MAC address. Displays the MAC address present in the SSB.

• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.

• BDS key. Indicates if the “BDS level 1” key is valid or not.

• CI slot present. If the common interface module is detected the result will be “YES” or “NO”.

• HDMI input format. The detected input format of the HDMI.

• HDMI audio input stream. The HDMI audio input stream is displayed: present / not present.

• HDMI video input stream. The HDMI video input stream is displayed: present / not present.

How to Exit CSM

Press “MENU” (or HOME) / “Back” key on the RC-transmitter.

General

• Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to

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EN 18 Q549.2E LA5.

Active

Semi St by

St by

Mains

on

Mains

off

GoToProtection

-WakeUp requested

-Acquisition needed

-No data Acquisition required

-tact SW pushed

-last status is hibernate after mains ON

- St by requested

-tact SW pushed

WakeUp

requested

Protection

WakeUp

requested

(SDM)

GoToProtection

Hibernate

-Tact switch Pushed

-last status is hibernate after mains ON

Tact switch

pushed

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5.3 Stepwise Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus error layer 2 = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this

mode with a faulty FET 7U08 is done, you can destroy all IC’s supplied by the +3V3, due to overvoltage (12V on 3V3-line). It is recommended to measure first the FET 7U08 or others FET’s on shortcircuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:

• SP: protection or error detected by the Stand-by Processor.

• MP: protection or error detected by the MIPS Main Processor.

2009-May-08

Figure 5-3 Transition diagram

No

EJTAG probe connected ?

No

Yes

Release AVC system r eset

Feed warm boot script

To I_17660_125b.eps To I_17660_125b.eps

Cold boot?

Yes

No

Set I²C slave address

of Standby µP to (A0h)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

This will a llow access to NVM a nd NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

Detect EJTAG debug probe

(pulling pin of the probe interface to

ground by inserting EJTAG probe)

Relea se AVC system r eset

Feed cold boot script

Release AVC system r eset Feed initializing boot script

disable alive mechanism

Initialise I/O pins of the st-by µP:

- Switch reset-AVCLOW (reset state)

- Switch WP-NandFlash LOW (protected)

- Switch reset-system LOW (reset state)

- Switch reset-5100 LOW (reset state)

- Switch reset-Ethernet LOW (reset state)

- Switch reset-ST7100 LOW (reset state)

- keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

Off

Standby Supply starts running.

All standby supply voltages become available .

st-by µ P resets

Stand by or

Protection

Mains is app lied

- Switch Audio-Reset high.

It is low in the standby mode if the standby

mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are

off.

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a

playing set will be ignored. The protection mode will

not be entered.

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM

initialization, this is not issue in this setup, the delay is automatically

covered by the architectural setup)

Release Reset-PNX5100.

PNX5100 will start b ooting.

Wait 10ms (minimum) to allow the bootscript

of the PNX5100 to configure the PCI arbiter

Before PNX8541 boots, the PNX5100 should have set its PCI arbiter (bootscript command). To allow this, approx. 1ms is needed. This 1ms is extended to 10ms to also give some relaxation to the supplies.

Switch HIGH the WP-NandFlash to

allow access to NAND Flash

+12V, +/-12Vs, AL and Bolt-on power

is switched on, followed by the +1V2 DCDC converter

Enable the supply fault detection

algorithm

No

Yes

Detect-1 I/O line

High?

Switch ON Platform and display supply by switching

LOW the Standby line.

This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8PNX8541 and +1V8-PNX5100 become available.

yes

Enable the DCDC converter for +3V3 and

+5V. (EN ABLE-3V3)

Voltage output error:

Layer1: 2

Layer2: 18

Important remark; the appearance of the +12V will start the +1V2 DCDC converter automatically

No

Yes

Supply-fault I/O

High?

The supply-fault line is a combination of the DCDC converters and the audio protection line.

1V2 DCDC or class D error:

Layer1: 2

Layer2: 19

Enter protection

No

Detect2 high received

within 1 second?

Power-OK er ror:

Layer1: 3

Layer2: 16

Enter protection

Yes

No

Supply-fault I/O

High?

3V3 / 5V DCDC or class D error:

Layer1: 2

Layer2: 11

Enter protection

Wait 50ms

Enter protection

Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC.

Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.

Yes

No

Detect -2 I/ O line

High?

Disable 3V3, swit ch standby line high and wait 4 seconds

Added to make the system more robust to power dips during startup. At this point the regular supply fault detection algorithm which normally detects power dips is not up and running yet.

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Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

2009-May-08

EN 20 Q549.2E LA5.

Yes

MIPS reads the wake up reason

from standby µP.

Semi-Standby

initialize tuner, Master IF and channel

decoder

Initialize video processing IC's

Initialize source select ion

initialize Aut oTV

3-th try?

No

Blink Code as

error code

Bootscript ready

in 1250 ms?

Yes

No

Enable Alive check mechanism

Wait until AVC starts to

communicate

SW initializatio n

succeeded

within 20s?

No

Switch Standby

I/O line high.

RPC start (comm. protocol)

Set I²C slave address

of Standby µP to (60h)

Yes

Disable all supply related protections and

switch off the +3V3 +5V DC/DC converter.

switch off the remaining DC/DC

converters

Wait 5ms

Switch AVC PNX85 41

in reset (active low )

Wait 10ms

Switch the NVM reset

line HIGH.

Flash to Ram

image transfer succeeded

within 30s?

No

Yes

Code =

Layer1: 2

Layer2: 53

Code =

Layer1: 2

Layer2: 15

Initialize Ambilight with Lights off.

Timing need to be updated if more mature info is available.

Timing needs to be updated if more matur e info is available.

Downloaded successfully ?

Download firmware into the channel

decoder

Third try? No

No

Yes

Log channel decoder error:

Layer1: 2

Layer2: 37

Yes

Initialize audio

Enter protection

Release reset MPEG4 module:

BOLT-ON-IO: High

MPEG4 module will start booting

autonomously.

Wait 3000 ms

Start alive IIC polling

mechanism

POR polling positive ?

yes

No

Log SW event:

STi7100PorFailure

Wait 200 ms

POR polling positive?yes

No

bootSTi7100PorFailure:

Log HW error

Layer1: 2

Layer2: 38

and generate cold boot

Alive

polling

Log SW event

STi7100AliveFailedError and generate fast cold reboot eventually followed by a cold

reboot.

NOK

Reset-system is switched HIGH by the

AVC at the end of the bootscript

AVC releases Reset-Ethernet when the

end of the AVC boot-script is detected

This cannot be done through the bootscript, the I/O is on the standby µP

Reset- system is connected to USB

From I_17660_125a.eps From I_17660_125a.eps

-reset,

4to1HDMI Mux and channel decoder.

Reset-Audio and Audio-Mute-Up are

switched by MIPS code later on in the

startup process

Reset-syst em is switched HIGH by the

AVC at the end of the bootscript

AVC releases Reset-Ethernet when the

end of the AVC boot-script is detected

Reset-Audio and Audio-Mute-Up are

switched by MIPS code later on in the

startup process

Switch on the display in case of a LED backlight

display by sending the TurnOnDisplay(1) (I²C)

command to the PNX5100

In case of a LED backlight display, a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must be closed. The display startup sequence is taken care of by the LED DIM panel.

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Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

2009-May-08

Service Modes, Error Codes, and Fault Finding

Active

Semi Standby

action holder: AVC

autonomous action

action holder: St-by

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking

and audio mute

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

The assumption here is t hat a fast toggle (<2s)

can only happen during ON-> SEMI -> ON. In

these states, the AVC is still active and can

provide the 2s delay. If the transition ON-> SEMI-

>STBY -> SEMI -> ON can be made in less than 2s,

the semi -> stby transition has to be delayed

until the requirement is met.

Switch Audio -Reset low and wait 5ms

Constraints taken into account:

- Display may only be started when valid LVDS output clock can be delivered by the AVC .

- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .

- minimum wait time to switch on the lamp after power up is 200ms.

unblank the video.

Wait until valid and stable audio and video , corresponding to

the requested output is delivered by the AVC.

The higher level requirement is that audio and

video should be demuted without transient

effects and that the audio should be demuted

maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

CPipe already generates a valid output

clock in t he semi -standby st ate : display

startup can start immediately when leaving

the semi-standby state.

wait 250ms (min. = 200ms)

Switch on LCD backlight

(Lamp-ON)

Switch on the display by sending the

TurnOnDisplay(1) (I²C) command to the PNX5100

The timings to be used in

combination with the PanelON

comman d for th is specific d isplay

Switch on the Ambilight functionality according the last status

settings.

The higher level requirement is that the

ambilig ht fu nctionality m ay not be sw itched on

before the backlight is turned on in case the

set contains a CE IPB inverter supply.

I_17660_126.eps

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EN 21Q549.2E LA 5.

Figure 5-6 “Semi Stand-by” to “Active” flowchart

2009-May-08

EN 22 Q549.2E LA5.

Active

Semi Standby

action holder: AVC

autonomous action

action holder: St-by

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking

and audio mute

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

The assumption here is t hat a fast toggle (<2s)

can only happen during ON->SEMI ->ON. In

these states, the AVC is still active and can

provide t he 2s delay. If the tran sition ON -> SEMI-

->STBY-> SEMI -> ON can be made in less than 2s, the semi - > stby transition has to be delayed

until the requirement is met.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:

- Display may only be started when valid LVDS output clock can be delivered by the AVC .

- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .

- minimum wait time to switch on the lamp after power up is 200ms.

- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first second. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

Restore dimming backlight feature, PWM and BOOST output

and unblank the video.

Wait until valid and stable audio and video , corresponding to the requested

output is delivered by the AVC

AND

[the backlight PWM has been on for 1s (internal inverter LPL displays

OR the backlight PWM has been on for 2s (external inverter LPL displays)] .

The higher level requirement is that audio and

video should be demuted without transient

effects and that the audio should be demuted

maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

CPipe already generates a valid output clock in t he sem i -standby st ate: display

startup can start immediately when leaving

the semi-standby state.

wait 250ms (min. = 200ms)

Switch on L CD backlig ht

(Lamp-ON)

Switch off the dimming backlight feature, set

the BOOST control to nominal and make sure

PWM output is set to 100%

Switch on the display by sending the

TurnOnDisplay(1) (I²C) command to the PNX5100

Switch on the Ambilight functionality according the last status

settings .

The higher level requirement is that the

ambilig ht functio nality may not be sw itched on

before the backlight is turned on in case the

set contains a CE IPB inverter supply.

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Service Modes, Error Codes, and Fault Finding

2009-May-08

Figure 5-7 “Semi Stand-by” to “Active” flowchart LCD with preheat

Service Modes, Error Codes, and Fault Finding

EN 23Q549.2E LA 5.

Constraints taken into account:

- Display may only be started when valid LVDS output clock can be delivered by the AVC.

- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .

- minimum wait time to switch on the lamp after power up is 200ms.

Semi Standby

The assumption here is that a fast toggle (<2s)

can only happen during ON-> SEMI -> ON. In

these states, the AVC is still active and can

provide the 2s delay. If the t ransition ON -> SEMI-

>STBY->SEMI->ON can be made in less t han 2s,

the semi -> stby transition has to be delayed

CPipe already generates a valid output clock in t he sem i -standby st ate : display

startup can start immediately when leaving

until the requirement is met.

the semi-standby state.

Switch on the display by sending the OUTPUT-

ENABLE (I²C) command to the LED DIM panel

wait 250ms (min. = 200ms)

Switch on L CD backlig ht

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

Assert RGB video blanking

TBC in def. spec

(Lamp-ON)

and audio mute

action holder: AVC

action holder: St-by

autonomous action

Initialize audio and video

processing IC's and functions

according needed use case.

The higher level requirement is that audio and

video should be demuted without transient

effects and that the audio should be demuted

maximum 1s before or at the same time as the

unblanking of the video.

The higher level requirement is that the

ambilig ht functio nality may not be sw itched on

before the backlight is turned on in case the

set contains a CE IPB inverter supply.

Figure 5-8 “Semi Stand-by” to “Active” flowchart (LED backlight)

Wait until valid and stable audio and video , corresponding to

the requested output is delivered by the AVC.

Switch Audio -Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

unblank the video.

Switch on the Ambilight functionality according the last status

settings .

Active

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2009-May-08

EN 24 Q549.2E LA5.

Semi Standby

Active

action holder: AVC

autonomous action

action holder: St-by

Wait 25 0ms ( min. = 2 00ms)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight

Force ext audio outputs to ground

(I/O: audio reset)

And wait 5ms

Switch off the display by sending the

TurnOnDisplay(0) (I²C) command to the PNX5100

switch o ff Am bilight

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Wait until Ambilight has faded out

(fixed wait time of x s)

The higher level requirement is that the

backlight may not be switched off before the

ambilight functionality is turned off in case the

set contains a CE IPB inverter supply.

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Service Modes, Error Codes, and Fault Finding

Figure 5-9 “Active” to “Semi Stand-by” flowchart (LCD non DFI)

2009-May-08

Service Modes, Error Codes, and Fault Finding

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand by

action holder: MIPS

autonomous action

action holder: St-by

Disable all supply related protections and switch off

the DC/DC converters (ENABLE-3V3)

Switch OFF all supplies by swit ching H IGH t he

Standby I/O line

Switch AVC system in re set st ate

Switch reset-PNX5100 LOW

Switch reset-ST7100 LOW

Switch Reset-Ethernet LOW

Important remark:

release reset audio 10 sec after

entering sta ndb y to sa ve power

Wait 5ms

Wait 10ms

Switch the NVM reset line HIGH

Switch het WP-Nandflash LOW

Delay transition until ramping down of ambient light is

finished. *)

If ambientlight functionality was used in semi -standby

(lampadaire mode), switch off ambient light

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more

stable condition when switching off the power).

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EN 25Q549.2E LA 5.

Figure 5-10 “Semi Stand-by” to “Stand-by” flowchart

2009-May-08

EN 26 Q549.2E LA5.

Protection

action holder: MIPS

autonomous action

action holder: St-by

Redefine wake up reasons for protection

state and transfer to stand-by µP.

Log the appropriate err or and

set stand-by flag in NVM

MP

Ask stand-by µP to enter protection state

Flash the Protection-LED in order to indicate

protection state* (*): This can be the standby LED or the ON LED

depending on the availability in the set

SP

Switch off LCD lamp supply

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of

min. 0.5ms to max. 50ms after LVDS switch off.

If needed to speed up this transition,

this block could be omitted . This is

depending on the outcome of the

safety investigations .

Disable all supply related protections and switch off

the +1V8 and the +3V3 DC/DC converter.

Switch OFF all supplies by switching HIGH the

Standby I/O line.

Switch AVC in r eset sta te

Wait 5ms

Wait 10ms

Switch the N VM r eset lin e HI GH.

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Figure 5-11 “To Protection State” flowchart

Service Modes, Error Codes, and Fault Finding

EN 27Q549.2E LA 5.

5.4 Service Tools

5.4.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:

1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in ComPair.

ComPair II

RC in

Optional

Switch

Power ModeLink/

Activity

HDMI I

RC out

2

C only

Figure 5-12 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Software is available via the Philips Service web portal.

• ComPair UART interface cable for Q54x.x. (using 3.5 mm Mini Jack connector): 3138 188 75051.

Note: While encounting problems, contact the local support desk.

2

C or UART commands is necessary,

TO TV

TO

UART SERVICE

CONNECTOR

I2C SERVICE CONNECTOR

Multi

function

TO

UART SERVICE

CONNECTOR

2

C

I

PC

ComPair II Developed by Philips Brugge

Optional power

5V DC

RS232 /UART

E_06532_036.eps

150208

5.4.2 Memory and Audio Test

With this tool you can test the memory of the PNX8543, as well if the PNX5100 is enabled and audio-testing.

What is needed?

– An USB-stick – “TESTSCRIPT Q549”. Downloadable from the Philips

Service website from the section “Software for Service only”

– A ComPair/service cable (3138 188 75051).

Procedure

Create a directory “JETTFILES” under the root of the USB-stick – Place “MemTestTV543.bin” and “autojett.bin” (available in

“TESTSCRIPT Q549”) under the directory “JETTFILES”

– Install the computer program “BOARDTESTLOGGER”

(available in “TESTSCRIPT Q549”) on the PC

– Connect a “ComPair/service”-cable from the service-

connector in the set, into the “multi function” jack at the front of the ComPair II box : Required settings in ComPair :

- start up the ComPair application.

- Select the correct database (open file “Q549.2E LA”, this will set the ComPair interface in the appropriate mode).

- Close ComPair

– Start up the program “BOARDTESTLOGGER” and select

“COMx”

– Put the USB stick into the TV and start up the TV while

pressing the “i+”-button on a Philips DVD RC6 remote control (it’s also possible to use a TV remote in “DVD”mode)

– On the PC the memory test is shown now. This is also

visible on the TV screen.

– In “BOARDTESTLOGGER” an option “Send extra UART

command” can be found where you can select “AUD1”. This command generates hear test tones of 200, 400, 1000, 2 000, 3 000, 5 000, 8 000 and 12 500Hz.

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

New in this chassis is the way errors can be displayed:

• There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2 – LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors.

• In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots,

CSM and SAM are not selectable.

– From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

Important remark:

).

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EN 28 Q549.2E LA5.

Service Modes, Error Codes, and Fault Finding

For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths (SDM) at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• In CSM mode – When entering CSM: error LAYER 1 will be displayed

by blinking LED. Only the latest error is shown.

• In SDM mode – When SDM is entered via Remote Control code or the

hardware pins, LAYER 2 is displayed via blinking LED.

• In the ON state – In “Display error mode”, set with the RC commands

“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.

• Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.

Basically there are three kinds of errors:

• Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section “5.6 The Blinking LED Procedure

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes

Error Buffer, Extra Info”. Note that it can take up several

minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

”).

, 5.5.4

• Via polling on I/O pins going to the stand-by processor.

• Via sensing of analog values on the stand-by processor or the PNX8543.

• Via a “not acknowledge” of an I

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

2

C communication.

5.5.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only

detected error.

– 37 23 00 00 00: Error code 23 was first detected and

error code 37 is the last detected error.

– Note that no protection errors can be logged in the

error buffer.

• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.

•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

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Service Modes, Error Codes, and Fault Finding

Table 5-2 Error code overview

EN 29Q549.2E LA 5.

Description Layer 1 Layer 2

2

C3 2 13 MIPS E BL / EB SSB SSB

I

2

C2 2 14 MIPS E BL / EB SSB/Display SSB/display

I

PNX doesn’t boot (HW cause)

2 15 Stby µP P BL PNX8543/PNX51XX

by

PNX 5100 doesn’t boot

Monitored

Error/

Error Buffer/

Prot

Blinking LED Device Defective Board

2

C blocked

I

SSB

12V 3 16 Stby µP P BL / Supply

Inverter or display supply 3 17 MIPS E EB /

1V2, 3V3, 5V to low 2 18 Stby µP P BL / SSB

Temp protection 3 12 MIPS E EB / Display

PNX 5100 2 21 MIPS E EB PNX5100 SSB

HDMI mux 2 23 MIPS E EB TDA9996 SSB

2

C switch 2 24 MIPS E EB PCA9540 SSB

I

Boot-NVM PNX5100 2 25 MIPS E EB STM24C08 SSB

Multi Standard demodulator (Micronas IF)

2 27 MIPS E EB DRX3616K

DRX3626K

SSB

ARM (ambilight) 8 28 MIPS E EB NXP LPC2103 AL module or DC/DC

FPGA (Local contrast) 2 29 MIPS E EB Altera SSB

Tuner 2 34 MIPS E EB UV1783S/HD1816 SSB

Fan I2C expander 7 41 MIPS E EB PCA9533 FAN module

T° sensor 7 42 MIPS E EB LM 75 T° sensor

FAN 1 7 43 MIPS E EB FAN

FAN 2 7 44 MIPS E EB FAN

Main NVM 2 / MIPS E X STM24C128 SSB

PNX doesn’t boot (SW cause) 2 53 Stby µP E BL PNX8543 SSB

Display (only 56PFL9954H) 5 64 MIPS E BL / EB Altera Display

Extra Info

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips

, 5.8.6

Logging). It’s shown that the loggings which are generated

by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Error 13 (I

2

C bus 3 blocked). At the time of release of this manual, this error was not working as expected. Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 15 (PNX8543,PNX5100 doesn’t boot). Indicates that the main processor/PNX5100 was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8543 completely dead, I Processor broken, etc...). When error 15 occurs it is also possible that I

2

C link between PNX and Stand-by

2

C1 bus is blocked (NVM). I2C1 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-1, SDA-1, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems from the NVM PNX5100, DDR’s and the bootscript reading from the PNX5100.

• Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = 2 will be displayed automatically. In SDM this gives LAYER 2 error = 18.

• Error 21 (PNX 5100). When there is no I

2

C communication towards the PNX5100, the TV set will start rebooting and display LAYER 1 error = 2. Disconnect the mains cord now and start up the TV set with the solder path (SDM) short to ground during start-up to activate the LAYER 2 error blinking. Error “21” will be logged and displayed via the blinking LED procedure after a few moments from start-up. Remark : the rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips

, 5.8.6

Logging”). It is shown that the loggings which are

generated by the main software keep continuing. Check in the logging for keywords like e.g. “Device error 21”.

• Error 23 (HDMI). When there is no I

2

C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.

• Error 24 (I communication towards the I

2

C switch). When there is no I2C

2

C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark : this only works for TV sets with an I

2

C controlled screen included.

• Error 25 (Boot-NVM PNX5100). Same behaviour as described in “Error 21 (PNX5100)”.

• Error 27 (Micronas IF). When there is no I

2

C communication towards the multi standard demodulator, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 28 (ARM ambilight). When there is no I

2

C communication towards the ARM processor, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 29 (FPGA local contrast). When there is no I communication towards this FPGA, LAYER 2 error = 29 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I

2

C communication

towards the tuner after start-up, LAYER 2 error = 34 will be

2

C

2009-May-08

EN 30 Q549.2E LA5.

Service Modes, Error Codes, and Fault Finding

logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 42 (Temp sensor). Only applicable for TV sets with

2

an I

C controlled screen.

• Main NVM. When there is no I

2

C communication towards the main NVM, LAYER 1 error = 2 will be displayed via the blinking LED procedure. In SDM, LAYER 2 error will be blinked as “15”. Errors here can not be logged due to inaccessibility of the NVM device.

• Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.

• Error 64. Only applicable for TV sets with an I screen .

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:

• Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code

overview”) which causes the failure of the TV. This

approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark:

For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:

1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit

2. A pause of 1.5 s

3. “n” short blinks (where “n”= 1 to 9)

4. A pause of approximately 3 s,

5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s

2. Two short blinks of 250 ms followed by a pause of 3 s

3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s

5. One long blink of 3 s to finish the sequence

6. The sequence starts again.

”) and will be displayed when SDM

2

C controlled

• Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the standby processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair

Tips, 5.8.6 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

Important remark:

For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.

• Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2

the second last error, etc.... Take notice that it takes some

seconds before the blinking LED starts.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Stepwise Start-up

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D (7D10) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

”).

5.6.2 How to Activate

Use one of the following methods:

2009-May-08

Repair Tip

• There will be still picture available but no sound. While the Class D amplifier tries to start-up again, the cone of the

Service Modes, Error Codes, and Fault Finding

EN 31Q549.2E LA 5.

loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again.

5.7.3 Important remark regarding the blinking LED indication

As for the blinking LED indication, the blinking led of LAYER 1 error displaying can be switched off by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched off by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and doesn’t recognizes the keyboard commands at this time.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra

Info”.

5.8.1 Ambilight

Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair the light output can be adjusted.

5.8.2 Audio Amplifier

The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time.

started immediately when +12V incoming voltage is available (+12V is enabled by STANDBY signal, active low). Supply voltages +3V3, 2V5, +1V8-PNX5100, +1V8-PNX85XX, +5V and +5V-TUN are switched-on directly by signal ENABLE-3V3 (active low), provided that +12V (detected via 7U40 &7U41) is available. +12V is considered OK (=> DETECT -12V signal becomes high and 12V/3V3 and 12V/5V DC-DC converter can be started up) if it rises above 10V5 (typical) and doesn’t drop below 10V (typical).

Debugging

The best way to find a failure in the DC/DC converters is to check their start-up sequence at power-on via the mains cord, presuming that the standby microprocessor and the external supply are operational. Take STANDBY signal high-to-low transition as time reference. When +12V becomes available (maximum 1 second after STANDBY signal goes low) then +1V2-PNX85XX and +1V2PNX5100 are started immediately. Then, after ENABLE-3V3 goes low, all the other supply voltages should rise within 2ms.

Tips

• When an output supply voltage is short-circuited to GND the corresponding DC-DC converter is not audible noise, the converter switches-off immediately and will attempt a re-start only after +12V drops and rises again.

• Check the integrity (at least no short-circuit between drain and source) of power MOS-FETs, especially the high-side ones: 7U05, 7U08, 7U0D-1 and 7U0H-1 before starting the platform in SDM mode, otherwise it can be easily damaged.

• Switching frequency of DC-DC converters should be around 290KHz for 12V to 1V2 DC-DC converters and around 370KHz for 12V to 3V3 and 12V to 5V DC-DC converters.

5.8.5 Exit “Factory Mode”

making any

5.8.3 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.4 DC/DC Converter

Description

The onboard supply consists of 5 DC/DC converters and 4 linear stabilizers. All DC/DC converters have +12V input voltage and deliver :

• +1V2-PNX85XX supply voltage (1.24V nominal), stabilized close to PNX8543 chip.

• +1V2-PNX5120 supply voltage (1.26V nominal), stabilized close to PNX5120 chip.

• +3V3 (3.34V nominal, overall 3.3 V for onboard IC’s).

• +5V (5.15V nominal) for USB and Conditional Access Interface and +5V5-TUN for +5V-TUN tuner stabilizer.

• +33VTUN (34V nominal) for analog-only tuners.

The linear stabilizers are providing:

• +1V2-STANDBY (out of +3V3-STANDBY), 1.24V nominal.

• +1V8-PNX85XX and +1V8PNX5100 (connected via CFH1), 1.84V nominal.

• +2V5 (WOW FPGA diversity only), 2.5V nominal.

• +5V-TUN (out of +5V5-TUN), 5V nominal.

+3V3-STANDY and +1V2-STANDBY are permanent voltages. Supply voltages +1V2-PNX85XX and +1V2-PNX5100 are

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.

5.8.6 Logging

When something is wrong with the TV set (f.i.the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box. Required settings in ComPair before starting to log :

- Start up the ComPair application.

- Select the correct database (open file “Q549.2E LA”, this will set the ComPair interface in the appropriate mode).

- Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:

1. COMx

2. Bits per second = 115200

3. Data bits = 8

4. Parity = none

5. Stop bits = 1

6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture),

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18310_220_090318.eps

090319

EDID4

look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.8 IPB

In case of no picture when CSM-test pattern from PNX5100 is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the IPB + wiring (LAYER 2 error = 17 is displayed in SDM).

5.8.9 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

Service Modes, Error Codes, and Fault Finding

Figure 5-13 4th HDMI EDID NVM pin

5.8.14 Wi-Fi module

5.8.10 PCI bus

The splash screen image is not distributed via the regular YUV signal path from the PNX8543 to the PNX51XX, but loaded one time via the PCI bus.Once the splash screen image is loaded into the PNX51XX, it will be continuously generated by the PNX51XX until the first incoming video disables the splash screen.So when teletext and/or general UI is available, but no splash screen (option “ON”) is visible during start-up, check the PCI bus as possible root cause.

5.8.11 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

5.8.12 Upgrade HDMI EDID NVM

The EDID MUX device (including all HDMI NVM except the 4th) is upgradeable via USB, see ComPair for further instructions. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.

5.8.13 Upgrade VGA/4th HDMI EDID NVM

To prevent damage on the coax wires, especially the female core of the coax wires (can be bend over during dis- and reconnecting), this should be carried out by use of pliers.

The EDID for VGA connector or the 4th HDMI can only be upgraded via external I

2

C. To upgrade the EDID for the VGA connector or 4th HDMI, pin 7 of the EDID NVM has to be short circuited to ground. Therefore a test point is foreseen (see

Figure 5-13

). For the VGA EDID NVM it’s most suitable to connect pin 7 to ground on the NVM device itself. See ComPair for further instructions.

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Service Modes, Error Codes, and Fault Finding

START

Create “repair” directory on USB stick and

connect USB stick to TV-set

Go to SAM mode (062596 i+) and

save the TV settings via “Upload to USB”.

Set is still

operating?

- Replace SSB board by a Service SSB.

- Make the SSB fit mechanically to the set.

Go to SAM mode, and reload settings

via “Download from USB”.

Saved settings

on USB stick?

Program “Display Option” code via 062598

MENU/HOME, followed by 3 digits code (this

code can be found on a sticker inside the set).

Check and perform alignments in SAM

according to the Service Manual.

E.g. option codes, colour temperature...

Connect PC via ComPair interface to Service

connector.

END

Yes

After entering “Display Option” code, set is

going to Standby (= validation of code).

Restart the set.

In case of settings reloaded from USB, the set type, serial number, Display 12NC, are automatically stored when entering display options.

No

- Check if correct “Display Option” code is programmed.

- Verify “Option Codes” according sticker inside the set.

- Default settings for White drive ...see Service Manual

No

Set is starting up & display is OK.

If not already done;

Check latest software on Service website.

Update Main and Standby software via USB.

Q52xE SSB Board swap – v5.1 VDS/JA Updated 18-03-2009 (changes are indicated in red)

Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x

Set is starting up but no display.

Final check of all menus in CSM. Special attention for HDMI Keys.

Program “set type number”, “serial number”,

and “display 12NC”.

Update main software in this step, by using

“autorun.upg” file.

Start TV in Jett mode (DVD i+/OSD)

Open ComPair browser Q52x.

Noisy picture with bands/lines is visible and the

red LED is continuous “on”

(sometimes also the letter “F” is visible).

Press 5 s. the “Volume minus” button on the local

cntrl until the red LED switches “off”, and then

press 5 s. the MENU (*) button of the local cntrl.

(* in some chassis this button is named SOURCE)

The picture noise is replaced by blue mute!

Unplug the mainscord to verify the correct

disabling of the factory-mode.

Program “Display Option” code via 062598 MENU/

HOME, followed by 3 digits code (this code can be

found on a sticker inside the set).

After entering “Display Option” code, set is going

to Standby (= validation of code).

Restart the set.

Set is starting up in “Factory” mode.

Start-up set.

Set behaviour?

Set is going into protection after

replacing the SSB

(blinking LED, error 2).

Take care that speakers are connected! In some sets, the speakers are in the rear cover, and when the set is switched “on” without speakers, it is possible that the Audio protection is triggered.

Advise: remount rear cover before switching “on” (see also SCC_71772).

Q54x.x

H_16771_007.eps

090318

5.8.15 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure “SSB replacement flowchart”.

EN 33Q549.2E LA 5.

Figure 5-14 SSB replacement flowchart

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Service Modes, Error Codes, and Fault Finding

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the PNX8543 via the PCI bus.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). Perform the following actions after SSB replacement:

1. Set the correct option codes (see sticker inside the TV).

2. Update the TV software => see the eUM (electronic User

Manual) for instructions.

3. Perform the alignments as described in chapter 6 (section

6.5 Reset of Repaired SSB

4. Check in CSM if the HDMI key, MAC address.. are valid. For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

• The “FlashUtils.upg” file is only used by service centra

which are allowed to do component level repair on the SSB.

Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q5492_ 1.26.15.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:

1. Copy “AUTORUN.UPG” to the root of the USB stick.

2. Insert USB stick in the set while the set is in ON MODE.

The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software Upgrade

In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips TV remote control or a

Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

Attention!

In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:

1. Create a directory “UPGRADES” on the USB stick.

2. Rename the “autorun.upg” to something else, e.g. to

“software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick into the TV.

).

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on the USB stick.

2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT72_88.0.0.0.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see section “

Manual Software Upgrade”.

5. Select the appropriate file and press the “OK” button to upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

• BootProm_PNX5120_Q5492_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization.

• Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by Service technicians. For ComPair development only.

• DDC_Q5492_x.x.x.x.zip. Contains the content of the VGA NVM. See ComPair for further instruction.

• EDID_Q5492_x.x.x.x.zip. Contains the EDID content of the different EDID NVM’s. See ComPair for further instructions.

• EJTAGDownload_Q5492_x.x.x.x.zip. Only used by service centra which are allowed to do component level repair.

• FUS_Q5492_x.x.x.x_commercial.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• Factory_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.

• FlashUtils_Q5492_x.x.x.x_commercial.zip. Not to be used by Service technicians.

• MOP_RAC3_x.x.x.x.zip. Contains the MOP local contrast software and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg!

• OAD_Q5492_x.x.x.x.zip. Not to be used by Service Technicians.

• OpenSourceFile_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• PQPrivate_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains the Stand-by software in “upg” and “hex” format. – The “StandbySW_xxxxx_prod.upg” file can be used to

upgrade the Stand-by software via USB.

– The “StandbySW_xxxxx.hex” file can be used to

upgrade the Stand-by software via ComPair.

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Service Modes, Error Codes, and Fault Finding

– The files “StandbySW_xxxxx_exhex.hex” and

“StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).

• UpgradeAll_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.

Caution: Never try to use this file, because it will overwrite the HDCP keys ! ! !

• UpgradeExe_Q5492X_x.x.x.x.zip. Not to be used by Service Technicians.

• Ambilight_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• Cabinet_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• Display_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• LightGuide_TV522_x.x.x.x_.zip. Not to be used by Service Technicians.

• ProcessNVM_Q5492_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 Content of the MOP Ambilight ARM SW File

• MOP_AMBILIGHT_V1-2_UPG_jettsigned.zip. Contains the MOP ambientlight software (ARM processor on the DC-DC AL interface board) and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg! and is not available in the One-Zip software file but provided separately via the commercial Philips website (software for servicers only). Instructions for upgrading are included in the zip file.

EN 35Q549.2E LA 5.

5.9.6 UART logging 2K9 (see section “5.8 Fault Finding and

Repair Tips, 5.8.6 Logging)

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6. Alignments

Alignments

Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

6.5 Reset of Repaired SSB

6.7 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

/ 50 Hz (± 10%).

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

/ 60 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 MΩ, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4

Option Settings).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

•OR: – In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error

Codes, and Fault Finding). The SAM menu will now appear on

the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:

• Tuner AGC.

• White point.

To store the data:

• Press OK on the RC before the cursor is moved to the left.

• In main menu select “Store” and press OK on the RC.

• Press MENU on the RC to switch back to the main menu.

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, for the AGC alignment you can use the default value : “80”. Store settings and exit SAM.

6.3.2 White Point

• Set “Active control” to “Off”.

• Choose “TV menu”, “TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting

Dynamic backlight Off

Dynamic Contrast Off

Colour Enhancement Off

Picture Format Unscaled

Light Sensor Off

Brightness 50

Colour 0

Contrast 100

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:

• Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “White point” values to: “127”. – “Red BL offset” values to “8”. – “Green BL offset” values to “8”.

In case you have a colour analyser:

• Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.

• Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1 White D alignment

values). Tolerance: dx: ± 0.004, dy: ± 0.004.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values

Value Cool (11000K ) Normal (9000K) Warm (6500K)

x 0.270 0.279 0.309

y 0.279 0.287 0.328

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

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Alignments

EN 37Q549.2E LA 6.

• Set the RED, GREEN and BLUE default values according to the values in Table 6-2

.

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-2 White tone default setting

White Tone 32" 37" Black level

Colour Temp R G B R G B R G

Normal 127 95 97 127 121 106 8 8

Cool 127 100 112 124 127 119 8 8

Warm 12789 5212711164 8 8

White Tone 56" Black level

Colour Temp R G B R G

Normal 127 117 111 8 8

Cool 124 124 125 8 8

Warm 127 95 65 8 8

offset

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5100 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.

Notes:

• After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

offset

The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. See Table 6-3 Option and display code overview options.

Diversity

Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 2.

Technical Specifications and, Connections.

6.4.5 Option Code Overview

Table 6-3 Option and display code overview

CTN Options Group 1 Options Group 2 Disp.

32PFL9604H/12 08211 35971 18431 45288 30645 47282 00184 00000 181

32PFL9604H/60 08211 35971 18431 45288 30645 47282 00184 00000 181

37PFL9604H/12 08227 35972 18431 45288 30625 47282 00176 00000 161

37PFL9604H/60 08227 35972 18431 45288 30625 47282 00176 00000 161

56PFL9954H/12 08275 33925 18431 45288 30644 47282 00161 00000 180

Important: after having edited the option numbers as described above, you must press OK on the remote control

before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.

for the

code

For dealer options, in SAM select “Dealer options”. See Table 6-4 SAM mode overview

.

6.4.3 (Service) Options

Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-4 SAM mode overview

.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-3

Option and display code overview.

Example: The options sticker gives the following option numbers:

• 08192 00133 01387 45160

• 12232 04256 00164 00000

New here in this chassis is the “Net TV” functionality. Therefore the CTN (“set type” item in CSM1) must be filled into the spare SSB to ensure access to the Net TV portals. The loading of the CTN can be done via ComPair (Model number programming). The reset item (Clear NET TV memory) can be selected via MENU (or HOME) => Setup => Installation => Clear NET TV memory (customer preferences stored at provider side will be reset now).

2009-May-08

EN 38 Q549.2E LA6.

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090319

Alignments

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

Figure 6-1 SSB identification

6.6 Service SSB delivered without main software loaded

Due to a changed manufacturing process, new Service SSB’s can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such

an SSB is received.

6.6.1 When a picture is available

1. Mount the Service SSB into the TV set. After start-up,

normally the download application will appear on the screen.

2. Download the latest main software (FUS) from the

www.p4c.philips.com

website.

3. Create a folder "upgrades" in the root of a USB stick (size > 50 MB) and save the "autorun.upg" file in this "upgrades" folder. Note: it is possible to rename this file, e.g. "Q549_SW_version.upg", this in case there are more than one "autorun.upg" files on your USB stick

4. Plug the prepared USB stick into the TV set, and select the "autorun" file in the displayed browser on the screen

5. Now the main TV software will be loaded automatically, supported by a progress bar

6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.2 When no picture is available

Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback).

1. Start-up the TV set, equipped with the Service SSB, and enable the UART logging on the PC (see for settings 5.8

Fault Finding and Repair Tips 5.8.6 Logging)

2. The TV set will start-up automatically in the download application if main TV software is not loaded

3. Plug the prepared USB stick into the TV set, press cursor "Right" to enter the list, and navigate to the "autorun" file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press "OK"

4. Press cursor "Down" and "OK" to start the flashing of the main TV software. Printouts like: "L: 1-100% , V: 1-100% and P: 1-100%" should be visible now in the UART logging

5. Wait until the message "Operation successful!” is displayed and remove all inserted media. Restart the TV set

6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.3 Use of repaired SSBs instead of new

Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a “repaired” SSB for board swap instead of a “new” SSB.

6.7 Total Overview SAM modes

Table 6-4 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Info A. SW VERSION e.g. “Q5492_1.26.15.0” Display TV & Standby SW version and CTN serial

B. Standby processor version e.g. “STDBY_88.68.0.0”

C. Production code e.g. “See type plate”

Operation hours Displays the accumulated total of operation hours.TV

Error Displayed the most recent errors.

Reset error buffer Clears all content in the error buffer.

Alignment Tuner AGC RF-AGC Take over point adjustment (AGC default

Whitepoint Colour temperature Normal 3 different modes of colour temperature can be se-

2009-May-08

White point red

White point green

White point blue

Red black level offset

Green black level offset

Warn

Cool

number.

switched “on/off” & every 0.5 hours is increase one

value is 80)

lected

LCD White Point Alignment. For values, see Table 6-1 White D alignment values

.

Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / not

Virgin mode Off/On

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)

Auto store mode None

PDC/VPS

TXT page

PDC/VPS/TXT

Options Digital broadcast DVB Off/On Select DVB On/Off

DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country

DVB - T light Off/On Select DVB T light On/Off

DVB - C Off/On Select DVB C On/Off

DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country

Over the air download Off/On or Country dependent Select Over the air download On/Off or by country

8 days EPG Off/On Select 8 day EPG On/Off

Digital features USB Off/On Select USB On/Off

Ethernet Off/On Select Ethernet On/Off

Wi-Fi Off/On Select Wi-Fi On/Off

DLNA Off/On Select DLNA On/Off

Online service Off Online service is Off

PTP (Picture Transfer Protocol) Off/On Select PTP On/Off

Update assistant Off/On Select Update assistant On/Off

Display Screen 180 / LCD Sharp Z3LA13 56" Displayed the panel code & type model.

Video reproduction Picture processing None/PNX5100 Select Picture processing None/PNX5100 (Q549.xE

Internet software update Off Internet software update is Off

LightGuide Off/On Select LightGuide On/Off

Display fans Not present/Present Select Display fans Present/Not present.

Temperature sensor Sensor present in display (only for

Temperature LUT 0 N.A

E-box & monitor Off/On Select E-box & monitor On/Off

MOP local contrast Off/On Select MOP local contrast On/Off

Light sensor Off/On Select Light sensor On/Off

Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference

Pixel Plus type Pixel Plus HD Select type of picture improvement.

Ambilight None, Select type of Ambilight modules use.

Ambilight technology LED/Future use Ambilight technology LED is in use.

MOP ambilight Off/On Select MOP ambilight On/Off

21:9)

Perfect Pixel HD

Pixel Precise HD

2 sided 2/2

2 sided 4/4

3 sided 2/3/2

3 sided 4/3/4

3 sided 4/5/4

4 sided 4/3/4/3

muted in case no input signal is detected at input connectors.

Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)

N.A.

chassis).

styling).

For 8400 series only

EN 39Q549.2E LA 6.

2009-May-08

EN 40 Q549.2E LA6.

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-

Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with external

Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.

Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1

Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options

Store Store after changing.

Initialise NVM N.A

Store

Software maintenance Software events Display Display information is for development purposes.

Hardware events Display Display information is for development purposes.

Operation hours display 0003 In case the display must be swapped for repair, you

Test setting Digital info QAM modulation: 64-QAM Display information is for development purposes.

Install start frequency 000 Install start frequency from "0" MHz

Install end frequency 999 Install end frequency as 999 MHz

Default install frequency

Installation Digital only Select Digital only or Digital + Analogue before instal-

Alignments

rameters.

equipment.

CVBS Y/C YPbPr LR

CVBS Y/C YPbPr HV LR

(CVBS) YPbPr LR

EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with external

CVBS Y/C LR

(CVBS) YPbPr LR

CVBS Y/C LR

EXT3/AV3 type None Select input source when connected with external

CVBS

CVBS LR

YPbPr

YPbPr LR

YPbPr HV LR

VGA Off/On Select VGA On/Off

SIDE I/O Off/On Select SIDE I/O On/Off

HDMI 1 Off/On Select HDMI 1 On/Off

HDMI 2 Off/On Select HDMI 2 On/Off

HDMI 3 Off/On Select HDMI 3 On/Off

HDMI 4 Off/On Select HDMI 4 On/Off

HDMI side Off/On Select HDMI side On/Off

HDMI CEC Off/On Select HDMI CEC On/Off

HDMI CEC RC passthrough Off/On Select HDMI CEC RC passthrough On/Off

HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off

Tuner type HD1816-MK1/TD1716-MK4/

System RC support Off/On Select System RC support On/Off.

Embedded user manual Off/On Select Embedded user manual On/Off.

Start-up screen Off/On Select Start-up screen On/Off.

Wallpaper Off/On Select Wallpaper On/Off.

Hotel mode Off Hotel mode is Off.

Clear

Test reboot

Clear

Symbol rate: 23:29

Original network ID: 12817

Network ID:12817

Transportstream ID: 2

Service ID: 3

Hierarchical modulation: 0

Selected video PID: 35

Selected main audio PID: 99

Selected 2nd audio PID: -1

Digital + Analogue

TD1716-MK3/HD1816-MK2

equipment.

Select type of Tuner used.

to 4.

5 to 8.

Select Store in the SAM root menu after making any changes.

can reset the ""Display operation hours"" to ""0"". So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour).

lation.

2009-May-08

Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Development file versions

Upload to USB Channel list To upload several settings from the TV to an USB

Download from USB Channel list To download several settings from the USB stick to

Development 1 file version Display parameters DISPT 3.26.8.7 Display information is for development purposes.

Acoustics parameters ACSTS 3.6.6.5

PQ - PRFPP 1.26.10.4

Ambilight parameters PRFAM 2.6.1.3

Development 2 file version 12NC one zip software Display information is for development purposes.

Personal settings

Option codes

Display-related alignment

History list

Personal settings

Option codes

Display-related alignment

Initial main software

NVM version Q5492_0.4.0.0

Flash units SW Q5492_0.26.15.0

stick

the TV.

EN 41Q549.2E LA 6.

2009-May-08

EN 42 Q549.2E LA7.

Ambient Light

USB2.0

7. Circuit Descriptions

Circuit Descriptions

Index of this chapter:

7.1 Introduction

7.2 Power Architecture

7.3 Front-End

7.4 HDMI

7.5 Video and Audio Processing - PNX8543

7.6 Common Interface CI+

7.7 Net TV

7.8 Ambi Light

Notes:

•Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter

9. Block Diagrams) and circuit diagrams (see chapter

10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q549.2E LA chassis (platform name TV543/92) is the successor of the Q529.1E LA chassis (platform TV522/92).

Main difference with the previous platform is the introduction of “Net TV” and “CI+”.

7.1.1 Implementation

Key components of this chassis are:

• PNX8543 Digital Colour Decoder

• EP3C25F324C7N FPGA (“Local Contrast”)

• HD1816AF Hybrid Tuner

• DRX3926K Demodulator

• TDA9996 HDMI Switch

• TPA3123D2PWP Class D Power Amplifier

• DP83816AVNG PCI ethernet media access controller and physical layer (MacPhyter-II).

7.1.2 TV543 Architecture Overview

• For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1

.

Hybrid Tuner Saw

MICRONAS

DRX39xyK

CA

hdmi

TDA9996

hdmi hdmi

DDR-II

32

NXP

PNX8543

H264

8

FLASH

MUX

hdmi

DDR

16

CY3

Local

Contrast

DDR-II

32

PNX5120

Halo Reduced HD-NM FHD 120Hz

Led Dimming

Matrix

FHD@120p

FHD@120p FHD@100p

FHD@100p

Pixelated Ambi

PCI

Ethernet

Mini

PCI (Wifi)

hdmi

2 channel Audio Amp.

Spartan XC3S250E Led Dimming

SPI

LVD S

18310_200_090317.eps

090317

2009-May-08

Figure 7-1 Architecture of TV543/92 Elite Core platform

7.1.3 SSB Cell Layout

18310_201_090317.eps

090317

R

L

H

D

M

I

H

D

M

I

H

D

M

I

CA

1P00

HD

MI

1.3

USB

2.0

Y/C

Left

Right

CVBS

Head

Scart / YPbPr

SPO

R

serv

VGA

DDR2

Tuner

DC/DC

1M99

1M71

1F02

1M59

1M20

1M01

1R12

1M36

TDA

98XX

Class-D

1R08

1R07

1HP0

1CJ0

Xilinx

Pr

Pb

L

Lo

Y

Ro

Scart / YPbPr

TDA

10048

TDA

10023

173

5

HDM

I

1M95

1H0

1

DDR2

PNX8542/3

Video

In

Video

Out

DV in

TS in

HDMI B

HDMI A

PCI

CA

DDR

LVDS 2

LVDS 1

USB

Audio In

Audio

Out

E

J

T

A

G

STBY

GPIO

DDR

Ethernet

FLASH

HDMI

MUX

1E51

1E50

1G50

1G51

Wifi

L/R

1HE0

CY3 C40

H

D

M

I

RJ45

5100

40x40

1.27

DDR2

GPI

O

lvds-rx

ambi

pci/xio

PCI/ XIO

uart

I ² C

vdi lvds-tx

Circuit Descriptions

EN 43Q549.2E LA 7.

Figure 7-2 SSB layout cells (top view)

2009-May-08

EN 44 Q549.2E LA7.

18310_202_090317.eps

090317

Fuse

PSU

Display

Amb ilight

V display

LCD

Power-on

24V

St andb y

V backlig ht 24 V**

Au dio proc

+ Class D

24 Vs

(+ /-12 Vs opt)

+12V

D ual

DC/DC

+3V3

+1V2

Platform

Pow e r

D ual

DC/DC

2.5V 1 %

voltage ref

+2V5 +2V 5

+1V8 +1 V8

+3V3F

+5V

+5V tuner

+5V -T u n

PNX5100

+1V2-PNX85XX

+5V

+3V3

+1V8-PNX5100

+1V8-PNX85XX

+2V5 (loc.Contr.FPGA)

+1V2-PNX5100

+5V-TU N

SSB

Bolt-on

V in ve rt er 4kV*

Inver ter*

La mp On*

BL DIM*

La mp On

BL DIM

Inver ter**

Stby P

Enable-3V3

12V

Underv oltage

detect

Switches off

+3V3 and

+5V

*: pr esent in inverterless displays **: pre sent in displays with inte rna l inv er ter

Detect2

(12V sense)

AND

Detect1

+1V 2 +1V2 -STANDBY

+3V3 s tby

24V**

Power-OK

12VDisp

3V3stb y

Boost c on tr ol (Opt)

+3V3 (SSB

)

+1V8

Boost conv.

(opt)

+33V-TUN(analog)+33V

7.2 Power Architecture

Refer to figure Figure 7-3 for the power architecture of this platform.

Circuit Descriptions

7.2.1 Power Supply Unit

All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service website for the order codes of the boards.

Figure 7-3 Power Architecture TV543/92 platform

In the TV543 Elite Core platform, for sets up to and including 47", the Integrated Power Board (IPB) - incl. inverter is used. For sets of 52 " and 56", a conventional PSU (with additional inverters) is used.

In this manual, no detailed information is available because of design protection issues.

The output voltages to the chassis are:

• +3V3-STANDBY (standby-mode only)

• +12V (on-mode)

• +Vsnd (+24V) (audio power) (on-mode)

• +24V (bolt-on power) (on-mode)

• IPB: High voltage to the LCD panel (for sets up to and including 47").

7.2.2 Diversity

Below find an overview of the different PSUs that are used:

Table 7-1 Supply diversity

Supplier PSU Model Input Voltage Range

LGIT PLHL-T826A 32" High Mains (198- 265 Vac)

Delta

Delta DPS-411AP-3 A 56" High Mains (198- 265 Vac)

DPS-298CP A 37" High Mains (198- 265 Vac)

2009-May-08

7.3 Front-End

18440_211_090227.eps

090227

I2C-TUNER

IF-AGC

NXP Hybrid

Tuner

SAW Filter

IF Amplifier DRX3926K PNX8543

I2C-SSB

CVBS

2nd SIF

TS

TDA9996

1P06

1P04

1P03

1P02

1P0 5

HDMIA-RX

ARX

BRX

CRX

DRX

HDMIB-RX

PNX8543

D

C

A

B

Out

1M96

A B

HDMI 2

HDMI Side

(optional)

HDMI 3

(optional)

HDMI 1

HDMI 4

(optional)

Edid

18440_213_090227.eps

090227

18440_214_090227.eps

090227

TDA9996

CPU

IIC

Platform with embedded EDID

4 × HDMI

inpu ts

253 common Bytes

+ 1B subaddres of

S o u rce Physica l A ddress

+3B for input A +3B for input B +3B for inpu t C +3B for inpu t D

EDID : 25 3B

3B 3B 3B 3B

The Front-End consist of the following key components:

• Tuner HD1816AF

• SAW filter 36M125

• IF demodulator DRX3926K

• AGC amplifier UPC3221GV.

Below find a block diagram of the front-end application.

Circuit Descriptions

Figure 7-6 EDID control (embedded EDID)

EN 45Q549.2E LA 7.

Figure 7-4 Front-End block diagram

The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

7.4 HDMI

In this platform, the TDA9996 HDMI multiplexer is implemented. Only for one HDMI input, a separate EEPROM is implemented to store the EDID values. For the other HDMI inputs, the EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical subaddress: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.

The delta’s with respect to the use of the TDA9996 as HDMI multiplexer compared with earlier chassis/platforms are:

• +5V detection mechanism

• Stable clock detection mechanism

• Integrated EDID

• RT control

• HPD control

• TMDS output control

• CEC control

• New hotplug control for PNX8543 for 5th HDMI input

• New EDID structure: EDID stored in TDA9996, therefore there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms.

After replacement of the TDA9996 HDMI mux, the default I address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

7.5 Video and Audio Processing - PNX8543

The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.

2

C

Figure 7-5 HDMI input configuration

Some more delta’s compared to the previous PNX85xx are:

• 2 HDMI inputs (A & B)

• HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.

The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.

• For a functional diagram of the PNX8543, refer to Figure 7-7

.

2009-May-08

EN 46 Q549.2E LA7.

18440_202_090226.eps

TS out/in for

TS in from

CVBS, Y/C,

LV DS for

analog CVBS

analog audio

I

2

S

Dual SPDIF

Low-IF

SSIF, LR

Dual HDMI

SPDIF

CI/CA

MPEG

PRIMARY

LV DS

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

300 MHz

I2C

PWM

GPIO IR ADC UART I2C GPIO Flash

SYSTEM

USB 2.0 CA

PNX8543x

DV INPUT

DV-ITU-656

AV-PIP

SPI

MPEG/H.264

I2S

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

channel decoder

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

DECODER

VIDEO

CPU

MIPS32 4KEc

01 x22 x

AV-D SP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

channel)

(single or dual

flat panel display

DRAWING

ENGINE

DMA BLOCK

PCI 2.2

Circuit Descriptions

7.5.1 Video Subsystem

Refer to Figure 7-8 PNX8543 and the video signal flow between blocks and memory.

for the main video interfaces for the

Figure 7-7 PNX8543 functional diagram

2009-May-08

Circuit Descriptions

18440_203_090226.eps

090226

VMSP

HDMI_UIP

PC_RX

AFE

(ADC)

DAC

LV DS_BUF

LV DS_TX

CPIPE_

L2QTV

CPIPE_

L2VO

MCU-DDR

DMA BUS

DDR2-SDRAM

PNX8543x

VCP_

UIP

DENC

DAC

VCP_ WIFD

HDMI_

RX

MBVP_

L2VO2

MBVP_

L2QTV

MBVP_

L2VO1

A

GFX2

PIP

CVBS1/Y

monitor

main

CVBS2/C

monitor

HDMI

VCP/PC

LOW IF

CVBS

RGB

Dual HDMI

FPD-LVDS1

LCD panel

MUX

VCP_RX

2D_DE

VIP

(ITU-656)

PC_

UIP

GFX1

FPD-LVDS2

LCD panel

CVBS/Y

C

CAI

TS

TSDO

TSDI CMD

PCMCIA

TSI

MSVD

DV (including

ITU-656)

YPbPr

VGA

EN 47Q549.2E LA 7.

The Video Subsystem consist of the following blocks:

• Analogue Front-End (AFE) block

• Video and PC Capture (VPC/PC) pipe

• HDMI Receiver interface

• Memory-Based Video Processor MBVP)

• Video Composition Pipe (CPIPE)

• Memory Based Video Processor (MBVP) VO-1

• Memory Based Video Processor (MBVP) VO-2

• Video Composition Pipe (CPIPE)

• Dual Flat Panel Display-LVDS (FPD-LVDS)

• Digital Encoder (DENC)

• Digital Video VIP

• 2D graphics block.

7.5.2 Audio Subsystem

Refer to Figure 7-9

for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.

Figure 7-8 PNX8543 video flow diagram

2009-May-08

EN 48 Q549.2E LA7.

18440_204_090226.eps

090226

VMSP

ADC

MCU

DDR2-SDRAM

PNX8543x

HDMI_RX

CAI

SPDIF-IN

I

2

S

SPDIF

DigIF

ASDEC

(DEMODULATION

AND DECODING)

TM2270

(MPEG, AC-3, MP3

DECODER)

SPDIF-OUT

AO

AI

APP - AUDIO DSP

(POST PROCESSING)

2

DAC

2

DAC

2

DAC

2

DAC

DMA BUS

I2S-OUT-SD3 I2S-OUT-SD4

I2S-OUT-WS I2S-OUT-SCK I2S-OUT-OSC

Main L, R

HP L, R

SCART2 L, R

SCART1 L, R

HDMI

SPDIF-IN1

IF

SSIF

L, R

TS-IN

SPDIF-Out

SPDIF-IN2

I2S-OUT-SD1 I2S-OUT-SD2

I2S-IN-SD3 I2S-IN-SD4

I2S-IN-WS I2S-IN-SCK I2S-IN-OSC

I2S-IN-SD1 I2S-IN-SD2

SPDIF

ADC

4

4 × I2S

4

4 × I2S

XB3

XB4

from XB4

fast SPDIF

XB1

XB2

4 × I2S

Circuit Descriptions

The Audio Subsystem consist of the following blocks:

• Analogue Audio Front End (AAFE) used to capture Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input

• HDMI Receiver interface block

• SPDIF input block

• Audio Input (AI) block

• Audio Output (AO) block

• Demodulation & Decoding (ASDEC) DSP for decoding all analogue terrestrial TV sound standards

• Audio Post-Processing (APP) block

• Digital Audio decoder.

7.5.3 Connectivity and Compute Subsystem

Refer to Figure 7-10

for the connectivity and compute

subsystem.

2009-May-08

Figure 7-9 PNX8543 audio flow diagram

Circuit Descriptions

18440_205_090226.eps

090226

JTAG_MMIO

UART2

UART1

IIC2_DMA

IIC3_DMA

MIPS

4KEc

SYSTEM

CONTROLLER

80C51

PCI_XIO

CAI

MCU_DDR

DMA BUS

DCS-NETWORK

DDR2-SDRAM

I2C-2

I2C-3

EJTAG

PNX8543x

UART-1

UART-2

I2C-MC

UART-3

PWMs

GPIOs

CI/CA

PCI/XIO

EJTAG

USB2.0USB

AVD SP

IIC4_DMA

I2C-1

EN 49Q549.2E LA 7.

The Connectivity Subsystem consists of:

• PCI/XIO interface

• USB2.0 interface

• Three 2-wire UARTs

• Four Master/Slave I

• Common Interface/Conditional Access Interface.

2

C interfaces

The Computing Subsystem consists of:

• 32-bit MIPS RISC core

• Enhanced JTAG (EJTAG) block inside the MIPS

• JTAG_MMIO blocks

•TV controller

• Audio/Video DSP (AV_DSP)

• Memory Control Unit (MCU).

7.5.4 Service Notice - FLASH RAM / PNX8543 exchange

The FLASH RAM (item 7P10) and/or PNX8543 (item 7H00) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+)

Figure 7-10 PNX8543 connectivity and compute subsystem

keys in the components, unauthorised exchange of these components will always result in a defective board.

2009-May-08

EN 50 Q549.2E LA7.

CAM

PNX8543

TS-INPUT

Transport Streams

CA-Control

CA-MDI

CA-MDO

CA-CTRL

PCI/XIO

Proprietary CA scrambling

CI + Standardised CCS scrambling

DES/AES

descrambler

MHEG MMI

application

Matrix

tuner

channel

decoder

DES/AES

scrambler

CA clien t

MHEG CI+

decoder

demux

(SC)

Command interface

Transport stream

interface

18440_221_090227.eps

090227

Circuit Descriptions

7.6 Common Interface CI+

Together with this platform, an extention to the Common Interface (CI) Conditional Access system is added, called CI+.

CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.

The weakness of the conventional CI module as Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional

Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.

The CI+ standard is downwards compatible with the existing CI standard.

The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

Figure 7-11 CI+ Conditional Access implementation

7.7 Net TV

In this chassis, a feature that enables access to dedicated internet pages from a limited group of information suppliers,

7.8 Ambi Light

The Ambi Light architecture in this platform has been entirely renewed. The characteristics are:

• Additional DC/DC board generating 12/16/24 V (optional)

• ARM processor (on DC/DC panel or AL board)

• Low-power LEDs

• SPI interface from ARM to LED drivers

•I

• Each AL module has a temperature sensor.

2

C upgradeable via USB

2009-May-08

called “Net TV”, is introduced. A separate Wi-Fi module enables wireless communication with a local network.

The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards.

Refer to Figure 7-12

for the Ambi Light architecture.

Circuit Descriptions

18310_203_090317.eps

090317

18310_204_090318.eps

090318

ARM

SDA

SCL

SEL1

SEL2

SPI C LOCK

SPI LATCH

SPI D ATA OU T

SPI DATA RETURN

PWM CLOCK

BLANK

PROG

SPI LA TCH 2 (only on dc/dc for aurea)

C S EEPROM

TEM P

Scl1

Sd a1

tb d

Sck

P0.7

MOSI

MISO

P0.8

TxD

RxD

Rxd0

Txd 0

MAT0.0

MAT1.0

tb d

P0.10

18310_205_090318.eps

090318

Amb ilig ht modu le 1 Am b ilight m odule 2 Amb iligh t mo du le N

ARM

LED

DRIVER

1

LED

DRIVER

2

LED

DRIVER

N

SPI data in

S o ut S in S o ut S o u tS in

SPI clo ck (S CLK) SPI la tch (XL AT)

PRO G (VPRG ) BLANK PW M CLOC K ( GSCLK)

o ut16

SPI d ata retu rn

Figure 7-12 Interface between Ambi Light and SSB

EN 51Q549.2E LA 7.

7.8.1 ARM controller

Refer to Figure 7-13

below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).

Figure 7-13 ARM controller interface

Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.

The SPI bus is a synchronous serial data link standard that operates in full duplex mode.

For debugging purposes, the working principle is given below:

• At startup the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN)

• Before operation, the driver current is set via SPI, with driver in DC mode

• During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I

• The controller converts the I

2

C RGB data via the matrixes

to SPI LED data

• Via data return the controller receives error data (if applicable).

Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I USB). The controller can receive matrix values via I will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.

7.8.2 LED driver communication (via SPI bus)

Refer to Figure 7-14

below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.

2

C (via

2

C, which

2

C

2009-May-08

EN 52 Q549.2E LA7.

18310_206_090318.eps

090318

Amb iligh t mod ule 1 Am b ilight m odule 2

ARM

TEMP

SENS OR

Vcc

Pull-upPull-upPull-up

TEMP

SENS OR

Vcc

Amb iligh t mod ule N

TEMP

SENS OR

Vcc

Figure 7-14 SPI communication between ARM controller and LED drivers

The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below:

• Data from the ARM controller is linked through the drivers, which are connected in cascade

• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver

• SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data.

7.8.3 Temperature Control

Circuit Descriptions

Refer to Figure 7-15

for signal interfacing between the ARM

controller and the temperature sensor on the AL boards.

Figure 7-15 Communication between ARM controller and

temperature sensor

Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.

2009-May-08

8. IC Data Sheets

Pin Configuration

Block Diagram

18250_300_090319.eps

090319

VBST1

NC

EN1

VO1

VFB1

NC

GND

TEST1

NC

VFB2

VO2

EN2

NC

VBST2

DRVH1

LL1

DRVL1

PGND1

TRIP1

VIN

VREG5

V5FILT

TEST2

TRIP2

PGND2

DRVL2

LL2

DRVH2

28

27

26

25

24

23

22

21

20

19

18

17

16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TPS5 3124

15

IC Data Sheets

EN 53Q549.2E LA 8.

8.1 Diagram SSB: DC/DC B01A, TPS53124PW (IC 7U03)

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

electrical diagrams (with the exception of “memory” and “logic” ICs).

Figure 8-1 Internal block diagram and pin configuration

2009-May-08

EN 54 Q549.2E LA8.

Block Diagram

Pin Configuration

18440_300_090303.eps

090303

DVB-T/QAM/ATV

Demodulator

Stereo Decoder

System Controller

SAW

Main

Tuner

Presaw

Sense

DVB-T/QAM

FEC

DAC

MPEG-2 TS

CVBS

SIF

I

2

S Audio

I

2

C

GPIO

IF AGC

RF AGC

Integrated Tuner

I

2

C

ADCIF AMP

49XI

50XO

51VSSAH_OSC

52VDDAH_OSC

53VDDH

54VSSH

55VSSL

56VDDL

57TDO

58TMS

59TCK

60TDI

61I2C_SDA2

62I2C_SCL2

63I2S_CL

64I2S_DA

RSTN32

SAW_SW31

GPIO230

VSYNC29

VSSL28

VDDL27

VDDH26

VSSH25

I2C_SDA124

I2C_SCL123

MD722

MD621

MD520

MD4

19

VDDH18

VSSH17

PDP

VDDAL_AFE2

VSSAL_AFE2

SIF

CVBS

VDDAH_CVBS

VSSAH_CVBS

PDN

INP

INN

VSSAH_AFE1

VDDAH_AFE1

VDDAL_AFE1

VSSAL_AFE1

IF_AGC

RF_AGC

VDDL

VSSL

GPIO1

MSTRT

MERR

VSSH

VDDH

I2S_WS

MCLK

MVAL

MD0

MD1

MD2

MD3

VSSL

VDDL

123 45678 910111213 14 15 16

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

DRXK

IC Data Sheets

8.2 Diagram SSB: Front End B02B, DRX3926K (IC 7T50)

2009-May-08

Figure 8-2 Pin configuration

8.3 Diagram SSB: PNX8543 - Stand-by Controller B04A, PNX8543 (IC7H00)

Block Diagram

Pin Configuration

18440_301_090303.eps

090303

TS out/in for

TS in from

CVBS, Y/C,

LVD S for

analog CVBS

analog audio

I

2

S

Dual SPDIF

Low-IF

SSIF, LR

Dual HDMI

SPDIF

CI/CA

MPEG

PRIMARY

LVD S

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

300 MHz

I2C

PWM

GPIO IR ADC UART I2C GPIO Flash

SYSTEM

USB 2.0 CA

PNX8543x

DV INPUT

DV-ITU-656

AV-PIP

SPI

MPEG/H.264

I2S

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

channel decoder

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

DECODER

VIDEO

CPU

MIPS32 4KEc

01 x22 x

AV-D SP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

channel)

(single or dual

flat panel display

DRAWING

ENGINE

DMA BLOCK

PCI 2.2

PNX8543xEH

Transparent top view

1917253 11 19 2771523513 21 29

426121018 26412 22308 20 28614

T

AD

H

AK

P

AB

F

AH

M

Y

D

AF

K

V

B

A

J

R

AC

G

AJ

N

AA

E

AG

L

W

C

AE

U

ball A1 index area

31

32

33

34

AL

AM

AN

AP

IC Data Sheets

EN 55Q549.2E LA 8.

Figure 8-3 Internal block diagram and pin configuration

2009-May-08

EN 56 Q549.2E LA8.

18560_300_090403.eps

090403

Pin Configuration

Block Diagram

PNX51xx

Transparent top view

2468 10 121314

15 171619

18 20

21 23

22 242526

1 3 57911

ball A1 index area

AB

AD

AA

AC

Y

W

V

U

R

N

T

P

M

L

K

J

H

F

D

G

E

C

B

A

AF

AE

LV DS RX 1

UIP L3K7

TM327x 1

CONTROLLER

PCI/XIO

I2C-DMA

UART

CPIPE L3K7

LV DS TX 2

UART

PNX51xx

I2C

TM327x 2

TM327x 3

LV DS TX 3

LV DS TX 1

LV DS TX 4

GFX

16 X GPIO

GIC 3

EJTAG

CLOCK

CAB

Video

LV DS RX 2

AUDIO IN

AUDIO OUT

GIC 1

GIC 2

MEMORY

Video

IC Data Sheets

8.4 Diagram SSB: Ethernet B05A, PNX5120 (IC7C00)

2009-May-08

Figure 8-4 Internal block diagram and pin configuration

8.5 Diagram SSB: Ethernet B07G, DP83816 (IC7N04)

Block Diagram

Pin Configuration

F_15710_167.eps

230905

MAC/BIU

Interface

SRAM

25 MHz Clk

MII RX MII TX MII Mgt

BIOS ROM Cntl BIOS ROM Data

E E / M O R

B

PCI AD

PCI CNTL

PCI CLK

3V DSP Physical Layer

Logic

RX-2 KB

SRAM

TX-2 KB

TPRDP/M

EEPROM/LEDs

X T I I M

X R I I M

t g M

I

I M

n i a t

a d t

s e T

t u o a t a d t s e T

X T I

I M

X R I I M

t g

M I

I M

TPTDP/M

DP83816

r d d A x T

a

t a d

r w x T

r d d A

x R

a t a d r w x R

a t a d

d r x R

a t a d

d r x T

RAM BIST

Logic

SRAM

RXFilter

.5 KB

121

122

123

124

125

126

127

128

129

130

131

132

9 9

8 9

7 9

6 9

5 9

4 9

3 9 2 9

1 9 0

9

9 8

8 8

7 8

6 8

5 8

4 8

3 8

2 8

1 8

0 8

9 7

8 7

7 7

6 7

5 7

4 7

3 7

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

1

2

3

4

5

6 7 8

9

0 1

1 1

2 1

3 1

4 1 5 1

6 1

7 1

8 1

9 1

0 2

1 2

2 2

3 2

4 2

5 2

6 2

7 2

8 2

0 3

1 3

2 3

3 3

9 2

Identification

Pin1

37 38 39 40

120 119 118 117 116 115 114 113 112

110 109

111

N L E S V

E D

N Y D R

T

N Y D R I

N E M A R F

2 N E B C

6 1 D A

7 1 D A

8 1 D A

N P O T S

N R R

E P

N R R E S

R A P

1 N E B C

5 1 D A

4 1 D A

3 1 D A

2 1 D A

1 1 D A

0 1 D A

AD9

S S V

AD8

9 1 D A

0 2 D

A

1 2 D A

2 2 D A 3 2 D A

L E S D I

S S V

D D V I C P

C N

D D V

I C P

C N

S S V

D D V

I C P

3 N E B C

4 2 D A

5 2 D A

AD26

CBEN0

VSS

AUXVDD

RESERVED

VREF

PCIVDD

AD29

AD31

VSS

REQN

GNTN

RSTN

INTAN

AD28

PCICLK

AD30

PMEN/CLKRUNN

VSS

TPTDP

TPTDM

REGEN

IAUXVDD

VSS

TPRDP

TPRDM

VSS

AD27

AD7

AD6

AD5 VSS

MA1/LED10N

MA2/LED100N

I D E E / 3

A M

K L C

E E / 4

A M

5 A M

MWRN

MD4/EEDO

MD3

EESEL

AD0 AD1 AD2 AD3

AD4

MD0

MCSN

MD1/CFGDISN

MD2

MD5

MD6

MD7

MA0/LEDACTN

PCIVDD

S S V

1 C

NC

AUXVDD VSS

O

I D

M

C D M

K L C

X R

6 A M / 0 D

X R

7 A M / 1 D X R

8 A M / 2 D X

R

9 A

M / 3 D

X R

E O X

R

0 1 A

M / R E X R

1 1 A M /

V D X R

5 1 A M / 3 D X T

6 1 A M / L O C

S R C

N E X T

K L C X T

4 1 A M / 2

D X T

3 1 A M / 1 D X T

2 1 A M /

0 D X T

S S V

D D V X U A

S S V

D D V

X U A

2 X

1 X

DP83816

NC

S S V

D D V X U A

NC

3VAUX

6 3 5

3

4 3

67 68 69 70 71 72

0 0 1

1 0 1

2 0 1

3 0 1

4 0 1

5 0 1

6 0 1

7 0 1 8 0 1

144 143 142 141 140 139 138 137 136 135 134 133

VSS

IAUXVDD

PWRGOOD

MRDN

AUXVDD

C N

S S V S S V

D D V X U A

NC

RESERVED

C N

NC

RESERVED

VSS

IC Data Sheets

EN 57Q549.2E LA 8.

Figure 8-5 Internal block diagram and pin configuration

2009-May-08

EN 58 Q549.2E LA8.

Block Diagram

Pin Configuration

18440_302_090303.eps

090303

1F

SD

PVCCL

PVCCR

VCLAMP

GAIN1

BYPASS

1F

0.22 F

AGND

}

Control

Shutdown

Control

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 F

22 H

0.68 F

470 F

0.68 F

1F

470 F

GAIN0

AVC C

MUTE

ROUT

LOUT

TERMINAL

I/O/P DESCRIPTION

24-PIN

NAME

(PWP)

Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to

SD

2I

AVCC

RIN 6 I Audio input for right channel

LIN 5 I Audio input for left channel

GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC

GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC

Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =

MUTE 4 I

outputs enabled). TTL logic levels with compliance to AVCC

BSL 21 I/O Bootstrap I/O for left channel

PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC

LOUT 22 O Class-D 1/2-H-bridge positive output for left channel

PGNDL 23, 24 P Power ground for left-channel H-bridge

VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors

BSR 16 I/O Bootstrap I/O for right channel

ROUT 15 O Class-D 1/2-H-bridge negative output for right channel

PGNDR 13, 14 P Power ground for right-channel H-bridge.

PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC

AGND 9 P Analog ground for digital/analog cells in core

AGND 8 P Analog ground for analog cells in core

Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via

BYPASS 7 O

external capacitor sizing.

AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL

Connect to ground. Thermal pad should be soldered down on all applications to properly

Thermal pad Die pad P

secure device to printed wiring board.

IC Data Sheets

8.6 Diagram SSB: Audio B10A, TPA3123D (IC 7D10)

2009-May-08

PVCCL

SD

PVCCL

MUTE

LIN

RIN

BYPASS

AGND AGND

PVCCR

VCLAMP

PVCCR

1 2 3

4 5 6 7 8 9

10 11 12

24 23 22

21 20 19 18 17 16

15 14 13

Figure 8-6 Internal block diagram and pin configuration

PGNDL PGNDL LOUT BSL AVC C AVC C GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

9. Block Diagrams

Wiring Diagram 32" (Elite Core)

WIRING DIAGRAM 32"

(ELITE CORE)

Block Diagrams

EN 59Q549.2E LA 9.

1M83 (AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

KEYBOARD CONTROL

(1127)

(1074)

AMBI-LIGHT MODULE

5/5

1M01

3P

AL

TO

BACKLIGHT

WIFI ANTENNA

(1044)

8316

LCD DISPLAY

(1004)

8684

8319

8159

WIFI MODULE ON 1A01

(

1042

)

1316

1. HV1

2. N.C.

3. HV1

1319

MAIN POWER SUPPLY IPB 32 PLHL-T826A

(1050)

1. HV2

8150

1G50 (B05C)

41. N.C

40. TXDAT-

39.TXDAT ... ... ...

3. TX2E+

2. SCL-DISP

1. SDA-DISP

1G51 (B05C)

51. N.C.

50. SDA-DISP

49. SCL-DISP ... ... ...

3. +VDISP1

2. +VDISP1

1. +VDISP1

1M20 (B01B)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95 (B01B)

8395

11. N.C

10. GND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99 (B01B)

12. GND

8399

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. BACKLIGHT-PWM...

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

CN4

11. NC

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN5

12. NC

11. NC

10. NC

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

8151

8159

CN7

6. GND

5. +24V

4. GND

3. +24V

2. GND

2. N.C.

3. HV2

CN1

1. N

1. +24V

2. L

8735

- + - +

8408

INLET

1A01

WIFI ANTENNA

(1043)

1M85 (AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

TO

BACKLIGHT

1M59 (B06A)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

SSB

B

(1011)

124P

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

(1076)

AMBI-LIGHT MODULE

5/5

AL

1M83 (AL1)

1735 (B10A)

4. RIGHT-SPEAKER

3. GND-AUDIO

2. GND-AUDIO

1. LEFT-SPEAKER

8735

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

Board Level Repair

Component Level Repair Only For Authorized Workshop

RIGHT SPEAKER

(5214)

8101

2009-May-08

IR LED PANEL

(1112)

1M01

3P

1M20

8P

8120

LEFT SPEAKER

(5213)

18310_400_090305.eps

090421

Wiring Diagram 37" (Elite Core)

1M84

(AL1)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BU

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

1M83

(AL1)

1. SCL

2. GND

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. GND

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

CN1

1. N

2. L

1M20

(B01B)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

8408

WIRING DIAGRAM 37"

(ELITE CORE)

1M59

(B06A)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

SSB

(1150)

B

INLET

MAIN POWER SUPPLY IPB DPS-298CPA B

(1050)

IR LED PANEL

(1112)

LCD DISPLAY

(1004)

1M01

3P

1M20

8P

FUSE

LEFT SPEAKER

(5213)

RIGHT SPEAKER

(5214)

TWEETER

CN4

11. NC

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

1M83

(AL1)

1. SCL

2. GND

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. GND

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

CN5

12. NC

11. NC

10. NC

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

1316

1. HV1

2. N.C.

3. HV1

1319

1. HV2

2. N.C.

3. HV2

TO

BACKLIGHT

TO

BACKLIGHT

1M99

(B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. BACKLIGHT-PWM...

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735

(B10A)

4. RIGHT-SPEAKER

3. GND-AUDIO

2. GND-AUDIO

1. LEFT-SPEAKER

1G50

(B05C)

41. N.C

40. TXDAT-

39.TXDAT ... ... ...

3. TX2E+

2. SCL-DISP

1. SDA-DISP

1G51

(B05C)

51. N.C.

50. SDA-DISP

49. SCL-DISP ... ... ...

3. +VDISP1

2. +VDISP1

1. +VDISP1

1M95

(B01B)

11. N.C

10. GND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

CN7

6. GND

5. +24V

4. GND

3. +24V

2. GND

1. +24V

- + - +- + - +

WIFI ANTENNA

(1044)

WIFI ANTENNA

(1043)

WIFI MODULE ON 1A01

(1042)

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

1M84

(AL1)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BU

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

8395

8399

8735

8316

8319

8684

8802

8150

8151

8735

8120

Board Level Repair

Component Level Repair Only For Authorized Workshop

KEYBOARD CONTROL

(1114)

1M01

3P

1A01

124P

1M90

(AB1)

6. GND

5. +24V

4. GND

3. +24V

2. GND

1. +24V

1M59

(AB1)

7. GND

6. +3V3

5. CONTROL2

4. CONTROL1

3. SDA

2. GND

1. SCL

DC-DC INTERFACE

(1028)

AB

8159

8590

1M84

(AB1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH1CONN

3. SPI-DATA-RETURN

2. SPI-CLOCK-BUF

1. SPI-LATCH2CONN

8584

8101

8585

8802

18310_401_090305.eps

090420

AMBI-LIGHT MODULE

3/3

(1074)

AL

AMBI-LIGHT MODULE

3/3

(1073)

AL

AMBI-LIGHT MODULE

3/3

(1075)

AL

AMBI-LIGHT MODULE

3/3

(1076)

AL

Block Diagrams

EN 60Q549.2E LA 9.

2009-May-08

1M85

(AL4)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BU

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

1M83

(AL1)

1. SCL

2. GND

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. GND

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

CN1

1. N

2. L

1M20

(B01B)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

WIRING DIAGRAM 56" (ELITE CORE)

1M59

(B06A)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

SSB

(1011)

B

INLET

MAIN POWER SUPPLY PSU DPS-411AP3A B

(1050)

IR LED PANEL

(1047)

LCD DISPLAY

(1004)

1M20

3P

1M09

4P

1M01

8P

FUSE

LEFT SPEAKER

(5213)

RIGHT SPEAKER

(5214)

TWEETER

(5215)

CN4

11. NC

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

1M83

(AL1)

1. SCL

2. GND

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. GND

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

CN5

12. GND1

11. I2C_DATA

10. I2C_CLK

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

TO

BACKLIGHT

TO

BACKLIGHT

1M99

(B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. BACKLIGHT-PWM...

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735

(B10A)

4. RIGHT-SPEAKER

3. GND-AUDIO

2. GND-AUDIO

1. LEFT-SPEAKER

1G50

(B05C)

41. N.C

40. TXDAT-

39.TXDAT ... ... ...

3. TX2E+

2. SCL-DISP

1. SDA-DISP

1G51

(B05C)

51. N.C.

50. SDA-DISP

49. SCL-DISP ... ... ...

3. +VDISP1

2. +VDISP1

1. +VDISP1

1M95

(B01B)

11. N.C

10. GND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

CN7

6. GND1

5. +24V

4. GND1

3. +24V

2. GND1

1. +24V

CN9

5. GND1

4. GND1

3. N.C.

2. +12V

1. +12V

- + - +

WIFI ANTENNA (1043)WIFI ANTENNA (1044)

WIFI MODULE ON 1A01

(

1042

)

1M85

(AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

1M84

(AL1)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BU

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

8395

8399

8735

8319

8802

8150

8151

8735

8120

Board Level Repair

Component Level Repair Only For Authorized Workshop

KEYBOARD CONTROL

(1127)

1M01

3P

1A01

124P

1M90

(AB1)

6. GND

5. +24V

4. GND

3. +24V

2. GND

1. +24V

1M59

(AB1)

7. GND

6. +3V3

5. CONTROL2

4. CONTROL1

3. SDA

2. GND

1. SCL

DC-DC INTERFACE

(1028)

AB

8159

8690

1M84

(AB1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH1CONN

3. SPI-DATA-RETURN

2. SPI-CLOCK-BUF

1. SPI-LATCH2CONN

8584

8683

8101

8585

8801

18310_407_090420.eps

090508

AMBI-LIGHT MODULE

4/4

(1075)

AL

AMBI-LIGHT MODULE

3/3

(1082)

AL

AMBI-LIGHT MODULE

4/4

(1070)

AL

AMBI-LIGHT MODULE

3/3

(1071)

AL

1M85

(AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

AMBI-LIGHT MOD. 4/4

(1073)

AL

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

AMBI-LIGHT MOD. 3/3

(1080)

AL

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

AMBI-LIGHT MOD. 3/3

(1076)

AL

TWEETER

(5216)

1M84

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

AMBI-LIGHT MOD. 3/3

(1074)

AL

1M85

(AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BU

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

AMBI-LIGHT MOD. 4/4

(1072)

AL

8586

8583

8587 8588 8589 8590

8408

CN2 / 1319

14. PDIM_Select

13. PWM

12. On/Off

11. Vbri

10. GND3

9. GND3

8. GND3

7. GND3

6. GND3

5. 24Vinv

4. 24Vinv

3. 24Vinv

2. 24Vinv

1. 24Vinv

CN3 / 1316

12. N.C.

11. N.C.

10. GND3

9. GND3

8. GND3

7. GND3

6. GND3

5. 24Vinv

4. 24Vinv

3. 24Vinv

2. 24Vinv

1. 24Vinv

8316

CN2

41P

CN1

51P

CN3

5P

8303

1P09

4P

LIGHT STRIP

(1046)

L

8109

Wiring Diagram 56" (Elite Core)

Block Diagrams

EN 61Q549.2E LA 9.

2009-May-08

Block Diagram Video

VIDEO

FRONT-END

B02A

1T11 HD1816AF/BHXP

B07E

MAIN HYBRID

TUNER

DC_POWER

XTAL_OUT

1

18 2

19

HDMI SIDE

CONNECTOR

1

18 2

19

HDMI 1

CONNECTOR

1

18 2

19

HDMI 2

CONNECTOR

1

18 2

19

HDMI 3

CONNECTOR

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXCBRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXCARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

HDMI SWITCH

1

18 2

19

HDMI 4

CONNECTOR

IF-OUT2

IF-OUT1

RF-AGC

1P05

1P02

1P03

1P04

1P06

10

12

10

12

10

12

10

12

10

12

1

3

4

6

7

9

1

3

4

6

7

9

1

3

4

6

7

9

1

3

4

6

7

9

72

71

69

68

66

65

63

62 42

41

39

36

35

33

32 23

22

20

19

17

16

14

13

1

3

4

6

7

9

11

10

TUN-P1

1

TUN-P9

9

3

TUN-P3

7P02 TDA9996

TUN-P11

TUN-P10

9T18

9T23

9T20

HDMI

SWITCH

VDDx_1V8

VDDO_3V3

VDDx_3V3

VDDH_3V3

D0_+

D0_-

D1_+

D1_-

D2_+

D2_-

C_+

9T11

9T21

3T22

C_-

90

89

87

86

84

83

81

80

8,45,91,24, 75,95 4

46,55

15,21,34,40, 64,70,85,88

2 3

99

100 96

97

93

94

2T19

B-IF-_N-IF- PDP

2T20

5T12

7T10 UPC3221GV

+5V-TUN

AGC AMPLIFIER

1

VCC

2T15

2

5

3

4

IN

4

AGC CONTROL

B08A

EXT 1

EXT 2

B08B

EXT 3

B08C

SIDE

I/O

SVHS IN

B07E

IF-AGC

RF-AGC

ANALOGUE EXTERNALS A

SCART1

ANALOGUE EXTERNALS B

CONNECTOR

ANALOGUE EXTERNALS C

CVBS

HDMI SWITCH

ANTENNA-SUPPLY

+5V-TUN-PIN

+5V-TUN

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

1T25

1

2

SAW 36M125

+1V8-PNX85XX +3V3

+3V3

REF-3V3

16

20

16

20

SCART2

10

5

1

6

VGA

PR

PB

Y

1

7

11

15

21

1

7

11

15

21

15

11

OUT

+5V-TUN

3T98

1E01

1E02

1E05

1E03

1E04

1E11

1E14

1

5

Block Diagrams

CI: PCMCIA CONNECTOR

B07A

PCMCIA

CONDITIONAL

ACCESS

DEMODULATOR

B02B

3T53

47

3T55

PDNB-IF+_N-IF+

7

IF-

6

IF+

7E05

19

8

16

15

7

11

20

7E04

19

7

15

11

20

7E14

16

8

1

2

3

13

14

3

4

2

1T50

27M

7E02 74HC4053PW

MDX

14

7E09

3000

3T50

9,10,11

48

39

40

49

50

34

33

16

5

1

1P00

68P

17

18

33 51

52

7T50 DRX3926K

PD_P

MD

PD_N

SIF

DEMODULATOR

CVBS

XI

XO

IF_AGC

RF_AGC

+5V

CVBS-TER-OUT

Y_CVBS-MON-OUT-SC

REGIMBEAU_CVBS-SWITCH

AV1_STATUS

AV1_BLK

AV1- R

AV1- B

AV1- G

AV1-CVBS

AV3_PB

AV3-PR

AV3- Y

AV2-Y_CVBS

AV2-BLK

AV2-STATUS

R-VGA

G-VGA

B-VGA

H-SYNC-VGA

V-SYNC-VGA

AV4-PR

AV4-PB

AV4- Y

FRONT-Y_CVBS

FRONT-C

HDMIB-RXC+

HDMIB-RXC-

HDMIB-RX0+

HDMIB-RX0HDMIB-RX1+

HDMIB-RX1-

HDMIB-RX2+

HDMIB-RX2-

HDMIA-RX2+

HDMIA-RX2-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RXC+

HDMIA-RXC-

44

43

8,18,26,53

2,16,27,56 37

42

52

36,46

7P15-7P16 74LVC245APW

MDO(0-7)

BUFFER

CA-MDI(0-7)

PCMCIA-VCC-VPP

FE-DATA(0-7)

3T70

7T52

3T70

B08B

B08D

9T61

9T63

+3V3VDDH

+1V2VDDL +3V3AVDDAH_AFE1

+3V3EVDDAH_CVBS

+3V3DVDDAH_OSC

+1V2AVDDAL_AFE

ANALOGUE EXTERNALS B

7E16-7E06

B04A

CONTROL

B04A

CONTROL

B04A

ANALOGUE EXTERNALS D

9EA3

9EA1

9EA2

9EA7

AV1-Y_CVBS

B04A

CONTROL

B04A

CONTROL

20

CA-MDO(0-7)

CVBS4

CVBS-TER-OUT

Y-CVBS-MON-OUT

AV1-PR

AV1-PB

AV1- Y

RREF-PNX85XX

PNX8543:

B04

7H00

+3V3

PNX85439EH/M2

VIDEO STREAMS

B04N

CA_MD0

CA_MDI

TNR_TSDI

ANALOGUE AV

B04K

F2

IF-P

3HK0

AI51

H3

AI44

A3

CVBS1Y_P

J2

AI32

L2

AI22

N2

AI12

G4

AI41

L3

AI23

J3

AI33

N3

AI13

H1

AI42

K4

PC3_AI3

P4

PC1_AI3

M4

PC2_AI3

T1

HSYNCIN

T2

VSYNCIN

K1

PC3_AI1

M1

PC1_AI1

P1

PC2_AI1

H2

AI43

G1

AI54

B04H

A14

HDMI_RXC_B_N

A15

HDMI_RXC_B_P

B13

HDMI_RX0_B_N

B14

HDMI_RX0_B_P

A12

HDMI_RX1_B_N

A13

HDMI_RX1_B_P

B11

HDMI_RX2_B_N

B12

HDMI_RX2_B_P

C16

HDMI_RREF

B15

HDMI_RX2_A_N

B16

HDMI_RX2_A_P

A16

HDMI_RX1_A_N

A17

HDMI_RX1_A_P

B17

HDMI_RX0_A_N

B18

HDMI_RX0_A_P

A18

HDMI_RXC_A_N

A19

HDMI_RXC_A_P

DIGITAL VIDEO IN

EN 62Q549.2E LA 9.

PNX8543

H264

USB 2.0

LVDS

B04O

CLK_P CLK_N

LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P LOUT2_C_N LOUT2_D_P LOUT2_D_N LOUT2_E_P

LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N

IREF_LVDS

VDD

B04P

VDDA_3V3_AADC

VDDA_3V3_ADAC

VDD_3V3_LVDS

VDDA_HDMI_3V3_BIAS

VDD_3V3_SBPER

VDD_1V2_CORE

VDD_1V2_SBCORE

VDD_3V3_PER

VDD_1V8_DDR

CONTROL

B04E

USB_FAULT

USB_DM

USB_DP

USB_RPU

USB_VBUS

CONTROL

B04F

PCI_AD

SDRAM

B04G

M_IREF

M_VREF

AP18

A_P

AN18

A_N

AL18

B_P

AK18

B_N

AP19

C_P

AN19

C_N

AP20

D_P

AN20

D_N

AM20

E_P

AL20

E_N

AM19 AL19

AP22 AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23

AK19

AJ6

AK12

AK20

F16

AC6

AJ12

AF5

AJ21

AG30

AL16

AN16

AP16

AM17

AN17

AA31 AB32

DQ

A

TX851A+

TX851A-

TX851B+

TX851B-

TX851C+

TX851C-

TX851D+

TX851D-

TX851E+

TX851E-

TX851CLK+

TX851CLK-

TX852A+

TX852A-

TX852B+

TX852B-

TX852C+

TX852C-

TX852D+

TX852D-

TX852E+

TX852E-

TX852CLK+

TX852CLK-

VDDA-LVDS

VDDA-DAC

VDDA-ADC

VDDA-LVDS

RREF-PNX85XX

+3V3-STANDBY

+1V2-PNX85XX

1V2-STANDBY

+3V3-PER

1V8-PMNX85XX

USB CONNECTOR

B07C

USB-OC

3H37

+3V3-PER

3H45

+3V3-PER

PNX8543: FLASH

B07F

PCI-AD24<->NAND-AD

PNX8543: SDRAM

B04G

3HJ5

+1V8-PNX85XX DDR2-VREF-CTRL

(0-12)

DDR2-D(0-15)

DDR2-A(0-12)

(16-31)

FPGA WOW - IO BANKS

B06G

7FN0 EP3C25F324C7N

L14 L15 K17 K18 L17 M17

FPGA

L13 M14 P17

WOW

P18 N17 N18

LOCAL

U17

CONTRAST

V17 U15 V15 U14 V14 U13 V14 U11 V11 U10 V10

FPGA LOCAL CONTRAST

B06D

- LVDS IN/OUT

+5V

3P59

+T

USB20-DM USB20-DP

7P10 NAND01GW3B2BN6F

NAND

FLASH

1G

12,37

VCC

7HG0 EDE1116AEBG

DDR2

SDRAM

J1 J2

7HG1 EDE1116AEBG

DDR2

SDRAM

J1

VDDL

J2

VREF

9FG2 9FG3 9FG4 9FG5 9FG6 9FG7

+3V3-NAND

+1V8-PNX85XXVDDL DDR2-VREF-DDRVREF

+1V8-PNX85XX DDR2-VREF-DDR

K5 L5 K2 K1 M2 M1 L2 L1 P2 P1 T3 R3

U2 V3 U4 V4 U6 V6 U5 V5 U7 V7 U8 V8

FPGA WOW - DDR

B06F

7FL0 EDD1216AJTA

MM1-D(0-15)

MM1-A(0-12)

9FG8 9FG9 9FGA 9FGB 9FGC 9FGD

*JUMPERS IN CASE OF NO FPGA

1P07

1

2

CONNECTOR SIDE

3

4321

4

B05B

TXF1A+ RX51001A+

TXF1A- RX51001A-

TXF1B+ RX51001B+

TXF1B- RX51001B-

TXF1CLK+ RX51001CLK+

TXF1CLK- RX51001CLK-

TXF1C+ RX51001C+

TXF1C- RX51001C-

TXF1D+ RX51001D+

TXF1D- RX51001D-

TXF1E+ RX51001E+

TXF1E- RX51001E-

TXF2A+ RX51002A+

TXF2A- RX51002A-

TXF2B+ RX51002B+

TXF2B- RX51002B-

TXF2CLK+ RX51002CLK+

TXF2CLK- RX5100CCLK-

TXF2C+ RX51002C+

TXF2C- RX51002C-

TXF2D+ RX51002D+

TXF2D- RX51002D-

TXF2E+ RX51002E+

TXF2E- RX51002E-

DDR

SDRAM

8Mx16

1

+2V5-DDR1

49

VREF-DDR1

USB 2.0

SW UPLOAD

JPEG

MP3

PNX5100: VIDEO-IN

7C00 PNX5120EH/M2

B05B

AE20 AF20 AC20 AD20 AC19 AD19 AE19 AF19 AE18

PNX5120

AF18 AC18 AD18

AE17 AF17

FHD 100Hz

AC17 AD17 AC16 AD16 AE16 AF16 AE15 AF15 AC15 AD15

LVDS

B05E

RX

HD-NM

B05E

SUPPLY

B05A

LVDS TX

DDR2

VREF

D

A

B05E

AB20

+3V3

AA5

+1V2-PNX5100

L16

+1V8-PNX5100

P22

+1V2-PNX5100-DDR-PLL1

AB18

+3V3-PNX5100-LVDS-IN

J5

+1V2-PNX-TRI-PLL1

L5

+1V2-PNX-TRI-PLL2

T5

+1V2-PNX-TRI-PLL3

M22

+1V2-PNX5100-DLL

AE25

+3V3-PNX5100-DDR-PLL0

E15

+1V2-PNX5100-LVDS-PLL

B15

+3V3-PNX5100-LVDS-PLL

AE14

+1V2-PNX5100-CLOCK

AD14

+3V3-PNX5100-CLOCK

B05A

P24

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-D(0-15)

PNX5100-DDR2-A(0-12)

PNX5100: LVDS

TX1

TX2

N.C.

QUAD LVDS

1920x1080

100/120HZ

TX3

TX4

+VDISP1

PNX5100: SDRAM

7C01 EDE5116AJBG-8E-E

DDR2

(0-12)

SDRAM

7C02 EDE5116AJBG-8E-E

DDR2

SDRAM

(16-31)

VDDL VREF

1G50

I2C

37

38

39

40

41

1G51

51

50

I2C

49

40

11

J1 J2

1

2

3

TO DISPLAY

1080p 50/60Hz

TO DISPLAY

1080p 100/120Hz

5

4

3

2

1

+1V8-PNX5100 PNX5100-DDR2VREF-DDR

18310_402_090305.eps

090324

2009-May-08

B02A

FRONT-END

B02B

DEMODULATOR

B07A

CI: PCMCIA CONNECTOR

B04

PNX8543:

B07D

HDMI

B07E

HDMI SWITCH

B04G

PNX8543: SDRAM

B07F

PNX8543: FLASH

B07C

USB CONNECTOR

B04I

PNX8543: AUDIO

B04I

PNX8543: AUDIO

B10A

AUDI O

B04M

PNX8543: AUDIO

B08C

ANALOGUE EXTERNALS C

B08C

ANALOGUE EXTERNALS C

B08B

ANALOGUE EXTERNALS B

B08A

ANALOGUE EXTERNALS A

B07B

AUDIO IN HDMI

1E07

1E10

DDR2

SDRAM

7HG0 EDE1116AEBG

DDR2

SDRAM

7HG1 EDE1116AEBG

TUN-P11

IF-AGC

RF-AGC

TUN-P10

9T23

9T18

9T11

9T21

5

4

1T25

SAW 36M125

2T15

2T17

2T19

2T20

3T98

3T53

3T55

3052

3T50

5T12

1T11 HD1816AF/BHXP

IF-OUT2

+5V

RF-AGC

DC_POWER

+5V-TUN-PIN

+5V-TUN

9

IF-OUT1

MAIN HYBRID

TUNER

10

11

2

3

4

7

6

34

50

39

40

49

47

48

B-IF-_N-IF- PDP

IF-

44

IF-P

IF+

PDNB-IF+_N-IF+

TUN-P9

3

TUN-P3

ANTENNA-SUPPLY

TUN-P1

1

2

7T50 DRX3926K

DEMODULATOR

+5V-TUN

7T10 UPC3221GV

AGC AMPLIFIER

1

IN

VCC

OUT

AGC CONTROL

1

3T70

43

CVBS4

3T70

7T52

9T20

3T22

33

1T50

27M

7H00 PNX85439EH/M2

VIDEO STREAMS

B04N

AUDIO

B04L

STANDBY CONTROLLER

B04A

DIGITAL VIDEO IN

B04H

SDRAM

B04G

CONTROL

B04E

CONTROL

B04F

F2

H3

B18

A18

A19

3

HDMIB-RXC-

HDMIB-RX0+

HDMIB-RX0HDMIB-RX1+

HDMIB-RX1-

HDMIB-RX2+

HDMIB-RX2-

2

100

99

97

96

94

93

HDMIB-RXC+

B17

A17

B16

B15

A16

A13

B11

B12

A12

B14

A15

A14

B13

7P02 TDA9996

HDMI

SWITCH

C_-

C_+

D0_-

D0_+

D1_-

D1_+

D2_-

D2_+

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXCBRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXCARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

72

71

69

68

66

65

63

62 42

41

39

36

35

33

32 23

22

20

19

17

16

14

13

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

90

89

87

86

84

83

81

80

19

1

18 2

1

1P05

3

4

7

9 10

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

HDMI SIDE

CONNECTOR

19

1

18 2

1

1P02

3

4

7

9 10

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

HDMI 1

CONNECTOR

1

1P03

3

4

7

9 10

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

9 10

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

19

1

18 2

HDMI 2

CONNECTOR

19

1

18 2

HDMI 3

CONNECTOR

1

1P06

3

4

7

9 10

12

6

HDMIA-RX2+

HDMIA-RX2-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RXC+

HDMIA-RXC-

19

1

18 2

HDMI 4

CONNECTOR

PNX8543

H264

USB 2.0

7P10 NAND01GW3B2BN6F

NAND

FLASH

1G

18310_403_090305.eps

090313

PCI-AD<->NAND-AD

FE-DATA(0-7)

(0-12)

DDR2-D(0-15)

(16-31)

DDR2-A(0-12)

4321

USB20-DM USB20-DP

USB 2.0

CONNECTOR SIDE

SW UPLOAD

JPEG

MP3

1P07

3

1

4

2

AL16

AN16

AP16

USB-OC

AN14

AP13

1735

1

2

SPEAKER-L

3

4

SPEAKER-R

+AUDIO-L

-AUDIO-R

ADAC(1)

ADAC(2)

RESET-AUDIO

AD1

AC5

ADAC(4)

AUDIO-HDPH-L-AP

AUDIO-HDPH-R-AP

ADAC(3)

Headphone Out 3.5mm

AM12

AM11

7HV0 TPA6111A2DGN

HEADPHONE

AMPLIFIER

1

7

2

6

5

RESET-AUDIO

A-PLOP

B08A

7D10 TPA3123D2PWP

CLASS D

POWER

AMPLIFIER

OUT-L

OUT-R

5

6

22

15

IN-R

IN-L

MUTE

SD

AUDIO-MUTE

4

2

A-STBY

B08B

STANDBY &

PROTECTION

7D03

LEFT-SPEAKER

RIGHT-SPEAKER

AUDIO-IN5-L

AUDIO-IN5-R

AL9

AL8

AN7

AP7

AK6

AL6

AP6

AM5

AN5

AP5

1E11

AUDIO IN

L+R

1E04

AUDIO-OUT-R

AUDIO-OUT-L

AN11

AP10

AUDIO OUT

L+R

V1

DIGITAL

AUDIO

OUT

ADAC(5)

ADAC(6)

SPDIF-OUT

8

14

10

12

7E10

A-PLOP

B04M

EXT 3

SIDE

I/O

AUDIO-CL-L

A-PLOP

173

5

8

6

4

5

ADAC(7)

ADAC(8)

AUDIO-IN3-L

AUDIO-IN3-R

AM6

AN6

AUDIO IN

L+R

1E03

EF

7HM2-1

EF

7HM2-2

ADAC2

ADAC1

1E15

2

3

1

7HVA-1 7HVA-2

EF

7E03

1

1E01

3

6

AP-SCART-OUT-L

AP-SCART-OUT-R

2

AV1-AUDIO-R

AV1-AUDIO-L

EXT 1

EXT 2

1

1E02

3

2

6

AP-SCART-OUT-L

AP-SCART-OUT-R

AUDIO-IN2-R

AUDIO-IN2-L

20

21

1

7

11

15

16

SCART1

SCART2

A-PLOP

7E01

A-PLOP

B04M

20

21

1

7

11

15

16

1P0A

1P0B

AUDIO-IN4-L

AUDIO-IN4-R

AUDIO IN

VGA

DVI -> HDMI

7HM1

AUDIO-CL-R

3EA8

3EA7

2

AUDIO

9EA4

AUDIO-IN1-L

AUDIO-IN1-R

PCMCIA

CONDITIONAL

ACCESS

CA-MDO(0-7)

MDO(0-7)

CA-MDI(0-7)

20

+3V3

CA_MD0

CA_MDI

7P15-7P16 74LVC245APW

BUFFER

33 51 52

18

17

1P00

68P

PCMCIA-VCC-VPP

PD_P

PD_N

XI

XO

IF_AGC

RF_AGC

CVBS

SIF

MD

3T56

ANALOGUE AV

B04K

HDMI_RX1_B_P

HDMI_RX2_B_N

HDMI_RX2_B_P

HDMI_RREF

HDMI_RX1_B_N

HDMI_RX0_B_P

HDMI_RXC_B_P

HDMI_RXC_B_N

HDMI_RX0_B_N

HDMI_RX0_A_P

HDMI_RXC_A_N

HDMI_RXC_A_P

HDMI_RX0_A_N

HDMI_RX1_A_P

HDMI_RX2_A_P

HDMI_RX2_A_N

HDMI_RX1_A_N

C16

RREF-PNX85XX

3HK0

VDDx_1V8

8,45,91,24, 75,95

+1V8-PNX85XX

VDDO_3V3

4

+3V3

VDDx_3V3

46,55

+3V3

VDDH_3V3

15,21,34,40, 64,70,85,88

REF-3V3

8,18,26,53

+3V3VDDH

2,16,27,56

+1V2VDDL

37

+3V3AVDDAH_AFE1

42

+3V3EVDDAH_CVBS

52

+3V3DVDDAH_OSC

36,46

+1V2AVDDAL_AFE

AJ21

+3V3-PER

VDD_3V3_PER

AG30

1V8-PMNX85XX

VDD_1V8_DDR

AJ12

+1V2-PNX85XX

VDD_1V2_CORE

AC6

+3V3-STANDBY

VDD_3V3_SBPER

F16

RREF-PNX85XX

VDDA_HDMI_3V3_BIAS

AK20

VDDA-LVDS

AK12

VDDA-ADC

AJ6

VDDA-DAC

VDD_3V3_LVDS

VDDA_3V3_ADAC

VDDA_3V3_AADC

AF5

1V2-STANDBY

VDD_1V2_SBCORE

VDD

B04P

J2

DDR2-VREF-DDRVREF

VREF

J2

DDR2-VREF-DDR

J1

+1V8-PNX85XXVDDL

VDDL

J1

+1V8-PNX85XX

12,37

+3V3-NAND

VCC

AM17

+3V3-PER

USB_RPU

3H37

AN17

+3V3-PER

USB_VBUS

3H45

USB_FAULT

USB_DP

USB_DM

AI51

AI44

+5V

3P59

+T

IN-1

SHUTDOWN

IN-2

8

+3V3

VDD

VO_1

VO_2

AIN_4_L

AIN_4_R

ADAC7

ADAC8

AIN_1_R

AIN_2_L

AIN_2_R

AIN_3_L

AIN_5_L

AIN_5_R

AIN_3_R

SPDIF_OUT

ADAC5

ADAC6

AIN_1_L

PO_7

PO_6

ADAC3

ADAC4

AADC

VREF_POS

AN8

AM9

VDDA-AUDIO

VDDA_3V3_DAC

AK9

VDDA-DAC

5HRW

5HRZ

PVCC_L

PVCC_R

1,3

10,12

+AUDIO-POWER

5D07

5D08

AB32

DDR2-VREF-CTRL

AA31

+1V8-PNX85XX

M_VREF

DQ

PCI_AD

A

M_IREF

3HJ5

Block Diagram Audio

Block Diagrams

EN 63Q549.2E LA 9.

2009-May-08

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

B07G

ETHERNET

7N04 DP83816AVNGNOPB

PHYTER II

10/100 Mb/S

60

62

9H25

RESET-mPCI

MINI PCI CONNECTOR

FOR WIFI PANEL

L3

B05A

PNX5100-DDR2-D(0-31)

PNX5100-DDR2-CLK_P

P26

PNX5100-DDR2-CLK_N

P25

AF24

AE13

1CD0

AF13

AF14

B26

A26

BOOST-C T R L

E18

F18

B06F

MM1-D(0-15)-->DQ1(0-15)

A2

A1

B06E

D1

H4

E2 H3

17

MAC

1N02

18

61

1A01

1

MINI PCI CONNECTOR

68

PCI-CLK-PNX5100

PCI-AD(24-31)

IRQ-PCI

PC1-GNT-MINI

PNX5100: SDRAM

DDR2-A(0-12)

RESET-PNX5100

27M

CLK-OUT-PNX5100

LCD-PWR-ON

BACKLIGHT-PWM-ANA-DISP

7CG8

BACKLIGHT-BOOST

9CG8

BACKLIGHT-CONTROL-FPGA-IN

CLK-OUT-PNX5100

FPGA WOW - DDR

MM1-A(0-11)

MM1-CLK+

MM1-CLK-

FPGA WOW - POWER & COTROL

ASDO

DCLK

nCSO

DATA0

B09A

MINI PCI CONNECTOR

B05

PNX5100:

B06G

FPGA WOW - IO-BANKS:

PCI-CLK-ETHERNET

B04F

RESET-ETHERNET

B04A

7C00 PNX5120EH/M2/F4

B05G

B05A

B05F

B05H

7FN0 EP3C25F324C7N

B06G

1N00

ETHERNET

CONNECTOR

PCI_XIO

DDR2

PNX5120

CONTROL

GPIO

A24B23

I/O BANK

FPGA

WOW

BACKLIGHT-CTRL

25M

PCI-AD(0-31)

B04A

7C01 EDE5116AJBG

7C02

EDE5116AJBG

SDRAM

J8

K8

7FL0 EDD1216AJTA

DDDR

SDRAM

8Mx16

45

46

7P10 NAND01GW3B2BN6F

5

6

NAND

1

FLASH

2

(1G)

Block Diagrams

B07A

CI: PCMCIA CONNECTOR

PCMCIA

CONDITIONAL

ACCESS

B07F

PNX8543: FLASH

WP-NANDFLASH

B07C

USB CONNECTOR

B04B

PNX8543: DEBUG

B04A

PNX8543: STANDBY CONTROLLER

B05H

B01B

B07D

HDMI

1P00

1

COMMON INTERFACE

68

USB 2.0

CONNECTOR

SIDE

1

19

4x HDMI

CONNECTOR

2

18

PCMCIA-D(0-7)

1P07

1

2

3

4 3 21

4

TO PIN:

1P04-13 1P03-13 1P02-13 1P05-13

1P04-15 1P03-15

1P02-15 1P05-15

CA-MDI(0-7)

MOCLKA

MDO(0-7) CA-MDO(0-7)

B07H

PCMCIA-A(0-14)

IRQ-CA

PCI-GNT-B

7P10 NAND01GW3B2BN6F

NAND

19

FLASH

(1G)

2H07

SDM

2H06

SPI-PROG

+3V3-STAN D B Y

PCEC-HDMI

ARX-DDC-SCL BRX-DDC-SCL

CRX-DDC-SCL

DRX-DDC-SCL

7P15-7P16

BUFFERING

7N13

PCI-AD(24-31)

7N11 7N12

NAND-AD(0-7) <-- PCI-AD(24-31)

7

9

DETECT-12V

B01B

B04A

B04E

B08A

7HD0 NCP303LSN30G

2

INP

3

GND

7P02 TDA9996

57

12 31

61

79

B07E

OUTP

7P

32

CONTROL

SWITCH

HDMI

EN 64Q549.2E LA 9.

CA-MICLK

CA-MOCLK_VS2

CA-DATADIR CA-DATAEN

CA-ADDEN

PCI-AD(0-14)

XIO-SEL-NAND

9H13

RESET-SYSTEM

+3V3-STANDBY

3HD4

1

PCI-AD(0-31)PCI-AD(0-31)

XIO-ACK

IRQ-CA

IRQ-PCI

USB-OC

USB20-DM

USB20-DP

SPI-PROG

DETECT2

DETECT1

AV1- BLK

AV2- BLK

AV1- STATU S

AV2- STATU S

RESET-STBY

CEC-HDMI

HDMIB-RX

HOTPLUG-A

SDM

B04

7H00 PNX85439EH/M2

H32

A34

H31

D31 A31

B31

J34

E29

A20

B20

L34

U4

AL16

AN16 AP16

AD2

AG2

AK2

AD3

AD4

AH3

AH1

AH2

AP2

AP1

AF3

AG4

D19

PNX8543:

TUN_CA

B04N

CA_MICLK

CA_MDI

CA_VSN_0

CA_MOCLK

CA_MDO

CA_DATA_DIR CA_DATA_EN

CA_ADD_EN

CA_RDY

PCI

B04F

GNT_B

PCI_AD

XIO_ACK

XIO_SEL_0

CONTROL

B04E

GPIO_3

GPIO_2

USB_FAULT

USB_DM USB_DP

STANDBY

B04A

P0_5

P1_7

P6_4

P2_5

P2_4

P3_3

P3_5

P3_4

CADC_2

CADC_3

RESET_IN

P1_2

HDMI_DV

B04H

HDMI_RX

HOT_PLUG_A

PNX8543

TNR_TSDI

TNR_MICLK

TNR_MIVAL

TNR_MISTRT

LVD S

B04O

LOUT2_CLK_N

LOUT2_CLK_P

MEMORY

B04G

M_CLK_P

M_CLK_N

PLL_OUT

GPIO_1

GPIO_6

RESET_SYS

GPIO_4

GPIO_5

UA_RX_0

UA_TX _1

CADC_1

PWM_1

PWM_0

CADC_0

XTAL_O

SPI_CLK

SPI_CSB SPI_SDO

SPI_SDI

CLK_N CLK_P

M_DQ

M_A

CLK

P1_0

P0_3

P0_6

P0_7

P2_2

P2_7

P1_1

P2_6

P0_2

P2_3

P0_1

XTAL_I

P6_5

B10 C10 B9

AL23

AM23 AL19

AM19

AB34

AB33

AP28

A30

U3

V2

AN28

L32

L31

AG1

AH5

AN2

AF2

AJ2

AB2

AJ3

AN3

AD1

AC5

AE1

AE4

AF1

AE5

AB3

AD5

AC1

W1

W2

AJ1

AK4

AK3 AJ4

AK1

B02A

FRONT END

7303 DRX3926K-XK-A3

FE-DATA(0-7)

FE-CLK

FE-VALID FE-SOP

TX852CLK-

TX852CLK+

TX851CLK-

TX851CLK+

B04G

PNX8543: SDRAM

DDR2-D(0-31)

DDR2-A(0-12)

DDR2-CLK_P

DDR2-CLK_N

B03G

PNX8543: CONTROL

PCI-CLK-OUT

WC-EEPROM-PNX5100

PNX8543-LCD-PWR-ON_SPI-DI

B04A

PNX8543: STANDBY CONTROLLER

REGIMBEAU_CVBS-SWITCH

27M

1HF0

SPI-SDI

DEMODULATOR

9

10

5

7HG0 EDE1116AEBG

J8

K8

3HFG

PCI-CLK-ETHERNET

3HFH

PCI-CLK-PNX5100

3HF4

3HF2

PCI-CLK-PNX8535

RESET-SYSTEM

RXD-UP

TXD-UP

RESET-ETHERNET

RESET-AUDIO

AUDIO-MUTE

LAMP-ON

ENABLE-3V3

POWER-OK

RESET-PNX5100

STANDBY

RESET-NVM

SPI-CLK

SPI-WP

SPI-CSB SPI-SDO

B06G

7HG1

EDE1116AEBG

SDRAM

PCI-CLK-MINI

LED2

LED1

7HC4

49

50

32

B07B

B02BB02B

B07G

B04M

B10A

B01A

B08A

B05F

1304

RESET-SYSTEM

B07G

B05G

B09A

B04A B04B

B01B B01C

7HC3 M24C64-WDW6P

8

EEPROM

7H02 M25P05-AVMN6P

6

3

1

STANDBY

5

2

27M

LIGHT-SENSOR

9H25

RC_UP

KEYBOARD

(8Kx8)

512K

FLASH

SW

B03G

B05F

B08D

B01B

B07A

B05H

PNX5100: CONTROL

7CD0 M24C08-WDW6P

7

ANALOGUE EXTERNAL D

9E05

9E41

9E03

9E40

RES

DC / DC

RC

+3V3-STANDBY

7U11

BACKLIGHT-OUT

BACKLIGHT-BOOST

BACKLIGHT-PWM-ANA-DISP

EEPROM

(2Kx8)

1E06

3

2

1

+5V

UART

SERVICE

CONNECTOR

1E50

3

STANDBY

3

RES

1M20

1

2

3

4

IR/LED PANEL

5

KEYBOARD CONTROL

6

7

8

1M99

5

6

POWER SUPPLY

7

9

8

1M95

2

POWER SUPPLY

18310_404_090305.eps

UP

TO

AND

TO

090327

2009-May-08

Block Diagram I2C

Block Diagrams

EN 65Q549.2E LA 9.

I²C

B04E

7H00 PNX85439EH

PNX8543: CONTROL

SDA 3

SCL 3

PNX8543

B04G

MEMORY

M_DQ

M_A

B04H

DDC_SDA_B

DDC_SCL_B

HDMI_DV

DDC_SDA_A

DDC_SCL_A

B04F

PCI

HDMI

B07D

3P77

49 50

7P02

TDA9996

HDMI

MUX

ERR

23

6

5

HDMI SWITCH

3P30

56

7P07

M24C02

EEPROM

256x8

+3V3-PER

3HPM

3P76

3P31

3HPK

11

12

30

31

60

61

78

79

+5V-DDC

3P61

+5V-DDC

3P64

+5V-DDC

3P68

+5V-DDC

3P66

+5V-DDC

3P29

3P58

ARX-DDC-SDA

ARX-DDC-SCL

3P63

BRX-DDC-SDA

BRX-DDC-SCL

3P67

CRX-DDC-SDA

CRX-DDC-SCL

3P65

DRX-DDC-SDA

DRX-DDC-SCL

3P28

ERX-DDC-SDA

ERX-DDC-SCL

9P29-4

9P29-3

1P04

1P03

1P02

1P05

1P06

1M96

16

15

16

15

16

15

16

15

16

15

5

6

HDMI

CONNECTOR 3

HDMI

CONNECTOR 2

HDMI

CONNECTOR 1

HDMI

CONNECTOR

SIDE

HDMI

CONNECTOR 4

RES

SSB BUS

400 kHz

B04G

3HPJ

3HPH

PNX8543: SDRAM

7HG0 EDE1116AEBG

7HG1 EDE1116AEBG

SDRAM

SDA-SSB

SCL-SSB

DDC-SDA

DDC-SCL

G32

SDA3

D33

SCL3

ERR

13

DDR2-D

DDR2-A

D15

C15

B07E

E19

C18

B07F

PCI-AD

DDCA-SDA

DDCA-SCL

PNX5100: SDRAM

7P10 NAND01GW3B2BN

FLASH

1G

9P19

9P20

DEMODULATOR

B02B

3T58

24 23

DRX3926K

DEMODULATOR

MICRONAS

ANALOGUE EXTERNALS B

B08B

3T57

7T50

ERR

27

10

15

5

1

6

11

VGA

CONNECTOR

FRONT-END

B02A

9T16

+3V3

9T15

3T61

3T59

+5VDCOUT

3E70

9T71

9T70

3E47

61

62

1E05

12

15

RES

TUN-SDA

TUN-SCL

DATA -SDA

CLK-SCL

TUNER BUS

400 kHz

5

6

7E18 M24C02

EEPROM

3T16

3T15

256x8

TUN-P7

TUN-P6

76

1T11

HD1816AF

MAIN

TUNER

ERR

34

PNX5100: CONTROL

B05F

3CD8

K1 K2

7C00

PNX5120EH

PNX5120

FHD 120Hz

15

3CD7

ERR21ERR

L1

L2

PNX5100-DDR2-D(0-31)(0-31)

PNX5100-DDR2-A(0-12)

3CDD

3CDC

56

7CD0

M24C08

BOOT

EEPROM

ERR

25

3CDA

3CD9

FPGA WOW

B06E

POWER & CONTROL

FPGA WOW - DDR

B06F

PNX5100: SDRAM

B05A

7C01 EDE5116AJBG

7C02 EDE5116AJBG

7FH0 M25P16

FLASH

7FL0 EDD1216AJTA

SDRAM

8Mx16

AMBILIGHT BUS

30 kHz

SDA-AMBI-3V3

SCL-AMBI-3V3

SDRAM

16M

DDR

MM1-D

MM1-A

FPGA WOW - IO BANKS

B06G

3FNF

3FNG

G17 G18

7FN0

EP3C25F324C7N

FPGA

LOCAL

CONTRAST

ERR

29

PNX8543: VIDEO STREAMS

B04N

9FNA

D18

9FN9

C18

3HB2

3HB1

FPGA BACKLIGHT - LVDS & I2C - MUX

B06A

3F23

3F22

54 53

7F00

XC3S250E

SPARTAN-3

FPGA

+3V3

3FAB

I2C-SDA

I2C-SCL

9F22

9F21

+3V3

3FA6

3FA5

B07F

3FAA

PNX8543: FLASH

7F01 M25P20

2M

FLASH

1M59

1M97

15

14

3

1

3

AMBI-LIGHT

4 5

7

TO

MODULE

ANALOGUE EXTERNALS D-

B08D

3U67

3U66

1HP0

3

1

RESERVED

SDA

SCL

B04A

STANDBY

SDA 2

SCL 2

SDA 1

SCL 1

MC_SDA

MC_SCL

PO_1

ERR

53

UA_RX_0

UA_TX_1

B33

D32

H33

F33

AK5

AL5

AC1

AG1

AH5

SDA2

SCL2

ERR

14

SDA1

SCL1

RESET-NVM

SET BUS

100 kHz

3HPU

SDA-SET

3HPS

SCL-SET

STANDBY BUS

400 kHz

3HPE

SDA-UP-MIPS

3HPD

SCL-UP-MIPS

PNX8543: STANDBY CONTROLLER

B04A

3H66

SDA-UP-MIPS

3H55

SCL-UP-MIPS

+3V3-PER

3HC2-1

7H02 M25P05

512K

FLASH

RXD-UP

TXD-UP

3HC2-2

7HC4

EF

3H53

56

8

M24C64

EEPROM

7HC3

(NVM)

3H52

+3V3-PER

3HPT

3HPV

+3V3-PER

3H50

3H49

+3V3-STANDBY

3H53

+3V3-STANDBY

3H58

3H60

+3V3-PER

RES

DC/DC

B01B

ANALOGUE EXTERNAL D

B08D

B04A

3E08

3U67

3U66

RES

7E20

1M99

11

TO

POWER

10

SUPPLY

UART-SWITCH

UART-SWITCHn

TEMPERATURE & FAN CONTROL

B06C

3F61

3F62

12

7F50

LM75ADP

IC TEMP

SENSOR

7E19 74HC4066PW

QUAD BILATERAL SWITCHES

6

13

5

12

3

10

FPGA BACKLIGHT - LVDS & I2C - MUX

B06A

9F20

1F53

3F17

3F67

3F66

76

7F51

PCA9533DP

I2C LED DIMMER

+3V3

RESERVED

2

9

FOR

4

1

8

11

MHP BOLT-ON

3ECK

3ECP

1R12

1R08

RXD-UP

TXD-UP

2

RXD-UP

TXD-UP

3

2

RXD-UP

TXD-UP

3

3F18

3F41

3F40

5F05

9E05

9E03

1M71

2

3

1

4

2

TO

TEMP

SENSOR

12

11

7E17 ST3232C

9E41

9E40

RS232

INTERFACE

T1-OUT

R1-OUT

T1-IN

T2-OUT

9FA2

21

7F08

PCA9540BDP

I2C

MULTIPLEXER

13

R1-IN

14

8

R2-IN

7

9FA1

4

SDA-SET0

5

SCL-SET0

7

SDA-SET1

8

SCL-SET1

1E50

3

UP

1

1E51

3

MIPS

1

9F19

9F18

9F17

9F15

9F13

SDA-BOLT-ON

SCL-BOLT-ON

9F16

9F14

SDA-DISP

SCL-DISP

+3V3

3F39

3F38

+3V3

3F37

3F36

DISPLAY BUS

100 kHz

FPGA LOCAL CONTRAST

B06D

LVD S IN/OUT

3FH4

3FH5

PNX5100: LVDS

B05E

3CA3

3CA2

3CA4

3CA5

1F51

1G50

1G51

1R08

3E83

6

3E84

1

TO

2

DISPLAY

2

TO

1

DISPLAY

50

TO

49

DISPLAY

TO BOLT-ON

5

MODULE

RESERVED

GPIO_4

GPIO_5

UA2_RX

UA2_TX

L32

L31

AL27

AK27

RXD-MIPS

TXD-MIPS

RXD-MIPS2

TXD-MIPS2

3HPC

+3V3-PER

3HPR

3HPL

3HPP

LED PANEL CONTROL

B06B

5FC7

5FC5

1R20

9

R2-OUT

10

T2-IN

LEVEL SHIFTER FOR

DEBUG ONLY

3

1

RES

9E35

9E36

RXD

TXD

RESERVED

3E41

3E91

1E06

3

2

1

UART

SERVICE

CONNECTOR

18310_405_090305.eps

090316

2009-May-08

SUPPLY LINES OVERVIEW

MAIN

POWER SUPPLY

B01A

DC/DC

B01B

DC / DC

B02B

DEMODULATOR

B04A

PNX8543: STANDBY CONTROLLER

B04B

PNX8543: DEBUG

B04E

PNX8543: CONTROL

B04F

PNX8543: CONTROL

B04G

PNX8543: SDRAM

B04H

PNX8543: DIGITAL VIDEO IN

B04I

PNX8543: AUDIO

B01C

DC/DC

B02A

FRONT-END

A

SUPPLY

B04M

PNX8543: AUDIO

B04N

PNX8543: VIDEO STREAMS

B04O

PNX8543: DIGITAL VIDEO OUT / LVDS

B04P

PNX8543: POWER

B05A

PNX5100: SDRAM

B05B

PNX5100: VIDEO-IN

B05C

PNX5100: POWER

B05E

PNX5100: LVDS

B04L

PNX8543: AUDIO

B05F

PNX5100: CONTROL

B05G

PNX5100: PCI

B05I

PNX5100: DEBUG

B05H

PNX5100: DISPLAY-INTERFACING

B06A

FPGA BACKLIGHT-LVDS & I2C-MUX

B06B

U-WAND

B06G

FPGA WOW - IO BANKS

B07A

CI: PCMCIA CONNECTOR

B07B

AUDIO IN HDMI

B07C

USB CONNECTOR

B06C

TEMPERATURE & FAN CONTROL

B06D

FPGA WOW - LVDS IN / OUT

B06E

FPGA WOW - POWER & CONTROL

B06F

FPGA WOW - DDR

B09A

MINI PCI CONNECTOR

B07D

HDMI

B08A

ANALOGUE EXTERNALS A

B08B

ANALOGUE EXTERNALS B

B08D

ANALOGUE EXTERNALS D

B07E

HDMI SWITCH

B07F

PNX8543: FLASH

B07G

ETHERNET

B07H

BUFFERING

B09B

DDR SUPPLY

B10A

AUDIO

AB1

INTERFACE + SINGLE DC-DC

AB2

DUAL DC-DC

AB3

MICROCONTROLLER BLOCK

CN4

1 1

6

7

88

1M95

+3V3-STANDBY

7U03 TPS53124PW

+12VF

+12VF1

+3V3

23

15

17

+1V2-PNX85XX

5U00

28

26

+12VF

12V/1V2

COVERSION

12V/3V3

COVERSION

5U33

5U03

+3V3F

1V2-STANDBY

+1V2-STANDBY

7U0M

7U0N

VOLT. REG.

+3V3

+3V3-STANDBY

+3V3-PER

+5V

+3V3-PER

+1V8-PNX85XX

3HJ3

DDR2-VREF-DDR

DDR2-VREF-CTRL

RREF-PNX85XX

+AUDIO-POWER

AUDIO-VDD

TO

DC-DC INTERFAC

(OPTIONAL)

TO DISPLAY

18310_406_090305.eps

090306

CN7

1

2

3

4

5

6

24Vb

GND1

24Vb

GND1

24Vb

GND1

1316

1

2

3

1319

1

2

3

HVL

HVR

3.3V_ST

+12V

5U01

7U01 TPS53124PW

+12V

+12VF2

+5V5-TUN

23

15

17

+1V2-PNX5100

5U04

28

26

+12V

B05h

B04a,p B07d,B08d

B01a,B04p

B01c,B02b, B06c,B07b,h, B08b,B09b

B02a

B01a

B04i,m,B10a

12V/1V2

CONVERSION

12V/5V

CONVERSION

5U05

+1V2-PNX5100

+1V2-PNX85XX

+3V3-PER+3V3-PER

CN5

1 1

6

7

2

3

4

5

8

LAMP-ON-OUT

1M99

BACKLIGHT-BOOST

+12VD

BACKLIGHT-OUT

B05H

B04A

12V

GND1

BL-ON_OFF

A/P_DIM

DIM

BOOST

+12V

1U01

T3A

9

+AUDIO-POWER

10

RESERVED

+5V

+33VTUN

3U42

6U0B

VSW

7U0P

RESERVED

+3V3

B01a

B01c

B01b

+3V3

+33VTUN

+VTUN

+5V-TUN

+5V-TUN-PIN

5T11

+3V3-PER

+1V2A

+5V-TUN

+12V

+5V-TUN-CVBS

ANTENNA-SUPPLY

5T55

+3V3E

5T52

+3V3D

5T53

+3V3

+3V3A

ANTENNA-SUPPLY

+12VF

1U03

T3A

+12V

+VSND

GND_SND

N.C.

Dual

Synchronous

Step-Down

Controller

BACKLIGHT-PWM-ANA-DISP

5U31

+5V

B05H

CONTROL

B05H

CONTROL

99

INV_OK

POWER-OK

2 2

3

4

5

STANDBY

B04A

STANDBY

GND1

CONTROL

7HM5

3HMF

CONTROL

7U50

IN OUT

COM

5U08

5U20

5U21

11

5U06

5U17

2K9 SUPPLIES

2K8 SUPPLIES

1M20

8

5

+3V3-STANDBY

TO IR/LED PAN E L

SS36

3T12

3T10

3T11

+1V2-PNX85XX

+1V2

+3V3A

5T54

9T64

9T62

7T54

IN OUT

COM

RES

7T56

3T69

+12V

RES

3HJ1

9HM0

7HM6

RES

Dual

Synchronous

Step-Down

Controller

7U06

7U05

7U02

7U08

7U0H-1

7U0H-2

7U0D-1

7U0D-2

+5V

7HP0

IN OUT

COM

VDDA-AUDIO

+3V3

+3V3-PER

VDDA-LVDS

5HVD

VDDA-LVDS

VDDA-AUDIO

5HY7

AUDIO-ADC

5HY4

VDDA-DAC

+1V2-PNX85XX

+3V3-STANDBY

+1V2-STANDBY

+3V3

5HVH

+3V3-PER

RREF-PNX85xx

5HV8

+1V8-PNX5100

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-VREF-DDR

+3V3

+3V3-PNX5100-LVDS-PLL

5C70

+VDISP2

+3V3

VDDA-DACVDDA-DAC

3C20

3C22

1G50

41

+1V8-PNX5100

+3V3

+AUDIO-POWER

ADIO-VDD

AUDIO-VDD

+1V8-PNX85XX

+3V3-PNX5100-LVDS-IN

5C67

+3V3-PNX5100-CLOCK

5C68

+3V3-PNX5100-DDR-PLL0

5C69

+1V2-PNX5100

+1V2-PNX5100-DLL

5C66

+1V2-PNX5100-CLOCK

5C60

+1V2-PNX5100-TRI-PLL1

5C61

+1V2-PNX5100-TRI-PLL2

5C62

+1V2-PNX5100-TRI-PLL3

5C63

+1V2-PNX5100-DDR-PLL1

5C64

+1V2-PNX5100-LVDS-PLL

5C65

1G51

1

+VDISP1

+3V3

5F04

+3V3M

7F06

IN OUT

COM

+2V5M

7F07

IN OUT

COM

+1V2M

+VDISP2

+VDISP1

+VDISP

+3V3

+12V

+5V

PCMCIA-VCC-VPP

3P09

+T

+3V3

+12V

+1V2-PLL

+1V2-FPGA

+2V5-PLL

+2V5out-FPGA

+2V5in-FPFA

+2V5-DDR1

3V3-FPGA

VREF-FPGA1

+2V5

+1V2-PNX85XX

+3V3

+12VD+12VD

+3V3

+3V3F

7CG2

LCD-PWR-ON

+12V

+3V3

+12V

+VDISP

1C02

T3A

1C01

T3A

1F50

T1A

5CG0

5CG2

RES

+5V+5V

1F51

41

5FG1

5FG2

5FH4

+2V5-PLL

+1V2-PNX85XX

+1V2-PLL

+1V2-FPGA

+3V3

CFH0

CFH1

+3V3-FPGA

+1V8-PNX85XX

+1V8-PNX5100

+2V5

5FH2

+2V5out-FPGA

+2V5in-FPGA

5FH3

5FH0

+2V5

VREF-FPGA1

+2V5-DDR1

5FL0

3FLM

VREF-DDR1

3FLK

5FH1

5FH4

7CG1

CIN-5V

1P03

18

HDMI 2

CONNECTOR

BIN-5V

1P05

18

HDMI SIDE

CONNECTOR

AIN-5V

1P02

18

HDMI 1

CONNECTOR

+3V3-STANDBY

+5V

+3V3

1V8-HDMI

DIN-5V

1P04

18

HDMI 3

CONNECTOR

+5V-EDID

REF-3V3

3P47

5P11

+3V3

+5V

+3V3

+5V

+12V

+3V3

+5V

+3V3-STANDBY

+5V-DDC

5N07

+3V3-ET-ANA

+3V3

5N06

+3V3-ET-DIG

+3V3

+12V

+5V-TUN

+5V5-TUN

+3V3

+3V3-NAND

5P09

+3V3

+3V3-mPCI

5A00

+5V

+5V-mPCI

5A01

1M96

3

EIN-5V

1P06

18

HDMI SIDE

CONNECTOR

RES

7P13

VOLT.

REG.

+12V

VLED1

+16V

VLED2

RES

7P11

+3V3F

+AUDIO-POWER+AUDIO-POWER

+2V5

+12V

+2V5-REF

+V-LM833

7A00-1

LCD-PWR-ON

+1V8-PNX85XX

7A00-2

LCD-PWR-ON

7A07

VOLT. REG.

3A26

3A07

7A01

7A02

7P01

IN OUT

COM

RES

5T51

B02b,B04a,p B06a,e

B05h,B09b

B01b,B02b, B04a,l,m,n,p, B05b,c,e,h, f,g,i, B06a,b,c,e, B07a,d,f,g,h, B08a,b,d, B09a

B04p

B09b

B04p

B01c

B04p

B01a

B01b

B02b

B01b

B07h

B02b

B01b

B01c

B01a

B01b

B01a

B01c

B04p

B01a

+3V3+3V3

B01a

B01b

B04i

B04p

B01a

B04l

B02a

B06e

B01c

B01a

B05h

B06e

B01a

B01b

B09b

B04p

B01b,B04a,l B06a,B07a,c, d,B08a,b,d, B09a,d

B07h

B04a B05c

B02a

B04m

B04p

B04a,b,e,f,n

B04l

B04o

B04h

B01a

B09b

B01c

B01a

B01b

B01a

B01

b

B05h

B01a

B09b

B01a

B09b

B06e

B06f

B06e

B06f

B09b

B01b

B01a

B01c

B01b

B01c

B01a

B01b

+5V-EDID

B07d

+1V8-PNX85XX

B09b

B01c

B01a

B01c

B01a

B01c

B01b

B01c

B01a

B01b

B01c

B01b

B06d

B05e

B06g

B05a,c

B01a

B01c

B01a

B01b

AB2

B07e

B06a,e,f

B04g,p, B06e,B07d

B02a,b

AB1

AB2

AB3

TO 1M59

SSB

B06A

+24V

+3V3

1M90

1

1M59

6

TO CN7

SUPPLY

TO

AMBI-LIGHT

MODULE

OPTIONAL

6P06

1101

T3A

+24VF

5102

c001

c002

+3V3

+1V8

7200 TPS54283PWP

+24VF

+12V

14

12

+24VF

5201

+16V

3

5200

AB1

B01b

NON

SYNCHRONOUS

CONVERTER

(VLED1)

(VLED2)

7301

IN OUT

COM

1M84

6

11

13

1M59

6

TO 1M59

DC-DC

OR

AMBI-LIGHT

MODULE

AB1

5F05

Supply Lines Overview

Block Diagrams

EN 66Q549.2E LA 9.

2009-May-08

Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

Interface Ambilight: Interface + Single DC-DC

EN 67Q549.2E LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

D

E

2 9

431

5

7

8

10

116

123 45678 9

INTERFACE + SINGLE DC-DC

F126

*

1M85

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16

502382-1470

1M59

1

2

3

4

5

6

7

1735446-7

1M90

1

2

3

4

5

6

1735446-6

+12V

+16V

F115

F116 F117 F118 F119 F120

F121 F122 F123 F124

1M84

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16

502382-1470

3109

100R

+24V

c001

c002

RES

3110 100R

F101 F102 F103 F104 F105 F106 F108 F109 F110 F111 F112

F113 F125

VLED1

VLED2

2108

2109

+3V3

VLED1

VLED2

9101 9102

9103 9104

RES

100p

RES

(RES)

+3V3

+24V

SPI-LATCH2CONN

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH1CONN

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-LATCH1

SPI-LATCH1CONN

SPI-LATCH2CONN

SPI-LATCH2

SCL

SDA

CONTROL1 CONTROL2

+16V

RES

+24V

3100

0R1

10n

3112

100n

12K

3101

47R

2101

I101

I102

100R

2102

2n2

3104

330R

F114

2104

I105

1%

33K

1M0

3106

3105

3107

5107 RES

30R 5108 RES

30R

I100

1100

3.0A 32VT10u

2100

220n

7100

NCP3163BMNR2G

5

6 7

8

9

I103

14

17

220p

16

1

2

15K

3102

I106

I108

2103

5102

LPK_SENSE

DRV_COL

SWI_COL

BOOT_IN

1

VFB

2

TIM_CAP

NC

+24VF

F107

3

VCC

Φ

LVI_OUT

SWI_EMIT

GND GND_HS

19

18

1101

VIA

+16V

RES

30R

5101

5100

I109

*

63V

T2.0A

514

10 11 12 13

20 21 22 23 24 25 26 27 28 29

30 31

*

30R

5103

*

5105

30R

5104

+12V

*

30R

5106

+16V

6100

SS24

3K3

3103

I104

100n

2105

2106

1%

3K3

3108

3111

100K

2107

100n

VSW

12

A

B

C

D

E

1100 A6 1101 A7 1M59 C2 1M84 A2 1M85 A2 1M90 D2 2100 A6 2101 B5 2102 C6 2103 D6 2104 D5 2105 D9 2106 D9 2107 E9 2108 D3 2109 E3

3100 B5 3101 C5 3102 D6 3103 D9 3104 D6 3105 D5 3106 D5 3107 D5 3108 E9 3109 D2 3110 D3 3111 E8 3112 B6

5100 A8 5101 A8 5102 A7 5103 B8 5104 B8 5105 B8 5106 B8 5107 A6 5108 A6 6100 C8 7100 B7 9101 C3 9102 C3 9103 C3 9104 C3 F101 B3 F102 B3 F103 B3 F104 B3 F105 B3 F106 B3 F107 A7 F108 B3 F109 B3 F110 B3 F111 B3 F112 B3 F113 B3 F114 B5 F115 C2 F116 D2 F117 D2 F118 D2 F119 D2 F120 D2 F121 E2 F122 E2

13

F123 E2 F124 E2 F125 B3 F126 A2 I100 A6 I101 C6 I102 C6 I103 C6 I104 D9 I105 D5 I106 D7 I108 D6 I109 A8 c001 E2 c002 E2

A

B

C

D

E

F

G

H

12

I

J

1

STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9

DC/DC INTERFACE

3104 328 58341

3104 328 58351

3104 328 58361

3104 328 58371

2

1101

in

out

out out

3

1M85

in out out out

3 4

5103/5104

out

out out

5105/5106

in

4

out

in in

out

VLED1

24V

12V

16V

12V

VLED2

16V

12V

16V

567

See the stuffing diversities table in the case of components marked with one star (*)

SETNAMECHN

CLASS_NO

DC-DC INTERFACE

08-06-19

08-08-06

08-10-23

NAME

CT

6

7

1

2

3

Peter Van Hove

85

AMBI 2K9

SUPERS.

DATEMGr CHECK

08-06-06********

9

10

8

9

I

1

08-06-19

08-08-06

2

08-09-18

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

12

3

08-10-23

4

08-12-06

5

13

***031**

13

18310_600_090305.eps

J

A3

090305

2009-May-08

Circuit Diagrams and PWB Layouts

Interface Ambilight: Dual DC-DC

EN 68Q549.2E LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

1

2

3

4

5

6

7

8

109

11

12

13

A

B

C

D

E

1

2 3

4567

DUAL DC-DC

2200

220n

2201

F204

9202

100u35V

TPS54283PWP

F207

4u7

2212

7200

9 10 11

BOOT1 SW1 EN1 FB1

ILIM2 SEQ BP

PVDD1 PVDD2

GND GND_HS

RES

I200

3204

2211

2214

I208

**

I211

10R

1n0

I212

3210

I215

3200

6R8

3202

6R8

3K9

**

2204

47n

**

I217

**

3206

3K3

3211

RES

I214

33K

2221

22n

RES

**

1%

F202

(VLED2)

+16V

VSW

**

F200

**

2206

5200

10u

**

35V

4u7

2207

100u

I204

**

6200

SS24

**

RES

2216 2217

22n

3207

**

RES

4u7

2218

2219

68K

1%

4u7

7200 : TPS54383 in case of 16V or dual dc-dc converter

The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).

The components marked with two stars (**) belong to the 16V versions

(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).

8

+24VF

A

2202

1

14

Φ

BOOT2

SW2

EN2

FB2

16 17 18 19 20 21 22

VIA2

23 24 25 26

4

15

35V

220n

2203

100u

2205

F203

312 213 65 87

I216

I213

47n

I206

*

9201

RES

3K3

3209

*

22n

2222 RES

RES

I201

3201

6R8

3203

*

3212

I205

*

6R8

*

10R

3205

I209

*

1n0

2213

I210

*

1n0

2215

*

33K

3K3

3213

1%

5201

*

10u

*

6201

SS24

RES

22n

3208

*

47K

1%

RES

*

22u

2208

2209

F201

*

10u

2220

*

2210

2223

220u 25V

10u

*

(VLED1)

+12V

2224

B

C

+12V

D

VLED1

10u

E

2200 A4 2201 A4 2202 A5 2203 A5 2204 B3 2205 B6 2206 B1 2207 B2 2208 B7 2209 B7 2210 B8 2211 C3 2212 C4 2213 C6 2214 C3 2215 C6 2216 C2 2217 C7 2218 D1 2219 D2 2220 D7 2221 D3 2222 D5 2223 D8 2224 D8

3200 A3 3201 A6 3202 B3 3203 B6 3204 B3 3205 B6 3206 D3 3207 D2 3208 D7 3209 D5 3210 D3 3211 D3 3212 D6 3213 D6

5200 B2 5201 B7 6200 B2 6201 B7 7200 B4 9201 B5 9202 C4 F200 B2 F201 C7 F202 D3 F203 B5 F204 B4 F207 C4 I200 A3 I201 A6 I204 B2 I205 B6 I206 B6 I208 B3 I209 B6 I210 C6 I211 C3 I212 C3

I213 D5 I214 D4 I215 D3 I216 B5 I217 B4

B

C

D

E

F

G

H

1

2

I

J

1

2 13

3

4

3 45

CLASS_NO

08-06-19

08-08-06

08-10-23

NAME

5

6

7

1

2

3

Peter Van Hove

CHECK

8

678

EMANTESNHC

DC-DC INTERFACE

AMBI 2K9

SUPERS.

DATE

9

08-06-09

10

3 2

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

130

12

1

08-06-19

2

08-08-06

3

08-09-18

4

08-10-23

5

08-12-06

A3

18310_601_090305.eps

I

J

090305

2009-May-08

Circuit Diagrams and PWB Layouts

Interface Ambilight: Microcontrollerblock

EN 69Q549.2E LA 10.

A

B

C

D

E

F

G

H

J

K

is prohibited without the written consent of the copyright

owner.

L

M

N

1

2

3

4

5

6

7

98

10

11 15

12

13

14

16

17

18

19

20

A

123

MICROCONTROLLER

A

+3V3

2300

B

C

D

7302

LPC2103FBD48

11

X1

12

E

I

+3V3

F

1K0

3339

F317

G

2

3

I308

5

9305 RES

2318

100n

1300

7303

NCP303LSN10T1

IN

RST

GND

CD

NC

+3V3

16M9

RES 9300

3332

10K RES

9301

RES

9302 9303RES

F308

+3V3

10K

3333

1

4

X2

20

RTXC1

25

RTXC2

26

RTCK

4

VBAT

F307

27

DBGSEL

6

RST

+1V8

H

45678

7301

LD2985BM18R

1

3

INH BP

1u0

1 2

3

B3B-PH-SM4-TBT(LF)

71943

VSS

MICRO-

CTRL

P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5

P0.14|DCD1|SCK1|EINT1

VDD_1V8

5

+3V3

2322

100n

2321

OUTIN

COM

2

RES

1302

45

Φ

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1

P0.5|MISO0|MAT0.1

P0.6|MOSI0|CAP0.2

P0.7|SSEL0|MAT2.0

P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2

P0.13|DTR1|MAT1.1

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

VDD_3V3

17

40

9307

100n

2323

5

4

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.31|TDO

VDDA

100n

VSSA

F300

I303

2301

100n

10n

2303

+3V3

F304

F305

F306

3322

2308

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38 39

8

9 10 15 16

42

F315

100n

2324

+1V8

4u7

2302

+3V3

10K

3320

3321

10K3304-2

6

5

8

10K

10K3303-2

10K3302-2

10K3302-4

27

45

10K3300-2

3323

100R

27

10K

100p

I310

2309

100p

27

3 6

3301-3 10K

3328

3301-2

3329

10K

I319

UD-MD

I322

3334

22R

F314

3335

I309

100R

2

1

100n

2320

1301

RES

SKHUBHE010

3

4

1

10K

RES3325

10K

RES

1 8

3 6

3326

3302-3 10K

3303-3 10K

3303-1 10K

I321

I307

F310

10K

2319

100p

3336

3337

6

10K

1 8

3

4

3301-1 10K

10K

3327

I317

2310

F309

10K

27

3301-4

3304-1

3300-3 10K

3324

6

10K3300-4

45

3

1 8

3302-1 10K

I305

I313

I314

I318

100p

2312

100p

100n

2311

711

+3V3

10K3304-4

45

10K

1 8

3304-3 10K

3305-1

I311

I312

I315

RES

100p

2313

2314

91011

1K5 1%

1%1K5

7300-2 LM393PT

5

6

I304

TEMP-SENSOR

100K

10K

3310

RES

+3V3

8

7

4

F303

2305

10n

RES

3315

47K

RES

3318

RES

+3V3

RES

1%

3311

1K5

F301

RES

10K

10n

2304

-T

C300

3306-3

RES

3330

3331 3306-2 2 3306-1 3306-4 3307-1 3338 3307-4 4 5 3307-2 2 7 3308-4 3308-2

3308-1

3309-4 3309-1

45

27

10K

3314

10K

+3V3

1%

RES

3317

1K5

F316

1%1K8

3319

RES

3 6

100R 100R 100R

7

100R

8

1

100R

45

100R

1 8

100R 100R 100R 100R

45

100R

27

100R

1 8

100R 54 8 1

100R

3 6

7300-1 LM393PT

3

2

10K3305-3

+3V3

8

4

I300

F320

I302

9103 45

3313

I306

I316

I320

100p

2316

100p

2315

F311 F312

3305-4 10K

F313

3305-2

812

2306

100n

1

SPI-DATA-RETURN

+3V3

3312

10n

2307

3316

CONTROL1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-LATCH1 SPI-LATCH2

PWM-CLOCK-BUF

TEMP-SENSOR

EEPROM-CS

BLANK-BUF

PROG

CONTROL2

F302

SCL

SDA

1300 E2 1301 H5 1302 C4 2300 A3 2301 A4 2302 A5 2303 A4 2304 B8 2305 B10 2306 B9

A

2307 B10 2308 D4 2309 D5 2310 F6 2311 F7 2312 F7 2313 F7 2314 F7 2315 F7 2316 F8 2318 G2 2319 G6

B

2320 H5 2321 H4 2322 H4 2323 H4 2324 H4

3300-2 D5 3300-3 D7 3300-4 D7 3301-1 D6 3301-2 E5 3301-3 E6 3301-4 D7

C

3302-1 D7 3302-2 D6 3302-3 E6 3302-4 D6 3303-1 E6 3303-2 D6 3303-3 E6 3304-1 D6 3304-2 D7 3304-3 D7 3304-4 D7

D

3305-1 E7 3305-2 G8 3305-3 G9 3305-4 G8 3306-1 E8 3306-2 E8 3306-3 E8 3306-4 E8 3307-1 E8 3307-2 F8 3307-4 F8 3308-1 F8

E

3308-2 F8 3308-4 F8 3309-1 F8 3309-4 F8 3310 A10 3311 A8 3312 A10 3313 B8 3314 B8 3315 B10 3316 B10 3317 B8

F

3318 C10 3319 C8 3320 C5 3321 C5 3322 D5 3323 D5 3324 D7 3325 D6 3326 D6 3327 D6 3328 E5

G

3329 E5 3330 E8 3331 E8 3332 E3 3333 F2 3334 G5 3335 G5 3336 G6 3337 G6 3338 E8 3339 F1

7300-1 B9

H

7300-2 A10 7301 A4 7302 E3 7303 F2 9300 E3 9301 F3 9302 F3

9303 F3 9305 G1 9307 H4 C300 B8 F300 A5 F301 A8 F302 A10 F303 B11 F304 C4 F305 C4 F306 D4 F307 F3 F308 F3 F309 G6 F310 G6 F311 G8 F312 G8 F313 G8 F314 G5 F315 H4 F316 C9 F317 F1 F320 E9 I300 E9 I302 F9 I303 A4 I304 C10 I305 E6 I306 E7 I307 G6 I308 G2 I309 G5 I310 D5 I311 E7 I312 E7 I313 E7 I314 F7 I315 F7 I316 F8 I317 F6 I318 F7 I319 F5 I320 F8 I321 F6 I322 G5

B

C

D

E

F

G

H

I

J

K

L

M

N

08-06-19

08-08-06

08-09-18

08-10-23

08-12-06

O

P

A2

090410

O

CLASS_NO

08-06-19

P

NAME

1

2

3

4

7

98

10

11

1256

13

14

08-08-06

08-10-23

Peter Van Hove

1

2

3

15

SETNAMECHN

DC-DC INTERFACE

AMBI 2K9

SUPERS.

08-06-09

DATECHECK

16

17

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

4

33

5

20

18310_602_090305.eps

2009-May-08

31043136325.5

18310_550_090309.eps

090309

1100

1101

1301

1302

1M59

1M84

1M85

1M90

2200

2201 2202

2203

2206

2207

2208

2209

2210

2218

2219

2220

2223

2224

2300

2301

2302

2303

2310

2311

2312

2315

2316

2319

2321

2322

2323

3306

3307

3308

3309

3324

3326

3331

3338

5102

5200

5201

6200

6201

7200

7301

9101

9102

9103

9104

9201

9202

1300

2100

2101

2102

2103

2104

2105

2106

2107

2108

2109

2204

2205

2211

2212

2213

2214

2215

2216

2217

2221

2222

2304

2305

2306

2307

2308 2309

2313

2314

2318

2320

2324

3100

3101

3102

3103

3104

3105 3106 3107

3108

3109

3110

3111

3112

3200

3201

3202

3203

3204

3205

3206

3207

3208

3209

3210

3211

3212

3213

3300

3301

3302

3303

3304

3305

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322 3323

3325

3327 3328

3329

3330

3332

3333

3334

3335

3336

3337

3339

5100

5101

5103

51045105

5106

5107

5108

6100

7100

7300

7302

7303

9300

9301

9302

9303

9305

9307

C300

F101

F102

F103

F104

F105

F106

F107

F108

F109

F110 F111

F112

F113

F114

F115

F116

F117

F118

F119

F120

F121

F122

F123

F124

F125

F126

F200

F201

F202

F203

F204

F207

F300

F301

F302

F303

F304

F305

F306

F307

F308

F309

F310

F311

F312

F313

F314

F315

F316

F317

F320

I100

I101

I102

I103

I104

I105

I106

I108

I109

I200

I201

I204

I205

I206

I208

I209

I210

I211

I212

I213

I214

I215

I216

I217

I300

I302

I303

I304

I305

I306

I307

I308

I309

I310

I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322

c001

c002

Personal Notes:

10000_012_090121.eps

090121

Circuit Diagrams and PWB Layouts

Layout DC/DC Interface Ambilight

EN 70Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

6 LED Low-Pow: Microcontroller Block Liteon

EN 71Q549.2E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

N

1

2

1

3

4

2

5

3

6

4

7

8 9

6

10

11

8

12

13

14

15

MICROCONTROLLER LITEON

A

B

C

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

16

15

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15

16

1u0

2127

+3V3

VLED1

VLED2

35V10u

2129

2128

10u35V

+3V3

VLED1

VLED2

9111 RES

9113

RES

9112

9114

EEPROM-CS

TEMP-SENSOR

33p

2125

EEPROM-CS

TEMP-SENSOR

SPI-DATA-IN

CONTROL-1 CONTROL-2

BLANK

PROG

CONTROL-1 CONTROL-2

PROG

SCL

SDA

SCL

SDA

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

VLED1

9107 9108

9109 9110

1.5A T

1105

SPI-CLOCK

SPI-LATCH

PWM-CLOCK

SDA

VLED1-F

+3V3

D

7102

LPC2103FBD48

E

OUT

1M84

F133

1

F135

2

F136

3

F139

4

F137

I

F

G

H

5

6

F138

7

F134

8

9 10 11 12 13 14

15 16

1M2A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

VLED1

VLED2

+3V3

VLED1

VLED2

+3V3

1u0

2130

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

+3V3

10K

3119

F109

2

3

5

9121 RES

2111

100n

1101

7110

NCP303LSN10T1

IN

RST

GND

NC

CD

+3V3

16M9

1

4

+3V3

9101

3118

RES10K

9102

RES 9103

9104 RES

F104

10K

3120

71943

VSS

11

X1

MICRO-

12

CTRL

X2

20

RTXC1

25

RTXC2

26

RTCK

4

VBAT

F102

27

DBGSEL

6

RST

VDD_1V8

5

+3V3

+1V8

100n

2119

VSSA

Φ

P0.0|TXD0|MAT3.1

P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0

P0.3|SDA0|MAT0.0

P0.8|TXD1|MAT2.1

P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5

P0.13|DTR1|MAT1.1

CK1|EINT1

P0.14|DCD1|S

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1

P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

P0.31|TDO

VDD_3V3

VDDA

17

40

9119

2120

100n

2121

7101

LD2985BM18R

1

OUTIN

3

INH BP

1u0

2101

COM

2

+3V3

10K

3107

3108

F107

F105

F108

3110

3109

100R

100p

2109

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38

UD-MD

39

8

9 10 15 16

42

F103

2113

100n

5

4

10K

100R

2110

2112

10n

2104

100p

3117

22R

3131

100R

100n

F101

100n

2102

7

10K

2

3101-2

10K

27

3 6

3116

3104-3

3104-2

10K

3130

F112

9106

RES

2103

10K

3105-2 2 7

10K

3 6

3105-3

+1V8

4u7

10K

5

4

3106-2

3105-4

10K

1 8

3106-1

I110

RES

2118

100p

10K

27

1 8

10K

RES

3104-1

3113

10K

RES

3 6

3114

3115

3106-3

I111

10K

3132

3133

10K

45

1 8

3104-4

3102-1

10K

3105-1 1 8

100p

2114 RES

10K

3112

10K

2115

10K

3 6

27

3101-3

3102-2

10K

45

3102-33 6

3101-4

100p

2116

+3V3

10K

45

3102-4

10K

8

10K

1

3103-1

RES

100p

2122

2117

RES

2126

100p

2123

100p

2124

I113

3103-4 I114 I115

3103-2

+3V3

1%

3135

1K5

F116

RES

10K

10n

3137

2105

3111

-T

C140

+3V3

3140

3123

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 2 7 3125-4 3126-2 3126-4

3126-1

3127-1 1 8 3127-4

100p

2131

5

10K

4

3103-3

7

10K

2

10K

7116-1 LM393PT

RES

3

1K5 1%

F118

2

1%1K8

RES

45

100R 100R 100R

1 8

100R

27 3 6

100R

1 8

100R 100R 100R 100R

45 27

100R

45

100R

1 8

100R

45

100R

6

+3V3

84

I124

I125

I126

10K3

2107

100n

2108

1

CONTROL-1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-IN

SPI-LATCH-2

TEMP-SENSOR

EEPROM-CS

CONTROL-2

+3V3

16

+3V3

3136

10n

3139

SPI-LATCH

BLANK-BUF

PROG

SCL SDA

1K5 1%

F106

1%

1K5

100K

7116-2 LM393PT

5

6

10K

TEMP-SENSOR

17

18

31211101975

3134

RES

+3V3

84

7

F117

2106

RES

10n

3138

47K

RES

3141

RES

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

123 45678 910111213

N

1X03

REF EMC HOLE

O

12345

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

2008-10-2723

NAME

Peter Van Hove

CHECK DATE

15

EMANTESNHC

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

16

17

8204 000 8857

3 1

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

232008-08-08

20

18310_610_090305.eps

O

2008-06-10

2008-10-27

P

A2

090410

2009-May-08

Circuit Diagrams and PWB Layouts

EN

S

GND

Q

HOLD

W

VCC

C

D

EN

MODE

SIN

XHALF

XLAT

SCLK

VCC

SOUT

6

2

0

11

VIA

9

13

12

10

4

IREF

GND GND_HS

OUT

GSCLK

7

14

5

3

1

8

15

XERR

BLANK

C

EN

F203 C5 F204 H6

F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9

INPUT BUFFER

A

I

1

H

3221 H11 3222 I8

11

F215 H9

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3

12

10

11

7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3

C

F205 B10 F206 C10

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6

7

16

F

3216 H6 3217 H6 3218 H6 3219 B11 3220 C11

17 18

3223 C11 3224 H11

N

D

E

F

G

H

I

A

B

C

D

E

F

O

P

O

N

L

M

K

B

20

6

J

18

P

20

7 8 9 10111213

A

B

C

L

J

7 8

4

A

is prohibited without the written consent of the copyright

F

9 10111213

123 456

D

32 8

12

169

194

15

K

G

123 45678

13

C

14

3

G

E E

owner.

5

H

14

G

H

I

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

9

D

6 15

13 19

5

I

17

MICROCONTROLLER LITEON

M

10

B

RES

3207

1K0

1u0

2216

F202

10K

3210

+3V3

33p

2209

6216

SML-310

2211

33p

9212

+3V3

RES

100R

3121

3220

3223

100R

3217

27R

100R

3219

100R

33p

2202

+3V3

2215

100n

F212

F211

33p

2201

+3V3

9

7

10

14

8

74HCT125PW

7201-3

3214

10K

3215

1K2

5

4

7

2

1

8

3

9213

(64K)

Φ

7214

M95010-WDW6

6

12

7

13

14

11

74HCT125PW

7201-4

100R

3212

F207

3224

3K3

+3V3

F213

2217

100p100p

2218

3221

3K3

F209

F204

3204

10K

+3V3

RES

1K0

3209

F208

+3V3

RES9214

9209

24

28

30

31

32

33

2326

3

9 10 11 12 13 14 15 16

4 5

27

6

7

8

17 18 19 20 21 22

7215

TLC5946PWP

Φ

PWM CONTROL

LED DRIVER

2

1

29

25

+3V3

PDTC144EU

+3V3

7212

470R

3222

7209

PDTC144EU

1

3

2

+3V3

F210

+3V3

10K

3203

3216

+3V3

14

3

100R

7201-1

74HCT125PW

2

7

1

100n

2214

3213

10K

+3V3

2219

100p

2008-10-2723

RES

100p

2220

2008-08-08

A2

DRIVER 6LED LITEON

2K9

8204 000 8857

CHECK DATE

NAME

1

SUPERS.

18310_611_090305.eps

090410

6 LED Low-Pow: Microcontroller Block Liteon

EN 72Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

6 LED Low-Pow: LED Liteon

EN 73Q549.2E LA 10.

1

A

123

3

LED LITEON

B

A

C

B

VLED2

VLED1-F

D

9301

C

E

LTW-E500T-PH1

F F

D

3340

G

E

560R

3346

560R

3349

560R

H

3369

560R

3370

I

F

560R

J

G

3341

1K5 3344

1K5

3353

1K5

3384

1K5 3385

1K5

3387

1K5

3388

1K5 3389

1K5 3390

1K5 3391

1K5

390R

3339

390R 3342

390R

3336

K

owner.

is prohibited without the written consent of the copyright

H

L

M

I

N

4

5

6

8

456

VLED1-F

9309-227

9305-2

27

9305-445

9305-11 8

Place jumper 9314, 9316, 9317

if VLED < 17V

7000

4

GREEN

RED

6

BLUE

GND_HS

3

25

1

7

LTW-E500T-PH1

4

GREEN

RED

BLUE

7001

GND_HS

3

25

16

7

VLED1-F

10K

3331

3325

3326

LTW-E500T-PH1

4

3334

1K0

10K

GREEN

RED

BLUE

F308

7002

GND_HS

F303

3

25

16

7

4

9306-1 1

9306-4

5

8

F307

F302

914

VLED2

7003

GREEN

RED

6

BLUE

GND_HS

7

10

7

3

25

9318-1

9318-4

72

9320-4 54

9320-1 8

9320-2

1

11

8

9310-11 8

9310-445

9310-2

27

LTW-E500T-PH1

4

18

45

GREEN

RED

BLUE

7004

GND_HS

7

VLED1-F

3301

3303

12 132

9

3

25

45

16

9319-11 8

10K

VLED1-F

3309

7317 BC847BW

F326

7315 BC847BW

F328

3308

1K0

10K

3304

3306

10 11

9312-445

9312-3

3 6

9303-33 6

9303-4

9304-227

F325

F329

7316 BC847BW

F330

GREEN

RED

BLUE

GND_HS

9326

9327

15

R

G

Place jumper 9325, 9326, 9327

if VLED < 17V

16

12

B

27

9315-2

9315-445

B

3335

390R 3345

390R 3348

390R

9313-11 8

G

R

RG

3311

1K5

3312

1K5

3315

1K5

3316

1K5

3317

1K5

3320

1K5

3321

1K5

3322

1K5

3323

1K5

17

13

3354

560R

3357

560R

3358

560R

3360

560R

3362

560R

3363

560R

3364

560R

3366

560R

F348

9311-445

9311-11 8

9311-33 6

18

A

B

C

D

E

F

G

H

I

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

A

B

C

D

E

G

H

I

J

K

L

M

N

1

2

3

O

P

1

2

4

5

456

63

7

8

9

7 8 9

10

CLASS_NO

11

12

EMANTESNHC

13

DRIVER 6LED LITEON

2008-08-08

2008-10-2723

Peter Van Hove

NAME

10 18

11

12

13 20

CHECK

1514

SUPERS.

DATE

16

2K9

2008-06-02

33

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

O

2008-06-10

1

232008-08-08

2008-10-27

P

A2

18310_612_090305.eps

090305

2009-May-08

Layout 6 LED Low-Pow

3104 313 6313.3

18310_551_090309

090309

1101

1105

1M83 1M84

2101

2102

2103

2104

2105

2106

2107

2108

2109

2110

2111

2112

2113

2114

2115

2116

2117

2118

2119

2120

2121

2122

2123

2124

2125

2126

2127

21282129

2130

2131

2201

2202

2203

2209

2210

2211

2214

2215

2216

2217

2218

2219

2220

3101

3102

3103

3104

3105

3106

3107

3108

3109

3110

3111

3112

3113

3114

3115

3116

3117

3118

3119

3120

3121

3123

3124

3125

3126

3127

3128 3129

3130

3131

3132 3133

3134

3135

3136

3137

3138

3139

3140

3141

3142

3203

3204

3205

3207

3209

3210

3211

3212

3213

3214

3215

3216

3217

3218

3219

3220

3221

3222

3223

3224

3301

3302

3303

3304

3305

3306

3307

3308

3309

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322

3323

3325

3326

3327

3328

3330

3331

3332

3333

3334

3335

3336

3337

3338

3339

3340

3341

3342

3343

3344

3345

3346

3347

3348

3349

3350

3351

3352

3353

3354

3355

3356

3357

3358

3359

3360

3361

3362

3363

3364

3365

3366

3367

3368

3369

3370

3371

3372

3373

3374

3384

3385

3386 3387 3388

3389 3390 3391

6216

7000

7001

7002

7003

7004

7005

7101

7102

7110

7116

7201

7209

7210

7212

7214

7215

7305

7306

7307

7315

7316

7317

9101

9102

9103

9104

9106

9107

9108

9109

9110

9111

9112

9113

9114

9119

9121

9208

9209

9210

9211

9212

9213

9214

9301

9302

9303

9304

9305

9306

9307

9308

9309

9310

9311

9312

9313

9314

9315

9316

9317

9318

9319

9320

9325

9326

9327

C140

I110

I111

I113

I114

I115

1M1A1M2A

F101

F102

F103

F104

F105

F106

F107 F108

F109

F112

F116

F117

F118

F120

F121

F122

F123

F124

F125

F126

F127

F128

F129

F130

F131

F132

F133

F134

F135

F136

F137

F138

F139

F202 F203

F204

F205

F206

F207

F208

F209

F210

F211

F212

F213

F214

F215

F302

F303

F304

F305

F307

F308

F325

F326

F327

F328

F329

F330

F340

F341

F342

F343

F344

F345

F346

F347F348 F349

I124

I125

I126

Circuit Diagrams and PWB Layouts

EN 74Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

-T

OUTIN

INH BP

COM

X2

RTXC1 RTXC2

RTCK

VBAT

DBGSEL

RST

VSS

VSSA

VDDA

VDD_3V3

VDD_1V8

X1

C

NC

GND

RST

IN

CD

C

E

F

G

H

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

17

F

J

M

A

2

C

4

E

6

G

8

A

10 11 12 13

123 45678 910111213

14

D

OUT

B

7

D

6

F

H

B

D

2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3

11

M

2

1

20

3

19

975

2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9

7

J

18

3103-2 G10

B

3103-4 G10

10

3104-2 E8

3104-4 D9

3105-2 D8

2108 B12

3105-4 D8 3106-1 E8 3106-2 D8

G

14

G

E

119

13

20

K

18

N

P

L

3107 C7

3109 D7

A

3111 B10

4

3113 D8 3114 E8 3115 E8

19

I

H

15

O

P

I

3116 E8 3117 E7 3118 E5 3119 F4

3123 C11

3103-3 G11

3124-2 E11

3104-1 D8

3124-4 E11

3104-3 E8

3125-2 F11

3105-1 E9

3126-1 F11

3105-3 E8

3126-4 F11 3127-1 F11 3127-4 F11

17

C

15

C

1

3128 E11 3129 E11 3130 G8

3132 H8

3134 A13

3106-3 E8

3136 A12

3108 C7

3138 B13

3110 D7

3140 C11

3112 D9

3142 F11

7101 A7 7102 E6

H

103

4

N

MICROCONTROLLER BLOCK LITEON

5

7110 F4 7116-1 B11

7116-2 A12 9101 E5 9102 F5

3120 F5

9104 F5

3124-1 E11

9107 A5

3124-3 E11

9109 A5

3125-1 F11

9111 A3

3125-4 F11

9113 B3

3126-2 F11

9119 H6 9121 G4 C140 B10

8 9

12

F

12

16

A

13

F101 A8 F102 F5 F103 H7

3131 G7

F105 D7

3133 H8

F107 C7

3135 A11

F109 G3

3137 B11

F116 A10

3139 B12

F118 C11

3141 C13

F121 A1 F122 A1 F123 A1

8

IN

6

3

O

D

E

15

F124 B1 F125 B1 F126 B1

9103 F5

F128 B1

9106 H8

F130 B1

9108 A5

F132 B1

9110 B5

F134 F1

9112 B2

F136 F1

9114 B2

F138 F1 F139 F1 I110 G8

L

K

2

B

16

I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11

F104 F5

I126 F11

F106 B12

F127 B1

F108 D7

F129 B1

F112 G8

F131 B1

F117 B13

F133 E1

F120 A1

F135 E1

F124

F137 F1

VLED1

F134

100n

2120

I124

3 6

VLED2

10K

3101-3

F107

9112

10K

3103-336

9109

+3V3

F139

1K5

3135

1%

10K

3103-445

3136

1%1K5

F109

9108

9101

9107

F130

+3V3

9104

+3V3

2109

100p

RES

3129

100R

5 6 7

8

9

15 16

VLED1-F

1

10 11 12 13 14

2

3

4

3 6

1M84

3124-3

100R

RES

10K

3141

+3V3

1 83124-1

100R

10K

3112

RES

9113

VLED1

F120

3127-4 4 5

+3V3

15 16

100R

13 14

2

3

4 5 6 7

8

9

1M2A

1

10 11 12

3107

10K

RES

2106

10n

F129

+3V3

F106

100p

2118

VLED2

10K

3113

RES

3

5

RES

7101

LD2985BM18R

4

2

1

3110

100R

3116

10K

3133

I110

RES

10K

F103

9106

10K

3106-33 6

+1V8

+3V3

10K

3111

VLED2

3103-1

1

8

I126

10K

RES 9103

F104

+3V3

I111

F133

5

9114

3125-4

100R

4

F112

100p

3105-1

10K

1 8

2117

12

+3V3

4

42

5

17

40

7

19

43

31

11

23

P0.5|MISO0|MAT0.1

24

P0.6|MOSI0|CAP0.2

28

P0.7|SSEL0|MAT2.0

29

P0.8|TXD1|MAT2.1

30

P0.9|RXD1|MAT2.2

6

26

20 25

8

P0.27|TRST|CAP2.0

9

P0.28|TMS|CAP2.1

10

P0.29|TCK|CAP2.2

18

P0.2|SCL0|CAP0.0

15

P0.30|TDI|MAT3.3

16

P0.31|TDO

21

P0.3|SDA0|MAT0.0

22

P0.4|SCK0|CAP0.1

14

P0.1|RXD0|MAT3.2

2

P0.20|MAT1.3|MOSI1

3

P0.21|SSEL1|MAT3.0

32

P0.22|AD0.0

33

P0.23|AD0.1

34

P0.24|AD0.2

38

P0.25|AD0.6

39

P0.26|AD0.7

41

P0.13|DTR1|MAT1.1

44

P0.14|DCD1|

SCK1|EINT1

45

P0.15|RI1|EINT2

46

P0.16|EINT0|MAT0.2

47

P0.17|CAP1.2|SCL1

48

P0.18|CAP1.3|SDA1

1

P0.19|MAT1.2|MISO1

27

13

P0.0|TXD0|MAT3.1

35

P0.10|RTS1|CAP1.0|AD0.3

36

P0.11|CTS1|CAP1.1|AD0.4

37

P0.12|DSR1|MAT1.0|AD0.5

27

MICRO-

CTRL

Φ

LPC2103FBD48

7102

3 6

3104-2

10K

3104-3

2

3

4 5 6 7

8

9

15 16

1

10 11 12 13 14

1M1A

35V

10u

2128

2124

I113

RES

100p

10K

F116

3119

100n

2107

T1.5A

1105

F135

9110

33p

2125

1 8

3

2

130

3126-1

100R

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-06-02

13

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

8204 000 8857

3104 313 6314.3

2K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

10K

72

3

2

Peter Van Hove

2008-06-10

3101-2

100K

RES

3134

+1V8

3 6

F122

10K

3105-3

10K

3102-4 4 5

7116-1 LM393PT

3

2

1

84

10n

2108

100R

3109

10K

100p

2110

1 8

3117

10K

3106-1

100n

2111

VLED2

3108

10K

3114

10K

RES

3118

10K

F127

+3V3

VLED1

F121

100n

2113

3103-2

10K

2

7

10K

3 63102-3

RES

3137

10K

F126

F131

9102

3124-2 2 7

1 8

100R

+3V3

3102-1

10K

I125

1u0

2130

F101

9119

3130

22R

C140

10K

3101-4

45

+3V3

F105

27

100p

2116

10K

3106-2

3120

10K

2121

100n

F137

1101

16M9

3125-1 1 8

100R

F108

8

9

15 16

100p

2115

12 13 14

2

3

4 5 6 7

1M83

1

10 11

F138

45

F102

345

10K

3105-4

1X03

REF EMC HOLE

1

2

F123

2123

100p

1u0

2101

2105

10n

100R

3128

1u0

2127

27

VLED1

3125-2

100R

3138

RES

100p

2122

47K

45

RES

100R

3126-4

3142

100R

1 8

4

1

3104-1

10K

NCP303LSN10T1

7110

5

3

2

F128

F136

RES

F132

1%1K5

3140

2102

100n

RES2114

100p

27

3115

10K

3126-2

100R

4

VLED1

+3V3

7116-2 LM393PT

5

6

7

8

F125

10K

3104-4 4 5

+3V3

I114

F118

35V

2129

10u

1 8

10K

3132

3127-1

100R

RES

1K8 1%

3123

1K5 1%

27

3139

10K

3102-2

2119

100n

9111

RES

2112

100n

273105-2

10K

2126

100p

4u7

2103

+3V3

10n

2104

100p

2131

100R

3131

F117

9121

I115

RES

3124-4

100R

45

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

+3V3

SCL

PROG

SDA CONTROL-1 CONTROL-2

EEPROM-CS

TEMP-SENSOR

SPI-CLOCK-BUF

PROG

SPI-CLOCK

SDA

CONTROL-2

EEPROM-CS

TEMP-SENSOR

CONTROL-2

CONTROL-1

SPI-DATA-RETURN

SCL

PROG

BLANK

CONTROL-1

SDA

SPI-DATA-IN

SCL

SPI-DATA-RETURN

SPI-LATCH

SPI-DATA-IN

PWM-CLOCK-BUF

PWM-CLOCK

SPI-LATCH

BLANK-BUF

PROG

CONTROL-2

SCL

TEMP-SENSOR

SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

EEPROM-CS

TEMP-SENSOR

SPI-LATCH-2

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-LATCH

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

CONTROL-1

UD-MD

SDA

18310_650_090508.eps

090507

8 LED Low-Pow: Microcontroller Block Liteon

EN 75Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

8 LED Low-Pow: Microcontroller Block Liteon

EN 76Q549.2E LA 10.

SPI-CS

+3V3

3203

F203

3205

PWM-CLOCK-BUF BLANK-BUF

PROG

SPI-LATCH

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

7

10

11

12

13 19

14

15

169

17

910111213

INPUT BUFFER

+3V3

2214

100n

7214

8

VCC

5

Φ

D

(64K)

6

10K

RES

10K

C

1

S

3 11

W

M95010-WDW6

GND

4

HOLD

2

Q

3204

7

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

3207

+3V3

33p

2201

+3V3

33p

2202

+3V3

33p

2203

RES

2220

100p

3121

100R

RES

1K0

9209

3209

RES

1K0

9211

3211

RES

1K0

9213

7201-1

74HCT125PW

2

F205

1

7201-4

74HCT125PW

12

F206

13

7201-2

74HCT125PW

5

F207

4

7201-3 74HCT125PW

8

9208 RES

EN

9210 RES

EN

9212

EN

9214

+3V3

14

3

7

+3V3

14

7

RES

+3V3

14

6

7

RES

+3V3

14

9

F208

10

EN

7

3219

100R

3220

3223

100R

PWM-CLOCK-BUF

100p

22172218

27R

3212

100R

SPI-CLOCK-BUF

100p

BLANK-BUF

100p

2219

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

18

20

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F

+3V3

2216

1u0

7215

TLC5946PWP

25

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2

6

F204

27

3

4 5 24

33p

2211

2215

100n

28

VCC

Φ

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

29

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

OUT

8

16

9

17

10

18

11

19

12

20

13

21

14

22

15

2326

XERR

VIA

32

33

30

31

3222

470R

F210

F211

F212

F213

F214

F215

EEPROM-CS-LOCAL

DATA-RETURN-SWITCH

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

+3V3

3K3

3221

3224

F209

G

H

1

A

123 45678

32 8

4

5

6

MICROCONTROLLER BLOCK LITEON

A

B

C

B

EEPROM-CS

PDTC144EU

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

+3V3

3213

7209

3

1

2

7210

3

1

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

E E

D

F

G

E

H

F

I

J

G

K

H

L

A

B

C

D

F

G

H

I

J

K

L

I

M

N

O

P

123 456

3104 313 6314.3

12

6216

SML-310

+3V3

7 8 9 10111213

CLASS_NO

SETNAMECHN

DRIVER 6LED LITEON

2

2008-08-08

3

Peter Van Hove

NAME

3

5

6 15

7 8

9

10

11

12

13

14

SUPERS.

DATECHECK

16

2K9

2008-06-02

C

17 18

I

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

M

N

O

2008-06-10

1

2008-08-08

2

??

3

P

A2

20

18310_651_090508.eps

090508

2009-May-08

Circuit Diagrams and PWB Layouts

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

C

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

if VLED < 17V

E

123

H

I

3301 F9 3302 F9 3303 F9 3304 G9

3

3308 H9

7

D

9

Place jumper 9314, 9316, 9317

P

R

P

5

E

O

3

3314 E12

456

C

4

10

3322 G12

12

H

G

11

3309 I9

G

914

9

10

13

G

B

D

M

3337 D2

F

G

H

456

C

3345 D12

E

17

10 11

19

3305 G9 3306 H9 3307 H9

D

20

12

F

G

2

17

3315 E12 3316 E12 3317 F12

7 8 9

3321 G12

3353 E1

3323 G12

N

3356 E1

B

LED LITEON

8

K

if VLED < 17V

1514

3328 G4 3330 I4 3331 F4 3332 F4

A

J

D

3372 F1

3338 D1 3339 D2 3340 D1

I

A

B

3344 D1

3389 F1

3346 E1

16

7000 C2

F F

8

H

3347 D1

13

I

L

3310 D12

13

1

3313 E12

L

3348 E12

3318 F12 3319 F12 3320 F12

3352 E1

9303-3 C10

3354 D13 3355 E1

9304-2 E10

N

J

18

I

O

3364 F13

15

3327 H4

3365 F13 3366 F13 3367 G13

3333 H4

B

C

3336 D2

9310-4 B8

3373 F1 3374 G1 3384 E1

3341 D1 3342 E2 3343 D1

3388 F1

9313-2 B12

3390 G1 3391 G1

9318-4 C8

5

1

K

7307 F4

M

12

B

A

10 18

3311 D12 3312 E12

Place jumper 9325, 9326, 9327

F307 F5

7315 G9 7316 H10

3349 E1 3350 E1 3351 E12

9303-1 C10

F347 G12 F348 G13 F349 G13

9309-4 B6

3357 D13

C

11

E

4

9307 A6

16

3325 G4 3326 H4

63

1

9308 A6 9309-1 B6

3368 G13

3334 F4 3335 D12

3371 F1

9318-3 C8

9311-1 H13 9311-3 H13 9311-4 H12

3385 F1 3386 F1 3387 F1

7

F305 H5

F340 D1

9303-4 C10

7001 C3

6

8

B

RG

9319-1 D9

12 132

G

9319-3 D9

20

A

9310-1 B8

9313-4 B12 9314 G5

7317 F9 9301 C1 9302 C1

9316 H5 9317 F5 9318-1 C8

9320-1 D7 9320-2 D7

9312-1 B10

3358 E13 3359 E13

2

3361 E13 3362 E13 3363 F13

F341 D1

11

9320-4 D7 9325 F10 9326 G10 9327 H10

9309-2 B6

3369 F1 3370 F1

9310-2 B8

F304 H5

197

F308 F4 F325 F10 F326 F9

9319-4 D9

9313-1 B12

F302 G5 F303 G4

7004 C8

F327 G10 F328 G9

7002 C4 7003 C6

7005 C11 7305 G4 7306 H5

F329 H10 F330 H10

B

9304-1 E10

F343 D2 F344 D12 F345 D12 F346 D13

F342 D1

9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6

9315-1 C12 9315-2 C12 9315-4 C12

9312-3 B10 9312-4 B10

3360 E13

9306-1 D5 9306-3 D5 9306-4 D5

560R

3359

F349

VLED1-F

9316

3332

10K

9312-11 8

560R

3365

F305

BC847BW

7305

9302

3386

1K5

F304

1K5

3310

F347

390R

3351

3319

1K5

10K

3307

F341F340

1K5

F344

3318

45

1K5

3350

9313-4

560R

3361

3330

10K

560R

3367

3347

1K5

45

3 6

9309-4

3352

9319-3

3355

560R

3371

1K5

3314

2

9309-11 8

16

4

3

7

5

F343

LTW-E500T-PH1

7005

3333

1K0

560R

3368

45

3374

560R

9304-11 8

9304-4

9303-11 8

VLED1-F

3356

1K5

3327

560R

3338

10K

9308

9314

1K0

3302

9317

1K5

3313

9319-445

F346

27

F327

9313-2

BC847BW

7307

36

7306 BC847BW

560R

3373

9318-3

VLED1-F

1K0

3305

560R

3343

3372

560R

F345

9306-336

3306

10K

390R

3345

390R

3348

560R

3369

3317

VLED1-F

F302

3 6

1K5

F307

9312-3

3323

560R

3360

1K5

3

7

25

16

4

F330

LTW-E500T-PH1

7000

3326

10K

560R

3364

1 89305-1

3303

10K

F348

3370

560R

VLED2

1K5

3389

2

3390

1K5

LTW-E500T-PH1

16

4

3

7

5

7003

9325

9307

F342

1 8

1K0

3328

9315-1

390R

3337

9303-445

3 6

1K5

9303-3

3363

3322

560R

3353

1K5

5

1K5

3344

9315-44

9320-2 72

9326

3

7

25

LTW-E500T-PH1

7002

16

4

10K

3301

9301

9310-227

9318-4

45

F308

7316 BC847BW

1K5

3391

9306-4 45

9327

VLED1-F

3 6

9318-1

18

9311-3

8204 000 8857

3104 313 6314.3

2K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

3

2

130

3

2

Peter Van Hove

2008-06-10

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-06-02

33

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

3384

1K5

3385

390R

3335

9320-1 81

560R

3358

F303

VLED1-F

3316

VLED2

1K5

7

3311

1K5

27

9304-22

1 8

9309-2

9310-1

1 8

10K

3304

1 8

9313-1

9319-1

3340

560R

3366

3388

1K5

9311-445

1K0

3334

560R

3346

560R

3357

BC847BW

7317

3309

10K

VLED1-F

3339

390R

9311-11 8

3336

390R

9305-445

54

F325

9320-4

10K

3331

390R

3342

3341

1K5

3315

560R

3362

BC847BW

7315

3308

1K0

1K5

3321

1K5

3387

560R

9312-445

3354

F328

9305-227

VLED1-F

3320

1K5

3312

3

7

25

1K5

7004

16

4 9315-227

LTW-E500T-PH1

F329

10K

3325

9306-1 1

8

3349

560R

45

F326

7

25

9310-4

7001

LTW-E500T-PH1

16

4

3

GREEN6GREEN6

PWM-G1

PWM-B1

BLUE6BLUE6

RED6RED6

RED-2

GREEN-2

RED-1

GREEN-1

BLUE-1

PWM-R1

RED-2

BLUE-2

GREEN-2

BLUE-2

PWM-R2

PWM-G2

PWM-B2

18310_652_090508.eps

090508

8 LED Low-Pow: LED Liteon

EN 77Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

C

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

3571 G7

4121

I

NN

98

67

A

3539 E9

3550 E8 3552 F7

3543 E7 3544 E8 3546 E7 3547 E8 3549 F7

8 910

123

M

L

3555 F7 3556 F8

3572 G7 3573 G7 3574 G7 3584 F8

3569 F7 3570 F7

3587 G8 3588 G8

15

P

O

E

F

G

1M3A E2 1M85 D2

3536 E9

8

B

F

O

P

11 12

G

C

D

I

3540 E7 3541 E8

18

567

E

4

3589 G8

G

H

2

8 201954

1413

3585 F8

13

LED DRIVE

B

C

D

3

3537 E9

9

11

A

L

10

K

H

18 19

B

F

4 20

3542 E9

3 4

J

K

3590 G8 3591 G8

17

6

D

5

17

10

1

9103

E

15 16

3586 F8

16

3553 F8

G

A

C

D

E

F

A

3538 E7

C

B

76

M

12

7006 A5 7007 A7

75

J

12

1K5

3

2

130

3550

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-04-20

11

SETNAMECHN

CLASS_NO

1

SUPERS.

1

NAME

DATECHECK

8204 000 8874

3104 313 6314.3

2K9

2LED + CONNECTOR

A2

2008-08-08

2008-05-23

0

2008-08-08

3

2

2008-10-31

Peter Van Hove

2008-05-23

560R

3572

3571

560R

1K5

3586

3537

VLED1

390R

1K5

3547

+3V3

16

4

3

7

5

2

3589

1K5

LTW-E500T-PH1

7006

3544

1K5

3553

560R

3555

1K5

VLED2

7

5

2

+3V3

7007

LTW-E500T-PH1

16

4

3

390R

3539

560R

3573

3585

1K5

3543

560R

VLED2

1X04

REF EMC HOLE

3569

560R

1K5

3584

VLED1

560R

3570

560R

3546

15 16

12 13 14

2

3

4 5 6 7

8

9

1

10 11

1M3A

15 16

12 13 14

2

3

4 5 6 7

8

9

1M85

1

10 11

3591

1K5

560R

3549

3552

560R

1K5

3588

3542

390R

353

6

390R

3587

1K5

3556

1K5

560R

3574

3540

3538

560R

3541

1K5

3590

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

GREEN-2

RED-2

BLUE-2

SPI-CLOCK-BUF

PROG

SPI-DATA-OUT

RED-1

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

GREEN-1

BLUE-1

18310_653_090508.eps

090508

8 LED Low-Pow: LED Drive Liteon

EN 78Q549.2E LA 10.

2009-May-08

Layout 8 LED Low-Pow

31043136314.3

18490_550_090326.eps

090326

1101

1105

1M83 1M841M85

1X03

2101

2102

2103

2104

2105

2106

2107

2108

21092110

2111

2112

2113

2114

2115

2116

2117

2118

2119

2120

2121

2122

2123

2124

2125

2126

2127

21282129

2130

2131

2201

2202

2203

2209

2210

2211

2214

2215

2216

2217

2218

2219

2220

3101

3102

3103

3104

3105

3106

3107

3108

3109

3110

3111

3112

3113

3114

3115

3116

3117

3118

3119

3120

3121

3123

3124

3125

3126

3127

3128 3129

3130

3131

3132 3133

3134

3135

3136

3137

3138

3139

3140

3141

3142

3203

3204

3205

3207

3209

3210

3211

3212

3213

3214

3215

3216

3217

3218

3219

3220

3221

3222

3223

3224

3301

3302

3303

3304

3305

3306

3307

3308

3309

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322

3323

3325

3326

3327

3328

3330

3331

3332

3333

3334

3335

3336

3337

3338

3339

3340

3341

3342

3343

3344

3345

3346

3347

3348

3349

3350

3351

3352

3353

3354

3355

3356

3357

3358

3359

3360

3361

3362

3363

3364

3365

3366

3367

3368

3369

3370

3371

3372

3373

3374

3384

3385

3386 3387 3388

3389 3390 3391

3536

3537

3538

3539

3540

3541

3542

3543

3544

3546

3547

3549

3550

3552

3553

3555

3556

3569

3570

3571

3572

3573

3574

3584

3585

3586

3587

3588

3589

3590

3591

6216

7000

7001

7002

7003

7004

7005

7006

7007

7101

7102

7110

7116

7201

7209

7210

7212

7214

7215

7305

7306

7307

7315

7316

7317

9101

9102

9103

9104

9106

9107

9108

9109

9110

9111

9112

9113

9114

9119

9121

9208

9209

9210

9211

9212

9213

9214

9301

9302

9303

9304

9305

9306

9307

9308

9309

9310

9311

9312

9313

9314

9315

9316

9317

9318

9319

9320

9325

9326

9327

C140

I110

I111

I113

I114

I115

1X04

1M1A1M2A1M3A

F101

F102

F103

F104

F105

F106

F107 F108

F109

F112

F116

F117

F118

F120

F121

F122

F123

F124

F125

F126

F127

F128

F129

F130

F131

F132

F133

F134

F135

F136

F137

F138

F139

F202 F203

F204

F205

F206

F207

F208

F209

F210

F211

F212

F213

F214

F215

F302

F303

F304

F305

F307

F308

F325

F326

F327

F328

F329

F330

F340

F341

F342

F343

F344

F345

F346

F347F348 F349

I124

I125

I126

Circuit Diagrams and PWB Layouts

EN 79Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

10 LED Low-Pow: Microcontroller Block Liteon

EN 80Q549.2E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

N

100n

2107

2108

1

CONTROL-1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-IN

SPI-LATCH-2

TEMP-SENSOR

EEPROM-CS

BLANK-BUF

CONTROL-2

+3V3

16

+3V3

3136

10n

3139

SPI-LATCH

PROG

SCL SDA

1%1K5

F106

1K5 1%

100K

7116-2 LM393PT

5

6

10K

TEMP-SENSOR

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

17

3134

RES

+3V3

8

7

4

F117

2106

RES

10n

3138

47K

RES

3141

RES

18

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

1

2

1

3

4

2

5

3

6

7

4

8 9

6

10

11

8

12

975

13

14

15

10 11 12 13

MICROCONTROLLER BLOCK LITEON

A

B

C

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

15 16

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15 16

1u0

2127

+3V3

VLED1

VLED2

35V

35V10u

2128

2129

10u

+3V3

VLED1

VLED2

9111 RES

9113

RES

9112

9114

EEPROM-CS

TEMP-SENSOR

33p

2125

EEPROM-CS

TEMP-SENSOR

SPI-DATA-IN

CONTROL-1 CONTROL-2

BLANK

PROG

CONTROL-1 CONTROL-2

PROG

SCL

SDA

SCL

SDA

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

VLED1

9107 9108

9109 9110

1105

T1.5A

SPI-CLOCK

SPI-LATCH

PWM-CLOCK

SDA

VLED1-F

+3V3

D

7102

LPC2103FBD48

E

OUT

1M84

F133

1

F135

2

F136

3

F139

4

F137

I

F

G

H

5

6

F138

7

F134

8

9 10 11 12 13 14

15 16

1M2A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

VLED1

VLED2

+3V3

VLED1

VLED2

+3V3

1u0

2130

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

+3V3

10K

3119

F109

2

3

RES

5

9121

100n

2111

1101

7110

NCP303LSN10T1

IN

RST

GND

NC

CD

+3V3

16M9

1

4

+3V3

9101

3118

RES

10K

9102

F102

RES 9103

9104 RES

F104

10K

3120

+1V8

11

12

20 25

26

4

27

6

X1

X2

RTXC1 RTXC2

RTCK

VBAT

DBGSEL

RST

VDD_1V8

2119

7

19

VSS

MICRO-

CTRL

5

+3V3

100n

43

VSSA

Φ

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1

P0.5|MISO0|MAT0.1

P0.6|MOSI0|CAP0.2

P0.7|SSEL0|MAT2.0

P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2

P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4

P0.12|DSR1|MAT1.0|AD0.5

P0.13|DTR1|MAT1.1

P0.14|DCD1|

SCK1|EINT1

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1

P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

P0.31|TDO

VDD_3V3

VDDA

17

40

9119

2121

100n

2120

7101

LD2985BM18R

1

OUTIN

3

INH BP

1u0

2101

COM

2

+3V3

10K

3107

3108

F107

F105

F108

3110

3109

100R

2109

100p

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38 39

UD-MD

8

9 10 15 16

42

F103

100n

2113

5

4

10K

100R

2110

2112

10n

2104

100p

3117

22R

3131

100R

100n

F101

2102

100n

72

10K

3101-2

10K

27

3 6

3116

3104-2

3104-3

10K

3130

F112

9106

RES

+1V8

4u7

2103

10K

27

45

27

3106-2

3105-2

3105-4

10K

1 8

3 6

3105-3

3106-1

I110

RES

100p

2118

+3V3

10K

1 8

10K

RES

3102-1

3104-1

3113

10K

RES

3114

3115

3106-33 6

RES2114

I111

10K

3132

3133

3104-4 4 5

1 8

3105-1

2115

100p

10K

3 6

3101-3

3112

10K

100p

10K

27

3102-2

3102-4 4 5

10K

8

10K

3 63102-3

45

3103-1

3101-4

100p

2116

2117

10K

1

RES

2124

2123

100p

I113 I114 I115

2126

100p

3103-445

3103-2

100p

2122

+3V3

1%

3135

1K5

F116

RES

10K

10n

3137

2105

3111

-T

C140

+3V3

3140

3123

3124-4

3128 3129

3124-2 2 7 3124-3 3125-1 1 8

3142 3125-2 3125-4 3126-2 3126-4

3126-1

3127-1 3127-4 4 5

100p

2131

100p

10K

3103-336

7

10K

2

10K

7116-1 LM393PT

1%1K5

RES

3

F118

2

RES

1K8 1%

45

100R 100R

1 83124-1

100R 100R 100R

3 6

100R

27

100R

5

100R

4

100R

27 45

100R 100R

1 8

100R

1 8

100R 100R

+3V3

8

4

I124

I125

I126

10K

123 45678 9 10111213

N

1X03

REF EMC HOLE

O

345

2

1

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

2

3

15

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

13

20

18310_630_090306.eps

2008-06-10

2008-08-08

??

O

P

A2

090306

2009-May-08

Circuit Diagrams and PWB Layouts

10 LED Low-Pow: Microcontroller Block Liteon

EN 81Q549.2E LA 10.

SPI-CS

+3V3

3203

F203

3205

PWM-CLOCK-BUF BLANK-BUF

PROG

SPI-LATCH

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

7

10

11

12

13 19

14

15

910111213

INPUT BUFFER

+3V3

2214

100n

7214

8

VCC

5

D

(64K)

6

10K

RES

10K

C

1

S

3 11

W

M95010-WDW6

GND

4

2

Φ

Q

3204

7

HOLD

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

3207

+3V3

33p

2201

+3V3

33p

2202

+3V3

33p

2203

RES

2220

100p

3121

100R

RES

1K0

9209

3209

RES

1K0

9211

3211

RES

1K0

9213

7201-1

74HCT125PW

2

F205

1

7201-4

74HCT125PW

12

F206

13

7201-2

74HCT125PW

5

F207

4

7201-3 74HCT125PW

8

9208 RES

EN

9210 RES

EN

9212

EN

9214

+3V3

14

3

7

+3V3

14

7

RES

+3V3

14

6

7

RES

+3V3

14

9

F208

10

EN

7

3219

100R

3220

3223

100R

27R

3212

100R

169

PWM-CLOCK-BUF

100p

22172218

SPI-CLOCK-BUF

100p

BLANK-BUF

2219

100p

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

17

18

20

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F

+3V3

2215

100n

28

VCC

Φ

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

29

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

OUT

8

16

9

17

10

18

11

19

12

20

13

21

14

22

15

2326

XERR

VIA

32

33

30

31

3222

470R

F210

F211

F212

F213

F214

F215

EEPROM-CS-LOCAL

DATA-RETURN-SWITCH

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

+3V3

3K3

3224

F209

3K3

3221

G

H

+3V3

2216

1u0

7215

TLC5946PWP

25

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2

6

F204

27

3

4 5 24

33p

2211

1

A

123 45678

32 8

4

5

6

MICROCONTROLLER BLOCK LITEON

A

B

C

B

EEPROM-CS

PDTC144EU

1

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

1

+3V3

3213

7209

3

2

7210

3

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

E E

D

F

G

E

H

F

I

J

G

K

owner.

is prohibited without the written consent of the copyright

H

L

A

B

C

D

F

G

H

I

J

K

L

I

M

N

123 456

7 8 9 10111213

O

P

12

3

5

6 15

7 8

9

10

6216

SML-310

+3V3

I

M

N

2008-06-10

2008-08-08

??

O

P

A2

090306

11

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

SETNAMECHN

DRIVER 6LED LITEON

2

3

SUPERS.

DATECHECK

2K9

16

2008-06-02

C

17 18

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

1

2

3

20

18310_631_090306.eps

2009-May-08

Circuit Diagrams and PWB Layouts

10 LED Low-Pow: LED Liteon

EN 82Q549.2E LA 10.

1

A

123

3

4

5

6

8

914

456

10

7

LED LITEON

B

A

VLED1-F

VLED2

9307

9308

C

B

VLED1-F

D

C

E

VLED2

9309-11 8

9309-2

9309-4

45

9301

9302

F341F340

F342

LTW-E500T-PH1

4

GREEN

RED

BLUE

F343

7000

GND_HS

3

25

16

7

LTW-E500T-PH1

4

GREEN

RED

BLUE

7001

GND_HS

3

25

16

7

7002

LTW-E500T-PH1

4

GREEN

RED

BLUE

GND_HS

7

3

25

16

9305-227

9305-445

1 89305-1

27

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7003

GND_HS

3

2

16

7

9318-3

9318-1

9318-4

F F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

D

3338

560R

3340

560R

3343

560R

3346

560R

3349

E

I

F

560R

3352

560R

3355

560R

3369

560R

3370

560R

3371

560R

3372

560R

3373

560R

3374

560R

G

3341

1K5 3344

1K5 3347

1K5 3350

1K5 3353

1K5 3356

1K5 3384

1K5 3385

1K5 3386

1K5 3387

1K5

3388

1K5 3389

1K5 3390

1K5 3391

1K5

H

I

3336

390R 3337

390R 3339

390R 3342

390R

PWM-B1

PWM-R1

PWM-G1

VLED1-F

3331

3332

10K

VLED1-F

3325

3326

10K

VLED1-F

3327

3330

54

9320-2 72

9320-1 81

9306-4 45

9306-336

9306-1 18

F307

7307 BC847BW

F308

3334

1K0

7305 BC847BW

F303

3328

1K0

10K

3333

1K0

10K

F305

7306 BC847BW

9317

F302

Place jumper 9314, 9316, 9317

if VLED < 17V

9314

F304

9316

9320-4

N

9310-4

9310-227

45

36

18

45

PWM-B2

PWM-R2

PWM-G2

11

8

9310-1

1 8

LTW-E500T-PH1

4 9315-227

GREEN

RED

BLUE

7004

GND_HS

7

VLED1-F

3301

3303

12 132

GREEN6GREEN6

BLUE6BLUE6

10K

VLED1-F

3304

3306

RED6RED6

VLED1-F

9

3

25

16

9319-1

1 8

3302

1K0

10K

3307

10K

3309

3 6

9303-3

9303-445

9303-11 8

9319-3

9319-4

3 6

45

7317 BC847BW

F326

7315 BC847BW

F328

3305

1K0

7316 BC847BW

F330

3308

1K0

10 11

9312-445

9312-1

9312-3

3 6

1 8

LTW-E500T-PH1

4

5

9304-22

7

9304-11 8

9304-4

F325

BLUE-2

9325

F327

RED-2

9326

F329

GREEN-2

9327

GREEN

RED

BLUE

7005

GND_HS

15

3

2

16

7

Place jumper 9325, 9326, 9327

G

if VLED < 17V

R

9315-44

1 8

9315-1

B

390R

3335

3345

3348

3351

16

12

9313-1

1 8

B

5

F344

B

F347

17

9313-4

9313-2

45

27

G

R

F345

RG

3310

1K5

3311

1K5

3312

1K5

3313

1K5

3314

1K5

3315

1K5

3316

1K5

3317

1K5

3318

1K5

3319

1K5

3320

1K5

3321

1K5

3322

1K5

3323

1K5

F348

9311-3

9311-445

3 6

18

13

F346

RED-1

GREEN-1

3354

560R

3357

560R

3358

560R

3359

560R

3360

560R

3361

560R

3362

560R

3363

560R

3364

560R

3365

560R

3366

560R

3367

560R

3368

560R

9311-11 8

BLUE-1

F349

GREEN-2

RED-2

BLUE-2

A

B

C

D

E

F

G

H

I

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

A

B

C

D

E

G

H

I

J

K

L

M

N

1

2

O

P

1

2

4

3

5

456

63

7

8

9

7 8 9

10

11

CLASS_NO

12

SETNAMECHN

13

DRIVER 6LED LITEON

2

2008-08-08

3

Peter Van Hove

NAME

10 18

11

12

13

1514

SUPERS.

DATECHECK

16

2K9

2008-06-02

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

O

2008-06-10

1

2008-08-08

2

??

3

P

33

A2

20

18310_632_090306.eps

090306

2009-May-08

Circuit Diagrams and PWB Layouts

10 LED Low-Pow: LED Drive Liteon

EN 83Q549.2E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

1

45

6

7

8 20

9

10

11

12

13

142 3

15

17

18 1916

A

1

2 3 456

7

8

9

10

LED DRIVE

A

7006

GREEN

RED

BLUE

GND_HS

2

3

7

2

LTW-E500T-PH1

GREEN-1

RED-1

B

BLUE-1

4

5

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7007

GND_HS

7

3

16

2

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7008

GND_HS

7009

LTW-E500T-PH1

4

3

1616

7

2

GREEN

RED

5

BLUE

GND_HS

3

16

7

C

1M85

1 2

3

4 5

D

E

I

F

6 7

8

9 10 11 12 13 14

15 16

1M3A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

+3V3

VLED1

VLED2

+3V3

VLED1

VLED2

G

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

3538

560R

3540

560R

3543

560R

3

560R

3549

560R

3552

560R

3555

560R

3569

560R

3570

560R

3571

560R

3572

560R

3573

560R

3574

560R

GREEN-2

RED-2

BLUE-2

3541

1K5 3544

1K5 3547

1K5

546

3550

1K5 3553

1K5 3556

1K5

3584

1K5

3585

1K5

3586

1K5

3587

1K5

3588

1K5

3589

1K5

3590

1K5

3591

1K5

390R

3536

3537

3539

3542

1M3A E2 1M85 D2

3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7

A

3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8

B

3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8

7006 A2 7007 A4 7008 A5 7009 A6

C

B

C

D

E

F

G

D

H

E

I

F

J

K

G

L

M

12

1X04

REF EMC HOLE

3

4

O

P

12 14

3

4

5

67

5678 910

CLASS_NO

2008-08-14

2008-10-3123

NAME

Peter Van Hove

8 1211

9

10

13 19

15

EMANTESNHC

4 LED + CONNECTOR

LITEON 2K9

SUPERS.

CHECK DATE

2008-07-29

16

1

232008-10-24

8204 000 8897

11

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

17

18

130

20

18310_633_090306.eps

M

NN

O

2008-08-14

2008-10-31

P

A2

090306

2009-May-08

Layout 10 LED Low-Pow

1M83 1M841M85

1X03

3342 3339

3337

7000

3336

9110

2130

9114

9107

2202

9302

3338

3374

3385

3389

3369

3340

3384

3390

3121

3356

3343

3373

3391

3350

3346

3372

3386

3212

9214

3371

3387

3349

3347

3370

3388

3352

3344

3220

2218

9210

3355

7201

3353

3341

3209

9301

9211

9108

2220

Circuit Diagrams and PWB Layouts

3107

3109

3108

21092110

3103

I115

3124

3130

2120

2123

2131

3142

7002

9103

9101

3118

3101

9104

3128 3129

3132 3133

I110

I113

1101

I114

7102

3102

2114

2119

I111

9113

9109

9112

9111

2125

3221

3224

3216

2211

6216

3222

2203

1105

9212

3211

9208

3219

3207

2217

9213

9209

3223

2219

2201

2216 2215

3214

7001

3215

3218

7215

2210

3325

3328

3326

3217

9316

9314

7305

21282129

2101

2102

2103

7101

2104

3334

3331

3332

9308 9307

9317

3327

3333

3330

7307

7306

9309

9305

9306

3120

3110

3119

9121

3106

3127

3113

3114

9102

3117

7110

2111

2117 2116

3115

3131

3126

2126

9106

2112 3116 9119

2113

2124 2121

3104

2122

3105

3125

2118

3112

2115

2209

7209

7210

3213

7212

2214

3204

3210

7214

7003

3203

3205

3136

3138

3139

2106

2108

2107

3134 3141

9318

9320

C140

3111

2105

3137

3135

3140

3123

7116

9310

EN 84Q549.2E LA 10.

3305

3306

9326

7315

7004

9313

3363

3354

3359

3360

3364

3365

3368

3357

3358

3361

3362

3366

3367

9315

3314

2127

3301

3302

3308

3307

3303

3304

3309

9325

9327

7316

7317

9319

9304

9303

9312

3316

3317

3315

3319

3320

3318

3312

3310

3311

3335

3313

3321

3322

3323

7005

3351

3345

3348

1X04

3555

3569

3570

3571

3572

3574

3573

3588

3553

3586

3587

3589

3590

3591

3538

3543

3540

3546

3552

9311

7006

7007

7008

3549

3541

3544

3547

3556

3550

3584

3585

3537

3536

7009

3539

3542

3104 313 6315.2

F347F348 F349

F135

F346

F345

F344

F326

F328

F330

F325

F329

F215

F214

F116

F213

F327

F106

F118

F209

F202 F203

F133

F136

I126

F107 F108

F105

F104

F109

F134

I125

F112

F117

I124

F137

F103

F102

F132

F130

F212

F101

F210

F308

F305

F211

F303

F307

F304

F204

F302

F123

F127

F139

F126

1M1A1M2A1M3A

F131

F138

F207

F208

F125

F205

F120

F122

F128

F121

F206

F342

F124

F340

F343

F341

18310_553_090309

090309

F129

2009-May-08

SSB: DC/DC

Circuit Diagrams and PWB Layouts

EN 85Q549.2E LA 10.

12

2U06 B10

2U0F A5

2U07 E11

2U0H C9 2U0B H9 2U0D H6

2U0J E9

2U0K F9

A

B

C

A

D

B

E

C

F

G

D

H

ENABLE-3V3-5V

E

I

IU1R

F

3K3

3U1V

K

owner.

is prohibited without the written consent of the copyright

+1V2-STANDBY

G

L

2U0R G10 2U0S F1 2U0T E11 2U0U E12

2U0V E12 2U0W A5 2U0Y A12 2U0Z B10

2U55 D4 2U56 D4 2U57 D2 2U58 D3

5

2U59 E2 2U60 E6 2U61 E4 2U62 F2

3

2U15 B13 3U1D F6 2U16 E13 2U17 E13 2U19 A13

2U1B E14 2U39 B6 2U50 D7 2U54 C2

2U10 C14 2U11 C14 2U12 C9 2U14 A12

2U63 F6 2U64 G9 2U65 G8 3U06 B6

6

3U09 H9 3U0A H10 3U0F H5 3U0G H6

3U0J B9 3U0K E9 3U13 C7 3U15 C5

3U74 E9 3U75 G10 3U76 E11 5U00 E9

10

5U01 B9 5U02 A13 5U03 C13 5U32 A13

7

3U16 C5 3U17 D3 3U18 D5 3U19 D5

8

3U1J G14 3U1M B9 3U1V F1

3U20 D5 3U21 E2 3U22 E3 3U23 F2

9

3U25 F8 3U30 E6 3U31 G8

5U33 B13

6U03 D5 7U02 B6

11

7U03 D3 7U05 C86U02 E2 7U06 D8 7U08 A6

12345678

DC / DC

FU05

RES

7U09 BC847BW

1

2U0S

100n

RES

GND-SIG

IU0U

3

RES

+1V2-PNX85XX

2

RES

2U59

GND-SIG

2U54

GND-SIG

3U21

20K

1n0

2u2

BAT54 COL

3U23

RES

CU77

6U02

GND-SIG

FU04

10R

RES

2U57

2U62

GND-SIG

IU59

3U22

22u

2U0F

2U0W

RES

2U55

100n

+1V2-PNX85XX

+3V3

2U61

3U15

10R

3U16

10R

IU61

3R3

3U20

BAT54 COL

4u7

FU06

IU55

IU56

3R3

3U17

IU57

100n

2U58

IU58

IU60

20K

1u0

GND-SIG

TPS53124PW

1

24

14

12

19

21

8 20

VBST1

EN1

TRIP1

VBST2

EN2

TRIP2

V5FILT

1 2

TEST

7U03

PGND

25

Φ

18

23

VIN

DRVH1

DRVL1

DRVH2

DRVL2

VFB1

VFB2

VREG5

NC

7

GND-SIG

2U56

RES 28 26

15 173

27

LL1

16

LL2

4

VO1

5

11

VO2

10 22

2 6 9

13

GND

GND-SIG

6U03

IU1P

3R3

10R

3U18

3U19

IU63

RES

+3V3

1% 3K3

IU0S

3U1D

3U06

IU0P

7U08

678

5

SI4800BDY

4

123

2U39

1n0

IU11

7U02

567 8

SI4800BDY

4

12 3

IU30

3U30

4K7

1n0

2U60

2U63

3U24

IU62

3n3

33K

VSW

7U05

IU0K

2U50

1n0

4

7U06

4

SI4800BDY

5678

23

1

5678

123

SI4800BDY

FU0A

3U25

2U65

3U31

IU31

IU0T

IU0N

3R3

3U13

IU12

FU06 F5 FU0B E14

7U09 E1

FU07 B9

CU77 G2 FU04 E2

FU08 G14

FU05 A8

FU0A E8

9

12V/3V3 CONVERSION

FU07

22R

3U0J

IU08

2U0H

IU1B

2U12

12V/1V2 CONVERSION

3U0K

2U0J

2U0K

10K

2U64

IU06

3n3

1n0

4K7

5U01

10u

22R

3U1M

1n0

5U00

10u

22R

3U74

IU07

1n0

IU1E

1n0

15

IU1D G10 IU1E F9 IU1P B6 IU1R F1

IU1T A13 IU30 E6 IU31 G9 IU55 C4

16

IU56 D3 IU57 D3 IU58 E3 IU59 E3

FU0C B14 FU0E C14 IU06 G9

13

IU07 E9 IU08 B9 IU0K D7 IU0N C7

IU0P B6 IU0S G5 IU0T G9 IU0U E1

144

IU11 B63U24 F7 IU12 D7 IU19 H9 IU1B C9

10 11 12 13

22u

2U14

2U0Y

RES

22u

2U06

2U0Z

2U0T

2U0V

2U0U

10R

3U76

1u0

2U0R

IU1D

470R

3U75

1%

2U07

RES

22u

22uRES

RES

5U02

5U32

IU60 E3 IU61 D5 IU62 F6 IU63 D5

10u

30R

5U33

30R

17

18

19

2012

A

14 15

B

IU1T

RES

2U19

1u0

+12VF1

+12VF

C

A

D

FU0C

5U03

+3V3

2U15

220u 25V

FU0E

10u

4V100u

2U10

2U11

100u 4V

RES

+3V3F

B

E

C

F

G

D

H

E

2U16

FU0B

6.3V

2U1B

2U17

330u

330uRES

RES

+1V2-PNX85XX

6.3V100u

RES

I

JJ

F

K

FU08

3U1J

1%120R

SENSE+1V2-PNX85XX

G

L

3U09

100p

1K0

47K

3U0G

GND-SIG

100p

RES

GND-SIG

2U0D

3U0F

H

M

1%

GND-SIG

2U0B

RES

GND-SIG

22K

IU19

GND-SIG

N

1

O

23

1X08

REF EMC HOLE

45

67

8 9 10 11 12 13 14 15

3U0A

GND-SIG

1K0

1%

H

M

N

O

2008-11-21

CLASS_NO

SETNAMECHN

2

DC/DC

P

2008-10-10

3

Maelegheer Ingrid

NAME

1

2

4

6

75

8 17

9

10 20

11

12

133

15

TV543 R2 LDIPNX

SUPERS.

2007-11-20

DATECHECK

6141

2009-May-08

8204 000 8932

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

19

13

A2130

18310_500_090302.eps

090302

P

SSB: DC/DC

Circuit Diagrams and PWB Layouts

EN 86Q549.2E LA 10.

1

A

TO

LED PANEL

A

1M20

FU32

B

C

1 2 3 4 5 6 7 8

1M99

1 2 3 4 5 6 7 8

9 10 11 12

1-1735446-2

B

C

D

owner.

is prohibited without the written consent of the copyright

E

FU31

2U2C

100n

RES

FU30

FU33

FU34 FU35

FU36

5U16

FU38

FU13

FU14

FU16

2U51

FU19

D

F

CU71 CU70

G

H

E

F

1M95

1

2

3

4

5

6

7

8

9 10 11

1-1735446-1

FU11

FU1A FU1B FU20 FU23 FU1C FU22 FU21 FU1D

RES2U33

I

IU51

IU52

100R 3U56

100R

6U40

IU40

1K0

2U40

4

+3V3-STANDBY

+5V

10K

3U94

7U11

BC847BW

3U55100R

3U57100R

3U58

3U80

3U81

BZX384-C8V2

2

RES

1u0

RES

10K

3U95

9U07

RES

3U98

10R

BC847BPN(COL)

10K

IU41

10K

IU43

6

7U40-1

BC847BPN(COL)

1

IU44

IU47

3U89

22K

7U41-1

BC847BS(COL)

5

IU48

IU49

+3V3-STANDBY

+3V3

RES

10K

3U96

IU53

IU21

3U4B

10K

FU1H

LAMP-ON-OUT

BACKLIGHT-OUT

BACKLIGHT-BOOST

BACKLIGHT-PWM-ANA-DISP

POWER-OK

7U40-2

4

5

3

IU42

6K8

3U82

FU40

10K

3U85

6

1

IU45

2

RES

3U97

7U10

RES

BC847BW

SCL-SET

SDA-SET

3U83

3U86

6

9U08

RES

IU20

3U41

10K

3U60

22K

RES

10K

3K3

7U41-2

BC847BS(COL)

LIGHT-SENSOR

IU50

LED2

LED1

KEYBOARD

FU39

3

4

IU54

RC

RES

5

RES

3U61

3U63

LIGHT-SENSOR

LED2

LED1

ENABLE-3V3-5V

10K

3U62

22K

10K

7

RES

3U59

10K

3U35

10K

DETECT-12V

ENABLE-3V3

3U37

100K

+3V3

+3V3-STANDBY

VSW

8

+3V3

RESERVED

+3V3-STANDBY

2U49

7U0P 2N7002

1K0

3U3Y

1

IU36

10K

3U3Z

789

7U0N

TS431AILT

1u0

2

3

123456

1K0

100R

3U67

T 32V3.0A

5U06

30R

5U17

5U20

30R

5U21

30R

FU18

FU15

3U65

RES

+12VF

30R

2U41

100p

2U42

100p

2U43

100p

+3V3-STANDBY

9U06

2U44

100p

2U45

100p

FU17

10n2U23

2U22 10n

STANDBY

+12V

+1V2-STANDBY

2K8 supplies

2K9 supplies

100p

2U30 1n0

3U90

100R

3U91

100R

3U92

100R

3U93

100R

2U46

10n2U31

3U84

3U88

10K

100p

5U07

30R

2U21

100p

2U52

RES

FU26

2U32

10n

FU10

2U34 RES

DC / DC

5U10

5U11

5U13

5U14

30R

5U15 30R

+5V

RES

1K0

FU24

2U53

100p

FU25

GND-AUDIO

+3V3-STANDBY

FU12

10n

100p

2U35

30R

5U12

30R

2U37

100R

3U66

1u0

3U64

100p

2U36

+12VD

RES

1U03

1U01

+AUDIO-POWER

*

10n

*

2U24

1

3

2

9

1u0

3

1

K

A

2

5

7U50

LD3985M122

OUTIN

INH BP

COM

2

IU38

2U27

NCNC

5U08

33p

3U4A

1K0

REF

4

5

4

6U0B

BAS316

220u

3U40

IU37

2U28

3U3W

IU34

IU3C

IU3T

2U47

IU3B

68R

220p

11

4K7

3U46

2U25

22n

IU35

2U48

100n

220n

2U29

6U0C

2U2A

68R

3U47

* IN CASE OF ONLY-ANALOG TUNER

68K

1

1K0

3U3V

1u0

BZX384-C27

1u0

3U43

3

7U0M BC847BW

2

2U26

+1V2-STANDBY

FU1G

220n

2U2B

RES

3U42

2K2

100K

IU39

FU1F

3U44

1u0

33K

3U45

RES

7U0Q BC847BW

+1V2-STANDBY

RES 33K

+33VTUN

+12V

2101

1M20 A1 1M95 E1 1M99 C1 1U01 E2 1U03 E2 2U21 B1 2U22 D2 2U23 D2 2U24 A7 2U25 B8 2U26 B9 2U27 F7

A

2U28 F8 2U29 E8 2U2A E8 2U2B E8 2U2C B1 2U30 D2 2U31 D3 2U32 E1 2U33 F1 2U34 F1 2U35 F1 2U36 F1 2U37 C1 2U40 F3 2U41 A2

B

2U42 A2 2U43 A2 2U44 A2 2U45 B2 2U46 B2 2U47 D8 2U48 D8 2U49 D7 2U51 D1 2U52 D1 2U53 C1 3U35 B6 3U37 A6 3U3V B8

C

3U3W A8 3U3Y E6 3U3Z F6 3U40 E8 3U41 B5 3U42 E9 3U43 E8 3U44 E9 3U45 E9 3U46 A8 3U47 E8 3U4A B8 3U4B B4 3U55 C3

D

3U56 C3 3U57 C3 3U58 C3 3U59 B6 3U60 E5 3U61 E5 3U62 F5 3U63 F5 3U64 C2 3U65 C2 3U66 D1 3U67 D2 3U80 E3

E

3U81 E3 3U82 E4 3U83 E4 3U84 F2 3U85 F4 3U86 F4 3U88 F3 3U89 F3 3U90 A3 3U91 A3 3U92 A3 3U93 B2 3U94 B3 3U95 B3 3U96 A4

F

3U97 A4 3U98 C3 5U06 F2 5U07 A1 5U08 E7 5U10 A1 5U11 A1 5U12 A1

13

5U13 A1 5U14 A1 5U15 B1 5U16 B1 5U17 F2 5U20 F2 5U21 F2 6U0B E8 6U0C E8 6U40 E3 7U0M A9 7U0N B7 7U0P E7 7U0Q E9 7U10 B4 7U11 B3 7U40-1 E3 7U40-2 E4 7U41-1 F4 7U41-2 F5 7U50 C7 9U06 A2 9U07 B3 9U08 B5 CU70 D1 CU71 D1 FU10 F1 FU11 F1 FU12 F1 FU13 C1 FU14 C1 FU15 C2 FU16 C1 FU17 C2 FU18 C2 FU19 C1 FU1A E1 FU1B E1 FU1C E1 FU1D F1 FU1F B9 FU1G E9 FU1H C4 FU20 E1 FU21 E1 FU22 E1 FU23 E1 FU24 C1 FU25 D1 FU26 D1 FU30 A1 FU31 A1 FU32 A1 FU33 A1 FU34 A1 FU35 A1 FU36 B1 FU38 B1 FU39 E5 FU40 F4 IU20 B4 IU21 B4 IU34 A8 IU35 B8 IU36 F7 IU37 F8 IU38 E7 IU39 F9 IU3B E8 IU3C B8 IU3T C8 IU40 E3 IU41 E3 IU42 E4 IU43 E3 IU44 F3 IU45 F4 IU47 F3 IU48 A4 IU49 A4 IU50 A5 IU51 A3 IU52 B3 IU53 B4 IU54 F5

A

B

C

D

E

F

G

H

I

123

456789

EMANTESNHC

CLASS_NO

2

2008-11-21

DC/DC

J

TV543 R2 LDIPNX

2008-10-10 3

Maelegheer Ingrid

NAME

CHECK DATE

1

2

3

5

6

7

8

SUPERS.

9

2007-11-20

10

32

C

8204 000 8932

130 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

124

13

18310_501_090302.eps

2009-May-08

J

090302

SSB: DC/DC

Circuit Diagrams and PWB Layouts

EN 87Q549.2E LA 10.

1

A

2U00 A12 2U01 A4 2U02 C4 2U03 D2

B

2 2101

2U04 D3 2U05 D2 2U08 E6 2U09 E4

2U13 E3 2U18 E6 2U20 F8 2U38 F8

123456789101112131415

3

2U66 B6 2U67 C7 2U80 C4 2U81 C2

2U83 G7 2U8A A5 2U8C B10 2U8D B10

4

2U8E A10 2U8F B12 2U8G D10 2U8H D10

5

2U8K D10 2U8M D10 2U8Q E9 2U8R E9

2U8T H6 2U8U C8 2U8V C8 2U8Y F9

3U14 B6 3U26 G9 3U27 G10 3U28 C6

9

3U2C H6 3U2D H6 3U2F F10 3U2G B8

3U2H D9 3U32 E6 3U33 F8 3U3A B12

3U3F E11 3U3G F11 3U3J B9 3U3N D9

6

7 20

2U90 A12 3U00 C5 3U01 C5 3U02 C6

3U03 C5 3U04 C3 3U05 C5 3U07 D2

3U08 D3 3U10 E2 3U11 E7 3U12 E8

118

5U04 D9 5U05 B9 5U09 A11 5U18 B11

5U30 A11 5U31 A11 6U00 C5

6U01 D2 6U09 B11 7U01 C3 7U0D-1 B7

13

7U0D-2 C7 7U0H-1 A6 7U0H-2 B6 CU25 G2

14

FU00 E2 FU0D F13 FU80 B14 FU85 D14

FU87 D8 FU8B A14 FU8C B8 FU8D B14

15

IU00 C4 IU01 C3 IU02 C5

DC / DC

RES

C C

A

3U14

7U0H-1

IU2A

2U66

IU14

78

SI4936BDY

2

1

7U0H-2

1n0

IU32

2U18

6

5

SI4936BDY

4

3

IU29

IU28

3R3

3U28

IU16

IU25

1n0

2U08

3U11

IU15

22K

3n3

2U67

7U0D-1

8

7

SI4936BDY

2

1

1n0

7U0D-2

4

56

SI4936BDY

3

FU87

3U12

IU09

2U38

IU33

3U33

12V/5V CONVERSION

FU8C

10K

2U20

3n3

1n0

4K7

5U05

10u

22R

2U8V

2U8U

3U2G

3U3J

IU82

1n0

IU2V

1n0

2U8C

12V/1V2 CONVERSION

5U04

10u

22R

3U3N

3U2H

IU85

1n0

2U8Q

IU2Z

1n0

2U8R

2U8Y

IU2Y

3U2F

22u

1u0

470R

1%

2U8D

22u

RES

2U01

D

220u 25V

2U8A

3R3

B

E

IU00

2u2

GND-SIG1

RES

2U05

GND-SIG1

2U81

IU01

3R3

3U04

IU03

100n

2U04

2U03

RES

GND-SIG1

2U13

3U08

IU05

IU10

IU13

18K

1u0

GND-SIG1

3U07

20K

BAT54 COL

6U01

1n0

GND-SIG1

FU00

10R

3U10RES

TPS53124PW

1

24

14

12

19

21

8 20

VBST1

EN1

TRIP1

VBST2

EN2

TRIP2

V5FILT

1 2

TEST

7U01

PGND

25

Φ

18

GND-SIG1

23

VIN

DRVH1

DRVL1

DRVH2

DRVL2

VFB1

VFB2

VREG5

NC

7

2U80

RES 28 26

15 173

27

LL1

16

LL2

4

VO1

5

11

VO2

10 22

2 6 9

13

GND

GND-SIG1

C

F

G

D

ENABLE-3V3-5V

H

E

I

J

F

2U02

100n

+1V2-PNX5100

+5V5-TUN

2U09

3U00

10R

3U01

10R

IU02

10R

3U02

6U00

BAT54 COL

RES

FU90

3U03

IU04

3U32

4K7

+5V5-TUN

3R3

3U05

IU2D

IU2C

4u7

2U8G

22u

2U8E

22u

2U8H

2U8M

2U8K

3U3F

22u

RES

5U09

10u

5U30

RES

30R

5U31

30R

SS36

6U09

5U18

RES

30R

5U19

RES

30R

RES

10R

3U3G

2U90

1%120R

3U3A

16

IU03 C3 IU04 D5 IU05 D3 IU09 E8

25V220u

1u0

RES

2U00

1%

25V220u

RES

2U8F

2K7

IU10 D35U19 C11 IU13 D3 IU14 B6 IU15 E6

17

IU16 C7 IU25 D6 IU28 C7 IU29 B6

18

IU2A B6FU90 E5 IU2C E5 IU2D D5 IU2T G7

FU8B

FU8D

FU80

IU2V C9 IU2Y F9 IU2Z E9 IU32 D6

+12VF2

+12V

+5V5-TUN

+5V

19

IU33 F8 IU82 C9 IU85 E9

A

B

C

FU85

+1V2-PNX5100

D

E

FU0D

SENSE+1V2-PNX5100

F

A

B

D

E

F

G

H

I

J

K

G

owner.

is prohibited without the written consent of the copyright

L

H

M

N

O

P

1

GND-SIG1

CU25

3U2C

GND-SIG1

470R

1%

3U2D

GND-SIG1

100K

100p

RES

GND-SIG1

2U8T

2U83

RES

GND-SIG1

100p

IU2T

12345678

2

3 15

4 10 14

6

7

8

95

11

2009-May-08

3U26

GND-SIG1

6K8

3U27

GND-SIG1

1K0

1%

9 101112131415

CLASS_NO

SETNAMECHN

2

DC/DC

8204 000 8932

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

33

20

18310_502_090302.eps

12

13

NAME

32008-10-10

Maelegheer Ingrid

TV543 R2 LDIPNX

SUPERS.

2007-11-20

DATECHECK

1716

G

H

2008-11-21

K

L

M

N

O

P

A2

090302

SSB: Front End

Circuit Diagrams and PWB Layouts

EN 88Q549.2E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

1

2

3 18

4

5

6

7

8

9

1211

3101

14

15

16

17

123 45678 9 10111213 14

HD1816AF/BHXP

4n7

HD1816AF/BHXP

1T01

UV1316E

RF-IN

15

IT03

IT04

2T35

18p

IT10

2T36

18p

1T11

RF-IN

15

ANTENNA-SUPPLY

IT14

2T26

18p

2T28

18p

1T21

RF-IN

15

IT15

ANTENNA-SUPPLY

AGC3AS

2

1

DC_PWR

1

2

DC_PWR

1

2

TU

NC1

3

TUNER

SCL5SDA

TUNER

NC24RF_AGC3SCL

5

TUNER

RF_AGC

NC2

4

5

6NC4

AS

6

7

SCL7SDA

AS

6

ADC

+33V_TUN7+5V

9

8

+5V

SDA

IF_OUT1

XTAL_OUT10IF_OUT2

9

8

XTAL_OUT9+5V

IF_OUT111IF_OUT2

8

10

1314

MTMT

12

IF110IF2

11

+VTUN

+5V-TUN-PIN

1314

MTMT

12

11

+5V-TUN-PIN

1314

MTMT

12

IT11

IT28

16

18 19

17

TUN-P11 TUN-P10

TUN-P9 TUN-P8 TUN-P7 TUN-P6

AT10

9T11

5T10

30R

2T25

220n

9T13

9T40

2T22

4n7

2T37

4n7

9T21

9T23

2T27

4n7

9T41

2T29

4n7

9T45 9T29

IT12

IT13

IT0D

AT11

B-IF-_N-IF-

TUN-P11

TUN-P9

TUN-P7

TUN-P10

TUN-P8

TUN-P6

TUN-P11 TUN-P10

TUN-P9 TUN-P8 TUN-P7 TUN-P6

B-IF+_N-IF+

TUN-P10

TUN-P9

TUN-P2

TUN-P5

TUN-P4

TUN-P11 TUN-P10

TUN-P9 TUN-P8 TUN-P7 TUN-P6

TUN-P8

IT16

9T14

RES

9T43

IT19

1T25

+5V-TUN

3T22

2T39

1

I

2

3

GND

OFWX6966M

IT30

RES

9T24

6K8

FT21

22n

B-IF-_N-IFB-IF+_N-IF+

IF-AGC

B-IF-_N-IF-

PDN

B-IF+_N-IF+

RF-AGC

36M125

9T22

RES

5

O1

4

O2IGND

IT26

9T44

IT17

+5V-TUN

RES

2T19

2T20

2T15

10n 2T17

10n

UPC3221GV-E1

IT20

IT23

IT32

2T21

IT34

5T12

IT36

7T10

2 INPUT1

3 INPUT2

4VAGC

22n

22K

3T18

820n

AGC CONTROL

3T19

220K

2T13

10n

RES

1

IT21

5

+5V-TUN

+3V3A

GND2

7OUTPUT1

IT24

6OUTPUT2

VCC

GND1

8

3T98

10K

RES

3T17

6K8

RES

9T33

RES

9T34

9T31

2T16

IT22

10n

2T18

IT25

10n

RES

9T32

IF-

IF+

PDP

PDN

FRONT-END

A

TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5

RESERVED

3T10

100R

FT23

B

+33VTUN

+5V-TUN

C

3T11

100R

IT05

6T10

IT08

5T11

30R

FT17

2T12

22u

2T14

100n

6T11

BZX384-C33

+5V-TUN-PIN

3T12

100R

FT22

+VTUN

220n

2T11

2T10

D

E

RF-AGC TUN-P1

TUN-P3

TUN-SCL

TUN-P4

TUN-SDA

TUN-P5

TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5

TUN-P1

RF-AGC TUN-P3

TUN-SCL

TUN-P6

TUN-SDA

TUN-P7

9T10

IT09

9T12

3T13

47R

3T14

47R

9T18

2T23

9T20

3T15

47R

3T16

47R

IF 1T11 IS USED THEN 2T25 AND 9T11 ARE ALSO STUFFED

I

F

G

TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5

RF-AGC TUN-P2

TUN-P3

IF-AGC TUN-P9

IF 1T21 IS USED THEN 2T23,2T25,3T14, 3T15, 9T13, 9T11 AND 9T21 ARE ALSO STUFFED

FT18

9T25

9T27

9T30

H

I

19

20

1T01 A5 1T11 C5 1T21 E5 1T25 C10 2T10 B3 2T11 B3 2T12 C2 2T13 C12 2T14 C2 2T15 C10 2T16 C13

A

2T17 C10 2T18 C13 2T19 F10 2T20 G10 2T21 E11 2T22 B7 2T23 D5 2T25 B7 2T26 E5 2T27 D7 2T28 E5 2T29 E7 2T35 B5

B

2T36 B5 2T37 C7 2T39 H9

3T10 B2 3T11 B2 3T12 B2 3T13 B5 3T14 B5 3T15 E5 3T16 E5 3T17 E11 3T18 E11

C

3T19 E11 3T22 G9 3T98 E11

5T10 B7 5T11 C2 5T12 F11 6T10 B2 6T11 B2 7T10 C11 9T10 B5 9T11 B7

D

9T12 B5 9T13 B7 9T14 C10 9T18 D5 9T20 D5 9T21 D7 9T22 D10 9T23 D7 9T24 E9 9T25 F5 9T27 G5 9T29 G7

E

9T30 G5 9T31 C13 9T32 D13 9T33 F11 9T34 G11 9T40 B7 9T41 E7 9T43 C10 9T44 D10 9T45 G7 AT10 B7 AT11 D7

F

FT17 C2 FT18 G5 FT21 H9 FT22 B3 FT23 B2 IT03 B5 IT04 B5 IT05 B1 IT08 C1 IT09 B5 IT0D B7

G

IT10 B5 IT11 B7 IT12 B7 IT13 B7 IT14 E5 IT15 F5 IT16 B9 IT17 B11 IT19 C10 IT20 C11 IT21 C12 IT22 C13

H

IT23 C11 IT24 C12 IT25 C13 IT26 D10 IT28 D7 IT30 D9 IT32 D11 IT34 F11 IT36 G11

A

B

C

D

E

F

G

H

I

J

K

L

M

I

N

O

123 4

567

8 910

11 12 13

SETNAMECHN

CLASS_NO

14

2

N

O

2008-11-21

FRONT-END

P

NAME

1

2

3

4

5

6

7

8

9 15

10

11

12

13

14

32008-10-10

Randal De Keyzer

TV543 R2 LDIPNX

SUPERS.

DATECHECK

2008-06-03

3

17

2009-May-08

8204 000 8929

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

8161

130

19

P

1

A2

20

18310_503_090302.eps

090302

SSB: Demodulator

TCK TDI TDO TMS

GPIO1 GPIO2

VIA

MSTRT

MERR MCLK MVAL

0 1 2 3 4 5 6 7

RF_AGC

IF_AGC

SIF

CVBS

DA CL

WS

VSYNC

VIA

MD

I2S

I2C

PD

VDDH VDDL

VSSH VSSL

VSSAH_AFE1

VSSAH_CVBS

VSSAH_OSC

VSSAL_AFE1

VSSAL_AFE2

GND_HS

VDDAH_AFE1

VDDAH_CVBS

VDDAH_OSC

VDDAL_AFE1

VDDAL_AFE2

XI

XO

P N

SCL2

SDA1

RSTN

SAW_SW

SCL1

SDA2

COM

OUTIN

C

3T52 B2 3T53 B2

12

56

3T79 E12 3T80 A9 3T81 A9 3T82 A9 3T83 E3 3T84 F3 3T86 F3 3T87 F3 3T88 F5 3T89 F3 3T90 F3

2T61 E10

G

E

F

3T63 C9 3T64 C9 3T65 C9 3T66-1 D4 3T66-2 D4 3T66-3 D3 3T66-4 D4 3T67 D4 3T68 E2 3T69 E3

2T59 B3 2T60 C8

C

D

5T52 G6 5T53 H6 5T54 I7 5T55 I6 6T50 E3 6T51 F2 7T50 A6 7T51-1 C9 7T51-2 C10 7T52-1 E9 7T52-2 E10

3T70 D9 3T71 D9 3T72 E9

3

7

2T78 I6 2T79 I6 2T80 I7 2T81 I7 2T82 I7 2T83 E4 2T84 E3 2T85 E2 3T50 A2 3T51 A10

O

5

2T51 A4

12

AT50 A4 AT51 B4 FT20 E6 FT24 C5 FT25 C3 FT50 B8 FT51 C3 FT52 C3 FT53 C3 FT54 C3 FT55 F7

3T91 F5 3T92 G3

3T54 B3

45

RESERVED

2T52 A4 2T53 B3 2T54 B4 2T55 B3 2T56 B4 2T57 B3 2T58 B4

A

B

6

15

3T61 C4 3T62 C9

IT59 B9 IT60 B4 IT61 B3 IT62 B9 IT63 B9 IT65 C3 IT66 C4 IT67 C4 IT68 C3 IT69 C8 IT70 C9

7T53-1 E11 7T53-2 E11

2T62 D12 2T63 D9

H

I

A

7

F

G

N

2T24 G5 2T50 A4

2T77 I6

B

3T77 E9 3T78 E11

IT76 D8 IT77 D9 IT79 D3 IT80 E9 IT81 E10 IT83 E9 IT84 E2 IT85 E3 IT86 F6 IT88 F6 IT89 F3

FT56 G8 FT57 G6

K

67

6

14

7891011121345

3T59 C4 3T60 C9

5T50 B3 5T51 G7

15

IT93 G2 IT94 G3 IT95 G3 IT96 E11 IT97 E11 IT98 E5

16

IT73 C9 IT75 D9

13

2T64 F6 2T65 G6

B

C

D

E

F

G

H

I

1T50 A5

2T75 H6 2T76 H7

3T75 E9 3T76 E9

9T70 C2 9T71 C2

12

J

RESERVED

4

8

F

C

IT90 F3 IT91 F4

P

I

8 9 10 11 12 13

123

3T57 C3 3T58 C4

3T94 H3 3T95 E9

IT57 B4 IT58 B10

M

N

M

I

DEMODULATOR

19

1 9

is prohibited without the written consent of the copyright

2T66 G6 2T67 G7 2T68 G7 2T69 G7 2T70 G7 2T71 G8 2T72 G8 2T73 H6 2T74 H7

3T73 E11 3T74 E12

9T63 E11 9T64 F6

K

20

3

9

D

P

C

14

G

A

4

3T55 B2 3T56 D11

owner.

3T93 G3

IT53 B5 IT55 B4 IT56 B3

10

11

J

2 11

A

83

20

L

16

E

B

18

9T15 C1 9T16 C1 9T62 F6

17

19

O

FT58 H7 FT59 I7 FT60 C10 FT61 D11 FT62 E11 FT63 I6 IT50 A5 IT51 A5

13

H

17

18

150R

10

1

2

E

H

L

7T54 F7 7T55-1 F4 7T55-2 G4 7T56 E3

+5V-TUN-CVBS

3T74

3T64

150R

+3V3

IT69

+5V-TUN

2u2

2T24

5

3

4

IT63

IT79

BC847BPN(COL)

7T52-2

FT58

3T57

100R

10n

2T55

+3V3

IT66

2T77

2u2

2T61

22u

100n

2T82

100R

3T70

10K

3T75

4K7

+3V3

3T59

100n

2T69

FT51

IT88

IT83

IT73

5T53

30R

+12V

FT55

+1V2A

IT51

+3V3

3T78

100R

RES

100n

2T58

680n

5T50

2u2

2T73

3T68

4K7

FT63

FT25

2T50

12p

3T62

470R

+3V3E

7T53-2

BC857BS(COL)

RES

5

3

4

7T54

RES

1

32

IT96

LD1117DT12

5T51

600R

2T62

3p3

12p

2T51

600R

5T54

IT59

FT59

2T54

100p

6T50

BZX384-C6V8

68R

3T56

100K

3T83

IT89

3T65

150R

3T92

10K

LM393PT

7T55-2

5

6

7

84

152855

29

49

50

384151

35

457172554

3

97 98

99 100 101

69 70 71 72 73 74

87

88

89

90

91

92

93

94

68

95

9678

79 80 81 82 83

84

67 85

86

1826532162756

66

75 76 77

44

59 60 57 58

3742523646

8

21

22

6

5

10

48

47

33

32

31

1

34

39

40

9

11

12

13

14

19

20

43

65

4 30

23

62

24

61

63

64

Φ

DEMODULATOR

DRX3926K-XK-A2

7T50

+3V3

+1V2

FT56

FT53

3T52

220R

2T78

2u2

2K2

3T95

3T86

220R

IT53

+3V3D

22u

100n

2T67

2T63

100n

2T83

2T74

100n

IT60

IT50

+5V-TUN

IT57

+3V3

IT62

3T88

10K

2T72

100n

+3V3

10K

3T63

180R

9T16 RES

3T77

9T15 RES

220R

3T50

FT52

4K7

3T94

+3V3

FT57

6

1

3T54

470R

BC847BPN(COL)

7T52-1

2

27M

1T50

3T53

560R

150R

3T76

IT97

+1V2A

2

4

3

2T79

100n

BCP56

7T56

1

+3V3

+1V2-PNX85XX

RES

18

FT62

10K

3T66-1

IT86

3T81

RES

10K

IT76

3T80

10K

3T93

2K7

IT61

2T80

100n

+3V3D

+5V-TUN-CVBS

IT85

3T66-2

10K

RES

27

2T53

22p

3T67

4K7

IT77

FT24

FT54

100u

2T65

+1V2

9T62

4V

RES

2T64

100n

+3V3

18K

3T60

30R

5T52

FT61

3T58

100R

+5V-TUN

IT70

2R2

3T84

27K

3T89

RES

36

IT81

+3V3A

10K

3T66-3

3T61

+3V3E

4K7

IT90

IT91

2T84

100n

220R

3T87

1

BC847BPN(COL)

7T51-1

RES

7T53-1

BC857BS(COL)

RES

2

6

IT84

+3V3

IT93

100R

3T73

560R

IT65

3T55

IT98

3T51

10K

AT51

2u2

2T81

3T82

10K

RES

+3V3

2T68

100n

18K

3T71

5

3

4

FT20

7T51-2 BC847BPN(COL) RES

27K

3T90

150R

3T79

+5V-TUN-CVBS

10n

2T57

DATE

NAME

2

SUPERS.

CLASS_NO

SETNAME

32

2008-06-03

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Randal De Keyzer

2008-10-10 3

130 A2

FRONT-END

TV543 R2 LDIPNX

8204 000 8929

CHECK

IT58

2T75

2u2

2p2

2T59

2T66

100n

IT75

6T51

BAS316

+5V-TUN-CVBS

100n

2T56

+1V2

RES

FT50

3T69

2R2

IT80

IT55

3T66-4

10K

RES

45

2T85

22n

100p

2T52

6K8

3T91

100n

2T71

LM393PT

7T55-1

3

2

1

84

9T64

30R

5T55

3T72

+12V

470R

+3V3

2T70

2u2

9T70

9T71

ANTENNA-SUPPLY

FT60

IT67

+3V3

IT68

2T60

100n

9T63

IT94

IT56

+12V

+3V3A

IT95

+5V-TUN-CVBS

AT50

2T76

100n

RF-AGCSCL-SSB

TUN-SCL

SDA-SSB

TUN-SDA

ANTENNA-CTRL

FE-CLK

IF-AGC

TUN-SDA

TUN-SCL

ANTENNA-CTRL

JTAG-TMS-DRXK

JTAG-TDO-DRXK

JTAG-TDI-DRXK

JTAG-TCK-DRXK

RESET-SYSTEM

FE-VALID

FE-SOP

FE-DATA7

FE-DATA4

FE-DATA3

FE-DATA0

FE-DATA2

FE-DATA1

FE-DATA6

FE-DATA5

SDA-SSB

SCL-SSB

PDP

PDN

IF-P

CVBS-TER-OUT

CVBS4

IF-

IF+

18310_504_090302.eps

090302

Circuit Diagrams and PWB Layouts

EN 89Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Stand-by Controller

EN 90Q549.2E LA 10.

1

A

2

12

3

4 18

5

6

34

7

5910

8

9

10

11

678

13

14

5121

11

PNX 8543 : STANDBY CONTROLLER

B

A

1HF0

22p

2HF1

3H86-2

27

10K

63

10K

3H87-4

27M

45

IHW1

IHW3

IHW2

IHW6

IHWB

IHWC

IHWG

IHWH

IH19

10K

3H86-1

18

IH04

10K

3H92-2

72

10K

3H92-1

18

IH26

10K

3H78-3

36

IH91

10K

3H78-4

54

IH18

IHW4

IHW9

IHWD

IHWM

3H44

FHC3

BAS316

7H93-2

10K

IHW5

IHWA

IHWF

IHWN

3H78-2

2

6HW2

5

2

IH08

BC847BS(COL)

5

22p

2HF0

C

B

+3V3-STANDBY

D

+3V3-STANDBY

C

E

F

+3V3-STANDBY

D

G

E

H

I

F

J J

3H13

3H15

3H17

3H20

3H42

3H48

3H23

3H26

3H28

3H31

3H60

10K

3H01

HOTEL TV

*

10K RES

10K

RES 10K

10K

RES

10K

3H51

3H21

10K

RES

10K

RES3H64

3H10

3H16

3H39

10K

RES

3H58

3H36

10K

3H70

100K

10K

+3V3

+1V2-PNX85XX

10K

3H14 RES

10K

3H19

4K7

10K 3H46

27K

RES 10K

10K

3H27

10K 3H30

10K

RES

3H00

10K

BOLT-ON-TS-ENn

RESET-ETHERNET

10K

REGIMBEAU_CVBS-SWITCH

SUPPLY-FAULT

RES3H24

IH02

RESET-SYSTEM

2H01

100n

9H25

9H26

*

9H27

*

3H86-4

45

10K

RESET-NVM

RESET-PNX5100

UART-SWITCH

WP-NANDFLASH

RESET-AUDIO

AUDIO-MUTE

2H00

1n0

RC-UP

CEC-HDMI

MHP-SWITCH

EJTAG-DETECT

LAMP-ON

STANDBY

DETECT1 DETECT2

POWER-OK

ENABLE-3V3

RXD-UP

TXD-UP

BOLT-ON-IO

KEYBOARD

SPI-PROG

SPI-WP

RC-UP

RC-OUT

RC-UP

RC-IN

3H86-3

63

3H92-3

63

10K

BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNET UART-SWITCH WP-NANDFLASH RESET-AUDIO AUDIO-MUTE

RC-UP REGIMBEAU_CVBS-SWITCH CEC-HDMI SUPPLY-FAULT

SDM

MHP-SWITCH EJTAG-DETECT LAMP-ON STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3

RXD-UP TXD-UP BOLT-ON-IO

RESET-SYSTEM AV2-BLK AV1-BLK KEYBOARD LIGHT-SENSOR AV1-STATUS AV2-STATUS

SPI-PROG SPI-WP

RC

10K

RES

G

K

owner.

is prohibited without the written consent of the copyright

H

L

M

I

+1V2-PNX5100

+5V

3H87-1

1

10K

3H92-4

4

5

10K

8

3H87-2

10K

27

3H87-3

W1

W2

W3

AC2 AC1 AB3 AB2 AB1 AD2 AD1 AC5

AF2

AG4 AG3 AG2

AC4 AC3 AE1 AD5 AD4 AD3 AE5 AE4

AG1 AH5 AH4 AH3 AH2 AH1

AN3 AN2 AP2 AP1

AK2 AK4

10K

72

IH14

6

7H16-1 BC847BS(COL)

1

IH16

3

7H16-2 BC847BS(COL)

4

IH17

6

7H93-1 BC847BS(COL)

1

3

4

7H00-6 PNX85439EH/M2/24182

STANDBY

I

XTAL

O

CSB

SPI

VSS_XTAL

SDO 0 1

MC

SDA

2 3

P0

4

PWM

5 6 7

PSEN 0 1 2

P1 3 7

RESET_IN 0 1 2 3

P2

4 5 6 7

UA_RX

0

UA_TX

1 2

P3

3 4 5

0 1

CADC

2 3

4

P6

5

1

RES

DETECT-12V

AJ1

CLK

AK3 AK1

SDI

AJ4

AL5

SCL

AK5

AJ3

0

AJ2

1

AE2

ALE

AF4

EA

AF3

3H78-1

81

3

2

2H03

1u0

2H12

3EA1FA

10K

7H14

PDTC114EU

3H41

10K

100n

SPI-CLK SPI-CSB

SPI-SDI

3H65 100R

100R3H66

3H67 100R

100R3H68

3H69

100R

3H54

100R

3H56

100R

+3V3-STANDBY

IH20

+3V3-STANDBY

4K7

3H72

IH34

9H13

7H11

BAS316

IH33

6H10

NCP303LSN30

IH36

2

INP

IH35

5

CD

NC

4

3K3

100n

3H43

2H11

SPI-SDO

SCL-UP-MIPS SDA-UP-MIPS

DETECT2DETECT1

1

OUTP

GND

3

SCL-UP-MIPS

SDA-UP-MIPS

LED1

LED2

PSEN

ALE

EA

RESET-STBY

SPI-SDO SPI-SDI

SPI-CLK

SPI-CSB

SPI-WP

+3V3-STANDBY

IH92

IH00

IH03

IH06

IH07

7H02

M25P05-AVMN6

5

6

1

3

7

RESET-NVM

IH15

+3V3-STANDBY

D

C

S

W

HOLD

IH32

IH37

8

VCC

Φ

512K

FLASH

VSS

4

3H32

10K

3H02 RES

4K7

3H04RES

10K

3H06

10K

3H08

10K

2H10

IH01

2

Q

FHC6

4K7

10K

3H07

10K

100n

RES

+3V3-STANDBY

FHD1

9H14

9H15

3H03

3H05

1

RES

NCP303LSN30

IHD0

2HD0

+3V3-PER

3HC2-2

27

3HC2-1

81

10K

+3V3-PER

3HC2-3

36

IH21

100n

10K

1 2 3

N

16

17

12 13 14

+3V3-STANDBY

+3V3-PER

OUTP

GND

3

IHC1

(8Kx8)

4K7

IHC2

BC857BW 7HC4

8

Φ

4

FHC7

+3V3-PER

3H22

FHD2

+3V3-STANDBY

1

2HC0

100n

WC

SCL

3

3HD4

RES

9H05

10K

RES

3H25

IH09

1

7H03 BC847BW

2

10K

7

6

5

FHD0

RES

9H28

10K

3HC2-4

45

FHC1

3H52

100R

3H53

100R

FHC2

LAMP-ON

LAMP-ON-OUT

RESET-STBY

SCL-UP-MIPS

SDA-UP-MIPS

+5V

RES

3H12

4K7

7HD0

2

INP

5

CD

NC

4

FH09

7HC3

M24C64

EEPROM

0 1

ADR

2SDA

MAIN NVM

19

1HF0 A4 2H00 C3 2H01 E3 2H03 F6 2H10 D11 2H11 H7 2H12 H6 2HC0 H13 2HD0 F12 2HF0 A3 2HF1 B3

A

3H00 E2 3H01 E2 3H02 B11 3H03 B11 3H04 B11 3H05 B11 3H06 C11 3H07 C11 3H08 C11 3H10 B2 3H12 C12

B

3H13 B1 3H14 B2 3H15 B1 3H16 B2 3H17 B1 3H19 B2 3H20 C1 3H21 C2 3H22 C13 3H23 C1 3H24 C2 3H25 C13

C

3H26 C1 3H27 C2 3H28 C1 3H30 D2 3H31 D1 3H32 B11 3H36 D2 3H39 C2 3H41 H6 3H42 C1 3H43 H7 3H44 I4

D

3H46 C2 3H48 C1 3H51 C2 3H52 I13 3H53 I13 3H54 C7 3H56 C7 3H58 D2 3H60 D1 3H64 D2 3H65 B7

E

3H66 B7 3H67 B7 3H68 B7 3H69 C7 3H70 E2 3H72 G7 3H78-1 E6 3H78-2 E5 3H78-3 H4 3H78-4 H4 3H86-1 F4 3H86-2 F4

F

3H86-3 F3 3H86-4 F2 3H87-1 I2 3H87-2 I3 3H87-3 I3 3H87-4 I4 3H92-1 G4 3H92-2 G4 3H92-3 G3 3H92-4 H3 3HC2-1 H12 3HC2-2 G12

G

3HC2-3 H12 3HC2-4 H13 3HD4 E13 6H10 H7 6HW2 F5 7H00-6 A5 7H02 D10 7H03 C13 7H11 H8 7H14 F6 7H16-1 F5

H

7H16-2 G5 7H93-1 H5 7H93-2 I5 7HC3 H12 7HC4 H12 7HD0 E12 9H05 D13 9H13 G8 9H14 E11 9H15 F11 9H25 E3 9H26 E3

I

9H27 E3 9H28 H13 FH09 H12 FHC1 H13 FHC2 I14 FHC3 C5 FHC6 H11

FHC7 I13 FHD0 E13 FHD1 F11 FHD2 D13 IH00 D10 IH01 D11 IH02 D3 IH03 D10 IH04 G4 IH06 D10 IH07 D10 IH08 H5 IH09 C13 IH14 F5 IH15 C10 IH16 F5 IH17 G5 IH18 I4 IH19 F4 IH20 F7 IH21 I12 IH26 H4 IH32 C10 IH33 H7 IH34 G8 IH35 H7 IH36 H7 IH37 C10 IH91 H4 IH92 F9 IHC1 H12 IHC2 G12 IHD0 F12 IHW1 B4 IHW2 B4 IHW3 B4 IHW4 B4 IHW5 B5 IHW6 B4 IHW9 B4 IHWA C5 IHWB C4 IHWC C4 IHWD C4 IHWF C5 IHWG C4 IHWH C4 IHWM D4 IHWN D5

20

A

B

C

D

E

F

G

H

I

K

L

M

N

312

O

45

1X03

EMC HOLE

6

78

910

11

CLASS_NO

12

13 14

SETNAMECHN

2

O

2008-11-21

STANDBY CONTROLLER

P

NAME

Randal De Keyzer

1

2

3

4

5

6

7 1413

8

9

10

11

12

PNX8543 TV543 R2 LDIPNX

32008-10-10

15

SUPERS.

DATECHECK

16

2007-11-29

17

2009-May-08

8204 000 8927

C

ROYAL PHILIPS ELECTRONICS N.V. 2005

18

19

P

116

A2130

20

18310_505_090302.eps

090302

SSB: PNX8543 - Debug

Personal Notes:

10000_012_090121.eps

090121

Circuit Diagrams and PWB Layouts

EN 91Q549.2E LA 10.

1

A

1H11 C2

2H06 C3

B

C

A

D

B

owner.

is prohibited without the written consent of the copyright

E

2

2H07 D3

3HF3 A3 6HF0 B3 7HF2 B3 FH01 D2

1

PNX8543 : DEBUG

RESET-SYSTEM

3

5

64

A

FH00 C2

2

FH08 D3 IH93 C2

3

IH94 C3

4

IH95 D2

B

C

+3V3-PER

A

D

330R

3HF3

6HF0

SML-310

B

7HF2 PDTC114EU

E

F

G

H

I

J

C

D

CLASS_NO

2008-10-10 3

NAME

Maelegheer Ingrid

SPI-PROG

SDM

FH00

FH01

12

EMANTESNHC

DEBUG STBY CTRL

PNX8543 TV543 R2 LDIPNX

SUPERS.

CHECK DATE

1

2007-11-29

2

4

1

1H11

SKHUBHE010

3

IH93

2H06 RES

TSTPOINT

FOR DEBUG

SPI-PROG

IH95

TSTPOINT

FOR DEBUG

SDM

100p

GND

TSTPOINT

FOR DEBUG

2H07

100p

IH94

RES

FH08

3

8204 000 8927

16 2

C

ROYAL PHILIPS ELECTRONICS N.V. 2005

4

130

F

C

G

D

H

4

I

2

2008-11-21

J

A4

53

6

18310_506_090302.eps

2009-May-08

090302

SSB: PNX8543 - Control

Circuit Diagrams and PWB Layouts

EN 92Q549.2E LA 10.

1

A

B

C

+3V3-PER

D

C

owner.

is prohibited without the written consent of the copyright

E

+3V3-PER

D

F

2 10

3

4

123 89

5

6

7

4567

8

9

11

PNX8543 : CONTROL

+3V3-PER

10K

3HF9

7H00-8 PNX85439EH/M2/24182

CONTROL

BL_PWM

RESET_SYS

TCK TDI

EJTAG

TDO

TRSTN

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9

UA2_TX UA2_RX

CLK_27_OUT

USB

USB_VBUS

SDA

SCL SDA

FAULT

PWR_EN

RREF

USB_RPU

USB_ID

F33

1SCL

H33

1

D32

2

B33

2

D33

3SMT

G32

3

AN16

DM

AP16

DP

AL16 AK16 AM16

AP17 AN17

3HP2

12K

AM17

USB20-DM

USB20-DP

USB-OC

1%

1K53H37

3H38 10K

10K3H45

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

FH03

USB20-DM

USB20-DP

+3V3-PER

3H33

3H09

15K 15K

3HP310K

10K 3HP4

3HP610K

10K 3HPA

3HPB10K

10K 3HFY

3H1110K 10K 3HP8 10K 3HPC

3HPL10K

3HPP10K

10K 3HPR

EJTAG-TCK

EJTAG-TDI EJTAG-TDO EJTAG-TMS

EJTAG-TRSTN

IHS8

BOOTMODE

IH12

IRQ-PCI

IRQ-CA RXD-MIPS TXD-MIPS

TXD-MIPS2

RXD-MIPS2

RESET-SYSTEM

EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TRSTN

BOOTMODE WC-EEPROM-PNX5100 IRQ-PCI IRQ-CA RXD-MIPS TXD-MIPS

TXD-MIPS2 RXD-MIPS2

PCI-CLK-OUT

33R

IHF6 IHF8 IHF9 IHFA

3HPW

IHF4

IHFB

9H17 RES

IHF7

AP27

AN28

AN4 AP3 AP4 AM4 AL4

U2 U3 U4 L34 L32 L31 V2 V3 V4 V5

AK27 AL27

AP29

12

A

B

C

D

13

3H09 C6 3H11 C1 3H33 C6 3H37 D4 3H38 D5 3H45 D4 3H49 E4 3H50 E4 3HF9 A3 3HFY C1 3HP2 C4 3HP3 B1 3HP4 B1 3HP6 B1 3HP8 C1 3HPA C1 3HPB C1 3HPC C1 3HPD E2 3HPE E2 3HPF E2 3HPG E2 3HPH E2 3HPJ F2 3HPK E4 3HPL C1 3HPM F4 3HPP D1 3HPR D1 3HPS F2 3HPT F4 3HPU F2 3HPV F4 3HPW B3 7H00-8 B3 9H17 D3 FH03 C5 FH04 E4 FH05 F4 FH11 F4 FH12 F4 IH12 C1 IHF4 B3 IHF6 C3 IHF7 C3 IHF8 C3 IHF9 C3 IHFA C3 IHFB B3 IHS8 C1

A

B

C

D

E

F

G

H

FH04

FH11

FH12

FH05

3H49

4K7

3HPK

1K5

3HPT

4K7

3H50

4K7

3HPM

1K5

3HPV

4K7

+3V3-PER

CLASS_NO

789

EMANTESNHC

E

G

H

F

I

2008-11-21

2

SCL1 SCL-UP-MIPS

E

SDA1

SCL2 SCL-UP-MIPS

RES 3HPG

SDA2 SDA-UP-MIPS

SCL3 SCL-SSB

SDA3 SDA-SSB

SCL2 SCL-SET

SDA2 SDA-SET

F

I

1

3HPE

100R

3HPJ

100R

3HPU

100R

3HPD

100R

SDA-UP-MIPS

3HPF

RES

100R

3HPH

100R

3HPS

100R

2

SCL-UP-MIPS

SDA-UP-MIPS

SCL-SSB

SDA-SSB

SCL-SET

SDA-SET

3456

MIPS , I2C & EJTAG

J

PNX8543 TV543 R2 LDIPNX

2008-10-10 3

Maelegheer Ingrid

NAME

CHECK DATE

1

2

3

4

56 10

7

8

SUPERS.

2007-11-29

9

16 5

C

8204 000 8927

130 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

11

12

13

18310_507_090302.eps

J

090302

2009-May-08

SSB: PNX8543 - Control

Circuit Diagrams and PWB Layouts

EN 93Q549.2E LA 10.

1

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

D

E

2

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

4

53

6

7

8

9

10 11

12

13

A

1

2

3456

78

PNX 8543 : CONTROL

PCI-CLK-OUT

7H00-3 PNX85439EH/M2/24182

A29

0

B29

1

C29

2

D29

3

A28

4

B28

5

C28

6

D28

7

E28

8

A27

9

B27

10

C27

11

D27

12

E27

13

A26

14

B26

15

PCI_AD

E24

16

D24

17

C24

18

B24

19

A24

20

E23

21

D23

22

C23

23

B23

24

A23

25

E22

26

D22

27

C22

28

B22

29

A22

30

E21

31

3HFH

IHF0

10R

PCI

TRDY

PCI_CBE

INTA_OUT

PLL_OUT

XIO_ACK

XIO_AD25

XIO_SEL

3HFG

10R

IHF5

3HF2

10R

3HF4

10R

CLK

DEVSEL

FRAME

IDSEL

IRDY

PAR PERR SERR STOP TRDY

REQ

GNT

REQ_B GNT_B

*

D21

0

C21

1

B21

2

A21

3

A30 A25 C26 B30 C30 D26 E25 C25 D25 B25 E26

D30 E30

E31 E29

IHS7

AP28

A20 B19

B20

0

IHF1

C20

1

IHF2

D20

2

IHF3

E20

3

PCI-CLK-ETHERNET

PCI-CLK-PNX5100

PCI-CLK-PNX8535

3HEU

9HG3

PCI-CLK-MINI

100R

3HF5

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3

PCI-CLK-PNX8535

PCI-DEVSEL

PCI-FRAME

PCI-AD24

IH30

PCI-IRDY

PCI-PAR PCI-PERR PCI-SERR PCI-STOP PCI-TRDY

PCI-REQ

PCI-GNT

PCI-REQ-B PCI-GNT-B

PCI-CLK-OUT

XIO-ACK

XIO-SEL-NAND

PCI-DEVSEL

PCI-FRAME

PCI-IRDY

PCI-TRDY PCI-STOP PCI-PERR

PCI-SERR

PCI-REQ PCI-GNT

PCI-REQ-B

PCI-GNT-B

PCI-CLK-OUT

3HFD-4

3HFD-2 27

4K7

27

4K7

36

4K7

45

4K7

RESERVED

4K7

3HES-2

3HES-3

3HES-118

3HES-4

3HFR

45

3HFD-1 1

3HFD-3

27

3HFE-2 3HFE-336

3HFE-1

+3V3-PER

7HF1

CY2305S

1

33R

8

4K7

6

3

4K7

81

4K7

9HF6

9HF7

9HF4

9HF5

+3V3-PER

Φ

ZERO

DELAY

BUFFER

REF

CLKOUT

GND

4

PCI-REQ-ETH

PCI-GNT-ETH

PCI-REQ-MINI

PCI-GNT-MINI

6

VDD

1

2

CLK

3

4

2HF5

10n

2HF6

100n

3

2

5

7

8

+3V3-PER

2HF7

10p

3HFM

33R

3HFP

33R

3HFN

33R

3HFK

33R

A

B

C

D

PCI-CLK-PNX8535

PCI-CLK-ETHERNET

E

PCI-CLK-PNX5100

PCI-CLK-MINI

2HF5 D7 2HF6 D7 2HF7 D7 3HES-1 C5 3HES-2 B5 3HES-3 C5 3HES-4 C5 3HEU B3 3HF2 E2 3HF4 E2 3HF5 C3 3HFD-1 A6 3HFD-2 A5 3HFD-3 A6 3HFD-4 A5 3HFE-1 A6 3HFE-2 A6 3HFE-3 A6 3HFG D2 3HFH E2 3HFK E7 3HFM E7 3HFN E7 3HFP E7 3HFR E5 7H00-3 A2 7HF1 D6 9HF4 C6 9HF5 C6 9HF6 B6 9HF7 B6 9HG3 C3 IH30 B4 IHF0 E2 IHF1 C3 IHF2 C3 IHF3 D3 IHF5 E2 IHS7 C3

B

C

D

E

F

G

H

I

1

2

3

4

5678

SETNAMECHN

CLASS_NO

2

2008-11-21

I

CONTROL

J

2008-10-03

NAME

1

23 10

4

5

6

7

2

Maelegheer Ingrid

8

PNX8543 TV543 R2 LDIPNX

SUPERS.

2007-11-29

DATECHECK

9

C

8204 000 8927

130

ROYAL PHILIPS ELECTRONICS N.V. 2005

11

12

616

13

18310_508_090302.eps

2009-May-08

J

A3

090302

SSB: PNX8543 - SDRAM

1

VSS

VDDQ

14

VSSDL

VREF

VDDL

CK

12

11

LDM

UDM

15

13

7 8 9 10

3 4 5 6

VSSQ

BA

A

LDQS

UDQS

NC

DQ

CKE WE

ODT

RAS

2

CS

CAS

0

0 1 2

VDD

12

11

10

9

8

7

6

5

4

30 1 2

1

VSS

VDDQ

14

VSSDL

VREF

VDDL

CK

12

11

LDM

UDM

15

13

7 8 9 10

3 4 5 6

VSSQ

BA

A

LDQS

UDQS

NC

DQ

CKE WE

ODT

RAS

2

CS

CAS

0

0 1 2

VDD

12

11

10

9

8

7

6

5

4

30 1 2

C

M_DQ

M

M_A

M_BA

M_CLK

M_DQM

M_DQS0

N P

M_DQS1

N P

M_DQS2

N P

M_DQS3

P

0 1 2 3 4 5 6 7 8 9 10 11 12

0 1 2

M_CASB

M_CKE

N P

M_CSB

0 1 2 3

N

RASB

ODT

IREF

31

30

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

VREF

WEB

0

1

2

3

4

5

6

7

12

8

3111

12

3HH6 G7

3HH9 H3 3HHA H4

3HHD G14 3HHE F13

3HHH G14 3HHJ G13

3HHN G14 3HHP G13

3HHT G14

16

3HHU G13

C

E

O

17

D

4

PNX 8543 : SDRAM

G

3HHY H9

2HHK E6 2HHM E6

3HHZ H10

3HJ2 B11

3HGP F7 3HGR F7

3HJ3 A13 3HJ4 B13

3HGU G8 3HGV G7

3HJ5 C8 3HJY C8

3HGZ G8 3HH0 G7

3HKM G3 3HKN G10

3HH3 G8 3HH4 G7

7H00-2 A7 7HG0 F5

A

13

7HG1 F11 FH06 A12

9

2HGD E7

FH07 A11 IHG0 C7

2HGG E8 2HGH E9

is prohibited without the written consent of the copyright

P

2HGM E9 2HGN E10

3HHB F13 3HHC F13

2HGS E10 2HGT E10

3HHF G13 3HHG G13

2HGW E13 2HGY E13

3HHK G14 3HHM G13

2HH1 E14 2HH2 E14

3HHR G14 3HHS G13

2HH5 C8 2HHA H7

3HHV H10

B

N

1

5

20

I

5

7

3HHW H10

L

N

3HJ0 C1 3HJ1 A11

K

10

2HHN E11 2HHP E12

M

14

3HGS F8 3HGT G7

C

D

3HGW G8 3HGY G7

G

H

3HH1 G8 3HH2 G7

B

C

3HH5 G8

1814

8

B

10

12

15

D

56

3HH7 H3 3HH8 H4

910

2HGP E10 2HGR E10

13 14

2HGU E12 2HGV E13

34

2HGZ E13 2HH0 E13

78

2HH3 H13 2HH4 C8

11 12

2HHB A11

3

P

16

F

E

20

HH

11

12

owner.

J

19

E

7

G

H

I

A

B

2HG2 E3 2HG3 E3

E

F

2HG6 E4 2HG7 E4

I

A

2HGA E7 2HGB E7

D

K

2HG9 E6

2HGC E7

O

6

F

18

2HGE E7 2HGF E8

I

3

2HGJ E9 2HGK E9

47 11128

C

12

199

56

A

L

910

3

17

13

2

4

15

J

6

M

14

F

G

2HG0 E3 2HG1 E3

2HG4 E3 2HG5 E4

2HG8 E4

33R

3HHK

5K6

3HJ5

33R

3HHA

33R

3HH5

3HH3

33R

FH06

3HJ0

220R

2HG3

100n

33R

3HH9

33R

3HHC

100n

2HGF

100n

2HGP

330u

2HHKRES

6.3V

33R

3HGS

3HHT

33R

100n

2HGD

DDR2-VREF-CTRL

2HGU

100n

2HGS

33R

3HHH

3HHP

33R

3HGW

2HGC

100n

2HH1

100n

33R

3HHU

2HGH

100n

3HGR

33R

100n

2HG8

33R

3HHE

2HGE

100n

33R

3HH8

3HHB

33R

3HHG

100n

2HGK

100n

2HH4

D8

E7

F2

F8

H2

K3

N1

P9

J7

A7H8B2

B8

D2

E9G1G3

G7

J2

A3

E3

J3

R1J1A9G9C1

C3

C7

C9

K7

B3

B7 A8

A1

E1J9M9

F7

E8

A2 E2 R3 R7 R8

K9

H3 H1 H9 F1 F9 C8 C2

F3

G2

D7 D3 D1 D9 B1 B9

H7

L3 L1

L7

J8

K2

K8

L8

G8

N2 N8 N3 N7 P2 P8 P3

L2

M8 M3

M2 P7 R2

M7

7HG0

EDE1116AEBG-8E

Φ

SDRAM

2HGR

100n

2HG1

3HJ1

1K0 1%

+1V8-PNX85XX

DDR2-VREF-DDR

1u0

2HHP

3HKN

220R

RES

IHG0

2HHB

330u 6.3V

2HH0

100n

33R

3HGP

3HGZ

33R

3HHN

3HH7

33R

F2

F8

H2

K3

N1

P9

J7

A7H8B2

B8

D2

D8

E7

C3

C7

C9E9G1

G3

G7

J2

A3

E3

J3

A8

A1E1J9

M9

R1

J1

A9G9C1

E8

A2 E2 R3 R7 R8

K9

K7

B3

B7

B9

H7 H3 H1 H9

F1

F9 C8 C2

F3

F7

J8

K2

K8

L8

G8 G2

D7 D3 D1 D9 B1

N8 N3 N7 P2 P8 P3

L2 L3 L1

L7

Φ

EDE1116AEBG-8E

7HG1

M8 M3

M2 P7 R2

M7 N2

SDRAM

33R

3HH0

2HGA

100n

33R

3HGY 3HHJ

33R

3HJY

820R

3HHW

33R

100n

2HGB

3HHY

33R

3HHR

+1V8-PNX85XX

3HHF 33R

2HH5

100n

2HH3

2HH2

22u

33R

3HHZ

2HG2

100n

2HGM

100n

2HGV

DDR2-VREF-DDR

2HG0

100n

2HG5

100n

33R

3HHV

100n

2HGY

2HGT

100n

33R 3HHD

2HGN

100n

3HGT

33R

DDR2-VREF-CTRL

3HHS

33R

2HGW

100n

2HGJ

100n

2HG9

DATECHECK

8204 000 8927

PNX8543 TV543 R2 LDIPNX

DDR2 INTERFACE

A2130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2005

2007-11-29

716

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

22u

2HGG

6.3V

RES 2HHN

330u

2HGZ

100n

DDR2-VREF-DDR

1%

1K0

3HJ33HJ4

1K0 1%

2HHA

100n

+1V8-PNX85XX

33R

3HH2

3HHM

33R3HH1

33R

+1V8-PNX85XX +1V8-PNX85XX

N34 N33

N31 N32

AA31

V31

V32

AB32

AE32

AF34 AG32 AK31

AJ34 AJ31 R34 R31

AG33 AG34

AH31 AH32

T32 P32 U31 U32

M31

AL34

R32

M32

AL33 AE34 AK34

P34 T34 R33 U34

AH33

V34

M33

T33

M34

P31

AB33 AB34

W31

AH34 AK33

AJ32

AL32

AL31

AF31 AK32

AF32

Y34 AD32 W33 AC32 W34 Y31

AC34 AD33 AA32

W32

AE31

7H00-2 PNX85439EH/M2/24182

MEMORY

AA34 AE33

AD34 V33 Y32

AA33 AD31

2HHM

1u0

FH07

2HG7

100n

3HH6

33R

3HH4

1K0

3HJ2

RES

1%

220R

3HKM

100n

2HG4

100n

2HG6

3HGU

33R

3HGV

33R

DDR2-RAS

DDR2-WE

DDR2-D31

DDR2-D2

DDR2-D27 DDR2-D29

DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8 DDR2-D9

DDR2-ODT

DDR2-D17 DDR2-D19 DDR2-D18

DDR2-D3

DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28

DDR2-D1

DDR2-D0

DDR2-BA2

DDR2-CLK_P

DDR2-D0 DDR2-D1

DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16

DDR2-D11

DDR2-D10

DDR2-D9

DDR2-D8

DDR2-D7

DDR2-D6

DDR2-D5

DDR2-D4

DDR2-D2

DDR2-D3

DDR2-DQS3_P

DDR2-BA2

DDR2-WE

DDR2-RAS

DDR2-ODT

DDR2-CS

DDR2-CKE

DDR2-CAS

DDR2-BA1

DDR2-BA0

DDR2-D15

DDR2-D14

DDR2-D13

DDR2-D12

DDR2-A10 DDR2-A11 DDR2-A12

DDR2-CLK_N

DDR2-D18

DDR2-D19

DDR2-DQS3_N

DDR2-BA0

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-DQS0_N DDR2-DQS0_P

DDR2-DQS3_N DDR2-DQS3_P

DDR2-DQS2_N DDR2-DQS2_P

DDR2-DQM3

DDR2-DQM0 DDR2-DQM1

DDR2-CKE

DDR2-CS

DDR2-CAS

DDR2-BA1

DDR2-DQM1

DDR2-DQM2

DDR2-DQM3

DDR2-BA2

DDR2-DQM2

DDR2-DQS1_N

DDR2-DQS1_P

DDR2-CLK_N

DDR2-CLK_P

DDR2-A9

DDR2-A8

DDR2-A7

DDR2-A6

DDR2-A5

DDR2-A4

DDR2-A3

DDR2-A2

DDR2-A12

DDR2-A11

DDR2-A10

DDR2-A1

DDR2-A0

DDR2-DQM0

DDR2-CLK_N

DDR2-CLK_P

DDR2-DQS2_N

DDR2-ODT

DDR2-RAS

DDR2-WE

DDR2-CLK_P DDR2-CLK_N

DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30

DDR2-DQS2_P

DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31

DDR2-D20

DDR2-CKE

DDR2-CS

DDR2-D16 DDR2-D17

DDR2-D26 DDR2-D25

DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-BA0 DDR2-BA1

DDR2-CAS

DDR2-A11 DDR2-A12

DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5

DDR2-DQS0_P DDR2-DQS0_N

DDR2-DQS1_P DDR2-DQS1_N

DDR2-A0 DDR2-A1

DDR2-A10

18310_509_090302.eps

090302

Circuit Diagrams and PWB Layouts

EN 94Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Digital Video In

EN 95Q549.2E LA 10.

1

2

A A

3

49

1

56

23

7

8

45

67

10

11

PNX 8543 : DIGITAL VIDEO IN

A

7H00-4 PNX85439EH/M2/24182

HDMI_DV

DDC_SCL_A DDC_SDA_A

DDC_SCL_B DDC_SDA_B

HDMI_RREF

P

HDMI_RX0_A

N

P

HDMI_RX1_A

N

P

HDMI_RX2_A

N

P

HDMI_RXC_A

N

P

HDMI_RX0_B

N

P

HDMI_RX1_B

N

P

HDMI_RX2_B

N

P

HDMI_RXC_B

N

HOT_PLUG_A HOT_PLUG_B

DV

DV_UVIN

DV_VALID

DV_YIN

CLK

FID

HS

DV_VS

B8 C9 D9

B6

0

A6

1

E7

2

D7

3

C7

4

B7

5

A7

6

E8

7

D8

8

C8

9

A8 E9

B4

0

A4

1

E5

2

D5

3

C5

4

B5

5

A5

6

E6

7

D6

8

C6

9

C

D

owner.

is prohibited without the written consent of the copyright

E

F

B

C

D

DDCA-SCL DDCA-SDA

DDC-SCL DDC-SDA

RREF-PNX85XX

HDMIA-RX0HDMIA-RX0+

HDMIA-RX1HDMIA-RX1+

HDMIA-RX2HDMIA-RX2+

HDMIA-RXCHDMIA-RXC+

HDMIB-RX0HDMIB-RX0+

HDMIB-RX1HDMIB-RX1+

HDMIB-RX2HDMIB-RX2+

HDMIB-RXCHDMIB-RXC+

HOT-PLUG-A HOT-PLUG

TH09

TH11

TH13

TH15

TH01

TH03

TH05

TH07

3HK0

12K

TH10

TH12

TH14

TH16

TH02

TH04

TH06

TH08

IHSM

9HK0

C18 E19

C15 D15

C16

B18 B17

A17 A16

B16 B15

A19 A18

B14 B13

A13 A12

B12 B11

A15 A14

D19 E15

A

B

C

D

12

3HK0 B2 7H00-4 A3 9HK0 D2 IHSM B2 TH01 C2 TH02 C2 TH03 C2 TH04 C2 TH05 C2 TH06 C2 TH07 D2 TH08 D2 TH09 B2 TH10 B2 TH11 B2 TH12 B2 TH13 B2 TH14 C2 TH15 C2 TH16 C2

13

BB

C

D

E

F

G

H

G

E

H

561234

I

SETNAMECHN

CLASS_NO

7

I

2

2008-11-21

VIDEO IN

J

PNX8543 TV543 R2 LDIPNX

32008-10-10

NAME

Maelegheer Ingrid

1 9

2

3

4

6

7

8

SUPERS.

DATECHECK

2007-11-29

C

10

8204 000 8927

ROYAL PHILIPS ELECTRONICS N.V. 2005

11

12

816

135

18310_510_090302.eps

2009-May-08

J

A3130

090302

SSB: PNX8543 - Audio

Circuit Diagrams and PWB Layouts

EN 96Q549.2E LA 10.

1

A

B

C

D

E

F

G

H

I

J

K

owner.

is prohibited without the written consent of the copyright

L

M

2

3

4

5 16

6

7

8

9

10

11

12

13

14

15

17

18

19

20

A

1

A

B

23

PNX 8543 : AUDIO

+AUDIO-POWER

IHM6

3HMF

4R7

2HMG

IHM0

1u0

4 12

6HM0

BZX384-C6V8

3HM0-2

C

3HM0-3

63

IHM2

D

3HM1

22K

IHM4

10K

567

9HM0

7HM5

BC807-25W

22K

27

32

1

IHM8

22K

3HM0-1

81

IHM7

7HM6 BC847BW

IHM5

22K

3HM0-4

54

AUDIO-VDD

E

AUDIO-VDD

2 BC857BW

3HML

3HMU

7HM3

1

3

IHM1

2 BC857BW

7HM4

3

IHMG

+AUDIO-L

-AUDIO-R

2K2

1

2K2

IHN0

IHN4

2HM4

3HMC

2HM5

3HMD

IHNK

3HMY

IHN8

6

2

7HM2-1 BC847BS(COL)

1

IHNG

470R

AUDIO-VDD

3HMW

IHNF

3

7HM2-2 BC847BS(COL)

4

IHNH

3HMA

2K2

470R

3HMB

100n

IHNJ

22K

5

100n

22K

F

IH22

2HM3

3HMZ

22K

2HM1

1u0

3n3

ADAC(1)

G

IH23

2HM8

3HMV

22K

2HM2

1u0

3n3

H

ADAC(2)

I

8

ADAC(7)

ADAC(8)

ADAC(5)

ADAC(6)

91011

AUDIO-VDD

2HMJ

FHR3

3

2

AUDIO-VDD

5

6

AUDIO-VDD

10

9

AUDIO-VDD

12

13

100n

4

7HM1-1 LM324

11

3HME-1

81

10K

2HMP

33p

4

7HM1-2 LM324

11

3HME-4

54

10K

2HMT

33p

4

7HM1-3 LM324

11

3HMM-4

54

10K

2HMW

33p

4

7HM1-4 LM324

11

3HMM-1

81

10K

2HMZ

33p

1

7

8

14

FHM0

FHM1

FHM2

FHM3

IHNB

IHMW

IHN3

IHND

2HMY

2HN1

3n3

IHMV

3HME-2

27

10K

3HME-3

36

10K

3n3

3HMM-3

36

10K

3HMM-2

27

10K

IHN6

IHNA

IHNE

13

AUDIO-CL-L

AUDIO-CL-R

AUDIO-OUT-L

AUDIO-OUT-R

2HM1 G5 2HM2 H5 2HM3 G4 2HM4 G5 2HM5 H5 2HM8 H4 2HMG B3 2HMJ A10 2HMP C10 2HMT E10

A

2HMW G10 2HMY H9 2HMZ I10 2HN1 F9 3HM0-1 C5 3HM0-2 B4 3HM0-3 C4 3HM0-4 D5 3HM1 D4 3HMA G6 3HMB H6

B

3HMC G5 3HMD I5 3HME-1 B10 3HME-2 B9 3HME-3 E9 3HME-4 E10 3HMF B3 3HML G6 3HMM-1 I10 3HMM-2 I9 3HMM-3 G9 3HMM-4 G10

C

3HMU H6 3HMV H5 3HMW H5 3HMY F5 3HMZ F5 6HM0 B4 7HM1-1 B10 7HM1-2 D10 7HM1-3 F10 7HM1-4 H10 7HM2-1 F5 7HM2-2 H5

D

7HM3 F7 7HM4 H7 7HM5 B5 7HM6 C5 9HM0 B5 FHM0 B11 FHM1 D11 FHM2 F11 FHM3 H11 FHR3 A10 IH22 F4

E

IH23 H4 IHM0 B3 IHM1 F7 IHM2 C4 IHM4 C4 IHM5 D5 IHM6 B3 IHM7 C5 IHM8 C5 IHMG H7 IHMV B9 IHMW B9

F

IHN0 F5 IHN3 D9 IHN4 H5 IHN6 D10 IHN8 F6 IHNA F10 IHNB F9 IHND H9 IHNE H10 IHNF H6 IHNG F6 IHNH H6

G

IHNJ G5 IHNK I5

H

B

C

D

E

F

G

H

I

J

K

L

M

I

N

12

3

456

O

7

8910

CLASS_NO

11

12 13

EMANTESNHC

2

N

O

2008-11-21

AUDIO

P

2008-10-10 3

NAME

Maelegheer Ingrid

1

2

3

4 11 15

5

6

7 20

8

9

10

12 13

14

PNX8543 TV543 R2 LDIPNX

CHECK DATE

SUPERS.

16

2007-11-29

17

16 9

2009-May-08

8204 000 8927

C

ROYAL PHILIPS ELECTRONICS N.V. 2005

18

130 A2

19

18310_511_090302.eps

P

090302

Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Analogue AV

EN 97Q549.2E LA 10.

1

A

B

C

B

D

C

F

D

G

E

H

F

I

3HS7

2HUK

270p

75R

J

G

K

owner.

is prohibited without the written consent of the copyright

H

L

M

I

N

8

6

2H80

22n

56R

2H82

22n

56R

2H84

22n

56R

6

9

10

11

12

13

78910

5HRC

IHPF

2HRZ

22n

56R

3HSJ

2HTP

FHR1

2HS7

22n

56R

2HS8

3HRV

IHR0

2HS1

22n

56R

2HS2

3HRP

IHR5

2HSJ

22n

56R

3HS2

2HSK

IHRD

2HSB

22n

3HSQ

2HT8

IHR6

22n

3HS8

IHRE

2HSN

22n

56R

100p

2HTZ

3HSU

789

3H34

5HRL

3HSH

27R

330n

100p

2HTR

5HR2

3HRU

27R

330n

100p

2HS9

5HR0

3HRR

27R

330n

100p

2HS3

2HSA

2HSC

5HR5

3HS1

27R

330n

100p

2HSM

2HSF

22n

47R

IHRF

2HSP

22n

18R

120n

2HU0

2HUC

100p

3HSR

2HTB

IH46

100p

22n

3HSA

3HS3

820R

12p

2HSU

3HS4

820R

3H40

18R

5HR9

120n

56R

100p

2HTC

2HSR

100n

2HSS

100n

10 11 12

2HS4

22n

2HTD

22n

3HS0

3HSV

100p

2H99

AV4-Y

IHV3

IHSA

3

IHSC

IHSH

5

AV4-PR

IH39

AV4-PB

IH40

AV4-Y

IH41

AV5-PR

IH42

AV5-PB

IH43

AV5-YAV5-Y

2HTH

22n

2HA3

22n

IHS4

2HU5

22n

2HA4

22n

2HT5

22n

IHS5

2HU8

22n

2HT6

22n

IHSD

2HS0 22n

2HSY

22n

2HTK

22n

IHV6

2HST

22n

6

3H95

IH38

18R

3H79

18R

3H96

18R

3H81

18R

3H97

18R

3H83

18R

3H98

5H85

18R

3H85

18R

330n

100p

2H91

3H99

18R

5H86

3H89

18R

330n

100p

2H94

3H29

18R

5H87

3H91

18R

330n

100p

2H97

9H50

22n

IHRB

2HSV

22n

RES

2HUN

22n

2HUP

22n

4

7

5H80

IH80

330n

100p

9H51

9H559H54

100p

2H81

3H80

5H81

IH44

330n

100p

2H83

3H82

IH81

5H82

330n

100p

3H84

2H85

2H90

22n

56R

100p

3H88

2H93

22n

56R

3H90

2H96

22n

56R

3H93

35H925H9

2H87

2H88

2H89

IH85

2H92

IH45

2H95

IH87

2H98

2HT1

22n

2HT7

22n

2HA5

5

2 14

1

3

2345

4

PNX 8543 : ANALOGUE AV

3HSK

3HS5

3HT9

3HS6

3HSW

IHS2

75R

270p

3HSF

2HTL

FHR5

FHR6

7H00-1 PNX85439EH/M2/24182

ANALOG_VIDEO

T1 P1

HSYNCIN

T2

IN

IHVE

2HSW

22n

10K

IHSG

4K7

IHSB

75R

IHS3 IHSE

2HKL

270p

U1

A1

C3

C2

A3 B3

A2 B2

J5

VSYN

OUT

CURREF

BIAS

DAC

AGC

P

CVBS1Y

N

P

CVBS2C

N

GND_A3_TG

SYNC_IN_1 SYNC_IN_2

PC1_AI1 PC1_AI2 PC1_AI3

PC1_AID

PC2_AI1 PC2_AI2 PC2_AI3 PC2_AID

PC3_AI1 PC3_AI2 PC3_AI3 PC3_AID

AI1N_IF AI1P_IF AI2P_IF AI2N_IF

REF 1

REF 2

REF 3

REF 4

REF 5

AI11 AI12 AI13

AI21 AI22 AI23

AI31 AI32 AI33

AI4N

AI41 AI42 AI43 AI44

AI5N

AI51 AI52 AI53 AI54

Y_CVBS-MON-OUT

H-SYNC-VGA

V-SYNC-VGA

10n

2H86

10n

R1 R3

P3 P4

P5 N1 N2 N3 N4

M1 M3 M4 M5

L1

L2

L3

L4

K1

K3

K4

K5

J1

J2

J3

J4

G3 G4 H1 H2 H3 H4

F1

F2

F3

F4 G1 G2

D2 D1

E1

E2

12

3HSB

3HRT

3HSN

3HRY

IHR4

18R

IHRC

2HTE

15

11

IHR1

47R

5HRG

330n

56R

100p

2HTV

2HTU

5HR3

IHR3

330n

56R

100p

2HSE

2HSD

47R

3H47

18R

IHR8

5HRA

3HSD

2HUB

120n

56R

100p

2HTF

IHS6

22n

47R

3HT3

22n

3HRS

27R

3HSM

27R

100p

3HRW

2HTG

27R

3HRZ

27R

3HS9

27R

3HST

27R

3HSE

18R

100p

3HT4

27R

100p

16

12 13

AV1-Y_CVBS

IHSR

IHSS

IHST

AV2-Y_CVBS

FRONT-Y_CVBS

AV1-PR

AV1-PB

AV3-PR

AV3-PB

FRONT-C

17

AV1-Y

AV3-Y

R-VGA

G-VGA

B-VGA

CVBS4

IF-N

IF-P

13

18

19

2H80 A6 2H81 A5 2H82 A5 2H83 A5 2H84 B6 2H85 B5 2H86 D3 2H87 A5 2H88 A4 2H89 B4

A

2H90 B5 2H91 C4 2H92 C5 2H93 C5 2H94 C4 2H95 C4 2H96 D5 2H97 D4 2H98 D4 2H99 D3 2HA3 E3 2HA4 E3

B

2HA5 F5 2HKL E1 2HRZ A8 2HS0 G4 2HS1 B8 2HS2 B8 2HS3 B9 2HS4 A10 2HS7 B8 2HS8 B8 2HS9 B9

C

2HSA C10 2HSB E8 2HSC C10 2HSD D10 2HSE D11 2HSF D10 2HSJ D8 2HSK D8 2HSM D9 2HSN G8 2HSP F10 2HSR H10

D

2HSS I10 2HST G3 2HSU I9 2HSV G4 2HSW D1 2HSY G3 2HT1 E5 2HT5 F3 2HT6 F3 2HT7 E5 2HT8 F8 2HTB G9

E

2HTC G10 2HTD G10 2HTE G10 2HTF G11 2HTG G11 2HTH D3 2HTK G3 2HTL B2 2HTP A8 2HTR A9 2HTU C10

F

2HTV C11 2HTZ G8 2HU0 G9 2HU5 E3 2HU8 F3 2HUB H11 2HUC H9 2HUK E1 2HUN G4 2HUP G4 3H29 C4 3H34 F9

G

3H40 G10 3H47 G11 3H79 A4 3H80 A5 3H81 A4 3H82 A5 3H83 B4 3H84 B5 3H85 B4 3H88 C5 3H89 C4 3H90 C5

H

3H91 D4 3H93 D5 3H95 A4 3H96 A4 3H97 B4 3H98 B4 3H99 C4 3HRP B8 3HRR B9 3HRS A12 3HRT A10

I

3HRU B9 3HRV B8 3HRW C12 3HRY D10 3HRZ D12 3HS0 E10 3HS1 D9

3HS2 D8 3HS3 H9 3HS4 I9 3HS5 E1 3HS6 E1 3HS7 E1 3HS8 F8 3HS9 F12 3HSA G9 3HSB G10 3HSD G10 3HSE G11 3HSF B2 3HSH A9 3HSJ A8 3HSK E1 3HSM C12 3HSN C10 3HSQ E8 3HSR G10 3HST F12 3HSU G8 3HSV F10 3HSW E1 3HT3 H11 3HT4 H11 3HT9 E1 5H80 A5 5H81 A5 5H82 B5 5H85 B4 5H86 C4 5H87 D4 5HR0 B9 5HR2 B9 5HR3 C11 5HR5 D9 5HR9 G10 5HRA G11 5HRC A9 5HRG C11 5HRL F9 7H00-1 D2 9H50 D4 9H51 D5 9H52 E4 9H53 E5 9H54 E4 9H55 E5 FHR1 B8 FHR5 B2 FHR6 B2 IH38 A4 IH39 A4 IH40 B4 IH41 B4 IH42 C4 IH43 D4 IH44 A5 IH45 C5 IH46 G10 IH80 A5 IH81 B5 IH85 B5 IH87 D5 IHPF A8 IHR0 B8 IHR1 A10 IHR3 C11 IHR4 D10 IHR5 D8 IHR6 F9 IHR8 G11 IHRB F4 IHRC C10 IHRD E8 IHRE F8 IHRF F10 IHS2 A2 IHS3 E1 IHS4 E3 IHS5 F4 IHS6 H11 IHSA E3 IHSB E1 IHSC F3 IHSD F3 IHSE E1 IHSG E1 IHSH G3 IHSR A12 IHSS B12 IHST B12 IHV3 G3 IHV6 G3 IHVE D1

20

A

B

C

D

EE

F

G

H

I

J

K

L

M

N

O

CLASS_NO

EMANTESNHC

2

O

2008-11-21

ANALOG AV

P

2008-10-10 3

NAME

Maelegheer Ingrid

1

2

4

5

6

7

9

10

11

12

13

14

PNX8543 TV543 R2 LDIPNX

CHECK DATE

158

SUPERS.

16

2007-11-29

16 11

17

2009-May-08

8204 000 8927

C

ROYAL PHILIPS ELECTRONICS N.V. 2005

183

130 A2

19

20

18310_512_090302.eps

P

090302

SSB: PNX8543 - Audio

Circuit Diagrams and PWB Layouts

EN 98Q549.2E LA 10.

15

A

B

A

C

B

D

C

E

F

D

G

E

H

I

F

J

G

K

is prohibited without the written consent of the copyright

owner.

H

L

M

I

5HP2

30R

100n

2HP5

3HT8-3

33R

3HP5-1

33R

3HP5-3

33R

3HP1

33R

3HT8-1 33R

13

VDDA-AUDIO

FHPE

2HP4

SPDIF-OUT

10u

ADAC(1)

ADAC(2)

ADAC(3)

ADAC(4)

ADAC(5)

ADAC(6)

ADAC(7) ADAC(8)

IH11

2HPB

LD2985BM33R

5

OUT IN

4

10n

ADAC(8) ADAC(7)

7HP0

COM

4121

15

16

17

2101

A

B

IH13

1

3

INHBP

2

IHSY

22K

3HAH

3n3

2HRT

2HRS

2HPA

3HAG

+5V

10u

+3V3

22K

C

D

E

F

G

H

2HP4 D10 2HP5 D9 2HP6 D9 2HP7 D9 2HP8 D9 2HPA C11 2HPB D10 2HR0 C4 2HR1 D5 2HR2 C4 2HR3 C5 2HR4 D4 2HR5 D4 2HR6 D4 2HR7 D4 2HR8 E4 2HR9 E4 2HRA D4 2HRB D4 2HRC E4 2HRD E4 2HRE E4 2HRF E4 2HRG E3 2HRH F4 2HRJ F3 2HRK F4 2HRM D6 2HRN D6 2HRP C6 2HRS E11 2HRT E11 2HRU C6 2HRV C6 2HRW G6 2HRY G6 3H62 F6 3H63 F6 3HAG D11 3HAH D11 3HP0 F9 3HP1 F10 3HP5-1 E10 3HP5-2 E9 3HP5-3 F10 3HP5-4 F9 3HPN G9 3HR0-1 C3 3HR0-2 C4 3HR0-3 C3 3HR0-4 D3 3HR3-1 D3 3HR3-2 D4 3HR3-3 D3 3HR3-4 D3 3HR8-1 E3 3HR8-2 E3 3HR8-3 D3 3HR8-4 D3 3HRC-1 E3 3HRC-2 E3 3HRC-3 E3 3HRC-4 E2 3HRJ-1 F2 3HRJ-2 E3 3HRJ-3 F3 3HRJ-4 F2 3HRK H6 3HRM G5 3HRN G5 3HT8-1 F9 3HT8-2 F9 3HT8-3 D10 3HT8-4 E9 5HP2 C10 5HRW D6 5HRZ D6 7H00-7 D7 7HP0 C10 9H11 C4 9H12 C4 FHPE C10 IH11 C10 IH13 C11 IHPD F9 IHRH C4 IHRJ D4 IHRK G5 IHRL G6 IHRM G6 IHRT F3 IHRU F3 IHRV E3 IHRW E3 IHRY D3 IHRZ E3 IHS0 D3 IHS1 D3 IHSU C6 IHSV D6 IHSW C9 IHSY D11 IHSZ D6

18

19

20

A

B

C

D

E

F

G

H

I

J

K

L

M

2

1

3

4

6

2

7

53

8

9

10

11

8764 11

9

PNX 8543 : AUDIO

VDDA-DAC

AUDIO-IN1-L

AUDIO-IN1-R

AUDIO-IN2-L

AUDIO-IN2-R

AUDIO-IN3-L

AUDIO-IN3-R

AUDIO-IN4-L

AUDIO-IN4-R

AUDIO-IN5-L

AUDIO-IN5-R

3HRC-4

45

33K

3HRJ-1

1

8

33K

3HRJ-4

4

5

33K

IHRU

IHRT

1

3

3HR8-4

3HRC-1

2

3HRJ-3

3HR3-4

4

1

33K

3HR8-1

33K

3HR0-4

1

3HRC-3

8

73HRJ-2

6

4

33K

3HR3-1

33K

5

8

IHRV

2

IHRW

8

5

RES

3HR0-1

5

3HR8-3

IHRY

IHRZ

3

3HRC-2

2HRG

7

1

IHRH

33K

3HR0-3

4

IHRJ

33K

3

3HR3-3

IHS0

3HR3-2

2

IHS1

8

6

33K333p

3HR8-2

27

33K

6 33K

7

33K

RES

33pRES

2HRJ 33p

3HR0-2

6

6 33K

7

33K

2HRC

RES

2HRH

2HRK

1u0

2HRE

33pRES

33p

9H12

9H11

2HR8

2

33K

3

33K

RES

2HR4

RES 33p

2HRA

33pRES

1u0

2HR6 33p

2HR0

2HRF

2HRD

2HRW

IHSU

10u

100n

2HRP

2HRV

2HRU

IHSV

30R5HRW

IHSZ

100n

2HRN

100n

2HRM

3H62

47K

3H63

IHRL

IHRM

10u

100n

2HRY

75R

3HRK

7H00-7 PNX85439EH/M2/24182

AK7

L

VREF_AADC

AL7

R

AM8

NEG

VREF

AM9

POS

AP8

VRNEG

AN8

AADC

AN7

L

AIN_1

AP7

R

AK6

L

AIN_2

AL6

R

AM6

L

AIN_3

AN6

R

AP6

L

AIN_4

AM5

R

AN5

L

AIN_5

AP5

R

U5

1

SPDIF_IN

C19

2

AN15

OSCLK

AL14

SCK

AK14

SD1

AP15

SD2

I2S_IN

AM15

SD3

AL15

SD4

AM14

I2S_IN_WS

B1

RESREF

AM7

VCOM_ADC

C1

AOUT

D3

AGND1

AADC

I2S_IN

AUDIO

VDDA_3V3_DAC

VSSA_ADAC

ADAC1

ADAC3

ADAC6 N

ADAC7BUF ADAC8BUF

ADAC

SPDIF_OUT

OSCLK

I2S_OUT

I2S_OUT_SD

I2S_OUT_WS

AK9

AJ10

AN14 AP14

N

AL13

P

AP13 AN13

NADAC2

AM13

P

AM12 AN12

N

AP12

P

AM11

AL11

NADAC4

AK11

P

AN11 AP11

NADAC5

AL10

P

AP10 AN10 AM10

P

AP9 AN9

AL9

7

AL8

8

V1

AA2

Y2

SCK

Y3

1

AA1

2

AA3

3

AA4

4

Y1

2HR2

2HR3

33p

1u0

2HR1

33pRES

1u0

2HR7

1u0

2HR5

2HRB

1u0

2HR9

1u0

VDDA-AUDIO

1u0

IHRK

3HRM

VDDA-AUDIO

4K7

3HRN

5HRZ 30R

SPDIF-IN1

4K7

2HP8

IHSW

100n

2HP7

2HP6

3HT8-4

33R

3HP5-2

33R

3HP5-4

33R

3HP0

RES

33R

RES

3HT8-2

33R

IHPD

3HPN

68R

I

N

1

2

4367

5

8

9

O

10

11

CLASS_NO

12

SETNAMECHN

2

N

O

2008-11-21

AUDIO

P

2008-10-10

Maelegheer Ingrid

NAME

1

3

4

6

8

1072

11

12

139

14

PNX8543 TV543 R2 LDIPNX

3

15

SUPERS.

DATECHECK

16

2007-11-29

175

2009-May-08

8204 000 8927

C

ROYAL PHILIPS ELECTRONICS N.V. 2006

18

130

19

P

1216

A3

20

18310_513_090302.eps

090302

SSB: PNX8543 - Audio

C

VIA

GND_HS

VO

IN-

VDD

1

SHUTDOWN

BYPASS

2

GND

2

1

2101

F

D

14

4

J J

2

A

B

C

D

E

3

2 11

owner.

C

is prohibited without the written consent of the copyright

8

3H71 A1 3H74 B1 3H75 A3 3H76 B2

3H18-1 B5

IHW8 E7 IHWE C2 IHWJ C5 IHWL C2

I

H

6

B

9

7

IH24 C2 IH25 C2 IH27 D4 IH29 D8 IH31 C8

13

3H18-2 C2 3H18-3 C2 3H18-4 B5 3H35 C7

B

7

G

1

89

6

C

11

A

E

F

10

G

I

E

PNX 8543 : AUDIO

IH47 C1 IH48 C1 IH51 A2 IH52 A2 IH53 B1 IH54 C2 IH55 B2 IHV1 C5 IHVA D8 IHW7 D7

5

D

H

133 12

A

B

C

D

E

1HV9 B3 2H02 D4 2H04 A2 2H05 B2

3H94 C2 3HV3 D2 3HV4-1 D7 3HV4-2 C8 3HV4-3 E6 3HV4-4 E6 7H01-1 A2 7H01-2 B2 7HV0 C4 7HVA-1 E7 7HVA-2 D8 FH50 B3 FHV3 E6 FHV4 A3 FHV5 C3

5

2H25 D1 2H26 D1 2HVA A5 2HVB B5 2HVC C5 2HVD C1 2HVE C2 2HVG E6 2HYC B3 2HYD C3

123456

IH52

78

12345678

3H77 B2

100p

2HYC

2HYD

100n

3HV4-1

18

IH29

22K

5K6

3H74

100R

3H76

100n

2HVD

100R

3H75

7H01-2 BC847BS(COL)

5

3

4

AUDIO-VDD

IH27

IHWE

22K

3H18-4

45

1n0

2HVG

3HV4-3

22K

63

2H25

3n3

IHW7

3H94

470R

IHWL

33p

2HVB

IH51

3H71

5K6

2H05

1u0

2H04

1u0

IH25

22K

3HV4-4

45

10K

3HV3

2HVA

33p

FHV5

FHV4

2H02

1u0

100n

2HVC

CHECK

8204 000 8927

PNX8543 TV543 R2 LDIPNX

AUDIO

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2005

2007-11-29

1316

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

6

1

AUDIO-VDD

+3V3

7H01-1 BC847BS(COL)

2

IH24

+AUDIO-POWER

FHV3

IH31

470R

3H77

IHV1

27

IHVA

3HV4-2

22K

72

IHW8

1

22K

3H18-2

7HVA-1 BC847BPN(COL)

2

6

IHWJ

22K

3H18-1

18

3n3

2H26

63

22K

3H18-3

IH47

IH48

1HV9

1735446-3

1 2 3

3H35

5

3

4

10K

BC847BPN(COL) 7HVA-2

100n

2HVE

10 11

1

7

3

4

9

2

6

5

8

Φ

AMPLIFIER

7HV0 TPA6111A2DGN

IH53

FH50

IH54

ADAC(3)

IH55

AUDIO-HDPH-R-AP

AUDIO-HDPH-L-AP

A-STBY

ADAC(4)

A-PLOP

RESET-AUDIO

18310_514_090302.eps

090302

Circuit Diagrams and PWB Layouts

EN 99Q549.2E LA 10.

2009-May-08

Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Video Streams

EN 100Q549.2E LA 10.

1

2

5

6

7 14

8 8151

9

10

11

1234

13

16

17

19

20

A

B B

123456789

10 11

PNX 8543 : VIDEO STREAMS

C

A

D

9H06-4

45

9H06-3

36

9H06-2

27

9H06-1

18

9H07-4

45

9H07-3 47R

36

9H07-2

27

9H07-1

18

9H08-4

45

9H08-3

36

9H08-2

27

9H08-1

18

3HB1

100R

3HB2

3HB5

3HB6

100R

+3V3

3HB4

10K

IH50

10K

74LVC245A

1

19

2

3 4 5 6 7 8 9

74LVC245A

1

19

2

3 4 5 6 7 8 9

7H04

7H05

3EN1 3EN2 G3

+3V3

2H08

100n

20

1

2

10

+3V3

2H09

100n

20

1

2

10

+3V3

3H73

3HB3

100R

TSO-BIT-ERR

TSO-BIT-CLK

TSO-BIT-VALID

TSO-SYNC TSINO-DATA0 TSINO-DATA1 TSINO-DATA2 TSINO-DATA3 TSINO-DATA4 TSINO-DATA5 TSINO-DATA6 TSINO-DATA7

I2C-SCL I2C-SDA

RESET-BOLT-ON

IHW0

+3V3-PER

18

TSINO-DATA7

17

TSINO-DATA6

16

TSINO-DATA5

15

TSINO-DATA4

14

TSINO-DATA3

13

TSINO-DATA2

12

TSINO-DATA1

11

TSINO-DATA0

3HB7

18

10K

17 16 15 14 13 12 11

TSO-SYNC

TSO-BIT-VALID

TSO-BIT-CLK

TSO-BIT-ERR

3HWK

4K7

9HW0

FE-ERR

CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7

CA-MOSTRT

CA-MOVAL

CA-MOCLK_VS2

FE-DATA0 FE-DATA1

FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6

FE-DATA7

FE-ERR

FE-CLK

FE-SOP

FE-VALID

9HW2

7H00-12 PNX85439EH/M2/24182

E33

0

C32

1

B32

2

J30

3

K34

CA_MDO

4

K33

5

H30

6

J33

7

E34

CA_MOSTRT

D34

CA_MOVAL

CA_MOCLK

D10

0

E10

1

A9

2

A11

3

C11

TNR_TSDI

4

D11

5

E11

6

A10

7

C12

TNR_ERROR

B10

TNR_MICLK

B9

TNR_MISTRT

C10

TNR_MIVAL

TUN_CA

CA_DATA

CA_MDI

CA_MISTRT

CA_MIVAL

CA_MICLK

CA_ADD_EN

CA_CDN

CA_OOB_EN

CA_RDY

CA_RST

CA_VCCEN

CA_VPPEN

CA_VSN

G33

0

G31 G30 H34

F34 F32 F31

G34

J31

E32

H32H31

B31

K32 A32

D31 A31

C31

J34

C34

C33

A33

J32

A34

3HWR-4 4

3HWV-4

3HWR-3

1

47R

45

47R

36

47R

27

47R

3HWV-3

9HW1

1 2 3 4 5 6 7

0 1

DIR

EN

0 1

3HWR-2

2

7

83HWV-1

47R

273HWN-2

5

18

3HWR-1

47R

18

3HWN-1

47R

3HWV-2

3

6

47R

3HWP

33R

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7

CA-MISTRT

CA-MIVAL

CA-MICLK

CA-ADDEN

CA-CD1 CA-CD2

CA-DATADIR

CA-DATAEN

IRQ-CA

CA-RST

CA-VS1

CA-MOCLK_VS2

E

F

G

H

I

J

K

owner.

is prohibited without the written consent of the copyright

L

FE-ERR

FE-CLK

B

C

FE-VALID FE-SOP FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

SCL-BOLT-ON SDA-BOLT-ON

BOLT-ON-IO

D

FE-DATA7

FE-DATA6 FE-DATA5

E

FE-DATA4 FE-DATA3 FE-DATA2 FE-DATA1 FE-DATA0

F

BOLT-ON-TS-ENn

FE-SOP FE-VALID

G

FE-CLK FE-ERR

2H08 D3 2H09 F3 3H73 F2 3HB1 C2 3HB2 C2 3HB3 C2 3HB4 D2 3HB5 D2 3HB6 F2 3HB7 F4 3HWK D5 3HWN-1 B11 3HWN-2 B11

A

3HWP C10 3HWR-1 B11 3HWR-2 B11 3HWR-3 C10 3HWR-4 B10 3HWV-1 B10 3HWV-2 C10 3HWV-3 C10 3HWV-4 B10 7H00-12 B9 7H04 D3 7H05 F3

B

9H06-1 B2 9H06-2 B2 9H06-3 B2 9H06-4 B2 9H07-1 B2 9H07-2 B2 9H07-3 B2 9H07-4 B2 9H08-1 C2 9H08-2 C2 9H08-3 C2

C

9H08-4 B2 9HW0 D6 9HW1 D10 9HW2 C8 IH50 F2 IHW0 D6

D

E

F

G

A

C

D

E

F

G

H

I

J

K

L

M

1234567

8910

11

N

O

CLASS_NO

SETNAMECHN

2

M

N

O

2008-11-21

CONDITIONAL ACCESS

P

NAME

1

3

42

5

6

7

8

9

10

11

12

13

14

PNX8543 TV543 R2 LDIPNX

32008-10-10

15

SUPERS.

DATECHECK

16

2008-06-05

17

2009-May-08

8204 000 8927

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130Maelegheer Ingrid

1416

19 20

18310_515_090302.eps

P

A2

090302